diff --git a/clang/lib/Support/RISCVVIntrinsicUtils.cpp b/clang/lib/Support/RISCVVIntrinsicUtils.cpp index 2a3f30c79e68c9a1e533219df5f9d4c09545957a..3da35d9d2f6baacfdc9008370e1993536b6add66 100644 --- a/clang/lib/Support/RISCVVIntrinsicUtils.cpp +++ b/clang/lib/Support/RISCVVIntrinsicUtils.cpp @@ -1002,6 +1002,10 @@ void RVVIntrinsic::updateNamesAndPolicy(bool IsMasked, bool HasPolicy, OverloadedName += suffix; }; + // This follows the naming guideline under riscv-c-api-doc to add the + // `__riscv_` suffix for all RVV intrinsics. + Name = "__riscv_" + Name; + if (IsMasked) { if (PolicyAttrs.isTUMUPolicy()) appendPolicySuffix("_tumu"); diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaadd.c index 9387e4e5498565045811ee608e6a0493bf65a90b..bbd3445d9e4ae48032ac727ecd76a44d4da1a74f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaadd.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vaadd_vv_i8mf8(op1, op2, vl); + return __riscv_vaadd_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vaadd_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf8(op1, op2, vl); + return __riscv_vaadd_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vaadd_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vaadd_vv_i8mf4(op1, op2, vl); + return __riscv_vaadd_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vaadd_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf4(op1, op2, vl); + return __riscv_vaadd_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vaadd_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vaadd_vv_i8mf2(op1, op2, vl); + return __riscv_vaadd_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vaadd_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf2(op1, op2, vl); + return __riscv_vaadd_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vaadd_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vaadd_vv_i8m1(op1, op2, vl); + return __riscv_vaadd_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vaadd_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m1(op1, op2, vl); + return __riscv_vaadd_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vaadd_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vaadd_vv_i8m2(op1, op2, vl); + return __riscv_vaadd_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vaadd_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m2(op1, op2, vl); + return __riscv_vaadd_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vaadd_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vaadd_vv_i8m4(op1, op2, vl); + return __riscv_vaadd_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vaadd_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m4(op1, op2, vl); + return __riscv_vaadd_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vaadd_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vaadd_vv_i8m8(op1, op2, vl); + return __riscv_vaadd_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vaadd_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m8(op1, op2, vl); + return __riscv_vaadd_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vaadd_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vaadd_vv_i16mf4(op1, op2, vl); + return __riscv_vaadd_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vaadd_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf4(op1, op2, vl); + return __riscv_vaadd_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vaadd_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vaadd_vv_i16mf2(op1, op2, vl); + return __riscv_vaadd_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vaadd_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf2(op1, op2, vl); + return __riscv_vaadd_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vaadd_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vaadd_vv_i16m1(op1, op2, vl); + return __riscv_vaadd_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vaadd_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m1(op1, op2, vl); + return __riscv_vaadd_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vaadd_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vaadd_vv_i16m2(op1, op2, vl); + return __riscv_vaadd_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vaadd_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m2(op1, op2, vl); + return __riscv_vaadd_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vaadd_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vaadd_vv_i16m4(op1, op2, vl); + return __riscv_vaadd_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vaadd_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m4(op1, op2, vl); + return __riscv_vaadd_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vaadd_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vaadd_vv_i16m8(op1, op2, vl); + return __riscv_vaadd_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vaadd_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m8(op1, op2, vl); + return __riscv_vaadd_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vaadd_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vaadd_vv_i32mf2(op1, op2, vl); + return __riscv_vaadd_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vaadd_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32mf2(op1, op2, vl); + return __riscv_vaadd_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vaadd_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vaadd_vv_i32m1(op1, op2, vl); + return __riscv_vaadd_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vaadd_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m1(op1, op2, vl); + return __riscv_vaadd_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vaadd_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vaadd_vv_i32m2(op1, op2, vl); + return __riscv_vaadd_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vaadd_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m2(op1, op2, vl); + return __riscv_vaadd_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vaadd_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vaadd_vv_i32m4(op1, op2, vl); + return __riscv_vaadd_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vaadd_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m4(op1, op2, vl); + return __riscv_vaadd_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vaadd_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vaadd_vv_i32m8(op1, op2, vl); + return __riscv_vaadd_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vaadd_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m8(op1, op2, vl); + return __riscv_vaadd_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vaadd_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vaadd_vv_i64m1(op1, op2, vl); + return __riscv_vaadd_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vaadd_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m1(op1, op2, vl); + return __riscv_vaadd_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vaadd_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vaadd_vv_i64m2(op1, op2, vl); + return __riscv_vaadd_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vaadd_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m2(op1, op2, vl); + return __riscv_vaadd_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vaadd_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vaadd_vv_i64m4(op1, op2, vl); + return __riscv_vaadd_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vaadd_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m4(op1, op2, vl); + return __riscv_vaadd_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vaadd_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vaadd_vv_i64m8(op1, op2, vl); + return __riscv_vaadd_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vaadd_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m8(op1, op2, vl); + return __riscv_vaadd_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vaadd_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vaadd_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vaadd_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vaadd_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vaadd_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vaadd_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vaadd_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vaadd_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vaadd_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vaadd_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vaadd_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vaadd_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vaadd_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vaadd_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vaadd_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vaadd_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vaadd_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vaadd_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vaadd_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vaadd_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vaadd_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vaadd_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vaadd_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vaadd_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vaadd_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vaadd_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vaadd_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vaadd_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vaadd_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vaadd_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vaadd_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vaadd_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vaadd_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vaadd_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vaadd_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vaadd_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vaadd_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vaadd_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vaadd_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vaadd_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vaadd_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vaadd_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vaadd_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vaadd_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vaadd_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vaadd_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vaadd_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vaadd_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vaadd_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vaadd_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vaadd_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vaadd_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vaadd_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vaadd_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vaadd_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vaadd_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vaadd_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vaadd_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vaadd_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vaadd_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vaadd_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vaadd_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vaadd_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vaadd_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vaadd_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vaadd_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vaadd_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vaadd_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaaddu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaaddu.c index 618bc7bde5abff3f5ead54663e384f763ba73b0f..65ed52ca4ee2827ba3d64b62097e99699e447c34 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaaddu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vaaddu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vaaddu_vv_u8mf8(op1, op2, vl); + return __riscv_vaaddu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vaaddu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf8(op1, op2, vl); + return __riscv_vaaddu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vaaddu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vaaddu_vv_u8mf4(op1, op2, vl); + return __riscv_vaaddu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vaaddu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf4(op1, op2, vl); + return __riscv_vaaddu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vaaddu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vaaddu_vv_u8mf2(op1, op2, vl); + return __riscv_vaaddu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vaaddu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf2(op1, op2, vl); + return __riscv_vaaddu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vaaddu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vaaddu_vv_u8m1(op1, op2, vl); + return __riscv_vaaddu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vaaddu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m1(op1, op2, vl); + return __riscv_vaaddu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vaaddu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vaaddu_vv_u8m2(op1, op2, vl); + return __riscv_vaaddu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vaaddu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m2(op1, op2, vl); + return __riscv_vaaddu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vaaddu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vaaddu_vv_u8m4(op1, op2, vl); + return __riscv_vaaddu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vaaddu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m4(op1, op2, vl); + return __riscv_vaaddu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vaaddu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vaaddu_vv_u8m8(op1, op2, vl); + return __riscv_vaaddu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vaaddu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m8(op1, op2, vl); + return __riscv_vaaddu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vaaddu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vaaddu_vv_u16mf4(op1, op2, vl); + return __riscv_vaaddu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vaaddu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf4(op1, op2, vl); + return __riscv_vaaddu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vaaddu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vaaddu_vv_u16mf2(op1, op2, vl); + return __riscv_vaaddu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vaaddu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf2(op1, op2, vl); + return __riscv_vaaddu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vaaddu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vaaddu_vv_u16m1(op1, op2, vl); + return __riscv_vaaddu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vaaddu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m1(op1, op2, vl); + return __riscv_vaaddu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vaaddu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vaaddu_vv_u16m2(op1, op2, vl); + return __riscv_vaaddu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vaaddu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m2(op1, op2, vl); + return __riscv_vaaddu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vaaddu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vaaddu_vv_u16m4(op1, op2, vl); + return __riscv_vaaddu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vaaddu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m4(op1, op2, vl); + return __riscv_vaaddu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vaaddu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vaaddu_vv_u16m8(op1, op2, vl); + return __riscv_vaaddu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vaaddu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m8(op1, op2, vl); + return __riscv_vaaddu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vaaddu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vaaddu_vv_u32mf2(op1, op2, vl); + return __riscv_vaaddu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vaaddu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32mf2(op1, op2, vl); + return __riscv_vaaddu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vaaddu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vaaddu_vv_u32m1(op1, op2, vl); + return __riscv_vaaddu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vaaddu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m1(op1, op2, vl); + return __riscv_vaaddu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vaaddu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vaaddu_vv_u32m2(op1, op2, vl); + return __riscv_vaaddu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vaaddu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m2(op1, op2, vl); + return __riscv_vaaddu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vaaddu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vaaddu_vv_u32m4(op1, op2, vl); + return __riscv_vaaddu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vaaddu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m4(op1, op2, vl); + return __riscv_vaaddu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vaaddu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vaaddu_vv_u32m8(op1, op2, vl); + return __riscv_vaaddu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vaaddu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m8(op1, op2, vl); + return __riscv_vaaddu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vaaddu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vaaddu_vv_u64m1(op1, op2, vl); + return __riscv_vaaddu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vaaddu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m1(op1, op2, vl); + return __riscv_vaaddu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vaaddu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vaaddu_vv_u64m2(op1, op2, vl); + return __riscv_vaaddu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vaaddu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m2(op1, op2, vl); + return __riscv_vaaddu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vaaddu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vaaddu_vv_u64m4(op1, op2, vl); + return __riscv_vaaddu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vaaddu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m4(op1, op2, vl); + return __riscv_vaaddu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vaaddu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vaaddu_vv_u64m8(op1, op2, vl); + return __riscv_vaaddu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vaaddu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m8(op1, op2, vl); + return __riscv_vaaddu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vaaddu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vaaddu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vaaddu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vaaddu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vaaddu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vaaddu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vaaddu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vaaddu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vaaddu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vaaddu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vaaddu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vaaddu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vaaddu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vaaddu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vaaddu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vaaddu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vaaddu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vaaddu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vaaddu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vaaddu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vaaddu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vaaddu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vaaddu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vaaddu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vaaddu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vaaddu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vaaddu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vaaddu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vaaddu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vaaddu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vaaddu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vaaddu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vaaddu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vaaddu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vaaddu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vaaddu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vaaddu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vaaddu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vaaddu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vaaddu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vaaddu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vaaddu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vaaddu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vaaddu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vaaddu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vaaddu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vaaddu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vaaddu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vaaddu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vaaddu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vaaddu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vaaddu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vaaddu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vaaddu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vaaddu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vaaddu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vaaddu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vaaddu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vaaddu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vaaddu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vaaddu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vaaddu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vaaddu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vaaddu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vaaddu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vaaddu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vaaddu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vadc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vadc.c index 9422f43b425fb936d6bddfa795a7990b08429bc6..66f5eb6e4f6fc092b12155d3f3266a5dd8537a25 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vadc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vadc.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadc_vvm_i8mf8(vint8mf8_t op1, vint8mf8_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_i8mf8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8mf8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vadc_vvm_i8mf8(vint8mf8_t op1, vint8mf8_t op2, vbool64_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadc_vxm_i8mf8(vint8mf8_t op1, int8_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_i8mf8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8mf8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vadc_vxm_i8mf8(vint8mf8_t op1, int8_t op2, vbool64_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadc_vvm_i8mf4(vint8mf4_t op1, vint8mf4_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_i8mf4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8mf4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vadc_vvm_i8mf4(vint8mf4_t op1, vint8mf4_t op2, vbool32_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadc_vxm_i8mf4(vint8mf4_t op1, int8_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_i8mf4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8mf4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vadc_vxm_i8mf4(vint8mf4_t op1, int8_t op2, vbool32_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadc_vvm_i8mf2(vint8mf2_t op1, vint8mf2_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_i8mf2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vadc_vvm_i8mf2(vint8mf2_t op1, vint8mf2_t op2, vbool16_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadc_vxm_i8mf2(vint8mf2_t op1, int8_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_i8mf2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vadc_vxm_i8mf2(vint8mf2_t op1, int8_t op2, vbool16_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadc_vvm_i8m1(vint8m1_t op1, vint8m1_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_i8m1(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vadc_vvm_i8m1(vint8m1_t op1, vint8m1_t op2, vbool8_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadc_vxm_i8m1(vint8m1_t op1, int8_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_i8m1(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vadc_vxm_i8m1(vint8m1_t op1, int8_t op2, vbool8_t carryin, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadc_vvm_i8m2(vint8m2_t op1, vint8m2_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_i8m2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vadc_vvm_i8m2(vint8m2_t op1, vint8m2_t op2, vbool4_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadc_vxm_i8m2(vint8m2_t op1, int8_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_i8m2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vadc_vxm_i8m2(vint8m2_t op1, int8_t op2, vbool4_t carryin, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadc_vvm_i8m4(vint8m4_t op1, vint8m4_t op2, vbool2_t carryin, size_t vl) { - return vadc_vvm_i8m4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vadc_vvm_i8m4(vint8m4_t op1, vint8m4_t op2, vbool2_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadc_vxm_i8m4(vint8m4_t op1, int8_t op2, vbool2_t carryin, size_t vl) { - return vadc_vxm_i8m4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vadc_vxm_i8m4(vint8m4_t op1, int8_t op2, vbool2_t carryin, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadc_vvm_i8m8(vint8m8_t op1, vint8m8_t op2, vbool1_t carryin, size_t vl) { - return vadc_vvm_i8m8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vadc_vvm_i8m8(vint8m8_t op1, vint8m8_t op2, vbool1_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadc_vxm_i8m8(vint8m8_t op1, int8_t op2, vbool1_t carryin, size_t vl) { - return vadc_vxm_i8m8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vadc_vxm_i8m8(vint8m8_t op1, int8_t op2, vbool1_t carryin, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadc_vvm_i16mf4(vint16mf4_t op1, vint16mf4_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_i16mf4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16mf4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vadc_vvm_i16mf4(vint16mf4_t op1, vint16mf4_t op2, vbool64_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadc_vxm_i16mf4(vint16mf4_t op1, int16_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_i16mf4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16mf4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vadc_vxm_i16mf4(vint16mf4_t op1, int16_t op2, vbool64_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadc_vvm_i16mf2(vint16mf2_t op1, vint16mf2_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_i16mf2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vadc_vvm_i16mf2(vint16mf2_t op1, vint16mf2_t op2, vbool32_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadc_vxm_i16mf2(vint16mf2_t op1, int16_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_i16mf2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vadc_vxm_i16mf2(vint16mf2_t op1, int16_t op2, vbool32_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadc_vvm_i16m1(vint16m1_t op1, vint16m1_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_i16m1(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vadc_vvm_i16m1(vint16m1_t op1, vint16m1_t op2, vbool16_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadc_vxm_i16m1(vint16m1_t op1, int16_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_i16m1(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vadc_vxm_i16m1(vint16m1_t op1, int16_t op2, vbool16_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadc_vvm_i16m2(vint16m2_t op1, vint16m2_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_i16m2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vadc_vvm_i16m2(vint16m2_t op1, vint16m2_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadc_vxm_i16m2(vint16m2_t op1, int16_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_i16m2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vadc_vxm_i16m2(vint16m2_t op1, int16_t op2, vbool8_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadc_vvm_i16m4(vint16m4_t op1, vint16m4_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_i16m4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vadc_vvm_i16m4(vint16m4_t op1, vint16m4_t op2, vbool4_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadc_vxm_i16m4(vint16m4_t op1, int16_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_i16m4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vadc_vxm_i16m4(vint16m4_t op1, int16_t op2, vbool4_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadc_vvm_i16m8(vint16m8_t op1, vint16m8_t op2, vbool2_t carryin, size_t vl) { - return vadc_vvm_i16m8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vadc_vvm_i16m8(vint16m8_t op1, vint16m8_t op2, vbool2_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadc_vxm_i16m8(vint16m8_t op1, int16_t op2, vbool2_t carryin, size_t vl) { - return vadc_vxm_i16m8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vadc_vxm_i16m8(vint16m8_t op1, int16_t op2, vbool2_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadc_vvm_i32mf2(vint32mf2_t op1, vint32mf2_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_i32mf2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vadc_vvm_i32mf2(vint32mf2_t op1, vint32mf2_t op2, vbool64_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadc_vxm_i32mf2(vint32mf2_t op1, int32_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_i32mf2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vadc_vxm_i32mf2(vint32mf2_t op1, int32_t op2, vbool64_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadc_vvm_i32m1(vint32m1_t op1, vint32m1_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_i32m1(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vadc_vvm_i32m1(vint32m1_t op1, vint32m1_t op2, vbool32_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadc_vxm_i32m1(vint32m1_t op1, int32_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_i32m1(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vadc_vxm_i32m1(vint32m1_t op1, int32_t op2, vbool32_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadc_vvm_i32m2(vint32m2_t op1, vint32m2_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_i32m2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vadc_vvm_i32m2(vint32m2_t op1, vint32m2_t op2, vbool16_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadc_vxm_i32m2(vint32m2_t op1, int32_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_i32m2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vadc_vxm_i32m2(vint32m2_t op1, int32_t op2, vbool16_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadc_vvm_i32m4(vint32m4_t op1, vint32m4_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_i32m4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vadc_vvm_i32m4(vint32m4_t op1, vint32m4_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadc_vxm_i32m4(vint32m4_t op1, int32_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_i32m4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vadc_vxm_i32m4(vint32m4_t op1, int32_t op2, vbool8_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadc_vvm_i32m8(vint32m8_t op1, vint32m8_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_i32m8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vadc_vvm_i32m8(vint32m8_t op1, vint32m8_t op2, vbool4_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadc_vxm_i32m8(vint32m8_t op1, int32_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_i32m8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vadc_vxm_i32m8(vint32m8_t op1, int32_t op2, vbool4_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadc_vvm_i64m1(vint64m1_t op1, vint64m1_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_i64m1(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i64m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vadc_vvm_i64m1(vint64m1_t op1, vint64m1_t op2, vbool64_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadc_vxm_i64m1(vint64m1_t op1, int64_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_i64m1(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i64m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vadc_vxm_i64m1(vint64m1_t op1, int64_t op2, vbool64_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadc_vvm_i64m2(vint64m2_t op1, vint64m2_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_i64m2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i64m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vadc_vvm_i64m2(vint64m2_t op1, vint64m2_t op2, vbool32_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadc_vxm_i64m2(vint64m2_t op1, int64_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_i64m2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i64m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vadc_vxm_i64m2(vint64m2_t op1, int64_t op2, vbool32_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadc_vvm_i64m4(vint64m4_t op1, vint64m4_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_i64m4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i64m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vadc_vvm_i64m4(vint64m4_t op1, vint64m4_t op2, vbool16_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadc_vxm_i64m4(vint64m4_t op1, int64_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_i64m4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i64m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vadc_vxm_i64m4(vint64m4_t op1, int64_t op2, vbool16_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadc_vvm_i64m8(vint64m8_t op1, vint64m8_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_i64m8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_i64m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vadc_vvm_i64m8(vint64m8_t op1, vint64m8_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadc_vxm_i64m8(vint64m8_t op1, int64_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_i64m8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_i64m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vadc_vxm_i64m8(vint64m8_t op1, int64_t op2, vbool8_t carryin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadc_vvm_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_u8mf8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8mf8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vadc_vvm_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadc_vxm_u8mf8(vuint8mf8_t op1, uint8_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_u8mf8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8mf8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vadc_vxm_u8mf8(vuint8mf8_t op1, uint8_t op2, vbool64_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadc_vvm_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_u8mf4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8mf4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vadc_vvm_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadc_vxm_u8mf4(vuint8mf4_t op1, uint8_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_u8mf4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8mf4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vadc_vxm_u8mf4(vuint8mf4_t op1, uint8_t op2, vbool32_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadc_vvm_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_u8mf2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vadc_vvm_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadc_vxm_u8mf2(vuint8mf2_t op1, uint8_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_u8mf2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vadc_vxm_u8mf2(vuint8mf2_t op1, uint8_t op2, vbool16_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadc_vvm_u8m1(vuint8m1_t op1, vuint8m1_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_u8m1(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vadc_vvm_u8m1(vuint8m1_t op1, vuint8m1_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadc_vxm_u8m1(vuint8m1_t op1, uint8_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_u8m1(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vadc_vxm_u8m1(vuint8m1_t op1, uint8_t op2, vbool8_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadc_vvm_u8m2(vuint8m2_t op1, vuint8m2_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_u8m2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vadc_vvm_u8m2(vuint8m2_t op1, vuint8m2_t op2, vbool4_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadc_vxm_u8m2(vuint8m2_t op1, uint8_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_u8m2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vadc_vxm_u8m2(vuint8m2_t op1, uint8_t op2, vbool4_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadc_vvm_u8m4(vuint8m4_t op1, vuint8m4_t op2, vbool2_t carryin, size_t vl) { - return vadc_vvm_u8m4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vadc_vvm_u8m4(vuint8m4_t op1, vuint8m4_t op2, vbool2_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadc_vxm_u8m4(vuint8m4_t op1, uint8_t op2, vbool2_t carryin, size_t vl) { - return vadc_vxm_u8m4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vadc_vxm_u8m4(vuint8m4_t op1, uint8_t op2, vbool2_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadc_vvm_u8m8(vuint8m8_t op1, vuint8m8_t op2, vbool1_t carryin, size_t vl) { - return vadc_vvm_u8m8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vadc_vvm_u8m8(vuint8m8_t op1, vuint8m8_t op2, vbool1_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadc_vxm_u8m8(vuint8m8_t op1, uint8_t op2, vbool1_t carryin, size_t vl) { - return vadc_vxm_u8m8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vadc_vxm_u8m8(vuint8m8_t op1, uint8_t op2, vbool1_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadc_vvm_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_u16mf4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16mf4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vadc_vvm_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadc_vxm_u16mf4(vuint16mf4_t op1, uint16_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_u16mf4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16mf4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vadc_vxm_u16mf4(vuint16mf4_t op1, uint16_t op2, vbool64_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadc_vvm_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_u16mf2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vadc_vvm_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadc_vxm_u16mf2(vuint16mf2_t op1, uint16_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_u16mf2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vadc_vxm_u16mf2(vuint16mf2_t op1, uint16_t op2, vbool32_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadc_vvm_u16m1(vuint16m1_t op1, vuint16m1_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_u16m1(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vadc_vvm_u16m1(vuint16m1_t op1, vuint16m1_t op2, vbool16_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadc_vxm_u16m1(vuint16m1_t op1, uint16_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_u16m1(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vadc_vxm_u16m1(vuint16m1_t op1, uint16_t op2, vbool16_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadc_vvm_u16m2(vuint16m2_t op1, vuint16m2_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_u16m2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vadc_vvm_u16m2(vuint16m2_t op1, vuint16m2_t op2, vbool8_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadc_vxm_u16m2(vuint16m2_t op1, uint16_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_u16m2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vadc_vxm_u16m2(vuint16m2_t op1, uint16_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadc_vvm_u16m4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_u16m4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vadc_vvm_u16m4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadc_vxm_u16m4(vuint16m4_t op1, uint16_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_u16m4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vadc_vxm_u16m4(vuint16m4_t op1, uint16_t op2, vbool4_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadc_vvm_u16m8(vuint16m8_t op1, vuint16m8_t op2, vbool2_t carryin, size_t vl) { - return vadc_vvm_u16m8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vadc_vvm_u16m8(vuint16m8_t op1, vuint16m8_t op2, vbool2_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadc_vxm_u16m8(vuint16m8_t op1, uint16_t op2, vbool2_t carryin, size_t vl) { - return vadc_vxm_u16m8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vadc_vxm_u16m8(vuint16m8_t op1, uint16_t op2, vbool2_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadc_vvm_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_u32mf2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vadc_vvm_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadc_vxm_u32mf2(vuint32mf2_t op1, uint32_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_u32mf2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32mf2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vadc_vxm_u32mf2(vuint32mf2_t op1, uint32_t op2, vbool64_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadc_vvm_u32m1(vuint32m1_t op1, vuint32m1_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_u32m1(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vadc_vvm_u32m1(vuint32m1_t op1, vuint32m1_t op2, vbool32_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadc_vxm_u32m1(vuint32m1_t op1, uint32_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_u32m1(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vadc_vxm_u32m1(vuint32m1_t op1, uint32_t op2, vbool32_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadc_vvm_u32m2(vuint32m2_t op1, vuint32m2_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_u32m2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vadc_vvm_u32m2(vuint32m2_t op1, vuint32m2_t op2, vbool16_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadc_vxm_u32m2(vuint32m2_t op1, uint32_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_u32m2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vadc_vxm_u32m2(vuint32m2_t op1, uint32_t op2, vbool16_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadc_vvm_u32m4(vuint32m4_t op1, vuint32m4_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_u32m4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vadc_vvm_u32m4(vuint32m4_t op1, vuint32m4_t op2, vbool8_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadc_vxm_u32m4(vuint32m4_t op1, uint32_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_u32m4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vadc_vxm_u32m4(vuint32m4_t op1, uint32_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadc_vvm_u32m8(vuint32m8_t op1, vuint32m8_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_u32m8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vadc_vvm_u32m8(vuint32m8_t op1, vuint32m8_t op2, vbool4_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadc_vxm_u32m8(vuint32m8_t op1, uint32_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_u32m8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vadc_vxm_u32m8(vuint32m8_t op1, uint32_t op2, vbool4_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadc_vvm_u64m1(vuint64m1_t op1, vuint64m1_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_u64m1(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u64m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vadc_vvm_u64m1(vuint64m1_t op1, vuint64m1_t op2, vbool64_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadc_vxm_u64m1(vuint64m1_t op1, uint64_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_u64m1(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u64m1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vadc_vxm_u64m1(vuint64m1_t op1, uint64_t op2, vbool64_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadc_vvm_u64m2(vuint64m2_t op1, vuint64m2_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_u64m2(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u64m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vadc_vvm_u64m2(vuint64m2_t op1, vuint64m2_t op2, vbool32_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadc_vxm_u64m2(vuint64m2_t op1, uint64_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_u64m2(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u64m2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vadc_vxm_u64m2(vuint64m2_t op1, uint64_t op2, vbool32_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadc_vvm_u64m4(vuint64m4_t op1, vuint64m4_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_u64m4(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u64m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vadc_vvm_u64m4(vuint64m4_t op1, vuint64m4_t op2, vbool16_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadc_vxm_u64m4(vuint64m4_t op1, uint64_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_u64m4(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u64m4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vadc_vxm_u64m4(vuint64m4_t op1, uint64_t op2, vbool16_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadc_vvm_u64m8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_u64m8(op1, op2, carryin, vl); + return __riscv_vadc_vvm_u64m8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u64m8( @@ -795,6 +795,6 @@ vuint64m8_t test_vadc_vvm_u64m8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadc_vxm_u64m8(vuint64m8_t op1, uint64_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_u64m8(op1, op2, carryin, vl); + return __riscv_vadc_vxm_u64m8(op1, op2, carryin, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vadd.c index c0640594c485523b8ab3ce17711a14ef6bae66cd..0085b21aee126e0d3c9ebece8d8caa0c4c973d7f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vadd.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vadd_vv_i8mf8(op1, op2, vl); + return __riscv_vadd_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vadd_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf8(op1, op2, vl); + return __riscv_vadd_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vadd_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vadd_vv_i8mf4(op1, op2, vl); + return __riscv_vadd_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vadd_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf4(op1, op2, vl); + return __riscv_vadd_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vadd_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vadd_vv_i8mf2(op1, op2, vl); + return __riscv_vadd_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vadd_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf2(op1, op2, vl); + return __riscv_vadd_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vadd_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vadd_vv_i8m1(op1, op2, vl); + return __riscv_vadd_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vadd_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m1(op1, op2, vl); + return __riscv_vadd_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vadd_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vadd_vv_i8m2(op1, op2, vl); + return __riscv_vadd_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vadd_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m2(op1, op2, vl); + return __riscv_vadd_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vadd_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vadd_vv_i8m4(op1, op2, vl); + return __riscv_vadd_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vadd_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m4(op1, op2, vl); + return __riscv_vadd_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vadd_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vadd_vv_i8m8(op1, op2, vl); + return __riscv_vadd_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vadd_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m8(op1, op2, vl); + return __riscv_vadd_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vadd_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vadd_vv_i16mf4(op1, op2, vl); + return __riscv_vadd_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vadd_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf4(op1, op2, vl); + return __riscv_vadd_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vadd_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vadd_vv_i16mf2(op1, op2, vl); + return __riscv_vadd_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vadd_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf2(op1, op2, vl); + return __riscv_vadd_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vadd_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vadd_vv_i16m1(op1, op2, vl); + return __riscv_vadd_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vadd_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m1(op1, op2, vl); + return __riscv_vadd_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vadd_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vadd_vv_i16m2(op1, op2, vl); + return __riscv_vadd_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vadd_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m2(op1, op2, vl); + return __riscv_vadd_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vadd_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vadd_vv_i16m4(op1, op2, vl); + return __riscv_vadd_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vadd_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m4(op1, op2, vl); + return __riscv_vadd_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vadd_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vadd_vv_i16m8(op1, op2, vl); + return __riscv_vadd_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vadd_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m8(op1, op2, vl); + return __riscv_vadd_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vadd_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vadd_vv_i32mf2(op1, op2, vl); + return __riscv_vadd_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vadd_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32mf2(op1, op2, vl); + return __riscv_vadd_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vadd_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vadd_vv_i32m1(op1, op2, vl); + return __riscv_vadd_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vadd_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m1(op1, op2, vl); + return __riscv_vadd_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vadd_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vadd_vv_i32m2(op1, op2, vl); + return __riscv_vadd_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vadd_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m2(op1, op2, vl); + return __riscv_vadd_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vadd_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vadd_vv_i32m4(op1, op2, vl); + return __riscv_vadd_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vadd_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m4(op1, op2, vl); + return __riscv_vadd_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vadd_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vadd_vv_i32m8(op1, op2, vl); + return __riscv_vadd_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vadd_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m8(op1, op2, vl); + return __riscv_vadd_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vadd_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vadd_vv_i64m1(op1, op2, vl); + return __riscv_vadd_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vadd_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m1(op1, op2, vl); + return __riscv_vadd_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vadd_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vadd_vv_i64m2(op1, op2, vl); + return __riscv_vadd_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vadd_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m2(op1, op2, vl); + return __riscv_vadd_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vadd_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vadd_vv_i64m4(op1, op2, vl); + return __riscv_vadd_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vadd_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m4(op1, op2, vl); + return __riscv_vadd_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vadd_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vadd_vv_i64m8(op1, op2, vl); + return __riscv_vadd_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vadd_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m8(op1, op2, vl); + return __riscv_vadd_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vadd_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vadd_vv_u8mf8(op1, op2, vl); + return __riscv_vadd_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vadd_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf8(op1, op2, vl); + return __riscv_vadd_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vadd_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vadd_vv_u8mf4(op1, op2, vl); + return __riscv_vadd_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vadd_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf4(op1, op2, vl); + return __riscv_vadd_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vadd_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vadd_vv_u8mf2(op1, op2, vl); + return __riscv_vadd_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vadd_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf2(op1, op2, vl); + return __riscv_vadd_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vadd_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vadd_vv_u8m1(op1, op2, vl); + return __riscv_vadd_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vadd_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m1(op1, op2, vl); + return __riscv_vadd_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vadd_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vadd_vv_u8m2(op1, op2, vl); + return __riscv_vadd_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vadd_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m2(op1, op2, vl); + return __riscv_vadd_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vadd_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vadd_vv_u8m4(op1, op2, vl); + return __riscv_vadd_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vadd_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m4(op1, op2, vl); + return __riscv_vadd_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vadd_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vadd_vv_u8m8(op1, op2, vl); + return __riscv_vadd_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vadd_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m8(op1, op2, vl); + return __riscv_vadd_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vadd_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vadd_vv_u16mf4(op1, op2, vl); + return __riscv_vadd_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vadd_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf4(op1, op2, vl); + return __riscv_vadd_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vadd_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vadd_vv_u16mf2(op1, op2, vl); + return __riscv_vadd_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vadd_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf2(op1, op2, vl); + return __riscv_vadd_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vadd_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vadd_vv_u16m1(op1, op2, vl); + return __riscv_vadd_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vadd_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m1(op1, op2, vl); + return __riscv_vadd_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vadd_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vadd_vv_u16m2(op1, op2, vl); + return __riscv_vadd_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vadd_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m2(op1, op2, vl); + return __riscv_vadd_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vadd_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vadd_vv_u16m4(op1, op2, vl); + return __riscv_vadd_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vadd_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m4(op1, op2, vl); + return __riscv_vadd_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vadd_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vadd_vv_u16m8(op1, op2, vl); + return __riscv_vadd_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vadd_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m8(op1, op2, vl); + return __riscv_vadd_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vadd_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vadd_vv_u32mf2(op1, op2, vl); + return __riscv_vadd_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vadd_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32mf2(op1, op2, vl); + return __riscv_vadd_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vadd_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vadd_vv_u32m1(op1, op2, vl); + return __riscv_vadd_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vadd_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m1(op1, op2, vl); + return __riscv_vadd_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vadd_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vadd_vv_u32m2(op1, op2, vl); + return __riscv_vadd_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vadd_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m2(op1, op2, vl); + return __riscv_vadd_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vadd_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vadd_vv_u32m4(op1, op2, vl); + return __riscv_vadd_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vadd_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m4(op1, op2, vl); + return __riscv_vadd_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vadd_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vadd_vv_u32m8(op1, op2, vl); + return __riscv_vadd_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vadd_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m8(op1, op2, vl); + return __riscv_vadd_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vadd_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vadd_vv_u64m1(op1, op2, vl); + return __riscv_vadd_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vadd_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m1(op1, op2, vl); + return __riscv_vadd_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vadd_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vadd_vv_u64m2(op1, op2, vl); + return __riscv_vadd_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vadd_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m2(op1, op2, vl); + return __riscv_vadd_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vadd_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vadd_vv_u64m4(op1, op2, vl); + return __riscv_vadd_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vadd_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m4(op1, op2, vl); + return __riscv_vadd_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vadd_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vadd_vv_u64m8(op1, op2, vl); + return __riscv_vadd_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m8( @@ -795,7 +795,7 @@ vuint64m8_t test_vadd_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m8(op1, op2, vl); + return __riscv_vadd_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf8_m( @@ -804,7 +804,7 @@ vuint64m8_t test_vadd_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vadd_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf8_m( @@ -813,7 +813,7 @@ vint8mf8_t test_vadd_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf4_m( @@ -822,7 +822,7 @@ vint8mf8_t test_vadd_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vadd_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf4_m( @@ -831,7 +831,7 @@ vint8mf4_t test_vadd_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf2_m( @@ -840,7 +840,7 @@ vint8mf4_t test_vadd_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vadd_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf2_m( @@ -849,7 +849,7 @@ vint8mf2_t test_vadd_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m1_m( @@ -858,7 +858,7 @@ vint8mf2_t test_vadd_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vadd_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m1_m( @@ -867,7 +867,7 @@ vint8m1_t test_vadd_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m2_m( @@ -876,7 +876,7 @@ vint8m1_t test_vadd_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vadd_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m2_m( @@ -885,7 +885,7 @@ vint8m2_t test_vadd_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m4_m( @@ -894,7 +894,7 @@ vint8m2_t test_vadd_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vadd_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m4_m( @@ -903,7 +903,7 @@ vint8m4_t test_vadd_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m8_m( @@ -912,7 +912,7 @@ vint8m4_t test_vadd_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vadd_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m8_m( @@ -921,7 +921,7 @@ vint8m8_t test_vadd_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf4_m( @@ -930,7 +930,7 @@ vint8m8_t test_vadd_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vadd_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf4_m( @@ -939,7 +939,7 @@ vint16mf4_t test_vadd_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf2_m( @@ -948,7 +948,7 @@ vint16mf4_t test_vadd_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vadd_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf2_m( @@ -957,7 +957,7 @@ vint16mf2_t test_vadd_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m1_m( @@ -966,7 +966,7 @@ vint16mf2_t test_vadd_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vadd_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m1_m( @@ -975,7 +975,7 @@ vint16m1_t test_vadd_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m2_m( @@ -984,7 +984,7 @@ vint16m1_t test_vadd_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vadd_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m2_m( @@ -993,7 +993,7 @@ vint16m2_t test_vadd_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m4_m( @@ -1002,7 +1002,7 @@ vint16m2_t test_vadd_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vadd_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m4_m( @@ -1011,7 +1011,7 @@ vint16m4_t test_vadd_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m8_m( @@ -1020,7 +1020,7 @@ vint16m4_t test_vadd_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vadd_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m8_m( @@ -1029,7 +1029,7 @@ vint16m8_t test_vadd_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32mf2_m( @@ -1038,7 +1038,7 @@ vint16m8_t test_vadd_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vadd_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32mf2_m( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vadd_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m1_m( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vadd_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vadd_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m1_m( @@ -1065,7 +1065,7 @@ vint32m1_t test_vadd_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m2_m( @@ -1074,7 +1074,7 @@ vint32m1_t test_vadd_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vadd_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m2_m( @@ -1083,7 +1083,7 @@ vint32m2_t test_vadd_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m4_m( @@ -1092,7 +1092,7 @@ vint32m2_t test_vadd_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vadd_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m4_m( @@ -1101,7 +1101,7 @@ vint32m4_t test_vadd_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m8_m( @@ -1110,7 +1110,7 @@ vint32m4_t test_vadd_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vadd_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m8_m( @@ -1119,7 +1119,7 @@ vint32m8_t test_vadd_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m1_m( @@ -1128,7 +1128,7 @@ vint32m8_t test_vadd_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vadd_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m1_m( @@ -1137,7 +1137,7 @@ vint64m1_t test_vadd_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m2_m( @@ -1146,7 +1146,7 @@ vint64m1_t test_vadd_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vadd_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m2_m( @@ -1155,7 +1155,7 @@ vint64m2_t test_vadd_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m4_m( @@ -1164,7 +1164,7 @@ vint64m2_t test_vadd_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vadd_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m4_m( @@ -1173,7 +1173,7 @@ vint64m4_t test_vadd_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m8_m( @@ -1182,7 +1182,7 @@ vint64m4_t test_vadd_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vadd_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m8_m( @@ -1191,7 +1191,7 @@ vint64m8_t test_vadd_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf8_m( @@ -1200,7 +1200,7 @@ vint64m8_t test_vadd_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vadd_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf8_m( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vadd_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf4_m( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vadd_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vadd_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf4_m( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vadd_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf2_m( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vadd_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vadd_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf2_m( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vadd_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m1_m( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vadd_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vadd_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m1_m( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vadd_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m2_m( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vadd_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vadd_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m2_m( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vadd_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m4_m( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vadd_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vadd_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m4_m( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vadd_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m8_m( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vadd_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vadd_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m8_m( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vadd_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf4_m( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vadd_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vadd_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf4_m( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vadd_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf2_m( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vadd_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vadd_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf2_m( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vadd_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m1_m( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vadd_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vadd_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m1_m( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vadd_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m2_m( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vadd_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vadd_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m2_m( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vadd_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m4_m( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vadd_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vadd_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m4_m( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vadd_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m8_m( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vadd_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vadd_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m8_m( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vadd_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32mf2_m( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vadd_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vadd_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32mf2_m( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vadd_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m1_m( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vadd_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vadd_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m1_m( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vadd_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m2_m( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vadd_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vadd_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m2_m( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vadd_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m4_m( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vadd_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vadd_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m4_m( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vadd_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m8_m( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vadd_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vadd_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m8_m( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vadd_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m1_m( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vadd_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vadd_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m1_m( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vadd_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m2_m( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vadd_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vadd_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m2_m( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vadd_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m4_m( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vadd_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vadd_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m4_m( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vadd_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m8_m( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vadd_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vadd_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vadd_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m8_m( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vadd_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vadd_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vand.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vand.c index 88f0ddef6d16fed1bee90cd41d33c70fde08ff2a..8ca368819414bce0bca6478827ce75a4d1d3e870 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vand.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vand.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vand_vv_i8mf8(op1, op2, vl); + return __riscv_vand_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vand_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf8(op1, op2, vl); + return __riscv_vand_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vand_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vand_vv_i8mf4(op1, op2, vl); + return __riscv_vand_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vand_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf4(op1, op2, vl); + return __riscv_vand_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vand_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vand_vv_i8mf2(op1, op2, vl); + return __riscv_vand_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vand_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf2(op1, op2, vl); + return __riscv_vand_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vand_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vand_vv_i8m1(op1, op2, vl); + return __riscv_vand_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vand_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m1(op1, op2, vl); + return __riscv_vand_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vand_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vand_vv_i8m2(op1, op2, vl); + return __riscv_vand_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vand_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m2(op1, op2, vl); + return __riscv_vand_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vand_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vand_vv_i8m4(op1, op2, vl); + return __riscv_vand_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vand_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m4(op1, op2, vl); + return __riscv_vand_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vand_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vand_vv_i8m8(op1, op2, vl); + return __riscv_vand_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vand_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m8(op1, op2, vl); + return __riscv_vand_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vand_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vand_vv_i16mf4(op1, op2, vl); + return __riscv_vand_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vand_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf4(op1, op2, vl); + return __riscv_vand_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vand_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vand_vv_i16mf2(op1, op2, vl); + return __riscv_vand_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vand_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf2(op1, op2, vl); + return __riscv_vand_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vand_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vand_vv_i16m1(op1, op2, vl); + return __riscv_vand_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vand_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m1(op1, op2, vl); + return __riscv_vand_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vand_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vand_vv_i16m2(op1, op2, vl); + return __riscv_vand_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vand_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m2(op1, op2, vl); + return __riscv_vand_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vand_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vand_vv_i16m4(op1, op2, vl); + return __riscv_vand_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vand_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m4(op1, op2, vl); + return __riscv_vand_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vand_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vand_vv_i16m8(op1, op2, vl); + return __riscv_vand_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vand_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m8(op1, op2, vl); + return __riscv_vand_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vand_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vand_vv_i32mf2(op1, op2, vl); + return __riscv_vand_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vand_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32mf2(op1, op2, vl); + return __riscv_vand_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vand_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vand_vv_i32m1(op1, op2, vl); + return __riscv_vand_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vand_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m1(op1, op2, vl); + return __riscv_vand_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vand_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vand_vv_i32m2(op1, op2, vl); + return __riscv_vand_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vand_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m2(op1, op2, vl); + return __riscv_vand_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vand_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vand_vv_i32m4(op1, op2, vl); + return __riscv_vand_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vand_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m4(op1, op2, vl); + return __riscv_vand_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vand_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vand_vv_i32m8(op1, op2, vl); + return __riscv_vand_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vand_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m8(op1, op2, vl); + return __riscv_vand_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vand_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vand_vv_i64m1(op1, op2, vl); + return __riscv_vand_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vand_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m1(op1, op2, vl); + return __riscv_vand_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vand_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vand_vv_i64m2(op1, op2, vl); + return __riscv_vand_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vand_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m2(op1, op2, vl); + return __riscv_vand_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vand_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vand_vv_i64m4(op1, op2, vl); + return __riscv_vand_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vand_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m4(op1, op2, vl); + return __riscv_vand_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vand_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vand_vv_i64m8(op1, op2, vl); + return __riscv_vand_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vand_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m8(op1, op2, vl); + return __riscv_vand_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vand_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vand_vv_u8mf8(op1, op2, vl); + return __riscv_vand_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vand_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf8(op1, op2, vl); + return __riscv_vand_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vand_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vand_vv_u8mf4(op1, op2, vl); + return __riscv_vand_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vand_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf4(op1, op2, vl); + return __riscv_vand_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vand_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vand_vv_u8mf2(op1, op2, vl); + return __riscv_vand_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vand_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf2(op1, op2, vl); + return __riscv_vand_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vand_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vand_vv_u8m1(op1, op2, vl); + return __riscv_vand_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vand_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m1(op1, op2, vl); + return __riscv_vand_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vand_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vand_vv_u8m2(op1, op2, vl); + return __riscv_vand_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vand_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m2(op1, op2, vl); + return __riscv_vand_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vand_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vand_vv_u8m4(op1, op2, vl); + return __riscv_vand_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vand_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m4(op1, op2, vl); + return __riscv_vand_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vand_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vand_vv_u8m8(op1, op2, vl); + return __riscv_vand_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vand_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m8(op1, op2, vl); + return __riscv_vand_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vand_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vand_vv_u16mf4(op1, op2, vl); + return __riscv_vand_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vand_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf4(op1, op2, vl); + return __riscv_vand_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vand_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vand_vv_u16mf2(op1, op2, vl); + return __riscv_vand_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vand_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf2(op1, op2, vl); + return __riscv_vand_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vand_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vand_vv_u16m1(op1, op2, vl); + return __riscv_vand_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vand_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m1(op1, op2, vl); + return __riscv_vand_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vand_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vand_vv_u16m2(op1, op2, vl); + return __riscv_vand_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vand_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m2(op1, op2, vl); + return __riscv_vand_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vand_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vand_vv_u16m4(op1, op2, vl); + return __riscv_vand_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vand_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m4(op1, op2, vl); + return __riscv_vand_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vand_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vand_vv_u16m8(op1, op2, vl); + return __riscv_vand_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vand_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m8(op1, op2, vl); + return __riscv_vand_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vand_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vand_vv_u32mf2(op1, op2, vl); + return __riscv_vand_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vand_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32mf2(op1, op2, vl); + return __riscv_vand_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vand_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vand_vv_u32m1(op1, op2, vl); + return __riscv_vand_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vand_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m1(op1, op2, vl); + return __riscv_vand_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vand_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vand_vv_u32m2(op1, op2, vl); + return __riscv_vand_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vand_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m2(op1, op2, vl); + return __riscv_vand_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vand_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vand_vv_u32m4(op1, op2, vl); + return __riscv_vand_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vand_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m4(op1, op2, vl); + return __riscv_vand_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vand_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vand_vv_u32m8(op1, op2, vl); + return __riscv_vand_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vand_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m8(op1, op2, vl); + return __riscv_vand_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vand_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vand_vv_u64m1(op1, op2, vl); + return __riscv_vand_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vand_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m1(op1, op2, vl); + return __riscv_vand_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vand_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vand_vv_u64m2(op1, op2, vl); + return __riscv_vand_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vand_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m2(op1, op2, vl); + return __riscv_vand_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vand_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vand_vv_u64m4(op1, op2, vl); + return __riscv_vand_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vand_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m4(op1, op2, vl); + return __riscv_vand_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vand_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vand_vv_u64m8(op1, op2, vl); + return __riscv_vand_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m8( @@ -795,7 +795,7 @@ vuint64m8_t test_vand_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m8(op1, op2, vl); + return __riscv_vand_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf8_m( @@ -804,7 +804,7 @@ vuint64m8_t test_vand_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vand_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vand_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf8_m( @@ -813,7 +813,7 @@ vint8mf8_t test_vand_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vand_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf4_m( @@ -822,7 +822,7 @@ vint8mf8_t test_vand_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vand_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vand_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf4_m( @@ -831,7 +831,7 @@ vint8mf4_t test_vand_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vand_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf2_m( @@ -840,7 +840,7 @@ vint8mf4_t test_vand_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vand_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vand_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf2_m( @@ -849,7 +849,7 @@ vint8mf2_t test_vand_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vand_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m1_m( @@ -858,7 +858,7 @@ vint8mf2_t test_vand_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vand_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vand_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m1_m( @@ -867,7 +867,7 @@ vint8m1_t test_vand_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vand_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m2_m( @@ -876,7 +876,7 @@ vint8m1_t test_vand_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vand_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vand_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m2_m( @@ -885,7 +885,7 @@ vint8m2_t test_vand_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vand_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m4_m( @@ -894,7 +894,7 @@ vint8m2_t test_vand_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vand_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vand_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m4_m( @@ -903,7 +903,7 @@ vint8m4_t test_vand_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vand_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m8_m( @@ -912,7 +912,7 @@ vint8m4_t test_vand_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vand_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vand_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m8_m( @@ -921,7 +921,7 @@ vint8m8_t test_vand_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vand_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf4_m( @@ -930,7 +930,7 @@ vint8m8_t test_vand_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vand_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vand_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf4_m( @@ -939,7 +939,7 @@ vint16mf4_t test_vand_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vand_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf2_m( @@ -948,7 +948,7 @@ vint16mf4_t test_vand_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vand_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vand_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf2_m( @@ -957,7 +957,7 @@ vint16mf2_t test_vand_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vand_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m1_m( @@ -966,7 +966,7 @@ vint16mf2_t test_vand_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vand_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vand_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m1_m( @@ -975,7 +975,7 @@ vint16m1_t test_vand_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vand_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m2_m( @@ -984,7 +984,7 @@ vint16m1_t test_vand_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vand_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vand_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m2_m( @@ -993,7 +993,7 @@ vint16m2_t test_vand_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vand_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m4_m( @@ -1002,7 +1002,7 @@ vint16m2_t test_vand_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vand_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vand_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m4_m( @@ -1011,7 +1011,7 @@ vint16m4_t test_vand_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vand_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m8_m( @@ -1020,7 +1020,7 @@ vint16m4_t test_vand_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vand_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vand_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m8_m( @@ -1029,7 +1029,7 @@ vint16m8_t test_vand_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vand_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32mf2_m( @@ -1038,7 +1038,7 @@ vint16m8_t test_vand_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vand_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vand_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32mf2_m( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vand_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vand_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m1_m( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vand_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vand_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vand_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m1_m( @@ -1065,7 +1065,7 @@ vint32m1_t test_vand_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vand_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m2_m( @@ -1074,7 +1074,7 @@ vint32m1_t test_vand_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vand_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vand_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m2_m( @@ -1083,7 +1083,7 @@ vint32m2_t test_vand_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vand_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m4_m( @@ -1092,7 +1092,7 @@ vint32m2_t test_vand_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vand_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vand_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m4_m( @@ -1101,7 +1101,7 @@ vint32m4_t test_vand_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vand_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m8_m( @@ -1110,7 +1110,7 @@ vint32m4_t test_vand_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vand_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vand_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m8_m( @@ -1119,7 +1119,7 @@ vint32m8_t test_vand_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vand_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m1_m( @@ -1128,7 +1128,7 @@ vint32m8_t test_vand_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vand_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vand_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m1_m( @@ -1137,7 +1137,7 @@ vint64m1_t test_vand_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vand_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m2_m( @@ -1146,7 +1146,7 @@ vint64m1_t test_vand_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vand_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vand_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m2_m( @@ -1155,7 +1155,7 @@ vint64m2_t test_vand_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vand_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m4_m( @@ -1164,7 +1164,7 @@ vint64m2_t test_vand_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vand_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vand_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m4_m( @@ -1173,7 +1173,7 @@ vint64m4_t test_vand_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vand_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m8_m( @@ -1182,7 +1182,7 @@ vint64m4_t test_vand_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vand_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vand_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m8_m( @@ -1191,7 +1191,7 @@ vint64m8_t test_vand_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vand_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf8_m( @@ -1200,7 +1200,7 @@ vint64m8_t test_vand_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vand_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vand_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf8_m( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vand_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vand_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf4_m( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vand_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vand_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vand_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf4_m( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vand_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vand_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf2_m( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vand_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vand_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vand_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf2_m( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vand_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vand_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m1_m( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vand_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vand_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vand_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m1_m( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vand_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vand_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m2_m( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vand_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vand_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vand_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m2_m( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vand_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vand_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m4_m( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vand_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vand_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vand_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m4_m( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vand_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vand_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m8_m( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vand_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vand_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vand_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m8_m( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vand_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vand_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf4_m( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vand_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vand_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vand_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf4_m( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vand_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vand_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf2_m( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vand_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vand_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vand_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf2_m( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vand_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vand_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m1_m( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vand_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vand_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vand_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m1_m( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vand_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vand_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m2_m( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vand_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vand_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vand_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m2_m( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vand_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vand_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m4_m( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vand_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vand_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vand_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m4_m( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vand_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vand_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m8_m( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vand_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vand_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vand_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m8_m( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vand_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vand_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32mf2_m( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vand_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vand_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vand_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32mf2_m( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vand_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vand_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m1_m( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vand_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vand_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vand_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m1_m( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vand_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vand_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m2_m( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vand_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vand_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vand_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m2_m( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vand_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vand_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m4_m( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vand_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vand_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vand_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m4_m( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vand_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vand_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m8_m( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vand_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vand_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vand_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m8_m( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vand_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vand_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m1_m( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vand_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vand_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vand_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m1_m( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vand_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vand_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m2_m( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vand_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vand_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vand_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m2_m( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vand_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vand_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m4_m( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vand_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vand_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vand_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m4_m( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vand_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vand_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m8_m( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vand_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vand_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vand_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m8_m( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vand_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vand_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vasub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vasub.c index 767892167df94936156f5e0f7f8fac1b38414441..0c4af21305fd449cf583af54d003719ce777681d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vasub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vasub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vasub_vv_i8mf8(op1, op2, vl); + return __riscv_vasub_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vasub_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf8(op1, op2, vl); + return __riscv_vasub_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vasub_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vasub_vv_i8mf4(op1, op2, vl); + return __riscv_vasub_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vasub_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf4(op1, op2, vl); + return __riscv_vasub_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vasub_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vasub_vv_i8mf2(op1, op2, vl); + return __riscv_vasub_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vasub_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf2(op1, op2, vl); + return __riscv_vasub_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vasub_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vasub_vv_i8m1(op1, op2, vl); + return __riscv_vasub_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vasub_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m1(op1, op2, vl); + return __riscv_vasub_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vasub_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vasub_vv_i8m2(op1, op2, vl); + return __riscv_vasub_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vasub_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m2(op1, op2, vl); + return __riscv_vasub_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vasub_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vasub_vv_i8m4(op1, op2, vl); + return __riscv_vasub_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vasub_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m4(op1, op2, vl); + return __riscv_vasub_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vasub_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vasub_vv_i8m8(op1, op2, vl); + return __riscv_vasub_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vasub_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m8(op1, op2, vl); + return __riscv_vasub_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vasub_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vasub_vv_i16mf4(op1, op2, vl); + return __riscv_vasub_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vasub_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf4(op1, op2, vl); + return __riscv_vasub_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vasub_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vasub_vv_i16mf2(op1, op2, vl); + return __riscv_vasub_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vasub_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf2(op1, op2, vl); + return __riscv_vasub_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vasub_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vasub_vv_i16m1(op1, op2, vl); + return __riscv_vasub_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vasub_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m1(op1, op2, vl); + return __riscv_vasub_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vasub_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vasub_vv_i16m2(op1, op2, vl); + return __riscv_vasub_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vasub_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m2(op1, op2, vl); + return __riscv_vasub_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vasub_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vasub_vv_i16m4(op1, op2, vl); + return __riscv_vasub_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vasub_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m4(op1, op2, vl); + return __riscv_vasub_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vasub_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vasub_vv_i16m8(op1, op2, vl); + return __riscv_vasub_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vasub_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m8(op1, op2, vl); + return __riscv_vasub_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vasub_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vasub_vv_i32mf2(op1, op2, vl); + return __riscv_vasub_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vasub_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32mf2(op1, op2, vl); + return __riscv_vasub_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vasub_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vasub_vv_i32m1(op1, op2, vl); + return __riscv_vasub_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vasub_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m1(op1, op2, vl); + return __riscv_vasub_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vasub_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vasub_vv_i32m2(op1, op2, vl); + return __riscv_vasub_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vasub_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m2(op1, op2, vl); + return __riscv_vasub_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vasub_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vasub_vv_i32m4(op1, op2, vl); + return __riscv_vasub_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vasub_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m4(op1, op2, vl); + return __riscv_vasub_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vasub_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vasub_vv_i32m8(op1, op2, vl); + return __riscv_vasub_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vasub_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m8(op1, op2, vl); + return __riscv_vasub_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vasub_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vasub_vv_i64m1(op1, op2, vl); + return __riscv_vasub_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vasub_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m1(op1, op2, vl); + return __riscv_vasub_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vasub_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vasub_vv_i64m2(op1, op2, vl); + return __riscv_vasub_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vasub_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m2(op1, op2, vl); + return __riscv_vasub_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vasub_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vasub_vv_i64m4(op1, op2, vl); + return __riscv_vasub_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vasub_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m4(op1, op2, vl); + return __riscv_vasub_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vasub_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vasub_vv_i64m8(op1, op2, vl); + return __riscv_vasub_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vasub_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m8(op1, op2, vl); + return __riscv_vasub_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vasub_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vasub_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vasub_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vasub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vasub_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vasub_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vasub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vasub_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vasub_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vasub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vasub_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vasub_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vasub_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vasub_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vasub_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vasub_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vasub_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vasub_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vasub_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vasub_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vasub_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vasub_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vasub_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vasub_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vasub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vasub_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vasub_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vasub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vasub_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vasub_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vasub_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vasub_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vasub_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vasub_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vasub_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vasub_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vasub_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vasub_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vasub_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vasub_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vasub_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vasub_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vasub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vasub_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vasub_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vasub_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vasub_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vasub_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vasub_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vasub_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vasub_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vasub_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vasub_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vasub_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vasub_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vasub_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vasub_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vasub_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vasub_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vasub_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vasub_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vasub_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vasub_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vasub_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vasub_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vasub_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vasub_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vasub_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vasubu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vasubu.c index b3cfeed161f1a13c0713adaf0aeb89683995f731..b031be7d0b67a39e0d71fac2832fb17a95d79b56 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vasubu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vasubu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vasubu_vv_u8mf8(op1, op2, vl); + return __riscv_vasubu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vasubu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf8(op1, op2, vl); + return __riscv_vasubu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vasubu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vasubu_vv_u8mf4(op1, op2, vl); + return __riscv_vasubu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vasubu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf4(op1, op2, vl); + return __riscv_vasubu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vasubu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vasubu_vv_u8mf2(op1, op2, vl); + return __riscv_vasubu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vasubu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf2(op1, op2, vl); + return __riscv_vasubu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vasubu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vasubu_vv_u8m1(op1, op2, vl); + return __riscv_vasubu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vasubu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m1(op1, op2, vl); + return __riscv_vasubu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vasubu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vasubu_vv_u8m2(op1, op2, vl); + return __riscv_vasubu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vasubu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m2(op1, op2, vl); + return __riscv_vasubu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vasubu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vasubu_vv_u8m4(op1, op2, vl); + return __riscv_vasubu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vasubu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m4(op1, op2, vl); + return __riscv_vasubu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vasubu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vasubu_vv_u8m8(op1, op2, vl); + return __riscv_vasubu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vasubu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m8(op1, op2, vl); + return __riscv_vasubu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vasubu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vasubu_vv_u16mf4(op1, op2, vl); + return __riscv_vasubu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vasubu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf4(op1, op2, vl); + return __riscv_vasubu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vasubu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vasubu_vv_u16mf2(op1, op2, vl); + return __riscv_vasubu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vasubu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf2(op1, op2, vl); + return __riscv_vasubu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vasubu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vasubu_vv_u16m1(op1, op2, vl); + return __riscv_vasubu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vasubu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m1(op1, op2, vl); + return __riscv_vasubu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vasubu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vasubu_vv_u16m2(op1, op2, vl); + return __riscv_vasubu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vasubu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m2(op1, op2, vl); + return __riscv_vasubu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vasubu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vasubu_vv_u16m4(op1, op2, vl); + return __riscv_vasubu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vasubu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m4(op1, op2, vl); + return __riscv_vasubu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vasubu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vasubu_vv_u16m8(op1, op2, vl); + return __riscv_vasubu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vasubu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m8(op1, op2, vl); + return __riscv_vasubu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vasubu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vasubu_vv_u32mf2(op1, op2, vl); + return __riscv_vasubu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vasubu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32mf2(op1, op2, vl); + return __riscv_vasubu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vasubu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vasubu_vv_u32m1(op1, op2, vl); + return __riscv_vasubu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vasubu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m1(op1, op2, vl); + return __riscv_vasubu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vasubu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vasubu_vv_u32m2(op1, op2, vl); + return __riscv_vasubu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vasubu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m2(op1, op2, vl); + return __riscv_vasubu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vasubu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vasubu_vv_u32m4(op1, op2, vl); + return __riscv_vasubu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vasubu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m4(op1, op2, vl); + return __riscv_vasubu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vasubu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vasubu_vv_u32m8(op1, op2, vl); + return __riscv_vasubu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vasubu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m8(op1, op2, vl); + return __riscv_vasubu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vasubu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vasubu_vv_u64m1(op1, op2, vl); + return __riscv_vasubu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vasubu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m1(op1, op2, vl); + return __riscv_vasubu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vasubu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vasubu_vv_u64m2(op1, op2, vl); + return __riscv_vasubu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vasubu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m2(op1, op2, vl); + return __riscv_vasubu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vasubu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vasubu_vv_u64m4(op1, op2, vl); + return __riscv_vasubu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vasubu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m4(op1, op2, vl); + return __riscv_vasubu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vasubu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vasubu_vv_u64m8(op1, op2, vl); + return __riscv_vasubu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vasubu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m8(op1, op2, vl); + return __riscv_vasubu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vasubu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vasubu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vasubu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vasubu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vasubu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vasubu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vasubu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vasubu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vasubu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vasubu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vasubu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vasubu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vasubu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vasubu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vasubu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vasubu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vasubu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vasubu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vasubu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vasubu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vasubu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vasubu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vasubu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vasubu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vasubu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vasubu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vasubu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vasubu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vasubu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vasubu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vasubu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vasubu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vasubu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vasubu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vasubu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vasubu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vasubu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vasubu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vasubu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vasubu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vasubu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vasubu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vasubu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vasubu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vasubu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vasubu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vasubu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vasubu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vasubu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vasubu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vasubu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vasubu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vasubu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vasubu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vasubu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vasubu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vasubu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vasubu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vasubu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vasubu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vasubu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vasubu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vasubu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vasubu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vasubu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vasubu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vasubu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vasubu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcompress.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcompress.c index 8c53b7e94687f52e3e3486b59326a44b859e1efd..34438cef9d90d68992192bcb36971a0fc0806f07 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcompress.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcompress.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vcompress_vm_f16mf4(vfloat16mf4_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_f16mf4(src, mask, vl); + return __riscv_vcompress_vm_f16mf4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vcompress_vm_f16mf4(vfloat16mf4_t src, vbool64_t mask, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vcompress_vm_f16mf2(vfloat16mf2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_f16mf2(src, mask, vl); + return __riscv_vcompress_vm_f16mf2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vcompress_vm_f16mf2(vfloat16mf2_t src, vbool32_t mask, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vcompress_vm_f16m1(vfloat16m1_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_f16m1(src, mask, vl); + return __riscv_vcompress_vm_f16m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vcompress_vm_f16m1(vfloat16m1_t src, vbool16_t mask, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vcompress_vm_f16m2(vfloat16m2_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_f16m2(src, mask, vl); + return __riscv_vcompress_vm_f16m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vcompress_vm_f16m2(vfloat16m2_t src, vbool8_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vcompress_vm_f16m4(vfloat16m4_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_f16m4(src, mask, vl); + return __riscv_vcompress_vm_f16m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vcompress_vm_f16m4(vfloat16m4_t src, vbool4_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vcompress_vm_f16m8(vfloat16m8_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_f16m8(src, mask, vl); + return __riscv_vcompress_vm_f16m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vcompress_vm_f16m8(vfloat16m8_t src, vbool2_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vcompress_vm_f32mf2(vfloat32mf2_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_f32mf2(src, mask, vl); + return __riscv_vcompress_vm_f32mf2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vcompress_vm_f32mf2(vfloat32mf2_t src, vbool64_t mask, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vcompress_vm_f32m1(vfloat32m1_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_f32m1(src, mask, vl); + return __riscv_vcompress_vm_f32m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vcompress_vm_f32m1(vfloat32m1_t src, vbool32_t mask, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vcompress_vm_f32m2(vfloat32m2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_f32m2(src, mask, vl); + return __riscv_vcompress_vm_f32m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vcompress_vm_f32m2(vfloat32m2_t src, vbool16_t mask, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vcompress_vm_f32m4(vfloat32m4_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_f32m4(src, mask, vl); + return __riscv_vcompress_vm_f32m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vcompress_vm_f32m4(vfloat32m4_t src, vbool8_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vcompress_vm_f32m8(vfloat32m8_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_f32m8(src, mask, vl); + return __riscv_vcompress_vm_f32m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vcompress_vm_f32m8(vfloat32m8_t src, vbool4_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vcompress_vm_f64m1(vfloat64m1_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_f64m1(src, mask, vl); + return __riscv_vcompress_vm_f64m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vcompress_vm_f64m1(vfloat64m1_t src, vbool64_t mask, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vcompress_vm_f64m2(vfloat64m2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_f64m2(src, mask, vl); + return __riscv_vcompress_vm_f64m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vcompress_vm_f64m2(vfloat64m2_t src, vbool32_t mask, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vcompress_vm_f64m4(vfloat64m4_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_f64m4(src, mask, vl); + return __riscv_vcompress_vm_f64m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vcompress_vm_f64m4(vfloat64m4_t src, vbool16_t mask, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vcompress_vm_f64m8(vfloat64m8_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_f64m8(src, mask, vl); + return __riscv_vcompress_vm_f64m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8mf8( @@ -148,7 +148,7 @@ vfloat64m8_t test_vcompress_vm_f64m8(vfloat64m8_t src, vbool8_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vcompress_vm_i8mf8(vint8mf8_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_i8mf8(src, mask, vl); + return __riscv_vcompress_vm_i8mf8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8mf4( @@ -157,7 +157,7 @@ vint8mf8_t test_vcompress_vm_i8mf8(vint8mf8_t src, vbool64_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vcompress_vm_i8mf4(vint8mf4_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_i8mf4(src, mask, vl); + return __riscv_vcompress_vm_i8mf4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8mf2( @@ -166,7 +166,7 @@ vint8mf4_t test_vcompress_vm_i8mf4(vint8mf4_t src, vbool32_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vcompress_vm_i8mf2(vint8mf2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_i8mf2(src, mask, vl); + return __riscv_vcompress_vm_i8mf2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8m1( @@ -175,7 +175,7 @@ vint8mf2_t test_vcompress_vm_i8mf2(vint8mf2_t src, vbool16_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vcompress_vm_i8m1(vint8m1_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_i8m1(src, mask, vl); + return __riscv_vcompress_vm_i8m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8m2( @@ -184,7 +184,7 @@ vint8m1_t test_vcompress_vm_i8m1(vint8m1_t src, vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vcompress_vm_i8m2(vint8m2_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_i8m2(src, mask, vl); + return __riscv_vcompress_vm_i8m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8m4( @@ -193,7 +193,7 @@ vint8m2_t test_vcompress_vm_i8m2(vint8m2_t src, vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vcompress_vm_i8m4(vint8m4_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_i8m4(src, mask, vl); + return __riscv_vcompress_vm_i8m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8m8( @@ -202,7 +202,7 @@ vint8m4_t test_vcompress_vm_i8m4(vint8m4_t src, vbool2_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vcompress_vm_i8m8(vint8m8_t src, vbool1_t mask, size_t vl) { - return vcompress_vm_i8m8(src, mask, vl); + return __riscv_vcompress_vm_i8m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16mf4( @@ -211,7 +211,7 @@ vint8m8_t test_vcompress_vm_i8m8(vint8m8_t src, vbool1_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vcompress_vm_i16mf4(vint16mf4_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_i16mf4(src, mask, vl); + return __riscv_vcompress_vm_i16mf4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16mf2( @@ -220,7 +220,7 @@ vint16mf4_t test_vcompress_vm_i16mf4(vint16mf4_t src, vbool64_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vcompress_vm_i16mf2(vint16mf2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_i16mf2(src, mask, vl); + return __riscv_vcompress_vm_i16mf2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16m1( @@ -229,7 +229,7 @@ vint16mf2_t test_vcompress_vm_i16mf2(vint16mf2_t src, vbool32_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vcompress_vm_i16m1(vint16m1_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_i16m1(src, mask, vl); + return __riscv_vcompress_vm_i16m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16m2( @@ -238,7 +238,7 @@ vint16m1_t test_vcompress_vm_i16m1(vint16m1_t src, vbool16_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vcompress_vm_i16m2(vint16m2_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_i16m2(src, mask, vl); + return __riscv_vcompress_vm_i16m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16m4( @@ -247,7 +247,7 @@ vint16m2_t test_vcompress_vm_i16m2(vint16m2_t src, vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vcompress_vm_i16m4(vint16m4_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_i16m4(src, mask, vl); + return __riscv_vcompress_vm_i16m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16m8( @@ -256,7 +256,7 @@ vint16m4_t test_vcompress_vm_i16m4(vint16m4_t src, vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vcompress_vm_i16m8(vint16m8_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_i16m8(src, mask, vl); + return __riscv_vcompress_vm_i16m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32mf2( @@ -265,7 +265,7 @@ vint16m8_t test_vcompress_vm_i16m8(vint16m8_t src, vbool2_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vcompress_vm_i32mf2(vint32mf2_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_i32mf2(src, mask, vl); + return __riscv_vcompress_vm_i32mf2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32m1( @@ -274,7 +274,7 @@ vint32mf2_t test_vcompress_vm_i32mf2(vint32mf2_t src, vbool64_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vcompress_vm_i32m1(vint32m1_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_i32m1(src, mask, vl); + return __riscv_vcompress_vm_i32m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vcompress_vm_i32m1(vint32m1_t src, vbool32_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vcompress_vm_i32m2(vint32m2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_i32m2(src, mask, vl); + return __riscv_vcompress_vm_i32m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32m4( @@ -292,7 +292,7 @@ vint32m2_t test_vcompress_vm_i32m2(vint32m2_t src, vbool16_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vcompress_vm_i32m4(vint32m4_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_i32m4(src, mask, vl); + return __riscv_vcompress_vm_i32m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32m8( @@ -301,7 +301,7 @@ vint32m4_t test_vcompress_vm_i32m4(vint32m4_t src, vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vcompress_vm_i32m8(vint32m8_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_i32m8(src, mask, vl); + return __riscv_vcompress_vm_i32m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i64m1( @@ -310,7 +310,7 @@ vint32m8_t test_vcompress_vm_i32m8(vint32m8_t src, vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vcompress_vm_i64m1(vint64m1_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_i64m1(src, mask, vl); + return __riscv_vcompress_vm_i64m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i64m2( @@ -319,7 +319,7 @@ vint64m1_t test_vcompress_vm_i64m1(vint64m1_t src, vbool64_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vcompress_vm_i64m2(vint64m2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_i64m2(src, mask, vl); + return __riscv_vcompress_vm_i64m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i64m4( @@ -328,7 +328,7 @@ vint64m2_t test_vcompress_vm_i64m2(vint64m2_t src, vbool32_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vcompress_vm_i64m4(vint64m4_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_i64m4(src, mask, vl); + return __riscv_vcompress_vm_i64m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i64m8( @@ -337,7 +337,7 @@ vint64m4_t test_vcompress_vm_i64m4(vint64m4_t src, vbool16_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vcompress_vm_i64m8(vint64m8_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_i64m8(src, mask, vl); + return __riscv_vcompress_vm_i64m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8mf8( @@ -346,7 +346,7 @@ vint64m8_t test_vcompress_vm_i64m8(vint64m8_t src, vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vcompress_vm_u8mf8(vuint8mf8_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_u8mf8(src, mask, vl); + return __riscv_vcompress_vm_u8mf8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8mf4( @@ -355,7 +355,7 @@ vuint8mf8_t test_vcompress_vm_u8mf8(vuint8mf8_t src, vbool64_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vcompress_vm_u8mf4(vuint8mf4_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_u8mf4(src, mask, vl); + return __riscv_vcompress_vm_u8mf4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8mf2( @@ -364,7 +364,7 @@ vuint8mf4_t test_vcompress_vm_u8mf4(vuint8mf4_t src, vbool32_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vcompress_vm_u8mf2(vuint8mf2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_u8mf2(src, mask, vl); + return __riscv_vcompress_vm_u8mf2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8m1( @@ -373,7 +373,7 @@ vuint8mf2_t test_vcompress_vm_u8mf2(vuint8mf2_t src, vbool16_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vcompress_vm_u8m1(vuint8m1_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_u8m1(src, mask, vl); + return __riscv_vcompress_vm_u8m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8m2( @@ -382,7 +382,7 @@ vuint8m1_t test_vcompress_vm_u8m1(vuint8m1_t src, vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vcompress_vm_u8m2(vuint8m2_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_u8m2(src, mask, vl); + return __riscv_vcompress_vm_u8m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8m4( @@ -391,7 +391,7 @@ vuint8m2_t test_vcompress_vm_u8m2(vuint8m2_t src, vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vcompress_vm_u8m4(vuint8m4_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_u8m4(src, mask, vl); + return __riscv_vcompress_vm_u8m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8m8( @@ -400,7 +400,7 @@ vuint8m4_t test_vcompress_vm_u8m4(vuint8m4_t src, vbool2_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vcompress_vm_u8m8(vuint8m8_t src, vbool1_t mask, size_t vl) { - return vcompress_vm_u8m8(src, mask, vl); + return __riscv_vcompress_vm_u8m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16mf4( @@ -409,7 +409,7 @@ vuint8m8_t test_vcompress_vm_u8m8(vuint8m8_t src, vbool1_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vcompress_vm_u16mf4(vuint16mf4_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_u16mf4(src, mask, vl); + return __riscv_vcompress_vm_u16mf4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16mf2( @@ -418,7 +418,7 @@ vuint16mf4_t test_vcompress_vm_u16mf4(vuint16mf4_t src, vbool64_t mask, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vcompress_vm_u16mf2(vuint16mf2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_u16mf2(src, mask, vl); + return __riscv_vcompress_vm_u16mf2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16m1( @@ -427,7 +427,7 @@ vuint16mf2_t test_vcompress_vm_u16mf2(vuint16mf2_t src, vbool32_t mask, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vcompress_vm_u16m1(vuint16m1_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_u16m1(src, mask, vl); + return __riscv_vcompress_vm_u16m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16m2( @@ -436,7 +436,7 @@ vuint16m1_t test_vcompress_vm_u16m1(vuint16m1_t src, vbool16_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vcompress_vm_u16m2(vuint16m2_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_u16m2(src, mask, vl); + return __riscv_vcompress_vm_u16m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16m4( @@ -445,7 +445,7 @@ vuint16m2_t test_vcompress_vm_u16m2(vuint16m2_t src, vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vcompress_vm_u16m4(vuint16m4_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_u16m4(src, mask, vl); + return __riscv_vcompress_vm_u16m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16m8( @@ -454,7 +454,7 @@ vuint16m4_t test_vcompress_vm_u16m4(vuint16m4_t src, vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vcompress_vm_u16m8(vuint16m8_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_u16m8(src, mask, vl); + return __riscv_vcompress_vm_u16m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32mf2( @@ -463,7 +463,7 @@ vuint16m8_t test_vcompress_vm_u16m8(vuint16m8_t src, vbool2_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vcompress_vm_u32mf2(vuint32mf2_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_u32mf2(src, mask, vl); + return __riscv_vcompress_vm_u32mf2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32m1( @@ -472,7 +472,7 @@ vuint32mf2_t test_vcompress_vm_u32mf2(vuint32mf2_t src, vbool64_t mask, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vcompress_vm_u32m1(vuint32m1_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_u32m1(src, mask, vl); + return __riscv_vcompress_vm_u32m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32m2( @@ -481,7 +481,7 @@ vuint32m1_t test_vcompress_vm_u32m1(vuint32m1_t src, vbool32_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vcompress_vm_u32m2(vuint32m2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_u32m2(src, mask, vl); + return __riscv_vcompress_vm_u32m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32m4( @@ -490,7 +490,7 @@ vuint32m2_t test_vcompress_vm_u32m2(vuint32m2_t src, vbool16_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vcompress_vm_u32m4(vuint32m4_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_u32m4(src, mask, vl); + return __riscv_vcompress_vm_u32m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32m8( @@ -499,7 +499,7 @@ vuint32m4_t test_vcompress_vm_u32m4(vuint32m4_t src, vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vcompress_vm_u32m8(vuint32m8_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_u32m8(src, mask, vl); + return __riscv_vcompress_vm_u32m8(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u64m1( @@ -508,7 +508,7 @@ vuint32m8_t test_vcompress_vm_u32m8(vuint32m8_t src, vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vcompress_vm_u64m1(vuint64m1_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_u64m1(src, mask, vl); + return __riscv_vcompress_vm_u64m1(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u64m2( @@ -517,7 +517,7 @@ vuint64m1_t test_vcompress_vm_u64m1(vuint64m1_t src, vbool64_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vcompress_vm_u64m2(vuint64m2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_u64m2(src, mask, vl); + return __riscv_vcompress_vm_u64m2(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u64m4( @@ -526,7 +526,7 @@ vuint64m2_t test_vcompress_vm_u64m2(vuint64m2_t src, vbool32_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vcompress_vm_u64m4(vuint64m4_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_u64m4(src, mask, vl); + return __riscv_vcompress_vm_u64m4(src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u64m8( @@ -535,6 +535,6 @@ vuint64m4_t test_vcompress_vm_u64m4(vuint64m4_t src, vbool16_t mask, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vcompress_vm_u64m8(vuint64m8_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_u64m8(src, mask, vl); + return __riscv_vcompress_vm_u64m8(src, mask, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpop.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpop.c index 8b8c22acd1a107b50acee7a1f4f017365b64e218..3d856f02ed2dcc27f841c4307ab61a7ffe756d97 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpop.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vcpop.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b1(vbool1_t op1, size_t vl) { - return vcpop_m_b1(op1, vl); + return __riscv_vcpop_m_b1(op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b2( @@ -22,7 +22,7 @@ unsigned long test_vcpop_m_b1(vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b2(vbool2_t op1, size_t vl) { - return vcpop_m_b2(op1, vl); + return __riscv_vcpop_m_b2(op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b4( @@ -31,7 +31,7 @@ unsigned long test_vcpop_m_b2(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b4(vbool4_t op1, size_t vl) { - return vcpop_m_b4(op1, vl); + return __riscv_vcpop_m_b4(op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b8( @@ -40,7 +40,7 @@ unsigned long test_vcpop_m_b4(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b8(vbool8_t op1, size_t vl) { - return vcpop_m_b8(op1, vl); + return __riscv_vcpop_m_b8(op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b16( @@ -49,7 +49,7 @@ unsigned long test_vcpop_m_b8(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b16(vbool16_t op1, size_t vl) { - return vcpop_m_b16(op1, vl); + return __riscv_vcpop_m_b16(op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b32( @@ -58,7 +58,7 @@ unsigned long test_vcpop_m_b16(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b32(vbool32_t op1, size_t vl) { - return vcpop_m_b32(op1, vl); + return __riscv_vcpop_m_b32(op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b64( @@ -67,7 +67,7 @@ unsigned long test_vcpop_m_b32(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b64(vbool64_t op1, size_t vl) { - return vcpop_m_b64(op1, vl); + return __riscv_vcpop_m_b64(op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b1_m( @@ -76,7 +76,7 @@ unsigned long test_vcpop_m_b64(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { - return vcpop_m_b1_m(mask, op1, vl); + return __riscv_vcpop_m_b1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b2_m( @@ -85,7 +85,7 @@ unsigned long test_vcpop_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { - return vcpop_m_b2_m(mask, op1, vl); + return __riscv_vcpop_m_b2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b4_m( @@ -94,7 +94,7 @@ unsigned long test_vcpop_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { - return vcpop_m_b4_m(mask, op1, vl); + return __riscv_vcpop_m_b4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b8_m( @@ -103,7 +103,7 @@ unsigned long test_vcpop_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return vcpop_m_b8_m(mask, op1, vl); + return __riscv_vcpop_m_b8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b16_m( @@ -112,7 +112,7 @@ unsigned long test_vcpop_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return vcpop_m_b16_m(mask, op1, vl); + return __riscv_vcpop_m_b16_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b32_m( @@ -121,7 +121,7 @@ unsigned long test_vcpop_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return vcpop_m_b32_m(mask, op1, vl); + return __riscv_vcpop_m_b32_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vcpop_m_b64_m( @@ -130,6 +130,6 @@ unsigned long test_vcpop_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // unsigned long test_vcpop_m_b64_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return vcpop_m_b64_m(mask, op1, vl); + return __riscv_vcpop_m_b64_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vdiv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vdiv.c index d392198f14b92a1bb2285e6f14f435587810efaa..bc668c414b223f6601defcfc195a025c4948aa48 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vdiv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vdiv.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vdiv_vv_i8mf8(op1, op2, vl); + return __riscv_vdiv_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vdiv_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf8(op1, op2, vl); + return __riscv_vdiv_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vdiv_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vdiv_vv_i8mf4(op1, op2, vl); + return __riscv_vdiv_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vdiv_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf4(op1, op2, vl); + return __riscv_vdiv_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vdiv_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vdiv_vv_i8mf2(op1, op2, vl); + return __riscv_vdiv_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vdiv_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf2(op1, op2, vl); + return __riscv_vdiv_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vdiv_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vdiv_vv_i8m1(op1, op2, vl); + return __riscv_vdiv_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vdiv_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m1(op1, op2, vl); + return __riscv_vdiv_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vdiv_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vdiv_vv_i8m2(op1, op2, vl); + return __riscv_vdiv_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vdiv_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m2(op1, op2, vl); + return __riscv_vdiv_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vdiv_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vdiv_vv_i8m4(op1, op2, vl); + return __riscv_vdiv_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vdiv_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m4(op1, op2, vl); + return __riscv_vdiv_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vdiv_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vdiv_vv_i8m8(op1, op2, vl); + return __riscv_vdiv_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vdiv_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m8(op1, op2, vl); + return __riscv_vdiv_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vdiv_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vdiv_vv_i16mf4(op1, op2, vl); + return __riscv_vdiv_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vdiv_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf4(op1, op2, vl); + return __riscv_vdiv_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vdiv_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vdiv_vv_i16mf2(op1, op2, vl); + return __riscv_vdiv_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vdiv_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf2(op1, op2, vl); + return __riscv_vdiv_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vdiv_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vdiv_vv_i16m1(op1, op2, vl); + return __riscv_vdiv_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vdiv_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m1(op1, op2, vl); + return __riscv_vdiv_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vdiv_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vdiv_vv_i16m2(op1, op2, vl); + return __riscv_vdiv_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vdiv_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m2(op1, op2, vl); + return __riscv_vdiv_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vdiv_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vdiv_vv_i16m4(op1, op2, vl); + return __riscv_vdiv_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vdiv_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m4(op1, op2, vl); + return __riscv_vdiv_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vdiv_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vdiv_vv_i16m8(op1, op2, vl); + return __riscv_vdiv_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vdiv_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m8(op1, op2, vl); + return __riscv_vdiv_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vdiv_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vdiv_vv_i32mf2(op1, op2, vl); + return __riscv_vdiv_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vdiv_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32mf2(op1, op2, vl); + return __riscv_vdiv_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vdiv_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vdiv_vv_i32m1(op1, op2, vl); + return __riscv_vdiv_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vdiv_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m1(op1, op2, vl); + return __riscv_vdiv_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vdiv_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vdiv_vv_i32m2(op1, op2, vl); + return __riscv_vdiv_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vdiv_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m2(op1, op2, vl); + return __riscv_vdiv_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vdiv_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vdiv_vv_i32m4(op1, op2, vl); + return __riscv_vdiv_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vdiv_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m4(op1, op2, vl); + return __riscv_vdiv_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vdiv_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vdiv_vv_i32m8(op1, op2, vl); + return __riscv_vdiv_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vdiv_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m8(op1, op2, vl); + return __riscv_vdiv_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vdiv_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vdiv_vv_i64m1(op1, op2, vl); + return __riscv_vdiv_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vdiv_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m1(op1, op2, vl); + return __riscv_vdiv_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vdiv_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vdiv_vv_i64m2(op1, op2, vl); + return __riscv_vdiv_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vdiv_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m2(op1, op2, vl); + return __riscv_vdiv_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vdiv_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vdiv_vv_i64m4(op1, op2, vl); + return __riscv_vdiv_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vdiv_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m4(op1, op2, vl); + return __riscv_vdiv_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vdiv_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vdiv_vv_i64m8(op1, op2, vl); + return __riscv_vdiv_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vdiv_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m8(op1, op2, vl); + return __riscv_vdiv_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vdiv_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vdiv_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vdiv_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vdiv_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vdiv_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vdiv_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vdiv_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vdiv_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vdiv_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vdiv_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vdiv_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vdiv_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vdiv_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vdiv_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vdiv_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vdiv_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vdiv_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vdiv_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vdiv_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vdiv_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vdiv_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vdiv_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vdiv_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vdiv_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vdiv_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vdiv_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vdiv_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vdiv_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vdiv_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vdiv_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vdiv_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vdiv_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vdiv_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vdiv_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vdiv_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vdiv_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vdiv_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vdiv_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vdiv_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vdiv_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vdiv_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vdiv_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vdiv_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vdiv_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vdiv_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vdiv_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vdiv_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vdiv_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vdiv_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vdiv_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vdiv_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vdiv_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vdiv_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vdiv_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vdiv_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vdiv_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vdiv_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vdiv_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vdiv_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vdiv_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vdiv_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vdiv_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vdiv_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vdiv_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vdiv_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vdiv_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vdiv_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vdiv_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vdivu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vdivu.c index b92d6f1bbeecfdda7c38a8f42e51a807068838be..cdb844c68154ead2a324d6532c63cc01b73da75e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vdivu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vdivu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vdivu_vv_u8mf8(op1, op2, vl); + return __riscv_vdivu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vdivu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf8(op1, op2, vl); + return __riscv_vdivu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vdivu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vdivu_vv_u8mf4(op1, op2, vl); + return __riscv_vdivu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vdivu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf4(op1, op2, vl); + return __riscv_vdivu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vdivu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vdivu_vv_u8mf2(op1, op2, vl); + return __riscv_vdivu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vdivu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf2(op1, op2, vl); + return __riscv_vdivu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vdivu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vdivu_vv_u8m1(op1, op2, vl); + return __riscv_vdivu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vdivu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m1(op1, op2, vl); + return __riscv_vdivu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vdivu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vdivu_vv_u8m2(op1, op2, vl); + return __riscv_vdivu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vdivu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m2(op1, op2, vl); + return __riscv_vdivu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vdivu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vdivu_vv_u8m4(op1, op2, vl); + return __riscv_vdivu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vdivu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m4(op1, op2, vl); + return __riscv_vdivu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vdivu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vdivu_vv_u8m8(op1, op2, vl); + return __riscv_vdivu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vdivu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m8(op1, op2, vl); + return __riscv_vdivu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vdivu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vdivu_vv_u16mf4(op1, op2, vl); + return __riscv_vdivu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vdivu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf4(op1, op2, vl); + return __riscv_vdivu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vdivu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vdivu_vv_u16mf2(op1, op2, vl); + return __riscv_vdivu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vdivu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf2(op1, op2, vl); + return __riscv_vdivu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vdivu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vdivu_vv_u16m1(op1, op2, vl); + return __riscv_vdivu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vdivu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m1(op1, op2, vl); + return __riscv_vdivu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vdivu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vdivu_vv_u16m2(op1, op2, vl); + return __riscv_vdivu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vdivu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m2(op1, op2, vl); + return __riscv_vdivu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vdivu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vdivu_vv_u16m4(op1, op2, vl); + return __riscv_vdivu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vdivu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m4(op1, op2, vl); + return __riscv_vdivu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vdivu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vdivu_vv_u16m8(op1, op2, vl); + return __riscv_vdivu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vdivu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m8(op1, op2, vl); + return __riscv_vdivu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vdivu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vdivu_vv_u32mf2(op1, op2, vl); + return __riscv_vdivu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vdivu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32mf2(op1, op2, vl); + return __riscv_vdivu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vdivu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vdivu_vv_u32m1(op1, op2, vl); + return __riscv_vdivu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vdivu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m1(op1, op2, vl); + return __riscv_vdivu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vdivu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vdivu_vv_u32m2(op1, op2, vl); + return __riscv_vdivu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vdivu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m2(op1, op2, vl); + return __riscv_vdivu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vdivu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vdivu_vv_u32m4(op1, op2, vl); + return __riscv_vdivu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vdivu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m4(op1, op2, vl); + return __riscv_vdivu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vdivu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vdivu_vv_u32m8(op1, op2, vl); + return __riscv_vdivu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vdivu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m8(op1, op2, vl); + return __riscv_vdivu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vdivu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vdivu_vv_u64m1(op1, op2, vl); + return __riscv_vdivu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vdivu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m1(op1, op2, vl); + return __riscv_vdivu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vdivu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vdivu_vv_u64m2(op1, op2, vl); + return __riscv_vdivu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vdivu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m2(op1, op2, vl); + return __riscv_vdivu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vdivu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vdivu_vv_u64m4(op1, op2, vl); + return __riscv_vdivu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vdivu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m4(op1, op2, vl); + return __riscv_vdivu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vdivu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vdivu_vv_u64m8(op1, op2, vl); + return __riscv_vdivu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vdivu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m8(op1, op2, vl); + return __riscv_vdivu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vdivu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vdivu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vdivu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vdivu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vdivu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vdivu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vdivu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vdivu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vdivu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vdivu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vdivu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vdivu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vdivu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vdivu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vdivu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vdivu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vdivu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vdivu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vdivu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vdivu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vdivu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vdivu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vdivu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vdivu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vdivu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vdivu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vdivu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vdivu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vdivu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vdivu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vdivu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vdivu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vdivu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vdivu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vdivu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vdivu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vdivu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vdivu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vdivu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vdivu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vdivu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vdivu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vdivu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vdivu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vdivu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vdivu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vdivu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vdivu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vdivu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vdivu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vdivu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vdivu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vdivu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vdivu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vdivu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vdivu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vdivu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vdivu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vdivu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vdivu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vdivu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vdivu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vdivu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vdivu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vdivu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vdivu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vdivu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vdivu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfabs.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfabs.c index df0e82ecdefa3f07f8d90211f379fd3e33914392..4248ed5984c3ce5e3bf08c04e6b322ad856d2dd4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfabs.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfabs.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfabs_v_f16mf4(vfloat16mf4_t op1, size_t vl) { - return vfabs_v_f16mf4(op1, vl); + return __riscv_vfabs_v_f16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfabs_v_f16mf4(vfloat16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfabs_v_f16mf2(vfloat16mf2_t op1, size_t vl) { - return vfabs_v_f16mf2(op1, vl); + return __riscv_vfabs_v_f16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfabs_v_f16mf2(vfloat16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfabs_v_f16m1(vfloat16m1_t op1, size_t vl) { - return vfabs_v_f16m1(op1, vl); + return __riscv_vfabs_v_f16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfabs_v_f16m1(vfloat16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfabs_v_f16m2(vfloat16m2_t op1, size_t vl) { - return vfabs_v_f16m2(op1, vl); + return __riscv_vfabs_v_f16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfabs_v_f16m2(vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfabs_v_f16m4(vfloat16m4_t op1, size_t vl) { - return vfabs_v_f16m4(op1, vl); + return __riscv_vfabs_v_f16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfabs_v_f16m4(vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfabs_v_f16m8(vfloat16m8_t op1, size_t vl) { - return vfabs_v_f16m8(op1, vl); + return __riscv_vfabs_v_f16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfabs_v_f16m8(vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfabs_v_f32mf2(vfloat32mf2_t op1, size_t vl) { - return vfabs_v_f32mf2(op1, vl); + return __riscv_vfabs_v_f32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfabs_v_f32mf2(vfloat32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfabs_v_f32m1(vfloat32m1_t op1, size_t vl) { - return vfabs_v_f32m1(op1, vl); + return __riscv_vfabs_v_f32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfabs_v_f32m1(vfloat32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfabs_v_f32m2(vfloat32m2_t op1, size_t vl) { - return vfabs_v_f32m2(op1, vl); + return __riscv_vfabs_v_f32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfabs_v_f32m2(vfloat32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfabs_v_f32m4(vfloat32m4_t op1, size_t vl) { - return vfabs_v_f32m4(op1, vl); + return __riscv_vfabs_v_f32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfabs_v_f32m4(vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfabs_v_f32m8(vfloat32m8_t op1, size_t vl) { - return vfabs_v_f32m8(op1, vl); + return __riscv_vfabs_v_f32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfabs_v_f32m8(vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfabs_v_f64m1(vfloat64m1_t op1, size_t vl) { - return vfabs_v_f64m1(op1, vl); + return __riscv_vfabs_v_f64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfabs_v_f64m1(vfloat64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfabs_v_f64m2(vfloat64m2_t op1, size_t vl) { - return vfabs_v_f64m2(op1, vl); + return __riscv_vfabs_v_f64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfabs_v_f64m2(vfloat64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfabs_v_f64m4(vfloat64m4_t op1, size_t vl) { - return vfabs_v_f64m4(op1, vl); + return __riscv_vfabs_v_f64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfabs_v_f64m4(vfloat64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfabs_v_f64m8(vfloat64m8_t op1, size_t vl) { - return vfabs_v_f64m8(op1, vl); + return __riscv_vfabs_v_f64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfabs_v_f64m8(vfloat64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfabs_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t vl) { - return vfabs_v_f16mf4_m(mask, op1, vl); + return __riscv_vfabs_v_f16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfabs_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfabs_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t vl) { - return vfabs_v_f16mf2_m(mask, op1, vl); + return __riscv_vfabs_v_f16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfabs_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfabs_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) { - return vfabs_v_f16m1_m(mask, op1, vl); + return __riscv_vfabs_v_f16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfabs_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfabs_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { - return vfabs_v_f16m2_m(mask, op1, vl); + return __riscv_vfabs_v_f16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfabs_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfabs_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { - return vfabs_v_f16m4_m(mask, op1, vl); + return __riscv_vfabs_v_f16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfabs_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfabs_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { - return vfabs_v_f16m8_m(mask, op1, vl); + return __riscv_vfabs_v_f16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfabs_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfabs_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t vl) { - return vfabs_v_f32mf2_m(mask, op1, vl); + return __riscv_vfabs_v_f32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfabs_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfabs_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) { - return vfabs_v_f32m1_m(mask, op1, vl); + return __riscv_vfabs_v_f32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfabs_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfabs_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) { - return vfabs_v_f32m2_m(mask, op1, vl); + return __riscv_vfabs_v_f32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfabs_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfabs_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { - return vfabs_v_f32m4_m(mask, op1, vl); + return __riscv_vfabs_v_f32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfabs_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfabs_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { - return vfabs_v_f32m8_m(mask, op1, vl); + return __riscv_vfabs_v_f32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfabs_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfabs_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) { - return vfabs_v_f64m1_m(mask, op1, vl); + return __riscv_vfabs_v_f64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfabs_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfabs_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) { - return vfabs_v_f64m2_m(mask, op1, vl); + return __riscv_vfabs_v_f64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfabs_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfabs_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) { - return vfabs_v_f64m4_m(mask, op1, vl); + return __riscv_vfabs_v_f64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfabs_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfabs_v_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t vl) { - return vfabs_v_f64m8_m(mask, op1, vl); + return __riscv_vfabs_v_f64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfadd.c index 0dc58982a88731d9584a87b8f84afb3534af98b3..f3cfacc623dac97fdfcd55934a300a4ec90c227e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfadd_vv_f16mf4(op1, op2, vl); + return __riscv_vfadd_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfadd_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf4(op1, op2, vl); + return __riscv_vfadd_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfadd_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfadd_vv_f16mf2(op1, op2, vl); + return __riscv_vfadd_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfadd_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf2(op1, op2, vl); + return __riscv_vfadd_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfadd_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfadd_vv_f16m1(op1, op2, vl); + return __riscv_vfadd_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfadd_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m1(op1, op2, vl); + return __riscv_vfadd_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfadd_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfadd_vv_f16m2(op1, op2, vl); + return __riscv_vfadd_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfadd_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m2(op1, op2, vl); + return __riscv_vfadd_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfadd_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfadd_vv_f16m4(op1, op2, vl); + return __riscv_vfadd_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfadd_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m4(op1, op2, vl); + return __riscv_vfadd_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfadd_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfadd_vv_f16m8(op1, op2, vl); + return __riscv_vfadd_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfadd_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m8(op1, op2, vl); + return __riscv_vfadd_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfadd_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfadd_vv_f32mf2(op1, op2, vl); + return __riscv_vfadd_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfadd_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfadd_vf_f32mf2(op1, op2, vl); + return __riscv_vfadd_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfadd_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfadd_vv_f32m1(op1, op2, vl); + return __riscv_vfadd_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfadd_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfadd_vf_f32m1(op1, op2, vl); + return __riscv_vfadd_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfadd_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfadd_vv_f32m2(op1, op2, vl); + return __riscv_vfadd_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfadd_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfadd_vf_f32m2(op1, op2, vl); + return __riscv_vfadd_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfadd_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfadd_vv_f32m4(op1, op2, vl); + return __riscv_vfadd_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfadd_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfadd_vf_f32m4(op1, op2, vl); + return __riscv_vfadd_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfadd_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfadd_vv_f32m8(op1, op2, vl); + return __riscv_vfadd_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfadd_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfadd_vf_f32m8(op1, op2, vl); + return __riscv_vfadd_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfadd_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfadd_vv_f64m1(op1, op2, vl); + return __riscv_vfadd_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfadd_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfadd_vf_f64m1(op1, op2, vl); + return __riscv_vfadd_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfadd_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfadd_vv_f64m2(op1, op2, vl); + return __riscv_vfadd_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfadd_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfadd_vf_f64m2(op1, op2, vl); + return __riscv_vfadd_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfadd_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfadd_vv_f64m4(op1, op2, vl); + return __riscv_vfadd_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfadd_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfadd_vf_f64m4(op1, op2, vl); + return __riscv_vfadd_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfadd_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfadd_vv_f64m8(op1, op2, vl); + return __riscv_vfadd_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfadd_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfadd_vf_f64m8(op1, op2, vl); + return __riscv_vfadd_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfadd_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfadd_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfadd_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfadd_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfadd_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfadd_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfadd_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfadd_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfadd_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfadd_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfadd_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfadd_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfadd_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfadd_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfadd_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfadd_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfadd_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfadd_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfadd_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfadd_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfadd_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfadd_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfadd_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfadd_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfadd_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfadd_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfadd_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfadd_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfadd_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfadd_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfadd_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfadd_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfadd_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfadd_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfadd_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfadd_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfadd_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfadd_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfadd_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfadd_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfadd_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfadd_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfadd_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfadd_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfadd_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfadd_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfadd_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfadd_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfadd_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfadd_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfadd_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfadd_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfadd_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfadd_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfadd_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfadd_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfclass.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfclass.c index fb837294d87d0ab089e6f7cb838bcea6c8df37b6..a80968808faf32fb25e55c0d7cdd22189f13f465 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfclass.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfclass.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfclass_v_u16mf4(vfloat16mf4_t op1, size_t vl) { - return vfclass_v_u16mf4(op1, vl); + return __riscv_vfclass_v_u16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf2( @@ -22,7 +22,7 @@ vuint16mf4_t test_vfclass_v_u16mf4(vfloat16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfclass_v_u16mf2(vfloat16mf2_t op1, size_t vl) { - return vfclass_v_u16mf2(op1, vl); + return __riscv_vfclass_v_u16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m1( @@ -31,7 +31,7 @@ vuint16mf2_t test_vfclass_v_u16mf2(vfloat16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfclass_v_u16m1(vfloat16m1_t op1, size_t vl) { - return vfclass_v_u16m1(op1, vl); + return __riscv_vfclass_v_u16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m2( @@ -40,7 +40,7 @@ vuint16m1_t test_vfclass_v_u16m1(vfloat16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfclass_v_u16m2(vfloat16m2_t op1, size_t vl) { - return vfclass_v_u16m2(op1, vl); + return __riscv_vfclass_v_u16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m4( @@ -49,7 +49,7 @@ vuint16m2_t test_vfclass_v_u16m2(vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfclass_v_u16m4(vfloat16m4_t op1, size_t vl) { - return vfclass_v_u16m4(op1, vl); + return __riscv_vfclass_v_u16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m8( @@ -58,7 +58,7 @@ vuint16m4_t test_vfclass_v_u16m4(vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfclass_v_u16m8(vfloat16m8_t op1, size_t vl) { - return vfclass_v_u16m8(op1, vl); + return __riscv_vfclass_v_u16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32mf2( @@ -67,7 +67,7 @@ vuint16m8_t test_vfclass_v_u16m8(vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfclass_v_u32mf2(vfloat32mf2_t op1, size_t vl) { - return vfclass_v_u32mf2(op1, vl); + return __riscv_vfclass_v_u32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m1( @@ -76,7 +76,7 @@ vuint32mf2_t test_vfclass_v_u32mf2(vfloat32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfclass_v_u32m1(vfloat32m1_t op1, size_t vl) { - return vfclass_v_u32m1(op1, vl); + return __riscv_vfclass_v_u32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m2( @@ -85,7 +85,7 @@ vuint32m1_t test_vfclass_v_u32m1(vfloat32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfclass_v_u32m2(vfloat32m2_t op1, size_t vl) { - return vfclass_v_u32m2(op1, vl); + return __riscv_vfclass_v_u32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m4( @@ -94,7 +94,7 @@ vuint32m2_t test_vfclass_v_u32m2(vfloat32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfclass_v_u32m4(vfloat32m4_t op1, size_t vl) { - return vfclass_v_u32m4(op1, vl); + return __riscv_vfclass_v_u32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m8( @@ -103,7 +103,7 @@ vuint32m4_t test_vfclass_v_u32m4(vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfclass_v_u32m8(vfloat32m8_t op1, size_t vl) { - return vfclass_v_u32m8(op1, vl); + return __riscv_vfclass_v_u32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m1( @@ -112,7 +112,7 @@ vuint32m8_t test_vfclass_v_u32m8(vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfclass_v_u64m1(vfloat64m1_t op1, size_t vl) { - return vfclass_v_u64m1(op1, vl); + return __riscv_vfclass_v_u64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m2( @@ -121,7 +121,7 @@ vuint64m1_t test_vfclass_v_u64m1(vfloat64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfclass_v_u64m2(vfloat64m2_t op1, size_t vl) { - return vfclass_v_u64m2(op1, vl); + return __riscv_vfclass_v_u64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m4( @@ -130,7 +130,7 @@ vuint64m2_t test_vfclass_v_u64m2(vfloat64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfclass_v_u64m4(vfloat64m4_t op1, size_t vl) { - return vfclass_v_u64m4(op1, vl); + return __riscv_vfclass_v_u64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m8( @@ -139,7 +139,7 @@ vuint64m4_t test_vfclass_v_u64m4(vfloat64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfclass_v_u64m8(vfloat64m8_t op1, size_t vl) { - return vfclass_v_u64m8(op1, vl); + return __riscv_vfclass_v_u64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf4_m( @@ -148,7 +148,7 @@ vuint64m8_t test_vfclass_v_u64m8(vfloat64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfclass_v_u16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t vl) { - return vfclass_v_u16mf4_m(mask, op1, vl); + return __riscv_vfclass_v_u16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf2_m( @@ -157,7 +157,7 @@ vuint16mf4_t test_vfclass_v_u16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfclass_v_u16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t vl) { - return vfclass_v_u16mf2_m(mask, op1, vl); + return __riscv_vfclass_v_u16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m1_m( @@ -166,7 +166,7 @@ vuint16mf2_t test_vfclass_v_u16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfclass_v_u16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) { - return vfclass_v_u16m1_m(mask, op1, vl); + return __riscv_vfclass_v_u16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m2_m( @@ -175,7 +175,7 @@ vuint16m1_t test_vfclass_v_u16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfclass_v_u16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { - return vfclass_v_u16m2_m(mask, op1, vl); + return __riscv_vfclass_v_u16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m4_m( @@ -184,7 +184,7 @@ vuint16m2_t test_vfclass_v_u16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfclass_v_u16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { - return vfclass_v_u16m4_m(mask, op1, vl); + return __riscv_vfclass_v_u16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m8_m( @@ -193,7 +193,7 @@ vuint16m4_t test_vfclass_v_u16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfclass_v_u16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { - return vfclass_v_u16m8_m(mask, op1, vl); + return __riscv_vfclass_v_u16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32mf2_m( @@ -202,7 +202,7 @@ vuint16m8_t test_vfclass_v_u16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfclass_v_u32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t vl) { - return vfclass_v_u32mf2_m(mask, op1, vl); + return __riscv_vfclass_v_u32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m1_m( @@ -211,7 +211,7 @@ vuint32mf2_t test_vfclass_v_u32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfclass_v_u32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) { - return vfclass_v_u32m1_m(mask, op1, vl); + return __riscv_vfclass_v_u32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m2_m( @@ -220,7 +220,7 @@ vuint32m1_t test_vfclass_v_u32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfclass_v_u32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) { - return vfclass_v_u32m2_m(mask, op1, vl); + return __riscv_vfclass_v_u32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m4_m( @@ -229,7 +229,7 @@ vuint32m2_t test_vfclass_v_u32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfclass_v_u32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { - return vfclass_v_u32m4_m(mask, op1, vl); + return __riscv_vfclass_v_u32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m8_m( @@ -238,7 +238,7 @@ vuint32m4_t test_vfclass_v_u32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfclass_v_u32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { - return vfclass_v_u32m8_m(mask, op1, vl); + return __riscv_vfclass_v_u32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m1_m( @@ -247,7 +247,7 @@ vuint32m8_t test_vfclass_v_u32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfclass_v_u64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) { - return vfclass_v_u64m1_m(mask, op1, vl); + return __riscv_vfclass_v_u64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m2_m( @@ -256,7 +256,7 @@ vuint64m1_t test_vfclass_v_u64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfclass_v_u64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) { - return vfclass_v_u64m2_m(mask, op1, vl); + return __riscv_vfclass_v_u64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m4_m( @@ -265,7 +265,7 @@ vuint64m2_t test_vfclass_v_u64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfclass_v_u64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) { - return vfclass_v_u64m4_m(mask, op1, vl); + return __riscv_vfclass_v_u64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m8_m( @@ -274,6 +274,6 @@ vuint64m4_t test_vfclass_v_u64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfclass_v_u64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t vl) { - return vfclass_v_u64m8_m(mask, op1, vl); + return __riscv_vfclass_v_u64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfcvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfcvt.c index 9f4e155e0468d2248201206ffefd5dbfb53b6e72..207765b06818e3f741978fa4ac6c73f1c0c5771e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfcvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfcvt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_x_f_v_i16mf4(vfloat16mf4_t src, size_t vl) { - return vfcvt_x_f_v_i16mf4(src, vl); + return __riscv_vfcvt_x_f_v_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf4( @@ -22,7 +22,7 @@ vint16mf4_t test_vfcvt_x_f_v_i16mf4(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4(vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf4(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf2( @@ -31,7 +31,7 @@ vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_x_f_v_i16mf2(vfloat16mf2_t src, size_t vl) { - return vfcvt_x_f_v_i16mf2(src, vl); + return __riscv_vfcvt_x_f_v_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf2( @@ -40,7 +40,7 @@ vint16mf2_t test_vfcvt_x_f_v_i16mf2(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2(vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf2(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m1( @@ -49,7 +49,7 @@ vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_x_f_v_i16m1(vfloat16m1_t src, size_t vl) { - return vfcvt_x_f_v_i16m1(src, vl); + return __riscv_vfcvt_x_f_v_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m1( @@ -58,7 +58,7 @@ vint16m1_t test_vfcvt_x_f_v_i16m1(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_rtz_x_f_v_i16m1(vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m1(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m2( @@ -67,7 +67,7 @@ vint16m1_t test_vfcvt_rtz_x_f_v_i16m1(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_x_f_v_i16m2(vfloat16m2_t src, size_t vl) { - return vfcvt_x_f_v_i16m2(src, vl); + return __riscv_vfcvt_x_f_v_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m2( @@ -76,7 +76,7 @@ vint16m2_t test_vfcvt_x_f_v_i16m2(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_rtz_x_f_v_i16m2(vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m2(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m4( @@ -85,7 +85,7 @@ vint16m2_t test_vfcvt_rtz_x_f_v_i16m2(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_x_f_v_i16m4(vfloat16m4_t src, size_t vl) { - return vfcvt_x_f_v_i16m4(src, vl); + return __riscv_vfcvt_x_f_v_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m4( @@ -94,7 +94,7 @@ vint16m4_t test_vfcvt_x_f_v_i16m4(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_rtz_x_f_v_i16m4(vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m4(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m8( @@ -103,7 +103,7 @@ vint16m4_t test_vfcvt_rtz_x_f_v_i16m4(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_x_f_v_i16m8(vfloat16m8_t src, size_t vl) { - return vfcvt_x_f_v_i16m8(src, vl); + return __riscv_vfcvt_x_f_v_i16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m8( @@ -112,7 +112,7 @@ vint16m8_t test_vfcvt_x_f_v_i16m8(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_rtz_x_f_v_i16m8(vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m8(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf4( @@ -121,7 +121,7 @@ vint16m8_t test_vfcvt_rtz_x_f_v_i16m8(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_xu_f_v_u16mf4(vfloat16mf4_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf4(src, vl); + return __riscv_vfcvt_xu_f_v_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf4( @@ -130,7 +130,7 @@ vuint16mf4_t test_vfcvt_xu_f_v_u16mf4(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4(vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf4(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf2( @@ -139,7 +139,7 @@ vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_xu_f_v_u16mf2(vfloat16mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf2(src, vl); + return __riscv_vfcvt_xu_f_v_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf2( @@ -148,7 +148,7 @@ vuint16mf2_t test_vfcvt_xu_f_v_u16mf2(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2(vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf2(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m1( @@ -157,7 +157,7 @@ vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_xu_f_v_u16m1(vfloat16m1_t src, size_t vl) { - return vfcvt_xu_f_v_u16m1(src, vl); + return __riscv_vfcvt_xu_f_v_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m1( @@ -166,7 +166,7 @@ vuint16m1_t test_vfcvt_xu_f_v_u16m1(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1(vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m1(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m2( @@ -175,7 +175,7 @@ vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_xu_f_v_u16m2(vfloat16m2_t src, size_t vl) { - return vfcvt_xu_f_v_u16m2(src, vl); + return __riscv_vfcvt_xu_f_v_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m2( @@ -184,7 +184,7 @@ vuint16m2_t test_vfcvt_xu_f_v_u16m2(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2(vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m2(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m4( @@ -193,7 +193,7 @@ vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_xu_f_v_u16m4(vfloat16m4_t src, size_t vl) { - return vfcvt_xu_f_v_u16m4(src, vl); + return __riscv_vfcvt_xu_f_v_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m4( @@ -202,7 +202,7 @@ vuint16m4_t test_vfcvt_xu_f_v_u16m4(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4(vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m4(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m8( @@ -211,7 +211,7 @@ vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_xu_f_v_u16m8(vfloat16m8_t src, size_t vl) { - return vfcvt_xu_f_v_u16m8(src, vl); + return __riscv_vfcvt_xu_f_v_u16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m8( @@ -220,7 +220,7 @@ vuint16m8_t test_vfcvt_xu_f_v_u16m8(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8(vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m8(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf4( @@ -229,7 +229,7 @@ vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_x_v_f16mf4(vint16mf4_t src, size_t vl) { - return vfcvt_f_x_v_f16mf4(src, vl); + return __riscv_vfcvt_f_x_v_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf2( @@ -238,7 +238,7 @@ vfloat16mf4_t test_vfcvt_f_x_v_f16mf4(vint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_x_v_f16mf2(vint16mf2_t src, size_t vl) { - return vfcvt_f_x_v_f16mf2(src, vl); + return __riscv_vfcvt_f_x_v_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m1( @@ -247,7 +247,7 @@ vfloat16mf2_t test_vfcvt_f_x_v_f16mf2(vint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_x_v_f16m1(vint16m1_t src, size_t vl) { - return vfcvt_f_x_v_f16m1(src, vl); + return __riscv_vfcvt_f_x_v_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m2( @@ -256,7 +256,7 @@ vfloat16m1_t test_vfcvt_f_x_v_f16m1(vint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_x_v_f16m2(vint16m2_t src, size_t vl) { - return vfcvt_f_x_v_f16m2(src, vl); + return __riscv_vfcvt_f_x_v_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m4( @@ -265,7 +265,7 @@ vfloat16m2_t test_vfcvt_f_x_v_f16m2(vint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_x_v_f16m4(vint16m4_t src, size_t vl) { - return vfcvt_f_x_v_f16m4(src, vl); + return __riscv_vfcvt_f_x_v_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m8( @@ -274,7 +274,7 @@ vfloat16m4_t test_vfcvt_f_x_v_f16m4(vint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_x_v_f16m8(vint16m8_t src, size_t vl) { - return vfcvt_f_x_v_f16m8(src, vl); + return __riscv_vfcvt_f_x_v_f16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf4( @@ -283,7 +283,7 @@ vfloat16m8_t test_vfcvt_f_x_v_f16m8(vint16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4(vuint16mf4_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf4(src, vl); + return __riscv_vfcvt_f_xu_v_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf2( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4(vuint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2(vuint16mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf2(src, vl); + return __riscv_vfcvt_f_xu_v_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m1( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2(vuint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_xu_v_f16m1(vuint16m1_t src, size_t vl) { - return vfcvt_f_xu_v_f16m1(src, vl); + return __riscv_vfcvt_f_xu_v_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m2( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfcvt_f_xu_v_f16m1(vuint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_xu_v_f16m2(vuint16m2_t src, size_t vl) { - return vfcvt_f_xu_v_f16m2(src, vl); + return __riscv_vfcvt_f_xu_v_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m4( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfcvt_f_xu_v_f16m2(vuint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_xu_v_f16m4(vuint16m4_t src, size_t vl) { - return vfcvt_f_xu_v_f16m4(src, vl); + return __riscv_vfcvt_f_xu_v_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m8( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfcvt_f_xu_v_f16m4(vuint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_xu_v_f16m8(vuint16m8_t src, size_t vl) { - return vfcvt_f_xu_v_f16m8(src, vl); + return __riscv_vfcvt_f_xu_v_f16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32mf2( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfcvt_f_xu_v_f16m8(vuint16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_x_f_v_i32mf2(vfloat32mf2_t src, size_t vl) { - return vfcvt_x_f_v_i32mf2(src, vl); + return __riscv_vfcvt_x_f_v_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32mf2( @@ -346,7 +346,7 @@ vint32mf2_t test_vfcvt_x_f_v_i32mf2(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2(vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32mf2(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m1( @@ -355,7 +355,7 @@ vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_x_f_v_i32m1(vfloat32m1_t src, size_t vl) { - return vfcvt_x_f_v_i32m1(src, vl); + return __riscv_vfcvt_x_f_v_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m1( @@ -364,7 +364,7 @@ vint32m1_t test_vfcvt_x_f_v_i32m1(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_rtz_x_f_v_i32m1(vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m1(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m2( @@ -373,7 +373,7 @@ vint32m1_t test_vfcvt_rtz_x_f_v_i32m1(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_x_f_v_i32m2(vfloat32m2_t src, size_t vl) { - return vfcvt_x_f_v_i32m2(src, vl); + return __riscv_vfcvt_x_f_v_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m2( @@ -382,7 +382,7 @@ vint32m2_t test_vfcvt_x_f_v_i32m2(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_rtz_x_f_v_i32m2(vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m2(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m4( @@ -391,7 +391,7 @@ vint32m2_t test_vfcvt_rtz_x_f_v_i32m2(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_x_f_v_i32m4(vfloat32m4_t src, size_t vl) { - return vfcvt_x_f_v_i32m4(src, vl); + return __riscv_vfcvt_x_f_v_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m4( @@ -400,7 +400,7 @@ vint32m4_t test_vfcvt_x_f_v_i32m4(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_rtz_x_f_v_i32m4(vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m4(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m8( @@ -409,7 +409,7 @@ vint32m4_t test_vfcvt_rtz_x_f_v_i32m4(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_x_f_v_i32m8(vfloat32m8_t src, size_t vl) { - return vfcvt_x_f_v_i32m8(src, vl); + return __riscv_vfcvt_x_f_v_i32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m8( @@ -418,7 +418,7 @@ vint32m8_t test_vfcvt_x_f_v_i32m8(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_rtz_x_f_v_i32m8(vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m8(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32mf2( @@ -427,7 +427,7 @@ vint32m8_t test_vfcvt_rtz_x_f_v_i32m8(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_xu_f_v_u32mf2(vfloat32mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u32mf2(src, vl); + return __riscv_vfcvt_xu_f_v_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32mf2( @@ -436,7 +436,7 @@ vuint32mf2_t test_vfcvt_xu_f_v_u32mf2(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2(vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32mf2(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m1( @@ -445,7 +445,7 @@ vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_xu_f_v_u32m1(vfloat32m1_t src, size_t vl) { - return vfcvt_xu_f_v_u32m1(src, vl); + return __riscv_vfcvt_xu_f_v_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m1( @@ -454,7 +454,7 @@ vuint32m1_t test_vfcvt_xu_f_v_u32m1(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1(vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m1(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m2( @@ -463,7 +463,7 @@ vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_xu_f_v_u32m2(vfloat32m2_t src, size_t vl) { - return vfcvt_xu_f_v_u32m2(src, vl); + return __riscv_vfcvt_xu_f_v_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m2( @@ -472,7 +472,7 @@ vuint32m2_t test_vfcvt_xu_f_v_u32m2(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2(vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m2(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m4( @@ -481,7 +481,7 @@ vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_xu_f_v_u32m4(vfloat32m4_t src, size_t vl) { - return vfcvt_xu_f_v_u32m4(src, vl); + return __riscv_vfcvt_xu_f_v_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m4( @@ -490,7 +490,7 @@ vuint32m4_t test_vfcvt_xu_f_v_u32m4(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4(vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m4(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m8( @@ -499,7 +499,7 @@ vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_xu_f_v_u32m8(vfloat32m8_t src, size_t vl) { - return vfcvt_xu_f_v_u32m8(src, vl); + return __riscv_vfcvt_xu_f_v_u32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m8( @@ -508,7 +508,7 @@ vuint32m8_t test_vfcvt_xu_f_v_u32m8(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8(vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m8(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32mf2( @@ -517,7 +517,7 @@ vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_x_v_f32mf2(vint32mf2_t src, size_t vl) { - return vfcvt_f_x_v_f32mf2(src, vl); + return __riscv_vfcvt_f_x_v_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m1( @@ -526,7 +526,7 @@ vfloat32mf2_t test_vfcvt_f_x_v_f32mf2(vint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_x_v_f32m1(vint32m1_t src, size_t vl) { - return vfcvt_f_x_v_f32m1(src, vl); + return __riscv_vfcvt_f_x_v_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m2( @@ -535,7 +535,7 @@ vfloat32m1_t test_vfcvt_f_x_v_f32m1(vint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_x_v_f32m2(vint32m2_t src, size_t vl) { - return vfcvt_f_x_v_f32m2(src, vl); + return __riscv_vfcvt_f_x_v_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m4( @@ -544,7 +544,7 @@ vfloat32m2_t test_vfcvt_f_x_v_f32m2(vint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_x_v_f32m4(vint32m4_t src, size_t vl) { - return vfcvt_f_x_v_f32m4(src, vl); + return __riscv_vfcvt_f_x_v_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m8( @@ -553,7 +553,7 @@ vfloat32m4_t test_vfcvt_f_x_v_f32m4(vint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_x_v_f32m8(vint32m8_t src, size_t vl) { - return vfcvt_f_x_v_f32m8(src, vl); + return __riscv_vfcvt_f_x_v_f32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32mf2( @@ -562,7 +562,7 @@ vfloat32m8_t test_vfcvt_f_x_v_f32m8(vint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2(vuint32mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f32mf2(src, vl); + return __riscv_vfcvt_f_xu_v_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m1( @@ -571,7 +571,7 @@ vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2(vuint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_xu_v_f32m1(vuint32m1_t src, size_t vl) { - return vfcvt_f_xu_v_f32m1(src, vl); + return __riscv_vfcvt_f_xu_v_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m2( @@ -580,7 +580,7 @@ vfloat32m1_t test_vfcvt_f_xu_v_f32m1(vuint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_xu_v_f32m2(vuint32m2_t src, size_t vl) { - return vfcvt_f_xu_v_f32m2(src, vl); + return __riscv_vfcvt_f_xu_v_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m4( @@ -589,7 +589,7 @@ vfloat32m2_t test_vfcvt_f_xu_v_f32m2(vuint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_xu_v_f32m4(vuint32m4_t src, size_t vl) { - return vfcvt_f_xu_v_f32m4(src, vl); + return __riscv_vfcvt_f_xu_v_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m8( @@ -598,7 +598,7 @@ vfloat32m4_t test_vfcvt_f_xu_v_f32m4(vuint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_xu_v_f32m8(vuint32m8_t src, size_t vl) { - return vfcvt_f_xu_v_f32m8(src, vl); + return __riscv_vfcvt_f_xu_v_f32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m1( @@ -607,7 +607,7 @@ vfloat32m8_t test_vfcvt_f_xu_v_f32m8(vuint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_x_f_v_i64m1(vfloat64m1_t src, size_t vl) { - return vfcvt_x_f_v_i64m1(src, vl); + return __riscv_vfcvt_x_f_v_i64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m1( @@ -616,7 +616,7 @@ vint64m1_t test_vfcvt_x_f_v_i64m1(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_rtz_x_f_v_i64m1(vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m1(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m2( @@ -625,7 +625,7 @@ vint64m1_t test_vfcvt_rtz_x_f_v_i64m1(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_x_f_v_i64m2(vfloat64m2_t src, size_t vl) { - return vfcvt_x_f_v_i64m2(src, vl); + return __riscv_vfcvt_x_f_v_i64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m2( @@ -634,7 +634,7 @@ vint64m2_t test_vfcvt_x_f_v_i64m2(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_rtz_x_f_v_i64m2(vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m2(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m4( @@ -643,7 +643,7 @@ vint64m2_t test_vfcvt_rtz_x_f_v_i64m2(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_x_f_v_i64m4(vfloat64m4_t src, size_t vl) { - return vfcvt_x_f_v_i64m4(src, vl); + return __riscv_vfcvt_x_f_v_i64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m4( @@ -652,7 +652,7 @@ vint64m4_t test_vfcvt_x_f_v_i64m4(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_rtz_x_f_v_i64m4(vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m4(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m8( @@ -661,7 +661,7 @@ vint64m4_t test_vfcvt_rtz_x_f_v_i64m4(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_x_f_v_i64m8(vfloat64m8_t src, size_t vl) { - return vfcvt_x_f_v_i64m8(src, vl); + return __riscv_vfcvt_x_f_v_i64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m8( @@ -670,7 +670,7 @@ vint64m8_t test_vfcvt_x_f_v_i64m8(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_rtz_x_f_v_i64m8(vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m8(src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m1( @@ -679,7 +679,7 @@ vint64m8_t test_vfcvt_rtz_x_f_v_i64m8(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_xu_f_v_u64m1(vfloat64m1_t src, size_t vl) { - return vfcvt_xu_f_v_u64m1(src, vl); + return __riscv_vfcvt_xu_f_v_u64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m1( @@ -688,7 +688,7 @@ vuint64m1_t test_vfcvt_xu_f_v_u64m1(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1(vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m1(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m2( @@ -697,7 +697,7 @@ vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_xu_f_v_u64m2(vfloat64m2_t src, size_t vl) { - return vfcvt_xu_f_v_u64m2(src, vl); + return __riscv_vfcvt_xu_f_v_u64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m2( @@ -706,7 +706,7 @@ vuint64m2_t test_vfcvt_xu_f_v_u64m2(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2(vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m2(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m4( @@ -715,7 +715,7 @@ vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_xu_f_v_u64m4(vfloat64m4_t src, size_t vl) { - return vfcvt_xu_f_v_u64m4(src, vl); + return __riscv_vfcvt_xu_f_v_u64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m4( @@ -724,7 +724,7 @@ vuint64m4_t test_vfcvt_xu_f_v_u64m4(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4(vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m4(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m8( @@ -733,7 +733,7 @@ vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_xu_f_v_u64m8(vfloat64m8_t src, size_t vl) { - return vfcvt_xu_f_v_u64m8(src, vl); + return __riscv_vfcvt_xu_f_v_u64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m8( @@ -742,7 +742,7 @@ vuint64m8_t test_vfcvt_xu_f_v_u64m8(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8(vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m8(src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m1( @@ -751,7 +751,7 @@ vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_x_v_f64m1(vint64m1_t src, size_t vl) { - return vfcvt_f_x_v_f64m1(src, vl); + return __riscv_vfcvt_f_x_v_f64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m2( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfcvt_f_x_v_f64m1(vint64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_x_v_f64m2(vint64m2_t src, size_t vl) { - return vfcvt_f_x_v_f64m2(src, vl); + return __riscv_vfcvt_f_x_v_f64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m4( @@ -769,7 +769,7 @@ vfloat64m2_t test_vfcvt_f_x_v_f64m2(vint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_x_v_f64m4(vint64m4_t src, size_t vl) { - return vfcvt_f_x_v_f64m4(src, vl); + return __riscv_vfcvt_f_x_v_f64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m8( @@ -778,7 +778,7 @@ vfloat64m4_t test_vfcvt_f_x_v_f64m4(vint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_x_v_f64m8(vint64m8_t src, size_t vl) { - return vfcvt_f_x_v_f64m8(src, vl); + return __riscv_vfcvt_f_x_v_f64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m1( @@ -787,7 +787,7 @@ vfloat64m8_t test_vfcvt_f_x_v_f64m8(vint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_xu_v_f64m1(vuint64m1_t src, size_t vl) { - return vfcvt_f_xu_v_f64m1(src, vl); + return __riscv_vfcvt_f_xu_v_f64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m2( @@ -796,7 +796,7 @@ vfloat64m1_t test_vfcvt_f_xu_v_f64m1(vuint64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_xu_v_f64m2(vuint64m2_t src, size_t vl) { - return vfcvt_f_xu_v_f64m2(src, vl); + return __riscv_vfcvt_f_xu_v_f64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m4( @@ -805,7 +805,7 @@ vfloat64m2_t test_vfcvt_f_xu_v_f64m2(vuint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_xu_v_f64m4(vuint64m4_t src, size_t vl) { - return vfcvt_f_xu_v_f64m4(src, vl); + return __riscv_vfcvt_f_xu_v_f64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m8( @@ -814,7 +814,7 @@ vfloat64m4_t test_vfcvt_f_xu_v_f64m4(vuint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_xu_v_f64m8(vuint64m8_t src, size_t vl) { - return vfcvt_f_xu_v_f64m8(src, vl); + return __riscv_vfcvt_f_xu_v_f64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf4_m( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfcvt_f_xu_v_f64m8(vuint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_x_f_v_i16mf4_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfcvt_x_f_v_i16mf4_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf4_m( @@ -832,7 +832,7 @@ vint16mf4_t test_vfcvt_x_f_v_i16mf4_m(vbool64_t mask, vfloat16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf4_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf2_m( @@ -841,7 +841,7 @@ vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_m(vbool64_t mask, vfloat16mf4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_x_f_v_i16mf2_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfcvt_x_f_v_i16mf2_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf2_m( @@ -850,7 +850,7 @@ vint16mf2_t test_vfcvt_x_f_v_i16mf2_m(vbool32_t mask, vfloat16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf2_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m1_m( @@ -859,7 +859,7 @@ vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_m(vbool32_t mask, vfloat16mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_x_f_v_i16m1_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfcvt_x_f_v_i16m1_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m1_m( @@ -868,7 +868,7 @@ vint16m1_t test_vfcvt_x_f_v_i16m1_m(vbool16_t mask, vfloat16m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m1_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m2_m( @@ -877,7 +877,7 @@ vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_m(vbool16_t mask, vfloat16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_x_f_v_i16m2_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfcvt_x_f_v_i16m2_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m2_m( @@ -886,7 +886,7 @@ vint16m2_t test_vfcvt_x_f_v_i16m2_m(vbool8_t mask, vfloat16m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m2_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m4_m( @@ -895,7 +895,7 @@ vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_m(vbool8_t mask, vfloat16m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_x_f_v_i16m4_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfcvt_x_f_v_i16m4_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m4_m( @@ -904,7 +904,7 @@ vint16m4_t test_vfcvt_x_f_v_i16m4_m(vbool4_t mask, vfloat16m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m4_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m8_m( @@ -913,7 +913,7 @@ vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_m(vbool4_t mask, vfloat16m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_x_f_v_i16m8_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { - return vfcvt_x_f_v_i16m8_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m8_m( @@ -922,7 +922,7 @@ vint16m8_t test_vfcvt_x_f_v_i16m8_m(vbool2_t mask, vfloat16m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m8_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf4_m( @@ -931,7 +931,7 @@ vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_m(vbool2_t mask, vfloat16m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf4_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf4_m( @@ -940,7 +940,7 @@ vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_m(vbool64_t mask, vfloat16mf4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf4_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf2_m( @@ -949,7 +949,7 @@ vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_m(vbool64_t mask, vfloat16mf4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf2_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf2_m( @@ -958,7 +958,7 @@ vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_m(vbool32_t mask, vfloat16mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf2_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m1_m( @@ -967,7 +967,7 @@ vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_m(vbool32_t mask, vfloat16mf2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_xu_f_v_u16m1_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfcvt_xu_f_v_u16m1_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m1_m( @@ -976,7 +976,7 @@ vuint16m1_t test_vfcvt_xu_f_v_u16m1_m(vbool16_t mask, vfloat16m1_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m1_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m2_m( @@ -985,7 +985,7 @@ vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_m(vbool16_t mask, vfloat16m1_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_xu_f_v_u16m2_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfcvt_xu_f_v_u16m2_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m2_m( @@ -994,7 +994,7 @@ vuint16m2_t test_vfcvt_xu_f_v_u16m2_m(vbool8_t mask, vfloat16m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m2_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m4_m( @@ -1003,7 +1003,7 @@ vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_m(vbool8_t mask, vfloat16m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_xu_f_v_u16m4_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfcvt_xu_f_v_u16m4_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m4_m( @@ -1012,7 +1012,7 @@ vuint16m4_t test_vfcvt_xu_f_v_u16m4_m(vbool4_t mask, vfloat16m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m4_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m8_m( @@ -1021,7 +1021,7 @@ vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_m(vbool4_t mask, vfloat16m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_xu_f_v_u16m8_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { - return vfcvt_xu_f_v_u16m8_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m8_m( @@ -1030,7 +1030,7 @@ vuint16m8_t test_vfcvt_xu_f_v_u16m8_m(vbool2_t mask, vfloat16m8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m8_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf4_m( @@ -1039,7 +1039,7 @@ vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_m(vbool2_t mask, vfloat16m8_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_m(vbool64_t mask, vint16mf4_t src, size_t vl) { - return vfcvt_f_x_v_f16mf4_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf2_m( @@ -1048,7 +1048,7 @@ vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_m(vbool64_t mask, vint16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_m(vbool32_t mask, vint16mf2_t src, size_t vl) { - return vfcvt_f_x_v_f16mf2_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m1_m( @@ -1057,7 +1057,7 @@ vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_m(vbool32_t mask, vint16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_x_v_f16m1_m(vbool16_t mask, vint16m1_t src, size_t vl) { - return vfcvt_f_x_v_f16m1_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m2_m( @@ -1066,7 +1066,7 @@ vfloat16m1_t test_vfcvt_f_x_v_f16m1_m(vbool16_t mask, vint16m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_x_v_f16m2_m(vbool8_t mask, vint16m2_t src, size_t vl) { - return vfcvt_f_x_v_f16m2_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m4_m( @@ -1075,7 +1075,7 @@ vfloat16m2_t test_vfcvt_f_x_v_f16m2_m(vbool8_t mask, vint16m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_x_v_f16m4_m(vbool4_t mask, vint16m4_t src, size_t vl) { - return vfcvt_f_x_v_f16m4_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m8_m( @@ -1084,7 +1084,7 @@ vfloat16m4_t test_vfcvt_f_x_v_f16m4_m(vbool4_t mask, vint16m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_x_v_f16m8_m(vbool2_t mask, vint16m8_t src, size_t vl) { - return vfcvt_f_x_v_f16m8_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf4_m( @@ -1093,7 +1093,7 @@ vfloat16m8_t test_vfcvt_f_x_v_f16m8_m(vbool2_t mask, vint16m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_m(vbool64_t mask, vuint16mf4_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf4_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf2_m( @@ -1102,7 +1102,7 @@ vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_m(vbool64_t mask, vuint16mf4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_m(vbool32_t mask, vuint16mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf2_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m1_m( @@ -1111,7 +1111,7 @@ vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_m(vbool32_t mask, vuint16mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_xu_v_f16m1_m(vbool16_t mask, vuint16m1_t src, size_t vl) { - return vfcvt_f_xu_v_f16m1_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m2_m( @@ -1120,7 +1120,7 @@ vfloat16m1_t test_vfcvt_f_xu_v_f16m1_m(vbool16_t mask, vuint16m1_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_xu_v_f16m2_m(vbool8_t mask, vuint16m2_t src, size_t vl) { - return vfcvt_f_xu_v_f16m2_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m4_m( @@ -1129,7 +1129,7 @@ vfloat16m2_t test_vfcvt_f_xu_v_f16m2_m(vbool8_t mask, vuint16m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_xu_v_f16m4_m(vbool4_t mask, vuint16m4_t src, size_t vl) { - return vfcvt_f_xu_v_f16m4_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m8_m( @@ -1138,7 +1138,7 @@ vfloat16m4_t test_vfcvt_f_xu_v_f16m4_m(vbool4_t mask, vuint16m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_xu_v_f16m8_m(vbool2_t mask, vuint16m8_t src, size_t vl) { - return vfcvt_f_xu_v_f16m8_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32mf2_m( @@ -1147,7 +1147,7 @@ vfloat16m8_t test_vfcvt_f_xu_v_f16m8_m(vbool2_t mask, vuint16m8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_x_f_v_i32mf2_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfcvt_x_f_v_i32mf2_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32mf2_m( @@ -1156,7 +1156,7 @@ vint32mf2_t test_vfcvt_x_f_v_i32mf2_m(vbool64_t mask, vfloat32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32mf2_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m1_m( @@ -1165,7 +1165,7 @@ vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_m(vbool64_t mask, vfloat32mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_x_f_v_i32m1_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfcvt_x_f_v_i32m1_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m1_m( @@ -1174,7 +1174,7 @@ vint32m1_t test_vfcvt_x_f_v_i32m1_m(vbool32_t mask, vfloat32m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m1_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m2_m( @@ -1183,7 +1183,7 @@ vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_m(vbool32_t mask, vfloat32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_x_f_v_i32m2_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfcvt_x_f_v_i32m2_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m2_m( @@ -1192,7 +1192,7 @@ vint32m2_t test_vfcvt_x_f_v_i32m2_m(vbool16_t mask, vfloat32m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m2_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m4_m( @@ -1201,7 +1201,7 @@ vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_m(vbool16_t mask, vfloat32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_x_f_v_i32m4_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfcvt_x_f_v_i32m4_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m4_m( @@ -1210,7 +1210,7 @@ vint32m4_t test_vfcvt_x_f_v_i32m4_m(vbool8_t mask, vfloat32m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m4_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m8_m( @@ -1219,7 +1219,7 @@ vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_m(vbool8_t mask, vfloat32m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_x_f_v_i32m8_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfcvt_x_f_v_i32m8_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m8_m( @@ -1228,7 +1228,7 @@ vint32m8_t test_vfcvt_x_f_v_i32m8_m(vbool4_t mask, vfloat32m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m8_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32mf2_m( @@ -1237,7 +1237,7 @@ vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_m(vbool4_t mask, vfloat32m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u32mf2_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32mf2_m( @@ -1246,7 +1246,7 @@ vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_m(vbool64_t mask, vfloat32mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32mf2_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m1_m( @@ -1255,7 +1255,7 @@ vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_m(vbool64_t mask, vfloat32mf2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_xu_f_v_u32m1_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfcvt_xu_f_v_u32m1_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m1_m( @@ -1264,7 +1264,7 @@ vuint32m1_t test_vfcvt_xu_f_v_u32m1_m(vbool32_t mask, vfloat32m1_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m1_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m2_m( @@ -1273,7 +1273,7 @@ vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_m(vbool32_t mask, vfloat32m1_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_xu_f_v_u32m2_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfcvt_xu_f_v_u32m2_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m2_m( @@ -1282,7 +1282,7 @@ vuint32m2_t test_vfcvt_xu_f_v_u32m2_m(vbool16_t mask, vfloat32m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m2_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m4_m( @@ -1291,7 +1291,7 @@ vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_m(vbool16_t mask, vfloat32m2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_xu_f_v_u32m4_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfcvt_xu_f_v_u32m4_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m4_m( @@ -1300,7 +1300,7 @@ vuint32m4_t test_vfcvt_xu_f_v_u32m4_m(vbool8_t mask, vfloat32m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m4_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m8_m( @@ -1309,7 +1309,7 @@ vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_m(vbool8_t mask, vfloat32m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_xu_f_v_u32m8_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfcvt_xu_f_v_u32m8_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m8_m( @@ -1318,7 +1318,7 @@ vuint32m8_t test_vfcvt_xu_f_v_u32m8_m(vbool4_t mask, vfloat32m8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m8_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32mf2_m( @@ -1327,7 +1327,7 @@ vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_m(vbool4_t mask, vfloat32m8_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_m(vbool64_t mask, vint32mf2_t src, size_t vl) { - return vfcvt_f_x_v_f32mf2_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m1_m( @@ -1336,7 +1336,7 @@ vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_m(vbool64_t mask, vint32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_x_v_f32m1_m(vbool32_t mask, vint32m1_t src, size_t vl) { - return vfcvt_f_x_v_f32m1_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m2_m( @@ -1345,7 +1345,7 @@ vfloat32m1_t test_vfcvt_f_x_v_f32m1_m(vbool32_t mask, vint32m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_x_v_f32m2_m(vbool16_t mask, vint32m2_t src, size_t vl) { - return vfcvt_f_x_v_f32m2_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m4_m( @@ -1354,7 +1354,7 @@ vfloat32m2_t test_vfcvt_f_x_v_f32m2_m(vbool16_t mask, vint32m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_x_v_f32m4_m(vbool8_t mask, vint32m4_t src, size_t vl) { - return vfcvt_f_x_v_f32m4_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m8_m( @@ -1363,7 +1363,7 @@ vfloat32m4_t test_vfcvt_f_x_v_f32m4_m(vbool8_t mask, vint32m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_x_v_f32m8_m(vbool4_t mask, vint32m8_t src, size_t vl) { - return vfcvt_f_x_v_f32m8_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32mf2_m( @@ -1372,7 +1372,7 @@ vfloat32m8_t test_vfcvt_f_x_v_f32m8_m(vbool4_t mask, vint32m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_m(vbool64_t mask, vuint32mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f32mf2_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m1_m( @@ -1381,7 +1381,7 @@ vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_m(vbool64_t mask, vuint32mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_xu_v_f32m1_m(vbool32_t mask, vuint32m1_t src, size_t vl) { - return vfcvt_f_xu_v_f32m1_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m2_m( @@ -1390,7 +1390,7 @@ vfloat32m1_t test_vfcvt_f_xu_v_f32m1_m(vbool32_t mask, vuint32m1_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_xu_v_f32m2_m(vbool16_t mask, vuint32m2_t src, size_t vl) { - return vfcvt_f_xu_v_f32m2_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m4_m( @@ -1399,7 +1399,7 @@ vfloat32m2_t test_vfcvt_f_xu_v_f32m2_m(vbool16_t mask, vuint32m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_xu_v_f32m4_m(vbool8_t mask, vuint32m4_t src, size_t vl) { - return vfcvt_f_xu_v_f32m4_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m8_m( @@ -1408,7 +1408,7 @@ vfloat32m4_t test_vfcvt_f_xu_v_f32m4_m(vbool8_t mask, vuint32m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_xu_v_f32m8_m(vbool4_t mask, vuint32m8_t src, size_t vl) { - return vfcvt_f_xu_v_f32m8_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m1_m( @@ -1417,7 +1417,7 @@ vfloat32m8_t test_vfcvt_f_xu_v_f32m8_m(vbool4_t mask, vuint32m8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_x_f_v_i64m1_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfcvt_x_f_v_i64m1_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m1_m( @@ -1426,7 +1426,7 @@ vint64m1_t test_vfcvt_x_f_v_i64m1_m(vbool64_t mask, vfloat64m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m1_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m2_m( @@ -1435,7 +1435,7 @@ vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_m(vbool64_t mask, vfloat64m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_x_f_v_i64m2_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfcvt_x_f_v_i64m2_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m2_m( @@ -1444,7 +1444,7 @@ vint64m2_t test_vfcvt_x_f_v_i64m2_m(vbool32_t mask, vfloat64m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m2_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m4_m( @@ -1453,7 +1453,7 @@ vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_m(vbool32_t mask, vfloat64m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_x_f_v_i64m4_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfcvt_x_f_v_i64m4_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m4_m( @@ -1462,7 +1462,7 @@ vint64m4_t test_vfcvt_x_f_v_i64m4_m(vbool16_t mask, vfloat64m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m4_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m8_m( @@ -1471,7 +1471,7 @@ vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_m(vbool16_t mask, vfloat64m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_x_f_v_i64m8_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfcvt_x_f_v_i64m8_m(mask, src, vl); + return __riscv_vfcvt_x_f_v_i64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m8_m( @@ -1480,7 +1480,7 @@ vint64m8_t test_vfcvt_x_f_v_i64m8_m(vbool8_t mask, vfloat64m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m8_m(mask, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m1_m( @@ -1489,7 +1489,7 @@ vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_m(vbool8_t mask, vfloat64m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_xu_f_v_u64m1_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfcvt_xu_f_v_u64m1_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m1_m( @@ -1498,7 +1498,7 @@ vuint64m1_t test_vfcvt_xu_f_v_u64m1_m(vbool64_t mask, vfloat64m1_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m1_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m2_m( @@ -1507,7 +1507,7 @@ vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_m(vbool64_t mask, vfloat64m1_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_xu_f_v_u64m2_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfcvt_xu_f_v_u64m2_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m2_m( @@ -1516,7 +1516,7 @@ vuint64m2_t test_vfcvt_xu_f_v_u64m2_m(vbool32_t mask, vfloat64m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m2_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m4_m( @@ -1525,7 +1525,7 @@ vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_m(vbool32_t mask, vfloat64m2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_xu_f_v_u64m4_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfcvt_xu_f_v_u64m4_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m4_m( @@ -1534,7 +1534,7 @@ vuint64m4_t test_vfcvt_xu_f_v_u64m4_m(vbool16_t mask, vfloat64m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m4_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m8_m( @@ -1543,7 +1543,7 @@ vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_m(vbool16_t mask, vfloat64m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_xu_f_v_u64m8_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfcvt_xu_f_v_u64m8_m(mask, src, vl); + return __riscv_vfcvt_xu_f_v_u64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m8_m( @@ -1552,7 +1552,7 @@ vuint64m8_t test_vfcvt_xu_f_v_u64m8_m(vbool8_t mask, vfloat64m8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m8_m(mask, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m1_m( @@ -1561,7 +1561,7 @@ vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_m(vbool8_t mask, vfloat64m8_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_x_v_f64m1_m(vbool64_t mask, vint64m1_t src, size_t vl) { - return vfcvt_f_x_v_f64m1_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m2_m( @@ -1570,7 +1570,7 @@ vfloat64m1_t test_vfcvt_f_x_v_f64m1_m(vbool64_t mask, vint64m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_x_v_f64m2_m(vbool32_t mask, vint64m2_t src, size_t vl) { - return vfcvt_f_x_v_f64m2_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m4_m( @@ -1579,7 +1579,7 @@ vfloat64m2_t test_vfcvt_f_x_v_f64m2_m(vbool32_t mask, vint64m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_x_v_f64m4_m(vbool16_t mask, vint64m4_t src, size_t vl) { - return vfcvt_f_x_v_f64m4_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m8_m( @@ -1588,7 +1588,7 @@ vfloat64m4_t test_vfcvt_f_x_v_f64m4_m(vbool16_t mask, vint64m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_x_v_f64m8_m(vbool8_t mask, vint64m8_t src, size_t vl) { - return vfcvt_f_x_v_f64m8_m(mask, src, vl); + return __riscv_vfcvt_f_x_v_f64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m1_m( @@ -1597,7 +1597,7 @@ vfloat64m8_t test_vfcvt_f_x_v_f64m8_m(vbool8_t mask, vint64m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_xu_v_f64m1_m(vbool64_t mask, vuint64m1_t src, size_t vl) { - return vfcvt_f_xu_v_f64m1_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m2_m( @@ -1606,7 +1606,7 @@ vfloat64m1_t test_vfcvt_f_xu_v_f64m1_m(vbool64_t mask, vuint64m1_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_xu_v_f64m2_m(vbool32_t mask, vuint64m2_t src, size_t vl) { - return vfcvt_f_xu_v_f64m2_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m4_m( @@ -1615,7 +1615,7 @@ vfloat64m2_t test_vfcvt_f_xu_v_f64m2_m(vbool32_t mask, vuint64m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_xu_v_f64m4_m(vbool16_t mask, vuint64m4_t src, size_t vl) { - return vfcvt_f_xu_v_f64m4_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m8_m( @@ -1624,6 +1624,6 @@ vfloat64m4_t test_vfcvt_f_xu_v_f64m4_m(vbool16_t mask, vuint64m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_xu_v_f64m8_m(vbool8_t mask, vuint64m8_t src, size_t vl) { - return vfcvt_f_xu_v_f64m8_m(mask, src, vl); + return __riscv_vfcvt_f_xu_v_f64m8_m(mask, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfdiv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfdiv.c index 02c762280f4385062ca6e0062a427fab2bd27a7f..4dd1a0d763e9efcb73e4fd703003733fad9f5d1f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfdiv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfdiv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfdiv_vv_f16mf4(op1, op2, vl); + return __riscv_vfdiv_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfdiv_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf4(op1, op2, vl); + return __riscv_vfdiv_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfdiv_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfdiv_vv_f16mf2(op1, op2, vl); + return __riscv_vfdiv_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfdiv_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf2(op1, op2, vl); + return __riscv_vfdiv_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfdiv_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfdiv_vv_f16m1(op1, op2, vl); + return __riscv_vfdiv_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfdiv_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m1(op1, op2, vl); + return __riscv_vfdiv_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfdiv_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfdiv_vv_f16m2(op1, op2, vl); + return __riscv_vfdiv_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfdiv_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m2(op1, op2, vl); + return __riscv_vfdiv_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfdiv_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfdiv_vv_f16m4(op1, op2, vl); + return __riscv_vfdiv_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfdiv_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m4(op1, op2, vl); + return __riscv_vfdiv_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfdiv_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfdiv_vv_f16m8(op1, op2, vl); + return __riscv_vfdiv_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfdiv_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m8(op1, op2, vl); + return __riscv_vfdiv_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfdiv_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfdiv_vv_f32mf2(op1, op2, vl); + return __riscv_vfdiv_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfdiv_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32mf2(op1, op2, vl); + return __riscv_vfdiv_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfdiv_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfdiv_vv_f32m1(op1, op2, vl); + return __riscv_vfdiv_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfdiv_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m1(op1, op2, vl); + return __riscv_vfdiv_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfdiv_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfdiv_vv_f32m2(op1, op2, vl); + return __riscv_vfdiv_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfdiv_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m2(op1, op2, vl); + return __riscv_vfdiv_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfdiv_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfdiv_vv_f32m4(op1, op2, vl); + return __riscv_vfdiv_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfdiv_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m4(op1, op2, vl); + return __riscv_vfdiv_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfdiv_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfdiv_vv_f32m8(op1, op2, vl); + return __riscv_vfdiv_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfdiv_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m8(op1, op2, vl); + return __riscv_vfdiv_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfdiv_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfdiv_vv_f64m1(op1, op2, vl); + return __riscv_vfdiv_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfdiv_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m1(op1, op2, vl); + return __riscv_vfdiv_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfdiv_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfdiv_vv_f64m2(op1, op2, vl); + return __riscv_vfdiv_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfdiv_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m2(op1, op2, vl); + return __riscv_vfdiv_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfdiv_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfdiv_vv_f64m4(op1, op2, vl); + return __riscv_vfdiv_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfdiv_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m4(op1, op2, vl); + return __riscv_vfdiv_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfdiv_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfdiv_vv_f64m8(op1, op2, vl); + return __riscv_vfdiv_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfdiv_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m8(op1, op2, vl); + return __riscv_vfdiv_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfdiv_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfdiv_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfdiv_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfdiv_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfdiv_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfdiv_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfdiv_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfdiv_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfdiv_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfdiv_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfdiv_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfdiv_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfdiv_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfdiv_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfdiv_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfdiv_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfdiv_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfdiv_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfdiv_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfdiv_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfdiv_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfdiv_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfdiv_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfdiv_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfdiv_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfdiv_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfdiv_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfdiv_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfdiv_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfdiv_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfdiv_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfdiv_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfdiv_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfdiv_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfdiv_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfdiv_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfdiv_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfdiv_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfdiv_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfdiv_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfdiv_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfdiv_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfdiv_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfdiv_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfdiv_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfdiv_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfdiv_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfirst.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfirst.c index 2b69a4a2b0de8c5d51f99ce083ade09f0121dd2b..5dbb93c8092e063b067edcfc2e6f835d981d9ce6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfirst.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfirst.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b1(vbool1_t op1, size_t vl) { - return vfirst_m_b1(op1, vl); + return __riscv_vfirst_m_b1(op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b2( @@ -21,7 +21,7 @@ long test_vfirst_m_b1(vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b2(vbool2_t op1, size_t vl) { - return vfirst_m_b2(op1, vl); + return __riscv_vfirst_m_b2(op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b4( @@ -30,7 +30,7 @@ long test_vfirst_m_b2(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b4(vbool4_t op1, size_t vl) { - return vfirst_m_b4(op1, vl); + return __riscv_vfirst_m_b4(op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b8( @@ -39,7 +39,7 @@ long test_vfirst_m_b4(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b8(vbool8_t op1, size_t vl) { - return vfirst_m_b8(op1, vl); + return __riscv_vfirst_m_b8(op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b16( @@ -48,7 +48,7 @@ long test_vfirst_m_b8(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b16(vbool16_t op1, size_t vl) { - return vfirst_m_b16(op1, vl); + return __riscv_vfirst_m_b16(op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b32( @@ -57,7 +57,7 @@ long test_vfirst_m_b16(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b32(vbool32_t op1, size_t vl) { - return vfirst_m_b32(op1, vl); + return __riscv_vfirst_m_b32(op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b64( @@ -66,7 +66,7 @@ long test_vfirst_m_b32(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b64(vbool64_t op1, size_t vl) { - return vfirst_m_b64(op1, vl); + return __riscv_vfirst_m_b64(op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b1_m( @@ -75,7 +75,7 @@ long test_vfirst_m_b64(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { - return vfirst_m_b1_m(mask, op1, vl); + return __riscv_vfirst_m_b1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b2_m( @@ -84,7 +84,7 @@ long test_vfirst_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { - return vfirst_m_b2_m(mask, op1, vl); + return __riscv_vfirst_m_b2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b4_m( @@ -93,7 +93,7 @@ long test_vfirst_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { - return vfirst_m_b4_m(mask, op1, vl); + return __riscv_vfirst_m_b4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b8_m( @@ -102,7 +102,7 @@ long test_vfirst_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return vfirst_m_b8_m(mask, op1, vl); + return __riscv_vfirst_m_b8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b16_m( @@ -111,7 +111,7 @@ long test_vfirst_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return vfirst_m_b16_m(mask, op1, vl); + return __riscv_vfirst_m_b16_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b32_m( @@ -120,7 +120,7 @@ long test_vfirst_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return vfirst_m_b32_m(mask, op1, vl); + return __riscv_vfirst_m_b32_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfirst_m_b64_m( @@ -129,6 +129,6 @@ long test_vfirst_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // long test_vfirst_m_b64_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return vfirst_m_b64_m(mask, op1, vl); + return __riscv_vfirst_m_b64_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmacc.c index 2994779079211cd1b06d0c312261078324a1af87..6047c3d9f7fd9e6a6cb5f6505e7be6b3e9aeda55 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vv_f16mf4(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmacc_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vf_f16mf4(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmacc_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vv_f16mf2(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmacc_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vf_f16mf2(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmacc_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vv_f16m1(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmacc_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vf_f16m1(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmacc_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vv_f16m2(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmacc_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vf_f16m2(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmacc_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vv_f16m4(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmacc_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vf_f16m4(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmacc_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vv_f16m8(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmacc_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vf_f16m8(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmacc_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmacc_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vf_f32mf2(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmacc_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmacc_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vf_f32m1(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmacc_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmacc_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vf_f32m2(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmacc_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmacc_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vf_f32m4(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmacc_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmacc_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vf_f32m8(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmacc_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmacc_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vf_f64m1(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmacc_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmacc_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vf_f64m2(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmacc_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmacc_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vf_f64m4(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmacc_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmacc_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vf_f64m8(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmacc_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vv_f16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmacc_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vf_f16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmacc_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vv_f16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmacc_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vf_f16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmacc_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vv_f16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmacc_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vf_f16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmacc_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vv_f16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmacc_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vf_f16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmacc_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vv_f16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmacc_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vf_f16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmacc_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vv_f16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmacc_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vf_f16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmacc_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmacc_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vf_f32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmacc_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmacc_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vf_f32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmacc_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmacc_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vf_f32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmacc_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmacc_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vf_f32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmacc_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmacc_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vf_f32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmacc_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vf_f64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmacc_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vf_f64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmacc_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmacc_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vf_f64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmacc_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfmacc_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vf_f64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmadd.c index 0dbaeb4e1dda865a5269daecb17788fa779a9096..5116621ea83dbe5750cd5b44f633c672fe0a5268 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vv_f16mf4(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmadd_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vf_f16mf4(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmadd_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vv_f16mf2(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmadd_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vf_f16mf2(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmadd_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vv_f16m1(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmadd_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vf_f16m1(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmadd_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vv_f16m2(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmadd_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vf_f16m2(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmadd_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vv_f16m4(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmadd_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vf_f16m4(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmadd_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vv_f16m8(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmadd_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vf_f16m8(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmadd_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmadd_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vf_f32mf2(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmadd_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmadd_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vf_f32m1(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmadd_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmadd_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vf_f32m2(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmadd_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmadd_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vf_f32m4(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmadd_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmadd_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vf_f32m8(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmadd_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmadd_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vf_f64m1(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmadd_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmadd_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vf_f64m2(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmadd_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmadd_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vf_f64m4(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmadd_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmadd_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vf_f64m8(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmadd_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vv_f16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmadd_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vf_f16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmadd_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vv_f16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmadd_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vf_f16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmadd_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vv_f16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmadd_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vf_f16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmadd_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vv_f16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmadd_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vf_f16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmadd_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vv_f16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmadd_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vf_f16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmadd_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vv_f16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmadd_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vf_f16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmadd_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmadd_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vf_f32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmadd_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmadd_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vf_f32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmadd_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmadd_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vf_f32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmadd_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmadd_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vf_f32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmadd_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmadd_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vf_f32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmadd_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmadd_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vf_f64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmadd_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmadd_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vf_f64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmadd_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmadd_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vf_f64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmadd_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfmadd_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vf_f64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmax.c index 5e6a7780c3d2be231eeb499e1f35fd9207cf62c6..8300813b6314a3fbea1136b24a2b8626c3502714 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmax.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmax.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmax_vv_f16mf4(op1, op2, vl); + return __riscv_vfmax_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmax_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf4(op1, op2, vl); + return __riscv_vfmax_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmax_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmax_vv_f16mf2(op1, op2, vl); + return __riscv_vfmax_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmax_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf2(op1, op2, vl); + return __riscv_vfmax_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmax_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmax_vv_f16m1(op1, op2, vl); + return __riscv_vfmax_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmax_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m1(op1, op2, vl); + return __riscv_vfmax_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmax_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmax_vv_f16m2(op1, op2, vl); + return __riscv_vfmax_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmax_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m2(op1, op2, vl); + return __riscv_vfmax_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmax_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmax_vv_f16m4(op1, op2, vl); + return __riscv_vfmax_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmax_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m4(op1, op2, vl); + return __riscv_vfmax_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmax_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmax_vv_f16m8(op1, op2, vl); + return __riscv_vfmax_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmax_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m8(op1, op2, vl); + return __riscv_vfmax_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmax_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmax_vv_f32mf2(op1, op2, vl); + return __riscv_vfmax_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmax_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfmax_vf_f32mf2(op1, op2, vl); + return __riscv_vfmax_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmax_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmax_vv_f32m1(op1, op2, vl); + return __riscv_vfmax_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmax_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfmax_vf_f32m1(op1, op2, vl); + return __riscv_vfmax_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmax_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmax_vv_f32m2(op1, op2, vl); + return __riscv_vfmax_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmax_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfmax_vf_f32m2(op1, op2, vl); + return __riscv_vfmax_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmax_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmax_vv_f32m4(op1, op2, vl); + return __riscv_vfmax_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmax_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfmax_vf_f32m4(op1, op2, vl); + return __riscv_vfmax_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmax_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmax_vv_f32m8(op1, op2, vl); + return __riscv_vfmax_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmax_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfmax_vf_f32m8(op1, op2, vl); + return __riscv_vfmax_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmax_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmax_vv_f64m1(op1, op2, vl); + return __riscv_vfmax_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmax_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfmax_vf_f64m1(op1, op2, vl); + return __riscv_vfmax_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmax_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmax_vv_f64m2(op1, op2, vl); + return __riscv_vfmax_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmax_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfmax_vf_f64m2(op1, op2, vl); + return __riscv_vfmax_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmax_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmax_vv_f64m4(op1, op2, vl); + return __riscv_vfmax_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmax_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfmax_vf_f64m4(op1, op2, vl); + return __riscv_vfmax_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmax_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmax_vv_f64m8(op1, op2, vl); + return __riscv_vfmax_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmax_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfmax_vf_f64m8(op1, op2, vl); + return __riscv_vfmax_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmax_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmax_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmax_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmax_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmax_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmax_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmax_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmax_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmax_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmax_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmax_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmax_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmax_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmax_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmax_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmax_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmax_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmax_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmax_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmax_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmax_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmax_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmax_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmax_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmax_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfmax_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmax_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmax_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmax_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfmax_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmax_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmax_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmax_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfmax_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmax_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmax_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmax_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfmax_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmax_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmax_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmax_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfmax_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmax_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmax_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmax_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfmax_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmax_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmax_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmax_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfmax_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmax_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmax_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfmax_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfmax_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfmax_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfmax_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmerge.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmerge.c index 29de4c1405320fe3de791809adc3f0c3bc2c3ef7..bd6a3d396c8b02c2f81987562f1bc1915acbb698 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmerge.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmerge.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmerge_vfm_f16mf4(vfloat16mf4_t op1, _Float16 op2, vbool64_t mask, size_t vl) { - return vfmerge_vfm_f16mf4(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmerge_vfm_f16mf4(vfloat16mf4_t op1, _Float16 op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmerge_vfm_f16mf2(vfloat16mf2_t op1, _Float16 op2, vbool32_t mask, size_t vl) { - return vfmerge_vfm_f16mf2(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfmerge_vfm_f16mf2(vfloat16mf2_t op1, _Float16 op2, vbool32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmerge_vfm_f16m1(vfloat16m1_t op1, _Float16 op2, vbool16_t mask, size_t vl) { - return vfmerge_vfm_f16m1(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfmerge_vfm_f16m1(vfloat16m1_t op1, _Float16 op2, vbool16_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmerge_vfm_f16m2(vfloat16m2_t op1, _Float16 op2, vbool8_t mask, size_t vl) { - return vfmerge_vfm_f16m2(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfmerge_vfm_f16m2(vfloat16m2_t op1, _Float16 op2, vbool8_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmerge_vfm_f16m4(vfloat16m4_t op1, _Float16 op2, vbool4_t mask, size_t vl) { - return vfmerge_vfm_f16m4(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfmerge_vfm_f16m4(vfloat16m4_t op1, _Float16 op2, vbool4_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmerge_vfm_f16m8(vfloat16m8_t op1, _Float16 op2, vbool2_t mask, size_t vl) { - return vfmerge_vfm_f16m8(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfmerge_vfm_f16m8(vfloat16m8_t op1, _Float16 op2, vbool2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmerge_vfm_f32mf2(vfloat32mf2_t op1, float op2, vbool64_t mask, size_t vl) { - return vfmerge_vfm_f32mf2(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfmerge_vfm_f32mf2(vfloat32mf2_t op1, float op2, vbool64_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmerge_vfm_f32m1(vfloat32m1_t op1, float op2, vbool32_t mask, size_t vl) { - return vfmerge_vfm_f32m1(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfmerge_vfm_f32m1(vfloat32m1_t op1, float op2, vbool32_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmerge_vfm_f32m2(vfloat32m2_t op1, float op2, vbool16_t mask, size_t vl) { - return vfmerge_vfm_f32m2(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfmerge_vfm_f32m2(vfloat32m2_t op1, float op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmerge_vfm_f32m4(vfloat32m4_t op1, float op2, vbool8_t mask, size_t vl) { - return vfmerge_vfm_f32m4(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfmerge_vfm_f32m4(vfloat32m4_t op1, float op2, vbool8_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmerge_vfm_f32m8(vfloat32m8_t op1, float op2, vbool4_t mask, size_t vl) { - return vfmerge_vfm_f32m8(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfmerge_vfm_f32m8(vfloat32m8_t op1, float op2, vbool4_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmerge_vfm_f64m1(vfloat64m1_t op1, double op2, vbool64_t mask, size_t vl) { - return vfmerge_vfm_f64m1(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f64m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfmerge_vfm_f64m1(vfloat64m1_t op1, double op2, vbool64_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmerge_vfm_f64m2(vfloat64m2_t op1, double op2, vbool32_t mask, size_t vl) { - return vfmerge_vfm_f64m2(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f64m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfmerge_vfm_f64m2(vfloat64m2_t op1, double op2, vbool32_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmerge_vfm_f64m4(vfloat64m4_t op1, double op2, vbool16_t mask, size_t vl) { - return vfmerge_vfm_f64m4(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f64m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f64m8( @@ -139,6 +139,6 @@ vfloat64m4_t test_vfmerge_vfm_f64m4(vfloat64m4_t op1, double op2, vbool16_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmerge_vfm_f64m8(vfloat64m8_t op1, double op2, vbool8_t mask, size_t vl) { - return vfmerge_vfm_f64m8(op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f64m8(op1, op2, mask, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmin.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmin.c index 5ac0ce2a597e6c4ce8b806cf669df0359ba00186..14cd2528b56a8b3aaa1be9b4f008148bf62f1e3b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmin.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmin.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmin_vv_f16mf4(op1, op2, vl); + return __riscv_vfmin_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmin_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf4(op1, op2, vl); + return __riscv_vfmin_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmin_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmin_vv_f16mf2(op1, op2, vl); + return __riscv_vfmin_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmin_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf2(op1, op2, vl); + return __riscv_vfmin_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmin_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmin_vv_f16m1(op1, op2, vl); + return __riscv_vfmin_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmin_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m1(op1, op2, vl); + return __riscv_vfmin_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmin_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmin_vv_f16m2(op1, op2, vl); + return __riscv_vfmin_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmin_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m2(op1, op2, vl); + return __riscv_vfmin_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmin_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmin_vv_f16m4(op1, op2, vl); + return __riscv_vfmin_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmin_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m4(op1, op2, vl); + return __riscv_vfmin_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmin_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmin_vv_f16m8(op1, op2, vl); + return __riscv_vfmin_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmin_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m8(op1, op2, vl); + return __riscv_vfmin_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmin_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmin_vv_f32mf2(op1, op2, vl); + return __riscv_vfmin_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmin_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfmin_vf_f32mf2(op1, op2, vl); + return __riscv_vfmin_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmin_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmin_vv_f32m1(op1, op2, vl); + return __riscv_vfmin_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmin_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfmin_vf_f32m1(op1, op2, vl); + return __riscv_vfmin_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmin_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmin_vv_f32m2(op1, op2, vl); + return __riscv_vfmin_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmin_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfmin_vf_f32m2(op1, op2, vl); + return __riscv_vfmin_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmin_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmin_vv_f32m4(op1, op2, vl); + return __riscv_vfmin_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmin_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfmin_vf_f32m4(op1, op2, vl); + return __riscv_vfmin_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmin_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmin_vv_f32m8(op1, op2, vl); + return __riscv_vfmin_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmin_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfmin_vf_f32m8(op1, op2, vl); + return __riscv_vfmin_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmin_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmin_vv_f64m1(op1, op2, vl); + return __riscv_vfmin_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmin_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfmin_vf_f64m1(op1, op2, vl); + return __riscv_vfmin_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmin_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmin_vv_f64m2(op1, op2, vl); + return __riscv_vfmin_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmin_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfmin_vf_f64m2(op1, op2, vl); + return __riscv_vfmin_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmin_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmin_vv_f64m4(op1, op2, vl); + return __riscv_vfmin_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmin_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfmin_vf_f64m4(op1, op2, vl); + return __riscv_vfmin_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmin_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmin_vv_f64m8(op1, op2, vl); + return __riscv_vfmin_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmin_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfmin_vf_f64m8(op1, op2, vl); + return __riscv_vfmin_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmin_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmin_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmin_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmin_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmin_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmin_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmin_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmin_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmin_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmin_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmin_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmin_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmin_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmin_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmin_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmin_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmin_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmin_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmin_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmin_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmin_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmin_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmin_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmin_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmin_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfmin_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmin_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmin_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmin_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfmin_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmin_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmin_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmin_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfmin_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmin_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmin_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmin_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfmin_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmin_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmin_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmin_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfmin_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmin_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmin_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmin_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfmin_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmin_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmin_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmin_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfmin_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmin_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmin_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfmin_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfmin_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfmin_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfmin_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsac.c index 37841fde294ee739eeaf8a539e56532abdf9b4c7..e69490af7e33348396247a67f96198af79563a70 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vv_f16mf4(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmsac_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vf_f16mf4(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmsac_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vv_f16mf2(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmsac_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vf_f16mf2(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmsac_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vv_f16m1(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmsac_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vf_f16m1(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmsac_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vv_f16m2(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmsac_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vf_f16m2(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmsac_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vv_f16m4(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmsac_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vf_f16m4(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmsac_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vv_f16m8(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmsac_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vf_f16m8(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmsac_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmsac_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vf_f32mf2(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmsac_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmsac_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vf_f32m1(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmsac_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmsac_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vf_f32m2(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmsac_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmsac_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vf_f32m4(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmsac_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmsac_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vf_f32m8(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmsac_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmsac_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vf_f64m1(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmsac_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmsac_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vf_f64m2(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmsac_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmsac_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vf_f64m4(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmsac_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmsac_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vf_f64m8(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmsac_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vv_f16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmsac_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vf_f16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmsac_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vv_f16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmsac_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vf_f16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmsac_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vv_f16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmsac_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vf_f16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmsac_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vv_f16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmsac_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vf_f16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmsac_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vv_f16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmsac_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vf_f16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmsac_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vv_f16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmsac_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vf_f16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmsac_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmsac_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vf_f32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmsac_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmsac_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vf_f32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmsac_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmsac_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vf_f32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmsac_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmsac_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vf_f32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmsac_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmsac_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vf_f32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmsac_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vf_f64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmsac_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vf_f64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmsac_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmsac_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vf_f64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmsac_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfmsac_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vf_f64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsub.c index b69ddc41e714fab1752d92ccdeda3d13d781f773..c09594fdb5798a5818cd383c1d2e6a12bf5e4cee 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vv_f16mf4(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmsub_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vf_f16mf4(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmsub_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vv_f16mf2(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmsub_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vf_f16mf2(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmsub_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vv_f16m1(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmsub_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vf_f16m1(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmsub_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vv_f16m2(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmsub_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vf_f16m2(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmsub_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vv_f16m4(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmsub_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vf_f16m4(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmsub_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vv_f16m8(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmsub_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vf_f16m8(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmsub_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmsub_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vf_f32mf2(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmsub_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmsub_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vf_f32m1(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmsub_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmsub_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vf_f32m2(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmsub_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmsub_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vf_f32m4(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmsub_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmsub_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vf_f32m8(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmsub_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmsub_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vf_f64m1(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmsub_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmsub_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vf_f64m2(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmsub_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmsub_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vf_f64m4(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmsub_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmsub_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vf_f64m8(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmsub_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vv_f16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmsub_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vf_f16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmsub_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vv_f16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmsub_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vf_f16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmsub_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vv_f16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmsub_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vf_f16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmsub_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vv_f16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmsub_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vf_f16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmsub_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vv_f16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmsub_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vf_f16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmsub_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vv_f16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmsub_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vf_f16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmsub_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmsub_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vf_f32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmsub_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmsub_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vf_f32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmsub_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmsub_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vf_f32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmsub_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmsub_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vf_f32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmsub_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmsub_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vf_f32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmsub_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmsub_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vf_f64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmsub_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmsub_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vf_f64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmsub_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmsub_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vf_f64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmsub_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfmsub_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vf_f64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmul.c index f848d54d04fdea11f3bc1048e5748851411cfa63..c9150b36277d16810842fd396772f254a449996a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmul.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmul_vv_f16mf4(op1, op2, vl); + return __riscv_vfmul_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmul_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf4(op1, op2, vl); + return __riscv_vfmul_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmul_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmul_vv_f16mf2(op1, op2, vl); + return __riscv_vfmul_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmul_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf2(op1, op2, vl); + return __riscv_vfmul_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmul_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmul_vv_f16m1(op1, op2, vl); + return __riscv_vfmul_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmul_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m1(op1, op2, vl); + return __riscv_vfmul_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmul_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmul_vv_f16m2(op1, op2, vl); + return __riscv_vfmul_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmul_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m2(op1, op2, vl); + return __riscv_vfmul_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmul_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmul_vv_f16m4(op1, op2, vl); + return __riscv_vfmul_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmul_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m4(op1, op2, vl); + return __riscv_vfmul_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmul_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmul_vv_f16m8(op1, op2, vl); + return __riscv_vfmul_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmul_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m8(op1, op2, vl); + return __riscv_vfmul_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmul_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmul_vv_f32mf2(op1, op2, vl); + return __riscv_vfmul_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmul_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfmul_vf_f32mf2(op1, op2, vl); + return __riscv_vfmul_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmul_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmul_vv_f32m1(op1, op2, vl); + return __riscv_vfmul_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmul_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfmul_vf_f32m1(op1, op2, vl); + return __riscv_vfmul_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmul_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmul_vv_f32m2(op1, op2, vl); + return __riscv_vfmul_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmul_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfmul_vf_f32m2(op1, op2, vl); + return __riscv_vfmul_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmul_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmul_vv_f32m4(op1, op2, vl); + return __riscv_vfmul_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmul_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfmul_vf_f32m4(op1, op2, vl); + return __riscv_vfmul_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmul_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmul_vv_f32m8(op1, op2, vl); + return __riscv_vfmul_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmul_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfmul_vf_f32m8(op1, op2, vl); + return __riscv_vfmul_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmul_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmul_vv_f64m1(op1, op2, vl); + return __riscv_vfmul_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmul_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfmul_vf_f64m1(op1, op2, vl); + return __riscv_vfmul_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmul_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmul_vv_f64m2(op1, op2, vl); + return __riscv_vfmul_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmul_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfmul_vf_f64m2(op1, op2, vl); + return __riscv_vfmul_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmul_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmul_vv_f64m4(op1, op2, vl); + return __riscv_vfmul_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmul_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfmul_vf_f64m4(op1, op2, vl); + return __riscv_vfmul_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmul_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmul_vv_f64m8(op1, op2, vl); + return __riscv_vfmul_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmul_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfmul_vf_f64m8(op1, op2, vl); + return __riscv_vfmul_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmul_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmul_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmul_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmul_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmul_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmul_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmul_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmul_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmul_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmul_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmul_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmul_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmul_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmul_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmul_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmul_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmul_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmul_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmul_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmul_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmul_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmul_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmul_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmul_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmul_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfmul_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmul_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmul_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmul_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfmul_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmul_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmul_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmul_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfmul_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmul_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmul_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmul_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfmul_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmul_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmul_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmul_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfmul_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmul_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmul_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmul_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfmul_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmul_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmul_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmul_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfmul_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmul_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmul_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfmul_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfmul_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfmul_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfmul_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmv.c index b405a2526dade32288801a0d5254ff98ca483ba3..6afa157e1acf6086e83a937220fc5bbcc12939c7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfmv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmv_v_f_f16mf4(_Float16 src, size_t vl) { - return vfmv_v_f_f16mf4(src, vl); + return __riscv_vfmv_v_f_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmv_v_f_f16mf4(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmv_v_f_f16mf2(_Float16 src, size_t vl) { - return vfmv_v_f_f16mf2(src, vl); + return __riscv_vfmv_v_f_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfmv_v_f_f16mf2(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmv_v_f_f16m1(_Float16 src, size_t vl) { - return vfmv_v_f_f16m1(src, vl); + return __riscv_vfmv_v_f_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfmv_v_f_f16m1(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmv_v_f_f16m2(_Float16 src, size_t vl) { - return vfmv_v_f_f16m2(src, vl); + return __riscv_vfmv_v_f_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfmv_v_f_f16m2(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmv_v_f_f16m4(_Float16 src, size_t vl) { - return vfmv_v_f_f16m4(src, vl); + return __riscv_vfmv_v_f_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfmv_v_f_f16m4(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmv_v_f_f16m8(_Float16 src, size_t vl) { - return vfmv_v_f_f16m8(src, vl); + return __riscv_vfmv_v_f_f16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfmv_v_f_f16m8(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmv_v_f_f32mf2(float src, size_t vl) { - return vfmv_v_f_f32mf2(src, vl); + return __riscv_vfmv_v_f_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfmv_v_f_f32mf2(float src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmv_v_f_f32m1(float src, size_t vl) { - return vfmv_v_f_f32m1(src, vl); + return __riscv_vfmv_v_f_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfmv_v_f_f32m1(float src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmv_v_f_f32m2(float src, size_t vl) { - return vfmv_v_f_f32m2(src, vl); + return __riscv_vfmv_v_f_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfmv_v_f_f32m2(float src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmv_v_f_f32m4(float src, size_t vl) { - return vfmv_v_f_f32m4(src, vl); + return __riscv_vfmv_v_f_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfmv_v_f_f32m4(float src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmv_v_f_f32m8(float src, size_t vl) { - return vfmv_v_f_f32m8(src, vl); + return __riscv_vfmv_v_f_f32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfmv_v_f_f32m8(float src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmv_v_f_f64m1(double src, size_t vl) { - return vfmv_v_f_f64m1(src, vl); + return __riscv_vfmv_v_f_f64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfmv_v_f_f64m1(double src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmv_v_f_f64m2(double src, size_t vl) { - return vfmv_v_f_f64m2(src, vl); + return __riscv_vfmv_v_f_f64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfmv_v_f_f64m2(double src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmv_v_f_f64m4(double src, size_t vl) { - return vfmv_v_f_f64m4(src, vl); + return __riscv_vfmv_v_f_f64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfmv_v_f_f64m4(double src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmv_v_f_f64m8(double src, size_t vl) { - return vfmv_v_f_f64m8(src, vl); + return __riscv_vfmv_v_f_f64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f16mf4_f16( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfmv_v_f_f64m8(double src, size_t vl) { // CHECK-RV64-NEXT: ret half [[TMP0]] // _Float16 test_vfmv_f_s_f16mf4_f16(vfloat16mf4_t src) { - return vfmv_f_s_f16mf4_f16(src); + return __riscv_vfmv_f_s_f16mf4_f16(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16mf4( @@ -157,7 +157,7 @@ _Float16 test_vfmv_f_s_f16mf4_f16(vfloat16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmv_s_f_f16mf4(_Float16 src, size_t vl) { - return vfmv_s_f_f16mf4(src, vl); + return __riscv_vfmv_s_f_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f16mf2_f16( @@ -166,7 +166,7 @@ vfloat16mf4_t test_vfmv_s_f_f16mf4(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret half [[TMP0]] // _Float16 test_vfmv_f_s_f16mf2_f16(vfloat16mf2_t src) { - return vfmv_f_s_f16mf2_f16(src); + return __riscv_vfmv_f_s_f16mf2_f16(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16mf2( @@ -175,7 +175,7 @@ _Float16 test_vfmv_f_s_f16mf2_f16(vfloat16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmv_s_f_f16mf2(_Float16 src, size_t vl) { - return vfmv_s_f_f16mf2(src, vl); + return __riscv_vfmv_s_f_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f16m1_f16( @@ -184,7 +184,7 @@ vfloat16mf2_t test_vfmv_s_f_f16mf2(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret half [[TMP0]] // _Float16 test_vfmv_f_s_f16m1_f16(vfloat16m1_t src) { - return vfmv_f_s_f16m1_f16(src); + return __riscv_vfmv_f_s_f16m1_f16(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16m1( @@ -193,7 +193,7 @@ _Float16 test_vfmv_f_s_f16m1_f16(vfloat16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmv_s_f_f16m1(_Float16 src, size_t vl) { - return vfmv_s_f_f16m1(src, vl); + return __riscv_vfmv_s_f_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f16m2_f16( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfmv_s_f_f16m1(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret half [[TMP0]] // _Float16 test_vfmv_f_s_f16m2_f16(vfloat16m2_t src) { - return vfmv_f_s_f16m2_f16(src); + return __riscv_vfmv_f_s_f16m2_f16(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16m2( @@ -211,7 +211,7 @@ _Float16 test_vfmv_f_s_f16m2_f16(vfloat16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmv_s_f_f16m2(_Float16 src, size_t vl) { - return vfmv_s_f_f16m2(src, vl); + return __riscv_vfmv_s_f_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f16m4_f16( @@ -220,7 +220,7 @@ vfloat16m2_t test_vfmv_s_f_f16m2(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret half [[TMP0]] // _Float16 test_vfmv_f_s_f16m4_f16(vfloat16m4_t src) { - return vfmv_f_s_f16m4_f16(src); + return __riscv_vfmv_f_s_f16m4_f16(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16m4( @@ -229,7 +229,7 @@ _Float16 test_vfmv_f_s_f16m4_f16(vfloat16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmv_s_f_f16m4(_Float16 src, size_t vl) { - return vfmv_s_f_f16m4(src, vl); + return __riscv_vfmv_s_f_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f16m8_f16( @@ -238,7 +238,7 @@ vfloat16m4_t test_vfmv_s_f_f16m4(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret half [[TMP0]] // _Float16 test_vfmv_f_s_f16m8_f16(vfloat16m8_t src) { - return vfmv_f_s_f16m8_f16(src); + return __riscv_vfmv_f_s_f16m8_f16(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16m8( @@ -247,7 +247,7 @@ _Float16 test_vfmv_f_s_f16m8_f16(vfloat16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmv_s_f_f16m8(_Float16 src, size_t vl) { - return vfmv_s_f_f16m8(src, vl); + return __riscv_vfmv_s_f_f16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f32mf2_f32( @@ -256,7 +256,7 @@ vfloat16m8_t test_vfmv_s_f_f16m8(_Float16 src, size_t vl) { // CHECK-RV64-NEXT: ret float [[TMP0]] // float test_vfmv_f_s_f32mf2_f32(vfloat32mf2_t src) { - return vfmv_f_s_f32mf2_f32(src); + return __riscv_vfmv_f_s_f32mf2_f32(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32mf2( @@ -265,7 +265,7 @@ float test_vfmv_f_s_f32mf2_f32(vfloat32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmv_s_f_f32mf2(float src, size_t vl) { - return vfmv_s_f_f32mf2(src, vl); + return __riscv_vfmv_s_f_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f32m1_f32( @@ -274,7 +274,7 @@ vfloat32mf2_t test_vfmv_s_f_f32mf2(float src, size_t vl) { // CHECK-RV64-NEXT: ret float [[TMP0]] // float test_vfmv_f_s_f32m1_f32(vfloat32m1_t src) { - return vfmv_f_s_f32m1_f32(src); + return __riscv_vfmv_f_s_f32m1_f32(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32m1( @@ -283,7 +283,7 @@ float test_vfmv_f_s_f32m1_f32(vfloat32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmv_s_f_f32m1(float src, size_t vl) { - return vfmv_s_f_f32m1(src, vl); + return __riscv_vfmv_s_f_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f32m2_f32( @@ -292,7 +292,7 @@ vfloat32m1_t test_vfmv_s_f_f32m1(float src, size_t vl) { // CHECK-RV64-NEXT: ret float [[TMP0]] // float test_vfmv_f_s_f32m2_f32(vfloat32m2_t src) { - return vfmv_f_s_f32m2_f32(src); + return __riscv_vfmv_f_s_f32m2_f32(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32m2( @@ -301,7 +301,7 @@ float test_vfmv_f_s_f32m2_f32(vfloat32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmv_s_f_f32m2(float src, size_t vl) { - return vfmv_s_f_f32m2(src, vl); + return __riscv_vfmv_s_f_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f32m4_f32( @@ -310,7 +310,7 @@ vfloat32m2_t test_vfmv_s_f_f32m2(float src, size_t vl) { // CHECK-RV64-NEXT: ret float [[TMP0]] // float test_vfmv_f_s_f32m4_f32(vfloat32m4_t src) { - return vfmv_f_s_f32m4_f32(src); + return __riscv_vfmv_f_s_f32m4_f32(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32m4( @@ -319,7 +319,7 @@ float test_vfmv_f_s_f32m4_f32(vfloat32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmv_s_f_f32m4(float src, size_t vl) { - return vfmv_s_f_f32m4(src, vl); + return __riscv_vfmv_s_f_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f32m8_f32( @@ -328,7 +328,7 @@ vfloat32m4_t test_vfmv_s_f_f32m4(float src, size_t vl) { // CHECK-RV64-NEXT: ret float [[TMP0]] // float test_vfmv_f_s_f32m8_f32(vfloat32m8_t src) { - return vfmv_f_s_f32m8_f32(src); + return __riscv_vfmv_f_s_f32m8_f32(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32m8( @@ -337,7 +337,7 @@ float test_vfmv_f_s_f32m8_f32(vfloat32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmv_s_f_f32m8(float src, size_t vl) { - return vfmv_s_f_f32m8(src, vl); + return __riscv_vfmv_s_f_f32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f64m1_f64( @@ -346,7 +346,7 @@ vfloat32m8_t test_vfmv_s_f_f32m8(float src, size_t vl) { // CHECK-RV64-NEXT: ret double [[TMP0]] // double test_vfmv_f_s_f64m1_f64(vfloat64m1_t src) { - return vfmv_f_s_f64m1_f64(src); + return __riscv_vfmv_f_s_f64m1_f64(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f64m1( @@ -355,7 +355,7 @@ double test_vfmv_f_s_f64m1_f64(vfloat64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmv_s_f_f64m1(double src, size_t vl) { - return vfmv_s_f_f64m1(src, vl); + return __riscv_vfmv_s_f_f64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f64m2_f64( @@ -364,7 +364,7 @@ vfloat64m1_t test_vfmv_s_f_f64m1(double src, size_t vl) { // CHECK-RV64-NEXT: ret double [[TMP0]] // double test_vfmv_f_s_f64m2_f64(vfloat64m2_t src) { - return vfmv_f_s_f64m2_f64(src); + return __riscv_vfmv_f_s_f64m2_f64(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f64m2( @@ -373,7 +373,7 @@ double test_vfmv_f_s_f64m2_f64(vfloat64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmv_s_f_f64m2(double src, size_t vl) { - return vfmv_s_f_f64m2(src, vl); + return __riscv_vfmv_s_f_f64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f64m4_f64( @@ -382,7 +382,7 @@ vfloat64m2_t test_vfmv_s_f_f64m2(double src, size_t vl) { // CHECK-RV64-NEXT: ret double [[TMP0]] // double test_vfmv_f_s_f64m4_f64(vfloat64m4_t src) { - return vfmv_f_s_f64m4_f64(src); + return __riscv_vfmv_f_s_f64m4_f64(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f64m4( @@ -391,7 +391,7 @@ double test_vfmv_f_s_f64m4_f64(vfloat64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmv_s_f_f64m4(double src, size_t vl) { - return vfmv_s_f_f64m4(src, vl); + return __riscv_vfmv_s_f_f64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfmv_f_s_f64m8_f64( @@ -400,7 +400,7 @@ vfloat64m4_t test_vfmv_s_f_f64m4(double src, size_t vl) { // CHECK-RV64-NEXT: ret double [[TMP0]] // double test_vfmv_f_s_f64m8_f64(vfloat64m8_t src) { - return vfmv_f_s_f64m8_f64(src); + return __riscv_vfmv_f_s_f64m8_f64(src); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f64m8( @@ -409,6 +409,6 @@ double test_vfmv_f_s_f64m8_f64(vfloat64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmv_s_f_f64m8(double src, size_t vl) { - return vfmv_s_f_f64m8(src, vl); + return __riscv_vfmv_s_f_f64m8(src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvt.c index 0dee74313632c737d193bf794a995abf3989a0f6..f2015e53ef8ef29122e4d0490aae160caa4f847f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_x_f_w_i8mf8(vfloat16mf4_t src, size_t vl) { - return vfncvt_x_f_w_i8mf8(src, vl); + return __riscv_vfncvt_x_f_w_i8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf8( @@ -22,7 +22,7 @@ vint8mf8_t test_vfncvt_x_f_w_i8mf8(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8(vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf8(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf4( @@ -31,7 +31,7 @@ vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_x_f_w_i8mf4(vfloat16mf2_t src, size_t vl) { - return vfncvt_x_f_w_i8mf4(src, vl); + return __riscv_vfncvt_x_f_w_i8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf4( @@ -40,7 +40,7 @@ vint8mf4_t test_vfncvt_x_f_w_i8mf4(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4(vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf4(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf2( @@ -49,7 +49,7 @@ vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_x_f_w_i8mf2(vfloat16m1_t src, size_t vl) { - return vfncvt_x_f_w_i8mf2(src, vl); + return __riscv_vfncvt_x_f_w_i8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf2( @@ -58,7 +58,7 @@ vint8mf2_t test_vfncvt_x_f_w_i8mf2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2(vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf2(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m1( @@ -67,7 +67,7 @@ vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_x_f_w_i8m1(vfloat16m2_t src, size_t vl) { - return vfncvt_x_f_w_i8m1(src, vl); + return __riscv_vfncvt_x_f_w_i8m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m1( @@ -76,7 +76,7 @@ vint8m1_t test_vfncvt_x_f_w_i8m1(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_rtz_x_f_w_i8m1(vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m1(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m2( @@ -85,7 +85,7 @@ vint8m1_t test_vfncvt_rtz_x_f_w_i8m1(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_x_f_w_i8m2(vfloat16m4_t src, size_t vl) { - return vfncvt_x_f_w_i8m2(src, vl); + return __riscv_vfncvt_x_f_w_i8m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m2( @@ -94,7 +94,7 @@ vint8m2_t test_vfncvt_x_f_w_i8m2(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_rtz_x_f_w_i8m2(vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m2(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m4( @@ -103,7 +103,7 @@ vint8m2_t test_vfncvt_rtz_x_f_w_i8m2(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_x_f_w_i8m4(vfloat16m8_t src, size_t vl) { - return vfncvt_x_f_w_i8m4(src, vl); + return __riscv_vfncvt_x_f_w_i8m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m4( @@ -112,7 +112,7 @@ vint8m4_t test_vfncvt_x_f_w_i8m4(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_rtz_x_f_w_i8m4(vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m4(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf8( @@ -121,7 +121,7 @@ vint8m4_t test_vfncvt_rtz_x_f_w_i8m4(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_xu_f_w_u8mf8(vfloat16mf4_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf8(src, vl); + return __riscv_vfncvt_xu_f_w_u8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf8( @@ -130,7 +130,7 @@ vuint8mf8_t test_vfncvt_xu_f_w_u8mf8(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8(vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf8(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf4( @@ -139,7 +139,7 @@ vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_xu_f_w_u8mf4(vfloat16mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf4(src, vl); + return __riscv_vfncvt_xu_f_w_u8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf4( @@ -148,7 +148,7 @@ vuint8mf4_t test_vfncvt_xu_f_w_u8mf4(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4(vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf4(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf2( @@ -157,7 +157,7 @@ vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_xu_f_w_u8mf2(vfloat16m1_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf2(src, vl); + return __riscv_vfncvt_xu_f_w_u8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf2( @@ -166,7 +166,7 @@ vuint8mf2_t test_vfncvt_xu_f_w_u8mf2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2(vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf2(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m1( @@ -175,7 +175,7 @@ vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_xu_f_w_u8m1(vfloat16m2_t src, size_t vl) { - return vfncvt_xu_f_w_u8m1(src, vl); + return __riscv_vfncvt_xu_f_w_u8m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m1( @@ -184,7 +184,7 @@ vuint8m1_t test_vfncvt_xu_f_w_u8m1(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1(vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m1(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m2( @@ -193,7 +193,7 @@ vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_xu_f_w_u8m2(vfloat16m4_t src, size_t vl) { - return vfncvt_xu_f_w_u8m2(src, vl); + return __riscv_vfncvt_xu_f_w_u8m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m2( @@ -202,7 +202,7 @@ vuint8m2_t test_vfncvt_xu_f_w_u8m2(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2(vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m2(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m4( @@ -211,7 +211,7 @@ vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_xu_f_w_u8m4(vfloat16m8_t src, size_t vl) { - return vfncvt_xu_f_w_u8m4(src, vl); + return __riscv_vfncvt_xu_f_w_u8m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m4( @@ -220,7 +220,7 @@ vuint8m4_t test_vfncvt_xu_f_w_u8m4(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4(vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m4(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf4( @@ -229,7 +229,7 @@ vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_x_f_w_i16mf4(vfloat32mf2_t src, size_t vl) { - return vfncvt_x_f_w_i16mf4(src, vl); + return __riscv_vfncvt_x_f_w_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf4( @@ -238,7 +238,7 @@ vint16mf4_t test_vfncvt_x_f_w_i16mf4(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4(vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf4(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf2( @@ -247,7 +247,7 @@ vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_x_f_w_i16mf2(vfloat32m1_t src, size_t vl) { - return vfncvt_x_f_w_i16mf2(src, vl); + return __riscv_vfncvt_x_f_w_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf2( @@ -256,7 +256,7 @@ vint16mf2_t test_vfncvt_x_f_w_i16mf2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2(vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf2(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m1( @@ -265,7 +265,7 @@ vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_x_f_w_i16m1(vfloat32m2_t src, size_t vl) { - return vfncvt_x_f_w_i16m1(src, vl); + return __riscv_vfncvt_x_f_w_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m1( @@ -274,7 +274,7 @@ vint16m1_t test_vfncvt_x_f_w_i16m1(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_rtz_x_f_w_i16m1(vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m1(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m2( @@ -283,7 +283,7 @@ vint16m1_t test_vfncvt_rtz_x_f_w_i16m1(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_x_f_w_i16m2(vfloat32m4_t src, size_t vl) { - return vfncvt_x_f_w_i16m2(src, vl); + return __riscv_vfncvt_x_f_w_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m2( @@ -292,7 +292,7 @@ vint16m2_t test_vfncvt_x_f_w_i16m2(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_rtz_x_f_w_i16m2(vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m2(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m4( @@ -301,7 +301,7 @@ vint16m2_t test_vfncvt_rtz_x_f_w_i16m2(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_x_f_w_i16m4(vfloat32m8_t src, size_t vl) { - return vfncvt_x_f_w_i16m4(src, vl); + return __riscv_vfncvt_x_f_w_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m4( @@ -310,7 +310,7 @@ vint16m4_t test_vfncvt_x_f_w_i16m4(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_rtz_x_f_w_i16m4(vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m4(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf4( @@ -319,7 +319,7 @@ vint16m4_t test_vfncvt_rtz_x_f_w_i16m4(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_xu_f_w_u16mf4(vfloat32mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf4(src, vl); + return __riscv_vfncvt_xu_f_w_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf4( @@ -328,7 +328,7 @@ vuint16mf4_t test_vfncvt_xu_f_w_u16mf4(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4(vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf4(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf2( @@ -337,7 +337,7 @@ vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_xu_f_w_u16mf2(vfloat32m1_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf2(src, vl); + return __riscv_vfncvt_xu_f_w_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf2( @@ -346,7 +346,7 @@ vuint16mf2_t test_vfncvt_xu_f_w_u16mf2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2(vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf2(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m1( @@ -355,7 +355,7 @@ vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_xu_f_w_u16m1(vfloat32m2_t src, size_t vl) { - return vfncvt_xu_f_w_u16m1(src, vl); + return __riscv_vfncvt_xu_f_w_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m1( @@ -364,7 +364,7 @@ vuint16m1_t test_vfncvt_xu_f_w_u16m1(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1(vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m1(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m2( @@ -373,7 +373,7 @@ vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_xu_f_w_u16m2(vfloat32m4_t src, size_t vl) { - return vfncvt_xu_f_w_u16m2(src, vl); + return __riscv_vfncvt_xu_f_w_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m2( @@ -382,7 +382,7 @@ vuint16m2_t test_vfncvt_xu_f_w_u16m2(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2(vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m2(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m4( @@ -391,7 +391,7 @@ vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_xu_f_w_u16m4(vfloat32m8_t src, size_t vl) { - return vfncvt_xu_f_w_u16m4(src, vl); + return __riscv_vfncvt_xu_f_w_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m4( @@ -400,7 +400,7 @@ vuint16m4_t test_vfncvt_xu_f_w_u16m4(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4(vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m4(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf4( @@ -409,7 +409,7 @@ vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_x_w_f16mf4(vint32mf2_t src, size_t vl) { - return vfncvt_f_x_w_f16mf4(src, vl); + return __riscv_vfncvt_f_x_w_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf2( @@ -418,7 +418,7 @@ vfloat16mf4_t test_vfncvt_f_x_w_f16mf4(vint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_x_w_f16mf2(vint32m1_t src, size_t vl) { - return vfncvt_f_x_w_f16mf2(src, vl); + return __riscv_vfncvt_f_x_w_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m1( @@ -427,7 +427,7 @@ vfloat16mf2_t test_vfncvt_f_x_w_f16mf2(vint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_x_w_f16m1(vint32m2_t src, size_t vl) { - return vfncvt_f_x_w_f16m1(src, vl); + return __riscv_vfncvt_f_x_w_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m2( @@ -436,7 +436,7 @@ vfloat16m1_t test_vfncvt_f_x_w_f16m1(vint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_x_w_f16m2(vint32m4_t src, size_t vl) { - return vfncvt_f_x_w_f16m2(src, vl); + return __riscv_vfncvt_f_x_w_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m4( @@ -445,7 +445,7 @@ vfloat16m2_t test_vfncvt_f_x_w_f16m2(vint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_x_w_f16m4(vint32m8_t src, size_t vl) { - return vfncvt_f_x_w_f16m4(src, vl); + return __riscv_vfncvt_f_x_w_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf4( @@ -454,7 +454,7 @@ vfloat16m4_t test_vfncvt_f_x_w_f16m4(vint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4(vuint32mf2_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf4(src, vl); + return __riscv_vfncvt_f_xu_w_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf2( @@ -463,7 +463,7 @@ vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4(vuint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2(vuint32m1_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf2(src, vl); + return __riscv_vfncvt_f_xu_w_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m1( @@ -472,7 +472,7 @@ vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2(vuint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_xu_w_f16m1(vuint32m2_t src, size_t vl) { - return vfncvt_f_xu_w_f16m1(src, vl); + return __riscv_vfncvt_f_xu_w_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m2( @@ -481,7 +481,7 @@ vfloat16m1_t test_vfncvt_f_xu_w_f16m1(vuint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_xu_w_f16m2(vuint32m4_t src, size_t vl) { - return vfncvt_f_xu_w_f16m2(src, vl); + return __riscv_vfncvt_f_xu_w_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m4( @@ -490,7 +490,7 @@ vfloat16m2_t test_vfncvt_f_xu_w_f16m2(vuint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_xu_w_f16m4(vuint32m8_t src, size_t vl) { - return vfncvt_f_xu_w_f16m4(src, vl); + return __riscv_vfncvt_f_xu_w_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf4( @@ -499,7 +499,7 @@ vfloat16m4_t test_vfncvt_f_xu_w_f16m4(vuint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_f_w_f16mf4(vfloat32mf2_t src, size_t vl) { - return vfncvt_f_f_w_f16mf4(src, vl); + return __riscv_vfncvt_f_f_w_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf4( @@ -508,7 +508,7 @@ vfloat16mf4_t test_vfncvt_f_f_w_f16mf4(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4(vfloat32mf2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf4(src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf2( @@ -517,7 +517,7 @@ vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_f_w_f16mf2(vfloat32m1_t src, size_t vl) { - return vfncvt_f_f_w_f16mf2(src, vl); + return __riscv_vfncvt_f_f_w_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf2( @@ -526,7 +526,7 @@ vfloat16mf2_t test_vfncvt_f_f_w_f16mf2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2(vfloat32m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf2(src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m1( @@ -535,7 +535,7 @@ vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_f_w_f16m1(vfloat32m2_t src, size_t vl) { - return vfncvt_f_f_w_f16m1(src, vl); + return __riscv_vfncvt_f_f_w_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m1( @@ -544,7 +544,7 @@ vfloat16m1_t test_vfncvt_f_f_w_f16m1(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1(vfloat32m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m1(src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m2( @@ -553,7 +553,7 @@ vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_f_w_f16m2(vfloat32m4_t src, size_t vl) { - return vfncvt_f_f_w_f16m2(src, vl); + return __riscv_vfncvt_f_f_w_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m2( @@ -562,7 +562,7 @@ vfloat16m2_t test_vfncvt_f_f_w_f16m2(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2(vfloat32m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m2(src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m4( @@ -571,7 +571,7 @@ vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_f_w_f16m4(vfloat32m8_t src, size_t vl) { - return vfncvt_f_f_w_f16m4(src, vl); + return __riscv_vfncvt_f_f_w_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m4( @@ -580,7 +580,7 @@ vfloat16m4_t test_vfncvt_f_f_w_f16m4(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4(vfloat32m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m4(src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32mf2( @@ -589,7 +589,7 @@ vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_x_f_w_i32mf2(vfloat64m1_t src, size_t vl) { - return vfncvt_x_f_w_i32mf2(src, vl); + return __riscv_vfncvt_x_f_w_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32mf2( @@ -598,7 +598,7 @@ vint32mf2_t test_vfncvt_x_f_w_i32mf2(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2(vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32mf2(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m1( @@ -607,7 +607,7 @@ vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_x_f_w_i32m1(vfloat64m2_t src, size_t vl) { - return vfncvt_x_f_w_i32m1(src, vl); + return __riscv_vfncvt_x_f_w_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m1( @@ -616,7 +616,7 @@ vint32m1_t test_vfncvt_x_f_w_i32m1(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_rtz_x_f_w_i32m1(vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m1(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m2( @@ -625,7 +625,7 @@ vint32m1_t test_vfncvt_rtz_x_f_w_i32m1(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_x_f_w_i32m2(vfloat64m4_t src, size_t vl) { - return vfncvt_x_f_w_i32m2(src, vl); + return __riscv_vfncvt_x_f_w_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m2( @@ -634,7 +634,7 @@ vint32m2_t test_vfncvt_x_f_w_i32m2(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_rtz_x_f_w_i32m2(vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m2(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m4( @@ -643,7 +643,7 @@ vint32m2_t test_vfncvt_rtz_x_f_w_i32m2(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_x_f_w_i32m4(vfloat64m8_t src, size_t vl) { - return vfncvt_x_f_w_i32m4(src, vl); + return __riscv_vfncvt_x_f_w_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m4( @@ -652,7 +652,7 @@ vint32m4_t test_vfncvt_x_f_w_i32m4(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_rtz_x_f_w_i32m4(vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m4(src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32mf2( @@ -661,7 +661,7 @@ vint32m4_t test_vfncvt_rtz_x_f_w_i32m4(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_xu_f_w_u32mf2(vfloat64m1_t src, size_t vl) { - return vfncvt_xu_f_w_u32mf2(src, vl); + return __riscv_vfncvt_xu_f_w_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32mf2( @@ -670,7 +670,7 @@ vuint32mf2_t test_vfncvt_xu_f_w_u32mf2(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2(vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32mf2(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m1( @@ -679,7 +679,7 @@ vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_xu_f_w_u32m1(vfloat64m2_t src, size_t vl) { - return vfncvt_xu_f_w_u32m1(src, vl); + return __riscv_vfncvt_xu_f_w_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m1( @@ -688,7 +688,7 @@ vuint32m1_t test_vfncvt_xu_f_w_u32m1(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1(vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m1(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m2( @@ -697,7 +697,7 @@ vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_xu_f_w_u32m2(vfloat64m4_t src, size_t vl) { - return vfncvt_xu_f_w_u32m2(src, vl); + return __riscv_vfncvt_xu_f_w_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m2( @@ -706,7 +706,7 @@ vuint32m2_t test_vfncvt_xu_f_w_u32m2(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2(vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m2(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m4( @@ -715,7 +715,7 @@ vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_xu_f_w_u32m4(vfloat64m8_t src, size_t vl) { - return vfncvt_xu_f_w_u32m4(src, vl); + return __riscv_vfncvt_xu_f_w_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m4( @@ -724,7 +724,7 @@ vuint32m4_t test_vfncvt_xu_f_w_u32m4(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4(vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m4(src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32mf2( @@ -733,7 +733,7 @@ vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_x_w_f32mf2(vint64m1_t src, size_t vl) { - return vfncvt_f_x_w_f32mf2(src, vl); + return __riscv_vfncvt_f_x_w_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m1( @@ -742,7 +742,7 @@ vfloat32mf2_t test_vfncvt_f_x_w_f32mf2(vint64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_x_w_f32m1(vint64m2_t src, size_t vl) { - return vfncvt_f_x_w_f32m1(src, vl); + return __riscv_vfncvt_f_x_w_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m2( @@ -751,7 +751,7 @@ vfloat32m1_t test_vfncvt_f_x_w_f32m1(vint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_x_w_f32m2(vint64m4_t src, size_t vl) { - return vfncvt_f_x_w_f32m2(src, vl); + return __riscv_vfncvt_f_x_w_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m4( @@ -760,7 +760,7 @@ vfloat32m2_t test_vfncvt_f_x_w_f32m2(vint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_x_w_f32m4(vint64m8_t src, size_t vl) { - return vfncvt_f_x_w_f32m4(src, vl); + return __riscv_vfncvt_f_x_w_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32mf2( @@ -769,7 +769,7 @@ vfloat32m4_t test_vfncvt_f_x_w_f32m4(vint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2(vuint64m1_t src, size_t vl) { - return vfncvt_f_xu_w_f32mf2(src, vl); + return __riscv_vfncvt_f_xu_w_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m1( @@ -778,7 +778,7 @@ vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2(vuint64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_xu_w_f32m1(vuint64m2_t src, size_t vl) { - return vfncvt_f_xu_w_f32m1(src, vl); + return __riscv_vfncvt_f_xu_w_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m2( @@ -787,7 +787,7 @@ vfloat32m1_t test_vfncvt_f_xu_w_f32m1(vuint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_xu_w_f32m2(vuint64m4_t src, size_t vl) { - return vfncvt_f_xu_w_f32m2(src, vl); + return __riscv_vfncvt_f_xu_w_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m4( @@ -796,7 +796,7 @@ vfloat32m2_t test_vfncvt_f_xu_w_f32m2(vuint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_xu_w_f32m4(vuint64m8_t src, size_t vl) { - return vfncvt_f_xu_w_f32m4(src, vl); + return __riscv_vfncvt_f_xu_w_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32mf2( @@ -805,7 +805,7 @@ vfloat32m4_t test_vfncvt_f_xu_w_f32m4(vuint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_f_w_f32mf2(vfloat64m1_t src, size_t vl) { - return vfncvt_f_f_w_f32mf2(src, vl); + return __riscv_vfncvt_f_f_w_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32mf2( @@ -814,7 +814,7 @@ vfloat32mf2_t test_vfncvt_f_f_w_f32mf2(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2(vfloat64m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32mf2(src, vl); + return __riscv_vfncvt_rod_f_f_w_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m1( @@ -823,7 +823,7 @@ vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_f_w_f32m1(vfloat64m2_t src, size_t vl) { - return vfncvt_f_f_w_f32m1(src, vl); + return __riscv_vfncvt_f_f_w_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m1( @@ -832,7 +832,7 @@ vfloat32m1_t test_vfncvt_f_f_w_f32m1(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1(vfloat64m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m1(src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m2( @@ -841,7 +841,7 @@ vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_f_w_f32m2(vfloat64m4_t src, size_t vl) { - return vfncvt_f_f_w_f32m2(src, vl); + return __riscv_vfncvt_f_f_w_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m2( @@ -850,7 +850,7 @@ vfloat32m2_t test_vfncvt_f_f_w_f32m2(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2(vfloat64m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m2(src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m4( @@ -859,7 +859,7 @@ vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_f_w_f32m4(vfloat64m8_t src, size_t vl) { - return vfncvt_f_f_w_f32m4(src, vl); + return __riscv_vfncvt_f_f_w_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m4( @@ -868,7 +868,7 @@ vfloat32m4_t test_vfncvt_f_f_w_f32m4(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4(vfloat64m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m4(src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf8_m( @@ -877,7 +877,7 @@ vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_x_f_w_i8mf8_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfncvt_x_f_w_i8mf8_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i8mf8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf8_m( @@ -886,7 +886,7 @@ vint8mf8_t test_vfncvt_x_f_w_i8mf8_m(vbool64_t mask, vfloat16mf4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf8_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf4_m( @@ -895,7 +895,7 @@ vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_m(vbool64_t mask, vfloat16mf4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_x_f_w_i8mf4_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfncvt_x_f_w_i8mf4_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i8mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf4_m( @@ -904,7 +904,7 @@ vint8mf4_t test_vfncvt_x_f_w_i8mf4_m(vbool32_t mask, vfloat16mf2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf4_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf2_m( @@ -913,7 +913,7 @@ vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_m(vbool32_t mask, vfloat16mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_x_f_w_i8mf2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfncvt_x_f_w_i8mf2_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i8mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf2_m( @@ -922,7 +922,7 @@ vint8mf2_t test_vfncvt_x_f_w_i8mf2_m(vbool16_t mask, vfloat16m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf2_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m1_m( @@ -931,7 +931,7 @@ vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_m(vbool16_t mask, vfloat16m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_x_f_w_i8m1_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfncvt_x_f_w_i8m1_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i8m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m1_m( @@ -940,7 +940,7 @@ vint8m1_t test_vfncvt_x_f_w_i8m1_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m1_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m2_m( @@ -949,7 +949,7 @@ vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_m(vbool8_t mask, vfloat16m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_x_f_w_i8m2_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfncvt_x_f_w_i8m2_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i8m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m2_m( @@ -958,7 +958,7 @@ vint8m2_t test_vfncvt_x_f_w_i8m2_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m2_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m4_m( @@ -967,7 +967,7 @@ vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_m(vbool4_t mask, vfloat16m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_x_f_w_i8m4_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { - return vfncvt_x_f_w_i8m4_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i8m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m4_m( @@ -976,7 +976,7 @@ vint8m4_t test_vfncvt_x_f_w_i8m4_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m4_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf8_m( @@ -985,7 +985,7 @@ vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_m(vbool2_t mask, vfloat16m8_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf8_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf8_m( @@ -994,7 +994,7 @@ vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_m(vbool64_t mask, vfloat16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf8_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf4_m( @@ -1003,7 +1003,7 @@ vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_m(vbool64_t mask, vfloat16mf4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf4_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf4_m( @@ -1012,7 +1012,7 @@ vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_m(vbool32_t mask, vfloat16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf4_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf2_m( @@ -1021,7 +1021,7 @@ vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_m(vbool32_t mask, vfloat16mf2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf2_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf2_m( @@ -1030,7 +1030,7 @@ vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_m(vbool16_t mask, vfloat16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf2_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m1_m( @@ -1039,7 +1039,7 @@ vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_m(vbool16_t mask, vfloat16m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_xu_f_w_u8m1_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfncvt_xu_f_w_u8m1_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u8m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m1_m( @@ -1048,7 +1048,7 @@ vuint8m1_t test_vfncvt_xu_f_w_u8m1_m(vbool8_t mask, vfloat16m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m1_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m2_m( @@ -1057,7 +1057,7 @@ vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_m(vbool8_t mask, vfloat16m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_xu_f_w_u8m2_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfncvt_xu_f_w_u8m2_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u8m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m2_m( @@ -1066,7 +1066,7 @@ vuint8m2_t test_vfncvt_xu_f_w_u8m2_m(vbool4_t mask, vfloat16m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m2_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m4_m( @@ -1075,7 +1075,7 @@ vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_m(vbool4_t mask, vfloat16m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_xu_f_w_u8m4_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { - return vfncvt_xu_f_w_u8m4_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u8m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m4_m( @@ -1084,7 +1084,7 @@ vuint8m4_t test_vfncvt_xu_f_w_u8m4_m(vbool2_t mask, vfloat16m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_m(vbool2_t mask, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m4_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf4_m( @@ -1093,7 +1093,7 @@ vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_m(vbool2_t mask, vfloat16m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_x_f_w_i16mf4_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfncvt_x_f_w_i16mf4_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf4_m( @@ -1102,7 +1102,7 @@ vint16mf4_t test_vfncvt_x_f_w_i16mf4_m(vbool64_t mask, vfloat32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf4_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf2_m( @@ -1111,7 +1111,7 @@ vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_m(vbool64_t mask, vfloat32mf2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_x_f_w_i16mf2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfncvt_x_f_w_i16mf2_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf2_m( @@ -1120,7 +1120,7 @@ vint16mf2_t test_vfncvt_x_f_w_i16mf2_m(vbool32_t mask, vfloat32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf2_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m1_m( @@ -1129,7 +1129,7 @@ vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_m(vbool32_t mask, vfloat32m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_x_f_w_i16m1_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfncvt_x_f_w_i16m1_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m1_m( @@ -1138,7 +1138,7 @@ vint16m1_t test_vfncvt_x_f_w_i16m1_m(vbool16_t mask, vfloat32m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m1_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m2_m( @@ -1147,7 +1147,7 @@ vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_m(vbool16_t mask, vfloat32m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_x_f_w_i16m2_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfncvt_x_f_w_i16m2_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m2_m( @@ -1156,7 +1156,7 @@ vint16m2_t test_vfncvt_x_f_w_i16m2_m(vbool8_t mask, vfloat32m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m2_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m4_m( @@ -1165,7 +1165,7 @@ vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_m(vbool8_t mask, vfloat32m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_x_f_w_i16m4_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfncvt_x_f_w_i16m4_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m4_m( @@ -1174,7 +1174,7 @@ vint16m4_t test_vfncvt_x_f_w_i16m4_m(vbool4_t mask, vfloat32m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m4_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf4_m( @@ -1183,7 +1183,7 @@ vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_m(vbool4_t mask, vfloat32m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf4_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf4_m( @@ -1192,7 +1192,7 @@ vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_m(vbool64_t mask, vfloat32mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf4_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf2_m( @@ -1201,7 +1201,7 @@ vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_m(vbool64_t mask, vfloat32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf2_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf2_m( @@ -1210,7 +1210,7 @@ vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_m(vbool32_t mask, vfloat32m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf2_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m1_m( @@ -1219,7 +1219,7 @@ vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_m(vbool32_t mask, vfloat32m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_xu_f_w_u16m1_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfncvt_xu_f_w_u16m1_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m1_m( @@ -1228,7 +1228,7 @@ vuint16m1_t test_vfncvt_xu_f_w_u16m1_m(vbool16_t mask, vfloat32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m1_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m2_m( @@ -1237,7 +1237,7 @@ vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_m(vbool16_t mask, vfloat32m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_xu_f_w_u16m2_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfncvt_xu_f_w_u16m2_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m2_m( @@ -1246,7 +1246,7 @@ vuint16m2_t test_vfncvt_xu_f_w_u16m2_m(vbool8_t mask, vfloat32m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m2_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m4_m( @@ -1255,7 +1255,7 @@ vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_m(vbool8_t mask, vfloat32m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_xu_f_w_u16m4_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfncvt_xu_f_w_u16m4_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m4_m( @@ -1264,7 +1264,7 @@ vuint16m4_t test_vfncvt_xu_f_w_u16m4_m(vbool4_t mask, vfloat32m8_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m4_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf4_m( @@ -1273,7 +1273,7 @@ vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_m(vbool4_t mask, vfloat32m8_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_m(vbool64_t mask, vint32mf2_t src, size_t vl) { - return vfncvt_f_x_w_f16mf4_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf2_m( @@ -1282,7 +1282,7 @@ vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_m(vbool64_t mask, vint32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_m(vbool32_t mask, vint32m1_t src, size_t vl) { - return vfncvt_f_x_w_f16mf2_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m1_m( @@ -1291,7 +1291,7 @@ vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_m(vbool32_t mask, vint32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_x_w_f16m1_m(vbool16_t mask, vint32m2_t src, size_t vl) { - return vfncvt_f_x_w_f16m1_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m2_m( @@ -1300,7 +1300,7 @@ vfloat16m1_t test_vfncvt_f_x_w_f16m1_m(vbool16_t mask, vint32m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_x_w_f16m2_m(vbool8_t mask, vint32m4_t src, size_t vl) { - return vfncvt_f_x_w_f16m2_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m4_m( @@ -1309,7 +1309,7 @@ vfloat16m2_t test_vfncvt_f_x_w_f16m2_m(vbool8_t mask, vint32m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_x_w_f16m4_m(vbool4_t mask, vint32m8_t src, size_t vl) { - return vfncvt_f_x_w_f16m4_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf4_m( @@ -1318,7 +1318,7 @@ vfloat16m4_t test_vfncvt_f_x_w_f16m4_m(vbool4_t mask, vint32m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_m(vbool64_t mask, vuint32mf2_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf4_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf2_m( @@ -1327,7 +1327,7 @@ vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_m(vbool64_t mask, vuint32mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_m(vbool32_t mask, vuint32m1_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf2_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m1_m( @@ -1336,7 +1336,7 @@ vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_m(vbool32_t mask, vuint32m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_xu_w_f16m1_m(vbool16_t mask, vuint32m2_t src, size_t vl) { - return vfncvt_f_xu_w_f16m1_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m2_m( @@ -1345,7 +1345,7 @@ vfloat16m1_t test_vfncvt_f_xu_w_f16m1_m(vbool16_t mask, vuint32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_xu_w_f16m2_m(vbool8_t mask, vuint32m4_t src, size_t vl) { - return vfncvt_f_xu_w_f16m2_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m4_m( @@ -1354,7 +1354,7 @@ vfloat16m2_t test_vfncvt_f_xu_w_f16m2_m(vbool8_t mask, vuint32m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_xu_w_f16m4_m(vbool4_t mask, vuint32m8_t src, size_t vl) { - return vfncvt_f_xu_w_f16m4_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf4_m( @@ -1363,7 +1363,7 @@ vfloat16m4_t test_vfncvt_f_xu_w_f16m4_m(vbool4_t mask, vuint32m8_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfncvt_f_f_w_f16mf4_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf4_m( @@ -1372,7 +1372,7 @@ vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_m(vbool64_t mask, vfloat32mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf4_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf2_m( @@ -1381,7 +1381,7 @@ vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_m(vbool64_t mask, vfloat32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfncvt_f_f_w_f16mf2_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf2_m( @@ -1390,7 +1390,7 @@ vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_m(vbool32_t mask, vfloat32m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf2_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m1_m( @@ -1399,7 +1399,7 @@ vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_m(vbool32_t mask, vfloat32m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_f_w_f16m1_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfncvt_f_f_w_f16m1_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m1_m( @@ -1408,7 +1408,7 @@ vfloat16m1_t test_vfncvt_f_f_w_f16m1_m(vbool16_t mask, vfloat32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m1_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m2_m( @@ -1417,7 +1417,7 @@ vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_m(vbool16_t mask, vfloat32m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_f_w_f16m2_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfncvt_f_f_w_f16m2_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m2_m( @@ -1426,7 +1426,7 @@ vfloat16m2_t test_vfncvt_f_f_w_f16m2_m(vbool8_t mask, vfloat32m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m2_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m4_m( @@ -1435,7 +1435,7 @@ vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_m(vbool8_t mask, vfloat32m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_f_w_f16m4_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfncvt_f_f_w_f16m4_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m4_m( @@ -1444,7 +1444,7 @@ vfloat16m4_t test_vfncvt_f_f_w_f16m4_m(vbool4_t mask, vfloat32m8_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_m(vbool4_t mask, vfloat32m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m4_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32mf2_m( @@ -1453,7 +1453,7 @@ vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_m(vbool4_t mask, vfloat32m8_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_x_f_w_i32mf2_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfncvt_x_f_w_i32mf2_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32mf2_m( @@ -1462,7 +1462,7 @@ vint32mf2_t test_vfncvt_x_f_w_i32mf2_m(vbool64_t mask, vfloat64m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32mf2_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m1_m( @@ -1471,7 +1471,7 @@ vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_m(vbool64_t mask, vfloat64m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_x_f_w_i32m1_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfncvt_x_f_w_i32m1_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m1_m( @@ -1480,7 +1480,7 @@ vint32m1_t test_vfncvt_x_f_w_i32m1_m(vbool32_t mask, vfloat64m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m1_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m2_m( @@ -1489,7 +1489,7 @@ vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_m(vbool32_t mask, vfloat64m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_x_f_w_i32m2_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfncvt_x_f_w_i32m2_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m2_m( @@ -1498,7 +1498,7 @@ vint32m2_t test_vfncvt_x_f_w_i32m2_m(vbool16_t mask, vfloat64m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m2_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m4_m( @@ -1507,7 +1507,7 @@ vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_m(vbool16_t mask, vfloat64m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_x_f_w_i32m4_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfncvt_x_f_w_i32m4_m(mask, src, vl); + return __riscv_vfncvt_x_f_w_i32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m4_m( @@ -1516,7 +1516,7 @@ vint32m4_t test_vfncvt_x_f_w_i32m4_m(vbool8_t mask, vfloat64m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m4_m(mask, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32mf2_m( @@ -1525,7 +1525,7 @@ vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_m(vbool8_t mask, vfloat64m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfncvt_xu_f_w_u32mf2_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32mf2_m( @@ -1534,7 +1534,7 @@ vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_m(vbool64_t mask, vfloat64m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32mf2_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m1_m( @@ -1543,7 +1543,7 @@ vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_m(vbool64_t mask, vfloat64m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_xu_f_w_u32m1_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfncvt_xu_f_w_u32m1_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m1_m( @@ -1552,7 +1552,7 @@ vuint32m1_t test_vfncvt_xu_f_w_u32m1_m(vbool32_t mask, vfloat64m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m1_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m2_m( @@ -1561,7 +1561,7 @@ vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_m(vbool32_t mask, vfloat64m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_xu_f_w_u32m2_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfncvt_xu_f_w_u32m2_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m2_m( @@ -1570,7 +1570,7 @@ vuint32m2_t test_vfncvt_xu_f_w_u32m2_m(vbool16_t mask, vfloat64m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m2_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m4_m( @@ -1579,7 +1579,7 @@ vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_m(vbool16_t mask, vfloat64m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_xu_f_w_u32m4_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfncvt_xu_f_w_u32m4_m(mask, src, vl); + return __riscv_vfncvt_xu_f_w_u32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m4_m( @@ -1588,7 +1588,7 @@ vuint32m4_t test_vfncvt_xu_f_w_u32m4_m(vbool8_t mask, vfloat64m8_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m4_m(mask, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32mf2_m( @@ -1597,7 +1597,7 @@ vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_m(vbool8_t mask, vfloat64m8_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_m(vbool64_t mask, vint64m1_t src, size_t vl) { - return vfncvt_f_x_w_f32mf2_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m1_m( @@ -1606,7 +1606,7 @@ vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_m(vbool64_t mask, vint64m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_x_w_f32m1_m(vbool32_t mask, vint64m2_t src, size_t vl) { - return vfncvt_f_x_w_f32m1_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m2_m( @@ -1615,7 +1615,7 @@ vfloat32m1_t test_vfncvt_f_x_w_f32m1_m(vbool32_t mask, vint64m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_x_w_f32m2_m(vbool16_t mask, vint64m4_t src, size_t vl) { - return vfncvt_f_x_w_f32m2_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m4_m( @@ -1624,7 +1624,7 @@ vfloat32m2_t test_vfncvt_f_x_w_f32m2_m(vbool16_t mask, vint64m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_x_w_f32m4_m(vbool8_t mask, vint64m8_t src, size_t vl) { - return vfncvt_f_x_w_f32m4_m(mask, src, vl); + return __riscv_vfncvt_f_x_w_f32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32mf2_m( @@ -1633,7 +1633,7 @@ vfloat32m4_t test_vfncvt_f_x_w_f32m4_m(vbool8_t mask, vint64m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_m(vbool64_t mask, vuint64m1_t src, size_t vl) { - return vfncvt_f_xu_w_f32mf2_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m1_m( @@ -1642,7 +1642,7 @@ vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_m(vbool64_t mask, vuint64m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_xu_w_f32m1_m(vbool32_t mask, vuint64m2_t src, size_t vl) { - return vfncvt_f_xu_w_f32m1_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m2_m( @@ -1651,7 +1651,7 @@ vfloat32m1_t test_vfncvt_f_xu_w_f32m1_m(vbool32_t mask, vuint64m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_xu_w_f32m2_m(vbool16_t mask, vuint64m4_t src, size_t vl) { - return vfncvt_f_xu_w_f32m2_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m4_m( @@ -1660,7 +1660,7 @@ vfloat32m2_t test_vfncvt_f_xu_w_f32m2_m(vbool16_t mask, vuint64m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_xu_w_f32m4_m(vbool8_t mask, vuint64m8_t src, size_t vl) { - return vfncvt_f_xu_w_f32m4_m(mask, src, vl); + return __riscv_vfncvt_f_xu_w_f32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32mf2_m( @@ -1669,7 +1669,7 @@ vfloat32m4_t test_vfncvt_f_xu_w_f32m4_m(vbool8_t mask, vuint64m8_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfncvt_f_f_w_f32mf2_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32mf2_m( @@ -1678,7 +1678,7 @@ vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_m(vbool64_t mask, vfloat64m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_m(vbool64_t mask, vfloat64m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32mf2_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m1_m( @@ -1687,7 +1687,7 @@ vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_m(vbool64_t mask, vfloat64m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_f_w_f32m1_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfncvt_f_f_w_f32m1_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m1_m( @@ -1696,7 +1696,7 @@ vfloat32m1_t test_vfncvt_f_f_w_f32m1_m(vbool32_t mask, vfloat64m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_m(vbool32_t mask, vfloat64m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m1_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m2_m( @@ -1705,7 +1705,7 @@ vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_m(vbool32_t mask, vfloat64m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_f_w_f32m2_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfncvt_f_f_w_f32m2_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m2_m( @@ -1714,7 +1714,7 @@ vfloat32m2_t test_vfncvt_f_f_w_f32m2_m(vbool16_t mask, vfloat64m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_m(vbool16_t mask, vfloat64m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m2_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m4_m( @@ -1723,7 +1723,7 @@ vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_m(vbool16_t mask, vfloat64m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_f_w_f32m4_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfncvt_f_f_w_f32m4_m(mask, src, vl); + return __riscv_vfncvt_f_f_w_f32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m4_m( @@ -1732,6 +1732,6 @@ vfloat32m4_t test_vfncvt_f_f_w_f32m4_m(vbool8_t mask, vfloat64m8_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4_m(vbool8_t mask, vfloat64m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m4_m(mask, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m4_m(mask, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfneg.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfneg.c index ca6dd926f96a71ab84204e30127dc104d0cec864..e777cfa8e8c4738adb9a33df4aa3d42deb6e25fd 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfneg.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfneg.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfneg_v_f16mf4(vfloat16mf4_t op1, size_t vl) { - return vfneg_v_f16mf4(op1, vl); + return __riscv_vfneg_v_f16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfneg_v_f16mf4(vfloat16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfneg_v_f16mf2(vfloat16mf2_t op1, size_t vl) { - return vfneg_v_f16mf2(op1, vl); + return __riscv_vfneg_v_f16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfneg_v_f16mf2(vfloat16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfneg_v_f16m1(vfloat16m1_t op1, size_t vl) { - return vfneg_v_f16m1(op1, vl); + return __riscv_vfneg_v_f16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfneg_v_f16m1(vfloat16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfneg_v_f16m2(vfloat16m2_t op1, size_t vl) { - return vfneg_v_f16m2(op1, vl); + return __riscv_vfneg_v_f16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfneg_v_f16m2(vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfneg_v_f16m4(vfloat16m4_t op1, size_t vl) { - return vfneg_v_f16m4(op1, vl); + return __riscv_vfneg_v_f16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfneg_v_f16m4(vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfneg_v_f16m8(vfloat16m8_t op1, size_t vl) { - return vfneg_v_f16m8(op1, vl); + return __riscv_vfneg_v_f16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfneg_v_f16m8(vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfneg_v_f32mf2(vfloat32mf2_t op1, size_t vl) { - return vfneg_v_f32mf2(op1, vl); + return __riscv_vfneg_v_f32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfneg_v_f32mf2(vfloat32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfneg_v_f32m1(vfloat32m1_t op1, size_t vl) { - return vfneg_v_f32m1(op1, vl); + return __riscv_vfneg_v_f32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfneg_v_f32m1(vfloat32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfneg_v_f32m2(vfloat32m2_t op1, size_t vl) { - return vfneg_v_f32m2(op1, vl); + return __riscv_vfneg_v_f32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfneg_v_f32m2(vfloat32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfneg_v_f32m4(vfloat32m4_t op1, size_t vl) { - return vfneg_v_f32m4(op1, vl); + return __riscv_vfneg_v_f32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfneg_v_f32m4(vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfneg_v_f32m8(vfloat32m8_t op1, size_t vl) { - return vfneg_v_f32m8(op1, vl); + return __riscv_vfneg_v_f32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfneg_v_f32m8(vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfneg_v_f64m1(vfloat64m1_t op1, size_t vl) { - return vfneg_v_f64m1(op1, vl); + return __riscv_vfneg_v_f64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfneg_v_f64m1(vfloat64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfneg_v_f64m2(vfloat64m2_t op1, size_t vl) { - return vfneg_v_f64m2(op1, vl); + return __riscv_vfneg_v_f64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfneg_v_f64m2(vfloat64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfneg_v_f64m4(vfloat64m4_t op1, size_t vl) { - return vfneg_v_f64m4(op1, vl); + return __riscv_vfneg_v_f64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfneg_v_f64m4(vfloat64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfneg_v_f64m8(vfloat64m8_t op1, size_t vl) { - return vfneg_v_f64m8(op1, vl); + return __riscv_vfneg_v_f64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfneg_v_f64m8(vfloat64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfneg_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t vl) { - return vfneg_v_f16mf4_m(mask, op1, vl); + return __riscv_vfneg_v_f16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfneg_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfneg_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t vl) { - return vfneg_v_f16mf2_m(mask, op1, vl); + return __riscv_vfneg_v_f16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfneg_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfneg_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) { - return vfneg_v_f16m1_m(mask, op1, vl); + return __riscv_vfneg_v_f16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfneg_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfneg_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { - return vfneg_v_f16m2_m(mask, op1, vl); + return __riscv_vfneg_v_f16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfneg_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfneg_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { - return vfneg_v_f16m4_m(mask, op1, vl); + return __riscv_vfneg_v_f16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfneg_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfneg_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { - return vfneg_v_f16m8_m(mask, op1, vl); + return __riscv_vfneg_v_f16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfneg_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfneg_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t vl) { - return vfneg_v_f32mf2_m(mask, op1, vl); + return __riscv_vfneg_v_f32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfneg_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfneg_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) { - return vfneg_v_f32m1_m(mask, op1, vl); + return __riscv_vfneg_v_f32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfneg_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfneg_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) { - return vfneg_v_f32m2_m(mask, op1, vl); + return __riscv_vfneg_v_f32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfneg_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfneg_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { - return vfneg_v_f32m4_m(mask, op1, vl); + return __riscv_vfneg_v_f32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfneg_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfneg_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { - return vfneg_v_f32m8_m(mask, op1, vl); + return __riscv_vfneg_v_f32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfneg_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfneg_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) { - return vfneg_v_f64m1_m(mask, op1, vl); + return __riscv_vfneg_v_f64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfneg_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfneg_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) { - return vfneg_v_f64m2_m(mask, op1, vl); + return __riscv_vfneg_v_f64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfneg_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfneg_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) { - return vfneg_v_f64m4_m(mask, op1, vl); + return __riscv_vfneg_v_f64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfneg_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfneg_v_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t vl) { - return vfneg_v_f64m8_m(mask, op1, vl); + return __riscv_vfneg_v_f64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmacc.c index aabbe0ccae878b9da6a11b5b4347752e181c3fa2..d3c02a0adb94a87e654863ccb443c3934bf51ace 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vv_f16mf4(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfnmacc_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vf_f16mf4(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfnmacc_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vv_f16mf2(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfnmacc_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vf_f16mf2(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfnmacc_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vv_f16m1(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfnmacc_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vf_f16m1(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfnmacc_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vv_f16m2(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfnmacc_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vf_f16m2(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfnmacc_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vv_f16m4(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfnmacc_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vf_f16m4(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfnmacc_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vv_f16m8(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfnmacc_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vf_f16m8(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfnmacc_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfnmacc_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vf_f32mf2(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfnmacc_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfnmacc_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vf_f32m1(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfnmacc_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfnmacc_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vf_f32m2(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfnmacc_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfnmacc_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vf_f32m4(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfnmacc_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfnmacc_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vf_f32m8(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfnmacc_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfnmacc_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vf_f64m1(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfnmacc_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfnmacc_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vf_f64m2(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfnmacc_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfnmacc_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vf_f64m4(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfnmacc_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfnmacc_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vf_f64m8(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfnmacc_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vv_f16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfnmacc_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vf_f16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfnmacc_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vv_f16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfnmacc_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vf_f16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfnmacc_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vv_f16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfnmacc_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vf_f16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfnmacc_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vv_f16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfnmacc_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vf_f16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfnmacc_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vv_f16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfnmacc_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vf_f16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfnmacc_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vv_f16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfnmacc_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vf_f16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfnmacc_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfnmacc_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vf_f32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfnmacc_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfnmacc_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vf_f32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfnmacc_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfnmacc_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vf_f32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfnmacc_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfnmacc_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vf_f32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfnmacc_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfnmacc_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vf_f32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfnmacc_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfnmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vf_f64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfnmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfnmacc_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vf_f64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfnmacc_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfnmacc_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vf_f64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfnmacc_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfnmacc_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vf_f64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmadd.c index c2cf632313dba779266b305402fabfc51079ae07..563abe3ac4ad8966afb5f29e7c83f064d407b435 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vv_f16mf4(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfnmadd_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vf_f16mf4(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfnmadd_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vv_f16mf2(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfnmadd_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vf_f16mf2(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfnmadd_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vv_f16m1(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfnmadd_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vf_f16m1(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfnmadd_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vv_f16m2(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfnmadd_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vf_f16m2(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfnmadd_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vv_f16m4(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfnmadd_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vf_f16m4(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfnmadd_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vv_f16m8(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfnmadd_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vf_f16m8(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfnmadd_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfnmadd_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vf_f32mf2(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfnmadd_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfnmadd_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vf_f32m1(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfnmadd_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfnmadd_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vf_f32m2(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfnmadd_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfnmadd_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vf_f32m4(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfnmadd_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfnmadd_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vf_f32m8(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfnmadd_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfnmadd_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vf_f64m1(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfnmadd_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfnmadd_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vf_f64m2(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfnmadd_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfnmadd_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vf_f64m4(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfnmadd_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfnmadd_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vf_f64m8(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfnmadd_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vv_f16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfnmadd_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vf_f16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfnmadd_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vv_f16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfnmadd_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vf_f16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfnmadd_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vv_f16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfnmadd_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vf_f16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfnmadd_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vv_f16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfnmadd_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vf_f16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfnmadd_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vv_f16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfnmadd_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vf_f16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfnmadd_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vv_f16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfnmadd_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vf_f16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfnmadd_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfnmadd_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vf_f32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfnmadd_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfnmadd_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vf_f32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfnmadd_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfnmadd_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vf_f32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfnmadd_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfnmadd_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vf_f32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfnmadd_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfnmadd_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vf_f32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfnmadd_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfnmadd_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vf_f64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfnmadd_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfnmadd_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vf_f64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfnmadd_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfnmadd_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vf_f64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfnmadd_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfnmadd_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vf_f64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsac.c index 6beaaa88861349b79432da4c0e8f1043b7c14fd0..55601d7884fe61053c42f85777038dd5a8ad87f9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vv_f16mf4(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfnmsac_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vf_f16mf4(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfnmsac_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vv_f16mf2(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfnmsac_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vf_f16mf2(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfnmsac_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vv_f16m1(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfnmsac_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vf_f16m1(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfnmsac_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vv_f16m2(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfnmsac_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vf_f16m2(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfnmsac_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vv_f16m4(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfnmsac_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vf_f16m4(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfnmsac_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vv_f16m8(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfnmsac_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vf_f16m8(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfnmsac_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfnmsac_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vf_f32mf2(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfnmsac_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfnmsac_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vf_f32m1(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfnmsac_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfnmsac_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vf_f32m2(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfnmsac_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfnmsac_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vf_f32m4(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfnmsac_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfnmsac_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vf_f32m8(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfnmsac_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfnmsac_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vf_f64m1(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfnmsac_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfnmsac_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vf_f64m2(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfnmsac_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfnmsac_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vf_f64m4(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfnmsac_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfnmsac_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vf_f64m8(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfnmsac_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vv_f16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfnmsac_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vf_f16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfnmsac_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vv_f16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfnmsac_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vf_f16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfnmsac_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vv_f16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfnmsac_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vf_f16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfnmsac_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vv_f16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfnmsac_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vf_f16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfnmsac_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vv_f16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfnmsac_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vf_f16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfnmsac_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vv_f16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfnmsac_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vf_f16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfnmsac_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfnmsac_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vf_f32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfnmsac_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfnmsac_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vf_f32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfnmsac_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfnmsac_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vf_f32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfnmsac_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfnmsac_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vf_f32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfnmsac_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfnmsac_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vf_f32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfnmsac_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfnmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vf_f64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfnmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfnmsac_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vf_f64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfnmsac_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfnmsac_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vf_f64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfnmsac_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfnmsac_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vf_f64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsub.c index 23ea41ea6086e9b77cb95edbe4b86db8bd82ba21..5498000e4a2c9b1ec9a75ffcb4d35891a7c0b2ab 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfnmsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vv_f16mf4(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfnmsub_vv_f16mf4(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vf_f16mf4(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfnmsub_vf_f16mf4(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vv_f16mf2(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfnmsub_vv_f16mf2(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vf_f16mf2(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfnmsub_vf_f16mf2(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vv_f16m1(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfnmsub_vv_f16m1(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vf_f16m1(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfnmsub_vf_f16m1(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vv_f16m2(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfnmsub_vv_f16m2(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vf_f16m2(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfnmsub_vf_f16m2(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vv_f16m4(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfnmsub_vv_f16m4(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vf_f16m4(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfnmsub_vf_f16m4(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vv_f16m8(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfnmsub_vv_f16m8(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vf_f16m8(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfnmsub_vf_f16m8(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfnmsub_vv_f32mf2(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vf_f32mf2(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfnmsub_vf_f32mf2(vfloat32mf2_t vd, float rs1, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfnmsub_vv_f32m1(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vf_f32m1(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfnmsub_vf_f32m1(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfnmsub_vv_f32m2(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vf_f32m2(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfnmsub_vf_f32m2(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfnmsub_vv_f32m4(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vf_f32m4(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfnmsub_vf_f32m4(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfnmsub_vv_f32m8(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vf_f32m8(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfnmsub_vf_f32m8(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfnmsub_vv_f64m1(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vf_f64m1(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfnmsub_vf_f64m1(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfnmsub_vv_f64m2(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vf_f64m2(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfnmsub_vf_f64m2(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfnmsub_vv_f64m4(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vf_f64m4(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfnmsub_vf_f64m4(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfnmsub_vv_f64m8(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vf_f64m8(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfnmsub_vf_f64m8(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vv_f16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfnmsub_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vf_f16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfnmsub_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vv_f16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfnmsub_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vf_f16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfnmsub_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vv_f16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfnmsub_vv_f16m1_m(vbool16_t mask, vfloat16m1_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vf_f16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfnmsub_vf_f16m1_m(vbool16_t mask, vfloat16m1_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vv_f16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfnmsub_vv_f16m2_m(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vf_f16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfnmsub_vf_f16m2_m(vbool8_t mask, vfloat16m2_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vv_f16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfnmsub_vv_f16m4_m(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vf_f16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfnmsub_vf_f16m4_m(vbool4_t mask, vfloat16m4_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vv_f16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfnmsub_vv_f16m8_m(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vf_f16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfnmsub_vf_f16m8_m(vbool2_t mask, vfloat16m8_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfnmsub_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vf_f32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfnmsub_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfnmsub_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vf_f32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfnmsub_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfnmsub_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vf_f32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfnmsub_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfnmsub_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vf_f32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfnmsub_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfnmsub_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vf_f32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfnmsub_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfnmsub_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vf_f64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfnmsub_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfnmsub_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vf_f64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfnmsub_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfnmsub_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vf_f64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfnmsub_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfnmsub_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vf_f64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrdiv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrdiv.c index 612dcc5c6e7e3149794429f6940f99e6266aa476..6763004c9b8b02c084f40a9f3e372b89dbfb45ce 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrdiv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrdiv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrdiv_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf4(op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfrdiv_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrdiv_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf2(op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfrdiv_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrdiv_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m1(op1, op2, vl); + return __riscv_vfrdiv_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfrdiv_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrdiv_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m2(op1, op2, vl); + return __riscv_vfrdiv_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfrdiv_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrdiv_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m4(op1, op2, vl); + return __riscv_vfrdiv_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfrdiv_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrdiv_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m8(op1, op2, vl); + return __riscv_vfrdiv_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfrdiv_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrdiv_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32mf2(op1, op2, vl); + return __riscv_vfrdiv_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfrdiv_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrdiv_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m1(op1, op2, vl); + return __riscv_vfrdiv_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfrdiv_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrdiv_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m2(op1, op2, vl); + return __riscv_vfrdiv_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfrdiv_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrdiv_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m4(op1, op2, vl); + return __riscv_vfrdiv_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfrdiv_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrdiv_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m8(op1, op2, vl); + return __riscv_vfrdiv_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfrdiv_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrdiv_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m1(op1, op2, vl); + return __riscv_vfrdiv_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfrdiv_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrdiv_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m2(op1, op2, vl); + return __riscv_vfrdiv_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfrdiv_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrdiv_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m4(op1, op2, vl); + return __riscv_vfrdiv_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfrdiv_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrdiv_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m8(op1, op2, vl); + return __riscv_vfrdiv_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfrdiv_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrdiv_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfrdiv_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrdiv_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfrdiv_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrdiv_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfrdiv_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrdiv_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfrdiv_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrdiv_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfrdiv_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrdiv_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfrdiv_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrdiv_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfrdiv_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrdiv_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfrdiv_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrdiv_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfrdiv_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrdiv_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfrdiv_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrdiv_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfrdiv_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrdiv_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfrdiv_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrdiv_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfrdiv_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrdiv_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfrdiv_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrdiv_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrec7.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrec7.c index ab53165b6a8559e99a6664419643859a006277ef..2f6f66ec31cd320413b4179aeebfa7a3d7354ced 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrec7.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrec7.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrec7_v_f16mf4(vfloat16mf4_t op1, size_t vl) { - return vfrec7_v_f16mf4(op1, vl); + return __riscv_vfrec7_v_f16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfrec7_v_f16mf4(vfloat16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrec7_v_f16mf2(vfloat16mf2_t op1, size_t vl) { - return vfrec7_v_f16mf2(op1, vl); + return __riscv_vfrec7_v_f16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfrec7_v_f16mf2(vfloat16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrec7_v_f16m1(vfloat16m1_t op1, size_t vl) { - return vfrec7_v_f16m1(op1, vl); + return __riscv_vfrec7_v_f16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfrec7_v_f16m1(vfloat16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrec7_v_f16m2(vfloat16m2_t op1, size_t vl) { - return vfrec7_v_f16m2(op1, vl); + return __riscv_vfrec7_v_f16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfrec7_v_f16m2(vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrec7_v_f16m4(vfloat16m4_t op1, size_t vl) { - return vfrec7_v_f16m4(op1, vl); + return __riscv_vfrec7_v_f16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfrec7_v_f16m4(vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrec7_v_f16m8(vfloat16m8_t op1, size_t vl) { - return vfrec7_v_f16m8(op1, vl); + return __riscv_vfrec7_v_f16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfrec7_v_f16m8(vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrec7_v_f32mf2(vfloat32mf2_t op1, size_t vl) { - return vfrec7_v_f32mf2(op1, vl); + return __riscv_vfrec7_v_f32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfrec7_v_f32mf2(vfloat32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrec7_v_f32m1(vfloat32m1_t op1, size_t vl) { - return vfrec7_v_f32m1(op1, vl); + return __riscv_vfrec7_v_f32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfrec7_v_f32m1(vfloat32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrec7_v_f32m2(vfloat32m2_t op1, size_t vl) { - return vfrec7_v_f32m2(op1, vl); + return __riscv_vfrec7_v_f32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfrec7_v_f32m2(vfloat32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrec7_v_f32m4(vfloat32m4_t op1, size_t vl) { - return vfrec7_v_f32m4(op1, vl); + return __riscv_vfrec7_v_f32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfrec7_v_f32m4(vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrec7_v_f32m8(vfloat32m8_t op1, size_t vl) { - return vfrec7_v_f32m8(op1, vl); + return __riscv_vfrec7_v_f32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfrec7_v_f32m8(vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrec7_v_f64m1(vfloat64m1_t op1, size_t vl) { - return vfrec7_v_f64m1(op1, vl); + return __riscv_vfrec7_v_f64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfrec7_v_f64m1(vfloat64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrec7_v_f64m2(vfloat64m2_t op1, size_t vl) { - return vfrec7_v_f64m2(op1, vl); + return __riscv_vfrec7_v_f64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfrec7_v_f64m2(vfloat64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrec7_v_f64m4(vfloat64m4_t op1, size_t vl) { - return vfrec7_v_f64m4(op1, vl); + return __riscv_vfrec7_v_f64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfrec7_v_f64m4(vfloat64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrec7_v_f64m8(vfloat64m8_t op1, size_t vl) { - return vfrec7_v_f64m8(op1, vl); + return __riscv_vfrec7_v_f64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfrec7_v_f64m8(vfloat64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrec7_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t vl) { - return vfrec7_v_f16mf4_m(mask, op1, vl); + return __riscv_vfrec7_v_f16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfrec7_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrec7_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t vl) { - return vfrec7_v_f16mf2_m(mask, op1, vl); + return __riscv_vfrec7_v_f16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfrec7_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrec7_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) { - return vfrec7_v_f16m1_m(mask, op1, vl); + return __riscv_vfrec7_v_f16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfrec7_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrec7_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { - return vfrec7_v_f16m2_m(mask, op1, vl); + return __riscv_vfrec7_v_f16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfrec7_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrec7_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { - return vfrec7_v_f16m4_m(mask, op1, vl); + return __riscv_vfrec7_v_f16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfrec7_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrec7_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { - return vfrec7_v_f16m8_m(mask, op1, vl); + return __riscv_vfrec7_v_f16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfrec7_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrec7_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t vl) { - return vfrec7_v_f32mf2_m(mask, op1, vl); + return __riscv_vfrec7_v_f32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfrec7_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrec7_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) { - return vfrec7_v_f32m1_m(mask, op1, vl); + return __riscv_vfrec7_v_f32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfrec7_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrec7_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) { - return vfrec7_v_f32m2_m(mask, op1, vl); + return __riscv_vfrec7_v_f32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfrec7_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrec7_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { - return vfrec7_v_f32m4_m(mask, op1, vl); + return __riscv_vfrec7_v_f32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfrec7_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrec7_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { - return vfrec7_v_f32m8_m(mask, op1, vl); + return __riscv_vfrec7_v_f32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfrec7_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrec7_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) { - return vfrec7_v_f64m1_m(mask, op1, vl); + return __riscv_vfrec7_v_f64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfrec7_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrec7_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) { - return vfrec7_v_f64m2_m(mask, op1, vl); + return __riscv_vfrec7_v_f64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfrec7_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrec7_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) { - return vfrec7_v_f64m4_m(mask, op1, vl); + return __riscv_vfrec7_v_f64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfrec7_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrec7_v_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t vl) { - return vfrec7_v_f64m8_m(mask, op1, vl); + return __riscv_vfrec7_v_f64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredmax.c index 749293f86a0d344c5e15d533a687dbda1233fb25..152a46abbb9e7f1c1118c05fc26e25fc52f3d29d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredmax.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredmax.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1(vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16mf4_f16m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f16mf4_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16mf2_f16m1( @@ -22,7 +22,7 @@ vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1(vfloat16mf4_t vector, vfloat16m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1(vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16mf2_f16m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f16mf2_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m1_f16m1( @@ -31,7 +31,7 @@ vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1(vfloat16mf2_t vector, vfloat16m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m1_f16m1(vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m1_f16m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f16m1_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m2_f16m1( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfredmax_vs_f16m1_f16m1(vfloat16m1_t vector, vfloat16m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m2_f16m1(vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m2_f16m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f16m2_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m4_f16m1( @@ -49,7 +49,7 @@ vfloat16m1_t test_vfredmax_vs_f16m2_f16m1(vfloat16m2_t vector, vfloat16m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m4_f16m1(vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m4_f16m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f16m4_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m8_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfredmax_vs_f16m4_f16m1(vfloat16m4_t vector, vfloat16m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m8_f16m1(vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m8_f16m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f16m8_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32mf2_f32m1( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfredmax_vs_f16m8_f16m1(vfloat16m8_t vector, vfloat16m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1(vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32mf2_f32m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f32mf2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m1_f32m1( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1(vfloat32mf2_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m1_f32m1(vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m1_f32m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f32m1_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m2_f32m1( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfredmax_vs_f32m1_f32m1(vfloat32m1_t vector, vfloat32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m2_f32m1(vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m2_f32m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f32m2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m4_f32m1( @@ -94,7 +94,7 @@ vfloat32m1_t test_vfredmax_vs_f32m2_f32m1(vfloat32m2_t vector, vfloat32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m4_f32m1(vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m4_f32m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f32m4_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m8_f32m1( @@ -103,7 +103,7 @@ vfloat32m1_t test_vfredmax_vs_f32m4_f32m1(vfloat32m4_t vector, vfloat32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m8_f32m1(vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m8_f32m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f32m8_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m1_f64m1( @@ -112,7 +112,7 @@ vfloat32m1_t test_vfredmax_vs_f32m8_f32m1(vfloat32m8_t vector, vfloat32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m1_f64m1(vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m1_f64m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f64m1_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m2_f64m1( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfredmax_vs_f64m1_f64m1(vfloat64m1_t vector, vfloat64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m2_f64m1(vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m2_f64m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f64m2_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m4_f64m1( @@ -130,7 +130,7 @@ vfloat64m1_t test_vfredmax_vs_f64m2_f64m1(vfloat64m2_t vector, vfloat64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m4_f64m1(vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m4_f64m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f64m4_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m8_f64m1( @@ -139,7 +139,7 @@ vfloat64m1_t test_vfredmax_vs_f64m4_f64m1(vfloat64m4_t vector, vfloat64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m8_f64m1(vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m8_f64m1(vector, scalar, vl); + return __riscv_vfredmax_vs_f64m8_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16mf4_f16m1_m( @@ -148,7 +148,7 @@ vfloat64m1_t test_vfredmax_vs_f64m8_f64m1(vfloat64m8_t vector, vfloat64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1_m(vbool64_t mask, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16mf4_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f16mf4_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16mf2_f16m1_m( @@ -157,7 +157,7 @@ vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1_m(vbool64_t mask, vfloat16mf4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1_m(vbool32_t mask, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16mf2_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f16mf2_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m1_f16m1_m( @@ -166,7 +166,7 @@ vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1_m(vbool32_t mask, vfloat16mf2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m1_f16m1_m(vbool16_t mask, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m1_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m1_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m2_f16m1_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfredmax_vs_f16m1_f16m1_m(vbool16_t mask, vfloat16m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m2_f16m1_m(vbool8_t mask, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m2_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m2_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m4_f16m1_m( @@ -184,7 +184,7 @@ vfloat16m1_t test_vfredmax_vs_f16m2_f16m1_m(vbool8_t mask, vfloat16m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m4_f16m1_m(vbool4_t mask, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m4_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m4_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m8_f16m1_m( @@ -193,7 +193,7 @@ vfloat16m1_t test_vfredmax_vs_f16m4_f16m1_m(vbool4_t mask, vfloat16m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m8_f16m1_m(vbool2_t mask, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m8_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m8_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32mf2_f32m1_m( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfredmax_vs_f16m8_f16m1_m(vbool2_t mask, vfloat16m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32mf2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f32mf2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m1_f32m1_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32mf2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m1_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m1_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m2_f32m1_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfredmax_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m4_f32m1_m( @@ -229,7 +229,7 @@ vfloat32m1_t test_vfredmax_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m4_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m4_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m8_f32m1_m( @@ -238,7 +238,7 @@ vfloat32m1_t test_vfredmax_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m8_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m8_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m1_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m1_t test_vfredmax_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m1_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m1_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m2_f64m1_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfredmax_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m2_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m2_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m4_f64m1_m( @@ -265,7 +265,7 @@ vfloat64m1_t test_vfredmax_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m4_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m4_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m8_f64m1_m( @@ -274,6 +274,6 @@ vfloat64m1_t test_vfredmax_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m8_f64m1_m(vbool8_t mask, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m8_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m8_f64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredmin.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredmin.c index 589dc721e7f3be80be1d5ede5e6976b5da674c72..e22d0070dd4930f8f852c661aa49f663e58deffd 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredmin.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredmin.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16mf4_f16m1(vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16mf4_f16m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f16mf4_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16mf2_f16m1( @@ -22,7 +22,7 @@ vfloat16m1_t test_vfredmin_vs_f16mf4_f16m1(vfloat16mf4_t vector, vfloat16m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16mf2_f16m1(vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16mf2_f16m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f16mf2_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m1_f16m1( @@ -31,7 +31,7 @@ vfloat16m1_t test_vfredmin_vs_f16mf2_f16m1(vfloat16mf2_t vector, vfloat16m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m1_f16m1(vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m1_f16m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f16m1_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m2_f16m1( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfredmin_vs_f16m1_f16m1(vfloat16m1_t vector, vfloat16m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m2_f16m1(vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m2_f16m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f16m2_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m4_f16m1( @@ -49,7 +49,7 @@ vfloat16m1_t test_vfredmin_vs_f16m2_f16m1(vfloat16m2_t vector, vfloat16m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m4_f16m1(vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m4_f16m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f16m4_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m8_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfredmin_vs_f16m4_f16m1(vfloat16m4_t vector, vfloat16m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m8_f16m1(vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m8_f16m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f16m8_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32mf2_f32m1( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfredmin_vs_f16m8_f16m1(vfloat16m8_t vector, vfloat16m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32mf2_f32m1(vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32mf2_f32m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f32mf2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m1_f32m1( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfredmin_vs_f32mf2_f32m1(vfloat32mf2_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m1_f32m1(vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m1_f32m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f32m1_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m2_f32m1( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfredmin_vs_f32m1_f32m1(vfloat32m1_t vector, vfloat32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m2_f32m1(vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m2_f32m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f32m2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m4_f32m1( @@ -94,7 +94,7 @@ vfloat32m1_t test_vfredmin_vs_f32m2_f32m1(vfloat32m2_t vector, vfloat32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m4_f32m1(vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m4_f32m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f32m4_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m8_f32m1( @@ -103,7 +103,7 @@ vfloat32m1_t test_vfredmin_vs_f32m4_f32m1(vfloat32m4_t vector, vfloat32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m8_f32m1(vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m8_f32m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f32m8_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m1_f64m1( @@ -112,7 +112,7 @@ vfloat32m1_t test_vfredmin_vs_f32m8_f32m1(vfloat32m8_t vector, vfloat32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m1_f64m1(vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m1_f64m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f64m1_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m2_f64m1( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfredmin_vs_f64m1_f64m1(vfloat64m1_t vector, vfloat64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m2_f64m1(vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m2_f64m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f64m2_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m4_f64m1( @@ -130,7 +130,7 @@ vfloat64m1_t test_vfredmin_vs_f64m2_f64m1(vfloat64m2_t vector, vfloat64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m4_f64m1(vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m4_f64m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f64m4_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m8_f64m1( @@ -139,7 +139,7 @@ vfloat64m1_t test_vfredmin_vs_f64m4_f64m1(vfloat64m4_t vector, vfloat64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m8_f64m1(vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m8_f64m1(vector, scalar, vl); + return __riscv_vfredmin_vs_f64m8_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16mf4_f16m1_m( @@ -148,7 +148,7 @@ vfloat64m1_t test_vfredmin_vs_f64m8_f64m1(vfloat64m8_t vector, vfloat64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16mf4_f16m1_m(vbool64_t mask, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16mf4_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f16mf4_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16mf2_f16m1_m( @@ -157,7 +157,7 @@ vfloat16m1_t test_vfredmin_vs_f16mf4_f16m1_m(vbool64_t mask, vfloat16mf4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16mf2_f16m1_m(vbool32_t mask, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16mf2_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f16mf2_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m1_f16m1_m( @@ -166,7 +166,7 @@ vfloat16m1_t test_vfredmin_vs_f16mf2_f16m1_m(vbool32_t mask, vfloat16mf2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m1_f16m1_m(vbool16_t mask, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m1_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m1_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m2_f16m1_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfredmin_vs_f16m1_f16m1_m(vbool16_t mask, vfloat16m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m2_f16m1_m(vbool8_t mask, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m2_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m2_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m4_f16m1_m( @@ -184,7 +184,7 @@ vfloat16m1_t test_vfredmin_vs_f16m2_f16m1_m(vbool8_t mask, vfloat16m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m4_f16m1_m(vbool4_t mask, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m4_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m4_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m8_f16m1_m( @@ -193,7 +193,7 @@ vfloat16m1_t test_vfredmin_vs_f16m4_f16m1_m(vbool4_t mask, vfloat16m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m8_f16m1_m(vbool2_t mask, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m8_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m8_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32mf2_f32m1_m( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfredmin_vs_f16m8_f16m1_m(vbool2_t mask, vfloat16m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32mf2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f32mf2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m1_f32m1_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfredmin_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32mf2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m1_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m1_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m2_f32m1_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfredmin_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m4_f32m1_m( @@ -229,7 +229,7 @@ vfloat32m1_t test_vfredmin_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m4_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m4_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m8_f32m1_m( @@ -238,7 +238,7 @@ vfloat32m1_t test_vfredmin_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m8_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m8_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m1_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m1_t test_vfredmin_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m1_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m1_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m2_f64m1_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfredmin_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m2_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m2_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m4_f64m1_m( @@ -265,7 +265,7 @@ vfloat64m1_t test_vfredmin_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m4_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m4_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m8_f64m1_m( @@ -274,6 +274,6 @@ vfloat64m1_t test_vfredmin_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m8_f64m1_m(vbool8_t mask, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m8_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m8_f64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredosum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredosum.c index 5203bb3453b3590437120ff5ca0682005f2d6300..00390a6f7b0c3277f7d15c7e5eff528c0b70c043 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredosum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredosum.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16mf4_f16m1(vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16mf4_f16m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f16mf4_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16mf2_f16m1( @@ -22,7 +22,7 @@ vfloat16m1_t test_vfredosum_vs_f16mf4_f16m1(vfloat16mf4_t vector, vfloat16m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16mf2_f16m1(vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16mf2_f16m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f16mf2_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m1_f16m1( @@ -31,7 +31,7 @@ vfloat16m1_t test_vfredosum_vs_f16mf2_f16m1(vfloat16mf2_t vector, vfloat16m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m1_f16m1(vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m1_f16m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f16m1_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m2_f16m1( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfredosum_vs_f16m1_f16m1(vfloat16m1_t vector, vfloat16m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m2_f16m1(vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m2_f16m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f16m2_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m4_f16m1( @@ -49,7 +49,7 @@ vfloat16m1_t test_vfredosum_vs_f16m2_f16m1(vfloat16m2_t vector, vfloat16m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m4_f16m1(vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m4_f16m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f16m4_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m8_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfredosum_vs_f16m4_f16m1(vfloat16m4_t vector, vfloat16m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m8_f16m1(vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m8_f16m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f16m8_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32mf2_f32m1( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfredosum_vs_f16m8_f16m1(vfloat16m8_t vector, vfloat16m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1(vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32mf2_f32m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f32mf2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m1_f32m1( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1(vfloat32mf2_t vector, vfloat32m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m1_f32m1(vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m1_f32m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f32m1_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m2_f32m1( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfredosum_vs_f32m1_f32m1(vfloat32m1_t vector, vfloat32m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m2_f32m1(vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m2_f32m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f32m2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m4_f32m1( @@ -94,7 +94,7 @@ vfloat32m1_t test_vfredosum_vs_f32m2_f32m1(vfloat32m2_t vector, vfloat32m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m4_f32m1(vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m4_f32m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f32m4_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m8_f32m1( @@ -103,7 +103,7 @@ vfloat32m1_t test_vfredosum_vs_f32m4_f32m1(vfloat32m4_t vector, vfloat32m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m8_f32m1(vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m8_f32m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f32m8_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m1_f64m1( @@ -112,7 +112,7 @@ vfloat32m1_t test_vfredosum_vs_f32m8_f32m1(vfloat32m8_t vector, vfloat32m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m1_f64m1(vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m1_f64m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f64m1_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m2_f64m1( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfredosum_vs_f64m1_f64m1(vfloat64m1_t vector, vfloat64m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m2_f64m1(vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m2_f64m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f64m2_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m4_f64m1( @@ -130,7 +130,7 @@ vfloat64m1_t test_vfredosum_vs_f64m2_f64m1(vfloat64m2_t vector, vfloat64m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m4_f64m1(vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m4_f64m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f64m4_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m8_f64m1( @@ -139,7 +139,7 @@ vfloat64m1_t test_vfredosum_vs_f64m4_f64m1(vfloat64m4_t vector, vfloat64m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m8_f64m1(vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m8_f64m1(vector, scalar, vl); + return __riscv_vfredosum_vs_f64m8_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16mf4_f16m1_m( @@ -148,7 +148,7 @@ vfloat64m1_t test_vfredosum_vs_f64m8_f64m1(vfloat64m8_t vector, vfloat64m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16mf4_f16m1_m(vbool64_t mask, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16mf4_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f16mf4_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16mf2_f16m1_m( @@ -157,7 +157,7 @@ vfloat16m1_t test_vfredosum_vs_f16mf4_f16m1_m(vbool64_t mask, vfloat16mf4_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16mf2_f16m1_m(vbool32_t mask, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16mf2_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f16mf2_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m1_f16m1_m( @@ -166,7 +166,7 @@ vfloat16m1_t test_vfredosum_vs_f16mf2_f16m1_m(vbool32_t mask, vfloat16mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m1_f16m1_m(vbool16_t mask, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m1_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m1_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m2_f16m1_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfredosum_vs_f16m1_f16m1_m(vbool16_t mask, vfloat16m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m2_f16m1_m(vbool8_t mask, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m2_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m2_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m4_f16m1_m( @@ -184,7 +184,7 @@ vfloat16m1_t test_vfredosum_vs_f16m2_f16m1_m(vbool8_t mask, vfloat16m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m4_f16m1_m(vbool4_t mask, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m4_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m4_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m8_f16m1_m( @@ -193,7 +193,7 @@ vfloat16m1_t test_vfredosum_vs_f16m4_f16m1_m(vbool4_t mask, vfloat16m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m8_f16m1_m(vbool2_t mask, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m8_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m8_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32mf2_f32m1_m( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfredosum_vs_f16m8_f16m1_m(vbool2_t mask, vfloat16m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32mf2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f32mf2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m1_f32m1_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m1_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m1_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m2_f32m1_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfredosum_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m4_f32m1_m( @@ -229,7 +229,7 @@ vfloat32m1_t test_vfredosum_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m4_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m4_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m8_f32m1_m( @@ -238,7 +238,7 @@ vfloat32m1_t test_vfredosum_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m8_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m8_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m1_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m1_t test_vfredosum_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m1_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m1_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m2_f64m1_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfredosum_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m2_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m2_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m4_f64m1_m( @@ -265,7 +265,7 @@ vfloat64m1_t test_vfredosum_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m4_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m4_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m8_f64m1_m( @@ -274,6 +274,6 @@ vfloat64m1_t test_vfredosum_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m8_f64m1_m(vbool8_t mask, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m8_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m8_f64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredusum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredusum.c index 7a9a98c3c03ae1cba0b8fbdf9e4dd423ab73d1bb..ce43f60caf5c3dc137d43ee65c1f7ee1c3eb62ff 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredusum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfredusum.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16mf4_f16m1(vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16mf4_f16m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f16mf4_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16mf2_f16m1( @@ -22,7 +22,7 @@ vfloat16m1_t test_vfredusum_vs_f16mf4_f16m1(vfloat16mf4_t vector, vfloat16m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16mf2_f16m1(vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16mf2_f16m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f16mf2_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m1_f16m1( @@ -31,7 +31,7 @@ vfloat16m1_t test_vfredusum_vs_f16mf2_f16m1(vfloat16mf2_t vector, vfloat16m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m1_f16m1(vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m1_f16m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f16m1_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m2_f16m1( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfredusum_vs_f16m1_f16m1(vfloat16m1_t vector, vfloat16m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m2_f16m1(vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m2_f16m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f16m2_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m4_f16m1( @@ -49,7 +49,7 @@ vfloat16m1_t test_vfredusum_vs_f16m2_f16m1(vfloat16m2_t vector, vfloat16m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m4_f16m1(vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m4_f16m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f16m4_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m8_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfredusum_vs_f16m4_f16m1(vfloat16m4_t vector, vfloat16m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m8_f16m1(vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m8_f16m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f16m8_f16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32mf2_f32m1( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfredusum_vs_f16m8_f16m1(vfloat16m8_t vector, vfloat16m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32mf2_f32m1(vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32mf2_f32m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f32mf2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m1_f32m1( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfredusum_vs_f32mf2_f32m1(vfloat32mf2_t vector, vfloat32m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m1_f32m1(vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m1_f32m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f32m1_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m2_f32m1( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfredusum_vs_f32m1_f32m1(vfloat32m1_t vector, vfloat32m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m2_f32m1(vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m2_f32m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f32m2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m4_f32m1( @@ -94,7 +94,7 @@ vfloat32m1_t test_vfredusum_vs_f32m2_f32m1(vfloat32m2_t vector, vfloat32m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m4_f32m1(vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m4_f32m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f32m4_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m8_f32m1( @@ -103,7 +103,7 @@ vfloat32m1_t test_vfredusum_vs_f32m4_f32m1(vfloat32m4_t vector, vfloat32m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m8_f32m1(vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m8_f32m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f32m8_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m1_f64m1( @@ -112,7 +112,7 @@ vfloat32m1_t test_vfredusum_vs_f32m8_f32m1(vfloat32m8_t vector, vfloat32m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m1_f64m1(vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m1_f64m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f64m1_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m2_f64m1( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfredusum_vs_f64m1_f64m1(vfloat64m1_t vector, vfloat64m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m2_f64m1(vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m2_f64m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f64m2_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m4_f64m1( @@ -130,7 +130,7 @@ vfloat64m1_t test_vfredusum_vs_f64m2_f64m1(vfloat64m2_t vector, vfloat64m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m4_f64m1(vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m4_f64m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f64m4_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m8_f64m1( @@ -139,7 +139,7 @@ vfloat64m1_t test_vfredusum_vs_f64m4_f64m1(vfloat64m4_t vector, vfloat64m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m8_f64m1(vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m8_f64m1(vector, scalar, vl); + return __riscv_vfredusum_vs_f64m8_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16mf4_f16m1_m( @@ -148,7 +148,7 @@ vfloat64m1_t test_vfredusum_vs_f64m8_f64m1(vfloat64m8_t vector, vfloat64m1_t sca // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16mf4_f16m1_m(vbool64_t mask, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16mf4_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f16mf4_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16mf2_f16m1_m( @@ -157,7 +157,7 @@ vfloat16m1_t test_vfredusum_vs_f16mf4_f16m1_m(vbool64_t mask, vfloat16mf4_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16mf2_f16m1_m(vbool32_t mask, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16mf2_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f16mf2_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m1_f16m1_m( @@ -166,7 +166,7 @@ vfloat16m1_t test_vfredusum_vs_f16mf2_f16m1_m(vbool32_t mask, vfloat16mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m1_f16m1_m(vbool16_t mask, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m1_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m1_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m2_f16m1_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfredusum_vs_f16m1_f16m1_m(vbool16_t mask, vfloat16m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m2_f16m1_m(vbool8_t mask, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m2_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m2_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m4_f16m1_m( @@ -184,7 +184,7 @@ vfloat16m1_t test_vfredusum_vs_f16m2_f16m1_m(vbool8_t mask, vfloat16m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m4_f16m1_m(vbool4_t mask, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m4_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m4_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m8_f16m1_m( @@ -193,7 +193,7 @@ vfloat16m1_t test_vfredusum_vs_f16m4_f16m1_m(vbool4_t mask, vfloat16m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m8_f16m1_m(vbool2_t mask, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m8_f16m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m8_f16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32mf2_f32m1_m( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfredusum_vs_f16m8_f16m1_m(vbool2_t mask, vfloat16m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32mf2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f32mf2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m1_f32m1_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfredusum_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m1_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m1_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m2_f32m1_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfredusum_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m4_f32m1_m( @@ -229,7 +229,7 @@ vfloat32m1_t test_vfredusum_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m4_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m4_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m8_f32m1_m( @@ -238,7 +238,7 @@ vfloat32m1_t test_vfredusum_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m8_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m8_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m1_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m1_t test_vfredusum_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m1_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m1_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m2_f64m1_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfredusum_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m2_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m2_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m4_f64m1_m( @@ -265,7 +265,7 @@ vfloat64m1_t test_vfredusum_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m4_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m4_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m8_f64m1_m( @@ -274,6 +274,6 @@ vfloat64m1_t test_vfredusum_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m8_f64m1_m(vbool8_t mask, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m8_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m8_f64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrsqrt7.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrsqrt7.c index c703edbd61b6211bb6af7fb53cd7b1812f258ef9..d333159528f6b1adfb55c447726f23c668dc85d2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrsqrt7.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrsqrt7.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsqrt7_v_f16mf4(vfloat16mf4_t op1, size_t vl) { - return vfrsqrt7_v_f16mf4(op1, vl); + return __riscv_vfrsqrt7_v_f16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfrsqrt7_v_f16mf4(vfloat16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsqrt7_v_f16mf2(vfloat16mf2_t op1, size_t vl) { - return vfrsqrt7_v_f16mf2(op1, vl); + return __riscv_vfrsqrt7_v_f16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfrsqrt7_v_f16mf2(vfloat16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsqrt7_v_f16m1(vfloat16m1_t op1, size_t vl) { - return vfrsqrt7_v_f16m1(op1, vl); + return __riscv_vfrsqrt7_v_f16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfrsqrt7_v_f16m1(vfloat16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsqrt7_v_f16m2(vfloat16m2_t op1, size_t vl) { - return vfrsqrt7_v_f16m2(op1, vl); + return __riscv_vfrsqrt7_v_f16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfrsqrt7_v_f16m2(vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsqrt7_v_f16m4(vfloat16m4_t op1, size_t vl) { - return vfrsqrt7_v_f16m4(op1, vl); + return __riscv_vfrsqrt7_v_f16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfrsqrt7_v_f16m4(vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsqrt7_v_f16m8(vfloat16m8_t op1, size_t vl) { - return vfrsqrt7_v_f16m8(op1, vl); + return __riscv_vfrsqrt7_v_f16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfrsqrt7_v_f16m8(vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsqrt7_v_f32mf2(vfloat32mf2_t op1, size_t vl) { - return vfrsqrt7_v_f32mf2(op1, vl); + return __riscv_vfrsqrt7_v_f32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfrsqrt7_v_f32mf2(vfloat32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsqrt7_v_f32m1(vfloat32m1_t op1, size_t vl) { - return vfrsqrt7_v_f32m1(op1, vl); + return __riscv_vfrsqrt7_v_f32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfrsqrt7_v_f32m1(vfloat32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsqrt7_v_f32m2(vfloat32m2_t op1, size_t vl) { - return vfrsqrt7_v_f32m2(op1, vl); + return __riscv_vfrsqrt7_v_f32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfrsqrt7_v_f32m2(vfloat32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsqrt7_v_f32m4(vfloat32m4_t op1, size_t vl) { - return vfrsqrt7_v_f32m4(op1, vl); + return __riscv_vfrsqrt7_v_f32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfrsqrt7_v_f32m4(vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsqrt7_v_f32m8(vfloat32m8_t op1, size_t vl) { - return vfrsqrt7_v_f32m8(op1, vl); + return __riscv_vfrsqrt7_v_f32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfrsqrt7_v_f32m8(vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsqrt7_v_f64m1(vfloat64m1_t op1, size_t vl) { - return vfrsqrt7_v_f64m1(op1, vl); + return __riscv_vfrsqrt7_v_f64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfrsqrt7_v_f64m1(vfloat64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsqrt7_v_f64m2(vfloat64m2_t op1, size_t vl) { - return vfrsqrt7_v_f64m2(op1, vl); + return __riscv_vfrsqrt7_v_f64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfrsqrt7_v_f64m2(vfloat64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsqrt7_v_f64m4(vfloat64m4_t op1, size_t vl) { - return vfrsqrt7_v_f64m4(op1, vl); + return __riscv_vfrsqrt7_v_f64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfrsqrt7_v_f64m4(vfloat64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsqrt7_v_f64m8(vfloat64m8_t op1, size_t vl) { - return vfrsqrt7_v_f64m8(op1, vl); + return __riscv_vfrsqrt7_v_f64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfrsqrt7_v_f64m8(vfloat64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsqrt7_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t vl) { - return vfrsqrt7_v_f16mf4_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfrsqrt7_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsqrt7_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t vl) { - return vfrsqrt7_v_f16mf2_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfrsqrt7_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsqrt7_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) { - return vfrsqrt7_v_f16m1_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfrsqrt7_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsqrt7_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { - return vfrsqrt7_v_f16m2_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfrsqrt7_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsqrt7_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { - return vfrsqrt7_v_f16m4_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfrsqrt7_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsqrt7_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { - return vfrsqrt7_v_f16m8_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfrsqrt7_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsqrt7_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t vl) { - return vfrsqrt7_v_f32mf2_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfrsqrt7_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsqrt7_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) { - return vfrsqrt7_v_f32m1_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfrsqrt7_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsqrt7_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) { - return vfrsqrt7_v_f32m2_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfrsqrt7_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsqrt7_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { - return vfrsqrt7_v_f32m4_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfrsqrt7_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsqrt7_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { - return vfrsqrt7_v_f32m8_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfrsqrt7_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsqrt7_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) { - return vfrsqrt7_v_f64m1_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfrsqrt7_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsqrt7_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) { - return vfrsqrt7_v_f64m2_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfrsqrt7_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsqrt7_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) { - return vfrsqrt7_v_f64m4_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfrsqrt7_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsqrt7_v_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t vl) { - return vfrsqrt7_v_f64m8_m(mask, op1, vl); + return __riscv_vfrsqrt7_v_f64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrsub.c index e6ac0f997a5dc42f745ecb25e1db1fcf0c0f52b3..eedb3e79e863bab8e645ecf4613649e00b6cb014 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfrsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsub_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf4(op1, op2, vl); + return __riscv_vfrsub_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfrsub_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsub_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf2(op1, op2, vl); + return __riscv_vfrsub_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfrsub_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsub_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m1(op1, op2, vl); + return __riscv_vfrsub_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfrsub_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsub_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m2(op1, op2, vl); + return __riscv_vfrsub_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfrsub_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsub_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m4(op1, op2, vl); + return __riscv_vfrsub_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfrsub_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsub_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m8(op1, op2, vl); + return __riscv_vfrsub_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfrsub_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsub_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32mf2(op1, op2, vl); + return __riscv_vfrsub_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfrsub_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsub_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m1(op1, op2, vl); + return __riscv_vfrsub_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfrsub_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsub_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m2(op1, op2, vl); + return __riscv_vfrsub_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfrsub_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsub_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m4(op1, op2, vl); + return __riscv_vfrsub_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfrsub_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsub_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m8(op1, op2, vl); + return __riscv_vfrsub_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfrsub_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsub_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m1(op1, op2, vl); + return __riscv_vfrsub_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfrsub_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsub_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m2(op1, op2, vl); + return __riscv_vfrsub_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfrsub_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsub_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m4(op1, op2, vl); + return __riscv_vfrsub_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfrsub_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsub_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m8(op1, op2, vl); + return __riscv_vfrsub_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfrsub_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsub_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfrsub_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsub_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfrsub_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsub_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfrsub_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsub_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfrsub_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsub_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfrsub_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsub_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfrsub_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsub_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfrsub_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsub_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfrsub_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsub_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfrsub_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsub_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfrsub_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsub_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfrsub_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsub_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfrsub_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsub_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfrsub_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsub_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfrsub_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsub_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfrsub_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnj.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnj.c index 998e812d119a47c841eec3b5bf1bb4845bf0b149..48f6afae9b8da35737529c1c8a24b76e289d392d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnj.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnj.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnj_vv_f16mf4(op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsgnj_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf4(op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfsgnj_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnj_vv_f16mf2(op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfsgnj_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf2(op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfsgnj_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnj_vv_f16m1(op1, op2, vl); + return __riscv_vfsgnj_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfsgnj_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m1(op1, op2, vl); + return __riscv_vfsgnj_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfsgnj_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnj_vv_f16m2(op1, op2, vl); + return __riscv_vfsgnj_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfsgnj_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m2(op1, op2, vl); + return __riscv_vfsgnj_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfsgnj_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnj_vv_f16m4(op1, op2, vl); + return __riscv_vfsgnj_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfsgnj_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m4(op1, op2, vl); + return __riscv_vfsgnj_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfsgnj_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnj_vv_f16m8(op1, op2, vl); + return __riscv_vfsgnj_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfsgnj_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m8(op1, op2, vl); + return __riscv_vfsgnj_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfsgnj_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnj_vv_f32mf2(op1, op2, vl); + return __riscv_vfsgnj_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfsgnj_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32mf2(op1, op2, vl); + return __riscv_vfsgnj_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfsgnj_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnj_vv_f32m1(op1, op2, vl); + return __riscv_vfsgnj_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfsgnj_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m1(op1, op2, vl); + return __riscv_vfsgnj_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfsgnj_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnj_vv_f32m2(op1, op2, vl); + return __riscv_vfsgnj_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfsgnj_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m2(op1, op2, vl); + return __riscv_vfsgnj_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfsgnj_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnj_vv_f32m4(op1, op2, vl); + return __riscv_vfsgnj_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfsgnj_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m4(op1, op2, vl); + return __riscv_vfsgnj_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfsgnj_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnj_vv_f32m8(op1, op2, vl); + return __riscv_vfsgnj_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfsgnj_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m8(op1, op2, vl); + return __riscv_vfsgnj_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfsgnj_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnj_vv_f64m1(op1, op2, vl); + return __riscv_vfsgnj_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfsgnj_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m1(op1, op2, vl); + return __riscv_vfsgnj_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfsgnj_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnj_vv_f64m2(op1, op2, vl); + return __riscv_vfsgnj_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfsgnj_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m2(op1, op2, vl); + return __riscv_vfsgnj_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfsgnj_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnj_vv_f64m4(op1, op2, vl); + return __riscv_vfsgnj_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfsgnj_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m4(op1, op2, vl); + return __riscv_vfsgnj_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfsgnj_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnj_vv_f64m8(op1, op2, vl); + return __riscv_vfsgnj_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfsgnj_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m8(op1, op2, vl); + return __riscv_vfsgnj_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsgnj_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnj_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsgnj_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfsgnj_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnj_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfsgnj_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfsgnj_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnj_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfsgnj_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfsgnj_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnj_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfsgnj_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfsgnj_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnj_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfsgnj_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfsgnj_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnj_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfsgnj_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfsgnj_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnj_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfsgnj_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfsgnj_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnj_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfsgnj_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfsgnj_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnj_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfsgnj_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfsgnj_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnj_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfsgnj_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfsgnj_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnj_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfsgnj_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfsgnj_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnj_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfsgnj_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfsgnj_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnj_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfsgnj_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfsgnj_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnj_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfsgnj_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfsgnj_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnj_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfsgnj_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnjn.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnjn.c index 71caef1975197c0959c4426d46f6eb3860dda7ec..632611f45921e23746b3a811d3cce2bd82bafd3b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnjn.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnjn.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjn_vv_f16mf4(op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsgnjn_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf4(op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfsgnjn_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjn_vv_f16mf2(op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfsgnjn_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf2(op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfsgnjn_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjn_vv_f16m1(op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfsgnjn_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m1(op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfsgnjn_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjn_vv_f16m2(op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfsgnjn_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m2(op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfsgnjn_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjn_vv_f16m4(op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfsgnjn_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m4(op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfsgnjn_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjn_vv_f16m8(op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfsgnjn_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m8(op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfsgnjn_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjn_vv_f32mf2(op1, op2, vl); + return __riscv_vfsgnjn_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfsgnjn_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32mf2(op1, op2, vl); + return __riscv_vfsgnjn_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfsgnjn_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjn_vv_f32m1(op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfsgnjn_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m1(op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfsgnjn_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjn_vv_f32m2(op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfsgnjn_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m2(op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfsgnjn_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjn_vv_f32m4(op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfsgnjn_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m4(op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfsgnjn_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjn_vv_f32m8(op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfsgnjn_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m8(op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfsgnjn_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjn_vv_f64m1(op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfsgnjn_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m1(op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfsgnjn_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjn_vv_f64m2(op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfsgnjn_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m2(op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfsgnjn_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjn_vv_f64m4(op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfsgnjn_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m4(op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfsgnjn_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjn_vv_f64m8(op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfsgnjn_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m8(op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsgnjn_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjn_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsgnjn_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfsgnjn_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjn_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfsgnjn_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfsgnjn_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjn_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfsgnjn_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfsgnjn_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjn_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfsgnjn_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfsgnjn_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjn_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfsgnjn_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfsgnjn_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjn_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfsgnjn_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfsgnjn_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjn_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfsgnjn_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfsgnjn_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjn_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfsgnjn_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfsgnjn_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjn_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfsgnjn_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfsgnjn_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjn_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfsgnjn_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfsgnjn_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjn_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfsgnjn_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfsgnjn_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjn_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfsgnjn_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfsgnjn_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjn_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfsgnjn_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfsgnjn_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjn_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfsgnjn_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfsgnjn_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjn_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfsgnjn_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnjx.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnjx.c index dfa3e9cbedcd4d72fe0228941e111db7fc5c40f3..665dbcc222d9838f97ede6d43e18eace8f337741 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnjx.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsgnjx.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjx_vv_f16mf4(op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsgnjx_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf4(op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfsgnjx_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjx_vv_f16mf2(op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfsgnjx_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf2(op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfsgnjx_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjx_vv_f16m1(op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfsgnjx_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m1(op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfsgnjx_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjx_vv_f16m2(op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfsgnjx_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m2(op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfsgnjx_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjx_vv_f16m4(op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfsgnjx_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m4(op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfsgnjx_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjx_vv_f16m8(op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfsgnjx_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m8(op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfsgnjx_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjx_vv_f32mf2(op1, op2, vl); + return __riscv_vfsgnjx_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfsgnjx_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32mf2(op1, op2, vl); + return __riscv_vfsgnjx_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfsgnjx_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjx_vv_f32m1(op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfsgnjx_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m1(op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfsgnjx_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjx_vv_f32m2(op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfsgnjx_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m2(op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfsgnjx_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjx_vv_f32m4(op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfsgnjx_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m4(op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfsgnjx_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjx_vv_f32m8(op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfsgnjx_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m8(op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfsgnjx_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjx_vv_f64m1(op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfsgnjx_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m1(op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfsgnjx_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjx_vv_f64m2(op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfsgnjx_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m2(op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfsgnjx_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjx_vv_f64m4(op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfsgnjx_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m4(op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfsgnjx_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjx_vv_f64m8(op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfsgnjx_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m8(op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsgnjx_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjx_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsgnjx_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfsgnjx_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjx_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfsgnjx_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfsgnjx_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjx_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfsgnjx_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfsgnjx_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjx_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfsgnjx_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfsgnjx_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjx_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfsgnjx_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfsgnjx_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjx_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfsgnjx_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfsgnjx_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjx_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfsgnjx_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfsgnjx_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjx_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfsgnjx_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfsgnjx_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjx_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfsgnjx_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfsgnjx_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjx_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfsgnjx_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfsgnjx_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjx_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfsgnjx_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfsgnjx_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjx_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfsgnjx_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfsgnjx_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjx_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfsgnjx_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfsgnjx_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjx_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfsgnjx_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfsgnjx_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjx_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfsgnjx_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfslide1down.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfslide1down.c index 9496f2568bc46a20316af4cb782b00a56edec826..12d0dcf48293eb67b8ff875e91ae0c3f257364df 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfslide1down.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfslide1down.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1down_vf_f16mf4(vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf4(src, value, vl); + return __riscv_vfslide1down_vf_f16mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfslide1down_vf_f16mf4(vfloat16mf4_t src, _Float16 value, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1down_vf_f16mf2(vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf2(src, value, vl); + return __riscv_vfslide1down_vf_f16mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfslide1down_vf_f16mf2(vfloat16mf2_t src, _Float16 value, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1down_vf_f16m1(vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m1(src, value, vl); + return __riscv_vfslide1down_vf_f16m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfslide1down_vf_f16m1(vfloat16m1_t src, _Float16 value, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1down_vf_f16m2(vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m2(src, value, vl); + return __riscv_vfslide1down_vf_f16m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfslide1down_vf_f16m2(vfloat16m2_t src, _Float16 value, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1down_vf_f16m4(vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m4(src, value, vl); + return __riscv_vfslide1down_vf_f16m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfslide1down_vf_f16m4(vfloat16m4_t src, _Float16 value, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1down_vf_f16m8(vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m8(src, value, vl); + return __riscv_vfslide1down_vf_f16m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfslide1down_vf_f16m8(vfloat16m8_t src, _Float16 value, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1down_vf_f32mf2(vfloat32mf2_t src, float value, size_t vl) { - return vfslide1down_vf_f32mf2(src, value, vl); + return __riscv_vfslide1down_vf_f32mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfslide1down_vf_f32mf2(vfloat32mf2_t src, float value, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1down_vf_f32m1(vfloat32m1_t src, float value, size_t vl) { - return vfslide1down_vf_f32m1(src, value, vl); + return __riscv_vfslide1down_vf_f32m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfslide1down_vf_f32m1(vfloat32m1_t src, float value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1down_vf_f32m2(vfloat32m2_t src, float value, size_t vl) { - return vfslide1down_vf_f32m2(src, value, vl); + return __riscv_vfslide1down_vf_f32m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfslide1down_vf_f32m2(vfloat32m2_t src, float value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1down_vf_f32m4(vfloat32m4_t src, float value, size_t vl) { - return vfslide1down_vf_f32m4(src, value, vl); + return __riscv_vfslide1down_vf_f32m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfslide1down_vf_f32m4(vfloat32m4_t src, float value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1down_vf_f32m8(vfloat32m8_t src, float value, size_t vl) { - return vfslide1down_vf_f32m8(src, value, vl); + return __riscv_vfslide1down_vf_f32m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfslide1down_vf_f32m8(vfloat32m8_t src, float value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1down_vf_f64m1(vfloat64m1_t src, double value, size_t vl) { - return vfslide1down_vf_f64m1(src, value, vl); + return __riscv_vfslide1down_vf_f64m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfslide1down_vf_f64m1(vfloat64m1_t src, double value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1down_vf_f64m2(vfloat64m2_t src, double value, size_t vl) { - return vfslide1down_vf_f64m2(src, value, vl); + return __riscv_vfslide1down_vf_f64m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfslide1down_vf_f64m2(vfloat64m2_t src, double value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1down_vf_f64m4(vfloat64m4_t src, double value, size_t vl) { - return vfslide1down_vf_f64m4(src, value, vl); + return __riscv_vfslide1down_vf_f64m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfslide1down_vf_f64m4(vfloat64m4_t src, double value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1down_vf_f64m8(vfloat64m8_t src, double value, size_t vl) { - return vfslide1down_vf_f64m8(src, value, vl); + return __riscv_vfslide1down_vf_f64m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfslide1down_vf_f64m8(vfloat64m8_t src, double value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1down_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf4_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f16mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfslide1down_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t src, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1down_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf2_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f16mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfslide1down_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t src, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1down_vf_f16m1_m(vbool16_t mask, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m1_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f16m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfslide1down_vf_f16m1_m(vbool16_t mask, vfloat16m1_t src, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1down_vf_f16m2_m(vbool8_t mask, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m2_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f16m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfslide1down_vf_f16m2_m(vbool8_t mask, vfloat16m2_t src, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1down_vf_f16m4_m(vbool4_t mask, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m4_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f16m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfslide1down_vf_f16m4_m(vbool4_t mask, vfloat16m4_t src, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1down_vf_f16m8_m(vbool2_t mask, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m8_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f16m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfslide1down_vf_f16m8_m(vbool2_t mask, vfloat16m8_t src, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1down_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1down_vf_f32mf2_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f32mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfslide1down_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t src, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1down_vf_f32m1_m(vbool32_t mask, vfloat32m1_t src, float value, size_t vl) { - return vfslide1down_vf_f32m1_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f32m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfslide1down_vf_f32m1_m(vbool32_t mask, vfloat32m1_t src, floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1down_vf_f32m2_m(vbool16_t mask, vfloat32m2_t src, float value, size_t vl) { - return vfslide1down_vf_f32m2_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f32m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfslide1down_vf_f32m2_m(vbool16_t mask, vfloat32m2_t src, floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1down_vf_f32m4_m(vbool8_t mask, vfloat32m4_t src, float value, size_t vl) { - return vfslide1down_vf_f32m4_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f32m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfslide1down_vf_f32m4_m(vbool8_t mask, vfloat32m4_t src, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1down_vf_f32m8_m(vbool4_t mask, vfloat32m8_t src, float value, size_t vl) { - return vfslide1down_vf_f32m8_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f32m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfslide1down_vf_f32m8_m(vbool4_t mask, vfloat32m8_t src, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1down_vf_f64m1_m(vbool64_t mask, vfloat64m1_t src, double value, size_t vl) { - return vfslide1down_vf_f64m1_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f64m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfslide1down_vf_f64m1_m(vbool64_t mask, vfloat64m1_t src, doub // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1down_vf_f64m2_m(vbool32_t mask, vfloat64m2_t src, double value, size_t vl) { - return vfslide1down_vf_f64m2_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f64m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfslide1down_vf_f64m2_m(vbool32_t mask, vfloat64m2_t src, doub // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1down_vf_f64m4_m(vbool16_t mask, vfloat64m4_t src, double value, size_t vl) { - return vfslide1down_vf_f64m4_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f64m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfslide1down_vf_f64m4_m(vbool16_t mask, vfloat64m4_t src, doub // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1down_vf_f64m8_m(vbool8_t mask, vfloat64m8_t src, double value, size_t vl) { - return vfslide1down_vf_f64m8_m(mask, src, value, vl); + return __riscv_vfslide1down_vf_f64m8_m(mask, src, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfslide1up.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfslide1up.c index 2b9d56e9728a5f0cd250b072aee7ad5c50768334..6673d03ea7d323494dbe0227c427d2e8d4e67e86 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfslide1up.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfslide1up.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1up_vf_f16mf4(vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf4(src, value, vl); + return __riscv_vfslide1up_vf_f16mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfslide1up_vf_f16mf4(vfloat16mf4_t src, _Float16 value, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1up_vf_f16mf2(vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf2(src, value, vl); + return __riscv_vfslide1up_vf_f16mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfslide1up_vf_f16mf2(vfloat16mf2_t src, _Float16 value, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1up_vf_f16m1(vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m1(src, value, vl); + return __riscv_vfslide1up_vf_f16m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfslide1up_vf_f16m1(vfloat16m1_t src, _Float16 value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1up_vf_f16m2(vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m2(src, value, vl); + return __riscv_vfslide1up_vf_f16m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfslide1up_vf_f16m2(vfloat16m2_t src, _Float16 value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1up_vf_f16m4(vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m4(src, value, vl); + return __riscv_vfslide1up_vf_f16m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfslide1up_vf_f16m4(vfloat16m4_t src, _Float16 value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1up_vf_f16m8(vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m8(src, value, vl); + return __riscv_vfslide1up_vf_f16m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfslide1up_vf_f16m8(vfloat16m8_t src, _Float16 value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1up_vf_f32mf2(vfloat32mf2_t src, float value, size_t vl) { - return vfslide1up_vf_f32mf2(src, value, vl); + return __riscv_vfslide1up_vf_f32mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfslide1up_vf_f32mf2(vfloat32mf2_t src, float value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1up_vf_f32m1(vfloat32m1_t src, float value, size_t vl) { - return vfslide1up_vf_f32m1(src, value, vl); + return __riscv_vfslide1up_vf_f32m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfslide1up_vf_f32m1(vfloat32m1_t src, float value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1up_vf_f32m2(vfloat32m2_t src, float value, size_t vl) { - return vfslide1up_vf_f32m2(src, value, vl); + return __riscv_vfslide1up_vf_f32m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfslide1up_vf_f32m2(vfloat32m2_t src, float value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1up_vf_f32m4(vfloat32m4_t src, float value, size_t vl) { - return vfslide1up_vf_f32m4(src, value, vl); + return __riscv_vfslide1up_vf_f32m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfslide1up_vf_f32m4(vfloat32m4_t src, float value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1up_vf_f32m8(vfloat32m8_t src, float value, size_t vl) { - return vfslide1up_vf_f32m8(src, value, vl); + return __riscv_vfslide1up_vf_f32m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfslide1up_vf_f32m8(vfloat32m8_t src, float value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1up_vf_f64m1(vfloat64m1_t src, double value, size_t vl) { - return vfslide1up_vf_f64m1(src, value, vl); + return __riscv_vfslide1up_vf_f64m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfslide1up_vf_f64m1(vfloat64m1_t src, double value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1up_vf_f64m2(vfloat64m2_t src, double value, size_t vl) { - return vfslide1up_vf_f64m2(src, value, vl); + return __riscv_vfslide1up_vf_f64m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfslide1up_vf_f64m2(vfloat64m2_t src, double value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1up_vf_f64m4(vfloat64m4_t src, double value, size_t vl) { - return vfslide1up_vf_f64m4(src, value, vl); + return __riscv_vfslide1up_vf_f64m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfslide1up_vf_f64m4(vfloat64m4_t src, double value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1up_vf_f64m8(vfloat64m8_t src, double value, size_t vl) { - return vfslide1up_vf_f64m8(src, value, vl); + return __riscv_vfslide1up_vf_f64m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfslide1up_vf_f64m8(vfloat64m8_t src, double value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1up_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf4_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f16mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfslide1up_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t src, _Fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1up_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf2_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f16mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfslide1up_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t src, _Fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1up_vf_f16m1_m(vbool16_t mask, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m1_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f16m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfslide1up_vf_f16m1_m(vbool16_t mask, vfloat16m1_t src, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1up_vf_f16m2_m(vbool8_t mask, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m2_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f16m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfslide1up_vf_f16m2_m(vbool8_t mask, vfloat16m2_t src, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1up_vf_f16m4_m(vbool4_t mask, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m4_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f16m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfslide1up_vf_f16m4_m(vbool4_t mask, vfloat16m4_t src, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1up_vf_f16m8_m(vbool2_t mask, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m8_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f16m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfslide1up_vf_f16m8_m(vbool2_t mask, vfloat16m8_t src, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1up_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1up_vf_f32mf2_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f32mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfslide1up_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t src, flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1up_vf_f32m1_m(vbool32_t mask, vfloat32m1_t src, float value, size_t vl) { - return vfslide1up_vf_f32m1_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f32m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfslide1up_vf_f32m1_m(vbool32_t mask, vfloat32m1_t src, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1up_vf_f32m2_m(vbool16_t mask, vfloat32m2_t src, float value, size_t vl) { - return vfslide1up_vf_f32m2_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f32m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfslide1up_vf_f32m2_m(vbool16_t mask, vfloat32m2_t src, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1up_vf_f32m4_m(vbool8_t mask, vfloat32m4_t src, float value, size_t vl) { - return vfslide1up_vf_f32m4_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f32m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfslide1up_vf_f32m4_m(vbool8_t mask, vfloat32m4_t src, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1up_vf_f32m8_m(vbool4_t mask, vfloat32m8_t src, float value, size_t vl) { - return vfslide1up_vf_f32m8_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f32m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfslide1up_vf_f32m8_m(vbool4_t mask, vfloat32m8_t src, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1up_vf_f64m1_m(vbool64_t mask, vfloat64m1_t src, double value, size_t vl) { - return vfslide1up_vf_f64m1_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f64m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfslide1up_vf_f64m1_m(vbool64_t mask, vfloat64m1_t src, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1up_vf_f64m2_m(vbool32_t mask, vfloat64m2_t src, double value, size_t vl) { - return vfslide1up_vf_f64m2_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f64m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfslide1up_vf_f64m2_m(vbool32_t mask, vfloat64m2_t src, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1up_vf_f64m4_m(vbool16_t mask, vfloat64m4_t src, double value, size_t vl) { - return vfslide1up_vf_f64m4_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f64m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfslide1up_vf_f64m4_m(vbool16_t mask, vfloat64m4_t src, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1up_vf_f64m8_m(vbool8_t mask, vfloat64m8_t src, double value, size_t vl) { - return vfslide1up_vf_f64m8_m(mask, src, value, vl); + return __riscv_vfslide1up_vf_f64m8_m(mask, src, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsqrt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsqrt.c index 82206fca5189087a0084b65d5239e8c0f0dbf533..ad116c8cd10f27e7c2b9140d4168412bbb5ad323 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsqrt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsqrt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsqrt_v_f16mf4(vfloat16mf4_t op1, size_t vl) { - return vfsqrt_v_f16mf4(op1, vl); + return __riscv_vfsqrt_v_f16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsqrt_v_f16mf4(vfloat16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsqrt_v_f16mf2(vfloat16mf2_t op1, size_t vl) { - return vfsqrt_v_f16mf2(op1, vl); + return __riscv_vfsqrt_v_f16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfsqrt_v_f16mf2(vfloat16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsqrt_v_f16m1(vfloat16m1_t op1, size_t vl) { - return vfsqrt_v_f16m1(op1, vl); + return __riscv_vfsqrt_v_f16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfsqrt_v_f16m1(vfloat16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsqrt_v_f16m2(vfloat16m2_t op1, size_t vl) { - return vfsqrt_v_f16m2(op1, vl); + return __riscv_vfsqrt_v_f16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfsqrt_v_f16m2(vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsqrt_v_f16m4(vfloat16m4_t op1, size_t vl) { - return vfsqrt_v_f16m4(op1, vl); + return __riscv_vfsqrt_v_f16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfsqrt_v_f16m4(vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsqrt_v_f16m8(vfloat16m8_t op1, size_t vl) { - return vfsqrt_v_f16m8(op1, vl); + return __riscv_vfsqrt_v_f16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfsqrt_v_f16m8(vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsqrt_v_f32mf2(vfloat32mf2_t op1, size_t vl) { - return vfsqrt_v_f32mf2(op1, vl); + return __riscv_vfsqrt_v_f32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfsqrt_v_f32mf2(vfloat32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsqrt_v_f32m1(vfloat32m1_t op1, size_t vl) { - return vfsqrt_v_f32m1(op1, vl); + return __riscv_vfsqrt_v_f32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfsqrt_v_f32m1(vfloat32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsqrt_v_f32m2(vfloat32m2_t op1, size_t vl) { - return vfsqrt_v_f32m2(op1, vl); + return __riscv_vfsqrt_v_f32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfsqrt_v_f32m2(vfloat32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsqrt_v_f32m4(vfloat32m4_t op1, size_t vl) { - return vfsqrt_v_f32m4(op1, vl); + return __riscv_vfsqrt_v_f32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfsqrt_v_f32m4(vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsqrt_v_f32m8(vfloat32m8_t op1, size_t vl) { - return vfsqrt_v_f32m8(op1, vl); + return __riscv_vfsqrt_v_f32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfsqrt_v_f32m8(vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsqrt_v_f64m1(vfloat64m1_t op1, size_t vl) { - return vfsqrt_v_f64m1(op1, vl); + return __riscv_vfsqrt_v_f64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfsqrt_v_f64m1(vfloat64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsqrt_v_f64m2(vfloat64m2_t op1, size_t vl) { - return vfsqrt_v_f64m2(op1, vl); + return __riscv_vfsqrt_v_f64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfsqrt_v_f64m2(vfloat64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsqrt_v_f64m4(vfloat64m4_t op1, size_t vl) { - return vfsqrt_v_f64m4(op1, vl); + return __riscv_vfsqrt_v_f64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfsqrt_v_f64m4(vfloat64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsqrt_v_f64m8(vfloat64m8_t op1, size_t vl) { - return vfsqrt_v_f64m8(op1, vl); + return __riscv_vfsqrt_v_f64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf4_m( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfsqrt_v_f64m8(vfloat64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsqrt_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t vl) { - return vfsqrt_v_f16mf4_m(mask, op1, vl); + return __riscv_vfsqrt_v_f16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf2_m( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfsqrt_v_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsqrt_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t vl) { - return vfsqrt_v_f16mf2_m(mask, op1, vl); + return __riscv_vfsqrt_v_f16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m1_m( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfsqrt_v_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsqrt_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) { - return vfsqrt_v_f16m1_m(mask, op1, vl); + return __riscv_vfsqrt_v_f16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m2_m( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfsqrt_v_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsqrt_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { - return vfsqrt_v_f16m2_m(mask, op1, vl); + return __riscv_vfsqrt_v_f16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m4_m( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfsqrt_v_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsqrt_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { - return vfsqrt_v_f16m4_m(mask, op1, vl); + return __riscv_vfsqrt_v_f16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m8_m( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfsqrt_v_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsqrt_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { - return vfsqrt_v_f16m8_m(mask, op1, vl); + return __riscv_vfsqrt_v_f16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32mf2_m( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfsqrt_v_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsqrt_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t vl) { - return vfsqrt_v_f32mf2_m(mask, op1, vl); + return __riscv_vfsqrt_v_f32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m1_m( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfsqrt_v_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsqrt_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) { - return vfsqrt_v_f32m1_m(mask, op1, vl); + return __riscv_vfsqrt_v_f32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfsqrt_v_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsqrt_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) { - return vfsqrt_v_f32m2_m(mask, op1, vl); + return __riscv_vfsqrt_v_f32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfsqrt_v_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsqrt_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { - return vfsqrt_v_f32m4_m(mask, op1, vl); + return __riscv_vfsqrt_v_f32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m8_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfsqrt_v_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsqrt_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { - return vfsqrt_v_f32m8_m(mask, op1, vl); + return __riscv_vfsqrt_v_f32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m1_m( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfsqrt_v_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsqrt_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) { - return vfsqrt_v_f64m1_m(mask, op1, vl); + return __riscv_vfsqrt_v_f64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m2_m( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfsqrt_v_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsqrt_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) { - return vfsqrt_v_f64m2_m(mask, op1, vl); + return __riscv_vfsqrt_v_f64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m4_m( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfsqrt_v_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsqrt_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) { - return vfsqrt_v_f64m4_m(mask, op1, vl); + return __riscv_vfsqrt_v_f64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m8_m( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfsqrt_v_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsqrt_v_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t vl) { - return vfsqrt_v_f64m8_m(mask, op1, vl); + return __riscv_vfsqrt_v_f64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsub.c index 084808bd165f3b79ded71adfde5b6d61f8bebee4..be699c5beae6636aba320d8787f2923f90fc873c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsub_vv_f16mf4(op1, op2, vl); + return __riscv_vfsub_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsub_vv_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf4(op1, op2, vl); + return __riscv_vfsub_vf_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfsub_vf_f16mf4(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsub_vv_f16mf2(op1, op2, vl); + return __riscv_vfsub_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfsub_vv_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf2(op1, op2, vl); + return __riscv_vfsub_vf_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfsub_vf_f16mf2(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsub_vv_f16m1(op1, op2, vl); + return __riscv_vfsub_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfsub_vv_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m1(op1, op2, vl); + return __riscv_vfsub_vf_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfsub_vf_f16m1(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsub_vv_f16m2(op1, op2, vl); + return __riscv_vfsub_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfsub_vv_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m2(op1, op2, vl); + return __riscv_vfsub_vf_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfsub_vf_f16m2(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsub_vv_f16m4(op1, op2, vl); + return __riscv_vfsub_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfsub_vv_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m4(op1, op2, vl); + return __riscv_vfsub_vf_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfsub_vf_f16m4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsub_vv_f16m8(op1, op2, vl); + return __riscv_vfsub_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfsub_vv_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m8(op1, op2, vl); + return __riscv_vfsub_vf_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfsub_vf_f16m8(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsub_vv_f32mf2(op1, op2, vl); + return __riscv_vfsub_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfsub_vv_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { - return vfsub_vf_f32mf2(op1, op2, vl); + return __riscv_vfsub_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfsub_vf_f32mf2(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsub_vv_f32m1(op1, op2, vl); + return __riscv_vfsub_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfsub_vv_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { - return vfsub_vf_f32m1(op1, op2, vl); + return __riscv_vfsub_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfsub_vf_f32m1(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsub_vv_f32m2(op1, op2, vl); + return __riscv_vfsub_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfsub_vv_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { - return vfsub_vf_f32m2(op1, op2, vl); + return __riscv_vfsub_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfsub_vf_f32m2(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsub_vv_f32m4(op1, op2, vl); + return __riscv_vfsub_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfsub_vv_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { - return vfsub_vf_f32m4(op1, op2, vl); + return __riscv_vfsub_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfsub_vf_f32m4(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsub_vv_f32m8(op1, op2, vl); + return __riscv_vfsub_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfsub_vv_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { - return vfsub_vf_f32m8(op1, op2, vl); + return __riscv_vfsub_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfsub_vf_f32m8(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsub_vv_f64m1(op1, op2, vl); + return __riscv_vfsub_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfsub_vv_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { - return vfsub_vf_f64m1(op1, op2, vl); + return __riscv_vfsub_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfsub_vf_f64m1(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsub_vv_f64m2(op1, op2, vl); + return __riscv_vfsub_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfsub_vv_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { - return vfsub_vf_f64m2(op1, op2, vl); + return __riscv_vfsub_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfsub_vf_f64m2(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsub_vv_f64m4(op1, op2, vl); + return __riscv_vfsub_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfsub_vv_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { - return vfsub_vf_f64m4(op1, op2, vl); + return __riscv_vfsub_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfsub_vf_f64m4(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsub_vv_f64m8(op1, op2, vl); + return __riscv_vfsub_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfsub_vv_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { - return vfsub_vf_f64m8(op1, op2, vl); + return __riscv_vfsub_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf4_m( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsub_vf_f64m8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsub_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf4_m( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsub_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf4_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf2_m( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfsub_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsub_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf2_m( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfsub_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf2_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m1_m( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfsub_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsub_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m1_m( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfsub_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m1_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m2_m( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfsub_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsub_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m2_m( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfsub_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m2_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m4_m( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfsub_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsub_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m4_m( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfsub_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m4_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m8_m( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfsub_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsub_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m8_m( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfsub_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m8_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32mf2_m( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfsub_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsub_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32mf2_m( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfsub_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsub_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m1_m( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfsub_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsub_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m1_m( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfsub_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfsub_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfsub_vf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsub_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfsub_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfsub_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfsub_vf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsub_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfsub_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfsub_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m8_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfsub_vf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsub_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m8_m( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfsub_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vfsub_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfsub_vf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, float op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsub_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m1_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfsub_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vfsub_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m2_m( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfsub_vf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsub_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m2_m( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfsub_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vfsub_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m4_m( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfsub_vf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsub_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m4_m( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfsub_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vfsub_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m8_m( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfsub_vf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, double op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsub_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfsub_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m8_m( @@ -544,6 +544,6 @@ vfloat64m8_t test_vfsub_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vfsub_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfsub_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwadd.c index af38d95971f315e18928ae29794526ba948c421a..c1e1efc511fc8a81df84c66b5ef0d7dc5d059ead 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vv_f32mf2(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_vv_f32mf2(op1, op2, vl); + return __riscv_vfwadd_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32mf2( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwadd_vv_f32mf2(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vf_f32mf2(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32mf2(op1, op2, vl); + return __riscv_vfwadd_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32mf2( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwadd_vf_f32mf2(vfloat16mf4_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wv_f32mf2(vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_wv_f32mf2(op1, op2, vl); + return __riscv_vfwadd_wv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32mf2( @@ -40,7 +40,7 @@ vfloat32mf2_t test_vfwadd_wv_f32mf2(vfloat32mf2_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wf_f32mf2(vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32mf2(op1, op2, vl); + return __riscv_vfwadd_wf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m1( @@ -49,7 +49,7 @@ vfloat32mf2_t test_vfwadd_wf_f32mf2(vfloat32mf2_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vv_f32m1(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_vv_f32m1(op1, op2, vl); + return __riscv_vfwadd_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m1( @@ -58,7 +58,7 @@ vfloat32m1_t test_vfwadd_vv_f32m1(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vf_f32m1(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m1(op1, op2, vl); + return __riscv_vfwadd_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m1( @@ -67,7 +67,7 @@ vfloat32m1_t test_vfwadd_vf_f32m1(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wv_f32m1(vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_wv_f32m1(op1, op2, vl); + return __riscv_vfwadd_wv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m1( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfwadd_wv_f32m1(vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wf_f32m1(vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m1(op1, op2, vl); + return __riscv_vfwadd_wf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfwadd_wf_f32m1(vfloat32m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vv_f32m2(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_vv_f32m2(op1, op2, vl); + return __riscv_vfwadd_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m2( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfwadd_vv_f32m2(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vf_f32m2(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m2(op1, op2, vl); + return __riscv_vfwadd_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m2( @@ -103,7 +103,7 @@ vfloat32m2_t test_vfwadd_vf_f32m2(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wv_f32m2(vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_wv_f32m2(op1, op2, vl); + return __riscv_vfwadd_wv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m2( @@ -112,7 +112,7 @@ vfloat32m2_t test_vfwadd_wv_f32m2(vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wf_f32m2(vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m2(op1, op2, vl); + return __riscv_vfwadd_wf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m4( @@ -121,7 +121,7 @@ vfloat32m2_t test_vfwadd_wf_f32m2(vfloat32m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vv_f32m4(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_vv_f32m4(op1, op2, vl); + return __riscv_vfwadd_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m4( @@ -130,7 +130,7 @@ vfloat32m4_t test_vfwadd_vv_f32m4(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vf_f32m4(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m4(op1, op2, vl); + return __riscv_vfwadd_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m4( @@ -139,7 +139,7 @@ vfloat32m4_t test_vfwadd_vf_f32m4(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wv_f32m4(vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_wv_f32m4(op1, op2, vl); + return __riscv_vfwadd_wv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m4( @@ -148,7 +148,7 @@ vfloat32m4_t test_vfwadd_wv_f32m4(vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wf_f32m4(vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m4(op1, op2, vl); + return __riscv_vfwadd_wf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m8( @@ -157,7 +157,7 @@ vfloat32m4_t test_vfwadd_wf_f32m4(vfloat32m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vv_f32m8(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_vv_f32m8(op1, op2, vl); + return __riscv_vfwadd_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m8( @@ -166,7 +166,7 @@ vfloat32m8_t test_vfwadd_vv_f32m8(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vf_f32m8(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m8(op1, op2, vl); + return __riscv_vfwadd_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m8( @@ -175,7 +175,7 @@ vfloat32m8_t test_vfwadd_vf_f32m8(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wv_f32m8(vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_wv_f32m8(op1, op2, vl); + return __riscv_vfwadd_wv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m8( @@ -184,7 +184,7 @@ vfloat32m8_t test_vfwadd_wv_f32m8(vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wf_f32m8(vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m8(op1, op2, vl); + return __riscv_vfwadd_wf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m1( @@ -193,7 +193,7 @@ vfloat32m8_t test_vfwadd_wf_f32m8(vfloat32m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vv_f64m1(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_vv_f64m1(op1, op2, vl); + return __riscv_vfwadd_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m1( @@ -202,7 +202,7 @@ vfloat64m1_t test_vfwadd_vv_f64m1(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vf_f64m1(vfloat32mf2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m1(op1, op2, vl); + return __riscv_vfwadd_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m1( @@ -211,7 +211,7 @@ vfloat64m1_t test_vfwadd_vf_f64m1(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wv_f64m1(vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_wv_f64m1(op1, op2, vl); + return __riscv_vfwadd_wv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfwadd_wv_f64m1(vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wf_f64m1(vfloat64m1_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m1(op1, op2, vl); + return __riscv_vfwadd_wf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfwadd_wf_f64m1(vfloat64m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vv_f64m2(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_vv_f64m2(op1, op2, vl); + return __riscv_vfwadd_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfwadd_vv_f64m2(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vf_f64m2(vfloat32m1_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m2(op1, op2, vl); + return __riscv_vfwadd_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m2( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfwadd_vf_f64m2(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wv_f64m2(vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_wv_f64m2(op1, op2, vl); + return __riscv_vfwadd_wv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m2( @@ -256,7 +256,7 @@ vfloat64m2_t test_vfwadd_wv_f64m2(vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wf_f64m2(vfloat64m2_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m2(op1, op2, vl); + return __riscv_vfwadd_wf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m4( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfwadd_wf_f64m2(vfloat64m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vv_f64m4(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_vv_f64m4(op1, op2, vl); + return __riscv_vfwadd_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m4( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfwadd_vv_f64m4(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vf_f64m4(vfloat32m2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m4(op1, op2, vl); + return __riscv_vfwadd_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m4( @@ -283,7 +283,7 @@ vfloat64m4_t test_vfwadd_vf_f64m4(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wv_f64m4(vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_wv_f64m4(op1, op2, vl); + return __riscv_vfwadd_wv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m4( @@ -292,7 +292,7 @@ vfloat64m4_t test_vfwadd_wv_f64m4(vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wf_f64m4(vfloat64m4_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m4(op1, op2, vl); + return __riscv_vfwadd_wf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m8( @@ -301,7 +301,7 @@ vfloat64m4_t test_vfwadd_wf_f64m4(vfloat64m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vv_f64m8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_vv_f64m8(op1, op2, vl); + return __riscv_vfwadd_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m8( @@ -310,7 +310,7 @@ vfloat64m8_t test_vfwadd_vv_f64m8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vf_f64m8(vfloat32m4_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m8(op1, op2, vl); + return __riscv_vfwadd_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m8( @@ -319,7 +319,7 @@ vfloat64m8_t test_vfwadd_vf_f64m8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wv_f64m8(vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_wv_f64m8(op1, op2, vl); + return __riscv_vfwadd_wv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m8( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwadd_wv_f64m8(vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wf_f64m8(vfloat64m8_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m8(op1, op2, vl); + return __riscv_vfwadd_wf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32mf2_m( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwadd_wf_f64m8(vfloat64m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vv_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32mf2_m( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwadd_vv_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vf_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32mf2_m( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwadd_vf_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_wv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32mf2_m( @@ -364,7 +364,7 @@ vfloat32mf2_t test_vfwadd_wv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m1_m( @@ -373,7 +373,7 @@ vfloat32mf2_t test_vfwadd_wf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vv_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m1_m( @@ -382,7 +382,7 @@ vfloat32m1_t test_vfwadd_vv_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vf_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m1_m( @@ -391,7 +391,7 @@ vfloat32m1_t test_vfwadd_vf_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_wv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m1_m( @@ -400,7 +400,7 @@ vfloat32m1_t test_vfwadd_wv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m2_m( @@ -409,7 +409,7 @@ vfloat32m1_t test_vfwadd_wf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vv_f32m2_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m2_m( @@ -418,7 +418,7 @@ vfloat32m2_t test_vfwadd_vv_f32m2_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vf_f32m2_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m2_t test_vfwadd_vf_f32m2_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_wv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfwadd_wv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfwadd_wf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vv_f32m4_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfwadd_vv_f32m4_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vf_f32m4_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m4_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfwadd_vf_f32m4_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_wv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m4_m( @@ -472,7 +472,7 @@ vfloat32m4_t test_vfwadd_wv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m8_m( @@ -481,7 +481,7 @@ vfloat32m4_t test_vfwadd_wf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vv_f32m8_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m8_m( @@ -490,7 +490,7 @@ vfloat32m8_t test_vfwadd_vv_f32m8_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vf_f32m8_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m8_m( @@ -499,7 +499,7 @@ vfloat32m8_t test_vfwadd_vf_f32m8_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_wv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m8_m( @@ -508,7 +508,7 @@ vfloat32m8_t test_vfwadd_wv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m1_m( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfwadd_wf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vv_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m1_m( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfwadd_vv_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vf_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m1_m( @@ -535,7 +535,7 @@ vfloat64m1_t test_vfwadd_vf_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, float op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_wv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m1_m( @@ -544,7 +544,7 @@ vfloat64m1_t test_vfwadd_wv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m2_m( @@ -553,7 +553,7 @@ vfloat64m1_t test_vfwadd_wf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vv_f64m2_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m2_m( @@ -562,7 +562,7 @@ vfloat64m2_t test_vfwadd_vv_f64m2_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vf_f64m2_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m2_m( @@ -571,7 +571,7 @@ vfloat64m2_t test_vfwadd_vf_f64m2_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_wv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m2_m( @@ -580,7 +580,7 @@ vfloat64m2_t test_vfwadd_wv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m4_m( @@ -589,7 +589,7 @@ vfloat64m2_t test_vfwadd_wf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vv_f64m4_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m4_m( @@ -598,7 +598,7 @@ vfloat64m4_t test_vfwadd_vv_f64m4_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vf_f64m4_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m4_m( @@ -607,7 +607,7 @@ vfloat64m4_t test_vfwadd_vf_f64m4_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_wv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m4_m( @@ -616,7 +616,7 @@ vfloat64m4_t test_vfwadd_wv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m8_m( @@ -625,7 +625,7 @@ vfloat64m4_t test_vfwadd_wf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vv_f64m8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwadd_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m8_m( @@ -634,7 +634,7 @@ vfloat64m8_t test_vfwadd_vv_f64m8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vf_f64m8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwadd_vf_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m8_m( @@ -643,7 +643,7 @@ vfloat64m8_t test_vfwadd_vf_f64m8_m(vbool8_t mask, vfloat32m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_wv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwadd_wv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m8_m( @@ -652,6 +652,6 @@ vfloat64m8_t test_vfwadd_wv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwadd_wf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvt.c index e68b28e8b0eb3e60ab0fdc2a4e8919ff3ea5af93..e9435918f3ef83562a97aec4657a02a452e2e9a0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4(vint8mf8_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf4(src, vl); + return __riscv_vfwcvt_f_x_v_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4(vint8mf8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2(vint8mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf2(src, vl); + return __riscv_vfwcvt_f_x_v_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2(vint8mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_x_v_f16m1(vint8mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m1(src, vl); + return __riscv_vfwcvt_f_x_v_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfwcvt_f_x_v_f16m1(vint8mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_x_v_f16m2(vint8m1_t src, size_t vl) { - return vfwcvt_f_x_v_f16m2(src, vl); + return __riscv_vfwcvt_f_x_v_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfwcvt_f_x_v_f16m2(vint8m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_x_v_f16m4(vint8m2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m4(src, vl); + return __riscv_vfwcvt_f_x_v_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfwcvt_f_x_v_f16m4(vint8m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_x_v_f16m8(vint8m4_t src, size_t vl) { - return vfwcvt_f_x_v_f16m8(src, vl); + return __riscv_vfwcvt_f_x_v_f16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf4( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfwcvt_f_x_v_f16m8(vint8m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4(vuint8mf8_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf4(src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf2( @@ -76,7 +76,7 @@ vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4(vuint8mf8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2(vuint8mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf2(src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m1( @@ -85,7 +85,7 @@ vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2(vuint8mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_xu_v_f16m1(vuint8mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m1(src, vl); + return __riscv_vfwcvt_f_xu_v_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m2( @@ -94,7 +94,7 @@ vfloat16m1_t test_vfwcvt_f_xu_v_f16m1(vuint8mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_xu_v_f16m2(vuint8m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m2(src, vl); + return __riscv_vfwcvt_f_xu_v_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m4( @@ -103,7 +103,7 @@ vfloat16m2_t test_vfwcvt_f_xu_v_f16m2(vuint8m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_xu_v_f16m4(vuint8m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m4(src, vl); + return __riscv_vfwcvt_f_xu_v_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m8( @@ -112,7 +112,7 @@ vfloat16m4_t test_vfwcvt_f_xu_v_f16m4(vuint8m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_xu_v_f16m8(vuint8m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m8(src, vl); + return __riscv_vfwcvt_f_xu_v_f16m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfwcvt_f_xu_v_f16m8(vuint8m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_x_f_v_i32mf2(vfloat16mf4_t src, size_t vl) { - return vfwcvt_x_f_v_i32mf2(src, vl); + return __riscv_vfwcvt_x_f_v_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32mf2( @@ -130,7 +130,7 @@ vint32mf2_t test_vfwcvt_x_f_v_i32mf2(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2(vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32mf2(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m1( @@ -139,7 +139,7 @@ vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_x_f_v_i32m1(vfloat16mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m1(src, vl); + return __riscv_vfwcvt_x_f_v_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m1( @@ -148,7 +148,7 @@ vint32m1_t test_vfwcvt_x_f_v_i32m1(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1(vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m1(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m2( @@ -157,7 +157,7 @@ vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_x_f_v_i32m2(vfloat16m1_t src, size_t vl) { - return vfwcvt_x_f_v_i32m2(src, vl); + return __riscv_vfwcvt_x_f_v_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m2( @@ -166,7 +166,7 @@ vint32m2_t test_vfwcvt_x_f_v_i32m2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2(vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m2(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m4( @@ -175,7 +175,7 @@ vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_x_f_v_i32m4(vfloat16m2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m4(src, vl); + return __riscv_vfwcvt_x_f_v_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m4( @@ -184,7 +184,7 @@ vint32m4_t test_vfwcvt_x_f_v_i32m4(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4(vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m4(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m8( @@ -193,7 +193,7 @@ vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_x_f_v_i32m8(vfloat16m4_t src, size_t vl) { - return vfwcvt_x_f_v_i32m8(src, vl); + return __riscv_vfwcvt_x_f_v_i32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m8( @@ -202,7 +202,7 @@ vint32m8_t test_vfwcvt_x_f_v_i32m8(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8(vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m8(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32mf2( @@ -211,7 +211,7 @@ vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2(vfloat16mf4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32mf2(src, vl); + return __riscv_vfwcvt_xu_f_v_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32mf2( @@ -220,7 +220,7 @@ vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2(vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32mf2(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m1( @@ -229,7 +229,7 @@ vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_xu_f_v_u32m1(vfloat16mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m1(src, vl); + return __riscv_vfwcvt_xu_f_v_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m1( @@ -238,7 +238,7 @@ vuint32m1_t test_vfwcvt_xu_f_v_u32m1(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1(vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m1(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m2( @@ -247,7 +247,7 @@ vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_xu_f_v_u32m2(vfloat16m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m2(src, vl); + return __riscv_vfwcvt_xu_f_v_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m2( @@ -256,7 +256,7 @@ vuint32m2_t test_vfwcvt_xu_f_v_u32m2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2(vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m2(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m4( @@ -265,7 +265,7 @@ vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_xu_f_v_u32m4(vfloat16m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m4(src, vl); + return __riscv_vfwcvt_xu_f_v_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m4( @@ -274,7 +274,7 @@ vuint32m4_t test_vfwcvt_xu_f_v_u32m4(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4(vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m4(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m8( @@ -283,7 +283,7 @@ vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_xu_f_v_u32m8(vfloat16m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m8(src, vl); + return __riscv_vfwcvt_xu_f_v_u32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m8( @@ -292,7 +292,7 @@ vuint32m8_t test_vfwcvt_xu_f_v_u32m8(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8(vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m8(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32mf2( @@ -301,7 +301,7 @@ vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2(vint16mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f32mf2(src, vl); + return __riscv_vfwcvt_f_x_v_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m1( @@ -310,7 +310,7 @@ vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2(vint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_x_v_f32m1(vint16mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m1(src, vl); + return __riscv_vfwcvt_f_x_v_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m2( @@ -319,7 +319,7 @@ vfloat32m1_t test_vfwcvt_f_x_v_f32m1(vint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_x_v_f32m2(vint16m1_t src, size_t vl) { - return vfwcvt_f_x_v_f32m2(src, vl); + return __riscv_vfwcvt_f_x_v_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m4( @@ -328,7 +328,7 @@ vfloat32m2_t test_vfwcvt_f_x_v_f32m2(vint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_x_v_f32m4(vint16m2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m4(src, vl); + return __riscv_vfwcvt_f_x_v_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m8( @@ -337,7 +337,7 @@ vfloat32m4_t test_vfwcvt_f_x_v_f32m4(vint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_x_v_f32m8(vint16m4_t src, size_t vl) { - return vfwcvt_f_x_v_f32m8(src, vl); + return __riscv_vfwcvt_f_x_v_f32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32mf2( @@ -346,7 +346,7 @@ vfloat32m8_t test_vfwcvt_f_x_v_f32m8(vint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2(vuint16mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32mf2(src, vl); + return __riscv_vfwcvt_f_xu_v_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m1( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2(vuint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_xu_v_f32m1(vuint16mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m1(src, vl); + return __riscv_vfwcvt_f_xu_v_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m2( @@ -364,7 +364,7 @@ vfloat32m1_t test_vfwcvt_f_xu_v_f32m1(vuint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_xu_v_f32m2(vuint16m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m2(src, vl); + return __riscv_vfwcvt_f_xu_v_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m4( @@ -373,7 +373,7 @@ vfloat32m2_t test_vfwcvt_f_xu_v_f32m2(vuint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_xu_v_f32m4(vuint16m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m4(src, vl); + return __riscv_vfwcvt_f_xu_v_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m8( @@ -382,7 +382,7 @@ vfloat32m4_t test_vfwcvt_f_xu_v_f32m4(vuint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_xu_v_f32m8(vuint16m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m8(src, vl); + return __riscv_vfwcvt_f_xu_v_f32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32mf2( @@ -391,7 +391,7 @@ vfloat32m8_t test_vfwcvt_f_xu_v_f32m8(vuint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2(vfloat16mf4_t src, size_t vl) { - return vfwcvt_f_f_v_f32mf2(src, vl); + return __riscv_vfwcvt_f_f_v_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m1( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_f_v_f32m1(vfloat16mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m1(src, vl); + return __riscv_vfwcvt_f_f_v_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m2( @@ -409,7 +409,7 @@ vfloat32m1_t test_vfwcvt_f_f_v_f32m1(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_f_v_f32m2(vfloat16m1_t src, size_t vl) { - return vfwcvt_f_f_v_f32m2(src, vl); + return __riscv_vfwcvt_f_f_v_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m4( @@ -418,7 +418,7 @@ vfloat32m2_t test_vfwcvt_f_f_v_f32m2(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_f_v_f32m4(vfloat16m2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m4(src, vl); + return __riscv_vfwcvt_f_f_v_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m8( @@ -427,7 +427,7 @@ vfloat32m4_t test_vfwcvt_f_f_v_f32m4(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_f_v_f32m8(vfloat16m4_t src, size_t vl) { - return vfwcvt_f_f_v_f32m8(src, vl); + return __riscv_vfwcvt_f_f_v_f32m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m1( @@ -436,7 +436,7 @@ vfloat32m8_t test_vfwcvt_f_f_v_f32m8(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_x_f_v_i64m1(vfloat32mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m1(src, vl); + return __riscv_vfwcvt_x_f_v_i64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m1( @@ -445,7 +445,7 @@ vint64m1_t test_vfwcvt_x_f_v_i64m1(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1(vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m1(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m2( @@ -454,7 +454,7 @@ vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_x_f_v_i64m2(vfloat32m1_t src, size_t vl) { - return vfwcvt_x_f_v_i64m2(src, vl); + return __riscv_vfwcvt_x_f_v_i64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m2( @@ -463,7 +463,7 @@ vint64m2_t test_vfwcvt_x_f_v_i64m2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2(vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m2(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m4( @@ -472,7 +472,7 @@ vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_x_f_v_i64m4(vfloat32m2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m4(src, vl); + return __riscv_vfwcvt_x_f_v_i64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m4( @@ -481,7 +481,7 @@ vint64m4_t test_vfwcvt_x_f_v_i64m4(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4(vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m4(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m8( @@ -490,7 +490,7 @@ vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_x_f_v_i64m8(vfloat32m4_t src, size_t vl) { - return vfwcvt_x_f_v_i64m8(src, vl); + return __riscv_vfwcvt_x_f_v_i64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m8( @@ -499,7 +499,7 @@ vint64m8_t test_vfwcvt_x_f_v_i64m8(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8(vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m8(src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m1( @@ -508,7 +508,7 @@ vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_xu_f_v_u64m1(vfloat32mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m1(src, vl); + return __riscv_vfwcvt_xu_f_v_u64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m1( @@ -517,7 +517,7 @@ vuint64m1_t test_vfwcvt_xu_f_v_u64m1(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1(vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m1(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m2( @@ -526,7 +526,7 @@ vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_xu_f_v_u64m2(vfloat32m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m2(src, vl); + return __riscv_vfwcvt_xu_f_v_u64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m2( @@ -535,7 +535,7 @@ vuint64m2_t test_vfwcvt_xu_f_v_u64m2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2(vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m2(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m4( @@ -544,7 +544,7 @@ vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_xu_f_v_u64m4(vfloat32m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m4(src, vl); + return __riscv_vfwcvt_xu_f_v_u64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m4( @@ -553,7 +553,7 @@ vuint64m4_t test_vfwcvt_xu_f_v_u64m4(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4(vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m4(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m8( @@ -562,7 +562,7 @@ vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_xu_f_v_u64m8(vfloat32m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m8(src, vl); + return __riscv_vfwcvt_xu_f_v_u64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m8( @@ -571,7 +571,7 @@ vuint64m8_t test_vfwcvt_xu_f_v_u64m8(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8(vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m8(src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m1( @@ -580,7 +580,7 @@ vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_x_v_f64m1(vint32mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m1(src, vl); + return __riscv_vfwcvt_f_x_v_f64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m2( @@ -589,7 +589,7 @@ vfloat64m1_t test_vfwcvt_f_x_v_f64m1(vint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_x_v_f64m2(vint32m1_t src, size_t vl) { - return vfwcvt_f_x_v_f64m2(src, vl); + return __riscv_vfwcvt_f_x_v_f64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m4( @@ -598,7 +598,7 @@ vfloat64m2_t test_vfwcvt_f_x_v_f64m2(vint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_x_v_f64m4(vint32m2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m4(src, vl); + return __riscv_vfwcvt_f_x_v_f64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m8( @@ -607,7 +607,7 @@ vfloat64m4_t test_vfwcvt_f_x_v_f64m4(vint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_x_v_f64m8(vint32m4_t src, size_t vl) { - return vfwcvt_f_x_v_f64m8(src, vl); + return __riscv_vfwcvt_f_x_v_f64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m1( @@ -616,7 +616,7 @@ vfloat64m8_t test_vfwcvt_f_x_v_f64m8(vint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_xu_v_f64m1(vuint32mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m1(src, vl); + return __riscv_vfwcvt_f_xu_v_f64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m2( @@ -625,7 +625,7 @@ vfloat64m1_t test_vfwcvt_f_xu_v_f64m1(vuint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_xu_v_f64m2(vuint32m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m2(src, vl); + return __riscv_vfwcvt_f_xu_v_f64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m4( @@ -634,7 +634,7 @@ vfloat64m2_t test_vfwcvt_f_xu_v_f64m2(vuint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_xu_v_f64m4(vuint32m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m4(src, vl); + return __riscv_vfwcvt_f_xu_v_f64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m8( @@ -643,7 +643,7 @@ vfloat64m4_t test_vfwcvt_f_xu_v_f64m4(vuint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_xu_v_f64m8(vuint32m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m8(src, vl); + return __riscv_vfwcvt_f_xu_v_f64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m1( @@ -652,7 +652,7 @@ vfloat64m8_t test_vfwcvt_f_xu_v_f64m8(vuint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_f_v_f64m1(vfloat32mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m1(src, vl); + return __riscv_vfwcvt_f_f_v_f64m1(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m2( @@ -661,7 +661,7 @@ vfloat64m1_t test_vfwcvt_f_f_v_f64m1(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_f_v_f64m2(vfloat32m1_t src, size_t vl) { - return vfwcvt_f_f_v_f64m2(src, vl); + return __riscv_vfwcvt_f_f_v_f64m2(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m4( @@ -670,7 +670,7 @@ vfloat64m2_t test_vfwcvt_f_f_v_f64m2(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_f_v_f64m4(vfloat32m2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m4(src, vl); + return __riscv_vfwcvt_f_f_v_f64m4(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m8( @@ -679,7 +679,7 @@ vfloat64m4_t test_vfwcvt_f_f_v_f64m4(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_f_v_f64m8(vfloat32m4_t src, size_t vl) { - return vfwcvt_f_f_v_f64m8(src, vl); + return __riscv_vfwcvt_f_f_v_f64m8(src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf4_m( @@ -688,7 +688,7 @@ vfloat64m8_t test_vfwcvt_f_f_v_f64m8(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_m(vbool64_t mask, vint8mf8_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf4_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf2_m( @@ -697,7 +697,7 @@ vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_m(vbool64_t mask, vint8mf8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_m(vbool32_t mask, vint8mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf2_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m1_m( @@ -706,7 +706,7 @@ vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_m(vbool32_t mask, vint8mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_x_v_f16m1_m(vbool16_t mask, vint8mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m1_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m2_m( @@ -715,7 +715,7 @@ vfloat16m1_t test_vfwcvt_f_x_v_f16m1_m(vbool16_t mask, vint8mf2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_x_v_f16m2_m(vbool8_t mask, vint8m1_t src, size_t vl) { - return vfwcvt_f_x_v_f16m2_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m4_m( @@ -724,7 +724,7 @@ vfloat16m2_t test_vfwcvt_f_x_v_f16m2_m(vbool8_t mask, vint8m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_x_v_f16m4_m(vbool4_t mask, vint8m2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m4_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m8_m( @@ -733,7 +733,7 @@ vfloat16m4_t test_vfwcvt_f_x_v_f16m4_m(vbool4_t mask, vint8m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_x_v_f16m8_m(vbool2_t mask, vint8m4_t src, size_t vl) { - return vfwcvt_f_x_v_f16m8_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf4_m( @@ -742,7 +742,7 @@ vfloat16m8_t test_vfwcvt_f_x_v_f16m8_m(vbool2_t mask, vint8m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_m(vbool64_t mask, vuint8mf8_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf4_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf2_m( @@ -751,7 +751,7 @@ vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_m(vbool64_t mask, vuint8mf8_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_m(vbool32_t mask, vuint8mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf2_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m1_m( @@ -760,7 +760,7 @@ vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_m(vbool32_t mask, vuint8mf4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_m(vbool16_t mask, vuint8mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m1_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m2_m( @@ -769,7 +769,7 @@ vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_m(vbool16_t mask, vuint8mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_m(vbool8_t mask, vuint8m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m2_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m4_m( @@ -778,7 +778,7 @@ vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_m(vbool8_t mask, vuint8m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_m(vbool4_t mask, vuint8m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m4_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m8_m( @@ -787,7 +787,7 @@ vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_m(vbool4_t mask, vuint8m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_m(vbool2_t mask, vuint8m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m8_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32mf2_m( @@ -796,7 +796,7 @@ vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_m(vbool2_t mask, vuint8m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_x_f_v_i32mf2_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfwcvt_x_f_v_i32mf2_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32mf2_m( @@ -805,7 +805,7 @@ vint32mf2_t test_vfwcvt_x_f_v_i32mf2_m(vbool64_t mask, vfloat16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32mf2_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m1_m( @@ -814,7 +814,7 @@ vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_m(vbool64_t mask, vfloat16mf4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_x_f_v_i32m1_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m1_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m1_m( @@ -823,7 +823,7 @@ vint32m1_t test_vfwcvt_x_f_v_i32m1_m(vbool32_t mask, vfloat16mf2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m1_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m2_m( @@ -832,7 +832,7 @@ vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_m(vbool32_t mask, vfloat16mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_x_f_v_i32m2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfwcvt_x_f_v_i32m2_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m2_m( @@ -841,7 +841,7 @@ vint32m2_t test_vfwcvt_x_f_v_i32m2_m(vbool16_t mask, vfloat16m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m2_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m4_m( @@ -850,7 +850,7 @@ vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_m(vbool16_t mask, vfloat16m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_x_f_v_i32m4_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m4_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m4_m( @@ -859,7 +859,7 @@ vint32m4_t test_vfwcvt_x_f_v_i32m4_m(vbool8_t mask, vfloat16m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m4_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m8_m( @@ -868,7 +868,7 @@ vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_m(vbool8_t mask, vfloat16m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_x_f_v_i32m8_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfwcvt_x_f_v_i32m8_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m8_m( @@ -877,7 +877,7 @@ vint32m8_t test_vfwcvt_x_f_v_i32m8_m(vbool4_t mask, vfloat16m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m8_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32mf2_m( @@ -886,7 +886,7 @@ vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_m(vbool4_t mask, vfloat16m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32mf2_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32mf2_m( @@ -895,7 +895,7 @@ vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_m(vbool64_t mask, vfloat16mf4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32mf2_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m1_m( @@ -904,7 +904,7 @@ vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_m(vbool64_t mask, vfloat16mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_xu_f_v_u32m1_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m1_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m1_m( @@ -913,7 +913,7 @@ vuint32m1_t test_vfwcvt_xu_f_v_u32m1_m(vbool32_t mask, vfloat16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m1_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m2_m( @@ -922,7 +922,7 @@ vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_m(vbool32_t mask, vfloat16mf2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_xu_f_v_u32m2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m2_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m2_m( @@ -931,7 +931,7 @@ vuint32m2_t test_vfwcvt_xu_f_v_u32m2_m(vbool16_t mask, vfloat16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m2_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m4_m( @@ -940,7 +940,7 @@ vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_m(vbool16_t mask, vfloat16m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_xu_f_v_u32m4_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m4_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m4_m( @@ -949,7 +949,7 @@ vuint32m4_t test_vfwcvt_xu_f_v_u32m4_m(vbool8_t mask, vfloat16m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m4_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m8_m( @@ -958,7 +958,7 @@ vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_m(vbool8_t mask, vfloat16m2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_xu_f_v_u32m8_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m8_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m8_m( @@ -967,7 +967,7 @@ vuint32m8_t test_vfwcvt_xu_f_v_u32m8_m(vbool4_t mask, vfloat16m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m8_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32mf2_m( @@ -976,7 +976,7 @@ vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_m(vbool4_t mask, vfloat16m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_m(vbool64_t mask, vint16mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f32mf2_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m1_m( @@ -985,7 +985,7 @@ vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_m(vbool64_t mask, vint16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_x_v_f32m1_m(vbool32_t mask, vint16mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m1_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m2_m( @@ -994,7 +994,7 @@ vfloat32m1_t test_vfwcvt_f_x_v_f32m1_m(vbool32_t mask, vint16mf2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_x_v_f32m2_m(vbool16_t mask, vint16m1_t src, size_t vl) { - return vfwcvt_f_x_v_f32m2_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m4_m( @@ -1003,7 +1003,7 @@ vfloat32m2_t test_vfwcvt_f_x_v_f32m2_m(vbool16_t mask, vint16m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_x_v_f32m4_m(vbool8_t mask, vint16m2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m4_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m8_m( @@ -1012,7 +1012,7 @@ vfloat32m4_t test_vfwcvt_f_x_v_f32m4_m(vbool8_t mask, vint16m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_x_v_f32m8_m(vbool4_t mask, vint16m4_t src, size_t vl) { - return vfwcvt_f_x_v_f32m8_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32mf2_m( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfwcvt_f_x_v_f32m8_m(vbool4_t mask, vint16m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_m(vbool64_t mask, vuint16mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32mf2_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m1_m( @@ -1030,7 +1030,7 @@ vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_m(vbool64_t mask, vuint16mf4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_m(vbool32_t mask, vuint16mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m1_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m2_m( @@ -1039,7 +1039,7 @@ vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_m(vbool32_t mask, vuint16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_m(vbool16_t mask, vuint16m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m2_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m4_m( @@ -1048,7 +1048,7 @@ vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_m(vbool16_t mask, vuint16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_m(vbool8_t mask, vuint16m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m4_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m8_m( @@ -1057,7 +1057,7 @@ vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_m(vbool8_t mask, vuint16m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_m(vbool4_t mask, vuint16m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m8_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32mf2_m( @@ -1066,7 +1066,7 @@ vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_m(vbool4_t mask, vuint16m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_m(vbool64_t mask, vfloat16mf4_t src, size_t vl) { - return vfwcvt_f_f_v_f32mf2_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m1_m( @@ -1075,7 +1075,7 @@ vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_m(vbool64_t mask, vfloat16mf4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_f_v_f32m1_m(vbool32_t mask, vfloat16mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m1_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m2_m( @@ -1084,7 +1084,7 @@ vfloat32m1_t test_vfwcvt_f_f_v_f32m1_m(vbool32_t mask, vfloat16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_f_v_f32m2_m(vbool16_t mask, vfloat16m1_t src, size_t vl) { - return vfwcvt_f_f_v_f32m2_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m4_m( @@ -1093,7 +1093,7 @@ vfloat32m2_t test_vfwcvt_f_f_v_f32m2_m(vbool16_t mask, vfloat16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_f_v_f32m4_m(vbool8_t mask, vfloat16m2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m4_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m8_m( @@ -1102,7 +1102,7 @@ vfloat32m4_t test_vfwcvt_f_f_v_f32m4_m(vbool8_t mask, vfloat16m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_f_v_f32m8_m(vbool4_t mask, vfloat16m4_t src, size_t vl) { - return vfwcvt_f_f_v_f32m8_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m1_m( @@ -1111,7 +1111,7 @@ vfloat32m8_t test_vfwcvt_f_f_v_f32m8_m(vbool4_t mask, vfloat16m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_x_f_v_i64m1_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m1_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m1_m( @@ -1120,7 +1120,7 @@ vint64m1_t test_vfwcvt_x_f_v_i64m1_m(vbool64_t mask, vfloat32mf2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m1_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m2_m( @@ -1129,7 +1129,7 @@ vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_m(vbool64_t mask, vfloat32mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_x_f_v_i64m2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfwcvt_x_f_v_i64m2_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m2_m( @@ -1138,7 +1138,7 @@ vint64m2_t test_vfwcvt_x_f_v_i64m2_m(vbool32_t mask, vfloat32m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m2_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m4_m( @@ -1147,7 +1147,7 @@ vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_m(vbool32_t mask, vfloat32m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_x_f_v_i64m4_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m4_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m4_m( @@ -1156,7 +1156,7 @@ vint64m4_t test_vfwcvt_x_f_v_i64m4_m(vbool16_t mask, vfloat32m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m4_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m8_m( @@ -1165,7 +1165,7 @@ vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_m(vbool16_t mask, vfloat32m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_x_f_v_i64m8_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfwcvt_x_f_v_i64m8_m(mask, src, vl); + return __riscv_vfwcvt_x_f_v_i64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m8_m( @@ -1174,7 +1174,7 @@ vint64m8_t test_vfwcvt_x_f_v_i64m8_m(vbool8_t mask, vfloat32m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m8_m(mask, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m1_m( @@ -1183,7 +1183,7 @@ vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_m(vbool8_t mask, vfloat32m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_xu_f_v_u64m1_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m1_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m1_m( @@ -1192,7 +1192,7 @@ vuint64m1_t test_vfwcvt_xu_f_v_u64m1_m(vbool64_t mask, vfloat32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m1_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m2_m( @@ -1201,7 +1201,7 @@ vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_m(vbool64_t mask, vfloat32mf2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_xu_f_v_u64m2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m2_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m2_m( @@ -1210,7 +1210,7 @@ vuint64m2_t test_vfwcvt_xu_f_v_u64m2_m(vbool32_t mask, vfloat32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m2_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m4_m( @@ -1219,7 +1219,7 @@ vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_m(vbool32_t mask, vfloat32m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_xu_f_v_u64m4_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m4_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m4_m( @@ -1228,7 +1228,7 @@ vuint64m4_t test_vfwcvt_xu_f_v_u64m4_m(vbool16_t mask, vfloat32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m4_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m8_m( @@ -1237,7 +1237,7 @@ vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_m(vbool16_t mask, vfloat32m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_xu_f_v_u64m8_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m8_m(mask, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m8_m( @@ -1246,7 +1246,7 @@ vuint64m8_t test_vfwcvt_xu_f_v_u64m8_m(vbool8_t mask, vfloat32m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m8_m(mask, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m1_m( @@ -1255,7 +1255,7 @@ vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_m(vbool8_t mask, vfloat32m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_x_v_f64m1_m(vbool64_t mask, vint32mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m1_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m2_m( @@ -1264,7 +1264,7 @@ vfloat64m1_t test_vfwcvt_f_x_v_f64m1_m(vbool64_t mask, vint32mf2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_x_v_f64m2_m(vbool32_t mask, vint32m1_t src, size_t vl) { - return vfwcvt_f_x_v_f64m2_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m4_m( @@ -1273,7 +1273,7 @@ vfloat64m2_t test_vfwcvt_f_x_v_f64m2_m(vbool32_t mask, vint32m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_x_v_f64m4_m(vbool16_t mask, vint32m2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m4_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m8_m( @@ -1282,7 +1282,7 @@ vfloat64m4_t test_vfwcvt_f_x_v_f64m4_m(vbool16_t mask, vint32m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_x_v_f64m8_m(vbool8_t mask, vint32m4_t src, size_t vl) { - return vfwcvt_f_x_v_f64m8_m(mask, src, vl); + return __riscv_vfwcvt_f_x_v_f64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m1_m( @@ -1291,7 +1291,7 @@ vfloat64m8_t test_vfwcvt_f_x_v_f64m8_m(vbool8_t mask, vint32m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_m(vbool64_t mask, vuint32mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m1_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m2_m( @@ -1300,7 +1300,7 @@ vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_m(vbool64_t mask, vuint32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_m(vbool32_t mask, vuint32m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m2_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m4_m( @@ -1309,7 +1309,7 @@ vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_m(vbool32_t mask, vuint32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_m(vbool16_t mask, vuint32m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m4_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m8_m( @@ -1318,7 +1318,7 @@ vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_m(vbool16_t mask, vuint32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_m(vbool8_t mask, vuint32m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m8_m(mask, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m1_m( @@ -1327,7 +1327,7 @@ vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_m(vbool8_t mask, vuint32m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_f_v_f64m1_m(vbool64_t mask, vfloat32mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m1_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m2_m( @@ -1336,7 +1336,7 @@ vfloat64m1_t test_vfwcvt_f_f_v_f64m1_m(vbool64_t mask, vfloat32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_f_v_f64m2_m(vbool32_t mask, vfloat32m1_t src, size_t vl) { - return vfwcvt_f_f_v_f64m2_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m4_m( @@ -1345,7 +1345,7 @@ vfloat64m2_t test_vfwcvt_f_f_v_f64m2_m(vbool32_t mask, vfloat32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_f_v_f64m4_m(vbool16_t mask, vfloat32m2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m4_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m8_m( @@ -1354,6 +1354,6 @@ vfloat64m4_t test_vfwcvt_f_f_v_f64m4_m(vbool16_t mask, vfloat32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_f_v_f64m8_m(vbool8_t mask, vfloat32m4_t src, size_t vl) { - return vfwcvt_f_f_v_f64m8_m(mask, src, vl); + return __riscv_vfwcvt_f_f_v_f64m8_m(mask, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmacc.c index 183a44fe1dd615caac5ede0a4e090e121a8ac059..05d46e43e3f06941b419483d9e738db4e863e80f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vv_f32mf2(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32mf2( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwmacc_vv_f32mf2(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vf_f32mf2(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vf_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m1( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwmacc_vf_f32mf2(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vv_f32m1(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m1( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwmacc_vv_f32m1(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vf_f32m1(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vf_f32m1(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m2( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwmacc_vf_f32m1(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vv_f32m2(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m2( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwmacc_vv_f32m2(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vf_f32m2(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vf_f32m2(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m4( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwmacc_vf_f32m2(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vv_f32m4(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m4( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwmacc_vv_f32m4(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vf_f32m4(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vf_f32m4(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m8( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwmacc_vf_f32m4(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vv_f32m8(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m8( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwmacc_vv_f32m8(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vf_f32m8(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vf_f32m8(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m1( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwmacc_vf_f32m8(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vv_f64m1(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m1( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwmacc_vv_f64m1(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vf_f64m1(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vf_f64m1(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwmacc_vf_f64m1(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vv_f64m2(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m2( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwmacc_vv_f64m2(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vf_f64m2(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vf_f64m2(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m4( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwmacc_vf_f64m2(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vv_f64m4(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m4( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwmacc_vv_f64m4(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vf_f64m4(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vf_f64m4(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m8( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwmacc_vf_f64m4(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vv_f64m8(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m8( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwmacc_vv_f64m8(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vf_f64m8(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vf_f64m8(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32mf2_m( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwmacc_vf_f64m8(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32mf2_m( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwmacc_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vf_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m1_m( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwmacc_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m1_m( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwmacc_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vf_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m2_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwmacc_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwmacc_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vf_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwmacc_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m4_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwmacc_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vf_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m8_m( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwmacc_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, _Float16 vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m8_m( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwmacc_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vf_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m1_m( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwmacc_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, _Float16 vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m1_m( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vf_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m2_m( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, float vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m2_m( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwmacc_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vf_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m4_m( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwmacc_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, float vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m4_m( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwmacc_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vf_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m8_m( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwmacc_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, float vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m8_m( @@ -328,6 +328,6 @@ vfloat64m8_t test_vfwmacc_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vf_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m8_m(mask, vd, vs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmsac.c index 111cea2277802be2f87b8418de9200e66bcae97c..2d9817bb45f78936b62fd8672ac749840f9e3a22 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vv_f32mf2(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32mf2( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwmsac_vv_f32mf2(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vf_f32mf2(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vf_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m1( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwmsac_vf_f32mf2(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vv_f32m1(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m1( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwmsac_vv_f32m1(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vf_f32m1(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vf_f32m1(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m2( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwmsac_vf_f32m1(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vv_f32m2(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m2( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwmsac_vv_f32m2(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vf_f32m2(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vf_f32m2(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m4( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwmsac_vf_f32m2(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vv_f32m4(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m4( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwmsac_vv_f32m4(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vf_f32m4(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vf_f32m4(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m8( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwmsac_vf_f32m4(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vv_f32m8(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m8( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwmsac_vv_f32m8(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vf_f32m8(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vf_f32m8(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m1( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwmsac_vf_f32m8(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vv_f64m1(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m1( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwmsac_vv_f64m1(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vf_f64m1(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vf_f64m1(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwmsac_vf_f64m1(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vv_f64m2(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m2( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwmsac_vv_f64m2(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vf_f64m2(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vf_f64m2(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m4( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwmsac_vf_f64m2(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vv_f64m4(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m4( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwmsac_vv_f64m4(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vf_f64m4(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vf_f64m4(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m8( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwmsac_vf_f64m4(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vv_f64m8(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m8( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwmsac_vv_f64m8(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vf_f64m8(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vf_f64m8(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32mf2_m( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwmsac_vf_f64m8(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32mf2_m( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwmsac_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vf_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m1_m( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwmsac_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m1_m( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwmsac_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vf_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m2_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwmsac_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwmsac_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vf_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwmsac_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m4_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwmsac_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vf_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m8_m( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwmsac_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, _Float16 vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m8_m( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwmsac_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vf_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m1_m( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwmsac_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, _Float16 vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m1_m( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vf_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m2_m( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, float vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m2_m( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwmsac_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vf_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m4_m( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwmsac_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, float vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m4_m( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwmsac_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vf_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m8_m( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwmsac_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, float vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m8_m( @@ -328,6 +328,6 @@ vfloat64m8_t test_vfwmsac_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vf_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m8_m(mask, vd, vs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmul.c index a66640c1cf3d45e9642477c007f09bea22c697ac..c5050a08b5a805f15ab7c66310bfc02922d28607 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmul.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vv_f32mf2(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwmul_vv_f32mf2(op1, op2, vl); + return __riscv_vfwmul_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32mf2( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwmul_vv_f32mf2(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vf_f32mf2(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32mf2(op1, op2, vl); + return __riscv_vfwmul_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m1( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwmul_vf_f32mf2(vfloat16mf4_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vv_f32m1(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwmul_vv_f32m1(op1, op2, vl); + return __riscv_vfwmul_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m1( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwmul_vv_f32m1(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vf_f32m1(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m1(op1, op2, vl); + return __riscv_vfwmul_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m2( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwmul_vf_f32m1(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vv_f32m2(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwmul_vv_f32m2(op1, op2, vl); + return __riscv_vfwmul_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m2( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwmul_vv_f32m2(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vf_f32m2(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m2(op1, op2, vl); + return __riscv_vfwmul_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m4( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwmul_vf_f32m2(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vv_f32m4(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwmul_vv_f32m4(op1, op2, vl); + return __riscv_vfwmul_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m4( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwmul_vv_f32m4(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vf_f32m4(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m4(op1, op2, vl); + return __riscv_vfwmul_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m8( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwmul_vf_f32m4(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vv_f32m8(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwmul_vv_f32m8(op1, op2, vl); + return __riscv_vfwmul_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m8( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwmul_vv_f32m8(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vf_f32m8(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m8(op1, op2, vl); + return __riscv_vfwmul_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m1( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwmul_vf_f32m8(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vv_f64m1(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwmul_vv_f64m1(op1, op2, vl); + return __riscv_vfwmul_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m1( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwmul_vv_f64m1(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vf_f64m1(vfloat32mf2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m1(op1, op2, vl); + return __riscv_vfwmul_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwmul_vf_f64m1(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vv_f64m2(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwmul_vv_f64m2(op1, op2, vl); + return __riscv_vfwmul_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m2( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwmul_vv_f64m2(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vf_f64m2(vfloat32m1_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m2(op1, op2, vl); + return __riscv_vfwmul_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m4( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwmul_vf_f64m2(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vv_f64m4(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwmul_vv_f64m4(op1, op2, vl); + return __riscv_vfwmul_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m4( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwmul_vv_f64m4(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vf_f64m4(vfloat32m2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m4(op1, op2, vl); + return __riscv_vfwmul_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m8( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwmul_vf_f64m4(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vv_f64m8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwmul_vv_f64m8(op1, op2, vl); + return __riscv_vfwmul_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m8( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwmul_vv_f64m8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vf_f64m8(vfloat32m4_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m8(op1, op2, vl); + return __riscv_vfwmul_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32mf2_m( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwmul_vf_f64m8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vv_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwmul_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32mf2_m( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwmul_vv_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vf_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m1_m( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwmul_vf_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vv_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwmul_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m1_m( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwmul_vv_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vf_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m2_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwmul_vf_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vv_f32m2_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwmul_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwmul_vv_f32m2_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vf_f32m2_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwmul_vf_f32m2_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vv_f32m4_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwmul_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m4_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwmul_vv_f32m4_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vf_f32m4_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m8_m( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwmul_vf_f32m4_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vv_f32m8_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwmul_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m8_m( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwmul_vv_f32m8_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vf_f32m8_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m1_m( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwmul_vf_f32m8_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vv_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwmul_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m1_m( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwmul_vv_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vf_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m2_m( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwmul_vf_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, float op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vv_f64m2_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwmul_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m2_m( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwmul_vv_f64m2_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vf_f64m2_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m4_m( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwmul_vf_f64m2_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vv_f64m4_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwmul_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m4_m( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwmul_vv_f64m4_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vf_f64m4_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m8_m( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwmul_vf_f64m4_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vv_f64m8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwmul_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwmul_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m8_m( @@ -328,6 +328,6 @@ vfloat64m8_t test_vfwmul_vv_f64m8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vf_f64m8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwmul_vf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmacc.c index 0b1e01e62d980e5824edefaa49d44e6beb4e2673..495a431a7554e881279bab58d803fee5c6900cef 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vv_f32mf2(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32mf2( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwnmacc_vv_f32mf2(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vf_f32mf2(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vf_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m1( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwnmacc_vf_f32mf2(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vv_f32m1(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m1( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwnmacc_vv_f32m1(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vf_f32m1(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m1(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m2( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwnmacc_vf_f32m1(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vv_f32m2(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m2( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwnmacc_vv_f32m2(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vf_f32m2(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vf_f32m2(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m4( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwnmacc_vf_f32m2(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vv_f32m4(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m4( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwnmacc_vv_f32m4(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vf_f32m4(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m4(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m8( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwnmacc_vf_f32m4(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vv_f32m8(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m8( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwnmacc_vv_f32m8(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vf_f32m8(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vf_f32m8(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m1( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwnmacc_vf_f32m8(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vv_f64m1(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m1( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwnmacc_vv_f64m1(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vf_f64m1(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m1(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwnmacc_vf_f64m1(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vv_f64m2(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m2( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwnmacc_vv_f64m2(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vf_f64m2(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vf_f64m2(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m4( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwnmacc_vf_f64m2(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vv_f64m4(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m4( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwnmacc_vv_f64m4(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vf_f64m4(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m4(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m8( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwnmacc_vf_f64m4(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vv_f64m8(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m8( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwnmacc_vv_f64m8(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vf_f64m8(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vf_f64m8(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32mf2_m( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwnmacc_vf_f64m8(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32mf2_m( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwnmacc_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vf_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m1_m( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwnmacc_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m1_m( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwnmacc_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m2_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwnmacc_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwnmacc_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vf_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwnmacc_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m4_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwnmacc_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m8_m( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwnmacc_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m8_m( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwnmacc_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vf_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m1_m( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwnmacc_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m1_m( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwnmacc_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m2_m( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwnmacc_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m2_m( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwnmacc_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vf_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m4_m( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwnmacc_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m4_m( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwnmacc_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m8_m( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwnmacc_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m8_m( @@ -328,6 +328,6 @@ vfloat64m8_t test_vfwnmacc_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vf_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m8_m(mask, vd, vs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmsac.c index 2415d9c189c45f5ba5951c2f9a981ab3dd5393a9..131d9fe136710d7ff74dca64866fe1657b059536 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwnmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vv_f32mf2(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vv_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32mf2( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwnmsac_vv_f32mf2(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vf_f32mf2(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vf_f32mf2(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m1( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwnmsac_vf_f32mf2(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vv_f32m1(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m1(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m1( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwnmsac_vv_f32m1(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vf_f32m1(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m1(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m2( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwnmsac_vf_f32m1(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vv_f32m2(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vv_f32m2(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m2( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwnmsac_vv_f32m2(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vf_f32m2(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vf_f32m2(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m4( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwnmsac_vf_f32m2(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vv_f32m4(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m4(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m4( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwnmsac_vv_f32m4(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vf_f32m4(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m4(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m8( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwnmsac_vf_f32m4(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vv_f32m8(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vv_f32m8(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m8( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwnmsac_vv_f32m8(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vf_f32m8(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vf_f32m8(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m1( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwnmsac_vf_f32m8(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vv_f64m1(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m1(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m1( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwnmsac_vv_f64m1(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vf_f64m1(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m1(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwnmsac_vf_f64m1(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vv_f64m2(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vv_f64m2(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m2( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwnmsac_vv_f64m2(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vf_f64m2(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vf_f64m2(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m4( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwnmsac_vf_f64m2(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vv_f64m4(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m4(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m4( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwnmsac_vv_f64m4(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vf_f64m4(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m4(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m8( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwnmsac_vf_f64m4(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vv_f64m8(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vv_f64m8(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m8( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwnmsac_vv_f64m8(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vf_f64m8(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vf_f64m8(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32mf2_m( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwnmsac_vf_f64m8(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vv_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32mf2_m( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwnmsac_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vf_f32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m1_m( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwnmsac_vf_f32mf2_m(vbool64_t mask, vfloat32mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m1_m( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwnmsac_vv_f32m1_m(vbool32_t mask, vfloat32m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m2_m( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwnmsac_vf_f32m1_m(vbool32_t mask, vfloat32m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vv_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwnmsac_vv_f32m2_m(vbool16_t mask, vfloat32m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vf_f32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m4_m( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwnmsac_vf_f32m2_m(vbool16_t mask, vfloat32m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m4_m( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwnmsac_vv_f32m4_m(vbool8_t mask, vfloat32m4_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m8_m( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwnmsac_vf_f32m4_m(vbool8_t mask, vfloat32m4_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vv_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m8_m( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwnmsac_vv_f32m8_m(vbool4_t mask, vfloat32m8_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vf_f32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m1_m( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwnmsac_vf_f32m8_m(vbool4_t mask, vfloat32m8_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m1_m( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwnmsac_vv_f64m1_m(vbool64_t mask, vfloat64m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m2_m( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwnmsac_vf_f64m1_m(vbool64_t mask, vfloat64m1_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vv_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m2_m( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwnmsac_vv_f64m2_m(vbool32_t mask, vfloat64m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vf_f64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m4_m( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwnmsac_vf_f64m2_m(vbool32_t mask, vfloat64m2_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m4_m( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwnmsac_vv_f64m4_m(vbool16_t mask, vfloat64m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m8_m( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwnmsac_vf_f64m4_m(vbool16_t mask, vfloat64m4_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vv_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m8_m( @@ -328,6 +328,6 @@ vfloat64m8_t test_vfwnmsac_vv_f64m8_m(vbool8_t mask, vfloat64m8_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vf_f64m8_m(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vf_f64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m8_m(mask, vd, vs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredosum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredosum.c index 12b07480a48a5a893b2142d74257ab462d46cd9f..096f2bfba47a010ba2a37ac21461545150bee30e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredosum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredosum.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16mf4_f32m1(vfloat16mf4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16mf4_f32m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f16mf4_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16mf2_f32m1( @@ -22,7 +22,7 @@ vfloat32m1_t test_vfwredosum_vs_f16mf4_f32m1(vfloat16mf4_t vector, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16mf2_f32m1(vfloat16mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16mf2_f32m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f16mf2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m1_f32m1( @@ -31,7 +31,7 @@ vfloat32m1_t test_vfwredosum_vs_f16mf2_f32m1(vfloat16mf2_t vector, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m1_f32m1(vfloat16m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m1_f32m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m1_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m2_f32m1( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m1_f32m1(vfloat16m1_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m2_f32m1(vfloat16m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m2_f32m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m4_f32m1( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m2_f32m1(vfloat16m2_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m4_f32m1(vfloat16m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m4_f32m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m4_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m8_f32m1( @@ -58,7 +58,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m4_f32m1(vfloat16m4_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m8_f32m1(vfloat16m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m8_f32m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m8_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32mf2_f64m1( @@ -67,7 +67,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m8_f32m1(vfloat16m8_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32mf2_f64m1(vfloat32mf2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32mf2_f64m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f32mf2_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m1_f64m1( @@ -76,7 +76,7 @@ vfloat64m1_t test_vfwredosum_vs_f32mf2_f64m1(vfloat32mf2_t vector, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m1_f64m1(vfloat32m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m1_f64m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m1_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m2_f64m1( @@ -85,7 +85,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m1_f64m1(vfloat32m1_t vector, vfloat64m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m2_f64m1(vfloat32m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m2_f64m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m2_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m4_f64m1( @@ -94,7 +94,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m2_f64m1(vfloat32m2_t vector, vfloat64m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m4_f64m1(vfloat32m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m4_f64m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m4_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m8_f64m1( @@ -103,7 +103,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m4_f64m1(vfloat32m4_t vector, vfloat64m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m8_f64m1(vfloat32m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m8_f64m1(vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m8_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16mf4_f32m1_m( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m8_f64m1(vfloat32m8_t vector, vfloat64m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16mf4_f32m1_m(vbool64_t mask, vfloat16mf4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16mf4_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16mf4_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16mf2_f32m1_m( @@ -121,7 +121,7 @@ vfloat32m1_t test_vfwredosum_vs_f16mf4_f32m1_m(vbool64_t mask, vfloat16mf4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16mf2_f32m1_m(vbool32_t mask, vfloat16mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16mf2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16mf2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m1_f32m1_m( @@ -130,7 +130,7 @@ vfloat32m1_t test_vfwredosum_vs_f16mf2_f32m1_m(vbool32_t mask, vfloat16mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m1_f32m1_m(vbool16_t mask, vfloat16m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m1_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m1_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m2_f32m1_m( @@ -139,7 +139,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m1_f32m1_m(vbool16_t mask, vfloat16m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m2_f32m1_m(vbool8_t mask, vfloat16m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m4_f32m1_m( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m2_f32m1_m(vbool8_t mask, vfloat16m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m4_f32m1_m(vbool4_t mask, vfloat16m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m4_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m4_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m8_f32m1_m( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m4_f32m1_m(vbool4_t mask, vfloat16m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m8_f32m1_m(vbool2_t mask, vfloat16m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m8_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m8_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32mf2_f64m1_m( @@ -166,7 +166,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m8_f32m1_m(vbool2_t mask, vfloat16m8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32mf2_f64m1_m(vbool64_t mask, vfloat32mf2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32mf2_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32mf2_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m1_f64m1_m( @@ -175,7 +175,7 @@ vfloat64m1_t test_vfwredosum_vs_f32mf2_f64m1_m(vbool64_t mask, vfloat32mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m1_f64m1_m(vbool32_t mask, vfloat32m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m1_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m1_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m2_f64m1_m( @@ -184,7 +184,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m1_f64m1_m(vbool32_t mask, vfloat32m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m2_f64m1_m(vbool16_t mask, vfloat32m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m2_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m2_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m4_f64m1_m( @@ -193,7 +193,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m2_f64m1_m(vbool16_t mask, vfloat32m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m4_f64m1_m(vbool8_t mask, vfloat32m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m4_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m4_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m8_f64m1_m( @@ -202,6 +202,6 @@ vfloat64m1_t test_vfwredosum_vs_f32m4_f64m1_m(vbool8_t mask, vfloat32m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m8_f64m1_m(vbool4_t mask, vfloat32m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m8_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m8_f64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredusum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredusum.c index a5a02db975c0bd9593791e710c223c03d08df33c..f48660dcbf51e553ce690af09d997ad6a9b198e2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredusum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwredusum.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16mf4_f32m1(vfloat16mf4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16mf4_f32m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f16mf4_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16mf2_f32m1( @@ -22,7 +22,7 @@ vfloat32m1_t test_vfwredusum_vs_f16mf4_f32m1(vfloat16mf4_t vector, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16mf2_f32m1(vfloat16mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16mf2_f32m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f16mf2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m1_f32m1( @@ -31,7 +31,7 @@ vfloat32m1_t test_vfwredusum_vs_f16mf2_f32m1(vfloat16mf2_t vector, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m1_f32m1(vfloat16m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m1_f32m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m1_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m2_f32m1( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m1_f32m1(vfloat16m1_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m2_f32m1(vfloat16m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m2_f32m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m2_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m4_f32m1( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m2_f32m1(vfloat16m2_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m4_f32m1(vfloat16m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m4_f32m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m4_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m8_f32m1( @@ -58,7 +58,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m4_f32m1(vfloat16m4_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m8_f32m1(vfloat16m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m8_f32m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m8_f32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32mf2_f64m1( @@ -67,7 +67,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m8_f32m1(vfloat16m8_t vector, vfloat32m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32mf2_f64m1(vfloat32mf2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32mf2_f64m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f32mf2_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m1_f64m1( @@ -76,7 +76,7 @@ vfloat64m1_t test_vfwredusum_vs_f32mf2_f64m1(vfloat32mf2_t vector, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m1_f64m1(vfloat32m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m1_f64m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m1_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m2_f64m1( @@ -85,7 +85,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m1_f64m1(vfloat32m1_t vector, vfloat64m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m2_f64m1(vfloat32m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m2_f64m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m2_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m4_f64m1( @@ -94,7 +94,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m2_f64m1(vfloat32m2_t vector, vfloat64m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m4_f64m1(vfloat32m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m4_f64m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m4_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m8_f64m1( @@ -103,7 +103,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m4_f64m1(vfloat32m4_t vector, vfloat64m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m8_f64m1(vfloat32m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m8_f64m1(vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m8_f64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16mf4_f32m1_m( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m8_f64m1(vfloat32m8_t vector, vfloat64m1_t sc // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16mf4_f32m1_m(vbool64_t mask, vfloat16mf4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16mf4_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16mf4_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16mf2_f32m1_m( @@ -121,7 +121,7 @@ vfloat32m1_t test_vfwredusum_vs_f16mf4_f32m1_m(vbool64_t mask, vfloat16mf4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16mf2_f32m1_m(vbool32_t mask, vfloat16mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16mf2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16mf2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m1_f32m1_m( @@ -130,7 +130,7 @@ vfloat32m1_t test_vfwredusum_vs_f16mf2_f32m1_m(vbool32_t mask, vfloat16mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m1_f32m1_m(vbool16_t mask, vfloat16m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m1_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m1_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m2_f32m1_m( @@ -139,7 +139,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m1_f32m1_m(vbool16_t mask, vfloat16m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m2_f32m1_m(vbool8_t mask, vfloat16m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m2_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m2_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m4_f32m1_m( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m2_f32m1_m(vbool8_t mask, vfloat16m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m4_f32m1_m(vbool4_t mask, vfloat16m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m4_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m4_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m8_f32m1_m( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m4_f32m1_m(vbool4_t mask, vfloat16m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m8_f32m1_m(vbool2_t mask, vfloat16m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m8_f32m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m8_f32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32mf2_f64m1_m( @@ -166,7 +166,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m8_f32m1_m(vbool2_t mask, vfloat16m8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32mf2_f64m1_m(vbool64_t mask, vfloat32mf2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32mf2_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32mf2_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m1_f64m1_m( @@ -175,7 +175,7 @@ vfloat64m1_t test_vfwredusum_vs_f32mf2_f64m1_m(vbool64_t mask, vfloat32mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m1_f64m1_m(vbool32_t mask, vfloat32m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m1_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m1_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m2_f64m1_m( @@ -184,7 +184,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m1_f64m1_m(vbool32_t mask, vfloat32m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m2_f64m1_m(vbool16_t mask, vfloat32m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m2_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m2_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m4_f64m1_m( @@ -193,7 +193,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m2_f64m1_m(vbool16_t mask, vfloat32m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m4_f64m1_m(vbool8_t mask, vfloat32m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m4_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m4_f64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m8_f64m1_m( @@ -202,6 +202,6 @@ vfloat64m1_t test_vfwredusum_vs_f32m4_f64m1_m(vbool8_t mask, vfloat32m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m8_f64m1_m(vbool4_t mask, vfloat32m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m8_f64m1_m(mask, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m8_f64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwsub.c index 48f1193a943bf609493fc3b361dd6368d39094f5..d0cb0199465ed54427e64ecd8b1b3a18a92262ed 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vv_f32mf2(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_vv_f32mf2(op1, op2, vl); + return __riscv_vfwsub_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32mf2( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwsub_vv_f32mf2(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vf_f32mf2(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32mf2(op1, op2, vl); + return __riscv_vfwsub_vf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32mf2( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwsub_vf_f32mf2(vfloat16mf4_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wv_f32mf2(vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_wv_f32mf2(op1, op2, vl); + return __riscv_vfwsub_wv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32mf2( @@ -40,7 +40,7 @@ vfloat32mf2_t test_vfwsub_wv_f32mf2(vfloat32mf2_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wf_f32mf2(vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32mf2(op1, op2, vl); + return __riscv_vfwsub_wf_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m1( @@ -49,7 +49,7 @@ vfloat32mf2_t test_vfwsub_wf_f32mf2(vfloat32mf2_t op1, _Float16 op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vv_f32m1(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_vv_f32m1(op1, op2, vl); + return __riscv_vfwsub_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m1( @@ -58,7 +58,7 @@ vfloat32m1_t test_vfwsub_vv_f32m1(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vf_f32m1(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m1(op1, op2, vl); + return __riscv_vfwsub_vf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m1( @@ -67,7 +67,7 @@ vfloat32m1_t test_vfwsub_vf_f32m1(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wv_f32m1(vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_wv_f32m1(op1, op2, vl); + return __riscv_vfwsub_wv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m1( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfwsub_wv_f32m1(vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wf_f32m1(vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m1(op1, op2, vl); + return __riscv_vfwsub_wf_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfwsub_wf_f32m1(vfloat32m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vv_f32m2(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_vv_f32m2(op1, op2, vl); + return __riscv_vfwsub_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m2( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfwsub_vv_f32m2(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vf_f32m2(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m2(op1, op2, vl); + return __riscv_vfwsub_vf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m2( @@ -103,7 +103,7 @@ vfloat32m2_t test_vfwsub_vf_f32m2(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wv_f32m2(vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_wv_f32m2(op1, op2, vl); + return __riscv_vfwsub_wv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m2( @@ -112,7 +112,7 @@ vfloat32m2_t test_vfwsub_wv_f32m2(vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wf_f32m2(vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m2(op1, op2, vl); + return __riscv_vfwsub_wf_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m4( @@ -121,7 +121,7 @@ vfloat32m2_t test_vfwsub_wf_f32m2(vfloat32m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vv_f32m4(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_vv_f32m4(op1, op2, vl); + return __riscv_vfwsub_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m4( @@ -130,7 +130,7 @@ vfloat32m4_t test_vfwsub_vv_f32m4(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vf_f32m4(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m4(op1, op2, vl); + return __riscv_vfwsub_vf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m4( @@ -139,7 +139,7 @@ vfloat32m4_t test_vfwsub_vf_f32m4(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wv_f32m4(vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_wv_f32m4(op1, op2, vl); + return __riscv_vfwsub_wv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m4( @@ -148,7 +148,7 @@ vfloat32m4_t test_vfwsub_wv_f32m4(vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wf_f32m4(vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m4(op1, op2, vl); + return __riscv_vfwsub_wf_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m8( @@ -157,7 +157,7 @@ vfloat32m4_t test_vfwsub_wf_f32m4(vfloat32m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vv_f32m8(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_vv_f32m8(op1, op2, vl); + return __riscv_vfwsub_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m8( @@ -166,7 +166,7 @@ vfloat32m8_t test_vfwsub_vv_f32m8(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vf_f32m8(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m8(op1, op2, vl); + return __riscv_vfwsub_vf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m8( @@ -175,7 +175,7 @@ vfloat32m8_t test_vfwsub_vf_f32m8(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wv_f32m8(vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_wv_f32m8(op1, op2, vl); + return __riscv_vfwsub_wv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m8( @@ -184,7 +184,7 @@ vfloat32m8_t test_vfwsub_wv_f32m8(vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wf_f32m8(vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m8(op1, op2, vl); + return __riscv_vfwsub_wf_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m1( @@ -193,7 +193,7 @@ vfloat32m8_t test_vfwsub_wf_f32m8(vfloat32m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vv_f64m1(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_vv_f64m1(op1, op2, vl); + return __riscv_vfwsub_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m1( @@ -202,7 +202,7 @@ vfloat64m1_t test_vfwsub_vv_f64m1(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vf_f64m1(vfloat32mf2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m1(op1, op2, vl); + return __riscv_vfwsub_vf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m1( @@ -211,7 +211,7 @@ vfloat64m1_t test_vfwsub_vf_f64m1(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wv_f64m1(vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_wv_f64m1(op1, op2, vl); + return __riscv_vfwsub_wv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfwsub_wv_f64m1(vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wf_f64m1(vfloat64m1_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m1(op1, op2, vl); + return __riscv_vfwsub_wf_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfwsub_wf_f64m1(vfloat64m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vv_f64m2(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_vv_f64m2(op1, op2, vl); + return __riscv_vfwsub_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfwsub_vv_f64m2(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vf_f64m2(vfloat32m1_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m2(op1, op2, vl); + return __riscv_vfwsub_vf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m2( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfwsub_vf_f64m2(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wv_f64m2(vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_wv_f64m2(op1, op2, vl); + return __riscv_vfwsub_wv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m2( @@ -256,7 +256,7 @@ vfloat64m2_t test_vfwsub_wv_f64m2(vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wf_f64m2(vfloat64m2_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m2(op1, op2, vl); + return __riscv_vfwsub_wf_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m4( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfwsub_wf_f64m2(vfloat64m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vv_f64m4(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_vv_f64m4(op1, op2, vl); + return __riscv_vfwsub_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m4( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfwsub_vv_f64m4(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vf_f64m4(vfloat32m2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m4(op1, op2, vl); + return __riscv_vfwsub_vf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m4( @@ -283,7 +283,7 @@ vfloat64m4_t test_vfwsub_vf_f64m4(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wv_f64m4(vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_wv_f64m4(op1, op2, vl); + return __riscv_vfwsub_wv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m4( @@ -292,7 +292,7 @@ vfloat64m4_t test_vfwsub_wv_f64m4(vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wf_f64m4(vfloat64m4_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m4(op1, op2, vl); + return __riscv_vfwsub_wf_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m8( @@ -301,7 +301,7 @@ vfloat64m4_t test_vfwsub_wf_f64m4(vfloat64m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vv_f64m8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_vv_f64m8(op1, op2, vl); + return __riscv_vfwsub_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m8( @@ -310,7 +310,7 @@ vfloat64m8_t test_vfwsub_vv_f64m8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vf_f64m8(vfloat32m4_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m8(op1, op2, vl); + return __riscv_vfwsub_vf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m8( @@ -319,7 +319,7 @@ vfloat64m8_t test_vfwsub_vf_f64m8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wv_f64m8(vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_wv_f64m8(op1, op2, vl); + return __riscv_vfwsub_wv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m8( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwsub_wv_f64m8(vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wf_f64m8(vfloat64m8_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m8(op1, op2, vl); + return __riscv_vfwsub_wf_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32mf2_m( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwsub_wf_f64m8(vfloat64m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vv_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32mf2_m( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwsub_vv_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vf_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32mf2_m( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwsub_vf_f32mf2_m(vbool64_t mask, vfloat16mf4_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_wv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32mf2_m( @@ -364,7 +364,7 @@ vfloat32mf2_t test_vfwsub_wv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32mf2_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m1_m( @@ -373,7 +373,7 @@ vfloat32mf2_t test_vfwsub_wf_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vv_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m1_m( @@ -382,7 +382,7 @@ vfloat32m1_t test_vfwsub_vv_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vf_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m1_m( @@ -391,7 +391,7 @@ vfloat32m1_t test_vfwsub_vf_f32m1_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_wv_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m1_m( @@ -400,7 +400,7 @@ vfloat32m1_t test_vfwsub_wv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m1_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m2_m( @@ -409,7 +409,7 @@ vfloat32m1_t test_vfwsub_wf_f32m1_m(vbool32_t mask, vfloat32m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vv_f32m2_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m2_m( @@ -418,7 +418,7 @@ vfloat32m2_t test_vfwsub_vv_f32m2_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vf_f32m2_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m2_m( @@ -427,7 +427,7 @@ vfloat32m2_t test_vfwsub_vf_f32m2_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_wv_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m2_m( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfwsub_wv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m2_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m4_m( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfwsub_wf_f32m2_m(vbool16_t mask, vfloat32m2_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vv_f32m4_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m4_m( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfwsub_vv_f32m4_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vf_f32m4_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m4_m( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfwsub_vf_f32m4_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_wv_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m4_m( @@ -472,7 +472,7 @@ vfloat32m4_t test_vfwsub_wv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m4_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m8_m( @@ -481,7 +481,7 @@ vfloat32m4_t test_vfwsub_wf_f32m4_m(vbool8_t mask, vfloat32m4_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vv_f32m8_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m8_m( @@ -490,7 +490,7 @@ vfloat32m8_t test_vfwsub_vv_f32m8_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vf_f32m8_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m8_m( @@ -499,7 +499,7 @@ vfloat32m8_t test_vfwsub_vf_f32m8_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_wv_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m8_m( @@ -508,7 +508,7 @@ vfloat32m8_t test_vfwsub_wv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m8_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m1_m( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfwsub_wf_f32m8_m(vbool4_t mask, vfloat32m8_t op1, _Float16 op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vv_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m1_m( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfwsub_vv_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vf_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m1_m( @@ -535,7 +535,7 @@ vfloat64m1_t test_vfwsub_vf_f64m1_m(vbool64_t mask, vfloat32mf2_t op1, float op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_wv_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m1_m( @@ -544,7 +544,7 @@ vfloat64m1_t test_vfwsub_wv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m1_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m2_m( @@ -553,7 +553,7 @@ vfloat64m1_t test_vfwsub_wf_f64m1_m(vbool64_t mask, vfloat64m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vv_f64m2_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m2_m( @@ -562,7 +562,7 @@ vfloat64m2_t test_vfwsub_vv_f64m2_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vf_f64m2_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m2_m( @@ -571,7 +571,7 @@ vfloat64m2_t test_vfwsub_vf_f64m2_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_wv_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m2_m( @@ -580,7 +580,7 @@ vfloat64m2_t test_vfwsub_wv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m2_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m4_m( @@ -589,7 +589,7 @@ vfloat64m2_t test_vfwsub_wf_f64m2_m(vbool32_t mask, vfloat64m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vv_f64m4_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m4_m( @@ -598,7 +598,7 @@ vfloat64m4_t test_vfwsub_vv_f64m4_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vf_f64m4_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m4_m( @@ -607,7 +607,7 @@ vfloat64m4_t test_vfwsub_vf_f64m4_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_wv_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m4_m( @@ -616,7 +616,7 @@ vfloat64m4_t test_vfwsub_wv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m4_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m8_m( @@ -625,7 +625,7 @@ vfloat64m4_t test_vfwsub_wf_f64m4_m(vbool16_t mask, vfloat64m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vv_f64m8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwsub_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m8_m( @@ -634,7 +634,7 @@ vfloat64m8_t test_vfwsub_vv_f64m8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vf_f64m8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwsub_vf_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m8_m( @@ -643,7 +643,7 @@ vfloat64m8_t test_vfwsub_vf_f64m8_m(vbool8_t mask, vfloat32m4_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_wv_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwsub_wv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m8_m( @@ -652,6 +652,6 @@ vfloat64m8_t test_vfwsub_wv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wf_f64m8_m(vbool8_t mask, vfloat64m8_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m8_m(mask, op1, op2, vl); + return __riscv_vfwsub_wf_f64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget.c index 88ad24bcbeb6368e1ae23e99616974aafc25796c..8d5b08e76eaa39e0c6bc97870980f34ea94a3b65 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vget.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vget_v_f16m2_f16m1(vfloat16m2_t src, size_t index) { - return vget_v_f16m2_f16m1(src, 0); + return __riscv_vget_v_f16m2_f16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f16m4_f16m1( @@ -22,7 +22,7 @@ vfloat16m1_t test_vget_v_f16m2_f16m1(vfloat16m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vget_v_f16m4_f16m1(vfloat16m4_t src, size_t index) { - return vget_v_f16m4_f16m1(src, 0); + return __riscv_vget_v_f16m4_f16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f16m8_f16m1( @@ -31,7 +31,7 @@ vfloat16m1_t test_vget_v_f16m4_f16m1(vfloat16m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vget_v_f16m8_f16m1(vfloat16m8_t src, size_t index) { - return vget_v_f16m8_f16m1(src, 0); + return __riscv_vget_v_f16m8_f16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f16m4_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vget_v_f16m8_f16m1(vfloat16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vget_v_f16m4_f16m2(vfloat16m4_t src, size_t index) { - return vget_v_f16m4_f16m2(src, 0); + return __riscv_vget_v_f16m4_f16m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f16m8_f16m2( @@ -49,7 +49,7 @@ vfloat16m2_t test_vget_v_f16m4_f16m2(vfloat16m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vget_v_f16m8_f16m2(vfloat16m8_t src, size_t index) { - return vget_v_f16m8_f16m2(src, 0); + return __riscv_vget_v_f16m8_f16m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f16m8_f16m4( @@ -58,7 +58,7 @@ vfloat16m2_t test_vget_v_f16m8_f16m2(vfloat16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vget_v_f16m8_f16m4(vfloat16m8_t src, size_t index) { - return vget_v_f16m8_f16m4(src, 0); + return __riscv_vget_v_f16m8_f16m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f32m2_f32m1( @@ -67,7 +67,7 @@ vfloat16m4_t test_vget_v_f16m8_f16m4(vfloat16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vget_v_f32m2_f32m1(vfloat32m2_t src, size_t index) { - return vget_v_f32m2_f32m1(src, 0); + return __riscv_vget_v_f32m2_f32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f32m4_f32m1( @@ -76,7 +76,7 @@ vfloat32m1_t test_vget_v_f32m2_f32m1(vfloat32m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vget_v_f32m4_f32m1(vfloat32m4_t src, size_t index) { - return vget_v_f32m4_f32m1(src, 0); + return __riscv_vget_v_f32m4_f32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f32m8_f32m1( @@ -85,7 +85,7 @@ vfloat32m1_t test_vget_v_f32m4_f32m1(vfloat32m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vget_v_f32m8_f32m1(vfloat32m8_t src, size_t index) { - return vget_v_f32m8_f32m1(src, 0); + return __riscv_vget_v_f32m8_f32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f32m4_f32m2( @@ -94,7 +94,7 @@ vfloat32m1_t test_vget_v_f32m8_f32m1(vfloat32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vget_v_f32m4_f32m2(vfloat32m4_t src, size_t index) { - return vget_v_f32m4_f32m2(src, 0); + return __riscv_vget_v_f32m4_f32m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f32m8_f32m2( @@ -103,7 +103,7 @@ vfloat32m2_t test_vget_v_f32m4_f32m2(vfloat32m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vget_v_f32m8_f32m2(vfloat32m8_t src, size_t index) { - return vget_v_f32m8_f32m2(src, 0); + return __riscv_vget_v_f32m8_f32m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f32m8_f32m4( @@ -112,7 +112,7 @@ vfloat32m2_t test_vget_v_f32m8_f32m2(vfloat32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vget_v_f32m8_f32m4(vfloat32m8_t src, size_t index) { - return vget_v_f32m8_f32m4(src, 0); + return __riscv_vget_v_f32m8_f32m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f64m2_f64m1( @@ -121,7 +121,7 @@ vfloat32m4_t test_vget_v_f32m8_f32m4(vfloat32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vget_v_f64m2_f64m1(vfloat64m2_t src, size_t index) { - return vget_v_f64m2_f64m1(src, 0); + return __riscv_vget_v_f64m2_f64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f64m4_f64m1( @@ -130,7 +130,7 @@ vfloat64m1_t test_vget_v_f64m2_f64m1(vfloat64m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vget_v_f64m4_f64m1(vfloat64m4_t src, size_t index) { - return vget_v_f64m4_f64m1(src, 0); + return __riscv_vget_v_f64m4_f64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f64m8_f64m1( @@ -139,7 +139,7 @@ vfloat64m1_t test_vget_v_f64m4_f64m1(vfloat64m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vget_v_f64m8_f64m1(vfloat64m8_t src, size_t index) { - return vget_v_f64m8_f64m1(src, 0); + return __riscv_vget_v_f64m8_f64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f64m4_f64m2( @@ -148,7 +148,7 @@ vfloat64m1_t test_vget_v_f64m8_f64m1(vfloat64m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vget_v_f64m4_f64m2(vfloat64m4_t src, size_t index) { - return vget_v_f64m4_f64m2(src, 0); + return __riscv_vget_v_f64m4_f64m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f64m8_f64m2( @@ -157,7 +157,7 @@ vfloat64m2_t test_vget_v_f64m4_f64m2(vfloat64m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vget_v_f64m8_f64m2(vfloat64m8_t src, size_t index) { - return vget_v_f64m8_f64m2(src, 0); + return __riscv_vget_v_f64m8_f64m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_f64m8_f64m4( @@ -166,7 +166,7 @@ vfloat64m2_t test_vget_v_f64m8_f64m2(vfloat64m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vget_v_f64m8_f64m4(vfloat64m8_t src, size_t index) { - return vget_v_f64m8_f64m4(src, 0); + return __riscv_vget_v_f64m8_f64m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i8m2_i8m1( @@ -175,7 +175,7 @@ vfloat64m4_t test_vget_v_f64m8_f64m4(vfloat64m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vget_v_i8m2_i8m1(vint8m2_t src, size_t index) { - return vget_v_i8m2_i8m1(src, 0); + return __riscv_vget_v_i8m2_i8m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i8m4_i8m1( @@ -184,7 +184,7 @@ vint8m1_t test_vget_v_i8m2_i8m1(vint8m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vget_v_i8m4_i8m1(vint8m4_t src, size_t index) { - return vget_v_i8m4_i8m1(src, 0); + return __riscv_vget_v_i8m4_i8m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i8m8_i8m1( @@ -193,7 +193,7 @@ vint8m1_t test_vget_v_i8m4_i8m1(vint8m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vget_v_i8m8_i8m1(vint8m8_t src, size_t index) { - return vget_v_i8m8_i8m1(src, 0); + return __riscv_vget_v_i8m8_i8m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i8m4_i8m2( @@ -202,7 +202,7 @@ vint8m1_t test_vget_v_i8m8_i8m1(vint8m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vget_v_i8m4_i8m2(vint8m4_t src, size_t index) { - return vget_v_i8m4_i8m2(src, 0); + return __riscv_vget_v_i8m4_i8m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i8m8_i8m2( @@ -211,7 +211,7 @@ vint8m2_t test_vget_v_i8m4_i8m2(vint8m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vget_v_i8m8_i8m2(vint8m8_t src, size_t index) { - return vget_v_i8m8_i8m2(src, 0); + return __riscv_vget_v_i8m8_i8m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i8m8_i8m4( @@ -220,7 +220,7 @@ vint8m2_t test_vget_v_i8m8_i8m2(vint8m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vget_v_i8m8_i8m4(vint8m8_t src, size_t index) { - return vget_v_i8m8_i8m4(src, 0); + return __riscv_vget_v_i8m8_i8m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i16m2_i16m1( @@ -229,7 +229,7 @@ vint8m4_t test_vget_v_i8m8_i8m4(vint8m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vget_v_i16m2_i16m1(vint16m2_t src, size_t index) { - return vget_v_i16m2_i16m1(src, 0); + return __riscv_vget_v_i16m2_i16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i16m4_i16m1( @@ -238,7 +238,7 @@ vint16m1_t test_vget_v_i16m2_i16m1(vint16m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vget_v_i16m4_i16m1(vint16m4_t src, size_t index) { - return vget_v_i16m4_i16m1(src, 0); + return __riscv_vget_v_i16m4_i16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i16m8_i16m1( @@ -247,7 +247,7 @@ vint16m1_t test_vget_v_i16m4_i16m1(vint16m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vget_v_i16m8_i16m1(vint16m8_t src, size_t index) { - return vget_v_i16m8_i16m1(src, 0); + return __riscv_vget_v_i16m8_i16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i16m4_i16m2( @@ -256,7 +256,7 @@ vint16m1_t test_vget_v_i16m8_i16m1(vint16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vget_v_i16m4_i16m2(vint16m4_t src, size_t index) { - return vget_v_i16m4_i16m2(src, 0); + return __riscv_vget_v_i16m4_i16m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i16m8_i16m2( @@ -265,7 +265,7 @@ vint16m2_t test_vget_v_i16m4_i16m2(vint16m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vget_v_i16m8_i16m2(vint16m8_t src, size_t index) { - return vget_v_i16m8_i16m2(src, 0); + return __riscv_vget_v_i16m8_i16m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i16m8_i16m4( @@ -274,7 +274,7 @@ vint16m2_t test_vget_v_i16m8_i16m2(vint16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vget_v_i16m8_i16m4(vint16m8_t src, size_t index) { - return vget_v_i16m8_i16m4(src, 0); + return __riscv_vget_v_i16m8_i16m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i32m2_i32m1( @@ -283,7 +283,7 @@ vint16m4_t test_vget_v_i16m8_i16m4(vint16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vget_v_i32m2_i32m1(vint32m2_t src, size_t index) { - return vget_v_i32m2_i32m1(src, 0); + return __riscv_vget_v_i32m2_i32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i32m4_i32m1( @@ -292,7 +292,7 @@ vint32m1_t test_vget_v_i32m2_i32m1(vint32m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vget_v_i32m4_i32m1(vint32m4_t src, size_t index) { - return vget_v_i32m4_i32m1(src, 0); + return __riscv_vget_v_i32m4_i32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i32m8_i32m1( @@ -301,7 +301,7 @@ vint32m1_t test_vget_v_i32m4_i32m1(vint32m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vget_v_i32m8_i32m1(vint32m8_t src, size_t index) { - return vget_v_i32m8_i32m1(src, 0); + return __riscv_vget_v_i32m8_i32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i32m4_i32m2( @@ -310,7 +310,7 @@ vint32m1_t test_vget_v_i32m8_i32m1(vint32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vget_v_i32m4_i32m2(vint32m4_t src, size_t index) { - return vget_v_i32m4_i32m2(src, 0); + return __riscv_vget_v_i32m4_i32m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i32m8_i32m2( @@ -319,7 +319,7 @@ vint32m2_t test_vget_v_i32m4_i32m2(vint32m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vget_v_i32m8_i32m2(vint32m8_t src, size_t index) { - return vget_v_i32m8_i32m2(src, 0); + return __riscv_vget_v_i32m8_i32m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i32m8_i32m4( @@ -328,7 +328,7 @@ vint32m2_t test_vget_v_i32m8_i32m2(vint32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vget_v_i32m8_i32m4(vint32m8_t src, size_t index) { - return vget_v_i32m8_i32m4(src, 0); + return __riscv_vget_v_i32m8_i32m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i64m2_i64m1( @@ -337,7 +337,7 @@ vint32m4_t test_vget_v_i32m8_i32m4(vint32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vget_v_i64m2_i64m1(vint64m2_t src, size_t index) { - return vget_v_i64m2_i64m1(src, 0); + return __riscv_vget_v_i64m2_i64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i64m4_i64m1( @@ -346,7 +346,7 @@ vint64m1_t test_vget_v_i64m2_i64m1(vint64m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vget_v_i64m4_i64m1(vint64m4_t src, size_t index) { - return vget_v_i64m4_i64m1(src, 0); + return __riscv_vget_v_i64m4_i64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i64m8_i64m1( @@ -355,7 +355,7 @@ vint64m1_t test_vget_v_i64m4_i64m1(vint64m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vget_v_i64m8_i64m1(vint64m8_t src, size_t index) { - return vget_v_i64m8_i64m1(src, 0); + return __riscv_vget_v_i64m8_i64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i64m4_i64m2( @@ -364,7 +364,7 @@ vint64m1_t test_vget_v_i64m8_i64m1(vint64m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vget_v_i64m4_i64m2(vint64m4_t src, size_t index) { - return vget_v_i64m4_i64m2(src, 0); + return __riscv_vget_v_i64m4_i64m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i64m8_i64m2( @@ -373,7 +373,7 @@ vint64m2_t test_vget_v_i64m4_i64m2(vint64m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vget_v_i64m8_i64m2(vint64m8_t src, size_t index) { - return vget_v_i64m8_i64m2(src, 0); + return __riscv_vget_v_i64m8_i64m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_i64m8_i64m4( @@ -382,7 +382,7 @@ vint64m2_t test_vget_v_i64m8_i64m2(vint64m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vget_v_i64m8_i64m4(vint64m8_t src, size_t index) { - return vget_v_i64m8_i64m4(src, 0); + return __riscv_vget_v_i64m8_i64m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u8m2_u8m1( @@ -391,7 +391,7 @@ vint64m4_t test_vget_v_i64m8_i64m4(vint64m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vget_v_u8m2_u8m1(vuint8m2_t src, size_t index) { - return vget_v_u8m2_u8m1(src, 0); + return __riscv_vget_v_u8m2_u8m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u8m4_u8m1( @@ -400,7 +400,7 @@ vuint8m1_t test_vget_v_u8m2_u8m1(vuint8m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vget_v_u8m4_u8m1(vuint8m4_t src, size_t index) { - return vget_v_u8m4_u8m1(src, 0); + return __riscv_vget_v_u8m4_u8m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u8m8_u8m1( @@ -409,7 +409,7 @@ vuint8m1_t test_vget_v_u8m4_u8m1(vuint8m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vget_v_u8m8_u8m1(vuint8m8_t src, size_t index) { - return vget_v_u8m8_u8m1(src, 0); + return __riscv_vget_v_u8m8_u8m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u8m4_u8m2( @@ -418,7 +418,7 @@ vuint8m1_t test_vget_v_u8m8_u8m1(vuint8m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vget_v_u8m4_u8m2(vuint8m4_t src, size_t index) { - return vget_v_u8m4_u8m2(src, 0); + return __riscv_vget_v_u8m4_u8m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u8m8_u8m2( @@ -427,7 +427,7 @@ vuint8m2_t test_vget_v_u8m4_u8m2(vuint8m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vget_v_u8m8_u8m2(vuint8m8_t src, size_t index) { - return vget_v_u8m8_u8m2(src, 0); + return __riscv_vget_v_u8m8_u8m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u8m8_u8m4( @@ -436,7 +436,7 @@ vuint8m2_t test_vget_v_u8m8_u8m2(vuint8m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vget_v_u8m8_u8m4(vuint8m8_t src, size_t index) { - return vget_v_u8m8_u8m4(src, 0); + return __riscv_vget_v_u8m8_u8m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u16m2_u16m1( @@ -445,7 +445,7 @@ vuint8m4_t test_vget_v_u8m8_u8m4(vuint8m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vget_v_u16m2_u16m1(vuint16m2_t src, size_t index) { - return vget_v_u16m2_u16m1(src, 0); + return __riscv_vget_v_u16m2_u16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u16m4_u16m1( @@ -454,7 +454,7 @@ vuint16m1_t test_vget_v_u16m2_u16m1(vuint16m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vget_v_u16m4_u16m1(vuint16m4_t src, size_t index) { - return vget_v_u16m4_u16m1(src, 0); + return __riscv_vget_v_u16m4_u16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u16m8_u16m1( @@ -463,7 +463,7 @@ vuint16m1_t test_vget_v_u16m4_u16m1(vuint16m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vget_v_u16m8_u16m1(vuint16m8_t src, size_t index) { - return vget_v_u16m8_u16m1(src, 0); + return __riscv_vget_v_u16m8_u16m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u16m4_u16m2( @@ -472,7 +472,7 @@ vuint16m1_t test_vget_v_u16m8_u16m1(vuint16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vget_v_u16m4_u16m2(vuint16m4_t src, size_t index) { - return vget_v_u16m4_u16m2(src, 0); + return __riscv_vget_v_u16m4_u16m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u16m8_u16m2( @@ -481,7 +481,7 @@ vuint16m2_t test_vget_v_u16m4_u16m2(vuint16m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vget_v_u16m8_u16m2(vuint16m8_t src, size_t index) { - return vget_v_u16m8_u16m2(src, 0); + return __riscv_vget_v_u16m8_u16m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u16m8_u16m4( @@ -490,7 +490,7 @@ vuint16m2_t test_vget_v_u16m8_u16m2(vuint16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vget_v_u16m8_u16m4(vuint16m8_t src, size_t index) { - return vget_v_u16m8_u16m4(src, 0); + return __riscv_vget_v_u16m8_u16m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u32m2_u32m1( @@ -499,7 +499,7 @@ vuint16m4_t test_vget_v_u16m8_u16m4(vuint16m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vget_v_u32m2_u32m1(vuint32m2_t src, size_t index) { - return vget_v_u32m2_u32m1(src, 0); + return __riscv_vget_v_u32m2_u32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u32m4_u32m1( @@ -508,7 +508,7 @@ vuint32m1_t test_vget_v_u32m2_u32m1(vuint32m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vget_v_u32m4_u32m1(vuint32m4_t src, size_t index) { - return vget_v_u32m4_u32m1(src, 0); + return __riscv_vget_v_u32m4_u32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u32m8_u32m1( @@ -517,7 +517,7 @@ vuint32m1_t test_vget_v_u32m4_u32m1(vuint32m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vget_v_u32m8_u32m1(vuint32m8_t src, size_t index) { - return vget_v_u32m8_u32m1(src, 0); + return __riscv_vget_v_u32m8_u32m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u32m4_u32m2( @@ -526,7 +526,7 @@ vuint32m1_t test_vget_v_u32m8_u32m1(vuint32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vget_v_u32m4_u32m2(vuint32m4_t src, size_t index) { - return vget_v_u32m4_u32m2(src, 0); + return __riscv_vget_v_u32m4_u32m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u32m8_u32m2( @@ -535,7 +535,7 @@ vuint32m2_t test_vget_v_u32m4_u32m2(vuint32m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vget_v_u32m8_u32m2(vuint32m8_t src, size_t index) { - return vget_v_u32m8_u32m2(src, 0); + return __riscv_vget_v_u32m8_u32m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u32m8_u32m4( @@ -544,7 +544,7 @@ vuint32m2_t test_vget_v_u32m8_u32m2(vuint32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vget_v_u32m8_u32m4(vuint32m8_t src, size_t index) { - return vget_v_u32m8_u32m4(src, 0); + return __riscv_vget_v_u32m8_u32m4(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u64m2_u64m1( @@ -553,7 +553,7 @@ vuint32m4_t test_vget_v_u32m8_u32m4(vuint32m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vget_v_u64m2_u64m1(vuint64m2_t src, size_t index) { - return vget_v_u64m2_u64m1(src, 0); + return __riscv_vget_v_u64m2_u64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u64m4_u64m1( @@ -562,7 +562,7 @@ vuint64m1_t test_vget_v_u64m2_u64m1(vuint64m2_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vget_v_u64m4_u64m1(vuint64m4_t src, size_t index) { - return vget_v_u64m4_u64m1(src, 0); + return __riscv_vget_v_u64m4_u64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u64m8_u64m1( @@ -571,7 +571,7 @@ vuint64m1_t test_vget_v_u64m4_u64m1(vuint64m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vget_v_u64m8_u64m1(vuint64m8_t src, size_t index) { - return vget_v_u64m8_u64m1(src, 0); + return __riscv_vget_v_u64m8_u64m1(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u64m4_u64m2( @@ -580,7 +580,7 @@ vuint64m1_t test_vget_v_u64m8_u64m1(vuint64m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vget_v_u64m4_u64m2(vuint64m4_t src, size_t index) { - return vget_v_u64m4_u64m2(src, 0); + return __riscv_vget_v_u64m4_u64m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u64m8_u64m2( @@ -589,7 +589,7 @@ vuint64m2_t test_vget_v_u64m4_u64m2(vuint64m4_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vget_v_u64m8_u64m2(vuint64m8_t src, size_t index) { - return vget_v_u64m8_u64m2(src, 0); + return __riscv_vget_v_u64m8_u64m2(src, 0); } // CHECK-RV64-LABEL: @test_vget_v_u64m8_u64m4( @@ -598,6 +598,6 @@ vuint64m2_t test_vget_v_u64m8_u64m2(vuint64m8_t src, size_t index) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vget_v_u64m8_u64m4(vuint64m8_t src, size_t index) { - return vget_v_u64m8_u64m4(src, 0); + return __riscv_vget_v_u64m8_u64m4(src, 0); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vid.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vid.c index ebac7044a3198397aec2a31661cb9c05b23305e2..b5f268237e06a1743921e25108acc49c7e3268c5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vid.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vid.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vid_v_u8mf8(size_t vl) { - return vid_v_u8mf8(vl); + return __riscv_vid_v_u8mf8(vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf4( @@ -21,7 +21,7 @@ vuint8mf8_t test_vid_v_u8mf8(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vid_v_u8mf4(size_t vl) { - return vid_v_u8mf4(vl); + return __riscv_vid_v_u8mf4(vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf2( @@ -30,7 +30,7 @@ vuint8mf4_t test_vid_v_u8mf4(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vid_v_u8mf2(size_t vl) { - return vid_v_u8mf2(vl); + return __riscv_vid_v_u8mf2(vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m1( @@ -39,7 +39,7 @@ vuint8mf2_t test_vid_v_u8mf2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vid_v_u8m1(size_t vl) { - return vid_v_u8m1(vl); + return __riscv_vid_v_u8m1(vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m2( @@ -48,7 +48,7 @@ vuint8m1_t test_vid_v_u8m1(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vid_v_u8m2(size_t vl) { - return vid_v_u8m2(vl); + return __riscv_vid_v_u8m2(vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m4( @@ -57,7 +57,7 @@ vuint8m2_t test_vid_v_u8m2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vid_v_u8m4(size_t vl) { - return vid_v_u8m4(vl); + return __riscv_vid_v_u8m4(vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m8( @@ -66,7 +66,7 @@ vuint8m4_t test_vid_v_u8m4(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vid_v_u8m8(size_t vl) { - return vid_v_u8m8(vl); + return __riscv_vid_v_u8m8(vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf4( @@ -75,7 +75,7 @@ vuint8m8_t test_vid_v_u8m8(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vid_v_u16mf4(size_t vl) { - return vid_v_u16mf4(vl); + return __riscv_vid_v_u16mf4(vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf2( @@ -84,7 +84,7 @@ vuint16mf4_t test_vid_v_u16mf4(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vid_v_u16mf2(size_t vl) { - return vid_v_u16mf2(vl); + return __riscv_vid_v_u16mf2(vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m1( @@ -93,7 +93,7 @@ vuint16mf2_t test_vid_v_u16mf2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vid_v_u16m1(size_t vl) { - return vid_v_u16m1(vl); + return __riscv_vid_v_u16m1(vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m2( @@ -102,7 +102,7 @@ vuint16m1_t test_vid_v_u16m1(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vid_v_u16m2(size_t vl) { - return vid_v_u16m2(vl); + return __riscv_vid_v_u16m2(vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m4( @@ -111,7 +111,7 @@ vuint16m2_t test_vid_v_u16m2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vid_v_u16m4(size_t vl) { - return vid_v_u16m4(vl); + return __riscv_vid_v_u16m4(vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m8( @@ -120,7 +120,7 @@ vuint16m4_t test_vid_v_u16m4(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vid_v_u16m8(size_t vl) { - return vid_v_u16m8(vl); + return __riscv_vid_v_u16m8(vl); } // CHECK-RV64-LABEL: @test_vid_v_u32mf2( @@ -129,7 +129,7 @@ vuint16m8_t test_vid_v_u16m8(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vid_v_u32mf2(size_t vl) { - return vid_v_u32mf2(vl); + return __riscv_vid_v_u32mf2(vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m1( @@ -138,7 +138,7 @@ vuint32mf2_t test_vid_v_u32mf2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vid_v_u32m1(size_t vl) { - return vid_v_u32m1(vl); + return __riscv_vid_v_u32m1(vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m2( @@ -147,7 +147,7 @@ vuint32m1_t test_vid_v_u32m1(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vid_v_u32m2(size_t vl) { - return vid_v_u32m2(vl); + return __riscv_vid_v_u32m2(vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m4( @@ -156,7 +156,7 @@ vuint32m2_t test_vid_v_u32m2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vid_v_u32m4(size_t vl) { - return vid_v_u32m4(vl); + return __riscv_vid_v_u32m4(vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m8( @@ -165,7 +165,7 @@ vuint32m4_t test_vid_v_u32m4(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vid_v_u32m8(size_t vl) { - return vid_v_u32m8(vl); + return __riscv_vid_v_u32m8(vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m1( @@ -174,7 +174,7 @@ vuint32m8_t test_vid_v_u32m8(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vid_v_u64m1(size_t vl) { - return vid_v_u64m1(vl); + return __riscv_vid_v_u64m1(vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m2( @@ -183,7 +183,7 @@ vuint64m1_t test_vid_v_u64m1(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vid_v_u64m2(size_t vl) { - return vid_v_u64m2(vl); + return __riscv_vid_v_u64m2(vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m4( @@ -192,7 +192,7 @@ vuint64m2_t test_vid_v_u64m2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vid_v_u64m4(size_t vl) { - return vid_v_u64m4(vl); + return __riscv_vid_v_u64m4(vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m8( @@ -201,7 +201,7 @@ vuint64m4_t test_vid_v_u64m4(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vid_v_u64m8(size_t vl) { - return vid_v_u64m8(vl); + return __riscv_vid_v_u64m8(vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf8_m( @@ -210,7 +210,7 @@ vuint64m8_t test_vid_v_u64m8(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vid_v_u8mf8_m(vbool64_t mask, size_t vl) { - return vid_v_u8mf8_m(mask, vl); + return __riscv_vid_v_u8mf8_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf4_m( @@ -219,7 +219,7 @@ vuint8mf8_t test_vid_v_u8mf8_m(vbool64_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vid_v_u8mf4_m(vbool32_t mask, size_t vl) { - return vid_v_u8mf4_m(mask, vl); + return __riscv_vid_v_u8mf4_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf2_m( @@ -228,7 +228,7 @@ vuint8mf4_t test_vid_v_u8mf4_m(vbool32_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vid_v_u8mf2_m(vbool16_t mask, size_t vl) { - return vid_v_u8mf2_m(mask, vl); + return __riscv_vid_v_u8mf2_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m1_m( @@ -237,7 +237,7 @@ vuint8mf2_t test_vid_v_u8mf2_m(vbool16_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vid_v_u8m1_m(vbool8_t mask, size_t vl) { - return vid_v_u8m1_m(mask, vl); + return __riscv_vid_v_u8m1_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m2_m( @@ -246,7 +246,7 @@ vuint8m1_t test_vid_v_u8m1_m(vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vid_v_u8m2_m(vbool4_t mask, size_t vl) { - return vid_v_u8m2_m(mask, vl); + return __riscv_vid_v_u8m2_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m4_m( @@ -255,7 +255,7 @@ vuint8m2_t test_vid_v_u8m2_m(vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vid_v_u8m4_m(vbool2_t mask, size_t vl) { - return vid_v_u8m4_m(mask, vl); + return __riscv_vid_v_u8m4_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m8_m( @@ -264,7 +264,7 @@ vuint8m4_t test_vid_v_u8m4_m(vbool2_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vid_v_u8m8_m(vbool1_t mask, size_t vl) { - return vid_v_u8m8_m(mask, vl); + return __riscv_vid_v_u8m8_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf4_m( @@ -273,7 +273,7 @@ vuint8m8_t test_vid_v_u8m8_m(vbool1_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vid_v_u16mf4_m(vbool64_t mask, size_t vl) { - return vid_v_u16mf4_m(mask, vl); + return __riscv_vid_v_u16mf4_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf2_m( @@ -282,7 +282,7 @@ vuint16mf4_t test_vid_v_u16mf4_m(vbool64_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vid_v_u16mf2_m(vbool32_t mask, size_t vl) { - return vid_v_u16mf2_m(mask, vl); + return __riscv_vid_v_u16mf2_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m1_m( @@ -291,7 +291,7 @@ vuint16mf2_t test_vid_v_u16mf2_m(vbool32_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vid_v_u16m1_m(vbool16_t mask, size_t vl) { - return vid_v_u16m1_m(mask, vl); + return __riscv_vid_v_u16m1_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m2_m( @@ -300,7 +300,7 @@ vuint16m1_t test_vid_v_u16m1_m(vbool16_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vid_v_u16m2_m(vbool8_t mask, size_t vl) { - return vid_v_u16m2_m(mask, vl); + return __riscv_vid_v_u16m2_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m4_m( @@ -309,7 +309,7 @@ vuint16m2_t test_vid_v_u16m2_m(vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vid_v_u16m4_m(vbool4_t mask, size_t vl) { - return vid_v_u16m4_m(mask, vl); + return __riscv_vid_v_u16m4_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m8_m( @@ -318,7 +318,7 @@ vuint16m4_t test_vid_v_u16m4_m(vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vid_v_u16m8_m(vbool2_t mask, size_t vl) { - return vid_v_u16m8_m(mask, vl); + return __riscv_vid_v_u16m8_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32mf2_m( @@ -327,7 +327,7 @@ vuint16m8_t test_vid_v_u16m8_m(vbool2_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vid_v_u32mf2_m(vbool64_t mask, size_t vl) { - return vid_v_u32mf2_m(mask, vl); + return __riscv_vid_v_u32mf2_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m1_m( @@ -336,7 +336,7 @@ vuint32mf2_t test_vid_v_u32mf2_m(vbool64_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vid_v_u32m1_m(vbool32_t mask, size_t vl) { - return vid_v_u32m1_m(mask, vl); + return __riscv_vid_v_u32m1_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m2_m( @@ -345,7 +345,7 @@ vuint32m1_t test_vid_v_u32m1_m(vbool32_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vid_v_u32m2_m(vbool16_t mask, size_t vl) { - return vid_v_u32m2_m(mask, vl); + return __riscv_vid_v_u32m2_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m4_m( @@ -354,7 +354,7 @@ vuint32m2_t test_vid_v_u32m2_m(vbool16_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vid_v_u32m4_m(vbool8_t mask, size_t vl) { - return vid_v_u32m4_m(mask, vl); + return __riscv_vid_v_u32m4_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m8_m( @@ -363,7 +363,7 @@ vuint32m4_t test_vid_v_u32m4_m(vbool8_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vid_v_u32m8_m(vbool4_t mask, size_t vl) { - return vid_v_u32m8_m(mask, vl); + return __riscv_vid_v_u32m8_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m1_m( @@ -372,7 +372,7 @@ vuint32m8_t test_vid_v_u32m8_m(vbool4_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vid_v_u64m1_m(vbool64_t mask, size_t vl) { - return vid_v_u64m1_m(mask, vl); + return __riscv_vid_v_u64m1_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m2_m( @@ -381,7 +381,7 @@ vuint64m1_t test_vid_v_u64m1_m(vbool64_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vid_v_u64m2_m(vbool32_t mask, size_t vl) { - return vid_v_u64m2_m(mask, vl); + return __riscv_vid_v_u64m2_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m4_m( @@ -390,7 +390,7 @@ vuint64m2_t test_vid_v_u64m2_m(vbool32_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vid_v_u64m4_m(vbool16_t mask, size_t vl) { - return vid_v_u64m4_m(mask, vl); + return __riscv_vid_v_u64m4_m(mask, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m8_m( @@ -399,6 +399,6 @@ vuint64m4_t test_vid_v_u64m4_m(vbool16_t mask, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vid_v_u64m8_m(vbool8_t mask, size_t vl) { - return vid_v_u64m8_m(mask, vl); + return __riscv_vid_v_u64m8_m(mask, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/viota.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/viota.c index 9c05ca026d214dc79380885fdd5eb309758a4312..44758b535d4b09f7e776ad5729de6d17720c1eb5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/viota.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/viota.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_viota_m_u8mf8(vbool64_t op1, size_t vl) { - return viota_m_u8mf8(op1, vl); + return __riscv_viota_m_u8mf8(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf4( @@ -21,7 +21,7 @@ vuint8mf8_t test_viota_m_u8mf8(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_viota_m_u8mf4(vbool32_t op1, size_t vl) { - return viota_m_u8mf4(op1, vl); + return __riscv_viota_m_u8mf4(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf2( @@ -30,7 +30,7 @@ vuint8mf4_t test_viota_m_u8mf4(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_viota_m_u8mf2(vbool16_t op1, size_t vl) { - return viota_m_u8mf2(op1, vl); + return __riscv_viota_m_u8mf2(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m1( @@ -39,7 +39,7 @@ vuint8mf2_t test_viota_m_u8mf2(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_viota_m_u8m1(vbool8_t op1, size_t vl) { - return viota_m_u8m1(op1, vl); + return __riscv_viota_m_u8m1(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m2( @@ -48,7 +48,7 @@ vuint8m1_t test_viota_m_u8m1(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_viota_m_u8m2(vbool4_t op1, size_t vl) { - return viota_m_u8m2(op1, vl); + return __riscv_viota_m_u8m2(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m4( @@ -57,7 +57,7 @@ vuint8m2_t test_viota_m_u8m2(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_viota_m_u8m4(vbool2_t op1, size_t vl) { - return viota_m_u8m4(op1, vl); + return __riscv_viota_m_u8m4(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m8( @@ -66,7 +66,7 @@ vuint8m4_t test_viota_m_u8m4(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_viota_m_u8m8(vbool1_t op1, size_t vl) { - return viota_m_u8m8(op1, vl); + return __riscv_viota_m_u8m8(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf4( @@ -75,7 +75,7 @@ vuint8m8_t test_viota_m_u8m8(vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_viota_m_u16mf4(vbool64_t op1, size_t vl) { - return viota_m_u16mf4(op1, vl); + return __riscv_viota_m_u16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf2( @@ -84,7 +84,7 @@ vuint16mf4_t test_viota_m_u16mf4(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_viota_m_u16mf2(vbool32_t op1, size_t vl) { - return viota_m_u16mf2(op1, vl); + return __riscv_viota_m_u16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m1( @@ -93,7 +93,7 @@ vuint16mf2_t test_viota_m_u16mf2(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_viota_m_u16m1(vbool16_t op1, size_t vl) { - return viota_m_u16m1(op1, vl); + return __riscv_viota_m_u16m1(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m2( @@ -102,7 +102,7 @@ vuint16m1_t test_viota_m_u16m1(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_viota_m_u16m2(vbool8_t op1, size_t vl) { - return viota_m_u16m2(op1, vl); + return __riscv_viota_m_u16m2(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m4( @@ -111,7 +111,7 @@ vuint16m2_t test_viota_m_u16m2(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_viota_m_u16m4(vbool4_t op1, size_t vl) { - return viota_m_u16m4(op1, vl); + return __riscv_viota_m_u16m4(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m8( @@ -120,7 +120,7 @@ vuint16m4_t test_viota_m_u16m4(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_viota_m_u16m8(vbool2_t op1, size_t vl) { - return viota_m_u16m8(op1, vl); + return __riscv_viota_m_u16m8(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32mf2( @@ -129,7 +129,7 @@ vuint16m8_t test_viota_m_u16m8(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_viota_m_u32mf2(vbool64_t op1, size_t vl) { - return viota_m_u32mf2(op1, vl); + return __riscv_viota_m_u32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m1( @@ -138,7 +138,7 @@ vuint32mf2_t test_viota_m_u32mf2(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_viota_m_u32m1(vbool32_t op1, size_t vl) { - return viota_m_u32m1(op1, vl); + return __riscv_viota_m_u32m1(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m2( @@ -147,7 +147,7 @@ vuint32m1_t test_viota_m_u32m1(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_viota_m_u32m2(vbool16_t op1, size_t vl) { - return viota_m_u32m2(op1, vl); + return __riscv_viota_m_u32m2(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m4( @@ -156,7 +156,7 @@ vuint32m2_t test_viota_m_u32m2(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_viota_m_u32m4(vbool8_t op1, size_t vl) { - return viota_m_u32m4(op1, vl); + return __riscv_viota_m_u32m4(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m8( @@ -165,7 +165,7 @@ vuint32m4_t test_viota_m_u32m4(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_viota_m_u32m8(vbool4_t op1, size_t vl) { - return viota_m_u32m8(op1, vl); + return __riscv_viota_m_u32m8(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m1( @@ -174,7 +174,7 @@ vuint32m8_t test_viota_m_u32m8(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_viota_m_u64m1(vbool64_t op1, size_t vl) { - return viota_m_u64m1(op1, vl); + return __riscv_viota_m_u64m1(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m2( @@ -183,7 +183,7 @@ vuint64m1_t test_viota_m_u64m1(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_viota_m_u64m2(vbool32_t op1, size_t vl) { - return viota_m_u64m2(op1, vl); + return __riscv_viota_m_u64m2(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m4( @@ -192,7 +192,7 @@ vuint64m2_t test_viota_m_u64m2(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_viota_m_u64m4(vbool16_t op1, size_t vl) { - return viota_m_u64m4(op1, vl); + return __riscv_viota_m_u64m4(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m8( @@ -201,7 +201,7 @@ vuint64m4_t test_viota_m_u64m4(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_viota_m_u64m8(vbool8_t op1, size_t vl) { - return viota_m_u64m8(op1, vl); + return __riscv_viota_m_u64m8(op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf8_m( @@ -210,7 +210,7 @@ vuint64m8_t test_viota_m_u64m8(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_viota_m_u8mf8_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return viota_m_u8mf8_m(mask, op1, vl); + return __riscv_viota_m_u8mf8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf4_m( @@ -219,7 +219,7 @@ vuint8mf8_t test_viota_m_u8mf8_m(vbool64_t mask, vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_viota_m_u8mf4_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return viota_m_u8mf4_m(mask, op1, vl); + return __riscv_viota_m_u8mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf2_m( @@ -228,7 +228,7 @@ vuint8mf4_t test_viota_m_u8mf4_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_viota_m_u8mf2_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return viota_m_u8mf2_m(mask, op1, vl); + return __riscv_viota_m_u8mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m1_m( @@ -237,7 +237,7 @@ vuint8mf2_t test_viota_m_u8mf2_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_viota_m_u8m1_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return viota_m_u8m1_m(mask, op1, vl); + return __riscv_viota_m_u8m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m2_m( @@ -246,7 +246,7 @@ vuint8m1_t test_viota_m_u8m1_m(vbool8_t mask, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_viota_m_u8m2_m(vbool4_t mask, vbool4_t op1, size_t vl) { - return viota_m_u8m2_m(mask, op1, vl); + return __riscv_viota_m_u8m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m4_m( @@ -255,7 +255,7 @@ vuint8m2_t test_viota_m_u8m2_m(vbool4_t mask, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_viota_m_u8m4_m(vbool2_t mask, vbool2_t op1, size_t vl) { - return viota_m_u8m4_m(mask, op1, vl); + return __riscv_viota_m_u8m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m8_m( @@ -264,7 +264,7 @@ vuint8m4_t test_viota_m_u8m4_m(vbool2_t mask, vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_viota_m_u8m8_m(vbool1_t mask, vbool1_t op1, size_t vl) { - return viota_m_u8m8_m(mask, op1, vl); + return __riscv_viota_m_u8m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf4_m( @@ -273,7 +273,7 @@ vuint8m8_t test_viota_m_u8m8_m(vbool1_t mask, vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_viota_m_u16mf4_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return viota_m_u16mf4_m(mask, op1, vl); + return __riscv_viota_m_u16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf2_m( @@ -282,7 +282,7 @@ vuint16mf4_t test_viota_m_u16mf4_m(vbool64_t mask, vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_viota_m_u16mf2_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return viota_m_u16mf2_m(mask, op1, vl); + return __riscv_viota_m_u16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m1_m( @@ -291,7 +291,7 @@ vuint16mf2_t test_viota_m_u16mf2_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_viota_m_u16m1_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return viota_m_u16m1_m(mask, op1, vl); + return __riscv_viota_m_u16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m2_m( @@ -300,7 +300,7 @@ vuint16m1_t test_viota_m_u16m1_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_viota_m_u16m2_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return viota_m_u16m2_m(mask, op1, vl); + return __riscv_viota_m_u16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m4_m( @@ -309,7 +309,7 @@ vuint16m2_t test_viota_m_u16m2_m(vbool8_t mask, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_viota_m_u16m4_m(vbool4_t mask, vbool4_t op1, size_t vl) { - return viota_m_u16m4_m(mask, op1, vl); + return __riscv_viota_m_u16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m8_m( @@ -318,7 +318,7 @@ vuint16m4_t test_viota_m_u16m4_m(vbool4_t mask, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_viota_m_u16m8_m(vbool2_t mask, vbool2_t op1, size_t vl) { - return viota_m_u16m8_m(mask, op1, vl); + return __riscv_viota_m_u16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32mf2_m( @@ -327,7 +327,7 @@ vuint16m8_t test_viota_m_u16m8_m(vbool2_t mask, vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_viota_m_u32mf2_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return viota_m_u32mf2_m(mask, op1, vl); + return __riscv_viota_m_u32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m1_m( @@ -336,7 +336,7 @@ vuint32mf2_t test_viota_m_u32mf2_m(vbool64_t mask, vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_viota_m_u32m1_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return viota_m_u32m1_m(mask, op1, vl); + return __riscv_viota_m_u32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m2_m( @@ -345,7 +345,7 @@ vuint32m1_t test_viota_m_u32m1_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_viota_m_u32m2_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return viota_m_u32m2_m(mask, op1, vl); + return __riscv_viota_m_u32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m4_m( @@ -354,7 +354,7 @@ vuint32m2_t test_viota_m_u32m2_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_viota_m_u32m4_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return viota_m_u32m4_m(mask, op1, vl); + return __riscv_viota_m_u32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m8_m( @@ -363,7 +363,7 @@ vuint32m4_t test_viota_m_u32m4_m(vbool8_t mask, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_viota_m_u32m8_m(vbool4_t mask, vbool4_t op1, size_t vl) { - return viota_m_u32m8_m(mask, op1, vl); + return __riscv_viota_m_u32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m1_m( @@ -372,7 +372,7 @@ vuint32m8_t test_viota_m_u32m8_m(vbool4_t mask, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_viota_m_u64m1_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return viota_m_u64m1_m(mask, op1, vl); + return __riscv_viota_m_u64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m2_m( @@ -381,7 +381,7 @@ vuint64m1_t test_viota_m_u64m1_m(vbool64_t mask, vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_viota_m_u64m2_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return viota_m_u64m2_m(mask, op1, vl); + return __riscv_viota_m_u64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m4_m( @@ -390,7 +390,7 @@ vuint64m2_t test_viota_m_u64m2_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_viota_m_u64m4_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return viota_m_u64m4_m(mask, op1, vl); + return __riscv_viota_m_u64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m8_m( @@ -399,6 +399,6 @@ vuint64m4_t test_viota_m_u64m4_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_viota_m_u64m8_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return viota_m_u64m8_m(mask, op1, vl); + return __riscv_viota_m_u64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16.c index 1fdd680d7f8aed20d84d483f168239ddbb82f11b..a90be62d73927f3c8f71fb5cf5a4775b5c8f114d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vle16_v_f16mf4(const _Float16 *base, size_t vl) { - return vle16_v_f16mf4(base, vl); + return __riscv_vle16_v_f16mf4(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vle16_v_f16mf4(const _Float16 *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vle16_v_f16mf2(const _Float16 *base, size_t vl) { - return vle16_v_f16mf2(base, vl); + return __riscv_vle16_v_f16mf2(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vle16_v_f16mf2(const _Float16 *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vle16_v_f16m1(const _Float16 *base, size_t vl) { - return vle16_v_f16m1(base, vl); + return __riscv_vle16_v_f16m1(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vle16_v_f16m1(const _Float16 *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vle16_v_f16m2(const _Float16 *base, size_t vl) { - return vle16_v_f16m2(base, vl); + return __riscv_vle16_v_f16m2(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vle16_v_f16m2(const _Float16 *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vle16_v_f16m4(const _Float16 *base, size_t vl) { - return vle16_v_f16m4(base, vl); + return __riscv_vle16_v_f16m4(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vle16_v_f16m4(const _Float16 *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vle16_v_f16m8(const _Float16 *base, size_t vl) { - return vle16_v_f16m8(base, vl); + return __riscv_vle16_v_f16m8(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf4( @@ -67,7 +67,7 @@ vfloat16m8_t test_vle16_v_f16m8(const _Float16 *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vle16_v_i16mf4(const int16_t *base, size_t vl) { - return vle16_v_i16mf4(base, vl); + return __riscv_vle16_v_i16mf4(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf2( @@ -76,7 +76,7 @@ vint16mf4_t test_vle16_v_i16mf4(const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vle16_v_i16mf2(const int16_t *base, size_t vl) { - return vle16_v_i16mf2(base, vl); + return __riscv_vle16_v_i16mf2(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m1( @@ -85,7 +85,7 @@ vint16mf2_t test_vle16_v_i16mf2(const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vle16_v_i16m1(const int16_t *base, size_t vl) { - return vle16_v_i16m1(base, vl); + return __riscv_vle16_v_i16m1(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m2( @@ -94,7 +94,7 @@ vint16m1_t test_vle16_v_i16m1(const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vle16_v_i16m2(const int16_t *base, size_t vl) { - return vle16_v_i16m2(base, vl); + return __riscv_vle16_v_i16m2(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m4( @@ -103,7 +103,7 @@ vint16m2_t test_vle16_v_i16m2(const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vle16_v_i16m4(const int16_t *base, size_t vl) { - return vle16_v_i16m4(base, vl); + return __riscv_vle16_v_i16m4(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m8( @@ -112,7 +112,7 @@ vint16m4_t test_vle16_v_i16m4(const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vle16_v_i16m8(const int16_t *base, size_t vl) { - return vle16_v_i16m8(base, vl); + return __riscv_vle16_v_i16m8(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf4( @@ -121,7 +121,7 @@ vint16m8_t test_vle16_v_i16m8(const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vle16_v_u16mf4(const uint16_t *base, size_t vl) { - return vle16_v_u16mf4(base, vl); + return __riscv_vle16_v_u16mf4(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf2( @@ -130,7 +130,7 @@ vuint16mf4_t test_vle16_v_u16mf4(const uint16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vle16_v_u16mf2(const uint16_t *base, size_t vl) { - return vle16_v_u16mf2(base, vl); + return __riscv_vle16_v_u16mf2(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m1( @@ -139,7 +139,7 @@ vuint16mf2_t test_vle16_v_u16mf2(const uint16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vle16_v_u16m1(const uint16_t *base, size_t vl) { - return vle16_v_u16m1(base, vl); + return __riscv_vle16_v_u16m1(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m2( @@ -148,7 +148,7 @@ vuint16m1_t test_vle16_v_u16m1(const uint16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vle16_v_u16m2(const uint16_t *base, size_t vl) { - return vle16_v_u16m2(base, vl); + return __riscv_vle16_v_u16m2(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m4( @@ -157,7 +157,7 @@ vuint16m2_t test_vle16_v_u16m2(const uint16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vle16_v_u16m4(const uint16_t *base, size_t vl) { - return vle16_v_u16m4(base, vl); + return __riscv_vle16_v_u16m4(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m8( @@ -166,7 +166,7 @@ vuint16m4_t test_vle16_v_u16m4(const uint16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vle16_v_u16m8(const uint16_t *base, size_t vl) { - return vle16_v_u16m8(base, vl); + return __riscv_vle16_v_u16m8(base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf4_m( @@ -175,7 +175,7 @@ vuint16m8_t test_vle16_v_u16m8(const uint16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vle16_v_f16mf4_m(vbool64_t mask, const _Float16 *base, size_t vl) { - return vle16_v_f16mf4_m(mask, base, vl); + return __riscv_vle16_v_f16mf4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf2_m( @@ -184,7 +184,7 @@ vfloat16mf4_t test_vle16_v_f16mf4_m(vbool64_t mask, const _Float16 *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vle16_v_f16mf2_m(vbool32_t mask, const _Float16 *base, size_t vl) { - return vle16_v_f16mf2_m(mask, base, vl); + return __riscv_vle16_v_f16mf2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m1_m( @@ -193,7 +193,7 @@ vfloat16mf2_t test_vle16_v_f16mf2_m(vbool32_t mask, const _Float16 *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vle16_v_f16m1_m(vbool16_t mask, const _Float16 *base, size_t vl) { - return vle16_v_f16m1_m(mask, base, vl); + return __riscv_vle16_v_f16m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m2_m( @@ -202,7 +202,7 @@ vfloat16m1_t test_vle16_v_f16m1_m(vbool16_t mask, const _Float16 *base, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vle16_v_f16m2_m(vbool8_t mask, const _Float16 *base, size_t vl) { - return vle16_v_f16m2_m(mask, base, vl); + return __riscv_vle16_v_f16m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m4_m( @@ -211,7 +211,7 @@ vfloat16m2_t test_vle16_v_f16m2_m(vbool8_t mask, const _Float16 *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vle16_v_f16m4_m(vbool4_t mask, const _Float16 *base, size_t vl) { - return vle16_v_f16m4_m(mask, base, vl); + return __riscv_vle16_v_f16m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m8_m( @@ -220,7 +220,7 @@ vfloat16m4_t test_vle16_v_f16m4_m(vbool4_t mask, const _Float16 *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vle16_v_f16m8_m(vbool2_t mask, const _Float16 *base, size_t vl) { - return vle16_v_f16m8_m(mask, base, vl); + return __riscv_vle16_v_f16m8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf4_m( @@ -229,7 +229,7 @@ vfloat16m8_t test_vle16_v_f16m8_m(vbool2_t mask, const _Float16 *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vle16_v_i16mf4_m(vbool64_t mask, const int16_t *base, size_t vl) { - return vle16_v_i16mf4_m(mask, base, vl); + return __riscv_vle16_v_i16mf4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf2_m( @@ -238,7 +238,7 @@ vint16mf4_t test_vle16_v_i16mf4_m(vbool64_t mask, const int16_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vle16_v_i16mf2_m(vbool32_t mask, const int16_t *base, size_t vl) { - return vle16_v_i16mf2_m(mask, base, vl); + return __riscv_vle16_v_i16mf2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m1_m( @@ -247,7 +247,7 @@ vint16mf2_t test_vle16_v_i16mf2_m(vbool32_t mask, const int16_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vle16_v_i16m1_m(vbool16_t mask, const int16_t *base, size_t vl) { - return vle16_v_i16m1_m(mask, base, vl); + return __riscv_vle16_v_i16m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m2_m( @@ -256,7 +256,7 @@ vint16m1_t test_vle16_v_i16m1_m(vbool16_t mask, const int16_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vle16_v_i16m2_m(vbool8_t mask, const int16_t *base, size_t vl) { - return vle16_v_i16m2_m(mask, base, vl); + return __riscv_vle16_v_i16m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m4_m( @@ -265,7 +265,7 @@ vint16m2_t test_vle16_v_i16m2_m(vbool8_t mask, const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vle16_v_i16m4_m(vbool4_t mask, const int16_t *base, size_t vl) { - return vle16_v_i16m4_m(mask, base, vl); + return __riscv_vle16_v_i16m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m8_m( @@ -274,7 +274,7 @@ vint16m4_t test_vle16_v_i16m4_m(vbool4_t mask, const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vle16_v_i16m8_m(vbool2_t mask, const int16_t *base, size_t vl) { - return vle16_v_i16m8_m(mask, base, vl); + return __riscv_vle16_v_i16m8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf4_m( @@ -283,7 +283,7 @@ vint16m8_t test_vle16_v_i16m8_m(vbool2_t mask, const int16_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vle16_v_u16mf4_m(vbool64_t mask, const uint16_t *base, size_t vl) { - return vle16_v_u16mf4_m(mask, base, vl); + return __riscv_vle16_v_u16mf4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf2_m( @@ -292,7 +292,7 @@ vuint16mf4_t test_vle16_v_u16mf4_m(vbool64_t mask, const uint16_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vle16_v_u16mf2_m(vbool32_t mask, const uint16_t *base, size_t vl) { - return vle16_v_u16mf2_m(mask, base, vl); + return __riscv_vle16_v_u16mf2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m1_m( @@ -301,7 +301,7 @@ vuint16mf2_t test_vle16_v_u16mf2_m(vbool32_t mask, const uint16_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vle16_v_u16m1_m(vbool16_t mask, const uint16_t *base, size_t vl) { - return vle16_v_u16m1_m(mask, base, vl); + return __riscv_vle16_v_u16m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m2_m( @@ -310,7 +310,7 @@ vuint16m1_t test_vle16_v_u16m1_m(vbool16_t mask, const uint16_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vle16_v_u16m2_m(vbool8_t mask, const uint16_t *base, size_t vl) { - return vle16_v_u16m2_m(mask, base, vl); + return __riscv_vle16_v_u16m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m4_m( @@ -319,7 +319,7 @@ vuint16m2_t test_vle16_v_u16m2_m(vbool8_t mask, const uint16_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vle16_v_u16m4_m(vbool4_t mask, const uint16_t *base, size_t vl) { - return vle16_v_u16m4_m(mask, base, vl); + return __riscv_vle16_v_u16m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m8_m( @@ -328,6 +328,6 @@ vuint16m4_t test_vle16_v_u16m4_m(vbool4_t mask, const uint16_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vle16_v_u16m8_m(vbool2_t mask, const uint16_t *base, size_t vl) { - return vle16_v_u16m8_m(mask, base, vl); + return __riscv_vle16_v_u16m8_m(mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16ff.c index e74b4e312b5eff837219ce96092d79ddeb0b8b30..e7e3b6371403b22b3cd6f902e2f419dc46db2384 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle16ff.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf4_t test_vle16ff_v_f16mf4(const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf4(base, new_vl, vl); + return __riscv_vle16ff_v_f16mf4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf2( @@ -28,7 +28,7 @@ vfloat16mf4_t test_vle16ff_v_f16mf4(const _Float16 *base, size_t *new_vl, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf2_t test_vle16ff_v_f16mf2(const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf2(base, new_vl, vl); + return __riscv_vle16ff_v_f16mf2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m1( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vle16ff_v_f16mf2(const _Float16 *base, size_t *new_vl, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m1_t test_vle16ff_v_f16m1(const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m1(base, new_vl, vl); + return __riscv_vle16ff_v_f16m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m2( @@ -52,7 +52,7 @@ vfloat16m1_t test_vle16ff_v_f16m1(const _Float16 *base, size_t *new_vl, size_t v // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m2_t test_vle16ff_v_f16m2(const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m2(base, new_vl, vl); + return __riscv_vle16ff_v_f16m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m4( @@ -64,7 +64,7 @@ vfloat16m2_t test_vle16ff_v_f16m2(const _Float16 *base, size_t *new_vl, size_t v // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m4_t test_vle16ff_v_f16m4(const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m4(base, new_vl, vl); + return __riscv_vle16ff_v_f16m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m8( @@ -76,7 +76,7 @@ vfloat16m4_t test_vle16ff_v_f16m4(const _Float16 *base, size_t *new_vl, size_t v // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m8_t test_vle16ff_v_f16m8(const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m8(base, new_vl, vl); + return __riscv_vle16ff_v_f16m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf4( @@ -88,7 +88,7 @@ vfloat16m8_t test_vle16ff_v_f16m8(const _Float16 *base, size_t *new_vl, size_t v // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf4_t test_vle16ff_v_i16mf4(const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf4(base, new_vl, vl); + return __riscv_vle16ff_v_i16mf4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf2( @@ -100,7 +100,7 @@ vint16mf4_t test_vle16ff_v_i16mf4(const int16_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf2_t test_vle16ff_v_i16mf2(const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf2(base, new_vl, vl); + return __riscv_vle16ff_v_i16mf2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m1( @@ -112,7 +112,7 @@ vint16mf2_t test_vle16ff_v_i16mf2(const int16_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m1_t test_vle16ff_v_i16m1(const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m1(base, new_vl, vl); + return __riscv_vle16ff_v_i16m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m2( @@ -124,7 +124,7 @@ vint16m1_t test_vle16ff_v_i16m1(const int16_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m2_t test_vle16ff_v_i16m2(const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m2(base, new_vl, vl); + return __riscv_vle16ff_v_i16m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m4( @@ -136,7 +136,7 @@ vint16m2_t test_vle16ff_v_i16m2(const int16_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m4_t test_vle16ff_v_i16m4(const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m4(base, new_vl, vl); + return __riscv_vle16ff_v_i16m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m8( @@ -148,7 +148,7 @@ vint16m4_t test_vle16ff_v_i16m4(const int16_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m8_t test_vle16ff_v_i16m8(const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m8(base, new_vl, vl); + return __riscv_vle16ff_v_i16m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf4( @@ -160,7 +160,7 @@ vint16m8_t test_vle16ff_v_i16m8(const int16_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf4_t test_vle16ff_v_u16mf4(const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf4(base, new_vl, vl); + return __riscv_vle16ff_v_u16mf4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf2( @@ -172,7 +172,7 @@ vuint16mf4_t test_vle16ff_v_u16mf4(const uint16_t *base, size_t *new_vl, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf2_t test_vle16ff_v_u16mf2(const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf2(base, new_vl, vl); + return __riscv_vle16ff_v_u16mf2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m1( @@ -184,7 +184,7 @@ vuint16mf2_t test_vle16ff_v_u16mf2(const uint16_t *base, size_t *new_vl, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m1_t test_vle16ff_v_u16m1(const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m1(base, new_vl, vl); + return __riscv_vle16ff_v_u16m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m2( @@ -196,7 +196,7 @@ vuint16m1_t test_vle16ff_v_u16m1(const uint16_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m2_t test_vle16ff_v_u16m2(const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m2(base, new_vl, vl); + return __riscv_vle16ff_v_u16m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m4( @@ -208,7 +208,7 @@ vuint16m2_t test_vle16ff_v_u16m2(const uint16_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m4_t test_vle16ff_v_u16m4(const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m4(base, new_vl, vl); + return __riscv_vle16ff_v_u16m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m8( @@ -220,7 +220,7 @@ vuint16m4_t test_vle16ff_v_u16m4(const uint16_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m8_t test_vle16ff_v_u16m8(const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m8(base, new_vl, vl); + return __riscv_vle16ff_v_u16m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf4_m( @@ -232,7 +232,7 @@ vuint16m8_t test_vle16ff_v_u16m8(const uint16_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf4_t test_vle16ff_v_f16mf4_m(vbool64_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf4_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf2_m( @@ -244,7 +244,7 @@ vfloat16mf4_t test_vle16ff_v_f16mf4_m(vbool64_t mask, const _Float16 *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf2_t test_vle16ff_v_f16mf2_m(vbool32_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf2_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m1_m( @@ -256,7 +256,7 @@ vfloat16mf2_t test_vle16ff_v_f16mf2_m(vbool32_t mask, const _Float16 *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m1_t test_vle16ff_v_f16m1_m(vbool16_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m1_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_f16m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m2_m( @@ -268,7 +268,7 @@ vfloat16m1_t test_vle16ff_v_f16m1_m(vbool16_t mask, const _Float16 *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m2_t test_vle16ff_v_f16m2_m(vbool8_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m2_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_f16m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m4_m( @@ -280,7 +280,7 @@ vfloat16m2_t test_vle16ff_v_f16m2_m(vbool8_t mask, const _Float16 *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m4_t test_vle16ff_v_f16m4_m(vbool4_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m4_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_f16m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m8_m( @@ -292,7 +292,7 @@ vfloat16m4_t test_vle16ff_v_f16m4_m(vbool4_t mask, const _Float16 *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m8_t test_vle16ff_v_f16m8_m(vbool2_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m8_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_f16m8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf4_m( @@ -304,7 +304,7 @@ vfloat16m8_t test_vle16ff_v_f16m8_m(vbool2_t mask, const _Float16 *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf4_t test_vle16ff_v_i16mf4_m(vbool64_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf4_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf2_m( @@ -316,7 +316,7 @@ vint16mf4_t test_vle16ff_v_i16mf4_m(vbool64_t mask, const int16_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf2_t test_vle16ff_v_i16mf2_m(vbool32_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf2_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m1_m( @@ -328,7 +328,7 @@ vint16mf2_t test_vle16ff_v_i16mf2_m(vbool32_t mask, const int16_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m1_t test_vle16ff_v_i16m1_m(vbool16_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m1_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_i16m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m2_m( @@ -340,7 +340,7 @@ vint16m1_t test_vle16ff_v_i16m1_m(vbool16_t mask, const int16_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m2_t test_vle16ff_v_i16m2_m(vbool8_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m2_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_i16m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m4_m( @@ -352,7 +352,7 @@ vint16m2_t test_vle16ff_v_i16m2_m(vbool8_t mask, const int16_t *base, size_t *ne // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m4_t test_vle16ff_v_i16m4_m(vbool4_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m4_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_i16m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m8_m( @@ -364,7 +364,7 @@ vint16m4_t test_vle16ff_v_i16m4_m(vbool4_t mask, const int16_t *base, size_t *ne // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m8_t test_vle16ff_v_i16m8_m(vbool2_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m8_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_i16m8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf4_m( @@ -376,7 +376,7 @@ vint16m8_t test_vle16ff_v_i16m8_m(vbool2_t mask, const int16_t *base, size_t *ne // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf4_t test_vle16ff_v_u16mf4_m(vbool64_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf4_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf2_m( @@ -388,7 +388,7 @@ vuint16mf4_t test_vle16ff_v_u16mf4_m(vbool64_t mask, const uint16_t *base, size_ // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf2_t test_vle16ff_v_u16mf2_m(vbool32_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf2_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m1_m( @@ -400,7 +400,7 @@ vuint16mf2_t test_vle16ff_v_u16mf2_m(vbool32_t mask, const uint16_t *base, size_ // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m1_t test_vle16ff_v_u16m1_m(vbool16_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m1_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_u16m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m2_m( @@ -412,7 +412,7 @@ vuint16m1_t test_vle16ff_v_u16m1_m(vbool16_t mask, const uint16_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m2_t test_vle16ff_v_u16m2_m(vbool8_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m2_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_u16m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m4_m( @@ -424,7 +424,7 @@ vuint16m2_t test_vle16ff_v_u16m2_m(vbool8_t mask, const uint16_t *base, size_t * // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m4_t test_vle16ff_v_u16m4_m(vbool4_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m4_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_u16m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m8_m( @@ -436,6 +436,6 @@ vuint16m4_t test_vle16ff_v_u16m4_m(vbool4_t mask, const uint16_t *base, size_t * // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m8_t test_vle16ff_v_u16m8_m(vbool2_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m8_m(mask, base, new_vl, vl); + return __riscv_vle16ff_v_u16m8_m(mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle32.c index 0ae87f4b4f70a362fde61c802ad8c8e7f77a5c0c..1af90a42364a77512e5006ab014219d2a292caff 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vle32_v_f32mf2(const float *base, size_t vl) { - return vle32_v_f32mf2(base, vl); + return __riscv_vle32_v_f32mf2(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m1( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vle32_v_f32mf2(const float *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vle32_v_f32m1(const float *base, size_t vl) { - return vle32_v_f32m1(base, vl); + return __riscv_vle32_v_f32m1(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m2( @@ -31,7 +31,7 @@ vfloat32m1_t test_vle32_v_f32m1(const float *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vle32_v_f32m2(const float *base, size_t vl) { - return vle32_v_f32m2(base, vl); + return __riscv_vle32_v_f32m2(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m4( @@ -40,7 +40,7 @@ vfloat32m2_t test_vle32_v_f32m2(const float *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vle32_v_f32m4(const float *base, size_t vl) { - return vle32_v_f32m4(base, vl); + return __riscv_vle32_v_f32m4(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m8( @@ -49,7 +49,7 @@ vfloat32m4_t test_vle32_v_f32m4(const float *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vle32_v_f32m8(const float *base, size_t vl) { - return vle32_v_f32m8(base, vl); + return __riscv_vle32_v_f32m8(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32mf2( @@ -58,7 +58,7 @@ vfloat32m8_t test_vle32_v_f32m8(const float *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vle32_v_i32mf2(const int32_t *base, size_t vl) { - return vle32_v_i32mf2(base, vl); + return __riscv_vle32_v_i32mf2(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m1( @@ -67,7 +67,7 @@ vint32mf2_t test_vle32_v_i32mf2(const int32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vle32_v_i32m1(const int32_t *base, size_t vl) { - return vle32_v_i32m1(base, vl); + return __riscv_vle32_v_i32m1(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m2( @@ -76,7 +76,7 @@ vint32m1_t test_vle32_v_i32m1(const int32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vle32_v_i32m2(const int32_t *base, size_t vl) { - return vle32_v_i32m2(base, vl); + return __riscv_vle32_v_i32m2(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m4( @@ -85,7 +85,7 @@ vint32m2_t test_vle32_v_i32m2(const int32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vle32_v_i32m4(const int32_t *base, size_t vl) { - return vle32_v_i32m4(base, vl); + return __riscv_vle32_v_i32m4(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m8( @@ -94,7 +94,7 @@ vint32m4_t test_vle32_v_i32m4(const int32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vle32_v_i32m8(const int32_t *base, size_t vl) { - return vle32_v_i32m8(base, vl); + return __riscv_vle32_v_i32m8(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32mf2( @@ -103,7 +103,7 @@ vint32m8_t test_vle32_v_i32m8(const int32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vle32_v_u32mf2(const uint32_t *base, size_t vl) { - return vle32_v_u32mf2(base, vl); + return __riscv_vle32_v_u32mf2(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m1( @@ -112,7 +112,7 @@ vuint32mf2_t test_vle32_v_u32mf2(const uint32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vle32_v_u32m1(const uint32_t *base, size_t vl) { - return vle32_v_u32m1(base, vl); + return __riscv_vle32_v_u32m1(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m2( @@ -121,7 +121,7 @@ vuint32m1_t test_vle32_v_u32m1(const uint32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vle32_v_u32m2(const uint32_t *base, size_t vl) { - return vle32_v_u32m2(base, vl); + return __riscv_vle32_v_u32m2(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m4( @@ -130,7 +130,7 @@ vuint32m2_t test_vle32_v_u32m2(const uint32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vle32_v_u32m4(const uint32_t *base, size_t vl) { - return vle32_v_u32m4(base, vl); + return __riscv_vle32_v_u32m4(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m8( @@ -139,7 +139,7 @@ vuint32m4_t test_vle32_v_u32m4(const uint32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vle32_v_u32m8(const uint32_t *base, size_t vl) { - return vle32_v_u32m8(base, vl); + return __riscv_vle32_v_u32m8(base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32mf2_m( @@ -148,7 +148,7 @@ vuint32m8_t test_vle32_v_u32m8(const uint32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vle32_v_f32mf2_m(vbool64_t mask, const float *base, size_t vl) { - return vle32_v_f32mf2_m(mask, base, vl); + return __riscv_vle32_v_f32mf2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m1_m( @@ -157,7 +157,7 @@ vfloat32mf2_t test_vle32_v_f32mf2_m(vbool64_t mask, const float *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vle32_v_f32m1_m(vbool32_t mask, const float *base, size_t vl) { - return vle32_v_f32m1_m(mask, base, vl); + return __riscv_vle32_v_f32m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m2_m( @@ -166,7 +166,7 @@ vfloat32m1_t test_vle32_v_f32m1_m(vbool32_t mask, const float *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vle32_v_f32m2_m(vbool16_t mask, const float *base, size_t vl) { - return vle32_v_f32m2_m(mask, base, vl); + return __riscv_vle32_v_f32m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m4_m( @@ -175,7 +175,7 @@ vfloat32m2_t test_vle32_v_f32m2_m(vbool16_t mask, const float *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vle32_v_f32m4_m(vbool8_t mask, const float *base, size_t vl) { - return vle32_v_f32m4_m(mask, base, vl); + return __riscv_vle32_v_f32m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m8_m( @@ -184,7 +184,7 @@ vfloat32m4_t test_vle32_v_f32m4_m(vbool8_t mask, const float *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vle32_v_f32m8_m(vbool4_t mask, const float *base, size_t vl) { - return vle32_v_f32m8_m(mask, base, vl); + return __riscv_vle32_v_f32m8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32mf2_m( @@ -193,7 +193,7 @@ vfloat32m8_t test_vle32_v_f32m8_m(vbool4_t mask, const float *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vle32_v_i32mf2_m(vbool64_t mask, const int32_t *base, size_t vl) { - return vle32_v_i32mf2_m(mask, base, vl); + return __riscv_vle32_v_i32mf2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m1_m( @@ -202,7 +202,7 @@ vint32mf2_t test_vle32_v_i32mf2_m(vbool64_t mask, const int32_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vle32_v_i32m1_m(vbool32_t mask, const int32_t *base, size_t vl) { - return vle32_v_i32m1_m(mask, base, vl); + return __riscv_vle32_v_i32m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m2_m( @@ -211,7 +211,7 @@ vint32m1_t test_vle32_v_i32m1_m(vbool32_t mask, const int32_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vle32_v_i32m2_m(vbool16_t mask, const int32_t *base, size_t vl) { - return vle32_v_i32m2_m(mask, base, vl); + return __riscv_vle32_v_i32m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m4_m( @@ -220,7 +220,7 @@ vint32m2_t test_vle32_v_i32m2_m(vbool16_t mask, const int32_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vle32_v_i32m4_m(vbool8_t mask, const int32_t *base, size_t vl) { - return vle32_v_i32m4_m(mask, base, vl); + return __riscv_vle32_v_i32m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m8_m( @@ -229,7 +229,7 @@ vint32m4_t test_vle32_v_i32m4_m(vbool8_t mask, const int32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vle32_v_i32m8_m(vbool4_t mask, const int32_t *base, size_t vl) { - return vle32_v_i32m8_m(mask, base, vl); + return __riscv_vle32_v_i32m8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32mf2_m( @@ -238,7 +238,7 @@ vint32m8_t test_vle32_v_i32m8_m(vbool4_t mask, const int32_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vle32_v_u32mf2_m(vbool64_t mask, const uint32_t *base, size_t vl) { - return vle32_v_u32mf2_m(mask, base, vl); + return __riscv_vle32_v_u32mf2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m1_m( @@ -247,7 +247,7 @@ vuint32mf2_t test_vle32_v_u32mf2_m(vbool64_t mask, const uint32_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vle32_v_u32m1_m(vbool32_t mask, const uint32_t *base, size_t vl) { - return vle32_v_u32m1_m(mask, base, vl); + return __riscv_vle32_v_u32m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m2_m( @@ -256,7 +256,7 @@ vuint32m1_t test_vle32_v_u32m1_m(vbool32_t mask, const uint32_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vle32_v_u32m2_m(vbool16_t mask, const uint32_t *base, size_t vl) { - return vle32_v_u32m2_m(mask, base, vl); + return __riscv_vle32_v_u32m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m4_m( @@ -265,7 +265,7 @@ vuint32m2_t test_vle32_v_u32m2_m(vbool16_t mask, const uint32_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vle32_v_u32m4_m(vbool8_t mask, const uint32_t *base, size_t vl) { - return vle32_v_u32m4_m(mask, base, vl); + return __riscv_vle32_v_u32m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m8_m( @@ -274,6 +274,6 @@ vuint32m4_t test_vle32_v_u32m4_m(vbool8_t mask, const uint32_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vle32_v_u32m8_m(vbool4_t mask, const uint32_t *base, size_t vl) { - return vle32_v_u32m8_m(mask, base, vl); + return __riscv_vle32_v_u32m8_m(mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle32ff.c index 11ae11c5a9b18a615ba37a650fdb1284f95ff6b9..c5d21ec26f2aedced4071b5c596d2e4b7a542b1a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle32ff.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32mf2_t test_vle32ff_v_f32mf2(const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32mf2(base, new_vl, vl); + return __riscv_vle32ff_v_f32mf2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m1( @@ -28,7 +28,7 @@ vfloat32mf2_t test_vle32ff_v_f32mf2(const float *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m1_t test_vle32ff_v_f32m1(const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m1(base, new_vl, vl); + return __riscv_vle32ff_v_f32m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m2( @@ -40,7 +40,7 @@ vfloat32m1_t test_vle32ff_v_f32m1(const float *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m2_t test_vle32ff_v_f32m2(const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m2(base, new_vl, vl); + return __riscv_vle32ff_v_f32m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m4( @@ -52,7 +52,7 @@ vfloat32m2_t test_vle32ff_v_f32m2(const float *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m4_t test_vle32ff_v_f32m4(const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m4(base, new_vl, vl); + return __riscv_vle32ff_v_f32m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m8( @@ -64,7 +64,7 @@ vfloat32m4_t test_vle32ff_v_f32m4(const float *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m8_t test_vle32ff_v_f32m8(const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m8(base, new_vl, vl); + return __riscv_vle32ff_v_f32m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32mf2( @@ -76,7 +76,7 @@ vfloat32m8_t test_vle32ff_v_f32m8(const float *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint32mf2_t test_vle32ff_v_i32mf2(const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32mf2(base, new_vl, vl); + return __riscv_vle32ff_v_i32mf2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m1( @@ -88,7 +88,7 @@ vint32mf2_t test_vle32ff_v_i32mf2(const int32_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m1_t test_vle32ff_v_i32m1(const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m1(base, new_vl, vl); + return __riscv_vle32ff_v_i32m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m2( @@ -100,7 +100,7 @@ vint32m1_t test_vle32ff_v_i32m1(const int32_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m2_t test_vle32ff_v_i32m2(const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m2(base, new_vl, vl); + return __riscv_vle32ff_v_i32m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m4( @@ -112,7 +112,7 @@ vint32m2_t test_vle32ff_v_i32m2(const int32_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m4_t test_vle32ff_v_i32m4(const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m4(base, new_vl, vl); + return __riscv_vle32ff_v_i32m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m8( @@ -124,7 +124,7 @@ vint32m4_t test_vle32ff_v_i32m4(const int32_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m8_t test_vle32ff_v_i32m8(const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m8(base, new_vl, vl); + return __riscv_vle32ff_v_i32m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32mf2( @@ -136,7 +136,7 @@ vint32m8_t test_vle32ff_v_i32m8(const int32_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32mf2_t test_vle32ff_v_u32mf2(const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32mf2(base, new_vl, vl); + return __riscv_vle32ff_v_u32mf2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m1( @@ -148,7 +148,7 @@ vuint32mf2_t test_vle32ff_v_u32mf2(const uint32_t *base, size_t *new_vl, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m1_t test_vle32ff_v_u32m1(const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m1(base, new_vl, vl); + return __riscv_vle32ff_v_u32m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m2( @@ -160,7 +160,7 @@ vuint32m1_t test_vle32ff_v_u32m1(const uint32_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m2_t test_vle32ff_v_u32m2(const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m2(base, new_vl, vl); + return __riscv_vle32ff_v_u32m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m4( @@ -172,7 +172,7 @@ vuint32m2_t test_vle32ff_v_u32m2(const uint32_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m4_t test_vle32ff_v_u32m4(const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m4(base, new_vl, vl); + return __riscv_vle32ff_v_u32m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m8( @@ -184,7 +184,7 @@ vuint32m4_t test_vle32ff_v_u32m4(const uint32_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m8_t test_vle32ff_v_u32m8(const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m8(base, new_vl, vl); + return __riscv_vle32ff_v_u32m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32mf2_m( @@ -196,7 +196,7 @@ vuint32m8_t test_vle32ff_v_u32m8(const uint32_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32mf2_t test_vle32ff_v_f32mf2_m(vbool64_t mask, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32mf2_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_f32mf2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m1_m( @@ -208,7 +208,7 @@ vfloat32mf2_t test_vle32ff_v_f32mf2_m(vbool64_t mask, const float *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m1_t test_vle32ff_v_f32m1_m(vbool32_t mask, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m1_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_f32m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m2_m( @@ -220,7 +220,7 @@ vfloat32m1_t test_vle32ff_v_f32m1_m(vbool32_t mask, const float *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m2_t test_vle32ff_v_f32m2_m(vbool16_t mask, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m2_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_f32m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m4_m( @@ -232,7 +232,7 @@ vfloat32m2_t test_vle32ff_v_f32m2_m(vbool16_t mask, const float *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m4_t test_vle32ff_v_f32m4_m(vbool8_t mask, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m4_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_f32m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m8_m( @@ -244,7 +244,7 @@ vfloat32m4_t test_vle32ff_v_f32m4_m(vbool8_t mask, const float *base, size_t *ne // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m8_t test_vle32ff_v_f32m8_m(vbool4_t mask, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m8_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_f32m8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32mf2_m( @@ -256,7 +256,7 @@ vfloat32m8_t test_vle32ff_v_f32m8_m(vbool4_t mask, const float *base, size_t *ne // CHECK-RV64-NEXT: ret [[TMP1]] // vint32mf2_t test_vle32ff_v_i32mf2_m(vbool64_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32mf2_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_i32mf2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m1_m( @@ -268,7 +268,7 @@ vint32mf2_t test_vle32ff_v_i32mf2_m(vbool64_t mask, const int32_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m1_t test_vle32ff_v_i32m1_m(vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m1_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_i32m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m2_m( @@ -280,7 +280,7 @@ vint32m1_t test_vle32ff_v_i32m1_m(vbool32_t mask, const int32_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m2_t test_vle32ff_v_i32m2_m(vbool16_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m2_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_i32m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m4_m( @@ -292,7 +292,7 @@ vint32m2_t test_vle32ff_v_i32m2_m(vbool16_t mask, const int32_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m4_t test_vle32ff_v_i32m4_m(vbool8_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m4_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_i32m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m8_m( @@ -304,7 +304,7 @@ vint32m4_t test_vle32ff_v_i32m4_m(vbool8_t mask, const int32_t *base, size_t *ne // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m8_t test_vle32ff_v_i32m8_m(vbool4_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m8_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_i32m8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32mf2_m( @@ -316,7 +316,7 @@ vint32m8_t test_vle32ff_v_i32m8_m(vbool4_t mask, const int32_t *base, size_t *ne // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32mf2_t test_vle32ff_v_u32mf2_m(vbool64_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32mf2_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_u32mf2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m1_m( @@ -328,7 +328,7 @@ vuint32mf2_t test_vle32ff_v_u32mf2_m(vbool64_t mask, const uint32_t *base, size_ // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m1_t test_vle32ff_v_u32m1_m(vbool32_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m1_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_u32m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m2_m( @@ -340,7 +340,7 @@ vuint32m1_t test_vle32ff_v_u32m1_m(vbool32_t mask, const uint32_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m2_t test_vle32ff_v_u32m2_m(vbool16_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m2_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_u32m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m4_m( @@ -352,7 +352,7 @@ vuint32m2_t test_vle32ff_v_u32m2_m(vbool16_t mask, const uint32_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m4_t test_vle32ff_v_u32m4_m(vbool8_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m4_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_u32m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m8_m( @@ -364,6 +364,6 @@ vuint32m4_t test_vle32ff_v_u32m4_m(vbool8_t mask, const uint32_t *base, size_t * // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m8_t test_vle32ff_v_u32m8_m(vbool4_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m8_m(mask, base, new_vl, vl); + return __riscv_vle32ff_v_u32m8_m(mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle64.c index f3407ce89ea5c8b106ce7490f741c4a1de3098d0..4c48eb4590c7f0fc3b00907dfa42ac28f293faf0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vle64_v_f64m1(const double *base, size_t vl) { - return vle64_v_f64m1(base, vl); + return __riscv_vle64_v_f64m1(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m2( @@ -22,7 +22,7 @@ vfloat64m1_t test_vle64_v_f64m1(const double *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vle64_v_f64m2(const double *base, size_t vl) { - return vle64_v_f64m2(base, vl); + return __riscv_vle64_v_f64m2(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m4( @@ -31,7 +31,7 @@ vfloat64m2_t test_vle64_v_f64m2(const double *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vle64_v_f64m4(const double *base, size_t vl) { - return vle64_v_f64m4(base, vl); + return __riscv_vle64_v_f64m4(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m8( @@ -40,7 +40,7 @@ vfloat64m4_t test_vle64_v_f64m4(const double *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vle64_v_f64m8(const double *base, size_t vl) { - return vle64_v_f64m8(base, vl); + return __riscv_vle64_v_f64m8(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m1( @@ -49,7 +49,7 @@ vfloat64m8_t test_vle64_v_f64m8(const double *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vle64_v_i64m1(const int64_t *base, size_t vl) { - return vle64_v_i64m1(base, vl); + return __riscv_vle64_v_i64m1(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m2( @@ -58,7 +58,7 @@ vint64m1_t test_vle64_v_i64m1(const int64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vle64_v_i64m2(const int64_t *base, size_t vl) { - return vle64_v_i64m2(base, vl); + return __riscv_vle64_v_i64m2(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m4( @@ -67,7 +67,7 @@ vint64m2_t test_vle64_v_i64m2(const int64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vle64_v_i64m4(const int64_t *base, size_t vl) { - return vle64_v_i64m4(base, vl); + return __riscv_vle64_v_i64m4(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m8( @@ -76,7 +76,7 @@ vint64m4_t test_vle64_v_i64m4(const int64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vle64_v_i64m8(const int64_t *base, size_t vl) { - return vle64_v_i64m8(base, vl); + return __riscv_vle64_v_i64m8(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m1( @@ -85,7 +85,7 @@ vint64m8_t test_vle64_v_i64m8(const int64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vle64_v_u64m1(const uint64_t *base, size_t vl) { - return vle64_v_u64m1(base, vl); + return __riscv_vle64_v_u64m1(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m2( @@ -94,7 +94,7 @@ vuint64m1_t test_vle64_v_u64m1(const uint64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vle64_v_u64m2(const uint64_t *base, size_t vl) { - return vle64_v_u64m2(base, vl); + return __riscv_vle64_v_u64m2(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m4( @@ -103,7 +103,7 @@ vuint64m2_t test_vle64_v_u64m2(const uint64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vle64_v_u64m4(const uint64_t *base, size_t vl) { - return vle64_v_u64m4(base, vl); + return __riscv_vle64_v_u64m4(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m8( @@ -112,7 +112,7 @@ vuint64m4_t test_vle64_v_u64m4(const uint64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vle64_v_u64m8(const uint64_t *base, size_t vl) { - return vle64_v_u64m8(base, vl); + return __riscv_vle64_v_u64m8(base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m1_m( @@ -121,7 +121,7 @@ vuint64m8_t test_vle64_v_u64m8(const uint64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vle64_v_f64m1_m(vbool64_t mask, const double *base, size_t vl) { - return vle64_v_f64m1_m(mask, base, vl); + return __riscv_vle64_v_f64m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m2_m( @@ -130,7 +130,7 @@ vfloat64m1_t test_vle64_v_f64m1_m(vbool64_t mask, const double *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vle64_v_f64m2_m(vbool32_t mask, const double *base, size_t vl) { - return vle64_v_f64m2_m(mask, base, vl); + return __riscv_vle64_v_f64m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m4_m( @@ -139,7 +139,7 @@ vfloat64m2_t test_vle64_v_f64m2_m(vbool32_t mask, const double *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vle64_v_f64m4_m(vbool16_t mask, const double *base, size_t vl) { - return vle64_v_f64m4_m(mask, base, vl); + return __riscv_vle64_v_f64m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m8_m( @@ -148,7 +148,7 @@ vfloat64m4_t test_vle64_v_f64m4_m(vbool16_t mask, const double *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vle64_v_f64m8_m(vbool8_t mask, const double *base, size_t vl) { - return vle64_v_f64m8_m(mask, base, vl); + return __riscv_vle64_v_f64m8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m1_m( @@ -157,7 +157,7 @@ vfloat64m8_t test_vle64_v_f64m8_m(vbool8_t mask, const double *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vle64_v_i64m1_m(vbool64_t mask, const int64_t *base, size_t vl) { - return vle64_v_i64m1_m(mask, base, vl); + return __riscv_vle64_v_i64m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m2_m( @@ -166,7 +166,7 @@ vint64m1_t test_vle64_v_i64m1_m(vbool64_t mask, const int64_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vle64_v_i64m2_m(vbool32_t mask, const int64_t *base, size_t vl) { - return vle64_v_i64m2_m(mask, base, vl); + return __riscv_vle64_v_i64m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m4_m( @@ -175,7 +175,7 @@ vint64m2_t test_vle64_v_i64m2_m(vbool32_t mask, const int64_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vle64_v_i64m4_m(vbool16_t mask, const int64_t *base, size_t vl) { - return vle64_v_i64m4_m(mask, base, vl); + return __riscv_vle64_v_i64m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m8_m( @@ -184,7 +184,7 @@ vint64m4_t test_vle64_v_i64m4_m(vbool16_t mask, const int64_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vle64_v_i64m8_m(vbool8_t mask, const int64_t *base, size_t vl) { - return vle64_v_i64m8_m(mask, base, vl); + return __riscv_vle64_v_i64m8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m1_m( @@ -193,7 +193,7 @@ vint64m8_t test_vle64_v_i64m8_m(vbool8_t mask, const int64_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vle64_v_u64m1_m(vbool64_t mask, const uint64_t *base, size_t vl) { - return vle64_v_u64m1_m(mask, base, vl); + return __riscv_vle64_v_u64m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m2_m( @@ -202,7 +202,7 @@ vuint64m1_t test_vle64_v_u64m1_m(vbool64_t mask, const uint64_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vle64_v_u64m2_m(vbool32_t mask, const uint64_t *base, size_t vl) { - return vle64_v_u64m2_m(mask, base, vl); + return __riscv_vle64_v_u64m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m4_m( @@ -211,7 +211,7 @@ vuint64m2_t test_vle64_v_u64m2_m(vbool32_t mask, const uint64_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vle64_v_u64m4_m(vbool16_t mask, const uint64_t *base, size_t vl) { - return vle64_v_u64m4_m(mask, base, vl); + return __riscv_vle64_v_u64m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m8_m( @@ -220,6 +220,6 @@ vuint64m4_t test_vle64_v_u64m4_m(vbool16_t mask, const uint64_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vle64_v_u64m8_m(vbool8_t mask, const uint64_t *base, size_t vl) { - return vle64_v_u64m8_m(mask, base, vl); + return __riscv_vle64_v_u64m8_m(mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle64ff.c index 1720535ae37d8328802bc0361c2e638da459358a..e426b7177a08b02f307170f837aa7ea122ab7d7c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle64ff.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m1_t test_vle64ff_v_f64m1(const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m1(base, new_vl, vl); + return __riscv_vle64ff_v_f64m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m2( @@ -28,7 +28,7 @@ vfloat64m1_t test_vle64ff_v_f64m1(const double *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m2_t test_vle64ff_v_f64m2(const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m2(base, new_vl, vl); + return __riscv_vle64ff_v_f64m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m4( @@ -40,7 +40,7 @@ vfloat64m2_t test_vle64ff_v_f64m2(const double *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m4_t test_vle64ff_v_f64m4(const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m4(base, new_vl, vl); + return __riscv_vle64ff_v_f64m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m8( @@ -52,7 +52,7 @@ vfloat64m4_t test_vle64ff_v_f64m4(const double *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m8_t test_vle64ff_v_f64m8(const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m8(base, new_vl, vl); + return __riscv_vle64ff_v_f64m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m1( @@ -64,7 +64,7 @@ vfloat64m8_t test_vle64ff_v_f64m8(const double *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m1_t test_vle64ff_v_i64m1(const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m1(base, new_vl, vl); + return __riscv_vle64ff_v_i64m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m2( @@ -76,7 +76,7 @@ vint64m1_t test_vle64ff_v_i64m1(const int64_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m2_t test_vle64ff_v_i64m2(const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m2(base, new_vl, vl); + return __riscv_vle64ff_v_i64m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m4( @@ -88,7 +88,7 @@ vint64m2_t test_vle64ff_v_i64m2(const int64_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m4_t test_vle64ff_v_i64m4(const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m4(base, new_vl, vl); + return __riscv_vle64ff_v_i64m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m8( @@ -100,7 +100,7 @@ vint64m4_t test_vle64ff_v_i64m4(const int64_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m8_t test_vle64ff_v_i64m8(const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m8(base, new_vl, vl); + return __riscv_vle64ff_v_i64m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m1( @@ -112,7 +112,7 @@ vint64m8_t test_vle64ff_v_i64m8(const int64_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m1_t test_vle64ff_v_u64m1(const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m1(base, new_vl, vl); + return __riscv_vle64ff_v_u64m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m2( @@ -124,7 +124,7 @@ vuint64m1_t test_vle64ff_v_u64m1(const uint64_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m2_t test_vle64ff_v_u64m2(const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m2(base, new_vl, vl); + return __riscv_vle64ff_v_u64m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m4( @@ -136,7 +136,7 @@ vuint64m2_t test_vle64ff_v_u64m2(const uint64_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m4_t test_vle64ff_v_u64m4(const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m4(base, new_vl, vl); + return __riscv_vle64ff_v_u64m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m8( @@ -148,7 +148,7 @@ vuint64m4_t test_vle64ff_v_u64m4(const uint64_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m8_t test_vle64ff_v_u64m8(const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m8(base, new_vl, vl); + return __riscv_vle64ff_v_u64m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m1_m( @@ -160,7 +160,7 @@ vuint64m8_t test_vle64ff_v_u64m8(const uint64_t *base, size_t *new_vl, size_t vl // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m1_t test_vle64ff_v_f64m1_m(vbool64_t mask, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m1_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_f64m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m2_m( @@ -172,7 +172,7 @@ vfloat64m1_t test_vle64ff_v_f64m1_m(vbool64_t mask, const double *base, size_t * // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m2_t test_vle64ff_v_f64m2_m(vbool32_t mask, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m2_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_f64m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m4_m( @@ -184,7 +184,7 @@ vfloat64m2_t test_vle64ff_v_f64m2_m(vbool32_t mask, const double *base, size_t * // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m4_t test_vle64ff_v_f64m4_m(vbool16_t mask, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m4_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_f64m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m8_m( @@ -196,7 +196,7 @@ vfloat64m4_t test_vle64ff_v_f64m4_m(vbool16_t mask, const double *base, size_t * // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m8_t test_vle64ff_v_f64m8_m(vbool8_t mask, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m8_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_f64m8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m1_m( @@ -208,7 +208,7 @@ vfloat64m8_t test_vle64ff_v_f64m8_m(vbool8_t mask, const double *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m1_t test_vle64ff_v_i64m1_m(vbool64_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m1_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_i64m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m2_m( @@ -220,7 +220,7 @@ vint64m1_t test_vle64ff_v_i64m1_m(vbool64_t mask, const int64_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m2_t test_vle64ff_v_i64m2_m(vbool32_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m2_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_i64m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m4_m( @@ -232,7 +232,7 @@ vint64m2_t test_vle64ff_v_i64m2_m(vbool32_t mask, const int64_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m4_t test_vle64ff_v_i64m4_m(vbool16_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m4_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_i64m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m8_m( @@ -244,7 +244,7 @@ vint64m4_t test_vle64ff_v_i64m4_m(vbool16_t mask, const int64_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m8_t test_vle64ff_v_i64m8_m(vbool8_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m8_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_i64m8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m1_m( @@ -256,7 +256,7 @@ vint64m8_t test_vle64ff_v_i64m8_m(vbool8_t mask, const int64_t *base, size_t *ne // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m1_t test_vle64ff_v_u64m1_m(vbool64_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m1_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_u64m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m2_m( @@ -268,7 +268,7 @@ vuint64m1_t test_vle64ff_v_u64m1_m(vbool64_t mask, const uint64_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m2_t test_vle64ff_v_u64m2_m(vbool32_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m2_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_u64m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m4_m( @@ -280,7 +280,7 @@ vuint64m2_t test_vle64ff_v_u64m2_m(vbool32_t mask, const uint64_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m4_t test_vle64ff_v_u64m4_m(vbool16_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m4_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_u64m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m8_m( @@ -292,6 +292,6 @@ vuint64m4_t test_vle64ff_v_u64m4_m(vbool16_t mask, const uint64_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m8_t test_vle64ff_v_u64m8_m(vbool8_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m8_m(mask, base, new_vl, vl); + return __riscv_vle64ff_v_u64m8_m(mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle8.c index 9896542d185a819f14c5bbb678698e1aab07588e..96671d946dcea4a897d45e644a1c34e19db2186b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vle8_v_i8mf8(const int8_t *base, size_t vl) { - return vle8_v_i8mf8(base, vl); + return __riscv_vle8_v_i8mf8(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf4( @@ -22,7 +22,7 @@ vint8mf8_t test_vle8_v_i8mf8(const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vle8_v_i8mf4(const int8_t *base, size_t vl) { - return vle8_v_i8mf4(base, vl); + return __riscv_vle8_v_i8mf4(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf2( @@ -31,7 +31,7 @@ vint8mf4_t test_vle8_v_i8mf4(const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vle8_v_i8mf2(const int8_t *base, size_t vl) { - return vle8_v_i8mf2(base, vl); + return __riscv_vle8_v_i8mf2(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m1( @@ -40,7 +40,7 @@ vint8mf2_t test_vle8_v_i8mf2(const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vle8_v_i8m1(const int8_t *base, size_t vl) { - return vle8_v_i8m1(base, vl); + return __riscv_vle8_v_i8m1(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m2( @@ -49,7 +49,7 @@ vint8m1_t test_vle8_v_i8m1(const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vle8_v_i8m2(const int8_t *base, size_t vl) { - return vle8_v_i8m2(base, vl); + return __riscv_vle8_v_i8m2(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m4( @@ -58,7 +58,7 @@ vint8m2_t test_vle8_v_i8m2(const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vle8_v_i8m4(const int8_t *base, size_t vl) { - return vle8_v_i8m4(base, vl); + return __riscv_vle8_v_i8m4(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m8( @@ -67,7 +67,7 @@ vint8m4_t test_vle8_v_i8m4(const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vle8_v_i8m8(const int8_t *base, size_t vl) { - return vle8_v_i8m8(base, vl); + return __riscv_vle8_v_i8m8(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf8( @@ -76,7 +76,7 @@ vint8m8_t test_vle8_v_i8m8(const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vle8_v_u8mf8(const uint8_t *base, size_t vl) { - return vle8_v_u8mf8(base, vl); + return __riscv_vle8_v_u8mf8(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf4( @@ -85,7 +85,7 @@ vuint8mf8_t test_vle8_v_u8mf8(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vle8_v_u8mf4(const uint8_t *base, size_t vl) { - return vle8_v_u8mf4(base, vl); + return __riscv_vle8_v_u8mf4(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf2( @@ -94,7 +94,7 @@ vuint8mf4_t test_vle8_v_u8mf4(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vle8_v_u8mf2(const uint8_t *base, size_t vl) { - return vle8_v_u8mf2(base, vl); + return __riscv_vle8_v_u8mf2(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m1( @@ -103,7 +103,7 @@ vuint8mf2_t test_vle8_v_u8mf2(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vle8_v_u8m1(const uint8_t *base, size_t vl) { - return vle8_v_u8m1(base, vl); + return __riscv_vle8_v_u8m1(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m2( @@ -112,7 +112,7 @@ vuint8m1_t test_vle8_v_u8m1(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vle8_v_u8m2(const uint8_t *base, size_t vl) { - return vle8_v_u8m2(base, vl); + return __riscv_vle8_v_u8m2(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m4( @@ -121,7 +121,7 @@ vuint8m2_t test_vle8_v_u8m2(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vle8_v_u8m4(const uint8_t *base, size_t vl) { - return vle8_v_u8m4(base, vl); + return __riscv_vle8_v_u8m4(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m8( @@ -130,7 +130,7 @@ vuint8m4_t test_vle8_v_u8m4(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vle8_v_u8m8(const uint8_t *base, size_t vl) { - return vle8_v_u8m8(base, vl); + return __riscv_vle8_v_u8m8(base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf8_m( @@ -139,7 +139,7 @@ vuint8m8_t test_vle8_v_u8m8(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vle8_v_i8mf8_m(vbool64_t mask, const int8_t *base, size_t vl) { - return vle8_v_i8mf8_m(mask, base, vl); + return __riscv_vle8_v_i8mf8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf4_m( @@ -148,7 +148,7 @@ vint8mf8_t test_vle8_v_i8mf8_m(vbool64_t mask, const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vle8_v_i8mf4_m(vbool32_t mask, const int8_t *base, size_t vl) { - return vle8_v_i8mf4_m(mask, base, vl); + return __riscv_vle8_v_i8mf4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf2_m( @@ -157,7 +157,7 @@ vint8mf4_t test_vle8_v_i8mf4_m(vbool32_t mask, const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vle8_v_i8mf2_m(vbool16_t mask, const int8_t *base, size_t vl) { - return vle8_v_i8mf2_m(mask, base, vl); + return __riscv_vle8_v_i8mf2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m1_m( @@ -166,7 +166,7 @@ vint8mf2_t test_vle8_v_i8mf2_m(vbool16_t mask, const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vle8_v_i8m1_m(vbool8_t mask, const int8_t *base, size_t vl) { - return vle8_v_i8m1_m(mask, base, vl); + return __riscv_vle8_v_i8m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m2_m( @@ -175,7 +175,7 @@ vint8m1_t test_vle8_v_i8m1_m(vbool8_t mask, const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vle8_v_i8m2_m(vbool4_t mask, const int8_t *base, size_t vl) { - return vle8_v_i8m2_m(mask, base, vl); + return __riscv_vle8_v_i8m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m4_m( @@ -184,7 +184,7 @@ vint8m2_t test_vle8_v_i8m2_m(vbool4_t mask, const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vle8_v_i8m4_m(vbool2_t mask, const int8_t *base, size_t vl) { - return vle8_v_i8m4_m(mask, base, vl); + return __riscv_vle8_v_i8m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m8_m( @@ -193,7 +193,7 @@ vint8m4_t test_vle8_v_i8m4_m(vbool2_t mask, const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vle8_v_i8m8_m(vbool1_t mask, const int8_t *base, size_t vl) { - return vle8_v_i8m8_m(mask, base, vl); + return __riscv_vle8_v_i8m8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf8_m( @@ -202,7 +202,7 @@ vint8m8_t test_vle8_v_i8m8_m(vbool1_t mask, const int8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vle8_v_u8mf8_m(vbool64_t mask, const uint8_t *base, size_t vl) { - return vle8_v_u8mf8_m(mask, base, vl); + return __riscv_vle8_v_u8mf8_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf4_m( @@ -211,7 +211,7 @@ vuint8mf8_t test_vle8_v_u8mf8_m(vbool64_t mask, const uint8_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vle8_v_u8mf4_m(vbool32_t mask, const uint8_t *base, size_t vl) { - return vle8_v_u8mf4_m(mask, base, vl); + return __riscv_vle8_v_u8mf4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf2_m( @@ -220,7 +220,7 @@ vuint8mf4_t test_vle8_v_u8mf4_m(vbool32_t mask, const uint8_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vle8_v_u8mf2_m(vbool16_t mask, const uint8_t *base, size_t vl) { - return vle8_v_u8mf2_m(mask, base, vl); + return __riscv_vle8_v_u8mf2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m1_m( @@ -229,7 +229,7 @@ vuint8mf2_t test_vle8_v_u8mf2_m(vbool16_t mask, const uint8_t *base, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vle8_v_u8m1_m(vbool8_t mask, const uint8_t *base, size_t vl) { - return vle8_v_u8m1_m(mask, base, vl); + return __riscv_vle8_v_u8m1_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m2_m( @@ -238,7 +238,7 @@ vuint8m1_t test_vle8_v_u8m1_m(vbool8_t mask, const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vle8_v_u8m2_m(vbool4_t mask, const uint8_t *base, size_t vl) { - return vle8_v_u8m2_m(mask, base, vl); + return __riscv_vle8_v_u8m2_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m4_m( @@ -247,7 +247,7 @@ vuint8m2_t test_vle8_v_u8m2_m(vbool4_t mask, const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vle8_v_u8m4_m(vbool2_t mask, const uint8_t *base, size_t vl) { - return vle8_v_u8m4_m(mask, base, vl); + return __riscv_vle8_v_u8m4_m(mask, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m8_m( @@ -256,6 +256,6 @@ vuint8m4_t test_vle8_v_u8m4_m(vbool2_t mask, const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vle8_v_u8m8_m(vbool1_t mask, const uint8_t *base, size_t vl) { - return vle8_v_u8m8_m(mask, base, vl); + return __riscv_vle8_v_u8m8_m(mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle8ff.c index 0704a8bfceaf83d951f50d992781a113d51fdc48..2ef54cc392d0aef78fa6a4faaa9430112ec607e0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vle8ff.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf8_t test_vle8ff_v_i8mf8(const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf8(base, new_vl, vl); + return __riscv_vle8ff_v_i8mf8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf4( @@ -28,7 +28,7 @@ vint8mf8_t test_vle8ff_v_i8mf8(const int8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf4_t test_vle8ff_v_i8mf4(const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf4(base, new_vl, vl); + return __riscv_vle8ff_v_i8mf4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf2( @@ -40,7 +40,7 @@ vint8mf4_t test_vle8ff_v_i8mf4(const int8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf2_t test_vle8ff_v_i8mf2(const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf2(base, new_vl, vl); + return __riscv_vle8ff_v_i8mf2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m1( @@ -52,7 +52,7 @@ vint8mf2_t test_vle8ff_v_i8mf2(const int8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m1_t test_vle8ff_v_i8m1(const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m1(base, new_vl, vl); + return __riscv_vle8ff_v_i8m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m2( @@ -64,7 +64,7 @@ vint8m1_t test_vle8ff_v_i8m1(const int8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m2_t test_vle8ff_v_i8m2(const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m2(base, new_vl, vl); + return __riscv_vle8ff_v_i8m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m4( @@ -76,7 +76,7 @@ vint8m2_t test_vle8ff_v_i8m2(const int8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m4_t test_vle8ff_v_i8m4(const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m4(base, new_vl, vl); + return __riscv_vle8ff_v_i8m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m8( @@ -88,7 +88,7 @@ vint8m4_t test_vle8ff_v_i8m4(const int8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m8_t test_vle8ff_v_i8m8(const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m8(base, new_vl, vl); + return __riscv_vle8ff_v_i8m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf8( @@ -100,7 +100,7 @@ vint8m8_t test_vle8ff_v_i8m8(const int8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf8_t test_vle8ff_v_u8mf8(const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf8(base, new_vl, vl); + return __riscv_vle8ff_v_u8mf8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf4( @@ -112,7 +112,7 @@ vuint8mf8_t test_vle8ff_v_u8mf8(const uint8_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf4_t test_vle8ff_v_u8mf4(const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf4(base, new_vl, vl); + return __riscv_vle8ff_v_u8mf4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf2( @@ -124,7 +124,7 @@ vuint8mf4_t test_vle8ff_v_u8mf4(const uint8_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf2_t test_vle8ff_v_u8mf2(const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf2(base, new_vl, vl); + return __riscv_vle8ff_v_u8mf2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m1( @@ -136,7 +136,7 @@ vuint8mf2_t test_vle8ff_v_u8mf2(const uint8_t *base, size_t *new_vl, size_t vl) // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m1_t test_vle8ff_v_u8m1(const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m1(base, new_vl, vl); + return __riscv_vle8ff_v_u8m1(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m2( @@ -148,7 +148,7 @@ vuint8m1_t test_vle8ff_v_u8m1(const uint8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m2_t test_vle8ff_v_u8m2(const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m2(base, new_vl, vl); + return __riscv_vle8ff_v_u8m2(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m4( @@ -160,7 +160,7 @@ vuint8m2_t test_vle8ff_v_u8m2(const uint8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m4_t test_vle8ff_v_u8m4(const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m4(base, new_vl, vl); + return __riscv_vle8ff_v_u8m4(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m8( @@ -172,7 +172,7 @@ vuint8m4_t test_vle8ff_v_u8m4(const uint8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m8_t test_vle8ff_v_u8m8(const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m8(base, new_vl, vl); + return __riscv_vle8ff_v_u8m8(base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf8_m( @@ -184,7 +184,7 @@ vuint8m8_t test_vle8ff_v_u8m8(const uint8_t *base, size_t *new_vl, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf8_t test_vle8ff_v_i8mf8_m(vbool64_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf8_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf4_m( @@ -196,7 +196,7 @@ vint8mf8_t test_vle8ff_v_i8mf8_m(vbool64_t mask, const int8_t *base, size_t *new // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf4_t test_vle8ff_v_i8mf4_m(vbool32_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf4_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf2_m( @@ -208,7 +208,7 @@ vint8mf4_t test_vle8ff_v_i8mf4_m(vbool32_t mask, const int8_t *base, size_t *new // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf2_t test_vle8ff_v_i8mf2_m(vbool16_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf2_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m1_m( @@ -220,7 +220,7 @@ vint8mf2_t test_vle8ff_v_i8mf2_m(vbool16_t mask, const int8_t *base, size_t *new // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m1_t test_vle8ff_v_i8m1_m(vbool8_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m1_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_i8m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m2_m( @@ -232,7 +232,7 @@ vint8m1_t test_vle8ff_v_i8m1_m(vbool8_t mask, const int8_t *base, size_t *new_vl // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m2_t test_vle8ff_v_i8m2_m(vbool4_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m2_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_i8m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m4_m( @@ -244,7 +244,7 @@ vint8m2_t test_vle8ff_v_i8m2_m(vbool4_t mask, const int8_t *base, size_t *new_vl // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m4_t test_vle8ff_v_i8m4_m(vbool2_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m4_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_i8m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m8_m( @@ -256,7 +256,7 @@ vint8m4_t test_vle8ff_v_i8m4_m(vbool2_t mask, const int8_t *base, size_t *new_vl // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m8_t test_vle8ff_v_i8m8_m(vbool1_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m8_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_i8m8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf8_m( @@ -268,7 +268,7 @@ vint8m8_t test_vle8ff_v_i8m8_m(vbool1_t mask, const int8_t *base, size_t *new_vl // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf8_t test_vle8ff_v_u8mf8_m(vbool64_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf8_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf8_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf4_m( @@ -280,7 +280,7 @@ vuint8mf8_t test_vle8ff_v_u8mf8_m(vbool64_t mask, const uint8_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf4_t test_vle8ff_v_u8mf4_m(vbool32_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf4_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf2_m( @@ -292,7 +292,7 @@ vuint8mf4_t test_vle8ff_v_u8mf4_m(vbool32_t mask, const uint8_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf2_t test_vle8ff_v_u8mf2_m(vbool16_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf2_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m1_m( @@ -304,7 +304,7 @@ vuint8mf2_t test_vle8ff_v_u8mf2_m(vbool16_t mask, const uint8_t *base, size_t *n // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m1_t test_vle8ff_v_u8m1_m(vbool8_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m1_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_u8m1_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m2_m( @@ -316,7 +316,7 @@ vuint8m1_t test_vle8ff_v_u8m1_m(vbool8_t mask, const uint8_t *base, size_t *new_ // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m2_t test_vle8ff_v_u8m2_m(vbool4_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m2_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_u8m2_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m4_m( @@ -328,7 +328,7 @@ vuint8m2_t test_vle8ff_v_u8m2_m(vbool4_t mask, const uint8_t *base, size_t *new_ // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m4_t test_vle8ff_v_u8m4_m(vbool2_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m4_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_u8m4_m(mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m8_m( @@ -340,6 +340,6 @@ vuint8m4_t test_vle8ff_v_u8m4_m(vbool2_t mask, const uint8_t *base, size_t *new_ // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m8_t test_vle8ff_v_u8m8_m(vbool1_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m8_m(mask, base, new_vl, vl); + return __riscv_vle8ff_v_u8m8_m(mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlm.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlm.c index c82124613166f0643cc46e49a4462251bf1b1516..f3015ae64b7c3944b0a8d26fcc3311b3cbd284a1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlm.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlm.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vlm_v_b1(const uint8_t *base, size_t vl) { - return vlm_v_b1(base, vl); + return __riscv_vlm_v_b1(base, vl); } // CHECK-RV64-LABEL: @test_vlm_v_b2( @@ -21,7 +21,7 @@ vbool1_t test_vlm_v_b1(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vlm_v_b2(const uint8_t *base, size_t vl) { - return vlm_v_b2(base, vl); + return __riscv_vlm_v_b2(base, vl); } // CHECK-RV64-LABEL: @test_vlm_v_b4( @@ -30,7 +30,7 @@ vbool2_t test_vlm_v_b2(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vlm_v_b4(const uint8_t *base, size_t vl) { - return vlm_v_b4(base, vl); + return __riscv_vlm_v_b4(base, vl); } // CHECK-RV64-LABEL: @test_vlm_v_b8( @@ -39,7 +39,7 @@ vbool4_t test_vlm_v_b4(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vlm_v_b8(const uint8_t *base, size_t vl) { - return vlm_v_b8(base, vl); + return __riscv_vlm_v_b8(base, vl); } // CHECK-RV64-LABEL: @test_vlm_v_b16( @@ -48,7 +48,7 @@ vbool8_t test_vlm_v_b8(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vlm_v_b16(const uint8_t *base, size_t vl) { - return vlm_v_b16(base, vl); + return __riscv_vlm_v_b16(base, vl); } // CHECK-RV64-LABEL: @test_vlm_v_b32( @@ -57,7 +57,7 @@ vbool16_t test_vlm_v_b16(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vlm_v_b32(const uint8_t *base, size_t vl) { - return vlm_v_b32(base, vl); + return __riscv_vlm_v_b32(base, vl); } // CHECK-RV64-LABEL: @test_vlm_v_b64( @@ -66,6 +66,6 @@ vbool32_t test_vlm_v_b32(const uint8_t *base, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vlm_v_b64(const uint8_t *base, size_t vl) { - return vlm_v_b64(base, vl); + return __riscv_vlm_v_b64(base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlmul.c index 85580291d98250a1cca0ccd654eecfc780459f3a..2f9713aab4a598eca390697789cc9ebec5cd19af 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlmul.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlmul_ext_v_f16mf4_f16mf2(vfloat16mf4_t op1) { - return vlmul_ext_v_f16mf4_f16mf2(op1); + return __riscv_vlmul_ext_v_f16mf4_f16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16mf4_f16m1( @@ -22,7 +22,7 @@ vfloat16mf2_t test_vlmul_ext_v_f16mf4_f16mf2(vfloat16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlmul_ext_v_f16mf4_f16m1(vfloat16mf4_t op1) { - return vlmul_ext_v_f16mf4_f16m1(op1); + return __riscv_vlmul_ext_v_f16mf4_f16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16mf4_f16m2( @@ -31,7 +31,7 @@ vfloat16m1_t test_vlmul_ext_v_f16mf4_f16m1(vfloat16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlmul_ext_v_f16mf4_f16m2(vfloat16mf4_t op1) { - return vlmul_ext_v_f16mf4_f16m2(op1); + return __riscv_vlmul_ext_v_f16mf4_f16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16mf4_f16m4( @@ -40,7 +40,7 @@ vfloat16m2_t test_vlmul_ext_v_f16mf4_f16m2(vfloat16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlmul_ext_v_f16mf4_f16m4(vfloat16mf4_t op1) { - return vlmul_ext_v_f16mf4_f16m4(op1); + return __riscv_vlmul_ext_v_f16mf4_f16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16mf4_f16m8( @@ -49,7 +49,7 @@ vfloat16m4_t test_vlmul_ext_v_f16mf4_f16m4(vfloat16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlmul_ext_v_f16mf4_f16m8(vfloat16mf4_t op1) { - return vlmul_ext_v_f16mf4_f16m8(op1); + return __riscv_vlmul_ext_v_f16mf4_f16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16mf2_f16m1( @@ -58,7 +58,7 @@ vfloat16m8_t test_vlmul_ext_v_f16mf4_f16m8(vfloat16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlmul_ext_v_f16mf2_f16m1(vfloat16mf2_t op1) { - return vlmul_ext_v_f16mf2_f16m1(op1); + return __riscv_vlmul_ext_v_f16mf2_f16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16mf2_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vlmul_ext_v_f16mf2_f16m1(vfloat16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlmul_ext_v_f16mf2_f16m2(vfloat16mf2_t op1) { - return vlmul_ext_v_f16mf2_f16m2(op1); + return __riscv_vlmul_ext_v_f16mf2_f16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16mf2_f16m4( @@ -76,7 +76,7 @@ vfloat16m2_t test_vlmul_ext_v_f16mf2_f16m2(vfloat16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlmul_ext_v_f16mf2_f16m4(vfloat16mf2_t op1) { - return vlmul_ext_v_f16mf2_f16m4(op1); + return __riscv_vlmul_ext_v_f16mf2_f16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16mf2_f16m8( @@ -85,7 +85,7 @@ vfloat16m4_t test_vlmul_ext_v_f16mf2_f16m4(vfloat16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlmul_ext_v_f16mf2_f16m8(vfloat16mf2_t op1) { - return vlmul_ext_v_f16mf2_f16m8(op1); + return __riscv_vlmul_ext_v_f16mf2_f16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16m1_f16m2( @@ -94,7 +94,7 @@ vfloat16m8_t test_vlmul_ext_v_f16mf2_f16m8(vfloat16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlmul_ext_v_f16m1_f16m2(vfloat16m1_t op1) { - return vlmul_ext_v_f16m1_f16m2(op1); + return __riscv_vlmul_ext_v_f16m1_f16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16m1_f16m4( @@ -103,7 +103,7 @@ vfloat16m2_t test_vlmul_ext_v_f16m1_f16m2(vfloat16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlmul_ext_v_f16m1_f16m4(vfloat16m1_t op1) { - return vlmul_ext_v_f16m1_f16m4(op1); + return __riscv_vlmul_ext_v_f16m1_f16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16m1_f16m8( @@ -112,7 +112,7 @@ vfloat16m4_t test_vlmul_ext_v_f16m1_f16m4(vfloat16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlmul_ext_v_f16m1_f16m8(vfloat16m1_t op1) { - return vlmul_ext_v_f16m1_f16m8(op1); + return __riscv_vlmul_ext_v_f16m1_f16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16m2_f16m4( @@ -121,7 +121,7 @@ vfloat16m8_t test_vlmul_ext_v_f16m1_f16m8(vfloat16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlmul_ext_v_f16m2_f16m4(vfloat16m2_t op1) { - return vlmul_ext_v_f16m2_f16m4(op1); + return __riscv_vlmul_ext_v_f16m2_f16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16m2_f16m8( @@ -130,7 +130,7 @@ vfloat16m4_t test_vlmul_ext_v_f16m2_f16m4(vfloat16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlmul_ext_v_f16m2_f16m8(vfloat16m2_t op1) { - return vlmul_ext_v_f16m2_f16m8(op1); + return __riscv_vlmul_ext_v_f16m2_f16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f16m4_f16m8( @@ -139,7 +139,7 @@ vfloat16m8_t test_vlmul_ext_v_f16m2_f16m8(vfloat16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlmul_ext_v_f16m4_f16m8(vfloat16m4_t op1) { - return vlmul_ext_v_f16m4_f16m8(op1); + return __riscv_vlmul_ext_v_f16m4_f16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32mf2_f32m1( @@ -148,7 +148,7 @@ vfloat16m8_t test_vlmul_ext_v_f16m4_f16m8(vfloat16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlmul_ext_v_f32mf2_f32m1(vfloat32mf2_t op1) { - return vlmul_ext_v_f32mf2_f32m1(op1); + return __riscv_vlmul_ext_v_f32mf2_f32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32mf2_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vlmul_ext_v_f32mf2_f32m1(vfloat32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlmul_ext_v_f32mf2_f32m2(vfloat32mf2_t op1) { - return vlmul_ext_v_f32mf2_f32m2(op1); + return __riscv_vlmul_ext_v_f32mf2_f32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32mf2_f32m4( @@ -166,7 +166,7 @@ vfloat32m2_t test_vlmul_ext_v_f32mf2_f32m2(vfloat32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlmul_ext_v_f32mf2_f32m4(vfloat32mf2_t op1) { - return vlmul_ext_v_f32mf2_f32m4(op1); + return __riscv_vlmul_ext_v_f32mf2_f32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32mf2_f32m8( @@ -175,7 +175,7 @@ vfloat32m4_t test_vlmul_ext_v_f32mf2_f32m4(vfloat32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlmul_ext_v_f32mf2_f32m8(vfloat32mf2_t op1) { - return vlmul_ext_v_f32mf2_f32m8(op1); + return __riscv_vlmul_ext_v_f32mf2_f32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32m1_f32m2( @@ -184,7 +184,7 @@ vfloat32m8_t test_vlmul_ext_v_f32mf2_f32m8(vfloat32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlmul_ext_v_f32m1_f32m2(vfloat32m1_t op1) { - return vlmul_ext_v_f32m1_f32m2(op1); + return __riscv_vlmul_ext_v_f32m1_f32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32m1_f32m4( @@ -193,7 +193,7 @@ vfloat32m2_t test_vlmul_ext_v_f32m1_f32m2(vfloat32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlmul_ext_v_f32m1_f32m4(vfloat32m1_t op1) { - return vlmul_ext_v_f32m1_f32m4(op1); + return __riscv_vlmul_ext_v_f32m1_f32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32m1_f32m8( @@ -202,7 +202,7 @@ vfloat32m4_t test_vlmul_ext_v_f32m1_f32m4(vfloat32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlmul_ext_v_f32m1_f32m8(vfloat32m1_t op1) { - return vlmul_ext_v_f32m1_f32m8(op1); + return __riscv_vlmul_ext_v_f32m1_f32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32m2_f32m4( @@ -211,7 +211,7 @@ vfloat32m8_t test_vlmul_ext_v_f32m1_f32m8(vfloat32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlmul_ext_v_f32m2_f32m4(vfloat32m2_t op1) { - return vlmul_ext_v_f32m2_f32m4(op1); + return __riscv_vlmul_ext_v_f32m2_f32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32m2_f32m8( @@ -220,7 +220,7 @@ vfloat32m4_t test_vlmul_ext_v_f32m2_f32m4(vfloat32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlmul_ext_v_f32m2_f32m8(vfloat32m2_t op1) { - return vlmul_ext_v_f32m2_f32m8(op1); + return __riscv_vlmul_ext_v_f32m2_f32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f32m4_f32m8( @@ -229,7 +229,7 @@ vfloat32m8_t test_vlmul_ext_v_f32m2_f32m8(vfloat32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlmul_ext_v_f32m4_f32m8(vfloat32m4_t op1) { - return vlmul_ext_v_f32m4_f32m8(op1); + return __riscv_vlmul_ext_v_f32m4_f32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f64m1_f64m2( @@ -238,7 +238,7 @@ vfloat32m8_t test_vlmul_ext_v_f32m4_f32m8(vfloat32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlmul_ext_v_f64m1_f64m2(vfloat64m1_t op1) { - return vlmul_ext_v_f64m1_f64m2(op1); + return __riscv_vlmul_ext_v_f64m1_f64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f64m1_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vlmul_ext_v_f64m1_f64m2(vfloat64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlmul_ext_v_f64m1_f64m4(vfloat64m1_t op1) { - return vlmul_ext_v_f64m1_f64m4(op1); + return __riscv_vlmul_ext_v_f64m1_f64m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f64m1_f64m8( @@ -256,7 +256,7 @@ vfloat64m4_t test_vlmul_ext_v_f64m1_f64m4(vfloat64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlmul_ext_v_f64m1_f64m8(vfloat64m1_t op1) { - return vlmul_ext_v_f64m1_f64m8(op1); + return __riscv_vlmul_ext_v_f64m1_f64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f64m2_f64m4( @@ -265,7 +265,7 @@ vfloat64m8_t test_vlmul_ext_v_f64m1_f64m8(vfloat64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlmul_ext_v_f64m2_f64m4(vfloat64m2_t op1) { - return vlmul_ext_v_f64m2_f64m4(op1); + return __riscv_vlmul_ext_v_f64m2_f64m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f64m2_f64m8( @@ -274,7 +274,7 @@ vfloat64m4_t test_vlmul_ext_v_f64m2_f64m4(vfloat64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlmul_ext_v_f64m2_f64m8(vfloat64m2_t op1) { - return vlmul_ext_v_f64m2_f64m8(op1); + return __riscv_vlmul_ext_v_f64m2_f64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_f64m4_f64m8( @@ -283,7 +283,7 @@ vfloat64m8_t test_vlmul_ext_v_f64m2_f64m8(vfloat64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlmul_ext_v_f64m4_f64m8(vfloat64m4_t op1) { - return vlmul_ext_v_f64m4_f64m8(op1); + return __riscv_vlmul_ext_v_f64m4_f64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf8_i8mf4( @@ -292,7 +292,7 @@ vfloat64m8_t test_vlmul_ext_v_f64m4_f64m8(vfloat64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlmul_ext_v_i8mf8_i8mf4(vint8mf8_t op1) { - return vlmul_ext_v_i8mf8_i8mf4(op1); + return __riscv_vlmul_ext_v_i8mf8_i8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf8_i8mf2( @@ -301,7 +301,7 @@ vint8mf4_t test_vlmul_ext_v_i8mf8_i8mf4(vint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlmul_ext_v_i8mf8_i8mf2(vint8mf8_t op1) { - return vlmul_ext_v_i8mf8_i8mf2(op1); + return __riscv_vlmul_ext_v_i8mf8_i8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf8_i8m1( @@ -310,7 +310,7 @@ vint8mf2_t test_vlmul_ext_v_i8mf8_i8mf2(vint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlmul_ext_v_i8mf8_i8m1(vint8mf8_t op1) { - return vlmul_ext_v_i8mf8_i8m1(op1); + return __riscv_vlmul_ext_v_i8mf8_i8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf8_i8m2( @@ -319,7 +319,7 @@ vint8m1_t test_vlmul_ext_v_i8mf8_i8m1(vint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlmul_ext_v_i8mf8_i8m2(vint8mf8_t op1) { - return vlmul_ext_v_i8mf8_i8m2(op1); + return __riscv_vlmul_ext_v_i8mf8_i8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf8_i8m4( @@ -328,7 +328,7 @@ vint8m2_t test_vlmul_ext_v_i8mf8_i8m2(vint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlmul_ext_v_i8mf8_i8m4(vint8mf8_t op1) { - return vlmul_ext_v_i8mf8_i8m4(op1); + return __riscv_vlmul_ext_v_i8mf8_i8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf8_i8m8( @@ -337,7 +337,7 @@ vint8m4_t test_vlmul_ext_v_i8mf8_i8m4(vint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlmul_ext_v_i8mf8_i8m8(vint8mf8_t op1) { - return vlmul_ext_v_i8mf8_i8m8(op1); + return __riscv_vlmul_ext_v_i8mf8_i8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf4_i8mf2( @@ -346,7 +346,7 @@ vint8m8_t test_vlmul_ext_v_i8mf8_i8m8(vint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlmul_ext_v_i8mf4_i8mf2(vint8mf4_t op1) { - return vlmul_ext_v_i8mf4_i8mf2(op1); + return __riscv_vlmul_ext_v_i8mf4_i8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf4_i8m1( @@ -355,7 +355,7 @@ vint8mf2_t test_vlmul_ext_v_i8mf4_i8mf2(vint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlmul_ext_v_i8mf4_i8m1(vint8mf4_t op1) { - return vlmul_ext_v_i8mf4_i8m1(op1); + return __riscv_vlmul_ext_v_i8mf4_i8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf4_i8m2( @@ -364,7 +364,7 @@ vint8m1_t test_vlmul_ext_v_i8mf4_i8m1(vint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlmul_ext_v_i8mf4_i8m2(vint8mf4_t op1) { - return vlmul_ext_v_i8mf4_i8m2(op1); + return __riscv_vlmul_ext_v_i8mf4_i8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf4_i8m4( @@ -373,7 +373,7 @@ vint8m2_t test_vlmul_ext_v_i8mf4_i8m2(vint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlmul_ext_v_i8mf4_i8m4(vint8mf4_t op1) { - return vlmul_ext_v_i8mf4_i8m4(op1); + return __riscv_vlmul_ext_v_i8mf4_i8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf4_i8m8( @@ -382,7 +382,7 @@ vint8m4_t test_vlmul_ext_v_i8mf4_i8m4(vint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlmul_ext_v_i8mf4_i8m8(vint8mf4_t op1) { - return vlmul_ext_v_i8mf4_i8m8(op1); + return __riscv_vlmul_ext_v_i8mf4_i8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf2_i8m1( @@ -391,7 +391,7 @@ vint8m8_t test_vlmul_ext_v_i8mf4_i8m8(vint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlmul_ext_v_i8mf2_i8m1(vint8mf2_t op1) { - return vlmul_ext_v_i8mf2_i8m1(op1); + return __riscv_vlmul_ext_v_i8mf2_i8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf2_i8m2( @@ -400,7 +400,7 @@ vint8m1_t test_vlmul_ext_v_i8mf2_i8m1(vint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlmul_ext_v_i8mf2_i8m2(vint8mf2_t op1) { - return vlmul_ext_v_i8mf2_i8m2(op1); + return __riscv_vlmul_ext_v_i8mf2_i8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf2_i8m4( @@ -409,7 +409,7 @@ vint8m2_t test_vlmul_ext_v_i8mf2_i8m2(vint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlmul_ext_v_i8mf2_i8m4(vint8mf2_t op1) { - return vlmul_ext_v_i8mf2_i8m4(op1); + return __riscv_vlmul_ext_v_i8mf2_i8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8mf2_i8m8( @@ -418,7 +418,7 @@ vint8m4_t test_vlmul_ext_v_i8mf2_i8m4(vint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlmul_ext_v_i8mf2_i8m8(vint8mf2_t op1) { - return vlmul_ext_v_i8mf2_i8m8(op1); + return __riscv_vlmul_ext_v_i8mf2_i8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8m1_i8m2( @@ -427,7 +427,7 @@ vint8m8_t test_vlmul_ext_v_i8mf2_i8m8(vint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlmul_ext_v_i8m1_i8m2(vint8m1_t op1) { - return vlmul_ext_v_i8m1_i8m2(op1); + return __riscv_vlmul_ext_v_i8m1_i8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8m1_i8m4( @@ -436,7 +436,7 @@ vint8m2_t test_vlmul_ext_v_i8m1_i8m2(vint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlmul_ext_v_i8m1_i8m4(vint8m1_t op1) { - return vlmul_ext_v_i8m1_i8m4(op1); + return __riscv_vlmul_ext_v_i8m1_i8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8m1_i8m8( @@ -445,7 +445,7 @@ vint8m4_t test_vlmul_ext_v_i8m1_i8m4(vint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlmul_ext_v_i8m1_i8m8(vint8m1_t op1) { - return vlmul_ext_v_i8m1_i8m8(op1); + return __riscv_vlmul_ext_v_i8m1_i8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8m2_i8m4( @@ -454,7 +454,7 @@ vint8m8_t test_vlmul_ext_v_i8m1_i8m8(vint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlmul_ext_v_i8m2_i8m4(vint8m2_t op1) { - return vlmul_ext_v_i8m2_i8m4(op1); + return __riscv_vlmul_ext_v_i8m2_i8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8m2_i8m8( @@ -463,7 +463,7 @@ vint8m4_t test_vlmul_ext_v_i8m2_i8m4(vint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlmul_ext_v_i8m2_i8m8(vint8m2_t op1) { - return vlmul_ext_v_i8m2_i8m8(op1); + return __riscv_vlmul_ext_v_i8m2_i8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i8m4_i8m8( @@ -472,7 +472,7 @@ vint8m8_t test_vlmul_ext_v_i8m2_i8m8(vint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlmul_ext_v_i8m4_i8m8(vint8m4_t op1) { - return vlmul_ext_v_i8m4_i8m8(op1); + return __riscv_vlmul_ext_v_i8m4_i8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf4_i16mf2( @@ -481,7 +481,7 @@ vint8m8_t test_vlmul_ext_v_i8m4_i8m8(vint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlmul_ext_v_i16mf4_i16mf2(vint16mf4_t op1) { - return vlmul_ext_v_i16mf4_i16mf2(op1); + return __riscv_vlmul_ext_v_i16mf4_i16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf4_i16m1( @@ -490,7 +490,7 @@ vint16mf2_t test_vlmul_ext_v_i16mf4_i16mf2(vint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlmul_ext_v_i16mf4_i16m1(vint16mf4_t op1) { - return vlmul_ext_v_i16mf4_i16m1(op1); + return __riscv_vlmul_ext_v_i16mf4_i16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf4_i16m2( @@ -499,7 +499,7 @@ vint16m1_t test_vlmul_ext_v_i16mf4_i16m1(vint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlmul_ext_v_i16mf4_i16m2(vint16mf4_t op1) { - return vlmul_ext_v_i16mf4_i16m2(op1); + return __riscv_vlmul_ext_v_i16mf4_i16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf4_i16m4( @@ -508,7 +508,7 @@ vint16m2_t test_vlmul_ext_v_i16mf4_i16m2(vint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlmul_ext_v_i16mf4_i16m4(vint16mf4_t op1) { - return vlmul_ext_v_i16mf4_i16m4(op1); + return __riscv_vlmul_ext_v_i16mf4_i16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf4_i16m8( @@ -517,7 +517,7 @@ vint16m4_t test_vlmul_ext_v_i16mf4_i16m4(vint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlmul_ext_v_i16mf4_i16m8(vint16mf4_t op1) { - return vlmul_ext_v_i16mf4_i16m8(op1); + return __riscv_vlmul_ext_v_i16mf4_i16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf2_i16m1( @@ -526,7 +526,7 @@ vint16m8_t test_vlmul_ext_v_i16mf4_i16m8(vint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlmul_ext_v_i16mf2_i16m1(vint16mf2_t op1) { - return vlmul_ext_v_i16mf2_i16m1(op1); + return __riscv_vlmul_ext_v_i16mf2_i16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf2_i16m2( @@ -535,7 +535,7 @@ vint16m1_t test_vlmul_ext_v_i16mf2_i16m1(vint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlmul_ext_v_i16mf2_i16m2(vint16mf2_t op1) { - return vlmul_ext_v_i16mf2_i16m2(op1); + return __riscv_vlmul_ext_v_i16mf2_i16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf2_i16m4( @@ -544,7 +544,7 @@ vint16m2_t test_vlmul_ext_v_i16mf2_i16m2(vint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlmul_ext_v_i16mf2_i16m4(vint16mf2_t op1) { - return vlmul_ext_v_i16mf2_i16m4(op1); + return __riscv_vlmul_ext_v_i16mf2_i16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16mf2_i16m8( @@ -553,7 +553,7 @@ vint16m4_t test_vlmul_ext_v_i16mf2_i16m4(vint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlmul_ext_v_i16mf2_i16m8(vint16mf2_t op1) { - return vlmul_ext_v_i16mf2_i16m8(op1); + return __riscv_vlmul_ext_v_i16mf2_i16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16m1_i16m2( @@ -562,7 +562,7 @@ vint16m8_t test_vlmul_ext_v_i16mf2_i16m8(vint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlmul_ext_v_i16m1_i16m2(vint16m1_t op1) { - return vlmul_ext_v_i16m1_i16m2(op1); + return __riscv_vlmul_ext_v_i16m1_i16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16m1_i16m4( @@ -571,7 +571,7 @@ vint16m2_t test_vlmul_ext_v_i16m1_i16m2(vint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlmul_ext_v_i16m1_i16m4(vint16m1_t op1) { - return vlmul_ext_v_i16m1_i16m4(op1); + return __riscv_vlmul_ext_v_i16m1_i16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16m1_i16m8( @@ -580,7 +580,7 @@ vint16m4_t test_vlmul_ext_v_i16m1_i16m4(vint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlmul_ext_v_i16m1_i16m8(vint16m1_t op1) { - return vlmul_ext_v_i16m1_i16m8(op1); + return __riscv_vlmul_ext_v_i16m1_i16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16m2_i16m4( @@ -589,7 +589,7 @@ vint16m8_t test_vlmul_ext_v_i16m1_i16m8(vint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlmul_ext_v_i16m2_i16m4(vint16m2_t op1) { - return vlmul_ext_v_i16m2_i16m4(op1); + return __riscv_vlmul_ext_v_i16m2_i16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16m2_i16m8( @@ -598,7 +598,7 @@ vint16m4_t test_vlmul_ext_v_i16m2_i16m4(vint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlmul_ext_v_i16m2_i16m8(vint16m2_t op1) { - return vlmul_ext_v_i16m2_i16m8(op1); + return __riscv_vlmul_ext_v_i16m2_i16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i16m4_i16m8( @@ -607,7 +607,7 @@ vint16m8_t test_vlmul_ext_v_i16m2_i16m8(vint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlmul_ext_v_i16m4_i16m8(vint16m4_t op1) { - return vlmul_ext_v_i16m4_i16m8(op1); + return __riscv_vlmul_ext_v_i16m4_i16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32mf2_i32m1( @@ -616,7 +616,7 @@ vint16m8_t test_vlmul_ext_v_i16m4_i16m8(vint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlmul_ext_v_i32mf2_i32m1(vint32mf2_t op1) { - return vlmul_ext_v_i32mf2_i32m1(op1); + return __riscv_vlmul_ext_v_i32mf2_i32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32mf2_i32m2( @@ -625,7 +625,7 @@ vint32m1_t test_vlmul_ext_v_i32mf2_i32m1(vint32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlmul_ext_v_i32mf2_i32m2(vint32mf2_t op1) { - return vlmul_ext_v_i32mf2_i32m2(op1); + return __riscv_vlmul_ext_v_i32mf2_i32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32mf2_i32m4( @@ -634,7 +634,7 @@ vint32m2_t test_vlmul_ext_v_i32mf2_i32m2(vint32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlmul_ext_v_i32mf2_i32m4(vint32mf2_t op1) { - return vlmul_ext_v_i32mf2_i32m4(op1); + return __riscv_vlmul_ext_v_i32mf2_i32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32mf2_i32m8( @@ -643,7 +643,7 @@ vint32m4_t test_vlmul_ext_v_i32mf2_i32m4(vint32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlmul_ext_v_i32mf2_i32m8(vint32mf2_t op1) { - return vlmul_ext_v_i32mf2_i32m8(op1); + return __riscv_vlmul_ext_v_i32mf2_i32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32m1_i32m2( @@ -652,7 +652,7 @@ vint32m8_t test_vlmul_ext_v_i32mf2_i32m8(vint32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlmul_ext_v_i32m1_i32m2(vint32m1_t op1) { - return vlmul_ext_v_i32m1_i32m2(op1); + return __riscv_vlmul_ext_v_i32m1_i32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32m1_i32m4( @@ -661,7 +661,7 @@ vint32m2_t test_vlmul_ext_v_i32m1_i32m2(vint32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlmul_ext_v_i32m1_i32m4(vint32m1_t op1) { - return vlmul_ext_v_i32m1_i32m4(op1); + return __riscv_vlmul_ext_v_i32m1_i32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32m1_i32m8( @@ -670,7 +670,7 @@ vint32m4_t test_vlmul_ext_v_i32m1_i32m4(vint32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlmul_ext_v_i32m1_i32m8(vint32m1_t op1) { - return vlmul_ext_v_i32m1_i32m8(op1); + return __riscv_vlmul_ext_v_i32m1_i32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32m2_i32m4( @@ -679,7 +679,7 @@ vint32m8_t test_vlmul_ext_v_i32m1_i32m8(vint32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlmul_ext_v_i32m2_i32m4(vint32m2_t op1) { - return vlmul_ext_v_i32m2_i32m4(op1); + return __riscv_vlmul_ext_v_i32m2_i32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32m2_i32m8( @@ -688,7 +688,7 @@ vint32m4_t test_vlmul_ext_v_i32m2_i32m4(vint32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlmul_ext_v_i32m2_i32m8(vint32m2_t op1) { - return vlmul_ext_v_i32m2_i32m8(op1); + return __riscv_vlmul_ext_v_i32m2_i32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i32m4_i32m8( @@ -697,7 +697,7 @@ vint32m8_t test_vlmul_ext_v_i32m2_i32m8(vint32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlmul_ext_v_i32m4_i32m8(vint32m4_t op1) { - return vlmul_ext_v_i32m4_i32m8(op1); + return __riscv_vlmul_ext_v_i32m4_i32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i64m1_i64m2( @@ -706,7 +706,7 @@ vint32m8_t test_vlmul_ext_v_i32m4_i32m8(vint32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlmul_ext_v_i64m1_i64m2(vint64m1_t op1) { - return vlmul_ext_v_i64m1_i64m2(op1); + return __riscv_vlmul_ext_v_i64m1_i64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i64m1_i64m4( @@ -715,7 +715,7 @@ vint64m2_t test_vlmul_ext_v_i64m1_i64m2(vint64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlmul_ext_v_i64m1_i64m4(vint64m1_t op1) { - return vlmul_ext_v_i64m1_i64m4(op1); + return __riscv_vlmul_ext_v_i64m1_i64m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i64m1_i64m8( @@ -724,7 +724,7 @@ vint64m4_t test_vlmul_ext_v_i64m1_i64m4(vint64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlmul_ext_v_i64m1_i64m8(vint64m1_t op1) { - return vlmul_ext_v_i64m1_i64m8(op1); + return __riscv_vlmul_ext_v_i64m1_i64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i64m2_i64m4( @@ -733,7 +733,7 @@ vint64m8_t test_vlmul_ext_v_i64m1_i64m8(vint64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlmul_ext_v_i64m2_i64m4(vint64m2_t op1) { - return vlmul_ext_v_i64m2_i64m4(op1); + return __riscv_vlmul_ext_v_i64m2_i64m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i64m2_i64m8( @@ -742,7 +742,7 @@ vint64m4_t test_vlmul_ext_v_i64m2_i64m4(vint64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlmul_ext_v_i64m2_i64m8(vint64m2_t op1) { - return vlmul_ext_v_i64m2_i64m8(op1); + return __riscv_vlmul_ext_v_i64m2_i64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_i64m4_i64m8( @@ -751,7 +751,7 @@ vint64m8_t test_vlmul_ext_v_i64m2_i64m8(vint64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlmul_ext_v_i64m4_i64m8(vint64m4_t op1) { - return vlmul_ext_v_i64m4_i64m8(op1); + return __riscv_vlmul_ext_v_i64m4_i64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf8_u8mf4( @@ -760,7 +760,7 @@ vint64m8_t test_vlmul_ext_v_i64m4_i64m8(vint64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlmul_ext_v_u8mf8_u8mf4(vuint8mf8_t op1) { - return vlmul_ext_v_u8mf8_u8mf4(op1); + return __riscv_vlmul_ext_v_u8mf8_u8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf8_u8mf2( @@ -769,7 +769,7 @@ vuint8mf4_t test_vlmul_ext_v_u8mf8_u8mf4(vuint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlmul_ext_v_u8mf8_u8mf2(vuint8mf8_t op1) { - return vlmul_ext_v_u8mf8_u8mf2(op1); + return __riscv_vlmul_ext_v_u8mf8_u8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf8_u8m1( @@ -778,7 +778,7 @@ vuint8mf2_t test_vlmul_ext_v_u8mf8_u8mf2(vuint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlmul_ext_v_u8mf8_u8m1(vuint8mf8_t op1) { - return vlmul_ext_v_u8mf8_u8m1(op1); + return __riscv_vlmul_ext_v_u8mf8_u8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf8_u8m2( @@ -787,7 +787,7 @@ vuint8m1_t test_vlmul_ext_v_u8mf8_u8m1(vuint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlmul_ext_v_u8mf8_u8m2(vuint8mf8_t op1) { - return vlmul_ext_v_u8mf8_u8m2(op1); + return __riscv_vlmul_ext_v_u8mf8_u8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf8_u8m4( @@ -796,7 +796,7 @@ vuint8m2_t test_vlmul_ext_v_u8mf8_u8m2(vuint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlmul_ext_v_u8mf8_u8m4(vuint8mf8_t op1) { - return vlmul_ext_v_u8mf8_u8m4(op1); + return __riscv_vlmul_ext_v_u8mf8_u8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf8_u8m8( @@ -805,7 +805,7 @@ vuint8m4_t test_vlmul_ext_v_u8mf8_u8m4(vuint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlmul_ext_v_u8mf8_u8m8(vuint8mf8_t op1) { - return vlmul_ext_v_u8mf8_u8m8(op1); + return __riscv_vlmul_ext_v_u8mf8_u8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf4_u8mf2( @@ -814,7 +814,7 @@ vuint8m8_t test_vlmul_ext_v_u8mf8_u8m8(vuint8mf8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlmul_ext_v_u8mf4_u8mf2(vuint8mf4_t op1) { - return vlmul_ext_v_u8mf4_u8mf2(op1); + return __riscv_vlmul_ext_v_u8mf4_u8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf4_u8m1( @@ -823,7 +823,7 @@ vuint8mf2_t test_vlmul_ext_v_u8mf4_u8mf2(vuint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlmul_ext_v_u8mf4_u8m1(vuint8mf4_t op1) { - return vlmul_ext_v_u8mf4_u8m1(op1); + return __riscv_vlmul_ext_v_u8mf4_u8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf4_u8m2( @@ -832,7 +832,7 @@ vuint8m1_t test_vlmul_ext_v_u8mf4_u8m1(vuint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlmul_ext_v_u8mf4_u8m2(vuint8mf4_t op1) { - return vlmul_ext_v_u8mf4_u8m2(op1); + return __riscv_vlmul_ext_v_u8mf4_u8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf4_u8m4( @@ -841,7 +841,7 @@ vuint8m2_t test_vlmul_ext_v_u8mf4_u8m2(vuint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlmul_ext_v_u8mf4_u8m4(vuint8mf4_t op1) { - return vlmul_ext_v_u8mf4_u8m4(op1); + return __riscv_vlmul_ext_v_u8mf4_u8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf4_u8m8( @@ -850,7 +850,7 @@ vuint8m4_t test_vlmul_ext_v_u8mf4_u8m4(vuint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlmul_ext_v_u8mf4_u8m8(vuint8mf4_t op1) { - return vlmul_ext_v_u8mf4_u8m8(op1); + return __riscv_vlmul_ext_v_u8mf4_u8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf2_u8m1( @@ -859,7 +859,7 @@ vuint8m8_t test_vlmul_ext_v_u8mf4_u8m8(vuint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlmul_ext_v_u8mf2_u8m1(vuint8mf2_t op1) { - return vlmul_ext_v_u8mf2_u8m1(op1); + return __riscv_vlmul_ext_v_u8mf2_u8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf2_u8m2( @@ -868,7 +868,7 @@ vuint8m1_t test_vlmul_ext_v_u8mf2_u8m1(vuint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlmul_ext_v_u8mf2_u8m2(vuint8mf2_t op1) { - return vlmul_ext_v_u8mf2_u8m2(op1); + return __riscv_vlmul_ext_v_u8mf2_u8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf2_u8m4( @@ -877,7 +877,7 @@ vuint8m2_t test_vlmul_ext_v_u8mf2_u8m2(vuint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlmul_ext_v_u8mf2_u8m4(vuint8mf2_t op1) { - return vlmul_ext_v_u8mf2_u8m4(op1); + return __riscv_vlmul_ext_v_u8mf2_u8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8mf2_u8m8( @@ -886,7 +886,7 @@ vuint8m4_t test_vlmul_ext_v_u8mf2_u8m4(vuint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlmul_ext_v_u8mf2_u8m8(vuint8mf2_t op1) { - return vlmul_ext_v_u8mf2_u8m8(op1); + return __riscv_vlmul_ext_v_u8mf2_u8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8m1_u8m2( @@ -895,7 +895,7 @@ vuint8m8_t test_vlmul_ext_v_u8mf2_u8m8(vuint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlmul_ext_v_u8m1_u8m2(vuint8m1_t op1) { - return vlmul_ext_v_u8m1_u8m2(op1); + return __riscv_vlmul_ext_v_u8m1_u8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8m1_u8m4( @@ -904,7 +904,7 @@ vuint8m2_t test_vlmul_ext_v_u8m1_u8m2(vuint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlmul_ext_v_u8m1_u8m4(vuint8m1_t op1) { - return vlmul_ext_v_u8m1_u8m4(op1); + return __riscv_vlmul_ext_v_u8m1_u8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8m1_u8m8( @@ -913,7 +913,7 @@ vuint8m4_t test_vlmul_ext_v_u8m1_u8m4(vuint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlmul_ext_v_u8m1_u8m8(vuint8m1_t op1) { - return vlmul_ext_v_u8m1_u8m8(op1); + return __riscv_vlmul_ext_v_u8m1_u8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8m2_u8m4( @@ -922,7 +922,7 @@ vuint8m8_t test_vlmul_ext_v_u8m1_u8m8(vuint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlmul_ext_v_u8m2_u8m4(vuint8m2_t op1) { - return vlmul_ext_v_u8m2_u8m4(op1); + return __riscv_vlmul_ext_v_u8m2_u8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8m2_u8m8( @@ -931,7 +931,7 @@ vuint8m4_t test_vlmul_ext_v_u8m2_u8m4(vuint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlmul_ext_v_u8m2_u8m8(vuint8m2_t op1) { - return vlmul_ext_v_u8m2_u8m8(op1); + return __riscv_vlmul_ext_v_u8m2_u8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u8m4_u8m8( @@ -940,7 +940,7 @@ vuint8m8_t test_vlmul_ext_v_u8m2_u8m8(vuint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlmul_ext_v_u8m4_u8m8(vuint8m4_t op1) { - return vlmul_ext_v_u8m4_u8m8(op1); + return __riscv_vlmul_ext_v_u8m4_u8m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf4_u16mf2( @@ -949,7 +949,7 @@ vuint8m8_t test_vlmul_ext_v_u8m4_u8m8(vuint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlmul_ext_v_u16mf4_u16mf2(vuint16mf4_t op1) { - return vlmul_ext_v_u16mf4_u16mf2(op1); + return __riscv_vlmul_ext_v_u16mf4_u16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf4_u16m1( @@ -958,7 +958,7 @@ vuint16mf2_t test_vlmul_ext_v_u16mf4_u16mf2(vuint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlmul_ext_v_u16mf4_u16m1(vuint16mf4_t op1) { - return vlmul_ext_v_u16mf4_u16m1(op1); + return __riscv_vlmul_ext_v_u16mf4_u16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf4_u16m2( @@ -967,7 +967,7 @@ vuint16m1_t test_vlmul_ext_v_u16mf4_u16m1(vuint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlmul_ext_v_u16mf4_u16m2(vuint16mf4_t op1) { - return vlmul_ext_v_u16mf4_u16m2(op1); + return __riscv_vlmul_ext_v_u16mf4_u16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf4_u16m4( @@ -976,7 +976,7 @@ vuint16m2_t test_vlmul_ext_v_u16mf4_u16m2(vuint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlmul_ext_v_u16mf4_u16m4(vuint16mf4_t op1) { - return vlmul_ext_v_u16mf4_u16m4(op1); + return __riscv_vlmul_ext_v_u16mf4_u16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf4_u16m8( @@ -985,7 +985,7 @@ vuint16m4_t test_vlmul_ext_v_u16mf4_u16m4(vuint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlmul_ext_v_u16mf4_u16m8(vuint16mf4_t op1) { - return vlmul_ext_v_u16mf4_u16m8(op1); + return __riscv_vlmul_ext_v_u16mf4_u16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf2_u16m1( @@ -994,7 +994,7 @@ vuint16m8_t test_vlmul_ext_v_u16mf4_u16m8(vuint16mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlmul_ext_v_u16mf2_u16m1(vuint16mf2_t op1) { - return vlmul_ext_v_u16mf2_u16m1(op1); + return __riscv_vlmul_ext_v_u16mf2_u16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf2_u16m2( @@ -1003,7 +1003,7 @@ vuint16m1_t test_vlmul_ext_v_u16mf2_u16m1(vuint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlmul_ext_v_u16mf2_u16m2(vuint16mf2_t op1) { - return vlmul_ext_v_u16mf2_u16m2(op1); + return __riscv_vlmul_ext_v_u16mf2_u16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf2_u16m4( @@ -1012,7 +1012,7 @@ vuint16m2_t test_vlmul_ext_v_u16mf2_u16m2(vuint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlmul_ext_v_u16mf2_u16m4(vuint16mf2_t op1) { - return vlmul_ext_v_u16mf2_u16m4(op1); + return __riscv_vlmul_ext_v_u16mf2_u16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16mf2_u16m8( @@ -1021,7 +1021,7 @@ vuint16m4_t test_vlmul_ext_v_u16mf2_u16m4(vuint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlmul_ext_v_u16mf2_u16m8(vuint16mf2_t op1) { - return vlmul_ext_v_u16mf2_u16m8(op1); + return __riscv_vlmul_ext_v_u16mf2_u16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16m1_u16m2( @@ -1030,7 +1030,7 @@ vuint16m8_t test_vlmul_ext_v_u16mf2_u16m8(vuint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlmul_ext_v_u16m1_u16m2(vuint16m1_t op1) { - return vlmul_ext_v_u16m1_u16m2(op1); + return __riscv_vlmul_ext_v_u16m1_u16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16m1_u16m4( @@ -1039,7 +1039,7 @@ vuint16m2_t test_vlmul_ext_v_u16m1_u16m2(vuint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlmul_ext_v_u16m1_u16m4(vuint16m1_t op1) { - return vlmul_ext_v_u16m1_u16m4(op1); + return __riscv_vlmul_ext_v_u16m1_u16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16m1_u16m8( @@ -1048,7 +1048,7 @@ vuint16m4_t test_vlmul_ext_v_u16m1_u16m4(vuint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlmul_ext_v_u16m1_u16m8(vuint16m1_t op1) { - return vlmul_ext_v_u16m1_u16m8(op1); + return __riscv_vlmul_ext_v_u16m1_u16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16m2_u16m4( @@ -1057,7 +1057,7 @@ vuint16m8_t test_vlmul_ext_v_u16m1_u16m8(vuint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlmul_ext_v_u16m2_u16m4(vuint16m2_t op1) { - return vlmul_ext_v_u16m2_u16m4(op1); + return __riscv_vlmul_ext_v_u16m2_u16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16m2_u16m8( @@ -1066,7 +1066,7 @@ vuint16m4_t test_vlmul_ext_v_u16m2_u16m4(vuint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlmul_ext_v_u16m2_u16m8(vuint16m2_t op1) { - return vlmul_ext_v_u16m2_u16m8(op1); + return __riscv_vlmul_ext_v_u16m2_u16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u16m4_u16m8( @@ -1075,7 +1075,7 @@ vuint16m8_t test_vlmul_ext_v_u16m2_u16m8(vuint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlmul_ext_v_u16m4_u16m8(vuint16m4_t op1) { - return vlmul_ext_v_u16m4_u16m8(op1); + return __riscv_vlmul_ext_v_u16m4_u16m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32mf2_u32m1( @@ -1084,7 +1084,7 @@ vuint16m8_t test_vlmul_ext_v_u16m4_u16m8(vuint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlmul_ext_v_u32mf2_u32m1(vuint32mf2_t op1) { - return vlmul_ext_v_u32mf2_u32m1(op1); + return __riscv_vlmul_ext_v_u32mf2_u32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32mf2_u32m2( @@ -1093,7 +1093,7 @@ vuint32m1_t test_vlmul_ext_v_u32mf2_u32m1(vuint32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlmul_ext_v_u32mf2_u32m2(vuint32mf2_t op1) { - return vlmul_ext_v_u32mf2_u32m2(op1); + return __riscv_vlmul_ext_v_u32mf2_u32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32mf2_u32m4( @@ -1102,7 +1102,7 @@ vuint32m2_t test_vlmul_ext_v_u32mf2_u32m2(vuint32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlmul_ext_v_u32mf2_u32m4(vuint32mf2_t op1) { - return vlmul_ext_v_u32mf2_u32m4(op1); + return __riscv_vlmul_ext_v_u32mf2_u32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32mf2_u32m8( @@ -1111,7 +1111,7 @@ vuint32m4_t test_vlmul_ext_v_u32mf2_u32m4(vuint32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlmul_ext_v_u32mf2_u32m8(vuint32mf2_t op1) { - return vlmul_ext_v_u32mf2_u32m8(op1); + return __riscv_vlmul_ext_v_u32mf2_u32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32m1_u32m2( @@ -1120,7 +1120,7 @@ vuint32m8_t test_vlmul_ext_v_u32mf2_u32m8(vuint32mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlmul_ext_v_u32m1_u32m2(vuint32m1_t op1) { - return vlmul_ext_v_u32m1_u32m2(op1); + return __riscv_vlmul_ext_v_u32m1_u32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32m1_u32m4( @@ -1129,7 +1129,7 @@ vuint32m2_t test_vlmul_ext_v_u32m1_u32m2(vuint32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlmul_ext_v_u32m1_u32m4(vuint32m1_t op1) { - return vlmul_ext_v_u32m1_u32m4(op1); + return __riscv_vlmul_ext_v_u32m1_u32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32m1_u32m8( @@ -1138,7 +1138,7 @@ vuint32m4_t test_vlmul_ext_v_u32m1_u32m4(vuint32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlmul_ext_v_u32m1_u32m8(vuint32m1_t op1) { - return vlmul_ext_v_u32m1_u32m8(op1); + return __riscv_vlmul_ext_v_u32m1_u32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32m2_u32m4( @@ -1147,7 +1147,7 @@ vuint32m8_t test_vlmul_ext_v_u32m1_u32m8(vuint32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlmul_ext_v_u32m2_u32m4(vuint32m2_t op1) { - return vlmul_ext_v_u32m2_u32m4(op1); + return __riscv_vlmul_ext_v_u32m2_u32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32m2_u32m8( @@ -1156,7 +1156,7 @@ vuint32m4_t test_vlmul_ext_v_u32m2_u32m4(vuint32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlmul_ext_v_u32m2_u32m8(vuint32m2_t op1) { - return vlmul_ext_v_u32m2_u32m8(op1); + return __riscv_vlmul_ext_v_u32m2_u32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u32m4_u32m8( @@ -1165,7 +1165,7 @@ vuint32m8_t test_vlmul_ext_v_u32m2_u32m8(vuint32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlmul_ext_v_u32m4_u32m8(vuint32m4_t op1) { - return vlmul_ext_v_u32m4_u32m8(op1); + return __riscv_vlmul_ext_v_u32m4_u32m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u64m1_u64m2( @@ -1174,7 +1174,7 @@ vuint32m8_t test_vlmul_ext_v_u32m4_u32m8(vuint32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlmul_ext_v_u64m1_u64m2(vuint64m1_t op1) { - return vlmul_ext_v_u64m1_u64m2(op1); + return __riscv_vlmul_ext_v_u64m1_u64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u64m1_u64m4( @@ -1183,7 +1183,7 @@ vuint64m2_t test_vlmul_ext_v_u64m1_u64m2(vuint64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlmul_ext_v_u64m1_u64m4(vuint64m1_t op1) { - return vlmul_ext_v_u64m1_u64m4(op1); + return __riscv_vlmul_ext_v_u64m1_u64m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u64m1_u64m8( @@ -1192,7 +1192,7 @@ vuint64m4_t test_vlmul_ext_v_u64m1_u64m4(vuint64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlmul_ext_v_u64m1_u64m8(vuint64m1_t op1) { - return vlmul_ext_v_u64m1_u64m8(op1); + return __riscv_vlmul_ext_v_u64m1_u64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u64m2_u64m4( @@ -1201,7 +1201,7 @@ vuint64m8_t test_vlmul_ext_v_u64m1_u64m8(vuint64m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlmul_ext_v_u64m2_u64m4(vuint64m2_t op1) { - return vlmul_ext_v_u64m2_u64m4(op1); + return __riscv_vlmul_ext_v_u64m2_u64m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u64m2_u64m8( @@ -1210,7 +1210,7 @@ vuint64m4_t test_vlmul_ext_v_u64m2_u64m4(vuint64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlmul_ext_v_u64m2_u64m8(vuint64m2_t op1) { - return vlmul_ext_v_u64m2_u64m8(op1); + return __riscv_vlmul_ext_v_u64m2_u64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_ext_v_u64m4_u64m8( @@ -1219,7 +1219,7 @@ vuint64m8_t test_vlmul_ext_v_u64m2_u64m8(vuint64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlmul_ext_v_u64m4_u64m8(vuint64m4_t op1) { - return vlmul_ext_v_u64m4_u64m8(op1); + return __riscv_vlmul_ext_v_u64m4_u64m8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16mf2_f16mf4( @@ -1228,7 +1228,7 @@ vuint64m8_t test_vlmul_ext_v_u64m4_u64m8(vuint64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlmul_trunc_v_f16mf2_f16mf4(vfloat16mf2_t op1) { - return vlmul_trunc_v_f16mf2_f16mf4(op1); + return __riscv_vlmul_trunc_v_f16mf2_f16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m1_f16mf4( @@ -1237,7 +1237,7 @@ vfloat16mf4_t test_vlmul_trunc_v_f16mf2_f16mf4(vfloat16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlmul_trunc_v_f16m1_f16mf4(vfloat16m1_t op1) { - return vlmul_trunc_v_f16m1_f16mf4(op1); + return __riscv_vlmul_trunc_v_f16m1_f16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m1_f16mf2( @@ -1246,7 +1246,7 @@ vfloat16mf4_t test_vlmul_trunc_v_f16m1_f16mf4(vfloat16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlmul_trunc_v_f16m1_f16mf2(vfloat16m1_t op1) { - return vlmul_trunc_v_f16m1_f16mf2(op1); + return __riscv_vlmul_trunc_v_f16m1_f16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m2_f16mf4( @@ -1255,7 +1255,7 @@ vfloat16mf2_t test_vlmul_trunc_v_f16m1_f16mf2(vfloat16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlmul_trunc_v_f16m2_f16mf4(vfloat16m2_t op1) { - return vlmul_trunc_v_f16m2_f16mf4(op1); + return __riscv_vlmul_trunc_v_f16m2_f16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m2_f16mf2( @@ -1264,7 +1264,7 @@ vfloat16mf4_t test_vlmul_trunc_v_f16m2_f16mf4(vfloat16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlmul_trunc_v_f16m2_f16mf2(vfloat16m2_t op1) { - return vlmul_trunc_v_f16m2_f16mf2(op1); + return __riscv_vlmul_trunc_v_f16m2_f16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m2_f16m1( @@ -1273,7 +1273,7 @@ vfloat16mf2_t test_vlmul_trunc_v_f16m2_f16mf2(vfloat16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlmul_trunc_v_f16m2_f16m1(vfloat16m2_t op1) { - return vlmul_trunc_v_f16m2_f16m1(op1); + return __riscv_vlmul_trunc_v_f16m2_f16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m4_f16mf4( @@ -1282,7 +1282,7 @@ vfloat16m1_t test_vlmul_trunc_v_f16m2_f16m1(vfloat16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlmul_trunc_v_f16m4_f16mf4(vfloat16m4_t op1) { - return vlmul_trunc_v_f16m4_f16mf4(op1); + return __riscv_vlmul_trunc_v_f16m4_f16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m4_f16mf2( @@ -1291,7 +1291,7 @@ vfloat16mf4_t test_vlmul_trunc_v_f16m4_f16mf4(vfloat16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlmul_trunc_v_f16m4_f16mf2(vfloat16m4_t op1) { - return vlmul_trunc_v_f16m4_f16mf2(op1); + return __riscv_vlmul_trunc_v_f16m4_f16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m4_f16m1( @@ -1300,7 +1300,7 @@ vfloat16mf2_t test_vlmul_trunc_v_f16m4_f16mf2(vfloat16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlmul_trunc_v_f16m4_f16m1(vfloat16m4_t op1) { - return vlmul_trunc_v_f16m4_f16m1(op1); + return __riscv_vlmul_trunc_v_f16m4_f16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m4_f16m2( @@ -1309,7 +1309,7 @@ vfloat16m1_t test_vlmul_trunc_v_f16m4_f16m1(vfloat16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlmul_trunc_v_f16m4_f16m2(vfloat16m4_t op1) { - return vlmul_trunc_v_f16m4_f16m2(op1); + return __riscv_vlmul_trunc_v_f16m4_f16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m8_f16mf4( @@ -1318,7 +1318,7 @@ vfloat16m2_t test_vlmul_trunc_v_f16m4_f16m2(vfloat16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlmul_trunc_v_f16m8_f16mf4(vfloat16m8_t op1) { - return vlmul_trunc_v_f16m8_f16mf4(op1); + return __riscv_vlmul_trunc_v_f16m8_f16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m8_f16mf2( @@ -1327,7 +1327,7 @@ vfloat16mf4_t test_vlmul_trunc_v_f16m8_f16mf4(vfloat16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlmul_trunc_v_f16m8_f16mf2(vfloat16m8_t op1) { - return vlmul_trunc_v_f16m8_f16mf2(op1); + return __riscv_vlmul_trunc_v_f16m8_f16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m8_f16m1( @@ -1336,7 +1336,7 @@ vfloat16mf2_t test_vlmul_trunc_v_f16m8_f16mf2(vfloat16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlmul_trunc_v_f16m8_f16m1(vfloat16m8_t op1) { - return vlmul_trunc_v_f16m8_f16m1(op1); + return __riscv_vlmul_trunc_v_f16m8_f16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m8_f16m2( @@ -1345,7 +1345,7 @@ vfloat16m1_t test_vlmul_trunc_v_f16m8_f16m1(vfloat16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlmul_trunc_v_f16m8_f16m2(vfloat16m8_t op1) { - return vlmul_trunc_v_f16m8_f16m2(op1); + return __riscv_vlmul_trunc_v_f16m8_f16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f16m8_f16m4( @@ -1354,7 +1354,7 @@ vfloat16m2_t test_vlmul_trunc_v_f16m8_f16m2(vfloat16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlmul_trunc_v_f16m8_f16m4(vfloat16m8_t op1) { - return vlmul_trunc_v_f16m8_f16m4(op1); + return __riscv_vlmul_trunc_v_f16m8_f16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m1_f32mf2( @@ -1363,7 +1363,7 @@ vfloat16m4_t test_vlmul_trunc_v_f16m8_f16m4(vfloat16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlmul_trunc_v_f32m1_f32mf2(vfloat32m1_t op1) { - return vlmul_trunc_v_f32m1_f32mf2(op1); + return __riscv_vlmul_trunc_v_f32m1_f32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m2_f32mf2( @@ -1372,7 +1372,7 @@ vfloat32mf2_t test_vlmul_trunc_v_f32m1_f32mf2(vfloat32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlmul_trunc_v_f32m2_f32mf2(vfloat32m2_t op1) { - return vlmul_trunc_v_f32m2_f32mf2(op1); + return __riscv_vlmul_trunc_v_f32m2_f32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m2_f32m1( @@ -1381,7 +1381,7 @@ vfloat32mf2_t test_vlmul_trunc_v_f32m2_f32mf2(vfloat32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlmul_trunc_v_f32m2_f32m1(vfloat32m2_t op1) { - return vlmul_trunc_v_f32m2_f32m1(op1); + return __riscv_vlmul_trunc_v_f32m2_f32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m4_f32mf2( @@ -1390,7 +1390,7 @@ vfloat32m1_t test_vlmul_trunc_v_f32m2_f32m1(vfloat32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlmul_trunc_v_f32m4_f32mf2(vfloat32m4_t op1) { - return vlmul_trunc_v_f32m4_f32mf2(op1); + return __riscv_vlmul_trunc_v_f32m4_f32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m4_f32m1( @@ -1399,7 +1399,7 @@ vfloat32mf2_t test_vlmul_trunc_v_f32m4_f32mf2(vfloat32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlmul_trunc_v_f32m4_f32m1(vfloat32m4_t op1) { - return vlmul_trunc_v_f32m4_f32m1(op1); + return __riscv_vlmul_trunc_v_f32m4_f32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m4_f32m2( @@ -1408,7 +1408,7 @@ vfloat32m1_t test_vlmul_trunc_v_f32m4_f32m1(vfloat32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlmul_trunc_v_f32m4_f32m2(vfloat32m4_t op1) { - return vlmul_trunc_v_f32m4_f32m2(op1); + return __riscv_vlmul_trunc_v_f32m4_f32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m8_f32mf2( @@ -1417,7 +1417,7 @@ vfloat32m2_t test_vlmul_trunc_v_f32m4_f32m2(vfloat32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlmul_trunc_v_f32m8_f32mf2(vfloat32m8_t op1) { - return vlmul_trunc_v_f32m8_f32mf2(op1); + return __riscv_vlmul_trunc_v_f32m8_f32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m8_f32m1( @@ -1426,7 +1426,7 @@ vfloat32mf2_t test_vlmul_trunc_v_f32m8_f32mf2(vfloat32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlmul_trunc_v_f32m8_f32m1(vfloat32m8_t op1) { - return vlmul_trunc_v_f32m8_f32m1(op1); + return __riscv_vlmul_trunc_v_f32m8_f32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m8_f32m2( @@ -1435,7 +1435,7 @@ vfloat32m1_t test_vlmul_trunc_v_f32m8_f32m1(vfloat32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlmul_trunc_v_f32m8_f32m2(vfloat32m8_t op1) { - return vlmul_trunc_v_f32m8_f32m2(op1); + return __riscv_vlmul_trunc_v_f32m8_f32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f32m8_f32m4( @@ -1444,7 +1444,7 @@ vfloat32m2_t test_vlmul_trunc_v_f32m8_f32m2(vfloat32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlmul_trunc_v_f32m8_f32m4(vfloat32m8_t op1) { - return vlmul_trunc_v_f32m8_f32m4(op1); + return __riscv_vlmul_trunc_v_f32m8_f32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f64m2_f64m1( @@ -1453,7 +1453,7 @@ vfloat32m4_t test_vlmul_trunc_v_f32m8_f32m4(vfloat32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlmul_trunc_v_f64m2_f64m1(vfloat64m2_t op1) { - return vlmul_trunc_v_f64m2_f64m1(op1); + return __riscv_vlmul_trunc_v_f64m2_f64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f64m4_f64m1( @@ -1462,7 +1462,7 @@ vfloat64m1_t test_vlmul_trunc_v_f64m2_f64m1(vfloat64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlmul_trunc_v_f64m4_f64m1(vfloat64m4_t op1) { - return vlmul_trunc_v_f64m4_f64m1(op1); + return __riscv_vlmul_trunc_v_f64m4_f64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f64m4_f64m2( @@ -1471,7 +1471,7 @@ vfloat64m1_t test_vlmul_trunc_v_f64m4_f64m1(vfloat64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlmul_trunc_v_f64m4_f64m2(vfloat64m4_t op1) { - return vlmul_trunc_v_f64m4_f64m2(op1); + return __riscv_vlmul_trunc_v_f64m4_f64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f64m8_f64m1( @@ -1480,7 +1480,7 @@ vfloat64m2_t test_vlmul_trunc_v_f64m4_f64m2(vfloat64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlmul_trunc_v_f64m8_f64m1(vfloat64m8_t op1) { - return vlmul_trunc_v_f64m8_f64m1(op1); + return __riscv_vlmul_trunc_v_f64m8_f64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f64m8_f64m2( @@ -1489,7 +1489,7 @@ vfloat64m1_t test_vlmul_trunc_v_f64m8_f64m1(vfloat64m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlmul_trunc_v_f64m8_f64m2(vfloat64m8_t op1) { - return vlmul_trunc_v_f64m8_f64m2(op1); + return __riscv_vlmul_trunc_v_f64m8_f64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_f64m8_f64m4( @@ -1498,7 +1498,7 @@ vfloat64m2_t test_vlmul_trunc_v_f64m8_f64m2(vfloat64m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlmul_trunc_v_f64m8_f64m4(vfloat64m8_t op1) { - return vlmul_trunc_v_f64m8_f64m4(op1); + return __riscv_vlmul_trunc_v_f64m8_f64m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8mf4_i8mf8( @@ -1507,7 +1507,7 @@ vfloat64m4_t test_vlmul_trunc_v_f64m8_f64m4(vfloat64m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlmul_trunc_v_i8mf4_i8mf8(vint8mf4_t op1) { - return vlmul_trunc_v_i8mf4_i8mf8(op1); + return __riscv_vlmul_trunc_v_i8mf4_i8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8mf2_i8mf8( @@ -1516,7 +1516,7 @@ vint8mf8_t test_vlmul_trunc_v_i8mf4_i8mf8(vint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlmul_trunc_v_i8mf2_i8mf8(vint8mf2_t op1) { - return vlmul_trunc_v_i8mf2_i8mf8(op1); + return __riscv_vlmul_trunc_v_i8mf2_i8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8mf2_i8mf4( @@ -1525,7 +1525,7 @@ vint8mf8_t test_vlmul_trunc_v_i8mf2_i8mf8(vint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlmul_trunc_v_i8mf2_i8mf4(vint8mf2_t op1) { - return vlmul_trunc_v_i8mf2_i8mf4(op1); + return __riscv_vlmul_trunc_v_i8mf2_i8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m1_i8mf8( @@ -1534,7 +1534,7 @@ vint8mf4_t test_vlmul_trunc_v_i8mf2_i8mf4(vint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlmul_trunc_v_i8m1_i8mf8(vint8m1_t op1) { - return vlmul_trunc_v_i8m1_i8mf8(op1); + return __riscv_vlmul_trunc_v_i8m1_i8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m1_i8mf4( @@ -1543,7 +1543,7 @@ vint8mf8_t test_vlmul_trunc_v_i8m1_i8mf8(vint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlmul_trunc_v_i8m1_i8mf4(vint8m1_t op1) { - return vlmul_trunc_v_i8m1_i8mf4(op1); + return __riscv_vlmul_trunc_v_i8m1_i8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m1_i8mf2( @@ -1552,7 +1552,7 @@ vint8mf4_t test_vlmul_trunc_v_i8m1_i8mf4(vint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlmul_trunc_v_i8m1_i8mf2(vint8m1_t op1) { - return vlmul_trunc_v_i8m1_i8mf2(op1); + return __riscv_vlmul_trunc_v_i8m1_i8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m2_i8mf8( @@ -1561,7 +1561,7 @@ vint8mf2_t test_vlmul_trunc_v_i8m1_i8mf2(vint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlmul_trunc_v_i8m2_i8mf8(vint8m2_t op1) { - return vlmul_trunc_v_i8m2_i8mf8(op1); + return __riscv_vlmul_trunc_v_i8m2_i8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m2_i8mf4( @@ -1570,7 +1570,7 @@ vint8mf8_t test_vlmul_trunc_v_i8m2_i8mf8(vint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlmul_trunc_v_i8m2_i8mf4(vint8m2_t op1) { - return vlmul_trunc_v_i8m2_i8mf4(op1); + return __riscv_vlmul_trunc_v_i8m2_i8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m2_i8mf2( @@ -1579,7 +1579,7 @@ vint8mf4_t test_vlmul_trunc_v_i8m2_i8mf4(vint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlmul_trunc_v_i8m2_i8mf2(vint8m2_t op1) { - return vlmul_trunc_v_i8m2_i8mf2(op1); + return __riscv_vlmul_trunc_v_i8m2_i8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m2_i8m1( @@ -1588,7 +1588,7 @@ vint8mf2_t test_vlmul_trunc_v_i8m2_i8mf2(vint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlmul_trunc_v_i8m2_i8m1(vint8m2_t op1) { - return vlmul_trunc_v_i8m2_i8m1(op1); + return __riscv_vlmul_trunc_v_i8m2_i8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m4_i8mf8( @@ -1597,7 +1597,7 @@ vint8m1_t test_vlmul_trunc_v_i8m2_i8m1(vint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlmul_trunc_v_i8m4_i8mf8(vint8m4_t op1) { - return vlmul_trunc_v_i8m4_i8mf8(op1); + return __riscv_vlmul_trunc_v_i8m4_i8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m4_i8mf4( @@ -1606,7 +1606,7 @@ vint8mf8_t test_vlmul_trunc_v_i8m4_i8mf8(vint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlmul_trunc_v_i8m4_i8mf4(vint8m4_t op1) { - return vlmul_trunc_v_i8m4_i8mf4(op1); + return __riscv_vlmul_trunc_v_i8m4_i8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m4_i8mf2( @@ -1615,7 +1615,7 @@ vint8mf4_t test_vlmul_trunc_v_i8m4_i8mf4(vint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlmul_trunc_v_i8m4_i8mf2(vint8m4_t op1) { - return vlmul_trunc_v_i8m4_i8mf2(op1); + return __riscv_vlmul_trunc_v_i8m4_i8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m4_i8m1( @@ -1624,7 +1624,7 @@ vint8mf2_t test_vlmul_trunc_v_i8m4_i8mf2(vint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlmul_trunc_v_i8m4_i8m1(vint8m4_t op1) { - return vlmul_trunc_v_i8m4_i8m1(op1); + return __riscv_vlmul_trunc_v_i8m4_i8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m4_i8m2( @@ -1633,7 +1633,7 @@ vint8m1_t test_vlmul_trunc_v_i8m4_i8m1(vint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlmul_trunc_v_i8m4_i8m2(vint8m4_t op1) { - return vlmul_trunc_v_i8m4_i8m2(op1); + return __riscv_vlmul_trunc_v_i8m4_i8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m8_i8mf8( @@ -1642,7 +1642,7 @@ vint8m2_t test_vlmul_trunc_v_i8m4_i8m2(vint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlmul_trunc_v_i8m8_i8mf8(vint8m8_t op1) { - return vlmul_trunc_v_i8m8_i8mf8(op1); + return __riscv_vlmul_trunc_v_i8m8_i8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m8_i8mf4( @@ -1651,7 +1651,7 @@ vint8mf8_t test_vlmul_trunc_v_i8m8_i8mf8(vint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlmul_trunc_v_i8m8_i8mf4(vint8m8_t op1) { - return vlmul_trunc_v_i8m8_i8mf4(op1); + return __riscv_vlmul_trunc_v_i8m8_i8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m8_i8mf2( @@ -1660,7 +1660,7 @@ vint8mf4_t test_vlmul_trunc_v_i8m8_i8mf4(vint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlmul_trunc_v_i8m8_i8mf2(vint8m8_t op1) { - return vlmul_trunc_v_i8m8_i8mf2(op1); + return __riscv_vlmul_trunc_v_i8m8_i8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m8_i8m1( @@ -1669,7 +1669,7 @@ vint8mf2_t test_vlmul_trunc_v_i8m8_i8mf2(vint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlmul_trunc_v_i8m8_i8m1(vint8m8_t op1) { - return vlmul_trunc_v_i8m8_i8m1(op1); + return __riscv_vlmul_trunc_v_i8m8_i8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m8_i8m2( @@ -1678,7 +1678,7 @@ vint8m1_t test_vlmul_trunc_v_i8m8_i8m1(vint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlmul_trunc_v_i8m8_i8m2(vint8m8_t op1) { - return vlmul_trunc_v_i8m8_i8m2(op1); + return __riscv_vlmul_trunc_v_i8m8_i8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i8m8_i8m4( @@ -1687,7 +1687,7 @@ vint8m2_t test_vlmul_trunc_v_i8m8_i8m2(vint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlmul_trunc_v_i8m8_i8m4(vint8m8_t op1) { - return vlmul_trunc_v_i8m8_i8m4(op1); + return __riscv_vlmul_trunc_v_i8m8_i8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16mf2_i16mf4( @@ -1696,7 +1696,7 @@ vint8m4_t test_vlmul_trunc_v_i8m8_i8m4(vint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlmul_trunc_v_i16mf2_i16mf4(vint16mf2_t op1) { - return vlmul_trunc_v_i16mf2_i16mf4(op1); + return __riscv_vlmul_trunc_v_i16mf2_i16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m1_i16mf4( @@ -1705,7 +1705,7 @@ vint16mf4_t test_vlmul_trunc_v_i16mf2_i16mf4(vint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlmul_trunc_v_i16m1_i16mf4(vint16m1_t op1) { - return vlmul_trunc_v_i16m1_i16mf4(op1); + return __riscv_vlmul_trunc_v_i16m1_i16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m1_i16mf2( @@ -1714,7 +1714,7 @@ vint16mf4_t test_vlmul_trunc_v_i16m1_i16mf4(vint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlmul_trunc_v_i16m1_i16mf2(vint16m1_t op1) { - return vlmul_trunc_v_i16m1_i16mf2(op1); + return __riscv_vlmul_trunc_v_i16m1_i16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m2_i16mf4( @@ -1723,7 +1723,7 @@ vint16mf2_t test_vlmul_trunc_v_i16m1_i16mf2(vint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlmul_trunc_v_i16m2_i16mf4(vint16m2_t op1) { - return vlmul_trunc_v_i16m2_i16mf4(op1); + return __riscv_vlmul_trunc_v_i16m2_i16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m2_i16mf2( @@ -1732,7 +1732,7 @@ vint16mf4_t test_vlmul_trunc_v_i16m2_i16mf4(vint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlmul_trunc_v_i16m2_i16mf2(vint16m2_t op1) { - return vlmul_trunc_v_i16m2_i16mf2(op1); + return __riscv_vlmul_trunc_v_i16m2_i16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m2_i16m1( @@ -1741,7 +1741,7 @@ vint16mf2_t test_vlmul_trunc_v_i16m2_i16mf2(vint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlmul_trunc_v_i16m2_i16m1(vint16m2_t op1) { - return vlmul_trunc_v_i16m2_i16m1(op1); + return __riscv_vlmul_trunc_v_i16m2_i16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m4_i16mf4( @@ -1750,7 +1750,7 @@ vint16m1_t test_vlmul_trunc_v_i16m2_i16m1(vint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlmul_trunc_v_i16m4_i16mf4(vint16m4_t op1) { - return vlmul_trunc_v_i16m4_i16mf4(op1); + return __riscv_vlmul_trunc_v_i16m4_i16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m4_i16mf2( @@ -1759,7 +1759,7 @@ vint16mf4_t test_vlmul_trunc_v_i16m4_i16mf4(vint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlmul_trunc_v_i16m4_i16mf2(vint16m4_t op1) { - return vlmul_trunc_v_i16m4_i16mf2(op1); + return __riscv_vlmul_trunc_v_i16m4_i16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m4_i16m1( @@ -1768,7 +1768,7 @@ vint16mf2_t test_vlmul_trunc_v_i16m4_i16mf2(vint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlmul_trunc_v_i16m4_i16m1(vint16m4_t op1) { - return vlmul_trunc_v_i16m4_i16m1(op1); + return __riscv_vlmul_trunc_v_i16m4_i16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m4_i16m2( @@ -1777,7 +1777,7 @@ vint16m1_t test_vlmul_trunc_v_i16m4_i16m1(vint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlmul_trunc_v_i16m4_i16m2(vint16m4_t op1) { - return vlmul_trunc_v_i16m4_i16m2(op1); + return __riscv_vlmul_trunc_v_i16m4_i16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m8_i16mf4( @@ -1786,7 +1786,7 @@ vint16m2_t test_vlmul_trunc_v_i16m4_i16m2(vint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlmul_trunc_v_i16m8_i16mf4(vint16m8_t op1) { - return vlmul_trunc_v_i16m8_i16mf4(op1); + return __riscv_vlmul_trunc_v_i16m8_i16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m8_i16mf2( @@ -1795,7 +1795,7 @@ vint16mf4_t test_vlmul_trunc_v_i16m8_i16mf4(vint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlmul_trunc_v_i16m8_i16mf2(vint16m8_t op1) { - return vlmul_trunc_v_i16m8_i16mf2(op1); + return __riscv_vlmul_trunc_v_i16m8_i16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m8_i16m1( @@ -1804,7 +1804,7 @@ vint16mf2_t test_vlmul_trunc_v_i16m8_i16mf2(vint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlmul_trunc_v_i16m8_i16m1(vint16m8_t op1) { - return vlmul_trunc_v_i16m8_i16m1(op1); + return __riscv_vlmul_trunc_v_i16m8_i16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m8_i16m2( @@ -1813,7 +1813,7 @@ vint16m1_t test_vlmul_trunc_v_i16m8_i16m1(vint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlmul_trunc_v_i16m8_i16m2(vint16m8_t op1) { - return vlmul_trunc_v_i16m8_i16m2(op1); + return __riscv_vlmul_trunc_v_i16m8_i16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i16m8_i16m4( @@ -1822,7 +1822,7 @@ vint16m2_t test_vlmul_trunc_v_i16m8_i16m2(vint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlmul_trunc_v_i16m8_i16m4(vint16m8_t op1) { - return vlmul_trunc_v_i16m8_i16m4(op1); + return __riscv_vlmul_trunc_v_i16m8_i16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m1_i32mf2( @@ -1831,7 +1831,7 @@ vint16m4_t test_vlmul_trunc_v_i16m8_i16m4(vint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlmul_trunc_v_i32m1_i32mf2(vint32m1_t op1) { - return vlmul_trunc_v_i32m1_i32mf2(op1); + return __riscv_vlmul_trunc_v_i32m1_i32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m2_i32mf2( @@ -1840,7 +1840,7 @@ vint32mf2_t test_vlmul_trunc_v_i32m1_i32mf2(vint32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlmul_trunc_v_i32m2_i32mf2(vint32m2_t op1) { - return vlmul_trunc_v_i32m2_i32mf2(op1); + return __riscv_vlmul_trunc_v_i32m2_i32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m2_i32m1( @@ -1849,7 +1849,7 @@ vint32mf2_t test_vlmul_trunc_v_i32m2_i32mf2(vint32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlmul_trunc_v_i32m2_i32m1(vint32m2_t op1) { - return vlmul_trunc_v_i32m2_i32m1(op1); + return __riscv_vlmul_trunc_v_i32m2_i32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m4_i32mf2( @@ -1858,7 +1858,7 @@ vint32m1_t test_vlmul_trunc_v_i32m2_i32m1(vint32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlmul_trunc_v_i32m4_i32mf2(vint32m4_t op1) { - return vlmul_trunc_v_i32m4_i32mf2(op1); + return __riscv_vlmul_trunc_v_i32m4_i32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m4_i32m1( @@ -1867,7 +1867,7 @@ vint32mf2_t test_vlmul_trunc_v_i32m4_i32mf2(vint32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlmul_trunc_v_i32m4_i32m1(vint32m4_t op1) { - return vlmul_trunc_v_i32m4_i32m1(op1); + return __riscv_vlmul_trunc_v_i32m4_i32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m4_i32m2( @@ -1876,7 +1876,7 @@ vint32m1_t test_vlmul_trunc_v_i32m4_i32m1(vint32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlmul_trunc_v_i32m4_i32m2(vint32m4_t op1) { - return vlmul_trunc_v_i32m4_i32m2(op1); + return __riscv_vlmul_trunc_v_i32m4_i32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m8_i32mf2( @@ -1885,7 +1885,7 @@ vint32m2_t test_vlmul_trunc_v_i32m4_i32m2(vint32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlmul_trunc_v_i32m8_i32mf2(vint32m8_t op1) { - return vlmul_trunc_v_i32m8_i32mf2(op1); + return __riscv_vlmul_trunc_v_i32m8_i32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m8_i32m1( @@ -1894,7 +1894,7 @@ vint32mf2_t test_vlmul_trunc_v_i32m8_i32mf2(vint32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlmul_trunc_v_i32m8_i32m1(vint32m8_t op1) { - return vlmul_trunc_v_i32m8_i32m1(op1); + return __riscv_vlmul_trunc_v_i32m8_i32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m8_i32m2( @@ -1903,7 +1903,7 @@ vint32m1_t test_vlmul_trunc_v_i32m8_i32m1(vint32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlmul_trunc_v_i32m8_i32m2(vint32m8_t op1) { - return vlmul_trunc_v_i32m8_i32m2(op1); + return __riscv_vlmul_trunc_v_i32m8_i32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i32m8_i32m4( @@ -1912,7 +1912,7 @@ vint32m2_t test_vlmul_trunc_v_i32m8_i32m2(vint32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlmul_trunc_v_i32m8_i32m4(vint32m8_t op1) { - return vlmul_trunc_v_i32m8_i32m4(op1); + return __riscv_vlmul_trunc_v_i32m8_i32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i64m2_i64m1( @@ -1921,7 +1921,7 @@ vint32m4_t test_vlmul_trunc_v_i32m8_i32m4(vint32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlmul_trunc_v_i64m2_i64m1(vint64m2_t op1) { - return vlmul_trunc_v_i64m2_i64m1(op1); + return __riscv_vlmul_trunc_v_i64m2_i64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i64m4_i64m1( @@ -1930,7 +1930,7 @@ vint64m1_t test_vlmul_trunc_v_i64m2_i64m1(vint64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlmul_trunc_v_i64m4_i64m1(vint64m4_t op1) { - return vlmul_trunc_v_i64m4_i64m1(op1); + return __riscv_vlmul_trunc_v_i64m4_i64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i64m4_i64m2( @@ -1939,7 +1939,7 @@ vint64m1_t test_vlmul_trunc_v_i64m4_i64m1(vint64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlmul_trunc_v_i64m4_i64m2(vint64m4_t op1) { - return vlmul_trunc_v_i64m4_i64m2(op1); + return __riscv_vlmul_trunc_v_i64m4_i64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i64m8_i64m1( @@ -1948,7 +1948,7 @@ vint64m2_t test_vlmul_trunc_v_i64m4_i64m2(vint64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlmul_trunc_v_i64m8_i64m1(vint64m8_t op1) { - return vlmul_trunc_v_i64m8_i64m1(op1); + return __riscv_vlmul_trunc_v_i64m8_i64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i64m8_i64m2( @@ -1957,7 +1957,7 @@ vint64m1_t test_vlmul_trunc_v_i64m8_i64m1(vint64m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlmul_trunc_v_i64m8_i64m2(vint64m8_t op1) { - return vlmul_trunc_v_i64m8_i64m2(op1); + return __riscv_vlmul_trunc_v_i64m8_i64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_i64m8_i64m4( @@ -1966,7 +1966,7 @@ vint64m2_t test_vlmul_trunc_v_i64m8_i64m2(vint64m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlmul_trunc_v_i64m8_i64m4(vint64m8_t op1) { - return vlmul_trunc_v_i64m8_i64m4(op1); + return __riscv_vlmul_trunc_v_i64m8_i64m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8mf4_u8mf8( @@ -1975,7 +1975,7 @@ vint64m4_t test_vlmul_trunc_v_i64m8_i64m4(vint64m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlmul_trunc_v_u8mf4_u8mf8(vuint8mf4_t op1) { - return vlmul_trunc_v_u8mf4_u8mf8(op1); + return __riscv_vlmul_trunc_v_u8mf4_u8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8mf2_u8mf8( @@ -1984,7 +1984,7 @@ vuint8mf8_t test_vlmul_trunc_v_u8mf4_u8mf8(vuint8mf4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlmul_trunc_v_u8mf2_u8mf8(vuint8mf2_t op1) { - return vlmul_trunc_v_u8mf2_u8mf8(op1); + return __riscv_vlmul_trunc_v_u8mf2_u8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8mf2_u8mf4( @@ -1993,7 +1993,7 @@ vuint8mf8_t test_vlmul_trunc_v_u8mf2_u8mf8(vuint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlmul_trunc_v_u8mf2_u8mf4(vuint8mf2_t op1) { - return vlmul_trunc_v_u8mf2_u8mf4(op1); + return __riscv_vlmul_trunc_v_u8mf2_u8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m1_u8mf8( @@ -2002,7 +2002,7 @@ vuint8mf4_t test_vlmul_trunc_v_u8mf2_u8mf4(vuint8mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlmul_trunc_v_u8m1_u8mf8(vuint8m1_t op1) { - return vlmul_trunc_v_u8m1_u8mf8(op1); + return __riscv_vlmul_trunc_v_u8m1_u8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m1_u8mf4( @@ -2011,7 +2011,7 @@ vuint8mf8_t test_vlmul_trunc_v_u8m1_u8mf8(vuint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlmul_trunc_v_u8m1_u8mf4(vuint8m1_t op1) { - return vlmul_trunc_v_u8m1_u8mf4(op1); + return __riscv_vlmul_trunc_v_u8m1_u8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m1_u8mf2( @@ -2020,7 +2020,7 @@ vuint8mf4_t test_vlmul_trunc_v_u8m1_u8mf4(vuint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlmul_trunc_v_u8m1_u8mf2(vuint8m1_t op1) { - return vlmul_trunc_v_u8m1_u8mf2(op1); + return __riscv_vlmul_trunc_v_u8m1_u8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m2_u8mf8( @@ -2029,7 +2029,7 @@ vuint8mf2_t test_vlmul_trunc_v_u8m1_u8mf2(vuint8m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlmul_trunc_v_u8m2_u8mf8(vuint8m2_t op1) { - return vlmul_trunc_v_u8m2_u8mf8(op1); + return __riscv_vlmul_trunc_v_u8m2_u8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m2_u8mf4( @@ -2038,7 +2038,7 @@ vuint8mf8_t test_vlmul_trunc_v_u8m2_u8mf8(vuint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlmul_trunc_v_u8m2_u8mf4(vuint8m2_t op1) { - return vlmul_trunc_v_u8m2_u8mf4(op1); + return __riscv_vlmul_trunc_v_u8m2_u8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m2_u8mf2( @@ -2047,7 +2047,7 @@ vuint8mf4_t test_vlmul_trunc_v_u8m2_u8mf4(vuint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlmul_trunc_v_u8m2_u8mf2(vuint8m2_t op1) { - return vlmul_trunc_v_u8m2_u8mf2(op1); + return __riscv_vlmul_trunc_v_u8m2_u8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m2_u8m1( @@ -2056,7 +2056,7 @@ vuint8mf2_t test_vlmul_trunc_v_u8m2_u8mf2(vuint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlmul_trunc_v_u8m2_u8m1(vuint8m2_t op1) { - return vlmul_trunc_v_u8m2_u8m1(op1); + return __riscv_vlmul_trunc_v_u8m2_u8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m4_u8mf8( @@ -2065,7 +2065,7 @@ vuint8m1_t test_vlmul_trunc_v_u8m2_u8m1(vuint8m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlmul_trunc_v_u8m4_u8mf8(vuint8m4_t op1) { - return vlmul_trunc_v_u8m4_u8mf8(op1); + return __riscv_vlmul_trunc_v_u8m4_u8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m4_u8mf4( @@ -2074,7 +2074,7 @@ vuint8mf8_t test_vlmul_trunc_v_u8m4_u8mf8(vuint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlmul_trunc_v_u8m4_u8mf4(vuint8m4_t op1) { - return vlmul_trunc_v_u8m4_u8mf4(op1); + return __riscv_vlmul_trunc_v_u8m4_u8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m4_u8mf2( @@ -2083,7 +2083,7 @@ vuint8mf4_t test_vlmul_trunc_v_u8m4_u8mf4(vuint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlmul_trunc_v_u8m4_u8mf2(vuint8m4_t op1) { - return vlmul_trunc_v_u8m4_u8mf2(op1); + return __riscv_vlmul_trunc_v_u8m4_u8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m4_u8m1( @@ -2092,7 +2092,7 @@ vuint8mf2_t test_vlmul_trunc_v_u8m4_u8mf2(vuint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlmul_trunc_v_u8m4_u8m1(vuint8m4_t op1) { - return vlmul_trunc_v_u8m4_u8m1(op1); + return __riscv_vlmul_trunc_v_u8m4_u8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m4_u8m2( @@ -2101,7 +2101,7 @@ vuint8m1_t test_vlmul_trunc_v_u8m4_u8m1(vuint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlmul_trunc_v_u8m4_u8m2(vuint8m4_t op1) { - return vlmul_trunc_v_u8m4_u8m2(op1); + return __riscv_vlmul_trunc_v_u8m4_u8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m8_u8mf8( @@ -2110,7 +2110,7 @@ vuint8m2_t test_vlmul_trunc_v_u8m4_u8m2(vuint8m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlmul_trunc_v_u8m8_u8mf8(vuint8m8_t op1) { - return vlmul_trunc_v_u8m8_u8mf8(op1); + return __riscv_vlmul_trunc_v_u8m8_u8mf8(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m8_u8mf4( @@ -2119,7 +2119,7 @@ vuint8mf8_t test_vlmul_trunc_v_u8m8_u8mf8(vuint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlmul_trunc_v_u8m8_u8mf4(vuint8m8_t op1) { - return vlmul_trunc_v_u8m8_u8mf4(op1); + return __riscv_vlmul_trunc_v_u8m8_u8mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m8_u8mf2( @@ -2128,7 +2128,7 @@ vuint8mf4_t test_vlmul_trunc_v_u8m8_u8mf4(vuint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlmul_trunc_v_u8m8_u8mf2(vuint8m8_t op1) { - return vlmul_trunc_v_u8m8_u8mf2(op1); + return __riscv_vlmul_trunc_v_u8m8_u8mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m8_u8m1( @@ -2137,7 +2137,7 @@ vuint8mf2_t test_vlmul_trunc_v_u8m8_u8mf2(vuint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlmul_trunc_v_u8m8_u8m1(vuint8m8_t op1) { - return vlmul_trunc_v_u8m8_u8m1(op1); + return __riscv_vlmul_trunc_v_u8m8_u8m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m8_u8m2( @@ -2146,7 +2146,7 @@ vuint8m1_t test_vlmul_trunc_v_u8m8_u8m1(vuint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlmul_trunc_v_u8m8_u8m2(vuint8m8_t op1) { - return vlmul_trunc_v_u8m8_u8m2(op1); + return __riscv_vlmul_trunc_v_u8m8_u8m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u8m8_u8m4( @@ -2155,7 +2155,7 @@ vuint8m2_t test_vlmul_trunc_v_u8m8_u8m2(vuint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlmul_trunc_v_u8m8_u8m4(vuint8m8_t op1) { - return vlmul_trunc_v_u8m8_u8m4(op1); + return __riscv_vlmul_trunc_v_u8m8_u8m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16mf2_u16mf4( @@ -2164,7 +2164,7 @@ vuint8m4_t test_vlmul_trunc_v_u8m8_u8m4(vuint8m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlmul_trunc_v_u16mf2_u16mf4(vuint16mf2_t op1) { - return vlmul_trunc_v_u16mf2_u16mf4(op1); + return __riscv_vlmul_trunc_v_u16mf2_u16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m1_u16mf4( @@ -2173,7 +2173,7 @@ vuint16mf4_t test_vlmul_trunc_v_u16mf2_u16mf4(vuint16mf2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlmul_trunc_v_u16m1_u16mf4(vuint16m1_t op1) { - return vlmul_trunc_v_u16m1_u16mf4(op1); + return __riscv_vlmul_trunc_v_u16m1_u16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m1_u16mf2( @@ -2182,7 +2182,7 @@ vuint16mf4_t test_vlmul_trunc_v_u16m1_u16mf4(vuint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlmul_trunc_v_u16m1_u16mf2(vuint16m1_t op1) { - return vlmul_trunc_v_u16m1_u16mf2(op1); + return __riscv_vlmul_trunc_v_u16m1_u16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m2_u16mf4( @@ -2191,7 +2191,7 @@ vuint16mf2_t test_vlmul_trunc_v_u16m1_u16mf2(vuint16m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlmul_trunc_v_u16m2_u16mf4(vuint16m2_t op1) { - return vlmul_trunc_v_u16m2_u16mf4(op1); + return __riscv_vlmul_trunc_v_u16m2_u16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m2_u16mf2( @@ -2200,7 +2200,7 @@ vuint16mf4_t test_vlmul_trunc_v_u16m2_u16mf4(vuint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlmul_trunc_v_u16m2_u16mf2(vuint16m2_t op1) { - return vlmul_trunc_v_u16m2_u16mf2(op1); + return __riscv_vlmul_trunc_v_u16m2_u16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m2_u16m1( @@ -2209,7 +2209,7 @@ vuint16mf2_t test_vlmul_trunc_v_u16m2_u16mf2(vuint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlmul_trunc_v_u16m2_u16m1(vuint16m2_t op1) { - return vlmul_trunc_v_u16m2_u16m1(op1); + return __riscv_vlmul_trunc_v_u16m2_u16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m4_u16mf4( @@ -2218,7 +2218,7 @@ vuint16m1_t test_vlmul_trunc_v_u16m2_u16m1(vuint16m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlmul_trunc_v_u16m4_u16mf4(vuint16m4_t op1) { - return vlmul_trunc_v_u16m4_u16mf4(op1); + return __riscv_vlmul_trunc_v_u16m4_u16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m4_u16mf2( @@ -2227,7 +2227,7 @@ vuint16mf4_t test_vlmul_trunc_v_u16m4_u16mf4(vuint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlmul_trunc_v_u16m4_u16mf2(vuint16m4_t op1) { - return vlmul_trunc_v_u16m4_u16mf2(op1); + return __riscv_vlmul_trunc_v_u16m4_u16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m4_u16m1( @@ -2236,7 +2236,7 @@ vuint16mf2_t test_vlmul_trunc_v_u16m4_u16mf2(vuint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlmul_trunc_v_u16m4_u16m1(vuint16m4_t op1) { - return vlmul_trunc_v_u16m4_u16m1(op1); + return __riscv_vlmul_trunc_v_u16m4_u16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m4_u16m2( @@ -2245,7 +2245,7 @@ vuint16m1_t test_vlmul_trunc_v_u16m4_u16m1(vuint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlmul_trunc_v_u16m4_u16m2(vuint16m4_t op1) { - return vlmul_trunc_v_u16m4_u16m2(op1); + return __riscv_vlmul_trunc_v_u16m4_u16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m8_u16mf4( @@ -2254,7 +2254,7 @@ vuint16m2_t test_vlmul_trunc_v_u16m4_u16m2(vuint16m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlmul_trunc_v_u16m8_u16mf4(vuint16m8_t op1) { - return vlmul_trunc_v_u16m8_u16mf4(op1); + return __riscv_vlmul_trunc_v_u16m8_u16mf4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m8_u16mf2( @@ -2263,7 +2263,7 @@ vuint16mf4_t test_vlmul_trunc_v_u16m8_u16mf4(vuint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlmul_trunc_v_u16m8_u16mf2(vuint16m8_t op1) { - return vlmul_trunc_v_u16m8_u16mf2(op1); + return __riscv_vlmul_trunc_v_u16m8_u16mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m8_u16m1( @@ -2272,7 +2272,7 @@ vuint16mf2_t test_vlmul_trunc_v_u16m8_u16mf2(vuint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlmul_trunc_v_u16m8_u16m1(vuint16m8_t op1) { - return vlmul_trunc_v_u16m8_u16m1(op1); + return __riscv_vlmul_trunc_v_u16m8_u16m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m8_u16m2( @@ -2281,7 +2281,7 @@ vuint16m1_t test_vlmul_trunc_v_u16m8_u16m1(vuint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlmul_trunc_v_u16m8_u16m2(vuint16m8_t op1) { - return vlmul_trunc_v_u16m8_u16m2(op1); + return __riscv_vlmul_trunc_v_u16m8_u16m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u16m8_u16m4( @@ -2290,7 +2290,7 @@ vuint16m2_t test_vlmul_trunc_v_u16m8_u16m2(vuint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlmul_trunc_v_u16m8_u16m4(vuint16m8_t op1) { - return vlmul_trunc_v_u16m8_u16m4(op1); + return __riscv_vlmul_trunc_v_u16m8_u16m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m1_u32mf2( @@ -2299,7 +2299,7 @@ vuint16m4_t test_vlmul_trunc_v_u16m8_u16m4(vuint16m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlmul_trunc_v_u32m1_u32mf2(vuint32m1_t op1) { - return vlmul_trunc_v_u32m1_u32mf2(op1); + return __riscv_vlmul_trunc_v_u32m1_u32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m2_u32mf2( @@ -2308,7 +2308,7 @@ vuint32mf2_t test_vlmul_trunc_v_u32m1_u32mf2(vuint32m1_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlmul_trunc_v_u32m2_u32mf2(vuint32m2_t op1) { - return vlmul_trunc_v_u32m2_u32mf2(op1); + return __riscv_vlmul_trunc_v_u32m2_u32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m2_u32m1( @@ -2317,7 +2317,7 @@ vuint32mf2_t test_vlmul_trunc_v_u32m2_u32mf2(vuint32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlmul_trunc_v_u32m2_u32m1(vuint32m2_t op1) { - return vlmul_trunc_v_u32m2_u32m1(op1); + return __riscv_vlmul_trunc_v_u32m2_u32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m4_u32mf2( @@ -2326,7 +2326,7 @@ vuint32m1_t test_vlmul_trunc_v_u32m2_u32m1(vuint32m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlmul_trunc_v_u32m4_u32mf2(vuint32m4_t op1) { - return vlmul_trunc_v_u32m4_u32mf2(op1); + return __riscv_vlmul_trunc_v_u32m4_u32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m4_u32m1( @@ -2335,7 +2335,7 @@ vuint32mf2_t test_vlmul_trunc_v_u32m4_u32mf2(vuint32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlmul_trunc_v_u32m4_u32m1(vuint32m4_t op1) { - return vlmul_trunc_v_u32m4_u32m1(op1); + return __riscv_vlmul_trunc_v_u32m4_u32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m4_u32m2( @@ -2344,7 +2344,7 @@ vuint32m1_t test_vlmul_trunc_v_u32m4_u32m1(vuint32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlmul_trunc_v_u32m4_u32m2(vuint32m4_t op1) { - return vlmul_trunc_v_u32m4_u32m2(op1); + return __riscv_vlmul_trunc_v_u32m4_u32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m8_u32mf2( @@ -2353,7 +2353,7 @@ vuint32m2_t test_vlmul_trunc_v_u32m4_u32m2(vuint32m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlmul_trunc_v_u32m8_u32mf2(vuint32m8_t op1) { - return vlmul_trunc_v_u32m8_u32mf2(op1); + return __riscv_vlmul_trunc_v_u32m8_u32mf2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m8_u32m1( @@ -2362,7 +2362,7 @@ vuint32mf2_t test_vlmul_trunc_v_u32m8_u32mf2(vuint32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlmul_trunc_v_u32m8_u32m1(vuint32m8_t op1) { - return vlmul_trunc_v_u32m8_u32m1(op1); + return __riscv_vlmul_trunc_v_u32m8_u32m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m8_u32m2( @@ -2371,7 +2371,7 @@ vuint32m1_t test_vlmul_trunc_v_u32m8_u32m1(vuint32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlmul_trunc_v_u32m8_u32m2(vuint32m8_t op1) { - return vlmul_trunc_v_u32m8_u32m2(op1); + return __riscv_vlmul_trunc_v_u32m8_u32m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u32m8_u32m4( @@ -2380,7 +2380,7 @@ vuint32m2_t test_vlmul_trunc_v_u32m8_u32m2(vuint32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlmul_trunc_v_u32m8_u32m4(vuint32m8_t op1) { - return vlmul_trunc_v_u32m8_u32m4(op1); + return __riscv_vlmul_trunc_v_u32m8_u32m4(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u64m2_u64m1( @@ -2389,7 +2389,7 @@ vuint32m4_t test_vlmul_trunc_v_u32m8_u32m4(vuint32m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlmul_trunc_v_u64m2_u64m1(vuint64m2_t op1) { - return vlmul_trunc_v_u64m2_u64m1(op1); + return __riscv_vlmul_trunc_v_u64m2_u64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u64m4_u64m1( @@ -2398,7 +2398,7 @@ vuint64m1_t test_vlmul_trunc_v_u64m2_u64m1(vuint64m2_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlmul_trunc_v_u64m4_u64m1(vuint64m4_t op1) { - return vlmul_trunc_v_u64m4_u64m1(op1); + return __riscv_vlmul_trunc_v_u64m4_u64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u64m4_u64m2( @@ -2407,7 +2407,7 @@ vuint64m1_t test_vlmul_trunc_v_u64m4_u64m1(vuint64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlmul_trunc_v_u64m4_u64m2(vuint64m4_t op1) { - return vlmul_trunc_v_u64m4_u64m2(op1); + return __riscv_vlmul_trunc_v_u64m4_u64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u64m8_u64m1( @@ -2416,7 +2416,7 @@ vuint64m2_t test_vlmul_trunc_v_u64m4_u64m2(vuint64m4_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlmul_trunc_v_u64m8_u64m1(vuint64m8_t op1) { - return vlmul_trunc_v_u64m8_u64m1(op1); + return __riscv_vlmul_trunc_v_u64m8_u64m1(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u64m8_u64m2( @@ -2425,7 +2425,7 @@ vuint64m1_t test_vlmul_trunc_v_u64m8_u64m1(vuint64m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlmul_trunc_v_u64m8_u64m2(vuint64m8_t op1) { - return vlmul_trunc_v_u64m8_u64m2(op1); + return __riscv_vlmul_trunc_v_u64m8_u64m2(op1); } // CHECK-RV64-LABEL: @test_vlmul_trunc_v_u64m8_u64m4( @@ -2434,6 +2434,6 @@ vuint64m2_t test_vlmul_trunc_v_u64m8_u64m2(vuint64m8_t op1) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlmul_trunc_v_u64m8_u64m4(vuint64m8_t op1) { - return vlmul_trunc_v_u64m8_u64m4(op1); + return __riscv_vlmul_trunc_v_u64m8_u64m4(op1); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei16.c index 6b9eae9d66844f739bc2186993027697878dc27b..d99a4afd756bfbefc26636ad6b96bb60a77fae80 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei16_v_f16mf4(const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f16mf4(base, bindex, vl); + return __riscv_vloxei16_v_f16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vloxei16_v_f16mf4(const _Float16 *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei16_v_f16mf2(const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f16mf2(base, bindex, vl); + return __riscv_vloxei16_v_f16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vloxei16_v_f16mf2(const _Float16 *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei16_v_f16m1(const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f16m1(base, bindex, vl); + return __riscv_vloxei16_v_f16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vloxei16_v_f16m1(const _Float16 *base, vuint16m1_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei16_v_f16m2(const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f16m2(base, bindex, vl); + return __riscv_vloxei16_v_f16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vloxei16_v_f16m2(const _Float16 *base, vuint16m2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei16_v_f16m4(const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f16m4(base, bindex, vl); + return __riscv_vloxei16_v_f16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vloxei16_v_f16m4(const _Float16 *base, vuint16m4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei16_v_f16m8(const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_f16m8(base, bindex, vl); + return __riscv_vloxei16_v_f16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vloxei16_v_f16m8(const _Float16 *base, vuint16m8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei16_v_f32mf2(const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f32mf2(base, bindex, vl); + return __riscv_vloxei16_v_f32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vloxei16_v_f32mf2(const float *base, vuint16mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei16_v_f32m1(const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f32m1(base, bindex, vl); + return __riscv_vloxei16_v_f32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vloxei16_v_f32m1(const float *base, vuint16mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei16_v_f32m2(const float *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f32m2(base, bindex, vl); + return __riscv_vloxei16_v_f32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vloxei16_v_f32m2(const float *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei16_v_f32m4(const float *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f32m4(base, bindex, vl); + return __riscv_vloxei16_v_f32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vloxei16_v_f32m4(const float *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei16_v_f32m8(const float *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f32m8(base, bindex, vl); + return __riscv_vloxei16_v_f32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vloxei16_v_f32m8(const float *base, vuint16m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei16_v_f64m1(const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f64m1(base, bindex, vl); + return __riscv_vloxei16_v_f64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vloxei16_v_f64m1(const double *base, vuint16mf4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei16_v_f64m2(const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f64m2(base, bindex, vl); + return __riscv_vloxei16_v_f64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vloxei16_v_f64m2(const double *base, vuint16mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei16_v_f64m4(const double *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f64m4(base, bindex, vl); + return __riscv_vloxei16_v_f64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vloxei16_v_f64m4(const double *base, vuint16m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei16_v_f64m8(const double *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f64m8(base, bindex, vl); + return __riscv_vloxei16_v_f64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf8( @@ -148,7 +148,7 @@ vfloat64m8_t test_vloxei16_v_f64m8(const double *base, vuint16m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei16_v_i8mf8(const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i8mf8(base, bindex, vl); + return __riscv_vloxei16_v_i8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf4( @@ -157,7 +157,7 @@ vint8mf8_t test_vloxei16_v_i8mf8(const int8_t *base, vuint16mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei16_v_i8mf4(const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i8mf4(base, bindex, vl); + return __riscv_vloxei16_v_i8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf2( @@ -166,7 +166,7 @@ vint8mf4_t test_vloxei16_v_i8mf4(const int8_t *base, vuint16mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei16_v_i8mf2(const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i8mf2(base, bindex, vl); + return __riscv_vloxei16_v_i8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m1( @@ -175,7 +175,7 @@ vint8mf2_t test_vloxei16_v_i8mf2(const int8_t *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei16_v_i8m1(const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i8m1(base, bindex, vl); + return __riscv_vloxei16_v_i8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m2( @@ -184,7 +184,7 @@ vint8m1_t test_vloxei16_v_i8m1(const int8_t *base, vuint16m2_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei16_v_i8m2(const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i8m2(base, bindex, vl); + return __riscv_vloxei16_v_i8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m4( @@ -193,7 +193,7 @@ vint8m2_t test_vloxei16_v_i8m2(const int8_t *base, vuint16m4_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei16_v_i8m4(const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i8m4(base, bindex, vl); + return __riscv_vloxei16_v_i8m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf4( @@ -202,7 +202,7 @@ vint8m4_t test_vloxei16_v_i8m4(const int8_t *base, vuint16m8_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei16_v_i16mf4(const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i16mf4(base, bindex, vl); + return __riscv_vloxei16_v_i16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf2( @@ -211,7 +211,7 @@ vint16mf4_t test_vloxei16_v_i16mf4(const int16_t *base, vuint16mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei16_v_i16mf2(const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i16mf2(base, bindex, vl); + return __riscv_vloxei16_v_i16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m1( @@ -220,7 +220,7 @@ vint16mf2_t test_vloxei16_v_i16mf2(const int16_t *base, vuint16mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei16_v_i16m1(const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i16m1(base, bindex, vl); + return __riscv_vloxei16_v_i16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m2( @@ -229,7 +229,7 @@ vint16m1_t test_vloxei16_v_i16m1(const int16_t *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei16_v_i16m2(const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i16m2(base, bindex, vl); + return __riscv_vloxei16_v_i16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m4( @@ -238,7 +238,7 @@ vint16m2_t test_vloxei16_v_i16m2(const int16_t *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei16_v_i16m4(const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i16m4(base, bindex, vl); + return __riscv_vloxei16_v_i16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m8( @@ -247,7 +247,7 @@ vint16m4_t test_vloxei16_v_i16m4(const int16_t *base, vuint16m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei16_v_i16m8(const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i16m8(base, bindex, vl); + return __riscv_vloxei16_v_i16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32mf2( @@ -256,7 +256,7 @@ vint16m8_t test_vloxei16_v_i16m8(const int16_t *base, vuint16m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei16_v_i32mf2(const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i32mf2(base, bindex, vl); + return __riscv_vloxei16_v_i32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vloxei16_v_i32mf2(const int32_t *base, vuint16mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei16_v_i32m1(const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i32m1(base, bindex, vl); + return __riscv_vloxei16_v_i32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m2( @@ -274,7 +274,7 @@ vint32m1_t test_vloxei16_v_i32m1(const int32_t *base, vuint16mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei16_v_i32m2(const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i32m2(base, bindex, vl); + return __riscv_vloxei16_v_i32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m4( @@ -283,7 +283,7 @@ vint32m2_t test_vloxei16_v_i32m2(const int32_t *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei16_v_i32m4(const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i32m4(base, bindex, vl); + return __riscv_vloxei16_v_i32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m8( @@ -292,7 +292,7 @@ vint32m4_t test_vloxei16_v_i32m4(const int32_t *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei16_v_i32m8(const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i32m8(base, bindex, vl); + return __riscv_vloxei16_v_i32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m1( @@ -301,7 +301,7 @@ vint32m8_t test_vloxei16_v_i32m8(const int32_t *base, vuint16m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei16_v_i64m1(const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i64m1(base, bindex, vl); + return __riscv_vloxei16_v_i64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m2( @@ -310,7 +310,7 @@ vint64m1_t test_vloxei16_v_i64m1(const int64_t *base, vuint16mf4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei16_v_i64m2(const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i64m2(base, bindex, vl); + return __riscv_vloxei16_v_i64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m4( @@ -319,7 +319,7 @@ vint64m2_t test_vloxei16_v_i64m2(const int64_t *base, vuint16mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei16_v_i64m4(const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i64m4(base, bindex, vl); + return __riscv_vloxei16_v_i64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m8( @@ -328,7 +328,7 @@ vint64m4_t test_vloxei16_v_i64m4(const int64_t *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei16_v_i64m8(const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i64m8(base, bindex, vl); + return __riscv_vloxei16_v_i64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf8( @@ -337,7 +337,7 @@ vint64m8_t test_vloxei16_v_i64m8(const int64_t *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei16_v_u8mf8(const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u8mf8(base, bindex, vl); + return __riscv_vloxei16_v_u8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf4( @@ -346,7 +346,7 @@ vuint8mf8_t test_vloxei16_v_u8mf8(const uint8_t *base, vuint16mf4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei16_v_u8mf4(const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u8mf4(base, bindex, vl); + return __riscv_vloxei16_v_u8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf2( @@ -355,7 +355,7 @@ vuint8mf4_t test_vloxei16_v_u8mf4(const uint8_t *base, vuint16mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei16_v_u8mf2(const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u8mf2(base, bindex, vl); + return __riscv_vloxei16_v_u8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m1( @@ -364,7 +364,7 @@ vuint8mf2_t test_vloxei16_v_u8mf2(const uint8_t *base, vuint16m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei16_v_u8m1(const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u8m1(base, bindex, vl); + return __riscv_vloxei16_v_u8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m2( @@ -373,7 +373,7 @@ vuint8m1_t test_vloxei16_v_u8m1(const uint8_t *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei16_v_u8m2(const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u8m2(base, bindex, vl); + return __riscv_vloxei16_v_u8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m4( @@ -382,7 +382,7 @@ vuint8m2_t test_vloxei16_v_u8m2(const uint8_t *base, vuint16m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei16_v_u8m4(const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u8m4(base, bindex, vl); + return __riscv_vloxei16_v_u8m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf4( @@ -391,7 +391,7 @@ vuint8m4_t test_vloxei16_v_u8m4(const uint8_t *base, vuint16m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei16_v_u16mf4(const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u16mf4(base, bindex, vl); + return __riscv_vloxei16_v_u16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf2( @@ -400,7 +400,7 @@ vuint16mf4_t test_vloxei16_v_u16mf4(const uint16_t *base, vuint16mf4_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei16_v_u16mf2(const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u16mf2(base, bindex, vl); + return __riscv_vloxei16_v_u16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m1( @@ -409,7 +409,7 @@ vuint16mf2_t test_vloxei16_v_u16mf2(const uint16_t *base, vuint16mf2_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei16_v_u16m1(const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u16m1(base, bindex, vl); + return __riscv_vloxei16_v_u16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m2( @@ -418,7 +418,7 @@ vuint16m1_t test_vloxei16_v_u16m1(const uint16_t *base, vuint16m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei16_v_u16m2(const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u16m2(base, bindex, vl); + return __riscv_vloxei16_v_u16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m4( @@ -427,7 +427,7 @@ vuint16m2_t test_vloxei16_v_u16m2(const uint16_t *base, vuint16m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei16_v_u16m4(const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u16m4(base, bindex, vl); + return __riscv_vloxei16_v_u16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m8( @@ -436,7 +436,7 @@ vuint16m4_t test_vloxei16_v_u16m4(const uint16_t *base, vuint16m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei16_v_u16m8(const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u16m8(base, bindex, vl); + return __riscv_vloxei16_v_u16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32mf2( @@ -445,7 +445,7 @@ vuint16m8_t test_vloxei16_v_u16m8(const uint16_t *base, vuint16m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei16_v_u32mf2(const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u32mf2(base, bindex, vl); + return __riscv_vloxei16_v_u32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m1( @@ -454,7 +454,7 @@ vuint32mf2_t test_vloxei16_v_u32mf2(const uint32_t *base, vuint16mf4_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei16_v_u32m1(const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u32m1(base, bindex, vl); + return __riscv_vloxei16_v_u32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m2( @@ -463,7 +463,7 @@ vuint32m1_t test_vloxei16_v_u32m1(const uint32_t *base, vuint16mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei16_v_u32m2(const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u32m2(base, bindex, vl); + return __riscv_vloxei16_v_u32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m4( @@ -472,7 +472,7 @@ vuint32m2_t test_vloxei16_v_u32m2(const uint32_t *base, vuint16m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei16_v_u32m4(const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u32m4(base, bindex, vl); + return __riscv_vloxei16_v_u32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m8( @@ -481,7 +481,7 @@ vuint32m4_t test_vloxei16_v_u32m4(const uint32_t *base, vuint16m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei16_v_u32m8(const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u32m8(base, bindex, vl); + return __riscv_vloxei16_v_u32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m1( @@ -490,7 +490,7 @@ vuint32m8_t test_vloxei16_v_u32m8(const uint32_t *base, vuint16m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei16_v_u64m1(const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u64m1(base, bindex, vl); + return __riscv_vloxei16_v_u64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m2( @@ -499,7 +499,7 @@ vuint64m1_t test_vloxei16_v_u64m1(const uint64_t *base, vuint16mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei16_v_u64m2(const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u64m2(base, bindex, vl); + return __riscv_vloxei16_v_u64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m4( @@ -508,7 +508,7 @@ vuint64m2_t test_vloxei16_v_u64m2(const uint64_t *base, vuint16mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei16_v_u64m4(const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u64m4(base, bindex, vl); + return __riscv_vloxei16_v_u64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m8( @@ -517,7 +517,7 @@ vuint64m4_t test_vloxei16_v_u64m4(const uint64_t *base, vuint16m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei16_v_u64m8(const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u64m8(base, bindex, vl); + return __riscv_vloxei16_v_u64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf4_m( @@ -526,7 +526,7 @@ vuint64m8_t test_vloxei16_v_u64m8(const uint64_t *base, vuint16m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei16_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf2_m( @@ -535,7 +535,7 @@ vfloat16mf4_t test_vloxei16_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei16_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m1_m( @@ -544,7 +544,7 @@ vfloat16mf2_t test_vloxei16_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei16_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f16m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m2_m( @@ -553,7 +553,7 @@ vfloat16m1_t test_vloxei16_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei16_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f16m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m4_m( @@ -562,7 +562,7 @@ vfloat16m2_t test_vloxei16_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei16_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f16m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m8_m( @@ -571,7 +571,7 @@ vfloat16m4_t test_vloxei16_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei16_v_f16m8_m(vbool2_t mask, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_f16m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32mf2_m( @@ -580,7 +580,7 @@ vfloat16m8_t test_vloxei16_v_f16m8_m(vbool2_t mask, const _Float16 *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei16_v_f32mf2_m(vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m1_m( @@ -589,7 +589,7 @@ vfloat32mf2_t test_vloxei16_v_f32mf2_m(vbool64_t mask, const float *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei16_v_f32m1_m(vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f32m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m2_m( @@ -598,7 +598,7 @@ vfloat32m1_t test_vloxei16_v_f32m1_m(vbool32_t mask, const float *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei16_v_f32m2_m(vbool16_t mask, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f32m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m4_m( @@ -607,7 +607,7 @@ vfloat32m2_t test_vloxei16_v_f32m2_m(vbool16_t mask, const float *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei16_v_f32m4_m(vbool8_t mask, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f32m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m8_m( @@ -616,7 +616,7 @@ vfloat32m4_t test_vloxei16_v_f32m4_m(vbool8_t mask, const float *base, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei16_v_f32m8_m(vbool4_t mask, const float *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f32m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m1_m( @@ -625,7 +625,7 @@ vfloat32m8_t test_vloxei16_v_f32m8_m(vbool4_t mask, const float *base, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei16_v_f64m1_m(vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f64m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m2_m( @@ -634,7 +634,7 @@ vfloat64m1_t test_vloxei16_v_f64m1_m(vbool64_t mask, const double *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei16_v_f64m2_m(vbool32_t mask, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f64m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m4_m( @@ -643,7 +643,7 @@ vfloat64m2_t test_vloxei16_v_f64m2_m(vbool32_t mask, const double *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei16_v_f64m4_m(vbool16_t mask, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f64m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m8_m( @@ -652,7 +652,7 @@ vfloat64m4_t test_vloxei16_v_f64m4_m(vbool16_t mask, const double *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei16_v_f64m8_m(vbool8_t mask, const double *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f64m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_f64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf8_m( @@ -661,7 +661,7 @@ vfloat64m8_t test_vloxei16_v_f64m8_m(vbool8_t mask, const double *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei16_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i8mf8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf4_m( @@ -670,7 +670,7 @@ vint8mf8_t test_vloxei16_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei16_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i8mf4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf2_m( @@ -679,7 +679,7 @@ vint8mf4_t test_vloxei16_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei16_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i8mf2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m1_m( @@ -688,7 +688,7 @@ vint8mf2_t test_vloxei16_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei16_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i8m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m2_m( @@ -697,7 +697,7 @@ vint8m1_t test_vloxei16_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei16_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i8m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m4_m( @@ -706,7 +706,7 @@ vint8m2_t test_vloxei16_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei16_v_i8m4_m(vbool2_t mask, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i8m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i8m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf4_m( @@ -715,7 +715,7 @@ vint8m4_t test_vloxei16_v_i8m4_m(vbool2_t mask, const int8_t *base, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei16_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf2_m( @@ -724,7 +724,7 @@ vint16mf4_t test_vloxei16_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei16_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m1_m( @@ -733,7 +733,7 @@ vint16mf2_t test_vloxei16_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei16_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i16m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m2_m( @@ -742,7 +742,7 @@ vint16m1_t test_vloxei16_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei16_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i16m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m4_m( @@ -751,7 +751,7 @@ vint16m2_t test_vloxei16_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei16_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i16m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m8_m( @@ -760,7 +760,7 @@ vint16m4_t test_vloxei16_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei16_v_i16m8_m(vbool2_t mask, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i16m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32mf2_m( @@ -769,7 +769,7 @@ vint16m8_t test_vloxei16_v_i16m8_m(vbool2_t mask, const int16_t *base, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei16_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m1_m( @@ -778,7 +778,7 @@ vint32mf2_t test_vloxei16_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei16_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i32m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m2_m( @@ -787,7 +787,7 @@ vint32m1_t test_vloxei16_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei16_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i32m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m4_m( @@ -796,7 +796,7 @@ vint32m2_t test_vloxei16_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei16_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i32m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m8_m( @@ -805,7 +805,7 @@ vint32m4_t test_vloxei16_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei16_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i32m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m1_m( @@ -814,7 +814,7 @@ vint32m8_t test_vloxei16_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei16_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i64m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m2_m( @@ -823,7 +823,7 @@ vint64m1_t test_vloxei16_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei16_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i64m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m4_m( @@ -832,7 +832,7 @@ vint64m2_t test_vloxei16_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei16_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i64m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m8_m( @@ -841,7 +841,7 @@ vint64m4_t test_vloxei16_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei16_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i64m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_i64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf8_m( @@ -850,7 +850,7 @@ vint64m8_t test_vloxei16_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei16_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u8mf8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf4_m( @@ -859,7 +859,7 @@ vuint8mf8_t test_vloxei16_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei16_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u8mf4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf2_m( @@ -868,7 +868,7 @@ vuint8mf4_t test_vloxei16_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei16_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u8mf2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m1_m( @@ -877,7 +877,7 @@ vuint8mf2_t test_vloxei16_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei16_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u8m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m2_m( @@ -886,7 +886,7 @@ vuint8m1_t test_vloxei16_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei16_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u8m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m4_m( @@ -895,7 +895,7 @@ vuint8m2_t test_vloxei16_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei16_v_u8m4_m(vbool2_t mask, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u8m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u8m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf4_m( @@ -904,7 +904,7 @@ vuint8m4_t test_vloxei16_v_u8m4_m(vbool2_t mask, const uint8_t *base, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei16_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf2_m( @@ -913,7 +913,7 @@ vuint16mf4_t test_vloxei16_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei16_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m1_m( @@ -922,7 +922,7 @@ vuint16mf2_t test_vloxei16_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei16_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u16m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m2_m( @@ -931,7 +931,7 @@ vuint16m1_t test_vloxei16_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei16_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u16m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m4_m( @@ -940,7 +940,7 @@ vuint16m2_t test_vloxei16_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei16_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u16m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m8_m( @@ -949,7 +949,7 @@ vuint16m4_t test_vloxei16_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei16_v_u16m8_m(vbool2_t mask, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u16m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32mf2_m( @@ -958,7 +958,7 @@ vuint16m8_t test_vloxei16_v_u16m8_m(vbool2_t mask, const uint16_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei16_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m1_m( @@ -967,7 +967,7 @@ vuint32mf2_t test_vloxei16_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei16_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u32m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m2_m( @@ -976,7 +976,7 @@ vuint32m1_t test_vloxei16_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei16_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u32m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m4_m( @@ -985,7 +985,7 @@ vuint32m2_t test_vloxei16_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei16_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u32m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m8_m( @@ -994,7 +994,7 @@ vuint32m4_t test_vloxei16_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei16_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u32m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m1_m( @@ -1003,7 +1003,7 @@ vuint32m8_t test_vloxei16_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei16_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u64m1_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m2_m( @@ -1012,7 +1012,7 @@ vuint64m1_t test_vloxei16_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei16_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u64m2_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m4_m( @@ -1021,7 +1021,7 @@ vuint64m2_t test_vloxei16_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei16_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u64m4_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m8_m( @@ -1030,6 +1030,6 @@ vuint64m4_t test_vloxei16_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei16_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u64m8_m(mask, base, bindex, vl); + return __riscv_vloxei16_v_u64m8_m(mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei32.c index 347416d9f83d8aa8586e83c8e5ec653b410499e8..894d6e8950d6f7eeff0899e9e58bf7ca6c5bd7cc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei32_v_f16mf4(const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f16mf4(base, bindex, vl); + return __riscv_vloxei32_v_f16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vloxei32_v_f16mf4(const _Float16 *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei32_v_f16mf2(const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f16mf2(base, bindex, vl); + return __riscv_vloxei32_v_f16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vloxei32_v_f16mf2(const _Float16 *base, vuint32m1_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei32_v_f16m1(const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f16m1(base, bindex, vl); + return __riscv_vloxei32_v_f16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vloxei32_v_f16m1(const _Float16 *base, vuint32m2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei32_v_f16m2(const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f16m2(base, bindex, vl); + return __riscv_vloxei32_v_f16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vloxei32_v_f16m2(const _Float16 *base, vuint32m4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei32_v_f16m4(const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f16m4(base, bindex, vl); + return __riscv_vloxei32_v_f16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32mf2( @@ -58,7 +58,7 @@ vfloat16m4_t test_vloxei32_v_f16m4(const _Float16 *base, vuint32m8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei32_v_f32mf2(const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f32mf2(base, bindex, vl); + return __riscv_vloxei32_v_f32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m1( @@ -67,7 +67,7 @@ vfloat32mf2_t test_vloxei32_v_f32mf2(const float *base, vuint32mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei32_v_f32m1(const float *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f32m1(base, bindex, vl); + return __riscv_vloxei32_v_f32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m2( @@ -76,7 +76,7 @@ vfloat32m1_t test_vloxei32_v_f32m1(const float *base, vuint32m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei32_v_f32m2(const float *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f32m2(base, bindex, vl); + return __riscv_vloxei32_v_f32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m4( @@ -85,7 +85,7 @@ vfloat32m2_t test_vloxei32_v_f32m2(const float *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei32_v_f32m4(const float *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f32m4(base, bindex, vl); + return __riscv_vloxei32_v_f32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m8( @@ -94,7 +94,7 @@ vfloat32m4_t test_vloxei32_v_f32m4(const float *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei32_v_f32m8(const float *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f32m8(base, bindex, vl); + return __riscv_vloxei32_v_f32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m1( @@ -103,7 +103,7 @@ vfloat32m8_t test_vloxei32_v_f32m8(const float *base, vuint32m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei32_v_f64m1(const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f64m1(base, bindex, vl); + return __riscv_vloxei32_v_f64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m2( @@ -112,7 +112,7 @@ vfloat64m1_t test_vloxei32_v_f64m1(const double *base, vuint32mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei32_v_f64m2(const double *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f64m2(base, bindex, vl); + return __riscv_vloxei32_v_f64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m4( @@ -121,7 +121,7 @@ vfloat64m2_t test_vloxei32_v_f64m2(const double *base, vuint32m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei32_v_f64m4(const double *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f64m4(base, bindex, vl); + return __riscv_vloxei32_v_f64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m8( @@ -130,7 +130,7 @@ vfloat64m4_t test_vloxei32_v_f64m4(const double *base, vuint32m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei32_v_f64m8(const double *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f64m8(base, bindex, vl); + return __riscv_vloxei32_v_f64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf8( @@ -139,7 +139,7 @@ vfloat64m8_t test_vloxei32_v_f64m8(const double *base, vuint32m4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei32_v_i8mf8(const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i8mf8(base, bindex, vl); + return __riscv_vloxei32_v_i8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf4( @@ -148,7 +148,7 @@ vint8mf8_t test_vloxei32_v_i8mf8(const int8_t *base, vuint32mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei32_v_i8mf4(const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i8mf4(base, bindex, vl); + return __riscv_vloxei32_v_i8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf2( @@ -157,7 +157,7 @@ vint8mf4_t test_vloxei32_v_i8mf4(const int8_t *base, vuint32m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei32_v_i8mf2(const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i8mf2(base, bindex, vl); + return __riscv_vloxei32_v_i8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m1( @@ -166,7 +166,7 @@ vint8mf2_t test_vloxei32_v_i8mf2(const int8_t *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei32_v_i8m1(const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i8m1(base, bindex, vl); + return __riscv_vloxei32_v_i8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m2( @@ -175,7 +175,7 @@ vint8m1_t test_vloxei32_v_i8m1(const int8_t *base, vuint32m4_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei32_v_i8m2(const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i8m2(base, bindex, vl); + return __riscv_vloxei32_v_i8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf4( @@ -184,7 +184,7 @@ vint8m2_t test_vloxei32_v_i8m2(const int8_t *base, vuint32m8_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei32_v_i16mf4(const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i16mf4(base, bindex, vl); + return __riscv_vloxei32_v_i16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf2( @@ -193,7 +193,7 @@ vint16mf4_t test_vloxei32_v_i16mf4(const int16_t *base, vuint32mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei32_v_i16mf2(const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i16mf2(base, bindex, vl); + return __riscv_vloxei32_v_i16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m1( @@ -202,7 +202,7 @@ vint16mf2_t test_vloxei32_v_i16mf2(const int16_t *base, vuint32m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei32_v_i16m1(const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i16m1(base, bindex, vl); + return __riscv_vloxei32_v_i16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m2( @@ -211,7 +211,7 @@ vint16m1_t test_vloxei32_v_i16m1(const int16_t *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei32_v_i16m2(const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i16m2(base, bindex, vl); + return __riscv_vloxei32_v_i16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m4( @@ -220,7 +220,7 @@ vint16m2_t test_vloxei32_v_i16m2(const int16_t *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei32_v_i16m4(const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i16m4(base, bindex, vl); + return __riscv_vloxei32_v_i16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32mf2( @@ -229,7 +229,7 @@ vint16m4_t test_vloxei32_v_i16m4(const int16_t *base, vuint32m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei32_v_i32mf2(const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i32mf2(base, bindex, vl); + return __riscv_vloxei32_v_i32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m1( @@ -238,7 +238,7 @@ vint32mf2_t test_vloxei32_v_i32mf2(const int32_t *base, vuint32mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei32_v_i32m1(const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i32m1(base, bindex, vl); + return __riscv_vloxei32_v_i32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m2( @@ -247,7 +247,7 @@ vint32m1_t test_vloxei32_v_i32m1(const int32_t *base, vuint32m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei32_v_i32m2(const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i32m2(base, bindex, vl); + return __riscv_vloxei32_v_i32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m4( @@ -256,7 +256,7 @@ vint32m2_t test_vloxei32_v_i32m2(const int32_t *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei32_v_i32m4(const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i32m4(base, bindex, vl); + return __riscv_vloxei32_v_i32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m8( @@ -265,7 +265,7 @@ vint32m4_t test_vloxei32_v_i32m4(const int32_t *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei32_v_i32m8(const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i32m8(base, bindex, vl); + return __riscv_vloxei32_v_i32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m1( @@ -274,7 +274,7 @@ vint32m8_t test_vloxei32_v_i32m8(const int32_t *base, vuint32m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei32_v_i64m1(const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i64m1(base, bindex, vl); + return __riscv_vloxei32_v_i64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m2( @@ -283,7 +283,7 @@ vint64m1_t test_vloxei32_v_i64m1(const int64_t *base, vuint32mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei32_v_i64m2(const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i64m2(base, bindex, vl); + return __riscv_vloxei32_v_i64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m4( @@ -292,7 +292,7 @@ vint64m2_t test_vloxei32_v_i64m2(const int64_t *base, vuint32m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei32_v_i64m4(const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i64m4(base, bindex, vl); + return __riscv_vloxei32_v_i64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m8( @@ -301,7 +301,7 @@ vint64m4_t test_vloxei32_v_i64m4(const int64_t *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei32_v_i64m8(const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i64m8(base, bindex, vl); + return __riscv_vloxei32_v_i64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf8( @@ -310,7 +310,7 @@ vint64m8_t test_vloxei32_v_i64m8(const int64_t *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei32_v_u8mf8(const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u8mf8(base, bindex, vl); + return __riscv_vloxei32_v_u8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf4( @@ -319,7 +319,7 @@ vuint8mf8_t test_vloxei32_v_u8mf8(const uint8_t *base, vuint32mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei32_v_u8mf4(const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u8mf4(base, bindex, vl); + return __riscv_vloxei32_v_u8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf2( @@ -328,7 +328,7 @@ vuint8mf4_t test_vloxei32_v_u8mf4(const uint8_t *base, vuint32m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei32_v_u8mf2(const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u8mf2(base, bindex, vl); + return __riscv_vloxei32_v_u8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m1( @@ -337,7 +337,7 @@ vuint8mf2_t test_vloxei32_v_u8mf2(const uint8_t *base, vuint32m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei32_v_u8m1(const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u8m1(base, bindex, vl); + return __riscv_vloxei32_v_u8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m2( @@ -346,7 +346,7 @@ vuint8m1_t test_vloxei32_v_u8m1(const uint8_t *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei32_v_u8m2(const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u8m2(base, bindex, vl); + return __riscv_vloxei32_v_u8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf4( @@ -355,7 +355,7 @@ vuint8m2_t test_vloxei32_v_u8m2(const uint8_t *base, vuint32m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei32_v_u16mf4(const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u16mf4(base, bindex, vl); + return __riscv_vloxei32_v_u16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf2( @@ -364,7 +364,7 @@ vuint16mf4_t test_vloxei32_v_u16mf4(const uint16_t *base, vuint32mf2_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei32_v_u16mf2(const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u16mf2(base, bindex, vl); + return __riscv_vloxei32_v_u16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m1( @@ -373,7 +373,7 @@ vuint16mf2_t test_vloxei32_v_u16mf2(const uint16_t *base, vuint32m1_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei32_v_u16m1(const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u16m1(base, bindex, vl); + return __riscv_vloxei32_v_u16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m2( @@ -382,7 +382,7 @@ vuint16m1_t test_vloxei32_v_u16m1(const uint16_t *base, vuint32m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei32_v_u16m2(const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u16m2(base, bindex, vl); + return __riscv_vloxei32_v_u16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m4( @@ -391,7 +391,7 @@ vuint16m2_t test_vloxei32_v_u16m2(const uint16_t *base, vuint32m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei32_v_u16m4(const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u16m4(base, bindex, vl); + return __riscv_vloxei32_v_u16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32mf2( @@ -400,7 +400,7 @@ vuint16m4_t test_vloxei32_v_u16m4(const uint16_t *base, vuint32m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei32_v_u32mf2(const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u32mf2(base, bindex, vl); + return __riscv_vloxei32_v_u32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m1( @@ -409,7 +409,7 @@ vuint32mf2_t test_vloxei32_v_u32mf2(const uint32_t *base, vuint32mf2_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei32_v_u32m1(const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u32m1(base, bindex, vl); + return __riscv_vloxei32_v_u32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m2( @@ -418,7 +418,7 @@ vuint32m1_t test_vloxei32_v_u32m1(const uint32_t *base, vuint32m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei32_v_u32m2(const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u32m2(base, bindex, vl); + return __riscv_vloxei32_v_u32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m4( @@ -427,7 +427,7 @@ vuint32m2_t test_vloxei32_v_u32m2(const uint32_t *base, vuint32m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei32_v_u32m4(const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u32m4(base, bindex, vl); + return __riscv_vloxei32_v_u32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m8( @@ -436,7 +436,7 @@ vuint32m4_t test_vloxei32_v_u32m4(const uint32_t *base, vuint32m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei32_v_u32m8(const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u32m8(base, bindex, vl); + return __riscv_vloxei32_v_u32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m1( @@ -445,7 +445,7 @@ vuint32m8_t test_vloxei32_v_u32m8(const uint32_t *base, vuint32m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei32_v_u64m1(const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u64m1(base, bindex, vl); + return __riscv_vloxei32_v_u64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m2( @@ -454,7 +454,7 @@ vuint64m1_t test_vloxei32_v_u64m1(const uint64_t *base, vuint32mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei32_v_u64m2(const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u64m2(base, bindex, vl); + return __riscv_vloxei32_v_u64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m4( @@ -463,7 +463,7 @@ vuint64m2_t test_vloxei32_v_u64m2(const uint64_t *base, vuint32m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei32_v_u64m4(const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u64m4(base, bindex, vl); + return __riscv_vloxei32_v_u64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m8( @@ -472,7 +472,7 @@ vuint64m4_t test_vloxei32_v_u64m4(const uint64_t *base, vuint32m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei32_v_u64m8(const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u64m8(base, bindex, vl); + return __riscv_vloxei32_v_u64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf4_m( @@ -481,7 +481,7 @@ vuint64m8_t test_vloxei32_v_u64m8(const uint64_t *base, vuint32m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei32_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf2_m( @@ -490,7 +490,7 @@ vfloat16mf4_t test_vloxei32_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei32_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m1_m( @@ -499,7 +499,7 @@ vfloat16mf2_t test_vloxei32_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei32_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f16m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m2_m( @@ -508,7 +508,7 @@ vfloat16m1_t test_vloxei32_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei32_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f16m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m4_m( @@ -517,7 +517,7 @@ vfloat16m2_t test_vloxei32_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei32_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f16m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32mf2_m( @@ -526,7 +526,7 @@ vfloat16m4_t test_vloxei32_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei32_v_f32mf2_m(vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m1_m( @@ -535,7 +535,7 @@ vfloat32mf2_t test_vloxei32_v_f32mf2_m(vbool64_t mask, const float *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei32_v_f32m1_m(vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f32m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m2_m( @@ -544,7 +544,7 @@ vfloat32m1_t test_vloxei32_v_f32m1_m(vbool32_t mask, const float *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei32_v_f32m2_m(vbool16_t mask, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f32m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m4_m( @@ -553,7 +553,7 @@ vfloat32m2_t test_vloxei32_v_f32m2_m(vbool16_t mask, const float *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei32_v_f32m4_m(vbool8_t mask, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f32m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m8_m( @@ -562,7 +562,7 @@ vfloat32m4_t test_vloxei32_v_f32m4_m(vbool8_t mask, const float *base, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei32_v_f32m8_m(vbool4_t mask, const float *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f32m8_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m1_m( @@ -571,7 +571,7 @@ vfloat32m8_t test_vloxei32_v_f32m8_m(vbool4_t mask, const float *base, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei32_v_f64m1_m(vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f64m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m2_m( @@ -580,7 +580,7 @@ vfloat64m1_t test_vloxei32_v_f64m1_m(vbool64_t mask, const double *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei32_v_f64m2_m(vbool32_t mask, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f64m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m4_m( @@ -589,7 +589,7 @@ vfloat64m2_t test_vloxei32_v_f64m2_m(vbool32_t mask, const double *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei32_v_f64m4_m(vbool16_t mask, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f64m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m8_m( @@ -598,7 +598,7 @@ vfloat64m4_t test_vloxei32_v_f64m4_m(vbool16_t mask, const double *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei32_v_f64m8_m(vbool8_t mask, const double *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f64m8_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_f64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf8_m( @@ -607,7 +607,7 @@ vfloat64m8_t test_vloxei32_v_f64m8_m(vbool8_t mask, const double *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei32_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i8mf8_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf4_m( @@ -616,7 +616,7 @@ vint8mf8_t test_vloxei32_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei32_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i8mf4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf2_m( @@ -625,7 +625,7 @@ vint8mf4_t test_vloxei32_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei32_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i8mf2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m1_m( @@ -634,7 +634,7 @@ vint8mf2_t test_vloxei32_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei32_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i8m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m2_m( @@ -643,7 +643,7 @@ vint8m1_t test_vloxei32_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei32_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i8m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf4_m( @@ -652,7 +652,7 @@ vint8m2_t test_vloxei32_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei32_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf2_m( @@ -661,7 +661,7 @@ vint16mf4_t test_vloxei32_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei32_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m1_m( @@ -670,7 +670,7 @@ vint16mf2_t test_vloxei32_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei32_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i16m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m2_m( @@ -679,7 +679,7 @@ vint16m1_t test_vloxei32_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei32_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i16m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m4_m( @@ -688,7 +688,7 @@ vint16m2_t test_vloxei32_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei32_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i16m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32mf2_m( @@ -697,7 +697,7 @@ vint16m4_t test_vloxei32_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei32_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m1_m( @@ -706,7 +706,7 @@ vint32mf2_t test_vloxei32_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei32_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i32m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m2_m( @@ -715,7 +715,7 @@ vint32m1_t test_vloxei32_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei32_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i32m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m4_m( @@ -724,7 +724,7 @@ vint32m2_t test_vloxei32_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei32_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i32m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m8_m( @@ -733,7 +733,7 @@ vint32m4_t test_vloxei32_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei32_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i32m8_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m1_m( @@ -742,7 +742,7 @@ vint32m8_t test_vloxei32_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei32_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i64m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m2_m( @@ -751,7 +751,7 @@ vint64m1_t test_vloxei32_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei32_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i64m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m4_m( @@ -760,7 +760,7 @@ vint64m2_t test_vloxei32_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei32_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i64m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m8_m( @@ -769,7 +769,7 @@ vint64m4_t test_vloxei32_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei32_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i64m8_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_i64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf8_m( @@ -778,7 +778,7 @@ vint64m8_t test_vloxei32_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei32_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u8mf8_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf4_m( @@ -787,7 +787,7 @@ vuint8mf8_t test_vloxei32_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei32_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u8mf4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf2_m( @@ -796,7 +796,7 @@ vuint8mf4_t test_vloxei32_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei32_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u8mf2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m1_m( @@ -805,7 +805,7 @@ vuint8mf2_t test_vloxei32_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei32_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u8m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m2_m( @@ -814,7 +814,7 @@ vuint8m1_t test_vloxei32_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei32_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u8m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf4_m( @@ -823,7 +823,7 @@ vuint8m2_t test_vloxei32_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei32_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf2_m( @@ -832,7 +832,7 @@ vuint16mf4_t test_vloxei32_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei32_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m1_m( @@ -841,7 +841,7 @@ vuint16mf2_t test_vloxei32_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei32_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u16m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m2_m( @@ -850,7 +850,7 @@ vuint16m1_t test_vloxei32_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei32_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u16m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m4_m( @@ -859,7 +859,7 @@ vuint16m2_t test_vloxei32_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei32_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u16m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32mf2_m( @@ -868,7 +868,7 @@ vuint16m4_t test_vloxei32_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei32_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m1_m( @@ -877,7 +877,7 @@ vuint32mf2_t test_vloxei32_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei32_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u32m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m2_m( @@ -886,7 +886,7 @@ vuint32m1_t test_vloxei32_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei32_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u32m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m4_m( @@ -895,7 +895,7 @@ vuint32m2_t test_vloxei32_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei32_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u32m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m8_m( @@ -904,7 +904,7 @@ vuint32m4_t test_vloxei32_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei32_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u32m8_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m1_m( @@ -913,7 +913,7 @@ vuint32m8_t test_vloxei32_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei32_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u64m1_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m2_m( @@ -922,7 +922,7 @@ vuint64m1_t test_vloxei32_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei32_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u64m2_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m4_m( @@ -931,7 +931,7 @@ vuint64m2_t test_vloxei32_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei32_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u64m4_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m8_m( @@ -940,6 +940,6 @@ vuint64m4_t test_vloxei32_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei32_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u64m8_m(mask, base, bindex, vl); + return __riscv_vloxei32_v_u64m8_m(mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei64.c index 67a65b94ed8af2ac722b4210758130469b410700..6cda99dd54b3bf3a50ff66415f7d5d2ad16da85b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei64_v_f16mf4(const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f16mf4(base, bindex, vl); + return __riscv_vloxei64_v_f16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vloxei64_v_f16mf4(const _Float16 *base, vuint64m1_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei64_v_f16mf2(const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f16mf2(base, bindex, vl); + return __riscv_vloxei64_v_f16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vloxei64_v_f16mf2(const _Float16 *base, vuint64m2_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei64_v_f16m1(const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f16m1(base, bindex, vl); + return __riscv_vloxei64_v_f16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vloxei64_v_f16m1(const _Float16 *base, vuint64m4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei64_v_f16m2(const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f16m2(base, bindex, vl); + return __riscv_vloxei64_v_f16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32mf2( @@ -49,7 +49,7 @@ vfloat16m2_t test_vloxei64_v_f16m2(const _Float16 *base, vuint64m8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei64_v_f32mf2(const float *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f32mf2(base, bindex, vl); + return __riscv_vloxei64_v_f32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m1( @@ -58,7 +58,7 @@ vfloat32mf2_t test_vloxei64_v_f32mf2(const float *base, vuint64m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei64_v_f32m1(const float *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f32m1(base, bindex, vl); + return __riscv_vloxei64_v_f32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m2( @@ -67,7 +67,7 @@ vfloat32m1_t test_vloxei64_v_f32m1(const float *base, vuint64m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei64_v_f32m2(const float *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f32m2(base, bindex, vl); + return __riscv_vloxei64_v_f32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m4( @@ -76,7 +76,7 @@ vfloat32m2_t test_vloxei64_v_f32m2(const float *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei64_v_f32m4(const float *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f32m4(base, bindex, vl); + return __riscv_vloxei64_v_f32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m1( @@ -85,7 +85,7 @@ vfloat32m4_t test_vloxei64_v_f32m4(const float *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei64_v_f64m1(const double *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f64m1(base, bindex, vl); + return __riscv_vloxei64_v_f64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m2( @@ -94,7 +94,7 @@ vfloat64m1_t test_vloxei64_v_f64m1(const double *base, vuint64m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei64_v_f64m2(const double *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f64m2(base, bindex, vl); + return __riscv_vloxei64_v_f64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m4( @@ -103,7 +103,7 @@ vfloat64m2_t test_vloxei64_v_f64m2(const double *base, vuint64m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei64_v_f64m4(const double *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f64m4(base, bindex, vl); + return __riscv_vloxei64_v_f64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m8( @@ -112,7 +112,7 @@ vfloat64m4_t test_vloxei64_v_f64m4(const double *base, vuint64m4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei64_v_f64m8(const double *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f64m8(base, bindex, vl); + return __riscv_vloxei64_v_f64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf8( @@ -121,7 +121,7 @@ vfloat64m8_t test_vloxei64_v_f64m8(const double *base, vuint64m8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei64_v_i8mf8(const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i8mf8(base, bindex, vl); + return __riscv_vloxei64_v_i8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf4( @@ -130,7 +130,7 @@ vint8mf8_t test_vloxei64_v_i8mf8(const int8_t *base, vuint64m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei64_v_i8mf4(const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i8mf4(base, bindex, vl); + return __riscv_vloxei64_v_i8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf2( @@ -139,7 +139,7 @@ vint8mf4_t test_vloxei64_v_i8mf4(const int8_t *base, vuint64m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei64_v_i8mf2(const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i8mf2(base, bindex, vl); + return __riscv_vloxei64_v_i8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8m1( @@ -148,7 +148,7 @@ vint8mf2_t test_vloxei64_v_i8mf2(const int8_t *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei64_v_i8m1(const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i8m1(base, bindex, vl); + return __riscv_vloxei64_v_i8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf4( @@ -157,7 +157,7 @@ vint8m1_t test_vloxei64_v_i8m1(const int8_t *base, vuint64m8_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei64_v_i16mf4(const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i16mf4(base, bindex, vl); + return __riscv_vloxei64_v_i16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf2( @@ -166,7 +166,7 @@ vint16mf4_t test_vloxei64_v_i16mf4(const int16_t *base, vuint64m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei64_v_i16mf2(const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i16mf2(base, bindex, vl); + return __riscv_vloxei64_v_i16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m1( @@ -175,7 +175,7 @@ vint16mf2_t test_vloxei64_v_i16mf2(const int16_t *base, vuint64m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei64_v_i16m1(const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i16m1(base, bindex, vl); + return __riscv_vloxei64_v_i16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m2( @@ -184,7 +184,7 @@ vint16m1_t test_vloxei64_v_i16m1(const int16_t *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei64_v_i16m2(const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i16m2(base, bindex, vl); + return __riscv_vloxei64_v_i16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32mf2( @@ -193,7 +193,7 @@ vint16m2_t test_vloxei64_v_i16m2(const int16_t *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei64_v_i32mf2(const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i32mf2(base, bindex, vl); + return __riscv_vloxei64_v_i32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m1( @@ -202,7 +202,7 @@ vint32mf2_t test_vloxei64_v_i32mf2(const int32_t *base, vuint64m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei64_v_i32m1(const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i32m1(base, bindex, vl); + return __riscv_vloxei64_v_i32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m2( @@ -211,7 +211,7 @@ vint32m1_t test_vloxei64_v_i32m1(const int32_t *base, vuint64m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei64_v_i32m2(const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i32m2(base, bindex, vl); + return __riscv_vloxei64_v_i32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m4( @@ -220,7 +220,7 @@ vint32m2_t test_vloxei64_v_i32m2(const int32_t *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei64_v_i32m4(const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i32m4(base, bindex, vl); + return __riscv_vloxei64_v_i32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m1( @@ -229,7 +229,7 @@ vint32m4_t test_vloxei64_v_i32m4(const int32_t *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei64_v_i64m1(const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i64m1(base, bindex, vl); + return __riscv_vloxei64_v_i64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m2( @@ -238,7 +238,7 @@ vint64m1_t test_vloxei64_v_i64m1(const int64_t *base, vuint64m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei64_v_i64m2(const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i64m2(base, bindex, vl); + return __riscv_vloxei64_v_i64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m4( @@ -247,7 +247,7 @@ vint64m2_t test_vloxei64_v_i64m2(const int64_t *base, vuint64m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei64_v_i64m4(const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i64m4(base, bindex, vl); + return __riscv_vloxei64_v_i64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m8( @@ -256,7 +256,7 @@ vint64m4_t test_vloxei64_v_i64m4(const int64_t *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei64_v_i64m8(const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i64m8(base, bindex, vl); + return __riscv_vloxei64_v_i64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf8( @@ -265,7 +265,7 @@ vint64m8_t test_vloxei64_v_i64m8(const int64_t *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei64_v_u8mf8(const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u8mf8(base, bindex, vl); + return __riscv_vloxei64_v_u8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf4( @@ -274,7 +274,7 @@ vuint8mf8_t test_vloxei64_v_u8mf8(const uint8_t *base, vuint64m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei64_v_u8mf4(const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u8mf4(base, bindex, vl); + return __riscv_vloxei64_v_u8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf2( @@ -283,7 +283,7 @@ vuint8mf4_t test_vloxei64_v_u8mf4(const uint8_t *base, vuint64m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei64_v_u8mf2(const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u8mf2(base, bindex, vl); + return __riscv_vloxei64_v_u8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8m1( @@ -292,7 +292,7 @@ vuint8mf2_t test_vloxei64_v_u8mf2(const uint8_t *base, vuint64m4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei64_v_u8m1(const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u8m1(base, bindex, vl); + return __riscv_vloxei64_v_u8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf4( @@ -301,7 +301,7 @@ vuint8m1_t test_vloxei64_v_u8m1(const uint8_t *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei64_v_u16mf4(const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u16mf4(base, bindex, vl); + return __riscv_vloxei64_v_u16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf2( @@ -310,7 +310,7 @@ vuint16mf4_t test_vloxei64_v_u16mf4(const uint16_t *base, vuint64m1_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei64_v_u16mf2(const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u16mf2(base, bindex, vl); + return __riscv_vloxei64_v_u16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m1( @@ -319,7 +319,7 @@ vuint16mf2_t test_vloxei64_v_u16mf2(const uint16_t *base, vuint64m2_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei64_v_u16m1(const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u16m1(base, bindex, vl); + return __riscv_vloxei64_v_u16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m2( @@ -328,7 +328,7 @@ vuint16m1_t test_vloxei64_v_u16m1(const uint16_t *base, vuint64m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei64_v_u16m2(const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u16m2(base, bindex, vl); + return __riscv_vloxei64_v_u16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32mf2( @@ -337,7 +337,7 @@ vuint16m2_t test_vloxei64_v_u16m2(const uint16_t *base, vuint64m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei64_v_u32mf2(const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u32mf2(base, bindex, vl); + return __riscv_vloxei64_v_u32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m1( @@ -346,7 +346,7 @@ vuint32mf2_t test_vloxei64_v_u32mf2(const uint32_t *base, vuint64m1_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei64_v_u32m1(const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u32m1(base, bindex, vl); + return __riscv_vloxei64_v_u32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m2( @@ -355,7 +355,7 @@ vuint32m1_t test_vloxei64_v_u32m1(const uint32_t *base, vuint64m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei64_v_u32m2(const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u32m2(base, bindex, vl); + return __riscv_vloxei64_v_u32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m4( @@ -364,7 +364,7 @@ vuint32m2_t test_vloxei64_v_u32m2(const uint32_t *base, vuint64m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei64_v_u32m4(const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u32m4(base, bindex, vl); + return __riscv_vloxei64_v_u32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m1( @@ -373,7 +373,7 @@ vuint32m4_t test_vloxei64_v_u32m4(const uint32_t *base, vuint64m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei64_v_u64m1(const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u64m1(base, bindex, vl); + return __riscv_vloxei64_v_u64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m2( @@ -382,7 +382,7 @@ vuint64m1_t test_vloxei64_v_u64m1(const uint64_t *base, vuint64m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei64_v_u64m2(const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u64m2(base, bindex, vl); + return __riscv_vloxei64_v_u64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m4( @@ -391,7 +391,7 @@ vuint64m2_t test_vloxei64_v_u64m2(const uint64_t *base, vuint64m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei64_v_u64m4(const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u64m4(base, bindex, vl); + return __riscv_vloxei64_v_u64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m8( @@ -400,7 +400,7 @@ vuint64m4_t test_vloxei64_v_u64m4(const uint64_t *base, vuint64m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei64_v_u64m8(const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u64m8(base, bindex, vl); + return __riscv_vloxei64_v_u64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf4_m( @@ -409,7 +409,7 @@ vuint64m8_t test_vloxei64_v_u64m8(const uint64_t *base, vuint64m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei64_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf2_m( @@ -418,7 +418,7 @@ vfloat16mf4_t test_vloxei64_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei64_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m1_m( @@ -427,7 +427,7 @@ vfloat16mf2_t test_vloxei64_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei64_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f16m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m2_m( @@ -436,7 +436,7 @@ vfloat16m1_t test_vloxei64_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei64_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f16m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32mf2_m( @@ -445,7 +445,7 @@ vfloat16m2_t test_vloxei64_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei64_v_f32mf2_m(vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m1_m( @@ -454,7 +454,7 @@ vfloat32mf2_t test_vloxei64_v_f32mf2_m(vbool64_t mask, const float *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei64_v_f32m1_m(vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f32m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m2_m( @@ -463,7 +463,7 @@ vfloat32m1_t test_vloxei64_v_f32m1_m(vbool32_t mask, const float *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei64_v_f32m2_m(vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f32m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m4_m( @@ -472,7 +472,7 @@ vfloat32m2_t test_vloxei64_v_f32m2_m(vbool16_t mask, const float *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei64_v_f32m4_m(vbool8_t mask, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f32m4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m4_t test_vloxei64_v_f32m4_m(vbool8_t mask, const float *base, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei64_v_f64m1_m(vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f64m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m2_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vloxei64_v_f64m1_m(vbool64_t mask, const double *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei64_v_f64m2_m(vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f64m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m4_m( @@ -499,7 +499,7 @@ vfloat64m2_t test_vloxei64_v_f64m2_m(vbool32_t mask, const double *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei64_v_f64m4_m(vbool16_t mask, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f64m4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m8_m( @@ -508,7 +508,7 @@ vfloat64m4_t test_vloxei64_v_f64m4_m(vbool16_t mask, const double *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei64_v_f64m8_m(vbool8_t mask, const double *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f64m8_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_f64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf8_m( @@ -517,7 +517,7 @@ vfloat64m8_t test_vloxei64_v_f64m8_m(vbool8_t mask, const double *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei64_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i8mf8_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf4_m( @@ -526,7 +526,7 @@ vint8mf8_t test_vloxei64_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei64_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i8mf4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf2_m( @@ -535,7 +535,7 @@ vint8mf4_t test_vloxei64_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei64_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i8mf2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8m1_m( @@ -544,7 +544,7 @@ vint8mf2_t test_vloxei64_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei64_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i8m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf4_m( @@ -553,7 +553,7 @@ vint8m1_t test_vloxei64_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei64_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf2_m( @@ -562,7 +562,7 @@ vint16mf4_t test_vloxei64_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei64_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m1_m( @@ -571,7 +571,7 @@ vint16mf2_t test_vloxei64_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei64_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i16m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m2_m( @@ -580,7 +580,7 @@ vint16m1_t test_vloxei64_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei64_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i16m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32mf2_m( @@ -589,7 +589,7 @@ vint16m2_t test_vloxei64_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei64_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m1_m( @@ -598,7 +598,7 @@ vint32mf2_t test_vloxei64_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei64_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i32m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m2_m( @@ -607,7 +607,7 @@ vint32m1_t test_vloxei64_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei64_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i32m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m4_m( @@ -616,7 +616,7 @@ vint32m2_t test_vloxei64_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei64_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i32m4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m1_m( @@ -625,7 +625,7 @@ vint32m4_t test_vloxei64_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei64_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i64m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m2_m( @@ -634,7 +634,7 @@ vint64m1_t test_vloxei64_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei64_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i64m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m4_m( @@ -643,7 +643,7 @@ vint64m2_t test_vloxei64_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei64_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i64m4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m8_m( @@ -652,7 +652,7 @@ vint64m4_t test_vloxei64_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei64_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i64m8_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_i64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf8_m( @@ -661,7 +661,7 @@ vint64m8_t test_vloxei64_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei64_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u8mf8_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf4_m( @@ -670,7 +670,7 @@ vuint8mf8_t test_vloxei64_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei64_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u8mf4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf2_m( @@ -679,7 +679,7 @@ vuint8mf4_t test_vloxei64_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei64_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u8mf2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8m1_m( @@ -688,7 +688,7 @@ vuint8mf2_t test_vloxei64_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei64_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u8m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf4_m( @@ -697,7 +697,7 @@ vuint8m1_t test_vloxei64_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei64_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf2_m( @@ -706,7 +706,7 @@ vuint16mf4_t test_vloxei64_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei64_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m1_m( @@ -715,7 +715,7 @@ vuint16mf2_t test_vloxei64_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei64_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u16m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m2_m( @@ -724,7 +724,7 @@ vuint16m1_t test_vloxei64_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei64_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u16m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32mf2_m( @@ -733,7 +733,7 @@ vuint16m2_t test_vloxei64_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei64_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m1_m( @@ -742,7 +742,7 @@ vuint32mf2_t test_vloxei64_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei64_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u32m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m2_m( @@ -751,7 +751,7 @@ vuint32m1_t test_vloxei64_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei64_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u32m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m4_m( @@ -760,7 +760,7 @@ vuint32m2_t test_vloxei64_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei64_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u32m4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m1_m( @@ -769,7 +769,7 @@ vuint32m4_t test_vloxei64_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei64_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u64m1_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m2_m( @@ -778,7 +778,7 @@ vuint64m1_t test_vloxei64_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei64_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u64m2_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m4_m( @@ -787,7 +787,7 @@ vuint64m2_t test_vloxei64_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei64_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u64m4_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m8_m( @@ -796,6 +796,6 @@ vuint64m4_t test_vloxei64_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei64_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u64m8_m(mask, base, bindex, vl); + return __riscv_vloxei64_v_u64m8_m(mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei8.c index ade0c80e8be4726e99b1823592efbb3c3c4adae6..3da030733a47dc91f08429e617061621173c6438 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei8_v_f16mf4(const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f16mf4(base, bindex, vl); + return __riscv_vloxei8_v_f16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vloxei8_v_f16mf4(const _Float16 *base, vuint8mf8_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei8_v_f16mf2(const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f16mf2(base, bindex, vl); + return __riscv_vloxei8_v_f16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vloxei8_v_f16mf2(const _Float16 *base, vuint8mf4_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei8_v_f16m1(const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f16m1(base, bindex, vl); + return __riscv_vloxei8_v_f16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vloxei8_v_f16m1(const _Float16 *base, vuint8mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei8_v_f16m2(const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f16m2(base, bindex, vl); + return __riscv_vloxei8_v_f16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vloxei8_v_f16m2(const _Float16 *base, vuint8m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei8_v_f16m4(const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f16m4(base, bindex, vl); + return __riscv_vloxei8_v_f16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vloxei8_v_f16m4(const _Float16 *base, vuint8m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei8_v_f16m8(const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_f16m8(base, bindex, vl); + return __riscv_vloxei8_v_f16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vloxei8_v_f16m8(const _Float16 *base, vuint8m4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei8_v_f32mf2(const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f32mf2(base, bindex, vl); + return __riscv_vloxei8_v_f32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vloxei8_v_f32mf2(const float *base, vuint8mf8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei8_v_f32m1(const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f32m1(base, bindex, vl); + return __riscv_vloxei8_v_f32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vloxei8_v_f32m1(const float *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei8_v_f32m2(const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f32m2(base, bindex, vl); + return __riscv_vloxei8_v_f32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vloxei8_v_f32m2(const float *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei8_v_f32m4(const float *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f32m4(base, bindex, vl); + return __riscv_vloxei8_v_f32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vloxei8_v_f32m4(const float *base, vuint8m1_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei8_v_f32m8(const float *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f32m8(base, bindex, vl); + return __riscv_vloxei8_v_f32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vloxei8_v_f32m8(const float *base, vuint8m2_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei8_v_f64m1(const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f64m1(base, bindex, vl); + return __riscv_vloxei8_v_f64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vloxei8_v_f64m1(const double *base, vuint8mf8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei8_v_f64m2(const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f64m2(base, bindex, vl); + return __riscv_vloxei8_v_f64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vloxei8_v_f64m2(const double *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei8_v_f64m4(const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f64m4(base, bindex, vl); + return __riscv_vloxei8_v_f64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vloxei8_v_f64m4(const double *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei8_v_f64m8(const double *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f64m8(base, bindex, vl); + return __riscv_vloxei8_v_f64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf8( @@ -148,7 +148,7 @@ vfloat64m8_t test_vloxei8_v_f64m8(const double *base, vuint8m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei8_v_i8mf8(const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i8mf8(base, bindex, vl); + return __riscv_vloxei8_v_i8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf4( @@ -157,7 +157,7 @@ vint8mf8_t test_vloxei8_v_i8mf8(const int8_t *base, vuint8mf8_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei8_v_i8mf4(const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i8mf4(base, bindex, vl); + return __riscv_vloxei8_v_i8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf2( @@ -166,7 +166,7 @@ vint8mf4_t test_vloxei8_v_i8mf4(const int8_t *base, vuint8mf4_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei8_v_i8mf2(const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i8mf2(base, bindex, vl); + return __riscv_vloxei8_v_i8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m1( @@ -175,7 +175,7 @@ vint8mf2_t test_vloxei8_v_i8mf2(const int8_t *base, vuint8mf2_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei8_v_i8m1(const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i8m1(base, bindex, vl); + return __riscv_vloxei8_v_i8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m2( @@ -184,7 +184,7 @@ vint8m1_t test_vloxei8_v_i8m1(const int8_t *base, vuint8m1_t bindex, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei8_v_i8m2(const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i8m2(base, bindex, vl); + return __riscv_vloxei8_v_i8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m4( @@ -193,7 +193,7 @@ vint8m2_t test_vloxei8_v_i8m2(const int8_t *base, vuint8m2_t bindex, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei8_v_i8m4(const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i8m4(base, bindex, vl); + return __riscv_vloxei8_v_i8m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m8( @@ -202,7 +202,7 @@ vint8m4_t test_vloxei8_v_i8m4(const int8_t *base, vuint8m4_t bindex, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vloxei8_v_i8m8(const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_i8m8(base, bindex, vl); + return __riscv_vloxei8_v_i8m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf4( @@ -211,7 +211,7 @@ vint8m8_t test_vloxei8_v_i8m8(const int8_t *base, vuint8m8_t bindex, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei8_v_i16mf4(const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i16mf4(base, bindex, vl); + return __riscv_vloxei8_v_i16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf2( @@ -220,7 +220,7 @@ vint16mf4_t test_vloxei8_v_i16mf4(const int16_t *base, vuint8mf8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei8_v_i16mf2(const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i16mf2(base, bindex, vl); + return __riscv_vloxei8_v_i16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m1( @@ -229,7 +229,7 @@ vint16mf2_t test_vloxei8_v_i16mf2(const int16_t *base, vuint8mf4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei8_v_i16m1(const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i16m1(base, bindex, vl); + return __riscv_vloxei8_v_i16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m2( @@ -238,7 +238,7 @@ vint16m1_t test_vloxei8_v_i16m1(const int16_t *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei8_v_i16m2(const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i16m2(base, bindex, vl); + return __riscv_vloxei8_v_i16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m4( @@ -247,7 +247,7 @@ vint16m2_t test_vloxei8_v_i16m2(const int16_t *base, vuint8m1_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei8_v_i16m4(const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i16m4(base, bindex, vl); + return __riscv_vloxei8_v_i16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m8( @@ -256,7 +256,7 @@ vint16m4_t test_vloxei8_v_i16m4(const int16_t *base, vuint8m2_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei8_v_i16m8(const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i16m8(base, bindex, vl); + return __riscv_vloxei8_v_i16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32mf2( @@ -265,7 +265,7 @@ vint16m8_t test_vloxei8_v_i16m8(const int16_t *base, vuint8m4_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei8_v_i32mf2(const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i32mf2(base, bindex, vl); + return __riscv_vloxei8_v_i32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m1( @@ -274,7 +274,7 @@ vint32mf2_t test_vloxei8_v_i32mf2(const int32_t *base, vuint8mf8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei8_v_i32m1(const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i32m1(base, bindex, vl); + return __riscv_vloxei8_v_i32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vloxei8_v_i32m1(const int32_t *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei8_v_i32m2(const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i32m2(base, bindex, vl); + return __riscv_vloxei8_v_i32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m4( @@ -292,7 +292,7 @@ vint32m2_t test_vloxei8_v_i32m2(const int32_t *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei8_v_i32m4(const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i32m4(base, bindex, vl); + return __riscv_vloxei8_v_i32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m8( @@ -301,7 +301,7 @@ vint32m4_t test_vloxei8_v_i32m4(const int32_t *base, vuint8m1_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei8_v_i32m8(const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i32m8(base, bindex, vl); + return __riscv_vloxei8_v_i32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m1( @@ -310,7 +310,7 @@ vint32m8_t test_vloxei8_v_i32m8(const int32_t *base, vuint8m2_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei8_v_i64m1(const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i64m1(base, bindex, vl); + return __riscv_vloxei8_v_i64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m2( @@ -319,7 +319,7 @@ vint64m1_t test_vloxei8_v_i64m1(const int64_t *base, vuint8mf8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei8_v_i64m2(const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i64m2(base, bindex, vl); + return __riscv_vloxei8_v_i64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m4( @@ -328,7 +328,7 @@ vint64m2_t test_vloxei8_v_i64m2(const int64_t *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei8_v_i64m4(const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i64m4(base, bindex, vl); + return __riscv_vloxei8_v_i64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m8( @@ -337,7 +337,7 @@ vint64m4_t test_vloxei8_v_i64m4(const int64_t *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei8_v_i64m8(const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i64m8(base, bindex, vl); + return __riscv_vloxei8_v_i64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf8( @@ -346,7 +346,7 @@ vint64m8_t test_vloxei8_v_i64m8(const int64_t *base, vuint8m1_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei8_v_u8mf8(const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u8mf8(base, bindex, vl); + return __riscv_vloxei8_v_u8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf4( @@ -355,7 +355,7 @@ vuint8mf8_t test_vloxei8_v_u8mf8(const uint8_t *base, vuint8mf8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei8_v_u8mf4(const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u8mf4(base, bindex, vl); + return __riscv_vloxei8_v_u8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf2( @@ -364,7 +364,7 @@ vuint8mf4_t test_vloxei8_v_u8mf4(const uint8_t *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei8_v_u8mf2(const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u8mf2(base, bindex, vl); + return __riscv_vloxei8_v_u8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m1( @@ -373,7 +373,7 @@ vuint8mf2_t test_vloxei8_v_u8mf2(const uint8_t *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei8_v_u8m1(const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u8m1(base, bindex, vl); + return __riscv_vloxei8_v_u8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m2( @@ -382,7 +382,7 @@ vuint8m1_t test_vloxei8_v_u8m1(const uint8_t *base, vuint8m1_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei8_v_u8m2(const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u8m2(base, bindex, vl); + return __riscv_vloxei8_v_u8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m4( @@ -391,7 +391,7 @@ vuint8m2_t test_vloxei8_v_u8m2(const uint8_t *base, vuint8m2_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei8_v_u8m4(const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u8m4(base, bindex, vl); + return __riscv_vloxei8_v_u8m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m8( @@ -400,7 +400,7 @@ vuint8m4_t test_vloxei8_v_u8m4(const uint8_t *base, vuint8m4_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vloxei8_v_u8m8(const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_u8m8(base, bindex, vl); + return __riscv_vloxei8_v_u8m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf4( @@ -409,7 +409,7 @@ vuint8m8_t test_vloxei8_v_u8m8(const uint8_t *base, vuint8m8_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei8_v_u16mf4(const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u16mf4(base, bindex, vl); + return __riscv_vloxei8_v_u16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf2( @@ -418,7 +418,7 @@ vuint16mf4_t test_vloxei8_v_u16mf4(const uint16_t *base, vuint8mf8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei8_v_u16mf2(const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u16mf2(base, bindex, vl); + return __riscv_vloxei8_v_u16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m1( @@ -427,7 +427,7 @@ vuint16mf2_t test_vloxei8_v_u16mf2(const uint16_t *base, vuint8mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei8_v_u16m1(const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u16m1(base, bindex, vl); + return __riscv_vloxei8_v_u16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m2( @@ -436,7 +436,7 @@ vuint16m1_t test_vloxei8_v_u16m1(const uint16_t *base, vuint8mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei8_v_u16m2(const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u16m2(base, bindex, vl); + return __riscv_vloxei8_v_u16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m4( @@ -445,7 +445,7 @@ vuint16m2_t test_vloxei8_v_u16m2(const uint16_t *base, vuint8m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei8_v_u16m4(const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u16m4(base, bindex, vl); + return __riscv_vloxei8_v_u16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m8( @@ -454,7 +454,7 @@ vuint16m4_t test_vloxei8_v_u16m4(const uint16_t *base, vuint8m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei8_v_u16m8(const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u16m8(base, bindex, vl); + return __riscv_vloxei8_v_u16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32mf2( @@ -463,7 +463,7 @@ vuint16m8_t test_vloxei8_v_u16m8(const uint16_t *base, vuint8m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei8_v_u32mf2(const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u32mf2(base, bindex, vl); + return __riscv_vloxei8_v_u32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m1( @@ -472,7 +472,7 @@ vuint32mf2_t test_vloxei8_v_u32mf2(const uint32_t *base, vuint8mf8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei8_v_u32m1(const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u32m1(base, bindex, vl); + return __riscv_vloxei8_v_u32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m2( @@ -481,7 +481,7 @@ vuint32m1_t test_vloxei8_v_u32m1(const uint32_t *base, vuint8mf4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei8_v_u32m2(const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u32m2(base, bindex, vl); + return __riscv_vloxei8_v_u32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m4( @@ -490,7 +490,7 @@ vuint32m2_t test_vloxei8_v_u32m2(const uint32_t *base, vuint8mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei8_v_u32m4(const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u32m4(base, bindex, vl); + return __riscv_vloxei8_v_u32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m8( @@ -499,7 +499,7 @@ vuint32m4_t test_vloxei8_v_u32m4(const uint32_t *base, vuint8m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei8_v_u32m8(const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u32m8(base, bindex, vl); + return __riscv_vloxei8_v_u32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m1( @@ -508,7 +508,7 @@ vuint32m8_t test_vloxei8_v_u32m8(const uint32_t *base, vuint8m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei8_v_u64m1(const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u64m1(base, bindex, vl); + return __riscv_vloxei8_v_u64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m2( @@ -517,7 +517,7 @@ vuint64m1_t test_vloxei8_v_u64m1(const uint64_t *base, vuint8mf8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei8_v_u64m2(const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u64m2(base, bindex, vl); + return __riscv_vloxei8_v_u64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m4( @@ -526,7 +526,7 @@ vuint64m2_t test_vloxei8_v_u64m2(const uint64_t *base, vuint8mf4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei8_v_u64m4(const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u64m4(base, bindex, vl); + return __riscv_vloxei8_v_u64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m8( @@ -535,7 +535,7 @@ vuint64m4_t test_vloxei8_v_u64m4(const uint64_t *base, vuint8mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei8_v_u64m8(const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u64m8(base, bindex, vl); + return __riscv_vloxei8_v_u64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf4_m( @@ -544,7 +544,7 @@ vuint64m8_t test_vloxei8_v_u64m8(const uint64_t *base, vuint8m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei8_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf2_m( @@ -553,7 +553,7 @@ vfloat16mf4_t test_vloxei8_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei8_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m1_m( @@ -562,7 +562,7 @@ vfloat16mf2_t test_vloxei8_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei8_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f16m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m2_m( @@ -571,7 +571,7 @@ vfloat16m1_t test_vloxei8_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei8_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f16m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m4_m( @@ -580,7 +580,7 @@ vfloat16m2_t test_vloxei8_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei8_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f16m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m8_m( @@ -589,7 +589,7 @@ vfloat16m4_t test_vloxei8_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei8_v_f16m8_m(vbool2_t mask, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_f16m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32mf2_m( @@ -598,7 +598,7 @@ vfloat16m8_t test_vloxei8_v_f16m8_m(vbool2_t mask, const _Float16 *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei8_v_f32mf2_m(vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m1_m( @@ -607,7 +607,7 @@ vfloat32mf2_t test_vloxei8_v_f32mf2_m(vbool64_t mask, const float *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei8_v_f32m1_m(vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f32m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m2_m( @@ -616,7 +616,7 @@ vfloat32m1_t test_vloxei8_v_f32m1_m(vbool32_t mask, const float *base, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei8_v_f32m2_m(vbool16_t mask, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f32m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m4_m( @@ -625,7 +625,7 @@ vfloat32m2_t test_vloxei8_v_f32m2_m(vbool16_t mask, const float *base, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei8_v_f32m4_m(vbool8_t mask, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f32m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m8_m( @@ -634,7 +634,7 @@ vfloat32m4_t test_vloxei8_v_f32m4_m(vbool8_t mask, const float *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei8_v_f32m8_m(vbool4_t mask, const float *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f32m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m1_m( @@ -643,7 +643,7 @@ vfloat32m8_t test_vloxei8_v_f32m8_m(vbool4_t mask, const float *base, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei8_v_f64m1_m(vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f64m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m2_m( @@ -652,7 +652,7 @@ vfloat64m1_t test_vloxei8_v_f64m1_m(vbool64_t mask, const double *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei8_v_f64m2_m(vbool32_t mask, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f64m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m4_m( @@ -661,7 +661,7 @@ vfloat64m2_t test_vloxei8_v_f64m2_m(vbool32_t mask, const double *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei8_v_f64m4_m(vbool16_t mask, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f64m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m8_m( @@ -670,7 +670,7 @@ vfloat64m4_t test_vloxei8_v_f64m4_m(vbool16_t mask, const double *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei8_v_f64m8_m(vbool8_t mask, const double *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f64m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_f64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf8_m( @@ -679,7 +679,7 @@ vfloat64m8_t test_vloxei8_v_f64m8_m(vbool8_t mask, const double *base, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei8_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i8mf8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf4_m( @@ -688,7 +688,7 @@ vint8mf8_t test_vloxei8_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei8_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i8mf4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf2_m( @@ -697,7 +697,7 @@ vint8mf4_t test_vloxei8_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei8_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i8mf2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m1_m( @@ -706,7 +706,7 @@ vint8mf2_t test_vloxei8_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei8_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i8m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m2_m( @@ -715,7 +715,7 @@ vint8m1_t test_vloxei8_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint8m1_t bi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei8_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i8m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m4_m( @@ -724,7 +724,7 @@ vint8m2_t test_vloxei8_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint8m2_t bi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei8_v_i8m4_m(vbool2_t mask, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i8m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i8m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m8_m( @@ -733,7 +733,7 @@ vint8m4_t test_vloxei8_v_i8m4_m(vbool2_t mask, const int8_t *base, vuint8m4_t bi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vloxei8_v_i8m8_m(vbool1_t mask, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_i8m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i8m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf4_m( @@ -742,7 +742,7 @@ vint8m8_t test_vloxei8_v_i8m8_m(vbool1_t mask, const int8_t *base, vuint8m8_t bi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei8_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf2_m( @@ -751,7 +751,7 @@ vint16mf4_t test_vloxei8_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei8_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m1_m( @@ -760,7 +760,7 @@ vint16mf2_t test_vloxei8_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei8_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i16m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m2_m( @@ -769,7 +769,7 @@ vint16m1_t test_vloxei8_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei8_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i16m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m4_m( @@ -778,7 +778,7 @@ vint16m2_t test_vloxei8_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei8_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i16m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m8_m( @@ -787,7 +787,7 @@ vint16m4_t test_vloxei8_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei8_v_i16m8_m(vbool2_t mask, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i16m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32mf2_m( @@ -796,7 +796,7 @@ vint16m8_t test_vloxei8_v_i16m8_m(vbool2_t mask, const int16_t *base, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei8_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m1_m( @@ -805,7 +805,7 @@ vint32mf2_t test_vloxei8_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei8_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i32m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m2_m( @@ -814,7 +814,7 @@ vint32m1_t test_vloxei8_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei8_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i32m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m4_m( @@ -823,7 +823,7 @@ vint32m2_t test_vloxei8_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei8_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i32m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m8_m( @@ -832,7 +832,7 @@ vint32m4_t test_vloxei8_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei8_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i32m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m1_m( @@ -841,7 +841,7 @@ vint32m8_t test_vloxei8_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei8_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i64m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m2_m( @@ -850,7 +850,7 @@ vint64m1_t test_vloxei8_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei8_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i64m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m4_m( @@ -859,7 +859,7 @@ vint64m2_t test_vloxei8_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei8_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i64m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m8_m( @@ -868,7 +868,7 @@ vint64m4_t test_vloxei8_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei8_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i64m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_i64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf8_m( @@ -877,7 +877,7 @@ vint64m8_t test_vloxei8_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei8_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u8mf8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf4_m( @@ -886,7 +886,7 @@ vuint8mf8_t test_vloxei8_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei8_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u8mf4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf2_m( @@ -895,7 +895,7 @@ vuint8mf4_t test_vloxei8_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei8_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u8mf2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m1_m( @@ -904,7 +904,7 @@ vuint8mf2_t test_vloxei8_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei8_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u8m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m2_m( @@ -913,7 +913,7 @@ vuint8m1_t test_vloxei8_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei8_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u8m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m4_m( @@ -922,7 +922,7 @@ vuint8m2_t test_vloxei8_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei8_v_u8m4_m(vbool2_t mask, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u8m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u8m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m8_m( @@ -931,7 +931,7 @@ vuint8m4_t test_vloxei8_v_u8m4_m(vbool2_t mask, const uint8_t *base, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vloxei8_v_u8m8_m(vbool1_t mask, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_u8m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u8m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf4_m( @@ -940,7 +940,7 @@ vuint8m8_t test_vloxei8_v_u8m8_m(vbool1_t mask, const uint8_t *base, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei8_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u16mf4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf2_m( @@ -949,7 +949,7 @@ vuint16mf4_t test_vloxei8_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei8_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u16mf2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m1_m( @@ -958,7 +958,7 @@ vuint16mf2_t test_vloxei8_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei8_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u16m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m2_m( @@ -967,7 +967,7 @@ vuint16m1_t test_vloxei8_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei8_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u16m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m4_m( @@ -976,7 +976,7 @@ vuint16m2_t test_vloxei8_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei8_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u16m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m8_m( @@ -985,7 +985,7 @@ vuint16m4_t test_vloxei8_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei8_v_u16m8_m(vbool2_t mask, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u16m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32mf2_m( @@ -994,7 +994,7 @@ vuint16m8_t test_vloxei8_v_u16m8_m(vbool2_t mask, const uint16_t *base, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei8_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u32mf2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m1_m( @@ -1003,7 +1003,7 @@ vuint32mf2_t test_vloxei8_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei8_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u32m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m2_m( @@ -1012,7 +1012,7 @@ vuint32m1_t test_vloxei8_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei8_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u32m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m4_m( @@ -1021,7 +1021,7 @@ vuint32m2_t test_vloxei8_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei8_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u32m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m8_m( @@ -1030,7 +1030,7 @@ vuint32m4_t test_vloxei8_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei8_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u32m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m1_m( @@ -1039,7 +1039,7 @@ vuint32m8_t test_vloxei8_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei8_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u64m1_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m2_m( @@ -1048,7 +1048,7 @@ vuint64m1_t test_vloxei8_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei8_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u64m2_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m4_m( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vloxei8_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei8_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u64m4_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m8_m( @@ -1066,6 +1066,6 @@ vuint64m4_t test_vloxei8_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei8_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u64m8_m(mask, base, bindex, vl); + return __riscv_vloxei8_v_u64m8_m(mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei16.c index f62e700f7775ba18852ec05f429dea4b41eea416..7f76399bd89434199ab507d796fa0314839bbc52 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei16.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf2( @@ -30,7 +30,7 @@ void test_vloxseg2ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m1( @@ -43,7 +43,7 @@ void test_vloxseg2ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m2( @@ -56,7 +56,7 @@ void test_vloxseg2ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m4( @@ -69,7 +69,7 @@ void test_vloxseg2ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32mf2( @@ -82,7 +82,7 @@ void test_vloxseg2ei16_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m1( @@ -95,7 +95,7 @@ void test_vloxseg2ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const floa // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m2( @@ -108,7 +108,7 @@ void test_vloxseg2ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m4( @@ -121,7 +121,7 @@ void test_vloxseg2ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m1( @@ -134,7 +134,7 @@ void test_vloxseg2ei16_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m2( @@ -147,7 +147,7 @@ void test_vloxseg2ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m4( @@ -160,7 +160,7 @@ void test_vloxseg2ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf8( @@ -173,7 +173,7 @@ void test_vloxseg2ei16_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf8(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf4( @@ -186,7 +186,7 @@ void test_vloxseg2ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf2( @@ -199,7 +199,7 @@ void test_vloxseg2ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m1( @@ -212,7 +212,7 @@ void test_vloxseg2ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m2( @@ -225,7 +225,7 @@ void test_vloxseg2ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m4( @@ -238,7 +238,7 @@ void test_vloxseg2ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf4( @@ -251,7 +251,7 @@ void test_vloxseg2ei16_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf2( @@ -264,7 +264,7 @@ void test_vloxseg2ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m1( @@ -277,7 +277,7 @@ void test_vloxseg2ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m2( @@ -290,7 +290,7 @@ void test_vloxseg2ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m4( @@ -303,7 +303,7 @@ void test_vloxseg2ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32mf2( @@ -316,7 +316,7 @@ void test_vloxseg2ei16_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m1( @@ -329,7 +329,7 @@ void test_vloxseg2ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m2( @@ -342,7 +342,7 @@ void test_vloxseg2ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m4( @@ -355,7 +355,7 @@ void test_vloxseg2ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m1( @@ -368,7 +368,7 @@ void test_vloxseg2ei16_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m2( @@ -381,7 +381,7 @@ void test_vloxseg2ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m4( @@ -394,7 +394,7 @@ void test_vloxseg2ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf8( @@ -407,7 +407,7 @@ void test_vloxseg2ei16_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf8(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf4( @@ -420,7 +420,7 @@ void test_vloxseg2ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf2( @@ -433,7 +433,7 @@ void test_vloxseg2ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m1( @@ -446,7 +446,7 @@ void test_vloxseg2ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m2( @@ -459,7 +459,7 @@ void test_vloxseg2ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m4( @@ -472,7 +472,7 @@ void test_vloxseg2ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf4( @@ -485,7 +485,7 @@ void test_vloxseg2ei16_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf2( @@ -498,7 +498,7 @@ void test_vloxseg2ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m1( @@ -511,7 +511,7 @@ void test_vloxseg2ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m2( @@ -524,7 +524,7 @@ void test_vloxseg2ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m4( @@ -537,7 +537,7 @@ void test_vloxseg2ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32mf2( @@ -550,7 +550,7 @@ void test_vloxseg2ei16_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m1( @@ -563,7 +563,7 @@ void test_vloxseg2ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m2( @@ -576,7 +576,7 @@ void test_vloxseg2ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m4( @@ -589,7 +589,7 @@ void test_vloxseg2ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m1( @@ -602,7 +602,7 @@ void test_vloxseg2ei16_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m2( @@ -615,7 +615,7 @@ void test_vloxseg2ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m4( @@ -628,7 +628,7 @@ void test_vloxseg2ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf4_m( @@ -641,7 +641,7 @@ void test_vloxseg2ei16_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf2_m( @@ -654,7 +654,7 @@ void test_vloxseg2ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m1_m( @@ -667,7 +667,7 @@ void test_vloxseg2ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m2_m( @@ -680,7 +680,7 @@ void test_vloxseg2ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m4_m( @@ -693,7 +693,7 @@ void test_vloxseg2ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32mf2_m( @@ -706,7 +706,7 @@ void test_vloxseg2ei16_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m1_m( @@ -719,7 +719,7 @@ void test_vloxseg2ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m2_m( @@ -732,7 +732,7 @@ void test_vloxseg2ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m4_m( @@ -745,7 +745,7 @@ void test_vloxseg2ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m1_m( @@ -758,7 +758,7 @@ void test_vloxseg2ei16_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m2_m( @@ -771,7 +771,7 @@ void test_vloxseg2ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m4_m( @@ -784,7 +784,7 @@ void test_vloxseg2ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf8_m( @@ -797,7 +797,7 @@ void test_vloxseg2ei16_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf4_m( @@ -810,7 +810,7 @@ void test_vloxseg2ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf2_m( @@ -823,7 +823,7 @@ void test_vloxseg2ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m1_m( @@ -836,7 +836,7 @@ void test_vloxseg2ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m2_m( @@ -849,7 +849,7 @@ void test_vloxseg2ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m4_m( @@ -862,7 +862,7 @@ void test_vloxseg2ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, con // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf4_m( @@ -875,7 +875,7 @@ void test_vloxseg2ei16_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, con // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf2_m( @@ -888,7 +888,7 @@ void test_vloxseg2ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vloxseg2ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m2_m( @@ -914,7 +914,7 @@ void test_vloxseg2ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m4_m( @@ -927,7 +927,7 @@ void test_vloxseg2ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32mf2_m( @@ -940,7 +940,7 @@ void test_vloxseg2ei16_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m1_m( @@ -953,7 +953,7 @@ void test_vloxseg2ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m2_m( @@ -966,7 +966,7 @@ void test_vloxseg2ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m4_m( @@ -979,7 +979,7 @@ void test_vloxseg2ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m1_m( @@ -992,7 +992,7 @@ void test_vloxseg2ei16_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m2_m( @@ -1005,7 +1005,7 @@ void test_vloxseg2ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m4_m( @@ -1018,7 +1018,7 @@ void test_vloxseg2ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf8_m( @@ -1031,7 +1031,7 @@ void test_vloxseg2ei16_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf4_m( @@ -1044,7 +1044,7 @@ void test_vloxseg2ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf2_m( @@ -1057,7 +1057,7 @@ void test_vloxseg2ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m1_m( @@ -1070,7 +1070,7 @@ void test_vloxseg2ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m2_m( @@ -1083,7 +1083,7 @@ void test_vloxseg2ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m4_m( @@ -1096,7 +1096,7 @@ void test_vloxseg2ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf4_m( @@ -1109,7 +1109,7 @@ void test_vloxseg2ei16_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf2_m( @@ -1122,7 +1122,7 @@ void test_vloxseg2ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m1_m( @@ -1135,7 +1135,7 @@ void test_vloxseg2ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m2_m( @@ -1148,7 +1148,7 @@ void test_vloxseg2ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m4_m( @@ -1161,7 +1161,7 @@ void test_vloxseg2ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32mf2_m( @@ -1174,7 +1174,7 @@ void test_vloxseg2ei16_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m1_m( @@ -1187,7 +1187,7 @@ void test_vloxseg2ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m2_m( @@ -1200,7 +1200,7 @@ void test_vloxseg2ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m4_m( @@ -1213,7 +1213,7 @@ void test_vloxseg2ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m1_m( @@ -1226,7 +1226,7 @@ void test_vloxseg2ei16_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m2_m( @@ -1239,7 +1239,7 @@ void test_vloxseg2ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m4_m( @@ -1252,6 +1252,6 @@ void test_vloxseg2ei16_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m4_m(v0, v1, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32.c index 0403024af5a9387e936ee140488c4ed2540b2c13..b116ce45dafdd55a918edfe331964e7baccc18da 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei32.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf2( @@ -30,7 +30,7 @@ void test_vloxseg2ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m1( @@ -43,7 +43,7 @@ void test_vloxseg2ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m2( @@ -56,7 +56,7 @@ void test_vloxseg2ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m4( @@ -69,7 +69,7 @@ void test_vloxseg2ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32mf2( @@ -82,7 +82,7 @@ void test_vloxseg2ei32_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m1( @@ -95,7 +95,7 @@ void test_vloxseg2ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const floa // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m2( @@ -108,7 +108,7 @@ void test_vloxseg2ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m4( @@ -121,7 +121,7 @@ void test_vloxseg2ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m1( @@ -134,7 +134,7 @@ void test_vloxseg2ei32_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m2( @@ -147,7 +147,7 @@ void test_vloxseg2ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m4( @@ -160,7 +160,7 @@ void test_vloxseg2ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf8( @@ -173,7 +173,7 @@ void test_vloxseg2ei32_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf8(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf4( @@ -186,7 +186,7 @@ void test_vloxseg2ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf2( @@ -199,7 +199,7 @@ void test_vloxseg2ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m1( @@ -212,7 +212,7 @@ void test_vloxseg2ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m2( @@ -225,7 +225,7 @@ void test_vloxseg2ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf4( @@ -238,7 +238,7 @@ void test_vloxseg2ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf2( @@ -251,7 +251,7 @@ void test_vloxseg2ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m1( @@ -264,7 +264,7 @@ void test_vloxseg2ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m2( @@ -277,7 +277,7 @@ void test_vloxseg2ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m4( @@ -290,7 +290,7 @@ void test_vloxseg2ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32mf2( @@ -303,7 +303,7 @@ void test_vloxseg2ei32_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m1( @@ -316,7 +316,7 @@ void test_vloxseg2ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m2( @@ -329,7 +329,7 @@ void test_vloxseg2ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m4( @@ -342,7 +342,7 @@ void test_vloxseg2ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m1( @@ -355,7 +355,7 @@ void test_vloxseg2ei32_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m2( @@ -368,7 +368,7 @@ void test_vloxseg2ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m4( @@ -381,7 +381,7 @@ void test_vloxseg2ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf8( @@ -394,7 +394,7 @@ void test_vloxseg2ei32_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf8(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf4( @@ -407,7 +407,7 @@ void test_vloxseg2ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf2( @@ -420,7 +420,7 @@ void test_vloxseg2ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m1( @@ -433,7 +433,7 @@ void test_vloxseg2ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m2( @@ -446,7 +446,7 @@ void test_vloxseg2ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf4( @@ -459,7 +459,7 @@ void test_vloxseg2ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf2( @@ -472,7 +472,7 @@ void test_vloxseg2ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m1( @@ -485,7 +485,7 @@ void test_vloxseg2ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m2( @@ -498,7 +498,7 @@ void test_vloxseg2ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m4( @@ -511,7 +511,7 @@ void test_vloxseg2ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32mf2( @@ -524,7 +524,7 @@ void test_vloxseg2ei32_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m1( @@ -537,7 +537,7 @@ void test_vloxseg2ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m2( @@ -550,7 +550,7 @@ void test_vloxseg2ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m4( @@ -563,7 +563,7 @@ void test_vloxseg2ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m1( @@ -576,7 +576,7 @@ void test_vloxseg2ei32_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m2( @@ -589,7 +589,7 @@ void test_vloxseg2ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m4( @@ -602,7 +602,7 @@ void test_vloxseg2ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf4_m( @@ -615,7 +615,7 @@ void test_vloxseg2ei32_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf2_m( @@ -628,7 +628,7 @@ void test_vloxseg2ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m1_m( @@ -641,7 +641,7 @@ void test_vloxseg2ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m2_m( @@ -654,7 +654,7 @@ void test_vloxseg2ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m4_m( @@ -667,7 +667,7 @@ void test_vloxseg2ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32mf2_m( @@ -680,7 +680,7 @@ void test_vloxseg2ei32_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m1_m( @@ -693,7 +693,7 @@ void test_vloxseg2ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m2_m( @@ -706,7 +706,7 @@ void test_vloxseg2ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m4_m( @@ -719,7 +719,7 @@ void test_vloxseg2ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m1_m( @@ -732,7 +732,7 @@ void test_vloxseg2ei32_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m2_m( @@ -745,7 +745,7 @@ void test_vloxseg2ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m4_m( @@ -758,7 +758,7 @@ void test_vloxseg2ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf8_m( @@ -771,7 +771,7 @@ void test_vloxseg2ei32_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf4_m( @@ -784,7 +784,7 @@ void test_vloxseg2ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf2_m( @@ -797,7 +797,7 @@ void test_vloxseg2ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m1_m( @@ -810,7 +810,7 @@ void test_vloxseg2ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m2_m( @@ -823,7 +823,7 @@ void test_vloxseg2ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf4_m( @@ -836,7 +836,7 @@ void test_vloxseg2ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, con // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf2_m( @@ -849,7 +849,7 @@ void test_vloxseg2ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m1_m( @@ -862,7 +862,7 @@ void test_vloxseg2ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m2_m( @@ -875,7 +875,7 @@ void test_vloxseg2ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m4_m( @@ -888,7 +888,7 @@ void test_vloxseg2ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32mf2_m( @@ -901,7 +901,7 @@ void test_vloxseg2ei32_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m1_m( @@ -914,7 +914,7 @@ void test_vloxseg2ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m2_m( @@ -927,7 +927,7 @@ void test_vloxseg2ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m4_m( @@ -940,7 +940,7 @@ void test_vloxseg2ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m1_m( @@ -953,7 +953,7 @@ void test_vloxseg2ei32_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m2_m( @@ -966,7 +966,7 @@ void test_vloxseg2ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m4_m( @@ -979,7 +979,7 @@ void test_vloxseg2ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf8_m( @@ -992,7 +992,7 @@ void test_vloxseg2ei32_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf4_m( @@ -1005,7 +1005,7 @@ void test_vloxseg2ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf2_m( @@ -1018,7 +1018,7 @@ void test_vloxseg2ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m1_m( @@ -1031,7 +1031,7 @@ void test_vloxseg2ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m2_m( @@ -1044,7 +1044,7 @@ void test_vloxseg2ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf4_m( @@ -1057,7 +1057,7 @@ void test_vloxseg2ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf2_m( @@ -1070,7 +1070,7 @@ void test_vloxseg2ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m1_m( @@ -1083,7 +1083,7 @@ void test_vloxseg2ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m2_m( @@ -1096,7 +1096,7 @@ void test_vloxseg2ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m4_m( @@ -1109,7 +1109,7 @@ void test_vloxseg2ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32mf2_m( @@ -1122,7 +1122,7 @@ void test_vloxseg2ei32_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m1_m( @@ -1135,7 +1135,7 @@ void test_vloxseg2ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m2_m( @@ -1148,7 +1148,7 @@ void test_vloxseg2ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m4_m( @@ -1161,7 +1161,7 @@ void test_vloxseg2ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m1_m( @@ -1174,7 +1174,7 @@ void test_vloxseg2ei32_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m2_m( @@ -1187,7 +1187,7 @@ void test_vloxseg2ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m4_m( @@ -1200,6 +1200,6 @@ void test_vloxseg2ei32_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m4_m(v0, v1, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei64.c index 22571eb87933319fdc3ab4d840960f12c99133d3..936b5a4f99562625599de08613d973af2d1964fe 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei64.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf2( @@ -30,7 +30,7 @@ void test_vloxseg2ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m1( @@ -43,7 +43,7 @@ void test_vloxseg2ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m2( @@ -56,7 +56,7 @@ void test_vloxseg2ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32mf2( @@ -69,7 +69,7 @@ void test_vloxseg2ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m1( @@ -82,7 +82,7 @@ void test_vloxseg2ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const floa // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m2( @@ -95,7 +95,7 @@ void test_vloxseg2ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m4( @@ -108,7 +108,7 @@ void test_vloxseg2ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m1( @@ -121,7 +121,7 @@ void test_vloxseg2ei64_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m2( @@ -134,7 +134,7 @@ void test_vloxseg2ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m4( @@ -147,7 +147,7 @@ void test_vloxseg2ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf8( @@ -160,7 +160,7 @@ void test_vloxseg2ei64_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf8(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf4( @@ -173,7 +173,7 @@ void test_vloxseg2ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf2( @@ -186,7 +186,7 @@ void test_vloxseg2ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8m1( @@ -199,7 +199,7 @@ void test_vloxseg2ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i8m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf4( @@ -212,7 +212,7 @@ void test_vloxseg2ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf2( @@ -225,7 +225,7 @@ void test_vloxseg2ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m1( @@ -238,7 +238,7 @@ void test_vloxseg2ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m2( @@ -251,7 +251,7 @@ void test_vloxseg2ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32mf2( @@ -264,7 +264,7 @@ void test_vloxseg2ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m1( @@ -277,7 +277,7 @@ void test_vloxseg2ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m2( @@ -290,7 +290,7 @@ void test_vloxseg2ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m4( @@ -303,7 +303,7 @@ void test_vloxseg2ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m1( @@ -316,7 +316,7 @@ void test_vloxseg2ei64_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m2( @@ -329,7 +329,7 @@ void test_vloxseg2ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m4( @@ -342,7 +342,7 @@ void test_vloxseg2ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf8( @@ -355,7 +355,7 @@ void test_vloxseg2ei64_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf8(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf4( @@ -368,7 +368,7 @@ void test_vloxseg2ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf2( @@ -381,7 +381,7 @@ void test_vloxseg2ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8m1( @@ -394,7 +394,7 @@ void test_vloxseg2ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u8m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf4( @@ -407,7 +407,7 @@ void test_vloxseg2ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf2( @@ -420,7 +420,7 @@ void test_vloxseg2ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m1( @@ -433,7 +433,7 @@ void test_vloxseg2ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m2( @@ -446,7 +446,7 @@ void test_vloxseg2ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32mf2( @@ -459,7 +459,7 @@ void test_vloxseg2ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m1( @@ -472,7 +472,7 @@ void test_vloxseg2ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m2( @@ -485,7 +485,7 @@ void test_vloxseg2ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m4( @@ -498,7 +498,7 @@ void test_vloxseg2ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m1( @@ -511,7 +511,7 @@ void test_vloxseg2ei64_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m2( @@ -524,7 +524,7 @@ void test_vloxseg2ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m4( @@ -537,7 +537,7 @@ void test_vloxseg2ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf4_m( @@ -550,7 +550,7 @@ void test_vloxseg2ei64_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf2_m( @@ -563,7 +563,7 @@ void test_vloxseg2ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m1_m( @@ -576,7 +576,7 @@ void test_vloxseg2ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m2_m( @@ -589,7 +589,7 @@ void test_vloxseg2ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32mf2_m( @@ -602,7 +602,7 @@ void test_vloxseg2ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m1_m( @@ -615,7 +615,7 @@ void test_vloxseg2ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m2_m( @@ -628,7 +628,7 @@ void test_vloxseg2ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m4_m( @@ -641,7 +641,7 @@ void test_vloxseg2ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m1_m( @@ -654,7 +654,7 @@ void test_vloxseg2ei64_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m2_m( @@ -667,7 +667,7 @@ void test_vloxseg2ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m4_m( @@ -680,7 +680,7 @@ void test_vloxseg2ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf8_m( @@ -693,7 +693,7 @@ void test_vloxseg2ei64_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf4_m( @@ -706,7 +706,7 @@ void test_vloxseg2ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf2_m( @@ -719,7 +719,7 @@ void test_vloxseg2ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8m1_m( @@ -732,7 +732,7 @@ void test_vloxseg2ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf4_m( @@ -745,7 +745,7 @@ void test_vloxseg2ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf2_m( @@ -758,7 +758,7 @@ void test_vloxseg2ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m1_m( @@ -771,7 +771,7 @@ void test_vloxseg2ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m2_m( @@ -784,7 +784,7 @@ void test_vloxseg2ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32mf2_m( @@ -797,7 +797,7 @@ void test_vloxseg2ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m1_m( @@ -810,7 +810,7 @@ void test_vloxseg2ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m2_m( @@ -823,7 +823,7 @@ void test_vloxseg2ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m4_m( @@ -836,7 +836,7 @@ void test_vloxseg2ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m1_m( @@ -849,7 +849,7 @@ void test_vloxseg2ei64_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m2_m( @@ -862,7 +862,7 @@ void test_vloxseg2ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m4_m( @@ -875,7 +875,7 @@ void test_vloxseg2ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf8_m( @@ -888,7 +888,7 @@ void test_vloxseg2ei64_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf4_m( @@ -901,7 +901,7 @@ void test_vloxseg2ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf2_m( @@ -914,7 +914,7 @@ void test_vloxseg2ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8m1_m( @@ -927,7 +927,7 @@ void test_vloxseg2ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf4_m( @@ -940,7 +940,7 @@ void test_vloxseg2ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf2_m( @@ -953,7 +953,7 @@ void test_vloxseg2ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m1_m( @@ -966,7 +966,7 @@ void test_vloxseg2ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m2_m( @@ -979,7 +979,7 @@ void test_vloxseg2ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32mf2_m( @@ -992,7 +992,7 @@ void test_vloxseg2ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m1_m( @@ -1005,7 +1005,7 @@ void test_vloxseg2ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m2_m( @@ -1018,7 +1018,7 @@ void test_vloxseg2ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m4_m( @@ -1031,7 +1031,7 @@ void test_vloxseg2ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m1_m( @@ -1044,7 +1044,7 @@ void test_vloxseg2ei64_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m2_m( @@ -1057,7 +1057,7 @@ void test_vloxseg2ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m4_m( @@ -1070,6 +1070,6 @@ void test_vloxseg2ei64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m4_m(v0, v1, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei8.c index 043d4df0736e64e54806630a6ab46f8ce874fd74..b9cfefe19fc311c46dfc542ad273d835c950be16 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg2ei8.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf2( @@ -30,7 +30,7 @@ void test_vloxseg2ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Floa // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m1( @@ -43,7 +43,7 @@ void test_vloxseg2ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Floa // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m2( @@ -56,7 +56,7 @@ void test_vloxseg2ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m4( @@ -69,7 +69,7 @@ void test_vloxseg2ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32mf2( @@ -82,7 +82,7 @@ void test_vloxseg2ei8_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m1( @@ -95,7 +95,7 @@ void test_vloxseg2ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m2( @@ -108,7 +108,7 @@ void test_vloxseg2ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m4( @@ -121,7 +121,7 @@ void test_vloxseg2ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m1( @@ -134,7 +134,7 @@ void test_vloxseg2ei8_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m2( @@ -147,7 +147,7 @@ void test_vloxseg2ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m4( @@ -160,7 +160,7 @@ void test_vloxseg2ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf8( @@ -173,7 +173,7 @@ void test_vloxseg2ei8_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf8(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf4( @@ -186,7 +186,7 @@ void test_vloxseg2ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf2( @@ -199,7 +199,7 @@ void test_vloxseg2ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m1( @@ -212,7 +212,7 @@ void test_vloxseg2ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m2( @@ -225,7 +225,7 @@ void test_vloxseg2ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m4( @@ -238,7 +238,7 @@ void test_vloxseg2ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf4( @@ -251,7 +251,7 @@ void test_vloxseg2ei8_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf2( @@ -264,7 +264,7 @@ void test_vloxseg2ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m1( @@ -277,7 +277,7 @@ void test_vloxseg2ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m2( @@ -290,7 +290,7 @@ void test_vloxseg2ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m4( @@ -303,7 +303,7 @@ void test_vloxseg2ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32mf2( @@ -316,7 +316,7 @@ void test_vloxseg2ei8_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m1( @@ -329,7 +329,7 @@ void test_vloxseg2ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m2( @@ -342,7 +342,7 @@ void test_vloxseg2ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m4( @@ -355,7 +355,7 @@ void test_vloxseg2ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m1( @@ -368,7 +368,7 @@ void test_vloxseg2ei8_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m2( @@ -381,7 +381,7 @@ void test_vloxseg2ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m4( @@ -394,7 +394,7 @@ void test_vloxseg2ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf8( @@ -407,7 +407,7 @@ void test_vloxseg2ei8_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf8(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf4( @@ -420,7 +420,7 @@ void test_vloxseg2ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *b // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf2( @@ -433,7 +433,7 @@ void test_vloxseg2ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *b // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m1( @@ -446,7 +446,7 @@ void test_vloxseg2ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *b // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m2( @@ -459,7 +459,7 @@ void test_vloxseg2ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m4( @@ -472,7 +472,7 @@ void test_vloxseg2ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf4( @@ -485,7 +485,7 @@ void test_vloxseg2ei8_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf2( @@ -498,7 +498,7 @@ void test_vloxseg2ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m1( @@ -511,7 +511,7 @@ void test_vloxseg2ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m2( @@ -524,7 +524,7 @@ void test_vloxseg2ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m4( @@ -537,7 +537,7 @@ void test_vloxseg2ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32mf2( @@ -550,7 +550,7 @@ void test_vloxseg2ei8_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u32mf2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m1( @@ -563,7 +563,7 @@ void test_vloxseg2ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m2( @@ -576,7 +576,7 @@ void test_vloxseg2ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m4( @@ -589,7 +589,7 @@ void test_vloxseg2ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m1( @@ -602,7 +602,7 @@ void test_vloxseg2ei8_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m1(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m2( @@ -615,7 +615,7 @@ void test_vloxseg2ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m2(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m4( @@ -628,7 +628,7 @@ void test_vloxseg2ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m4(v0, v1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf4_m( @@ -641,7 +641,7 @@ void test_vloxseg2ei8_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf2_m( @@ -654,7 +654,7 @@ void test_vloxseg2ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m1_m( @@ -667,7 +667,7 @@ void test_vloxseg2ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m2_m( @@ -680,7 +680,7 @@ void test_vloxseg2ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m4_m( @@ -693,7 +693,7 @@ void test_vloxseg2ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32mf2_m( @@ -706,7 +706,7 @@ void test_vloxseg2ei8_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m1_m( @@ -719,7 +719,7 @@ void test_vloxseg2ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m2_m( @@ -732,7 +732,7 @@ void test_vloxseg2ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m4_m( @@ -745,7 +745,7 @@ void test_vloxseg2ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m1_m( @@ -758,7 +758,7 @@ void test_vloxseg2ei8_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m2_m( @@ -771,7 +771,7 @@ void test_vloxseg2ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m4_m( @@ -784,7 +784,7 @@ void test_vloxseg2ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf8_m( @@ -797,7 +797,7 @@ void test_vloxseg2ei8_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf4_m( @@ -810,7 +810,7 @@ void test_vloxseg2ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf2_m( @@ -823,7 +823,7 @@ void test_vloxseg2ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m1_m( @@ -836,7 +836,7 @@ void test_vloxseg2ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m2_m( @@ -849,7 +849,7 @@ void test_vloxseg2ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, cons // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m4_m( @@ -862,7 +862,7 @@ void test_vloxseg2ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, cons // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf4_m( @@ -875,7 +875,7 @@ void test_vloxseg2ei8_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, cons // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf2_m( @@ -888,7 +888,7 @@ void test_vloxseg2ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vloxseg2ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m2_m( @@ -914,7 +914,7 @@ void test_vloxseg2ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m4_m( @@ -927,7 +927,7 @@ void test_vloxseg2ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32mf2_m( @@ -940,7 +940,7 @@ void test_vloxseg2ei8_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m1_m( @@ -953,7 +953,7 @@ void test_vloxseg2ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m2_m( @@ -966,7 +966,7 @@ void test_vloxseg2ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m4_m( @@ -979,7 +979,7 @@ void test_vloxseg2ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m1_m( @@ -992,7 +992,7 @@ void test_vloxseg2ei8_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m2_m( @@ -1005,7 +1005,7 @@ void test_vloxseg2ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m4_m( @@ -1018,7 +1018,7 @@ void test_vloxseg2ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf8_m( @@ -1031,7 +1031,7 @@ void test_vloxseg2ei8_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf4_m( @@ -1044,7 +1044,7 @@ void test_vloxseg2ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf2_m( @@ -1057,7 +1057,7 @@ void test_vloxseg2ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m1_m( @@ -1070,7 +1070,7 @@ void test_vloxseg2ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m2_m( @@ -1083,7 +1083,7 @@ void test_vloxseg2ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, co // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m4_m( @@ -1096,7 +1096,7 @@ void test_vloxseg2ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, co // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf4_m( @@ -1109,7 +1109,7 @@ void test_vloxseg2ei8_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, co // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf2_m( @@ -1122,7 +1122,7 @@ void test_vloxseg2ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m1_m( @@ -1135,7 +1135,7 @@ void test_vloxseg2ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m2_m( @@ -1148,7 +1148,7 @@ void test_vloxseg2ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m4_m( @@ -1161,7 +1161,7 @@ void test_vloxseg2ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32mf2_m( @@ -1174,7 +1174,7 @@ void test_vloxseg2ei8_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m1_m( @@ -1187,7 +1187,7 @@ void test_vloxseg2ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m2_m( @@ -1200,7 +1200,7 @@ void test_vloxseg2ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m4_m( @@ -1213,7 +1213,7 @@ void test_vloxseg2ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m1_m( @@ -1226,7 +1226,7 @@ void test_vloxseg2ei8_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m2_m( @@ -1239,7 +1239,7 @@ void test_vloxseg2ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m4_m( @@ -1252,6 +1252,6 @@ void test_vloxseg2ei8_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m4_m(v0, v1, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei16.c index 5538d6331eebe35e7594730d7b48adcce048d843..d6b6a85f47e5bc1430a1ac3a4983458f2a8c93f5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei16.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf2( @@ -34,7 +34,7 @@ void test_vloxseg3ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m1( @@ -49,7 +49,7 @@ void test_vloxseg3ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m2( @@ -64,7 +64,7 @@ void test_vloxseg3ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32mf2( @@ -79,7 +79,7 @@ void test_vloxseg3ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m1( @@ -94,7 +94,7 @@ void test_vloxseg3ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m2( @@ -109,7 +109,7 @@ void test_vloxseg3ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m1( @@ -124,7 +124,7 @@ void test_vloxseg3ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m2( @@ -139,7 +139,7 @@ void test_vloxseg3ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf8( @@ -154,7 +154,7 @@ void test_vloxseg3ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf4( @@ -169,7 +169,7 @@ void test_vloxseg3ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf2( @@ -184,7 +184,7 @@ void test_vloxseg3ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m1( @@ -199,7 +199,7 @@ void test_vloxseg3ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m2( @@ -214,7 +214,7 @@ void test_vloxseg3ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf4( @@ -229,7 +229,7 @@ void test_vloxseg3ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf2( @@ -244,7 +244,7 @@ void test_vloxseg3ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m1( @@ -259,7 +259,7 @@ void test_vloxseg3ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m2( @@ -274,7 +274,7 @@ void test_vloxseg3ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32mf2( @@ -289,7 +289,7 @@ void test_vloxseg3ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m1( @@ -304,7 +304,7 @@ void test_vloxseg3ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m2( @@ -319,7 +319,7 @@ void test_vloxseg3ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m1( @@ -334,7 +334,7 @@ void test_vloxseg3ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m2( @@ -349,7 +349,7 @@ void test_vloxseg3ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf8( @@ -364,7 +364,7 @@ void test_vloxseg3ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf4( @@ -379,7 +379,7 @@ void test_vloxseg3ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf2( @@ -394,7 +394,7 @@ void test_vloxseg3ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m1( @@ -409,7 +409,7 @@ void test_vloxseg3ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m2( @@ -424,7 +424,7 @@ void test_vloxseg3ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf4( @@ -439,7 +439,7 @@ void test_vloxseg3ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf2( @@ -454,7 +454,7 @@ void test_vloxseg3ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m1( @@ -469,7 +469,7 @@ void test_vloxseg3ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m2( @@ -484,7 +484,7 @@ void test_vloxseg3ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32mf2( @@ -499,7 +499,7 @@ void test_vloxseg3ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m1( @@ -514,7 +514,7 @@ void test_vloxseg3ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m2( @@ -529,7 +529,7 @@ void test_vloxseg3ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m1( @@ -544,7 +544,7 @@ void test_vloxseg3ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m2( @@ -559,7 +559,7 @@ void test_vloxseg3ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf4_m( @@ -574,7 +574,7 @@ void test_vloxseg3ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf2_m( @@ -589,7 +589,7 @@ void test_vloxseg3ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m1_m( @@ -604,7 +604,7 @@ void test_vloxseg3ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m2_m( @@ -619,7 +619,7 @@ void test_vloxseg3ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vloxseg3ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m1_m( @@ -649,7 +649,7 @@ void test_vloxseg3ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m2_m( @@ -664,7 +664,7 @@ void test_vloxseg3ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m1_m( @@ -679,7 +679,7 @@ void test_vloxseg3ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m2_m( @@ -694,7 +694,7 @@ void test_vloxseg3ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf8_m( @@ -709,7 +709,7 @@ void test_vloxseg3ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf4_m( @@ -724,7 +724,7 @@ void test_vloxseg3ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vloxseg3ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m1_m( @@ -754,7 +754,7 @@ void test_vloxseg3ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m2_m( @@ -769,7 +769,7 @@ void test_vloxseg3ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf4_m( @@ -784,7 +784,7 @@ void test_vloxseg3ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf2_m( @@ -799,7 +799,7 @@ void test_vloxseg3ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m1_m( @@ -814,7 +814,7 @@ void test_vloxseg3ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m2_m( @@ -829,7 +829,7 @@ void test_vloxseg3ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vloxseg3ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m1_m( @@ -859,7 +859,7 @@ void test_vloxseg3ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m2_m( @@ -874,7 +874,7 @@ void test_vloxseg3ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m1_m( @@ -889,7 +889,7 @@ void test_vloxseg3ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m2_m( @@ -904,7 +904,7 @@ void test_vloxseg3ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf8_m( @@ -919,7 +919,7 @@ void test_vloxseg3ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf4_m( @@ -934,7 +934,7 @@ void test_vloxseg3ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vloxseg3ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m1_m( @@ -964,7 +964,7 @@ void test_vloxseg3ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m2_m( @@ -979,7 +979,7 @@ void test_vloxseg3ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf4_m( @@ -994,7 +994,7 @@ void test_vloxseg3ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf2_m( @@ -1009,7 +1009,7 @@ void test_vloxseg3ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m1_m( @@ -1024,7 +1024,7 @@ void test_vloxseg3ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m2_m( @@ -1039,7 +1039,7 @@ void test_vloxseg3ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vloxseg3ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m1_m( @@ -1069,7 +1069,7 @@ void test_vloxseg3ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m2_m( @@ -1084,7 +1084,7 @@ void test_vloxseg3ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m1_m( @@ -1099,7 +1099,7 @@ void test_vloxseg3ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m2_m( @@ -1114,6 +1114,6 @@ void test_vloxseg3ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei32.c index d99d86617d50a1db7469d8626a4045358e7923c9..cfe347d66b70a991c69841cfdbb30cdbda7e700e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei32.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf2( @@ -34,7 +34,7 @@ void test_vloxseg3ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m1( @@ -49,7 +49,7 @@ void test_vloxseg3ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m2( @@ -64,7 +64,7 @@ void test_vloxseg3ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32mf2( @@ -79,7 +79,7 @@ void test_vloxseg3ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m1( @@ -94,7 +94,7 @@ void test_vloxseg3ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m2( @@ -109,7 +109,7 @@ void test_vloxseg3ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m1( @@ -124,7 +124,7 @@ void test_vloxseg3ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m2( @@ -139,7 +139,7 @@ void test_vloxseg3ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf8( @@ -154,7 +154,7 @@ void test_vloxseg3ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf4( @@ -169,7 +169,7 @@ void test_vloxseg3ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf2( @@ -184,7 +184,7 @@ void test_vloxseg3ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m1( @@ -199,7 +199,7 @@ void test_vloxseg3ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m2( @@ -214,7 +214,7 @@ void test_vloxseg3ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf4( @@ -229,7 +229,7 @@ void test_vloxseg3ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf2( @@ -244,7 +244,7 @@ void test_vloxseg3ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m1( @@ -259,7 +259,7 @@ void test_vloxseg3ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m2( @@ -274,7 +274,7 @@ void test_vloxseg3ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32mf2( @@ -289,7 +289,7 @@ void test_vloxseg3ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m1( @@ -304,7 +304,7 @@ void test_vloxseg3ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m2( @@ -319,7 +319,7 @@ void test_vloxseg3ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m1( @@ -334,7 +334,7 @@ void test_vloxseg3ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m2( @@ -349,7 +349,7 @@ void test_vloxseg3ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf8( @@ -364,7 +364,7 @@ void test_vloxseg3ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf4( @@ -379,7 +379,7 @@ void test_vloxseg3ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf2( @@ -394,7 +394,7 @@ void test_vloxseg3ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m1( @@ -409,7 +409,7 @@ void test_vloxseg3ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m2( @@ -424,7 +424,7 @@ void test_vloxseg3ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf4( @@ -439,7 +439,7 @@ void test_vloxseg3ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf2( @@ -454,7 +454,7 @@ void test_vloxseg3ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m1( @@ -469,7 +469,7 @@ void test_vloxseg3ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m2( @@ -484,7 +484,7 @@ void test_vloxseg3ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32mf2( @@ -499,7 +499,7 @@ void test_vloxseg3ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m1( @@ -514,7 +514,7 @@ void test_vloxseg3ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m2( @@ -529,7 +529,7 @@ void test_vloxseg3ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m1( @@ -544,7 +544,7 @@ void test_vloxseg3ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m2( @@ -559,7 +559,7 @@ void test_vloxseg3ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf4_m( @@ -574,7 +574,7 @@ void test_vloxseg3ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf2_m( @@ -589,7 +589,7 @@ void test_vloxseg3ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m1_m( @@ -604,7 +604,7 @@ void test_vloxseg3ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m2_m( @@ -619,7 +619,7 @@ void test_vloxseg3ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vloxseg3ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m1_m( @@ -649,7 +649,7 @@ void test_vloxseg3ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m2_m( @@ -664,7 +664,7 @@ void test_vloxseg3ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m1_m( @@ -679,7 +679,7 @@ void test_vloxseg3ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m2_m( @@ -694,7 +694,7 @@ void test_vloxseg3ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf8_m( @@ -709,7 +709,7 @@ void test_vloxseg3ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf4_m( @@ -724,7 +724,7 @@ void test_vloxseg3ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vloxseg3ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m1_m( @@ -754,7 +754,7 @@ void test_vloxseg3ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m2_m( @@ -769,7 +769,7 @@ void test_vloxseg3ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf4_m( @@ -784,7 +784,7 @@ void test_vloxseg3ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf2_m( @@ -799,7 +799,7 @@ void test_vloxseg3ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m1_m( @@ -814,7 +814,7 @@ void test_vloxseg3ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m2_m( @@ -829,7 +829,7 @@ void test_vloxseg3ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vloxseg3ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m1_m( @@ -859,7 +859,7 @@ void test_vloxseg3ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m2_m( @@ -874,7 +874,7 @@ void test_vloxseg3ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m1_m( @@ -889,7 +889,7 @@ void test_vloxseg3ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m2_m( @@ -904,7 +904,7 @@ void test_vloxseg3ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf8_m( @@ -919,7 +919,7 @@ void test_vloxseg3ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf4_m( @@ -934,7 +934,7 @@ void test_vloxseg3ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vloxseg3ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m1_m( @@ -964,7 +964,7 @@ void test_vloxseg3ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m2_m( @@ -979,7 +979,7 @@ void test_vloxseg3ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf4_m( @@ -994,7 +994,7 @@ void test_vloxseg3ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf2_m( @@ -1009,7 +1009,7 @@ void test_vloxseg3ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m1_m( @@ -1024,7 +1024,7 @@ void test_vloxseg3ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m2_m( @@ -1039,7 +1039,7 @@ void test_vloxseg3ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vloxseg3ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m1_m( @@ -1069,7 +1069,7 @@ void test_vloxseg3ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m2_m( @@ -1084,7 +1084,7 @@ void test_vloxseg3ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m1_m( @@ -1099,7 +1099,7 @@ void test_vloxseg3ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m2_m( @@ -1114,6 +1114,6 @@ void test_vloxseg3ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei64.c index 9692287604757c220a2ff3d992347f207bdd185a..8e5c4bba7e8a22f9096fe6bb7932c545d5381449 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei64.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf2( @@ -34,7 +34,7 @@ void test_vloxseg3ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m1( @@ -49,7 +49,7 @@ void test_vloxseg3ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m2( @@ -64,7 +64,7 @@ void test_vloxseg3ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32mf2( @@ -79,7 +79,7 @@ void test_vloxseg3ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m1( @@ -94,7 +94,7 @@ void test_vloxseg3ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m2( @@ -109,7 +109,7 @@ void test_vloxseg3ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m1( @@ -124,7 +124,7 @@ void test_vloxseg3ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m2( @@ -139,7 +139,7 @@ void test_vloxseg3ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf8( @@ -154,7 +154,7 @@ void test_vloxseg3ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf4( @@ -169,7 +169,7 @@ void test_vloxseg3ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf2( @@ -184,7 +184,7 @@ void test_vloxseg3ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8m1( @@ -199,7 +199,7 @@ void test_vloxseg3ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf4( @@ -214,7 +214,7 @@ void test_vloxseg3ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf2( @@ -229,7 +229,7 @@ void test_vloxseg3ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m1( @@ -244,7 +244,7 @@ void test_vloxseg3ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m2( @@ -259,7 +259,7 @@ void test_vloxseg3ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32mf2( @@ -274,7 +274,7 @@ void test_vloxseg3ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m1( @@ -289,7 +289,7 @@ void test_vloxseg3ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m2( @@ -304,7 +304,7 @@ void test_vloxseg3ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m1( @@ -319,7 +319,7 @@ void test_vloxseg3ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m2( @@ -334,7 +334,7 @@ void test_vloxseg3ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf8( @@ -349,7 +349,7 @@ void test_vloxseg3ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf4( @@ -364,7 +364,7 @@ void test_vloxseg3ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf2( @@ -379,7 +379,7 @@ void test_vloxseg3ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8m1( @@ -394,7 +394,7 @@ void test_vloxseg3ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf4( @@ -409,7 +409,7 @@ void test_vloxseg3ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf2( @@ -424,7 +424,7 @@ void test_vloxseg3ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m1( @@ -439,7 +439,7 @@ void test_vloxseg3ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m2( @@ -454,7 +454,7 @@ void test_vloxseg3ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32mf2( @@ -469,7 +469,7 @@ void test_vloxseg3ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m1( @@ -484,7 +484,7 @@ void test_vloxseg3ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m2( @@ -499,7 +499,7 @@ void test_vloxseg3ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m1( @@ -514,7 +514,7 @@ void test_vloxseg3ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m2( @@ -529,7 +529,7 @@ void test_vloxseg3ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf4_m( @@ -544,7 +544,7 @@ void test_vloxseg3ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf2_m( @@ -559,7 +559,7 @@ void test_vloxseg3ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m1_m( @@ -574,7 +574,7 @@ void test_vloxseg3ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m2_m( @@ -589,7 +589,7 @@ void test_vloxseg3ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32mf2_m( @@ -604,7 +604,7 @@ void test_vloxseg3ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m1_m( @@ -619,7 +619,7 @@ void test_vloxseg3ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m2_m( @@ -634,7 +634,7 @@ void test_vloxseg3ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m1_m( @@ -649,7 +649,7 @@ void test_vloxseg3ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m2_m( @@ -664,7 +664,7 @@ void test_vloxseg3ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf8_m( @@ -679,7 +679,7 @@ void test_vloxseg3ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf4_m( @@ -694,7 +694,7 @@ void test_vloxseg3ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf2_m( @@ -709,7 +709,7 @@ void test_vloxseg3ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8m1_m( @@ -724,7 +724,7 @@ void test_vloxseg3ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf4_m( @@ -739,7 +739,7 @@ void test_vloxseg3ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf2_m( @@ -754,7 +754,7 @@ void test_vloxseg3ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m1_m( @@ -769,7 +769,7 @@ void test_vloxseg3ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m2_m( @@ -784,7 +784,7 @@ void test_vloxseg3ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32mf2_m( @@ -799,7 +799,7 @@ void test_vloxseg3ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m1_m( @@ -814,7 +814,7 @@ void test_vloxseg3ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m2_m( @@ -829,7 +829,7 @@ void test_vloxseg3ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m1_m( @@ -844,7 +844,7 @@ void test_vloxseg3ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m2_m( @@ -859,7 +859,7 @@ void test_vloxseg3ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf8_m( @@ -874,7 +874,7 @@ void test_vloxseg3ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf4_m( @@ -889,7 +889,7 @@ void test_vloxseg3ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf2_m( @@ -904,7 +904,7 @@ void test_vloxseg3ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8m1_m( @@ -919,7 +919,7 @@ void test_vloxseg3ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf4_m( @@ -934,7 +934,7 @@ void test_vloxseg3ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf2_m( @@ -949,7 +949,7 @@ void test_vloxseg3ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m1_m( @@ -964,7 +964,7 @@ void test_vloxseg3ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m2_m( @@ -979,7 +979,7 @@ void test_vloxseg3ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32mf2_m( @@ -994,7 +994,7 @@ void test_vloxseg3ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m1_m( @@ -1009,7 +1009,7 @@ void test_vloxseg3ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m2_m( @@ -1024,7 +1024,7 @@ void test_vloxseg3ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m1_m( @@ -1039,7 +1039,7 @@ void test_vloxseg3ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m2_m( @@ -1054,6 +1054,6 @@ void test_vloxseg3ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei8.c index 0737d0b41ae2c797a297a774aff1db6fac51abe7..513a44dfd6d897e8472d24bc6966405f78f000e4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg3ei8.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf2( @@ -34,7 +34,7 @@ void test_vloxseg3ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m1( @@ -49,7 +49,7 @@ void test_vloxseg3ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m2( @@ -64,7 +64,7 @@ void test_vloxseg3ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32mf2( @@ -79,7 +79,7 @@ void test_vloxseg3ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m1( @@ -94,7 +94,7 @@ void test_vloxseg3ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m2( @@ -109,7 +109,7 @@ void test_vloxseg3ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m1( @@ -124,7 +124,7 @@ void test_vloxseg3ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m2( @@ -139,7 +139,7 @@ void test_vloxseg3ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf8( @@ -154,7 +154,7 @@ void test_vloxseg3ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf4( @@ -169,7 +169,7 @@ void test_vloxseg3ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf2( @@ -184,7 +184,7 @@ void test_vloxseg3ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m1( @@ -199,7 +199,7 @@ void test_vloxseg3ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m2( @@ -214,7 +214,7 @@ void test_vloxseg3ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf4( @@ -229,7 +229,7 @@ void test_vloxseg3ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf2( @@ -244,7 +244,7 @@ void test_vloxseg3ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m1( @@ -259,7 +259,7 @@ void test_vloxseg3ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m2( @@ -274,7 +274,7 @@ void test_vloxseg3ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32mf2( @@ -289,7 +289,7 @@ void test_vloxseg3ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m1( @@ -304,7 +304,7 @@ void test_vloxseg3ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m2( @@ -319,7 +319,7 @@ void test_vloxseg3ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m1( @@ -334,7 +334,7 @@ void test_vloxseg3ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m2( @@ -349,7 +349,7 @@ void test_vloxseg3ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf8( @@ -364,7 +364,7 @@ void test_vloxseg3ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf4( @@ -379,7 +379,7 @@ void test_vloxseg3ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf2( @@ -394,7 +394,7 @@ void test_vloxseg3ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m1( @@ -409,7 +409,7 @@ void test_vloxseg3ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m2( @@ -424,7 +424,7 @@ void test_vloxseg3ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf4( @@ -439,7 +439,7 @@ void test_vloxseg3ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf2( @@ -454,7 +454,7 @@ void test_vloxseg3ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m1( @@ -469,7 +469,7 @@ void test_vloxseg3ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m2( @@ -484,7 +484,7 @@ void test_vloxseg3ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32mf2( @@ -499,7 +499,7 @@ void test_vloxseg3ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m1( @@ -514,7 +514,7 @@ void test_vloxseg3ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m2( @@ -529,7 +529,7 @@ void test_vloxseg3ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m1( @@ -544,7 +544,7 @@ void test_vloxseg3ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m2( @@ -559,7 +559,7 @@ void test_vloxseg3ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf4_m( @@ -574,7 +574,7 @@ void test_vloxseg3ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf2_m( @@ -589,7 +589,7 @@ void test_vloxseg3ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m1_m( @@ -604,7 +604,7 @@ void test_vloxseg3ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m2_m( @@ -619,7 +619,7 @@ void test_vloxseg3ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vloxseg3ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m1_m( @@ -649,7 +649,7 @@ void test_vloxseg3ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m2_m( @@ -664,7 +664,7 @@ void test_vloxseg3ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m1_m( @@ -679,7 +679,7 @@ void test_vloxseg3ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m2_m( @@ -694,7 +694,7 @@ void test_vloxseg3ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf8_m( @@ -709,7 +709,7 @@ void test_vloxseg3ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf4_m( @@ -724,7 +724,7 @@ void test_vloxseg3ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vloxseg3ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m1_m( @@ -754,7 +754,7 @@ void test_vloxseg3ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m2_m( @@ -769,7 +769,7 @@ void test_vloxseg3ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf4_m( @@ -784,7 +784,7 @@ void test_vloxseg3ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf2_m( @@ -799,7 +799,7 @@ void test_vloxseg3ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m1_m( @@ -814,7 +814,7 @@ void test_vloxseg3ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m2_m( @@ -829,7 +829,7 @@ void test_vloxseg3ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vloxseg3ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m1_m( @@ -859,7 +859,7 @@ void test_vloxseg3ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m2_m( @@ -874,7 +874,7 @@ void test_vloxseg3ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m1_m( @@ -889,7 +889,7 @@ void test_vloxseg3ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m2_m( @@ -904,7 +904,7 @@ void test_vloxseg3ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf8_m( @@ -919,7 +919,7 @@ void test_vloxseg3ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf4_m( @@ -934,7 +934,7 @@ void test_vloxseg3ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vloxseg3ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m1_m( @@ -964,7 +964,7 @@ void test_vloxseg3ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m2_m( @@ -979,7 +979,7 @@ void test_vloxseg3ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf4_m( @@ -994,7 +994,7 @@ void test_vloxseg3ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf2_m( @@ -1009,7 +1009,7 @@ void test_vloxseg3ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m1_m( @@ -1024,7 +1024,7 @@ void test_vloxseg3ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m2_m( @@ -1039,7 +1039,7 @@ void test_vloxseg3ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vloxseg3ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m1_m( @@ -1069,7 +1069,7 @@ void test_vloxseg3ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m2_m( @@ -1084,7 +1084,7 @@ void test_vloxseg3ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m1_m( @@ -1099,7 +1099,7 @@ void test_vloxseg3ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m2_m( @@ -1114,6 +1114,6 @@ void test_vloxseg3ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei16.c index 7adc0a0650f7254cb06c4e9635bd752a1e1f4935..ea1a7817cf9219422795292629c34f43f0827d07 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei16.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf2( @@ -38,7 +38,7 @@ void test_vloxseg4ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m1( @@ -55,7 +55,7 @@ void test_vloxseg4ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m2( @@ -72,7 +72,7 @@ void test_vloxseg4ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32mf2( @@ -89,7 +89,7 @@ void test_vloxseg4ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m1( @@ -106,7 +106,7 @@ void test_vloxseg4ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m2( @@ -123,7 +123,7 @@ void test_vloxseg4ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m1( @@ -140,7 +140,7 @@ void test_vloxseg4ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m2( @@ -157,7 +157,7 @@ void test_vloxseg4ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf8( @@ -174,7 +174,7 @@ void test_vloxseg4ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf4( @@ -191,7 +191,7 @@ void test_vloxseg4ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf2( @@ -208,7 +208,7 @@ void test_vloxseg4ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m1( @@ -225,7 +225,7 @@ void test_vloxseg4ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m2( @@ -242,7 +242,7 @@ void test_vloxseg4ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf4( @@ -259,7 +259,7 @@ void test_vloxseg4ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf2( @@ -276,7 +276,7 @@ void test_vloxseg4ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m1( @@ -293,7 +293,7 @@ void test_vloxseg4ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m2( @@ -310,7 +310,7 @@ void test_vloxseg4ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32mf2( @@ -327,7 +327,7 @@ void test_vloxseg4ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m1( @@ -344,7 +344,7 @@ void test_vloxseg4ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m2( @@ -361,7 +361,7 @@ void test_vloxseg4ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m1( @@ -378,7 +378,7 @@ void test_vloxseg4ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m2( @@ -395,7 +395,7 @@ void test_vloxseg4ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf8( @@ -412,7 +412,7 @@ void test_vloxseg4ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf4( @@ -429,7 +429,7 @@ void test_vloxseg4ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf2( @@ -446,7 +446,7 @@ void test_vloxseg4ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m1( @@ -463,7 +463,7 @@ void test_vloxseg4ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m2( @@ -480,7 +480,7 @@ void test_vloxseg4ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf4( @@ -497,7 +497,7 @@ void test_vloxseg4ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf2( @@ -514,7 +514,7 @@ void test_vloxseg4ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m1( @@ -531,7 +531,7 @@ void test_vloxseg4ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m2( @@ -548,7 +548,7 @@ void test_vloxseg4ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32mf2( @@ -565,7 +565,7 @@ void test_vloxseg4ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m1( @@ -582,7 +582,7 @@ void test_vloxseg4ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m2( @@ -599,7 +599,7 @@ void test_vloxseg4ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m1( @@ -616,7 +616,7 @@ void test_vloxseg4ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m2( @@ -633,7 +633,7 @@ void test_vloxseg4ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf4_m( @@ -650,7 +650,7 @@ void test_vloxseg4ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf2_m( @@ -667,7 +667,7 @@ void test_vloxseg4ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m1_m( @@ -684,7 +684,7 @@ void test_vloxseg4ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m2_m( @@ -701,7 +701,7 @@ void test_vloxseg4ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32mf2_m( @@ -718,7 +718,7 @@ void test_vloxseg4ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m1_m( @@ -735,7 +735,7 @@ void test_vloxseg4ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m2_m( @@ -752,7 +752,7 @@ void test_vloxseg4ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m1_m( @@ -769,7 +769,7 @@ void test_vloxseg4ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m2_m( @@ -786,7 +786,7 @@ void test_vloxseg4ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf8_m( @@ -803,7 +803,7 @@ void test_vloxseg4ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf4_m( @@ -820,7 +820,7 @@ void test_vloxseg4ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf2_m( @@ -837,7 +837,7 @@ void test_vloxseg4ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m1_m( @@ -854,7 +854,7 @@ void test_vloxseg4ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m2_m( @@ -871,7 +871,7 @@ void test_vloxseg4ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf4_m( @@ -888,7 +888,7 @@ void test_vloxseg4ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf2_m( @@ -905,7 +905,7 @@ void test_vloxseg4ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m1_m( @@ -922,7 +922,7 @@ void test_vloxseg4ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m2_m( @@ -939,7 +939,7 @@ void test_vloxseg4ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32mf2_m( @@ -956,7 +956,7 @@ void test_vloxseg4ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m1_m( @@ -973,7 +973,7 @@ void test_vloxseg4ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m2_m( @@ -990,7 +990,7 @@ void test_vloxseg4ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m1_m( @@ -1007,7 +1007,7 @@ void test_vloxseg4ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m2_m( @@ -1024,7 +1024,7 @@ void test_vloxseg4ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf8_m( @@ -1041,7 +1041,7 @@ void test_vloxseg4ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf4_m( @@ -1058,7 +1058,7 @@ void test_vloxseg4ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf2_m( @@ -1075,7 +1075,7 @@ void test_vloxseg4ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m1_m( @@ -1092,7 +1092,7 @@ void test_vloxseg4ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m2_m( @@ -1109,7 +1109,7 @@ void test_vloxseg4ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf4_m( @@ -1126,7 +1126,7 @@ void test_vloxseg4ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf2_m( @@ -1143,7 +1143,7 @@ void test_vloxseg4ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m1_m( @@ -1160,7 +1160,7 @@ void test_vloxseg4ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m2_m( @@ -1177,7 +1177,7 @@ void test_vloxseg4ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32mf2_m( @@ -1194,7 +1194,7 @@ void test_vloxseg4ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m1_m( @@ -1211,7 +1211,7 @@ void test_vloxseg4ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m2_m( @@ -1228,7 +1228,7 @@ void test_vloxseg4ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m1_m( @@ -1245,7 +1245,7 @@ void test_vloxseg4ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m2_m( @@ -1262,6 +1262,6 @@ void test_vloxseg4ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei32.c index e04e6638c996fba0817047977cc519b61870464e..8adb1477b13903bbee0ed2c7fb41653199594629 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei32.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf2( @@ -38,7 +38,7 @@ void test_vloxseg4ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m1( @@ -55,7 +55,7 @@ void test_vloxseg4ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m2( @@ -72,7 +72,7 @@ void test_vloxseg4ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32mf2( @@ -89,7 +89,7 @@ void test_vloxseg4ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m1( @@ -106,7 +106,7 @@ void test_vloxseg4ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m2( @@ -123,7 +123,7 @@ void test_vloxseg4ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m1( @@ -140,7 +140,7 @@ void test_vloxseg4ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m2( @@ -157,7 +157,7 @@ void test_vloxseg4ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf8( @@ -174,7 +174,7 @@ void test_vloxseg4ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf4( @@ -191,7 +191,7 @@ void test_vloxseg4ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf2( @@ -208,7 +208,7 @@ void test_vloxseg4ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m1( @@ -225,7 +225,7 @@ void test_vloxseg4ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m2( @@ -242,7 +242,7 @@ void test_vloxseg4ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf4( @@ -259,7 +259,7 @@ void test_vloxseg4ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf2( @@ -276,7 +276,7 @@ void test_vloxseg4ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m1( @@ -293,7 +293,7 @@ void test_vloxseg4ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m2( @@ -310,7 +310,7 @@ void test_vloxseg4ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32mf2( @@ -327,7 +327,7 @@ void test_vloxseg4ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m1( @@ -344,7 +344,7 @@ void test_vloxseg4ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m2( @@ -361,7 +361,7 @@ void test_vloxseg4ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m1( @@ -378,7 +378,7 @@ void test_vloxseg4ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m2( @@ -395,7 +395,7 @@ void test_vloxseg4ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf8( @@ -412,7 +412,7 @@ void test_vloxseg4ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf4( @@ -429,7 +429,7 @@ void test_vloxseg4ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf2( @@ -446,7 +446,7 @@ void test_vloxseg4ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m1( @@ -463,7 +463,7 @@ void test_vloxseg4ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m2( @@ -480,7 +480,7 @@ void test_vloxseg4ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf4( @@ -497,7 +497,7 @@ void test_vloxseg4ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf2( @@ -514,7 +514,7 @@ void test_vloxseg4ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m1( @@ -531,7 +531,7 @@ void test_vloxseg4ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m2( @@ -548,7 +548,7 @@ void test_vloxseg4ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32mf2( @@ -565,7 +565,7 @@ void test_vloxseg4ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m1( @@ -582,7 +582,7 @@ void test_vloxseg4ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m2( @@ -599,7 +599,7 @@ void test_vloxseg4ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m1( @@ -616,7 +616,7 @@ void test_vloxseg4ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m2( @@ -633,7 +633,7 @@ void test_vloxseg4ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf4_m( @@ -650,7 +650,7 @@ void test_vloxseg4ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf2_m( @@ -667,7 +667,7 @@ void test_vloxseg4ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m1_m( @@ -684,7 +684,7 @@ void test_vloxseg4ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m2_m( @@ -701,7 +701,7 @@ void test_vloxseg4ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32mf2_m( @@ -718,7 +718,7 @@ void test_vloxseg4ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m1_m( @@ -735,7 +735,7 @@ void test_vloxseg4ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m2_m( @@ -752,7 +752,7 @@ void test_vloxseg4ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m1_m( @@ -769,7 +769,7 @@ void test_vloxseg4ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m2_m( @@ -786,7 +786,7 @@ void test_vloxseg4ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf8_m( @@ -803,7 +803,7 @@ void test_vloxseg4ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf4_m( @@ -820,7 +820,7 @@ void test_vloxseg4ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf2_m( @@ -837,7 +837,7 @@ void test_vloxseg4ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m1_m( @@ -854,7 +854,7 @@ void test_vloxseg4ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m2_m( @@ -871,7 +871,7 @@ void test_vloxseg4ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf4_m( @@ -888,7 +888,7 @@ void test_vloxseg4ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf2_m( @@ -905,7 +905,7 @@ void test_vloxseg4ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m1_m( @@ -922,7 +922,7 @@ void test_vloxseg4ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m2_m( @@ -939,7 +939,7 @@ void test_vloxseg4ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32mf2_m( @@ -956,7 +956,7 @@ void test_vloxseg4ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m1_m( @@ -973,7 +973,7 @@ void test_vloxseg4ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m2_m( @@ -990,7 +990,7 @@ void test_vloxseg4ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m1_m( @@ -1007,7 +1007,7 @@ void test_vloxseg4ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m2_m( @@ -1024,7 +1024,7 @@ void test_vloxseg4ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf8_m( @@ -1041,7 +1041,7 @@ void test_vloxseg4ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf4_m( @@ -1058,7 +1058,7 @@ void test_vloxseg4ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf2_m( @@ -1075,7 +1075,7 @@ void test_vloxseg4ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m1_m( @@ -1092,7 +1092,7 @@ void test_vloxseg4ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m2_m( @@ -1109,7 +1109,7 @@ void test_vloxseg4ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf4_m( @@ -1126,7 +1126,7 @@ void test_vloxseg4ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf2_m( @@ -1143,7 +1143,7 @@ void test_vloxseg4ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m1_m( @@ -1160,7 +1160,7 @@ void test_vloxseg4ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m2_m( @@ -1177,7 +1177,7 @@ void test_vloxseg4ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32mf2_m( @@ -1194,7 +1194,7 @@ void test_vloxseg4ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m1_m( @@ -1211,7 +1211,7 @@ void test_vloxseg4ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m2_m( @@ -1228,7 +1228,7 @@ void test_vloxseg4ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m1_m( @@ -1245,7 +1245,7 @@ void test_vloxseg4ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m2_m( @@ -1262,6 +1262,6 @@ void test_vloxseg4ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei64.c index 72fb0d2dd12a1e97467543da03ba918e3c925095..3d76dee2b96fcb5f25ecfbb7479ff09132b7f9c4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei64.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf2( @@ -38,7 +38,7 @@ void test_vloxseg4ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m1( @@ -55,7 +55,7 @@ void test_vloxseg4ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m2( @@ -72,7 +72,7 @@ void test_vloxseg4ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32mf2( @@ -89,7 +89,7 @@ void test_vloxseg4ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m1( @@ -106,7 +106,7 @@ void test_vloxseg4ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m2( @@ -123,7 +123,7 @@ void test_vloxseg4ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m1( @@ -140,7 +140,7 @@ void test_vloxseg4ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m2( @@ -157,7 +157,7 @@ void test_vloxseg4ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf8( @@ -174,7 +174,7 @@ void test_vloxseg4ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf4( @@ -191,7 +191,7 @@ void test_vloxseg4ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf2( @@ -208,7 +208,7 @@ void test_vloxseg4ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8m1( @@ -225,7 +225,7 @@ void test_vloxseg4ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf4( @@ -242,7 +242,7 @@ void test_vloxseg4ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf2( @@ -259,7 +259,7 @@ void test_vloxseg4ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m1( @@ -276,7 +276,7 @@ void test_vloxseg4ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m2( @@ -293,7 +293,7 @@ void test_vloxseg4ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32mf2( @@ -310,7 +310,7 @@ void test_vloxseg4ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m1( @@ -327,7 +327,7 @@ void test_vloxseg4ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m2( @@ -344,7 +344,7 @@ void test_vloxseg4ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m1( @@ -361,7 +361,7 @@ void test_vloxseg4ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m2( @@ -378,7 +378,7 @@ void test_vloxseg4ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf8( @@ -395,7 +395,7 @@ void test_vloxseg4ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf4( @@ -412,7 +412,7 @@ void test_vloxseg4ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf2( @@ -429,7 +429,7 @@ void test_vloxseg4ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8m1( @@ -446,7 +446,7 @@ void test_vloxseg4ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf4( @@ -463,7 +463,7 @@ void test_vloxseg4ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf2( @@ -480,7 +480,7 @@ void test_vloxseg4ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m1( @@ -497,7 +497,7 @@ void test_vloxseg4ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m2( @@ -514,7 +514,7 @@ void test_vloxseg4ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32mf2( @@ -531,7 +531,7 @@ void test_vloxseg4ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m1( @@ -548,7 +548,7 @@ void test_vloxseg4ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m2( @@ -565,7 +565,7 @@ void test_vloxseg4ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m1( @@ -582,7 +582,7 @@ void test_vloxseg4ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m2( @@ -599,7 +599,7 @@ void test_vloxseg4ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf4_m( @@ -616,7 +616,7 @@ void test_vloxseg4ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf2_m( @@ -633,7 +633,7 @@ void test_vloxseg4ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m1_m( @@ -650,7 +650,7 @@ void test_vloxseg4ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m2_m( @@ -667,7 +667,7 @@ void test_vloxseg4ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32mf2_m( @@ -684,7 +684,7 @@ void test_vloxseg4ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m1_m( @@ -701,7 +701,7 @@ void test_vloxseg4ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m2_m( @@ -718,7 +718,7 @@ void test_vloxseg4ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m1_m( @@ -735,7 +735,7 @@ void test_vloxseg4ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m2_m( @@ -752,7 +752,7 @@ void test_vloxseg4ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf8_m( @@ -769,7 +769,7 @@ void test_vloxseg4ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vloxseg4ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf2_m( @@ -803,7 +803,7 @@ void test_vloxseg4ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8m1_m( @@ -820,7 +820,7 @@ void test_vloxseg4ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf4_m( @@ -837,7 +837,7 @@ void test_vloxseg4ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf2_m( @@ -854,7 +854,7 @@ void test_vloxseg4ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m1_m( @@ -871,7 +871,7 @@ void test_vloxseg4ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m2_m( @@ -888,7 +888,7 @@ void test_vloxseg4ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32mf2_m( @@ -905,7 +905,7 @@ void test_vloxseg4ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m1_m( @@ -922,7 +922,7 @@ void test_vloxseg4ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m2_m( @@ -939,7 +939,7 @@ void test_vloxseg4ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m1_m( @@ -956,7 +956,7 @@ void test_vloxseg4ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m2_m( @@ -973,7 +973,7 @@ void test_vloxseg4ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf8_m( @@ -990,7 +990,7 @@ void test_vloxseg4ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf4_m( @@ -1007,7 +1007,7 @@ void test_vloxseg4ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf2_m( @@ -1024,7 +1024,7 @@ void test_vloxseg4ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8m1_m( @@ -1041,7 +1041,7 @@ void test_vloxseg4ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf4_m( @@ -1058,7 +1058,7 @@ void test_vloxseg4ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf2_m( @@ -1075,7 +1075,7 @@ void test_vloxseg4ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m1_m( @@ -1092,7 +1092,7 @@ void test_vloxseg4ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m2_m( @@ -1109,7 +1109,7 @@ void test_vloxseg4ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32mf2_m( @@ -1126,7 +1126,7 @@ void test_vloxseg4ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m1_m( @@ -1143,7 +1143,7 @@ void test_vloxseg4ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m2_m( @@ -1160,7 +1160,7 @@ void test_vloxseg4ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m1_m( @@ -1177,7 +1177,7 @@ void test_vloxseg4ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m2_m( @@ -1194,6 +1194,6 @@ void test_vloxseg4ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei8.c index bd04606cbdf8b11157cb96ab69a9799b4b92e2d5..8631124c591e6bb03faa6218bb032d424c83bae8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg4ei8.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf2( @@ -38,7 +38,7 @@ void test_vloxseg4ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m1( @@ -55,7 +55,7 @@ void test_vloxseg4ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m2( @@ -72,7 +72,7 @@ void test_vloxseg4ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32mf2( @@ -89,7 +89,7 @@ void test_vloxseg4ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m1( @@ -106,7 +106,7 @@ void test_vloxseg4ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m2( @@ -123,7 +123,7 @@ void test_vloxseg4ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m1( @@ -140,7 +140,7 @@ void test_vloxseg4ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m2( @@ -157,7 +157,7 @@ void test_vloxseg4ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf8( @@ -174,7 +174,7 @@ void test_vloxseg4ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf4( @@ -191,7 +191,7 @@ void test_vloxseg4ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf2( @@ -208,7 +208,7 @@ void test_vloxseg4ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m1( @@ -225,7 +225,7 @@ void test_vloxseg4ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m2( @@ -242,7 +242,7 @@ void test_vloxseg4ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf4( @@ -259,7 +259,7 @@ void test_vloxseg4ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf2( @@ -276,7 +276,7 @@ void test_vloxseg4ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m1( @@ -293,7 +293,7 @@ void test_vloxseg4ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m2( @@ -310,7 +310,7 @@ void test_vloxseg4ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32mf2( @@ -327,7 +327,7 @@ void test_vloxseg4ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m1( @@ -344,7 +344,7 @@ void test_vloxseg4ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m2( @@ -361,7 +361,7 @@ void test_vloxseg4ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m1( @@ -378,7 +378,7 @@ void test_vloxseg4ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m2( @@ -395,7 +395,7 @@ void test_vloxseg4ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf8( @@ -412,7 +412,7 @@ void test_vloxseg4ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf4( @@ -429,7 +429,7 @@ void test_vloxseg4ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf2( @@ -446,7 +446,7 @@ void test_vloxseg4ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m1( @@ -463,7 +463,7 @@ void test_vloxseg4ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m2( @@ -480,7 +480,7 @@ void test_vloxseg4ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf4( @@ -497,7 +497,7 @@ void test_vloxseg4ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf2( @@ -514,7 +514,7 @@ void test_vloxseg4ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m1( @@ -531,7 +531,7 @@ void test_vloxseg4ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m2( @@ -548,7 +548,7 @@ void test_vloxseg4ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32mf2( @@ -565,7 +565,7 @@ void test_vloxseg4ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m1( @@ -582,7 +582,7 @@ void test_vloxseg4ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m2( @@ -599,7 +599,7 @@ void test_vloxseg4ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m1( @@ -616,7 +616,7 @@ void test_vloxseg4ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m2( @@ -633,7 +633,7 @@ void test_vloxseg4ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf4_m( @@ -650,7 +650,7 @@ void test_vloxseg4ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf2_m( @@ -667,7 +667,7 @@ void test_vloxseg4ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m1_m( @@ -684,7 +684,7 @@ void test_vloxseg4ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m2_m( @@ -701,7 +701,7 @@ void test_vloxseg4ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32mf2_m( @@ -718,7 +718,7 @@ void test_vloxseg4ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m1_m( @@ -735,7 +735,7 @@ void test_vloxseg4ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m2_m( @@ -752,7 +752,7 @@ void test_vloxseg4ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m1_m( @@ -769,7 +769,7 @@ void test_vloxseg4ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m2_m( @@ -786,7 +786,7 @@ void test_vloxseg4ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf8_m( @@ -803,7 +803,7 @@ void test_vloxseg4ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf4_m( @@ -820,7 +820,7 @@ void test_vloxseg4ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf2_m( @@ -837,7 +837,7 @@ void test_vloxseg4ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m1_m( @@ -854,7 +854,7 @@ void test_vloxseg4ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m2_m( @@ -871,7 +871,7 @@ void test_vloxseg4ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf4_m( @@ -888,7 +888,7 @@ void test_vloxseg4ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf2_m( @@ -905,7 +905,7 @@ void test_vloxseg4ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m1_m( @@ -922,7 +922,7 @@ void test_vloxseg4ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m2_m( @@ -939,7 +939,7 @@ void test_vloxseg4ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32mf2_m( @@ -956,7 +956,7 @@ void test_vloxseg4ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m1_m( @@ -973,7 +973,7 @@ void test_vloxseg4ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m2_m( @@ -990,7 +990,7 @@ void test_vloxseg4ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m1_m( @@ -1007,7 +1007,7 @@ void test_vloxseg4ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m2_m( @@ -1024,7 +1024,7 @@ void test_vloxseg4ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf8_m( @@ -1041,7 +1041,7 @@ void test_vloxseg4ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf4_m( @@ -1058,7 +1058,7 @@ void test_vloxseg4ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf2_m( @@ -1075,7 +1075,7 @@ void test_vloxseg4ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m1_m( @@ -1092,7 +1092,7 @@ void test_vloxseg4ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m2_m( @@ -1109,7 +1109,7 @@ void test_vloxseg4ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf4_m( @@ -1126,7 +1126,7 @@ void test_vloxseg4ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf2_m( @@ -1143,7 +1143,7 @@ void test_vloxseg4ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m1_m( @@ -1160,7 +1160,7 @@ void test_vloxseg4ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m2_m( @@ -1177,7 +1177,7 @@ void test_vloxseg4ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32mf2_m( @@ -1194,7 +1194,7 @@ void test_vloxseg4ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m1_m( @@ -1211,7 +1211,7 @@ void test_vloxseg4ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m2_m( @@ -1228,7 +1228,7 @@ void test_vloxseg4ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m1_m( @@ -1245,7 +1245,7 @@ void test_vloxseg4ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m2_m( @@ -1262,6 +1262,6 @@ void test_vloxseg4ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei16.c index 9f6cee14aaae97b15573170f4342ea62cbc8f1ee..04c3df1626b382f912dce41e4acd9b1bf0bbc401 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei16.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf2( @@ -42,7 +42,7 @@ void test_vloxseg5ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16m1( @@ -61,7 +61,7 @@ void test_vloxseg5ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32mf2( @@ -80,7 +80,7 @@ void test_vloxseg5ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32m1( @@ -99,7 +99,7 @@ void test_vloxseg5ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f64m1( @@ -118,7 +118,7 @@ void test_vloxseg5ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf8( @@ -137,7 +137,7 @@ void test_vloxseg5ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf4( @@ -156,7 +156,7 @@ void test_vloxseg5ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf2( @@ -175,7 +175,7 @@ void test_vloxseg5ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8m1( @@ -194,7 +194,7 @@ void test_vloxseg5ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf4( @@ -213,7 +213,7 @@ void test_vloxseg5ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf2( @@ -232,7 +232,7 @@ void test_vloxseg5ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16m1( @@ -251,7 +251,7 @@ void test_vloxseg5ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32mf2( @@ -270,7 +270,7 @@ void test_vloxseg5ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32m1( @@ -289,7 +289,7 @@ void test_vloxseg5ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i64m1( @@ -308,7 +308,7 @@ void test_vloxseg5ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf8( @@ -327,7 +327,7 @@ void test_vloxseg5ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf4( @@ -346,7 +346,7 @@ void test_vloxseg5ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf2( @@ -365,7 +365,7 @@ void test_vloxseg5ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8m1( @@ -384,7 +384,7 @@ void test_vloxseg5ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf4( @@ -403,7 +403,7 @@ void test_vloxseg5ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf2( @@ -422,7 +422,7 @@ void test_vloxseg5ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16m1( @@ -441,7 +441,7 @@ void test_vloxseg5ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32mf2( @@ -460,7 +460,7 @@ void test_vloxseg5ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32m1( @@ -479,7 +479,7 @@ void test_vloxseg5ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u64m1( @@ -498,7 +498,7 @@ void test_vloxseg5ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf4_m( @@ -517,7 +517,7 @@ void test_vloxseg5ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf2_m( @@ -536,7 +536,7 @@ void test_vloxseg5ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16m1_m( @@ -555,7 +555,7 @@ void test_vloxseg5ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32mf2_m( @@ -574,7 +574,7 @@ void test_vloxseg5ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32m1_m( @@ -593,7 +593,7 @@ void test_vloxseg5ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f64m1_m( @@ -612,7 +612,7 @@ void test_vloxseg5ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf8_m( @@ -631,7 +631,7 @@ void test_vloxseg5ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf4_m( @@ -650,7 +650,7 @@ void test_vloxseg5ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf2_m( @@ -669,7 +669,7 @@ void test_vloxseg5ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vloxseg5ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf4_m( @@ -707,7 +707,7 @@ void test_vloxseg5ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf2_m( @@ -726,7 +726,7 @@ void test_vloxseg5ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16m1_m( @@ -745,7 +745,7 @@ void test_vloxseg5ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32mf2_m( @@ -764,7 +764,7 @@ void test_vloxseg5ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32m1_m( @@ -783,7 +783,7 @@ void test_vloxseg5ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i64m1_m( @@ -802,7 +802,7 @@ void test_vloxseg5ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf8_m( @@ -821,7 +821,7 @@ void test_vloxseg5ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf4_m( @@ -840,7 +840,7 @@ void test_vloxseg5ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf2_m( @@ -859,7 +859,7 @@ void test_vloxseg5ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8m1_m( @@ -878,7 +878,7 @@ void test_vloxseg5ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf4_m( @@ -897,7 +897,7 @@ void test_vloxseg5ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf2_m( @@ -916,7 +916,7 @@ void test_vloxseg5ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16m1_m( @@ -935,7 +935,7 @@ void test_vloxseg5ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32mf2_m( @@ -954,7 +954,7 @@ void test_vloxseg5ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32m1_m( @@ -973,7 +973,7 @@ void test_vloxseg5ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u64m1_m( @@ -992,6 +992,6 @@ void test_vloxseg5ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei32.c index 560f2fa9c2185cc57f87bd5143b593d0aa07015f..44fe7361db71784625d5eee002da8d1d3e6dc226 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei32.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf2( @@ -42,7 +42,7 @@ void test_vloxseg5ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16m1( @@ -61,7 +61,7 @@ void test_vloxseg5ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32mf2( @@ -80,7 +80,7 @@ void test_vloxseg5ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32m1( @@ -99,7 +99,7 @@ void test_vloxseg5ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f64m1( @@ -118,7 +118,7 @@ void test_vloxseg5ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf8( @@ -137,7 +137,7 @@ void test_vloxseg5ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf4( @@ -156,7 +156,7 @@ void test_vloxseg5ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf2( @@ -175,7 +175,7 @@ void test_vloxseg5ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8m1( @@ -194,7 +194,7 @@ void test_vloxseg5ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf4( @@ -213,7 +213,7 @@ void test_vloxseg5ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf2( @@ -232,7 +232,7 @@ void test_vloxseg5ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16m1( @@ -251,7 +251,7 @@ void test_vloxseg5ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32mf2( @@ -270,7 +270,7 @@ void test_vloxseg5ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32m1( @@ -289,7 +289,7 @@ void test_vloxseg5ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i64m1( @@ -308,7 +308,7 @@ void test_vloxseg5ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf8( @@ -327,7 +327,7 @@ void test_vloxseg5ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf4( @@ -346,7 +346,7 @@ void test_vloxseg5ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf2( @@ -365,7 +365,7 @@ void test_vloxseg5ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8m1( @@ -384,7 +384,7 @@ void test_vloxseg5ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf4( @@ -403,7 +403,7 @@ void test_vloxseg5ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf2( @@ -422,7 +422,7 @@ void test_vloxseg5ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16m1( @@ -441,7 +441,7 @@ void test_vloxseg5ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32mf2( @@ -460,7 +460,7 @@ void test_vloxseg5ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32m1( @@ -479,7 +479,7 @@ void test_vloxseg5ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u64m1( @@ -498,7 +498,7 @@ void test_vloxseg5ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf4_m( @@ -517,7 +517,7 @@ void test_vloxseg5ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf2_m( @@ -536,7 +536,7 @@ void test_vloxseg5ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16m1_m( @@ -555,7 +555,7 @@ void test_vloxseg5ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32mf2_m( @@ -574,7 +574,7 @@ void test_vloxseg5ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32m1_m( @@ -593,7 +593,7 @@ void test_vloxseg5ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f64m1_m( @@ -612,7 +612,7 @@ void test_vloxseg5ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf8_m( @@ -631,7 +631,7 @@ void test_vloxseg5ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf4_m( @@ -650,7 +650,7 @@ void test_vloxseg5ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf2_m( @@ -669,7 +669,7 @@ void test_vloxseg5ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vloxseg5ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf4_m( @@ -707,7 +707,7 @@ void test_vloxseg5ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf2_m( @@ -726,7 +726,7 @@ void test_vloxseg5ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16m1_m( @@ -745,7 +745,7 @@ void test_vloxseg5ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32mf2_m( @@ -764,7 +764,7 @@ void test_vloxseg5ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32m1_m( @@ -783,7 +783,7 @@ void test_vloxseg5ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i64m1_m( @@ -802,7 +802,7 @@ void test_vloxseg5ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf8_m( @@ -821,7 +821,7 @@ void test_vloxseg5ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf4_m( @@ -840,7 +840,7 @@ void test_vloxseg5ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf2_m( @@ -859,7 +859,7 @@ void test_vloxseg5ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8m1_m( @@ -878,7 +878,7 @@ void test_vloxseg5ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf4_m( @@ -897,7 +897,7 @@ void test_vloxseg5ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf2_m( @@ -916,7 +916,7 @@ void test_vloxseg5ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16m1_m( @@ -935,7 +935,7 @@ void test_vloxseg5ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32mf2_m( @@ -954,7 +954,7 @@ void test_vloxseg5ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32m1_m( @@ -973,7 +973,7 @@ void test_vloxseg5ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u64m1_m( @@ -992,6 +992,6 @@ void test_vloxseg5ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei64.c index cfbf306e604a915b97266dfb15e0add84b67a333..456306e69caa81f6a4f88b5315ab0377175c083b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei64.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf2( @@ -42,7 +42,7 @@ void test_vloxseg5ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16m1( @@ -61,7 +61,7 @@ void test_vloxseg5ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32mf2( @@ -80,7 +80,7 @@ void test_vloxseg5ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32m1( @@ -99,7 +99,7 @@ void test_vloxseg5ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f64m1( @@ -118,7 +118,7 @@ void test_vloxseg5ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf8( @@ -137,7 +137,7 @@ void test_vloxseg5ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf4( @@ -156,7 +156,7 @@ void test_vloxseg5ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf2( @@ -175,7 +175,7 @@ void test_vloxseg5ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8m1( @@ -194,7 +194,7 @@ void test_vloxseg5ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf4( @@ -213,7 +213,7 @@ void test_vloxseg5ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf2( @@ -232,7 +232,7 @@ void test_vloxseg5ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16m1( @@ -251,7 +251,7 @@ void test_vloxseg5ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32mf2( @@ -270,7 +270,7 @@ void test_vloxseg5ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32m1( @@ -289,7 +289,7 @@ void test_vloxseg5ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i64m1( @@ -308,7 +308,7 @@ void test_vloxseg5ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf8( @@ -327,7 +327,7 @@ void test_vloxseg5ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf4( @@ -346,7 +346,7 @@ void test_vloxseg5ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf2( @@ -365,7 +365,7 @@ void test_vloxseg5ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8m1( @@ -384,7 +384,7 @@ void test_vloxseg5ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf4( @@ -403,7 +403,7 @@ void test_vloxseg5ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf2( @@ -422,7 +422,7 @@ void test_vloxseg5ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16m1( @@ -441,7 +441,7 @@ void test_vloxseg5ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32mf2( @@ -460,7 +460,7 @@ void test_vloxseg5ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32m1( @@ -479,7 +479,7 @@ void test_vloxseg5ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u64m1( @@ -498,7 +498,7 @@ void test_vloxseg5ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf4_m( @@ -517,7 +517,7 @@ void test_vloxseg5ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf2_m( @@ -536,7 +536,7 @@ void test_vloxseg5ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16m1_m( @@ -555,7 +555,7 @@ void test_vloxseg5ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32mf2_m( @@ -574,7 +574,7 @@ void test_vloxseg5ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32m1_m( @@ -593,7 +593,7 @@ void test_vloxseg5ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f64m1_m( @@ -612,7 +612,7 @@ void test_vloxseg5ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf8_m( @@ -631,7 +631,7 @@ void test_vloxseg5ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf4_m( @@ -650,7 +650,7 @@ void test_vloxseg5ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf2_m( @@ -669,7 +669,7 @@ void test_vloxseg5ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vloxseg5ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf4_m( @@ -707,7 +707,7 @@ void test_vloxseg5ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf2_m( @@ -726,7 +726,7 @@ void test_vloxseg5ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16m1_m( @@ -745,7 +745,7 @@ void test_vloxseg5ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32mf2_m( @@ -764,7 +764,7 @@ void test_vloxseg5ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32m1_m( @@ -783,7 +783,7 @@ void test_vloxseg5ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i64m1_m( @@ -802,7 +802,7 @@ void test_vloxseg5ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf8_m( @@ -821,7 +821,7 @@ void test_vloxseg5ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf4_m( @@ -840,7 +840,7 @@ void test_vloxseg5ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf2_m( @@ -859,7 +859,7 @@ void test_vloxseg5ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8m1_m( @@ -878,7 +878,7 @@ void test_vloxseg5ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf4_m( @@ -897,7 +897,7 @@ void test_vloxseg5ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf2_m( @@ -916,7 +916,7 @@ void test_vloxseg5ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16m1_m( @@ -935,7 +935,7 @@ void test_vloxseg5ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32mf2_m( @@ -954,7 +954,7 @@ void test_vloxseg5ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32m1_m( @@ -973,7 +973,7 @@ void test_vloxseg5ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u64m1_m( @@ -992,6 +992,6 @@ void test_vloxseg5ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei8.c index 9289c5307cd14d70464514f9468f87403ea57dcf..dac9fafbddfd5c4d4aa3dc096f625a5e86104922 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg5ei8.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf2( @@ -42,7 +42,7 @@ void test_vloxseg5ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16m1( @@ -61,7 +61,7 @@ void test_vloxseg5ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32mf2( @@ -80,7 +80,7 @@ void test_vloxseg5ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32m1( @@ -99,7 +99,7 @@ void test_vloxseg5ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f64m1( @@ -118,7 +118,7 @@ void test_vloxseg5ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf8( @@ -137,7 +137,7 @@ void test_vloxseg5ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf4( @@ -156,7 +156,7 @@ void test_vloxseg5ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf2( @@ -175,7 +175,7 @@ void test_vloxseg5ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8m1( @@ -194,7 +194,7 @@ void test_vloxseg5ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf4( @@ -213,7 +213,7 @@ void test_vloxseg5ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf2( @@ -232,7 +232,7 @@ void test_vloxseg5ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16m1( @@ -251,7 +251,7 @@ void test_vloxseg5ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32mf2( @@ -270,7 +270,7 @@ void test_vloxseg5ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32m1( @@ -289,7 +289,7 @@ void test_vloxseg5ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i64m1( @@ -308,7 +308,7 @@ void test_vloxseg5ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf8( @@ -327,7 +327,7 @@ void test_vloxseg5ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf4( @@ -346,7 +346,7 @@ void test_vloxseg5ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf2( @@ -365,7 +365,7 @@ void test_vloxseg5ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8m1( @@ -384,7 +384,7 @@ void test_vloxseg5ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf4( @@ -403,7 +403,7 @@ void test_vloxseg5ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf2( @@ -422,7 +422,7 @@ void test_vloxseg5ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16m1( @@ -441,7 +441,7 @@ void test_vloxseg5ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32mf2( @@ -460,7 +460,7 @@ void test_vloxseg5ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32m1( @@ -479,7 +479,7 @@ void test_vloxseg5ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u64m1( @@ -498,7 +498,7 @@ void test_vloxseg5ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf4_m( @@ -517,7 +517,7 @@ void test_vloxseg5ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf2_m( @@ -536,7 +536,7 @@ void test_vloxseg5ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16m1_m( @@ -555,7 +555,7 @@ void test_vloxseg5ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32mf2_m( @@ -574,7 +574,7 @@ void test_vloxseg5ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32m1_m( @@ -593,7 +593,7 @@ void test_vloxseg5ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f64m1_m( @@ -612,7 +612,7 @@ void test_vloxseg5ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf8_m( @@ -631,7 +631,7 @@ void test_vloxseg5ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf4_m( @@ -650,7 +650,7 @@ void test_vloxseg5ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf2_m( @@ -669,7 +669,7 @@ void test_vloxseg5ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vloxseg5ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf4_m( @@ -707,7 +707,7 @@ void test_vloxseg5ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf2_m( @@ -726,7 +726,7 @@ void test_vloxseg5ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16m1_m( @@ -745,7 +745,7 @@ void test_vloxseg5ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32mf2_m( @@ -764,7 +764,7 @@ void test_vloxseg5ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32m1_m( @@ -783,7 +783,7 @@ void test_vloxseg5ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i64m1_m( @@ -802,7 +802,7 @@ void test_vloxseg5ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf8_m( @@ -821,7 +821,7 @@ void test_vloxseg5ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf4_m( @@ -840,7 +840,7 @@ void test_vloxseg5ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf2_m( @@ -859,7 +859,7 @@ void test_vloxseg5ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8m1_m( @@ -878,7 +878,7 @@ void test_vloxseg5ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf4_m( @@ -897,7 +897,7 @@ void test_vloxseg5ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf2_m( @@ -916,7 +916,7 @@ void test_vloxseg5ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16m1_m( @@ -935,7 +935,7 @@ void test_vloxseg5ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32mf2_m( @@ -954,7 +954,7 @@ void test_vloxseg5ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32m1_m( @@ -973,7 +973,7 @@ void test_vloxseg5ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u64m1_m( @@ -992,6 +992,6 @@ void test_vloxseg5ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei16.c index 8796c884c3e289993f8e001eacd257869c7e5b2d..cf8c5d0124f1f771b670d94c7b3703a0d093bab8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei16.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf2( @@ -46,7 +46,7 @@ void test_vloxseg6ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16m1( @@ -67,7 +67,7 @@ void test_vloxseg6ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32mf2( @@ -88,7 +88,7 @@ void test_vloxseg6ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32m1( @@ -109,7 +109,7 @@ void test_vloxseg6ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f64m1( @@ -130,7 +130,7 @@ void test_vloxseg6ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf8( @@ -151,7 +151,7 @@ void test_vloxseg6ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf4( @@ -172,7 +172,7 @@ void test_vloxseg6ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf2( @@ -193,7 +193,7 @@ void test_vloxseg6ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8m1( @@ -214,7 +214,7 @@ void test_vloxseg6ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf4( @@ -235,7 +235,7 @@ void test_vloxseg6ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf2( @@ -256,7 +256,7 @@ void test_vloxseg6ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16m1( @@ -277,7 +277,7 @@ void test_vloxseg6ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32mf2( @@ -298,7 +298,7 @@ void test_vloxseg6ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32m1( @@ -319,7 +319,7 @@ void test_vloxseg6ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i64m1( @@ -340,7 +340,7 @@ void test_vloxseg6ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf8( @@ -361,7 +361,7 @@ void test_vloxseg6ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf4( @@ -382,7 +382,7 @@ void test_vloxseg6ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf2( @@ -403,7 +403,7 @@ void test_vloxseg6ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8m1( @@ -424,7 +424,7 @@ void test_vloxseg6ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf4( @@ -445,7 +445,7 @@ void test_vloxseg6ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf2( @@ -466,7 +466,7 @@ void test_vloxseg6ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16m1( @@ -487,7 +487,7 @@ void test_vloxseg6ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32mf2( @@ -508,7 +508,7 @@ void test_vloxseg6ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32m1( @@ -529,7 +529,7 @@ void test_vloxseg6ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u64m1( @@ -550,7 +550,7 @@ void test_vloxseg6ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf4_m( @@ -571,7 +571,7 @@ void test_vloxseg6ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf2_m( @@ -592,7 +592,7 @@ void test_vloxseg6ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16m1_m( @@ -613,7 +613,7 @@ void test_vloxseg6ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vloxseg6ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32m1_m( @@ -655,7 +655,7 @@ void test_vloxseg6ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f64m1_m( @@ -676,7 +676,7 @@ void test_vloxseg6ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf8_m( @@ -697,7 +697,7 @@ void test_vloxseg6ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf4_m( @@ -718,7 +718,7 @@ void test_vloxseg6ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vloxseg6ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8m1_m( @@ -760,7 +760,7 @@ void test_vloxseg6ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf4_m( @@ -781,7 +781,7 @@ void test_vloxseg6ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf2_m( @@ -802,7 +802,7 @@ void test_vloxseg6ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16m1_m( @@ -823,7 +823,7 @@ void test_vloxseg6ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vloxseg6ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32m1_m( @@ -865,7 +865,7 @@ void test_vloxseg6ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i64m1_m( @@ -886,7 +886,7 @@ void test_vloxseg6ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf8_m( @@ -907,7 +907,7 @@ void test_vloxseg6ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf4_m( @@ -928,7 +928,7 @@ void test_vloxseg6ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vloxseg6ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8m1_m( @@ -970,7 +970,7 @@ void test_vloxseg6ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf4_m( @@ -991,7 +991,7 @@ void test_vloxseg6ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf2_m( @@ -1012,7 +1012,7 @@ void test_vloxseg6ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16m1_m( @@ -1033,7 +1033,7 @@ void test_vloxseg6ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vloxseg6ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32m1_m( @@ -1075,7 +1075,7 @@ void test_vloxseg6ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u64m1_m( @@ -1096,6 +1096,6 @@ void test_vloxseg6ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei32.c index df1d7e03e22d098244d3dbaf02e9749ff2597b48..0ad1946a65ea31c49e7fca70a0d9290905e319d6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei32.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf2( @@ -46,7 +46,7 @@ void test_vloxseg6ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16m1( @@ -67,7 +67,7 @@ void test_vloxseg6ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32mf2( @@ -88,7 +88,7 @@ void test_vloxseg6ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32m1( @@ -109,7 +109,7 @@ void test_vloxseg6ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f64m1( @@ -130,7 +130,7 @@ void test_vloxseg6ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf8( @@ -151,7 +151,7 @@ void test_vloxseg6ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf4( @@ -172,7 +172,7 @@ void test_vloxseg6ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf2( @@ -193,7 +193,7 @@ void test_vloxseg6ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8m1( @@ -214,7 +214,7 @@ void test_vloxseg6ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf4( @@ -235,7 +235,7 @@ void test_vloxseg6ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf2( @@ -256,7 +256,7 @@ void test_vloxseg6ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16m1( @@ -277,7 +277,7 @@ void test_vloxseg6ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32mf2( @@ -298,7 +298,7 @@ void test_vloxseg6ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32m1( @@ -319,7 +319,7 @@ void test_vloxseg6ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i64m1( @@ -340,7 +340,7 @@ void test_vloxseg6ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf8( @@ -361,7 +361,7 @@ void test_vloxseg6ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf4( @@ -382,7 +382,7 @@ void test_vloxseg6ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf2( @@ -403,7 +403,7 @@ void test_vloxseg6ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8m1( @@ -424,7 +424,7 @@ void test_vloxseg6ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf4( @@ -445,7 +445,7 @@ void test_vloxseg6ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf2( @@ -466,7 +466,7 @@ void test_vloxseg6ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16m1( @@ -487,7 +487,7 @@ void test_vloxseg6ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32mf2( @@ -508,7 +508,7 @@ void test_vloxseg6ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32m1( @@ -529,7 +529,7 @@ void test_vloxseg6ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u64m1( @@ -550,7 +550,7 @@ void test_vloxseg6ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf4_m( @@ -571,7 +571,7 @@ void test_vloxseg6ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf2_m( @@ -592,7 +592,7 @@ void test_vloxseg6ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16m1_m( @@ -613,7 +613,7 @@ void test_vloxseg6ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vloxseg6ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32m1_m( @@ -655,7 +655,7 @@ void test_vloxseg6ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f64m1_m( @@ -676,7 +676,7 @@ void test_vloxseg6ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf8_m( @@ -697,7 +697,7 @@ void test_vloxseg6ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf4_m( @@ -718,7 +718,7 @@ void test_vloxseg6ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vloxseg6ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8m1_m( @@ -760,7 +760,7 @@ void test_vloxseg6ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf4_m( @@ -781,7 +781,7 @@ void test_vloxseg6ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf2_m( @@ -802,7 +802,7 @@ void test_vloxseg6ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16m1_m( @@ -823,7 +823,7 @@ void test_vloxseg6ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vloxseg6ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32m1_m( @@ -865,7 +865,7 @@ void test_vloxseg6ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i64m1_m( @@ -886,7 +886,7 @@ void test_vloxseg6ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf8_m( @@ -907,7 +907,7 @@ void test_vloxseg6ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf4_m( @@ -928,7 +928,7 @@ void test_vloxseg6ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vloxseg6ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8m1_m( @@ -970,7 +970,7 @@ void test_vloxseg6ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf4_m( @@ -991,7 +991,7 @@ void test_vloxseg6ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf2_m( @@ -1012,7 +1012,7 @@ void test_vloxseg6ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16m1_m( @@ -1033,7 +1033,7 @@ void test_vloxseg6ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vloxseg6ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32m1_m( @@ -1075,7 +1075,7 @@ void test_vloxseg6ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u64m1_m( @@ -1096,6 +1096,6 @@ void test_vloxseg6ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei64.c index d6f384014a3c7f401bfe1d98bc13fd1ad608e528..192d30c44fb934bd24722af0fabc39300027f4a8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei64.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf2( @@ -46,7 +46,7 @@ void test_vloxseg6ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16m1( @@ -67,7 +67,7 @@ void test_vloxseg6ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32mf2( @@ -88,7 +88,7 @@ void test_vloxseg6ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32m1( @@ -109,7 +109,7 @@ void test_vloxseg6ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f64m1( @@ -130,7 +130,7 @@ void test_vloxseg6ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf8( @@ -151,7 +151,7 @@ void test_vloxseg6ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf4( @@ -172,7 +172,7 @@ void test_vloxseg6ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf2( @@ -193,7 +193,7 @@ void test_vloxseg6ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8m1( @@ -214,7 +214,7 @@ void test_vloxseg6ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf4( @@ -235,7 +235,7 @@ void test_vloxseg6ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf2( @@ -256,7 +256,7 @@ void test_vloxseg6ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16m1( @@ -277,7 +277,7 @@ void test_vloxseg6ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32mf2( @@ -298,7 +298,7 @@ void test_vloxseg6ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32m1( @@ -319,7 +319,7 @@ void test_vloxseg6ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i64m1( @@ -340,7 +340,7 @@ void test_vloxseg6ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf8( @@ -361,7 +361,7 @@ void test_vloxseg6ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf4( @@ -382,7 +382,7 @@ void test_vloxseg6ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf2( @@ -403,7 +403,7 @@ void test_vloxseg6ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8m1( @@ -424,7 +424,7 @@ void test_vloxseg6ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf4( @@ -445,7 +445,7 @@ void test_vloxseg6ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf2( @@ -466,7 +466,7 @@ void test_vloxseg6ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16m1( @@ -487,7 +487,7 @@ void test_vloxseg6ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32mf2( @@ -508,7 +508,7 @@ void test_vloxseg6ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32m1( @@ -529,7 +529,7 @@ void test_vloxseg6ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u64m1( @@ -550,7 +550,7 @@ void test_vloxseg6ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf4_m( @@ -571,7 +571,7 @@ void test_vloxseg6ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf2_m( @@ -592,7 +592,7 @@ void test_vloxseg6ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16m1_m( @@ -613,7 +613,7 @@ void test_vloxseg6ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vloxseg6ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32m1_m( @@ -655,7 +655,7 @@ void test_vloxseg6ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f64m1_m( @@ -676,7 +676,7 @@ void test_vloxseg6ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf8_m( @@ -697,7 +697,7 @@ void test_vloxseg6ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf4_m( @@ -718,7 +718,7 @@ void test_vloxseg6ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vloxseg6ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8m1_m( @@ -760,7 +760,7 @@ void test_vloxseg6ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf4_m( @@ -781,7 +781,7 @@ void test_vloxseg6ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf2_m( @@ -802,7 +802,7 @@ void test_vloxseg6ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16m1_m( @@ -823,7 +823,7 @@ void test_vloxseg6ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vloxseg6ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32m1_m( @@ -865,7 +865,7 @@ void test_vloxseg6ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i64m1_m( @@ -886,7 +886,7 @@ void test_vloxseg6ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf8_m( @@ -907,7 +907,7 @@ void test_vloxseg6ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf4_m( @@ -928,7 +928,7 @@ void test_vloxseg6ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vloxseg6ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8m1_m( @@ -970,7 +970,7 @@ void test_vloxseg6ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf4_m( @@ -991,7 +991,7 @@ void test_vloxseg6ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf2_m( @@ -1012,7 +1012,7 @@ void test_vloxseg6ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16m1_m( @@ -1033,7 +1033,7 @@ void test_vloxseg6ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vloxseg6ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32m1_m( @@ -1075,7 +1075,7 @@ void test_vloxseg6ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u64m1_m( @@ -1096,6 +1096,6 @@ void test_vloxseg6ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei8.c index 54fda1dfc846c2ed8cdcc9a98a1e06f9cc34fa82..ae911c83adc07782be70db8f42f60aba32693eb6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg6ei8.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf2( @@ -46,7 +46,7 @@ void test_vloxseg6ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16m1( @@ -67,7 +67,7 @@ void test_vloxseg6ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32mf2( @@ -88,7 +88,7 @@ void test_vloxseg6ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32m1( @@ -109,7 +109,7 @@ void test_vloxseg6ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f64m1( @@ -130,7 +130,7 @@ void test_vloxseg6ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf8( @@ -151,7 +151,7 @@ void test_vloxseg6ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf4( @@ -172,7 +172,7 @@ void test_vloxseg6ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf2( @@ -193,7 +193,7 @@ void test_vloxseg6ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8m1( @@ -214,7 +214,7 @@ void test_vloxseg6ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf4( @@ -235,7 +235,7 @@ void test_vloxseg6ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf2( @@ -256,7 +256,7 @@ void test_vloxseg6ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16m1( @@ -277,7 +277,7 @@ void test_vloxseg6ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32mf2( @@ -298,7 +298,7 @@ void test_vloxseg6ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32m1( @@ -319,7 +319,7 @@ void test_vloxseg6ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i64m1( @@ -340,7 +340,7 @@ void test_vloxseg6ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf8( @@ -361,7 +361,7 @@ void test_vloxseg6ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf4( @@ -382,7 +382,7 @@ void test_vloxseg6ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf2( @@ -403,7 +403,7 @@ void test_vloxseg6ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8m1( @@ -424,7 +424,7 @@ void test_vloxseg6ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf4( @@ -445,7 +445,7 @@ void test_vloxseg6ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf2( @@ -466,7 +466,7 @@ void test_vloxseg6ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16m1( @@ -487,7 +487,7 @@ void test_vloxseg6ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32mf2( @@ -508,7 +508,7 @@ void test_vloxseg6ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32m1( @@ -529,7 +529,7 @@ void test_vloxseg6ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u64m1( @@ -550,7 +550,7 @@ void test_vloxseg6ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf4_m( @@ -571,7 +571,7 @@ void test_vloxseg6ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf2_m( @@ -592,7 +592,7 @@ void test_vloxseg6ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16m1_m( @@ -613,7 +613,7 @@ void test_vloxseg6ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vloxseg6ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32m1_m( @@ -655,7 +655,7 @@ void test_vloxseg6ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f64m1_m( @@ -676,7 +676,7 @@ void test_vloxseg6ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf8_m( @@ -697,7 +697,7 @@ void test_vloxseg6ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf4_m( @@ -718,7 +718,7 @@ void test_vloxseg6ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vloxseg6ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8m1_m( @@ -760,7 +760,7 @@ void test_vloxseg6ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf4_m( @@ -781,7 +781,7 @@ void test_vloxseg6ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf2_m( @@ -802,7 +802,7 @@ void test_vloxseg6ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16m1_m( @@ -823,7 +823,7 @@ void test_vloxseg6ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vloxseg6ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32m1_m( @@ -865,7 +865,7 @@ void test_vloxseg6ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i64m1_m( @@ -886,7 +886,7 @@ void test_vloxseg6ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf8_m( @@ -907,7 +907,7 @@ void test_vloxseg6ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf4_m( @@ -928,7 +928,7 @@ void test_vloxseg6ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vloxseg6ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8m1_m( @@ -970,7 +970,7 @@ void test_vloxseg6ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf4_m( @@ -991,7 +991,7 @@ void test_vloxseg6ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf2_m( @@ -1012,7 +1012,7 @@ void test_vloxseg6ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16m1_m( @@ -1033,7 +1033,7 @@ void test_vloxseg6ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vloxseg6ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32m1_m( @@ -1075,7 +1075,7 @@ void test_vloxseg6ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u64m1_m( @@ -1096,6 +1096,6 @@ void test_vloxseg6ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei16.c index 5c57f94a7313b58d4e5e08f567ec031049c69c6d..8e30aaf72c8ed4d6d90b10f4dd3ea52dc4dbfdba 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei16.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf2( @@ -50,7 +50,7 @@ void test_vloxseg7ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16m1( @@ -73,7 +73,7 @@ void test_vloxseg7ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32mf2( @@ -96,7 +96,7 @@ void test_vloxseg7ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32m1( @@ -119,7 +119,7 @@ void test_vloxseg7ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f64m1( @@ -142,7 +142,7 @@ void test_vloxseg7ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf8( @@ -165,7 +165,7 @@ void test_vloxseg7ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf4( @@ -188,7 +188,7 @@ void test_vloxseg7ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf2( @@ -211,7 +211,7 @@ void test_vloxseg7ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8m1( @@ -234,7 +234,7 @@ void test_vloxseg7ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf4( @@ -257,7 +257,7 @@ void test_vloxseg7ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf2( @@ -280,7 +280,7 @@ void test_vloxseg7ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16m1( @@ -303,7 +303,7 @@ void test_vloxseg7ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32mf2( @@ -326,7 +326,7 @@ void test_vloxseg7ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32m1( @@ -349,7 +349,7 @@ void test_vloxseg7ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i64m1( @@ -372,7 +372,7 @@ void test_vloxseg7ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf8( @@ -395,7 +395,7 @@ void test_vloxseg7ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf4( @@ -418,7 +418,7 @@ void test_vloxseg7ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf2( @@ -441,7 +441,7 @@ void test_vloxseg7ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8m1( @@ -464,7 +464,7 @@ void test_vloxseg7ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf4( @@ -487,7 +487,7 @@ void test_vloxseg7ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf2( @@ -510,7 +510,7 @@ void test_vloxseg7ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16m1( @@ -533,7 +533,7 @@ void test_vloxseg7ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32mf2( @@ -556,7 +556,7 @@ void test_vloxseg7ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32m1( @@ -579,7 +579,7 @@ void test_vloxseg7ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u64m1( @@ -602,7 +602,7 @@ void test_vloxseg7ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf4_m( @@ -625,7 +625,7 @@ void test_vloxseg7ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf2_m( @@ -648,7 +648,7 @@ void test_vloxseg7ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16m1_m( @@ -671,7 +671,7 @@ void test_vloxseg7ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32mf2_m( @@ -694,7 +694,7 @@ void test_vloxseg7ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32m1_m( @@ -717,7 +717,7 @@ void test_vloxseg7ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f64m1_m( @@ -740,7 +740,7 @@ void test_vloxseg7ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf8_m( @@ -763,7 +763,7 @@ void test_vloxseg7ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vloxseg7ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf2_m( @@ -809,7 +809,7 @@ void test_vloxseg7ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8m1_m( @@ -832,7 +832,7 @@ void test_vloxseg7ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf4_m( @@ -855,7 +855,7 @@ void test_vloxseg7ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf2_m( @@ -878,7 +878,7 @@ void test_vloxseg7ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vloxseg7ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32mf2_m( @@ -924,7 +924,7 @@ void test_vloxseg7ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32m1_m( @@ -947,7 +947,7 @@ void test_vloxseg7ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i64m1_m( @@ -970,7 +970,7 @@ void test_vloxseg7ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf8_m( @@ -993,7 +993,7 @@ void test_vloxseg7ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf4_m( @@ -1016,7 +1016,7 @@ void test_vloxseg7ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf2_m( @@ -1039,7 +1039,7 @@ void test_vloxseg7ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8m1_m( @@ -1062,7 +1062,7 @@ void test_vloxseg7ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf4_m( @@ -1085,7 +1085,7 @@ void test_vloxseg7ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf2_m( @@ -1108,7 +1108,7 @@ void test_vloxseg7ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16m1_m( @@ -1131,7 +1131,7 @@ void test_vloxseg7ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32mf2_m( @@ -1154,7 +1154,7 @@ void test_vloxseg7ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32m1_m( @@ -1177,7 +1177,7 @@ void test_vloxseg7ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u64m1_m( @@ -1200,6 +1200,6 @@ void test_vloxseg7ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei32.c index 3ae1a35ef9c2d1c376034f6b32512c6ee291c6c7..6b6330a6145362fc03c9eba0408f11beff75de85 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei32.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf2( @@ -50,7 +50,7 @@ void test_vloxseg7ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16m1( @@ -73,7 +73,7 @@ void test_vloxseg7ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32mf2( @@ -96,7 +96,7 @@ void test_vloxseg7ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32m1( @@ -119,7 +119,7 @@ void test_vloxseg7ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f64m1( @@ -142,7 +142,7 @@ void test_vloxseg7ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf8( @@ -165,7 +165,7 @@ void test_vloxseg7ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf4( @@ -188,7 +188,7 @@ void test_vloxseg7ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf2( @@ -211,7 +211,7 @@ void test_vloxseg7ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8m1( @@ -234,7 +234,7 @@ void test_vloxseg7ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf4( @@ -257,7 +257,7 @@ void test_vloxseg7ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf2( @@ -280,7 +280,7 @@ void test_vloxseg7ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16m1( @@ -303,7 +303,7 @@ void test_vloxseg7ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32mf2( @@ -326,7 +326,7 @@ void test_vloxseg7ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32m1( @@ -349,7 +349,7 @@ void test_vloxseg7ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i64m1( @@ -372,7 +372,7 @@ void test_vloxseg7ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf8( @@ -395,7 +395,7 @@ void test_vloxseg7ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf4( @@ -418,7 +418,7 @@ void test_vloxseg7ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf2( @@ -441,7 +441,7 @@ void test_vloxseg7ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8m1( @@ -464,7 +464,7 @@ void test_vloxseg7ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf4( @@ -487,7 +487,7 @@ void test_vloxseg7ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf2( @@ -510,7 +510,7 @@ void test_vloxseg7ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16m1( @@ -533,7 +533,7 @@ void test_vloxseg7ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32mf2( @@ -556,7 +556,7 @@ void test_vloxseg7ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32m1( @@ -579,7 +579,7 @@ void test_vloxseg7ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u64m1( @@ -602,7 +602,7 @@ void test_vloxseg7ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf4_m( @@ -625,7 +625,7 @@ void test_vloxseg7ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf2_m( @@ -648,7 +648,7 @@ void test_vloxseg7ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16m1_m( @@ -671,7 +671,7 @@ void test_vloxseg7ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32mf2_m( @@ -694,7 +694,7 @@ void test_vloxseg7ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32m1_m( @@ -717,7 +717,7 @@ void test_vloxseg7ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f64m1_m( @@ -740,7 +740,7 @@ void test_vloxseg7ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf8_m( @@ -763,7 +763,7 @@ void test_vloxseg7ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vloxseg7ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf2_m( @@ -809,7 +809,7 @@ void test_vloxseg7ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8m1_m( @@ -832,7 +832,7 @@ void test_vloxseg7ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf4_m( @@ -855,7 +855,7 @@ void test_vloxseg7ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf2_m( @@ -878,7 +878,7 @@ void test_vloxseg7ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vloxseg7ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32mf2_m( @@ -924,7 +924,7 @@ void test_vloxseg7ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32m1_m( @@ -947,7 +947,7 @@ void test_vloxseg7ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i64m1_m( @@ -970,7 +970,7 @@ void test_vloxseg7ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf8_m( @@ -993,7 +993,7 @@ void test_vloxseg7ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf4_m( @@ -1016,7 +1016,7 @@ void test_vloxseg7ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf2_m( @@ -1039,7 +1039,7 @@ void test_vloxseg7ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8m1_m( @@ -1062,7 +1062,7 @@ void test_vloxseg7ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf4_m( @@ -1085,7 +1085,7 @@ void test_vloxseg7ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf2_m( @@ -1108,7 +1108,7 @@ void test_vloxseg7ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16m1_m( @@ -1131,7 +1131,7 @@ void test_vloxseg7ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32mf2_m( @@ -1154,7 +1154,7 @@ void test_vloxseg7ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32m1_m( @@ -1177,7 +1177,7 @@ void test_vloxseg7ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u64m1_m( @@ -1200,6 +1200,6 @@ void test_vloxseg7ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei64.c index 169d44a69ae2cb42b9aa6340f7c56889e48eadf4..4ec43c667fe86b4b2425346237beac5a6537accc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei64.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf2( @@ -50,7 +50,7 @@ void test_vloxseg7ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16m1( @@ -73,7 +73,7 @@ void test_vloxseg7ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32mf2( @@ -96,7 +96,7 @@ void test_vloxseg7ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32m1( @@ -119,7 +119,7 @@ void test_vloxseg7ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f64m1( @@ -142,7 +142,7 @@ void test_vloxseg7ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf8( @@ -165,7 +165,7 @@ void test_vloxseg7ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf4( @@ -188,7 +188,7 @@ void test_vloxseg7ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf2( @@ -211,7 +211,7 @@ void test_vloxseg7ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8m1( @@ -234,7 +234,7 @@ void test_vloxseg7ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf4( @@ -257,7 +257,7 @@ void test_vloxseg7ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf2( @@ -280,7 +280,7 @@ void test_vloxseg7ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16m1( @@ -303,7 +303,7 @@ void test_vloxseg7ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32mf2( @@ -326,7 +326,7 @@ void test_vloxseg7ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32m1( @@ -349,7 +349,7 @@ void test_vloxseg7ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i64m1( @@ -372,7 +372,7 @@ void test_vloxseg7ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf8( @@ -395,7 +395,7 @@ void test_vloxseg7ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf4( @@ -418,7 +418,7 @@ void test_vloxseg7ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf2( @@ -441,7 +441,7 @@ void test_vloxseg7ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8m1( @@ -464,7 +464,7 @@ void test_vloxseg7ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf4( @@ -487,7 +487,7 @@ void test_vloxseg7ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf2( @@ -510,7 +510,7 @@ void test_vloxseg7ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16m1( @@ -533,7 +533,7 @@ void test_vloxseg7ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32mf2( @@ -556,7 +556,7 @@ void test_vloxseg7ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32m1( @@ -579,7 +579,7 @@ void test_vloxseg7ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u64m1( @@ -602,7 +602,7 @@ void test_vloxseg7ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf4_m( @@ -625,7 +625,7 @@ void test_vloxseg7ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf2_m( @@ -648,7 +648,7 @@ void test_vloxseg7ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16m1_m( @@ -671,7 +671,7 @@ void test_vloxseg7ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32mf2_m( @@ -694,7 +694,7 @@ void test_vloxseg7ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32m1_m( @@ -717,7 +717,7 @@ void test_vloxseg7ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f64m1_m( @@ -740,7 +740,7 @@ void test_vloxseg7ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf8_m( @@ -763,7 +763,7 @@ void test_vloxseg7ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vloxseg7ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf2_m( @@ -809,7 +809,7 @@ void test_vloxseg7ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8m1_m( @@ -832,7 +832,7 @@ void test_vloxseg7ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf4_m( @@ -855,7 +855,7 @@ void test_vloxseg7ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf2_m( @@ -878,7 +878,7 @@ void test_vloxseg7ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vloxseg7ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32mf2_m( @@ -924,7 +924,7 @@ void test_vloxseg7ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32m1_m( @@ -947,7 +947,7 @@ void test_vloxseg7ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i64m1_m( @@ -970,7 +970,7 @@ void test_vloxseg7ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf8_m( @@ -993,7 +993,7 @@ void test_vloxseg7ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf4_m( @@ -1016,7 +1016,7 @@ void test_vloxseg7ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf2_m( @@ -1039,7 +1039,7 @@ void test_vloxseg7ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8m1_m( @@ -1062,7 +1062,7 @@ void test_vloxseg7ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf4_m( @@ -1085,7 +1085,7 @@ void test_vloxseg7ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf2_m( @@ -1108,7 +1108,7 @@ void test_vloxseg7ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16m1_m( @@ -1131,7 +1131,7 @@ void test_vloxseg7ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32mf2_m( @@ -1154,7 +1154,7 @@ void test_vloxseg7ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32m1_m( @@ -1177,7 +1177,7 @@ void test_vloxseg7ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u64m1_m( @@ -1200,6 +1200,6 @@ void test_vloxseg7ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei8.c index 0981fb671987a81d5c8e063df3281ffee5ff05c6..28438098eca2141262b3532641683766ac70a590 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg7ei8.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf2( @@ -50,7 +50,7 @@ void test_vloxseg7ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16m1( @@ -73,7 +73,7 @@ void test_vloxseg7ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32mf2( @@ -96,7 +96,7 @@ void test_vloxseg7ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32m1( @@ -119,7 +119,7 @@ void test_vloxseg7ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f64m1( @@ -142,7 +142,7 @@ void test_vloxseg7ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf8( @@ -165,7 +165,7 @@ void test_vloxseg7ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf4( @@ -188,7 +188,7 @@ void test_vloxseg7ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf2( @@ -211,7 +211,7 @@ void test_vloxseg7ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8m1( @@ -234,7 +234,7 @@ void test_vloxseg7ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf4( @@ -257,7 +257,7 @@ void test_vloxseg7ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf2( @@ -280,7 +280,7 @@ void test_vloxseg7ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16m1( @@ -303,7 +303,7 @@ void test_vloxseg7ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32mf2( @@ -326,7 +326,7 @@ void test_vloxseg7ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32m1( @@ -349,7 +349,7 @@ void test_vloxseg7ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i64m1( @@ -372,7 +372,7 @@ void test_vloxseg7ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf8( @@ -395,7 +395,7 @@ void test_vloxseg7ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf4( @@ -418,7 +418,7 @@ void test_vloxseg7ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf2( @@ -441,7 +441,7 @@ void test_vloxseg7ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8m1( @@ -464,7 +464,7 @@ void test_vloxseg7ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf4( @@ -487,7 +487,7 @@ void test_vloxseg7ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf2( @@ -510,7 +510,7 @@ void test_vloxseg7ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16m1( @@ -533,7 +533,7 @@ void test_vloxseg7ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32mf2( @@ -556,7 +556,7 @@ void test_vloxseg7ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32m1( @@ -579,7 +579,7 @@ void test_vloxseg7ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u64m1( @@ -602,7 +602,7 @@ void test_vloxseg7ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf4_m( @@ -625,7 +625,7 @@ void test_vloxseg7ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf2_m( @@ -648,7 +648,7 @@ void test_vloxseg7ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16m1_m( @@ -671,7 +671,7 @@ void test_vloxseg7ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32mf2_m( @@ -694,7 +694,7 @@ void test_vloxseg7ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32m1_m( @@ -717,7 +717,7 @@ void test_vloxseg7ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f64m1_m( @@ -740,7 +740,7 @@ void test_vloxseg7ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf8_m( @@ -763,7 +763,7 @@ void test_vloxseg7ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vloxseg7ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf2_m( @@ -809,7 +809,7 @@ void test_vloxseg7ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8m1_m( @@ -832,7 +832,7 @@ void test_vloxseg7ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf4_m( @@ -855,7 +855,7 @@ void test_vloxseg7ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf2_m( @@ -878,7 +878,7 @@ void test_vloxseg7ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vloxseg7ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32mf2_m( @@ -924,7 +924,7 @@ void test_vloxseg7ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32m1_m( @@ -947,7 +947,7 @@ void test_vloxseg7ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i64m1_m( @@ -970,7 +970,7 @@ void test_vloxseg7ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf8_m( @@ -993,7 +993,7 @@ void test_vloxseg7ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf4_m( @@ -1016,7 +1016,7 @@ void test_vloxseg7ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf2_m( @@ -1039,7 +1039,7 @@ void test_vloxseg7ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8m1_m( @@ -1062,7 +1062,7 @@ void test_vloxseg7ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf4_m( @@ -1085,7 +1085,7 @@ void test_vloxseg7ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf2_m( @@ -1108,7 +1108,7 @@ void test_vloxseg7ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16m1_m( @@ -1131,7 +1131,7 @@ void test_vloxseg7ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32mf2_m( @@ -1154,7 +1154,7 @@ void test_vloxseg7ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32m1_m( @@ -1177,7 +1177,7 @@ void test_vloxseg7ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u64m1_m( @@ -1200,6 +1200,6 @@ void test_vloxseg7ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei16.c index f1d1e6d80d02c2104376b710e57a762bc8271690..78adb7be74852a426b24a0837ccdc0302f0f4fb1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei16.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf2( @@ -54,7 +54,7 @@ void test_vloxseg8ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16m1( @@ -79,7 +79,7 @@ void test_vloxseg8ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32mf2( @@ -104,7 +104,7 @@ void test_vloxseg8ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32m1( @@ -129,7 +129,7 @@ void test_vloxseg8ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f64m1( @@ -154,7 +154,7 @@ void test_vloxseg8ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf8( @@ -179,7 +179,7 @@ void test_vloxseg8ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf4( @@ -204,7 +204,7 @@ void test_vloxseg8ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf2( @@ -229,7 +229,7 @@ void test_vloxseg8ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8m1( @@ -254,7 +254,7 @@ void test_vloxseg8ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf4( @@ -279,7 +279,7 @@ void test_vloxseg8ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf2( @@ -304,7 +304,7 @@ void test_vloxseg8ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16m1( @@ -329,7 +329,7 @@ void test_vloxseg8ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32mf2( @@ -354,7 +354,7 @@ void test_vloxseg8ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32m1( @@ -379,7 +379,7 @@ void test_vloxseg8ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i64m1( @@ -404,7 +404,7 @@ void test_vloxseg8ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf8( @@ -429,7 +429,7 @@ void test_vloxseg8ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf4( @@ -454,7 +454,7 @@ void test_vloxseg8ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf2( @@ -479,7 +479,7 @@ void test_vloxseg8ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8m1( @@ -504,7 +504,7 @@ void test_vloxseg8ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf4( @@ -529,7 +529,7 @@ void test_vloxseg8ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf2( @@ -554,7 +554,7 @@ void test_vloxseg8ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16m1( @@ -579,7 +579,7 @@ void test_vloxseg8ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32mf2( @@ -604,7 +604,7 @@ void test_vloxseg8ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32m1( @@ -629,7 +629,7 @@ void test_vloxseg8ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u64m1( @@ -654,7 +654,7 @@ void test_vloxseg8ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf4_m( @@ -679,7 +679,7 @@ void test_vloxseg8ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf2_m( @@ -704,7 +704,7 @@ void test_vloxseg8ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16m1_m( @@ -729,7 +729,7 @@ void test_vloxseg8ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32mf2_m( @@ -754,7 +754,7 @@ void test_vloxseg8ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32m1_m( @@ -779,7 +779,7 @@ void test_vloxseg8ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f64m1_m( @@ -804,7 +804,7 @@ void test_vloxseg8ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf8_m( @@ -829,7 +829,7 @@ void test_vloxseg8ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf4_m( @@ -854,7 +854,7 @@ void test_vloxseg8ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf2_m( @@ -879,7 +879,7 @@ void test_vloxseg8ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8m1_m( @@ -904,7 +904,7 @@ void test_vloxseg8ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf4_m( @@ -929,7 +929,7 @@ void test_vloxseg8ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf2_m( @@ -954,7 +954,7 @@ void test_vloxseg8ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16m1_m( @@ -979,7 +979,7 @@ void test_vloxseg8ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32mf2_m( @@ -1004,7 +1004,7 @@ void test_vloxseg8ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32m1_m( @@ -1029,7 +1029,7 @@ void test_vloxseg8ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i64m1_m( @@ -1054,7 +1054,7 @@ void test_vloxseg8ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf8_m( @@ -1079,7 +1079,7 @@ void test_vloxseg8ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf4_m( @@ -1104,7 +1104,7 @@ void test_vloxseg8ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf2_m( @@ -1129,7 +1129,7 @@ void test_vloxseg8ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8m1_m( @@ -1154,7 +1154,7 @@ void test_vloxseg8ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf4_m( @@ -1179,7 +1179,7 @@ void test_vloxseg8ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf2_m( @@ -1204,7 +1204,7 @@ void test_vloxseg8ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16m1_m( @@ -1229,7 +1229,7 @@ void test_vloxseg8ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32mf2_m( @@ -1254,7 +1254,7 @@ void test_vloxseg8ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32m1_m( @@ -1279,7 +1279,7 @@ void test_vloxseg8ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u64m1_m( @@ -1304,6 +1304,6 @@ void test_vloxseg8ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei32.c index 82bb2d4aff18f0418da1ae420360988afacc3189..4ff572396f2fe47055f378b79c88dfddb1ee684d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei32.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf2( @@ -54,7 +54,7 @@ void test_vloxseg8ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16m1( @@ -79,7 +79,7 @@ void test_vloxseg8ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32mf2( @@ -104,7 +104,7 @@ void test_vloxseg8ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32m1( @@ -129,7 +129,7 @@ void test_vloxseg8ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f64m1( @@ -154,7 +154,7 @@ void test_vloxseg8ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf8( @@ -179,7 +179,7 @@ void test_vloxseg8ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf4( @@ -204,7 +204,7 @@ void test_vloxseg8ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf2( @@ -229,7 +229,7 @@ void test_vloxseg8ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8m1( @@ -254,7 +254,7 @@ void test_vloxseg8ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf4( @@ -279,7 +279,7 @@ void test_vloxseg8ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf2( @@ -304,7 +304,7 @@ void test_vloxseg8ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16m1( @@ -329,7 +329,7 @@ void test_vloxseg8ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32mf2( @@ -354,7 +354,7 @@ void test_vloxseg8ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32m1( @@ -379,7 +379,7 @@ void test_vloxseg8ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i64m1( @@ -404,7 +404,7 @@ void test_vloxseg8ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf8( @@ -429,7 +429,7 @@ void test_vloxseg8ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf4( @@ -454,7 +454,7 @@ void test_vloxseg8ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf2( @@ -479,7 +479,7 @@ void test_vloxseg8ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8m1( @@ -504,7 +504,7 @@ void test_vloxseg8ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf4( @@ -529,7 +529,7 @@ void test_vloxseg8ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf2( @@ -554,7 +554,7 @@ void test_vloxseg8ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16m1( @@ -579,7 +579,7 @@ void test_vloxseg8ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32mf2( @@ -604,7 +604,7 @@ void test_vloxseg8ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32m1( @@ -629,7 +629,7 @@ void test_vloxseg8ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u64m1( @@ -654,7 +654,7 @@ void test_vloxseg8ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf4_m( @@ -679,7 +679,7 @@ void test_vloxseg8ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf2_m( @@ -704,7 +704,7 @@ void test_vloxseg8ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16m1_m( @@ -729,7 +729,7 @@ void test_vloxseg8ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32mf2_m( @@ -754,7 +754,7 @@ void test_vloxseg8ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32m1_m( @@ -779,7 +779,7 @@ void test_vloxseg8ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f64m1_m( @@ -804,7 +804,7 @@ void test_vloxseg8ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf8_m( @@ -829,7 +829,7 @@ void test_vloxseg8ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf4_m( @@ -854,7 +854,7 @@ void test_vloxseg8ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf2_m( @@ -879,7 +879,7 @@ void test_vloxseg8ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8m1_m( @@ -904,7 +904,7 @@ void test_vloxseg8ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf4_m( @@ -929,7 +929,7 @@ void test_vloxseg8ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf2_m( @@ -954,7 +954,7 @@ void test_vloxseg8ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16m1_m( @@ -979,7 +979,7 @@ void test_vloxseg8ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32mf2_m( @@ -1004,7 +1004,7 @@ void test_vloxseg8ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32m1_m( @@ -1029,7 +1029,7 @@ void test_vloxseg8ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i64m1_m( @@ -1054,7 +1054,7 @@ void test_vloxseg8ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf8_m( @@ -1079,7 +1079,7 @@ void test_vloxseg8ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf4_m( @@ -1104,7 +1104,7 @@ void test_vloxseg8ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf2_m( @@ -1129,7 +1129,7 @@ void test_vloxseg8ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8m1_m( @@ -1154,7 +1154,7 @@ void test_vloxseg8ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf4_m( @@ -1179,7 +1179,7 @@ void test_vloxseg8ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf2_m( @@ -1204,7 +1204,7 @@ void test_vloxseg8ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16m1_m( @@ -1229,7 +1229,7 @@ void test_vloxseg8ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32mf2_m( @@ -1254,7 +1254,7 @@ void test_vloxseg8ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32m1_m( @@ -1279,7 +1279,7 @@ void test_vloxseg8ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u64m1_m( @@ -1304,6 +1304,6 @@ void test_vloxseg8ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei64.c index 8223bf58a311834288b2730b5b6cb42d90b18079..d6174c19b87663a29b116bcaa9bc1a67d271f367 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei64.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf2( @@ -54,7 +54,7 @@ void test_vloxseg8ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16m1( @@ -79,7 +79,7 @@ void test_vloxseg8ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32mf2( @@ -104,7 +104,7 @@ void test_vloxseg8ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32m1( @@ -129,7 +129,7 @@ void test_vloxseg8ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f64m1( @@ -154,7 +154,7 @@ void test_vloxseg8ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf8( @@ -179,7 +179,7 @@ void test_vloxseg8ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf4( @@ -204,7 +204,7 @@ void test_vloxseg8ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf2( @@ -229,7 +229,7 @@ void test_vloxseg8ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8m1( @@ -254,7 +254,7 @@ void test_vloxseg8ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf4( @@ -279,7 +279,7 @@ void test_vloxseg8ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf2( @@ -304,7 +304,7 @@ void test_vloxseg8ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16m1( @@ -329,7 +329,7 @@ void test_vloxseg8ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32mf2( @@ -354,7 +354,7 @@ void test_vloxseg8ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32m1( @@ -379,7 +379,7 @@ void test_vloxseg8ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i64m1( @@ -404,7 +404,7 @@ void test_vloxseg8ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf8( @@ -429,7 +429,7 @@ void test_vloxseg8ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf4( @@ -454,7 +454,7 @@ void test_vloxseg8ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf2( @@ -479,7 +479,7 @@ void test_vloxseg8ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8m1( @@ -504,7 +504,7 @@ void test_vloxseg8ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf4( @@ -529,7 +529,7 @@ void test_vloxseg8ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf2( @@ -554,7 +554,7 @@ void test_vloxseg8ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16m1( @@ -579,7 +579,7 @@ void test_vloxseg8ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32mf2( @@ -604,7 +604,7 @@ void test_vloxseg8ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32m1( @@ -629,7 +629,7 @@ void test_vloxseg8ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u64m1( @@ -654,7 +654,7 @@ void test_vloxseg8ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf4_m( @@ -679,7 +679,7 @@ void test_vloxseg8ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf2_m( @@ -704,7 +704,7 @@ void test_vloxseg8ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16m1_m( @@ -729,7 +729,7 @@ void test_vloxseg8ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32mf2_m( @@ -754,7 +754,7 @@ void test_vloxseg8ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32m1_m( @@ -779,7 +779,7 @@ void test_vloxseg8ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f64m1_m( @@ -804,7 +804,7 @@ void test_vloxseg8ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf8_m( @@ -829,7 +829,7 @@ void test_vloxseg8ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf4_m( @@ -854,7 +854,7 @@ void test_vloxseg8ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf2_m( @@ -879,7 +879,7 @@ void test_vloxseg8ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8m1_m( @@ -904,7 +904,7 @@ void test_vloxseg8ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf4_m( @@ -929,7 +929,7 @@ void test_vloxseg8ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf2_m( @@ -954,7 +954,7 @@ void test_vloxseg8ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16m1_m( @@ -979,7 +979,7 @@ void test_vloxseg8ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32mf2_m( @@ -1004,7 +1004,7 @@ void test_vloxseg8ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32m1_m( @@ -1029,7 +1029,7 @@ void test_vloxseg8ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i64m1_m( @@ -1054,7 +1054,7 @@ void test_vloxseg8ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf8_m( @@ -1079,7 +1079,7 @@ void test_vloxseg8ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf4_m( @@ -1104,7 +1104,7 @@ void test_vloxseg8ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf2_m( @@ -1129,7 +1129,7 @@ void test_vloxseg8ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8m1_m( @@ -1154,7 +1154,7 @@ void test_vloxseg8ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf4_m( @@ -1179,7 +1179,7 @@ void test_vloxseg8ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf2_m( @@ -1204,7 +1204,7 @@ void test_vloxseg8ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16m1_m( @@ -1229,7 +1229,7 @@ void test_vloxseg8ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32mf2_m( @@ -1254,7 +1254,7 @@ void test_vloxseg8ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32m1_m( @@ -1279,7 +1279,7 @@ void test_vloxseg8ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u64m1_m( @@ -1304,6 +1304,6 @@ void test_vloxseg8ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei8.c index 94f22919068cace1ba5b0fee7cb1504a3151fd8b..63d9c63145c2d8069f2850876c9e36df9eaad2af 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vloxseg8ei8.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf2( @@ -54,7 +54,7 @@ void test_vloxseg8ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16m1( @@ -79,7 +79,7 @@ void test_vloxseg8ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32mf2( @@ -104,7 +104,7 @@ void test_vloxseg8ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32m1( @@ -129,7 +129,7 @@ void test_vloxseg8ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f64m1( @@ -154,7 +154,7 @@ void test_vloxseg8ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf8( @@ -179,7 +179,7 @@ void test_vloxseg8ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf4( @@ -204,7 +204,7 @@ void test_vloxseg8ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf2( @@ -229,7 +229,7 @@ void test_vloxseg8ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8m1( @@ -254,7 +254,7 @@ void test_vloxseg8ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf4( @@ -279,7 +279,7 @@ void test_vloxseg8ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf2( @@ -304,7 +304,7 @@ void test_vloxseg8ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16m1( @@ -329,7 +329,7 @@ void test_vloxseg8ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32mf2( @@ -354,7 +354,7 @@ void test_vloxseg8ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32m1( @@ -379,7 +379,7 @@ void test_vloxseg8ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i64m1( @@ -404,7 +404,7 @@ void test_vloxseg8ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf8( @@ -429,7 +429,7 @@ void test_vloxseg8ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf4( @@ -454,7 +454,7 @@ void test_vloxseg8ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf2( @@ -479,7 +479,7 @@ void test_vloxseg8ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8m1( @@ -504,7 +504,7 @@ void test_vloxseg8ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf4( @@ -529,7 +529,7 @@ void test_vloxseg8ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf2( @@ -554,7 +554,7 @@ void test_vloxseg8ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16m1( @@ -579,7 +579,7 @@ void test_vloxseg8ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32mf2( @@ -604,7 +604,7 @@ void test_vloxseg8ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32m1( @@ -629,7 +629,7 @@ void test_vloxseg8ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u64m1( @@ -654,7 +654,7 @@ void test_vloxseg8ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf4_m( @@ -679,7 +679,7 @@ void test_vloxseg8ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf2_m( @@ -704,7 +704,7 @@ void test_vloxseg8ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16m1_m( @@ -729,7 +729,7 @@ void test_vloxseg8ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32mf2_m( @@ -754,7 +754,7 @@ void test_vloxseg8ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32m1_m( @@ -779,7 +779,7 @@ void test_vloxseg8ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f64m1_m( @@ -804,7 +804,7 @@ void test_vloxseg8ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf8_m( @@ -829,7 +829,7 @@ void test_vloxseg8ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf4_m( @@ -854,7 +854,7 @@ void test_vloxseg8ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf2_m( @@ -879,7 +879,7 @@ void test_vloxseg8ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8m1_m( @@ -904,7 +904,7 @@ void test_vloxseg8ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf4_m( @@ -929,7 +929,7 @@ void test_vloxseg8ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf2_m( @@ -954,7 +954,7 @@ void test_vloxseg8ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16m1_m( @@ -979,7 +979,7 @@ void test_vloxseg8ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32mf2_m( @@ -1004,7 +1004,7 @@ void test_vloxseg8ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32m1_m( @@ -1029,7 +1029,7 @@ void test_vloxseg8ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i64m1_m( @@ -1054,7 +1054,7 @@ void test_vloxseg8ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf8_m( @@ -1079,7 +1079,7 @@ void test_vloxseg8ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf4_m( @@ -1104,7 +1104,7 @@ void test_vloxseg8ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf2_m( @@ -1129,7 +1129,7 @@ void test_vloxseg8ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8m1_m( @@ -1154,7 +1154,7 @@ void test_vloxseg8ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf4_m( @@ -1179,7 +1179,7 @@ void test_vloxseg8ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf2_m( @@ -1204,7 +1204,7 @@ void test_vloxseg8ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16m1_m( @@ -1229,7 +1229,7 @@ void test_vloxseg8ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32mf2_m( @@ -1254,7 +1254,7 @@ void test_vloxseg8ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32m1_m( @@ -1279,7 +1279,7 @@ void test_vloxseg8ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u64m1_m( @@ -1304,6 +1304,6 @@ void test_vloxseg8ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse16.c index cbd86fe31c657456516f6680d561ca81c9d78b97..c11d1effcbb3b704585a756a085c955f254b0e89 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlse16_v_f16mf4(const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf4(base, bstride, vl); + return __riscv_vlse16_v_f16mf4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vlse16_v_f16mf4(const _Float16 *base, ptrdiff_t bstride, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlse16_v_f16mf2(const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf2(base, bstride, vl); + return __riscv_vlse16_v_f16mf2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vlse16_v_f16mf2(const _Float16 *base, ptrdiff_t bstride, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlse16_v_f16m1(const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m1(base, bstride, vl); + return __riscv_vlse16_v_f16m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vlse16_v_f16m1(const _Float16 *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlse16_v_f16m2(const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m2(base, bstride, vl); + return __riscv_vlse16_v_f16m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vlse16_v_f16m2(const _Float16 *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlse16_v_f16m4(const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m4(base, bstride, vl); + return __riscv_vlse16_v_f16m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vlse16_v_f16m4(const _Float16 *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlse16_v_f16m8(const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m8(base, bstride, vl); + return __riscv_vlse16_v_f16m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf4( @@ -67,7 +67,7 @@ vfloat16m8_t test_vlse16_v_f16m8(const _Float16 *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlse16_v_i16mf4(const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf4(base, bstride, vl); + return __riscv_vlse16_v_i16mf4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf2( @@ -76,7 +76,7 @@ vint16mf4_t test_vlse16_v_i16mf4(const int16_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlse16_v_i16mf2(const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf2(base, bstride, vl); + return __riscv_vlse16_v_i16mf2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m1( @@ -85,7 +85,7 @@ vint16mf2_t test_vlse16_v_i16mf2(const int16_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlse16_v_i16m1(const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m1(base, bstride, vl); + return __riscv_vlse16_v_i16m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m2( @@ -94,7 +94,7 @@ vint16m1_t test_vlse16_v_i16m1(const int16_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlse16_v_i16m2(const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m2(base, bstride, vl); + return __riscv_vlse16_v_i16m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m4( @@ -103,7 +103,7 @@ vint16m2_t test_vlse16_v_i16m2(const int16_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlse16_v_i16m4(const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m4(base, bstride, vl); + return __riscv_vlse16_v_i16m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m8( @@ -112,7 +112,7 @@ vint16m4_t test_vlse16_v_i16m4(const int16_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlse16_v_i16m8(const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m8(base, bstride, vl); + return __riscv_vlse16_v_i16m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf4( @@ -121,7 +121,7 @@ vint16m8_t test_vlse16_v_i16m8(const int16_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlse16_v_u16mf4(const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf4(base, bstride, vl); + return __riscv_vlse16_v_u16mf4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf2( @@ -130,7 +130,7 @@ vuint16mf4_t test_vlse16_v_u16mf4(const uint16_t *base, ptrdiff_t bstride, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlse16_v_u16mf2(const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf2(base, bstride, vl); + return __riscv_vlse16_v_u16mf2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m1( @@ -139,7 +139,7 @@ vuint16mf2_t test_vlse16_v_u16mf2(const uint16_t *base, ptrdiff_t bstride, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlse16_v_u16m1(const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m1(base, bstride, vl); + return __riscv_vlse16_v_u16m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m2( @@ -148,7 +148,7 @@ vuint16m1_t test_vlse16_v_u16m1(const uint16_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlse16_v_u16m2(const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m2(base, bstride, vl); + return __riscv_vlse16_v_u16m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m4( @@ -157,7 +157,7 @@ vuint16m2_t test_vlse16_v_u16m2(const uint16_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlse16_v_u16m4(const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m4(base, bstride, vl); + return __riscv_vlse16_v_u16m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m8( @@ -166,7 +166,7 @@ vuint16m4_t test_vlse16_v_u16m4(const uint16_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlse16_v_u16m8(const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m8(base, bstride, vl); + return __riscv_vlse16_v_u16m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf4_m( @@ -175,7 +175,7 @@ vuint16m8_t test_vlse16_v_u16m8(const uint16_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlse16_v_f16mf4_m(vbool64_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf4_m(mask, base, bstride, vl); + return __riscv_vlse16_v_f16mf4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf2_m( @@ -184,7 +184,7 @@ vfloat16mf4_t test_vlse16_v_f16mf4_m(vbool64_t mask, const _Float16 *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlse16_v_f16mf2_m(vbool32_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf2_m(mask, base, bstride, vl); + return __riscv_vlse16_v_f16mf2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m1_m( @@ -193,7 +193,7 @@ vfloat16mf2_t test_vlse16_v_f16mf2_m(vbool32_t mask, const _Float16 *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlse16_v_f16m1_m(vbool16_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m1_m(mask, base, bstride, vl); + return __riscv_vlse16_v_f16m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m2_m( @@ -202,7 +202,7 @@ vfloat16m1_t test_vlse16_v_f16m1_m(vbool16_t mask, const _Float16 *base, ptrdiff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlse16_v_f16m2_m(vbool8_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m2_m(mask, base, bstride, vl); + return __riscv_vlse16_v_f16m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m4_m( @@ -211,7 +211,7 @@ vfloat16m2_t test_vlse16_v_f16m2_m(vbool8_t mask, const _Float16 *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlse16_v_f16m4_m(vbool4_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m4_m(mask, base, bstride, vl); + return __riscv_vlse16_v_f16m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m8_m( @@ -220,7 +220,7 @@ vfloat16m4_t test_vlse16_v_f16m4_m(vbool4_t mask, const _Float16 *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlse16_v_f16m8_m(vbool2_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m8_m(mask, base, bstride, vl); + return __riscv_vlse16_v_f16m8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf4_m( @@ -229,7 +229,7 @@ vfloat16m8_t test_vlse16_v_f16m8_m(vbool2_t mask, const _Float16 *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlse16_v_i16mf4_m(vbool64_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf4_m(mask, base, bstride, vl); + return __riscv_vlse16_v_i16mf4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf2_m( @@ -238,7 +238,7 @@ vint16mf4_t test_vlse16_v_i16mf4_m(vbool64_t mask, const int16_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlse16_v_i16mf2_m(vbool32_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf2_m(mask, base, bstride, vl); + return __riscv_vlse16_v_i16mf2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m1_m( @@ -247,7 +247,7 @@ vint16mf2_t test_vlse16_v_i16mf2_m(vbool32_t mask, const int16_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlse16_v_i16m1_m(vbool16_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m1_m(mask, base, bstride, vl); + return __riscv_vlse16_v_i16m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m2_m( @@ -256,7 +256,7 @@ vint16m1_t test_vlse16_v_i16m1_m(vbool16_t mask, const int16_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlse16_v_i16m2_m(vbool8_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m2_m(mask, base, bstride, vl); + return __riscv_vlse16_v_i16m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m4_m( @@ -265,7 +265,7 @@ vint16m2_t test_vlse16_v_i16m2_m(vbool8_t mask, const int16_t *base, ptrdiff_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlse16_v_i16m4_m(vbool4_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m4_m(mask, base, bstride, vl); + return __riscv_vlse16_v_i16m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m8_m( @@ -274,7 +274,7 @@ vint16m4_t test_vlse16_v_i16m4_m(vbool4_t mask, const int16_t *base, ptrdiff_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlse16_v_i16m8_m(vbool2_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m8_m(mask, base, bstride, vl); + return __riscv_vlse16_v_i16m8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf4_m( @@ -283,7 +283,7 @@ vint16m8_t test_vlse16_v_i16m8_m(vbool2_t mask, const int16_t *base, ptrdiff_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlse16_v_u16mf4_m(vbool64_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf4_m(mask, base, bstride, vl); + return __riscv_vlse16_v_u16mf4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf2_m( @@ -292,7 +292,7 @@ vuint16mf4_t test_vlse16_v_u16mf4_m(vbool64_t mask, const uint16_t *base, ptrdif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlse16_v_u16mf2_m(vbool32_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf2_m(mask, base, bstride, vl); + return __riscv_vlse16_v_u16mf2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m1_m( @@ -301,7 +301,7 @@ vuint16mf2_t test_vlse16_v_u16mf2_m(vbool32_t mask, const uint16_t *base, ptrdif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlse16_v_u16m1_m(vbool16_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m1_m(mask, base, bstride, vl); + return __riscv_vlse16_v_u16m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m2_m( @@ -310,7 +310,7 @@ vuint16m1_t test_vlse16_v_u16m1_m(vbool16_t mask, const uint16_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlse16_v_u16m2_m(vbool8_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m2_m(mask, base, bstride, vl); + return __riscv_vlse16_v_u16m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m4_m( @@ -319,7 +319,7 @@ vuint16m2_t test_vlse16_v_u16m2_m(vbool8_t mask, const uint16_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlse16_v_u16m4_m(vbool4_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m4_m(mask, base, bstride, vl); + return __riscv_vlse16_v_u16m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m8_m( @@ -328,6 +328,6 @@ vuint16m4_t test_vlse16_v_u16m4_m(vbool4_t mask, const uint16_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlse16_v_u16m8_m(vbool2_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m8_m(mask, base, bstride, vl); + return __riscv_vlse16_v_u16m8_m(mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse32.c index d1f36d2e11b9ce070ecb5b6ad16daac68ac99eab..3f5b7763754ad9165e46e32ff3cd593f0d5323ee 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlse32_v_f32mf2(const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32mf2(base, bstride, vl); + return __riscv_vlse32_v_f32mf2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m1( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vlse32_v_f32mf2(const float *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlse32_v_f32m1(const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m1(base, bstride, vl); + return __riscv_vlse32_v_f32m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m2( @@ -31,7 +31,7 @@ vfloat32m1_t test_vlse32_v_f32m1(const float *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlse32_v_f32m2(const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m2(base, bstride, vl); + return __riscv_vlse32_v_f32m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m4( @@ -40,7 +40,7 @@ vfloat32m2_t test_vlse32_v_f32m2(const float *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlse32_v_f32m4(const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m4(base, bstride, vl); + return __riscv_vlse32_v_f32m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m8( @@ -49,7 +49,7 @@ vfloat32m4_t test_vlse32_v_f32m4(const float *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlse32_v_f32m8(const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m8(base, bstride, vl); + return __riscv_vlse32_v_f32m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32mf2( @@ -58,7 +58,7 @@ vfloat32m8_t test_vlse32_v_f32m8(const float *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlse32_v_i32mf2(const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32mf2(base, bstride, vl); + return __riscv_vlse32_v_i32mf2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m1( @@ -67,7 +67,7 @@ vint32mf2_t test_vlse32_v_i32mf2(const int32_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlse32_v_i32m1(const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m1(base, bstride, vl); + return __riscv_vlse32_v_i32m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m2( @@ -76,7 +76,7 @@ vint32m1_t test_vlse32_v_i32m1(const int32_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlse32_v_i32m2(const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m2(base, bstride, vl); + return __riscv_vlse32_v_i32m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m4( @@ -85,7 +85,7 @@ vint32m2_t test_vlse32_v_i32m2(const int32_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlse32_v_i32m4(const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m4(base, bstride, vl); + return __riscv_vlse32_v_i32m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m8( @@ -94,7 +94,7 @@ vint32m4_t test_vlse32_v_i32m4(const int32_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlse32_v_i32m8(const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m8(base, bstride, vl); + return __riscv_vlse32_v_i32m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32mf2( @@ -103,7 +103,7 @@ vint32m8_t test_vlse32_v_i32m8(const int32_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlse32_v_u32mf2(const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32mf2(base, bstride, vl); + return __riscv_vlse32_v_u32mf2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m1( @@ -112,7 +112,7 @@ vuint32mf2_t test_vlse32_v_u32mf2(const uint32_t *base, ptrdiff_t bstride, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlse32_v_u32m1(const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m1(base, bstride, vl); + return __riscv_vlse32_v_u32m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m2( @@ -121,7 +121,7 @@ vuint32m1_t test_vlse32_v_u32m1(const uint32_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlse32_v_u32m2(const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m2(base, bstride, vl); + return __riscv_vlse32_v_u32m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m4( @@ -130,7 +130,7 @@ vuint32m2_t test_vlse32_v_u32m2(const uint32_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlse32_v_u32m4(const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m4(base, bstride, vl); + return __riscv_vlse32_v_u32m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m8( @@ -139,7 +139,7 @@ vuint32m4_t test_vlse32_v_u32m4(const uint32_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlse32_v_u32m8(const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m8(base, bstride, vl); + return __riscv_vlse32_v_u32m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32mf2_m( @@ -148,7 +148,7 @@ vuint32m8_t test_vlse32_v_u32m8(const uint32_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlse32_v_f32mf2_m(vbool64_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32mf2_m(mask, base, bstride, vl); + return __riscv_vlse32_v_f32mf2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m1_m( @@ -157,7 +157,7 @@ vfloat32mf2_t test_vlse32_v_f32mf2_m(vbool64_t mask, const float *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlse32_v_f32m1_m(vbool32_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m1_m(mask, base, bstride, vl); + return __riscv_vlse32_v_f32m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m2_m( @@ -166,7 +166,7 @@ vfloat32m1_t test_vlse32_v_f32m1_m(vbool32_t mask, const float *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlse32_v_f32m2_m(vbool16_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m2_m(mask, base, bstride, vl); + return __riscv_vlse32_v_f32m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m4_m( @@ -175,7 +175,7 @@ vfloat32m2_t test_vlse32_v_f32m2_m(vbool16_t mask, const float *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlse32_v_f32m4_m(vbool8_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m4_m(mask, base, bstride, vl); + return __riscv_vlse32_v_f32m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m8_m( @@ -184,7 +184,7 @@ vfloat32m4_t test_vlse32_v_f32m4_m(vbool8_t mask, const float *base, ptrdiff_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlse32_v_f32m8_m(vbool4_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m8_m(mask, base, bstride, vl); + return __riscv_vlse32_v_f32m8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32mf2_m( @@ -193,7 +193,7 @@ vfloat32m8_t test_vlse32_v_f32m8_m(vbool4_t mask, const float *base, ptrdiff_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlse32_v_i32mf2_m(vbool64_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32mf2_m(mask, base, bstride, vl); + return __riscv_vlse32_v_i32mf2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m1_m( @@ -202,7 +202,7 @@ vint32mf2_t test_vlse32_v_i32mf2_m(vbool64_t mask, const int32_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlse32_v_i32m1_m(vbool32_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m1_m(mask, base, bstride, vl); + return __riscv_vlse32_v_i32m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m2_m( @@ -211,7 +211,7 @@ vint32m1_t test_vlse32_v_i32m1_m(vbool32_t mask, const int32_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlse32_v_i32m2_m(vbool16_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m2_m(mask, base, bstride, vl); + return __riscv_vlse32_v_i32m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m4_m( @@ -220,7 +220,7 @@ vint32m2_t test_vlse32_v_i32m2_m(vbool16_t mask, const int32_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlse32_v_i32m4_m(vbool8_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m4_m(mask, base, bstride, vl); + return __riscv_vlse32_v_i32m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m8_m( @@ -229,7 +229,7 @@ vint32m4_t test_vlse32_v_i32m4_m(vbool8_t mask, const int32_t *base, ptrdiff_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlse32_v_i32m8_m(vbool4_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m8_m(mask, base, bstride, vl); + return __riscv_vlse32_v_i32m8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32mf2_m( @@ -238,7 +238,7 @@ vint32m8_t test_vlse32_v_i32m8_m(vbool4_t mask, const int32_t *base, ptrdiff_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlse32_v_u32mf2_m(vbool64_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32mf2_m(mask, base, bstride, vl); + return __riscv_vlse32_v_u32mf2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m1_m( @@ -247,7 +247,7 @@ vuint32mf2_t test_vlse32_v_u32mf2_m(vbool64_t mask, const uint32_t *base, ptrdif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlse32_v_u32m1_m(vbool32_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m1_m(mask, base, bstride, vl); + return __riscv_vlse32_v_u32m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m2_m( @@ -256,7 +256,7 @@ vuint32m1_t test_vlse32_v_u32m1_m(vbool32_t mask, const uint32_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlse32_v_u32m2_m(vbool16_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m2_m(mask, base, bstride, vl); + return __riscv_vlse32_v_u32m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m4_m( @@ -265,7 +265,7 @@ vuint32m2_t test_vlse32_v_u32m2_m(vbool16_t mask, const uint32_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlse32_v_u32m4_m(vbool8_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m4_m(mask, base, bstride, vl); + return __riscv_vlse32_v_u32m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m8_m( @@ -274,6 +274,6 @@ vuint32m4_t test_vlse32_v_u32m4_m(vbool8_t mask, const uint32_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlse32_v_u32m8_m(vbool4_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m8_m(mask, base, bstride, vl); + return __riscv_vlse32_v_u32m8_m(mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse64.c index 7cb6a62237722180b87317a0c9ee22215f972481..2ea5a9b65537207af8ced50c86f66b3921589877 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlse64_v_f64m1(const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m1(base, bstride, vl); + return __riscv_vlse64_v_f64m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m2( @@ -22,7 +22,7 @@ vfloat64m1_t test_vlse64_v_f64m1(const double *base, ptrdiff_t bstride, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlse64_v_f64m2(const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m2(base, bstride, vl); + return __riscv_vlse64_v_f64m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m4( @@ -31,7 +31,7 @@ vfloat64m2_t test_vlse64_v_f64m2(const double *base, ptrdiff_t bstride, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlse64_v_f64m4(const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m4(base, bstride, vl); + return __riscv_vlse64_v_f64m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m8( @@ -40,7 +40,7 @@ vfloat64m4_t test_vlse64_v_f64m4(const double *base, ptrdiff_t bstride, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlse64_v_f64m8(const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m8(base, bstride, vl); + return __riscv_vlse64_v_f64m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m1( @@ -49,7 +49,7 @@ vfloat64m8_t test_vlse64_v_f64m8(const double *base, ptrdiff_t bstride, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlse64_v_i64m1(const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m1(base, bstride, vl); + return __riscv_vlse64_v_i64m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m2( @@ -58,7 +58,7 @@ vint64m1_t test_vlse64_v_i64m1(const int64_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlse64_v_i64m2(const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m2(base, bstride, vl); + return __riscv_vlse64_v_i64m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m4( @@ -67,7 +67,7 @@ vint64m2_t test_vlse64_v_i64m2(const int64_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlse64_v_i64m4(const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m4(base, bstride, vl); + return __riscv_vlse64_v_i64m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m8( @@ -76,7 +76,7 @@ vint64m4_t test_vlse64_v_i64m4(const int64_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlse64_v_i64m8(const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m8(base, bstride, vl); + return __riscv_vlse64_v_i64m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m1( @@ -85,7 +85,7 @@ vint64m8_t test_vlse64_v_i64m8(const int64_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlse64_v_u64m1(const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m1(base, bstride, vl); + return __riscv_vlse64_v_u64m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m2( @@ -94,7 +94,7 @@ vuint64m1_t test_vlse64_v_u64m1(const uint64_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlse64_v_u64m2(const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m2(base, bstride, vl); + return __riscv_vlse64_v_u64m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m4( @@ -103,7 +103,7 @@ vuint64m2_t test_vlse64_v_u64m2(const uint64_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlse64_v_u64m4(const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m4(base, bstride, vl); + return __riscv_vlse64_v_u64m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m8( @@ -112,7 +112,7 @@ vuint64m4_t test_vlse64_v_u64m4(const uint64_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlse64_v_u64m8(const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m8(base, bstride, vl); + return __riscv_vlse64_v_u64m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m1_m( @@ -121,7 +121,7 @@ vuint64m8_t test_vlse64_v_u64m8(const uint64_t *base, ptrdiff_t bstride, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlse64_v_f64m1_m(vbool64_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m1_m(mask, base, bstride, vl); + return __riscv_vlse64_v_f64m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m2_m( @@ -130,7 +130,7 @@ vfloat64m1_t test_vlse64_v_f64m1_m(vbool64_t mask, const double *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlse64_v_f64m2_m(vbool32_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m2_m(mask, base, bstride, vl); + return __riscv_vlse64_v_f64m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m4_m( @@ -139,7 +139,7 @@ vfloat64m2_t test_vlse64_v_f64m2_m(vbool32_t mask, const double *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlse64_v_f64m4_m(vbool16_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m4_m(mask, base, bstride, vl); + return __riscv_vlse64_v_f64m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m8_m( @@ -148,7 +148,7 @@ vfloat64m4_t test_vlse64_v_f64m4_m(vbool16_t mask, const double *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlse64_v_f64m8_m(vbool8_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m8_m(mask, base, bstride, vl); + return __riscv_vlse64_v_f64m8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m1_m( @@ -157,7 +157,7 @@ vfloat64m8_t test_vlse64_v_f64m8_m(vbool8_t mask, const double *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlse64_v_i64m1_m(vbool64_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m1_m(mask, base, bstride, vl); + return __riscv_vlse64_v_i64m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m2_m( @@ -166,7 +166,7 @@ vint64m1_t test_vlse64_v_i64m1_m(vbool64_t mask, const int64_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlse64_v_i64m2_m(vbool32_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m2_m(mask, base, bstride, vl); + return __riscv_vlse64_v_i64m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m4_m( @@ -175,7 +175,7 @@ vint64m2_t test_vlse64_v_i64m2_m(vbool32_t mask, const int64_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlse64_v_i64m4_m(vbool16_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m4_m(mask, base, bstride, vl); + return __riscv_vlse64_v_i64m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m8_m( @@ -184,7 +184,7 @@ vint64m4_t test_vlse64_v_i64m4_m(vbool16_t mask, const int64_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlse64_v_i64m8_m(vbool8_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m8_m(mask, base, bstride, vl); + return __riscv_vlse64_v_i64m8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m1_m( @@ -193,7 +193,7 @@ vint64m8_t test_vlse64_v_i64m8_m(vbool8_t mask, const int64_t *base, ptrdiff_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlse64_v_u64m1_m(vbool64_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m1_m(mask, base, bstride, vl); + return __riscv_vlse64_v_u64m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m2_m( @@ -202,7 +202,7 @@ vuint64m1_t test_vlse64_v_u64m1_m(vbool64_t mask, const uint64_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlse64_v_u64m2_m(vbool32_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m2_m(mask, base, bstride, vl); + return __riscv_vlse64_v_u64m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m4_m( @@ -211,7 +211,7 @@ vuint64m2_t test_vlse64_v_u64m2_m(vbool32_t mask, const uint64_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlse64_v_u64m4_m(vbool16_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m4_m(mask, base, bstride, vl); + return __riscv_vlse64_v_u64m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m8_m( @@ -220,6 +220,6 @@ vuint64m4_t test_vlse64_v_u64m4_m(vbool16_t mask, const uint64_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlse64_v_u64m8_m(vbool8_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m8_m(mask, base, bstride, vl); + return __riscv_vlse64_v_u64m8_m(mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse8.c index 4ad9094b9a998472267cdf8f66772f5d7f5d2a76..490623a500f2b23b9b50e7ee0b55cd547916ae3c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlse8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlse8_v_i8mf8(const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf8(base, bstride, vl); + return __riscv_vlse8_v_i8mf8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf4( @@ -21,7 +21,7 @@ vint8mf8_t test_vlse8_v_i8mf8(const int8_t *base, ptrdiff_t bstride, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlse8_v_i8mf4(const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf4(base, bstride, vl); + return __riscv_vlse8_v_i8mf4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf2( @@ -30,7 +30,7 @@ vint8mf4_t test_vlse8_v_i8mf4(const int8_t *base, ptrdiff_t bstride, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlse8_v_i8mf2(const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf2(base, bstride, vl); + return __riscv_vlse8_v_i8mf2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m1( @@ -39,7 +39,7 @@ vint8mf2_t test_vlse8_v_i8mf2(const int8_t *base, ptrdiff_t bstride, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlse8_v_i8m1(const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m1(base, bstride, vl); + return __riscv_vlse8_v_i8m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m2( @@ -48,7 +48,7 @@ vint8m1_t test_vlse8_v_i8m1(const int8_t *base, ptrdiff_t bstride, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlse8_v_i8m2(const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m2(base, bstride, vl); + return __riscv_vlse8_v_i8m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m4( @@ -57,7 +57,7 @@ vint8m2_t test_vlse8_v_i8m2(const int8_t *base, ptrdiff_t bstride, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlse8_v_i8m4(const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m4(base, bstride, vl); + return __riscv_vlse8_v_i8m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m8( @@ -66,7 +66,7 @@ vint8m4_t test_vlse8_v_i8m4(const int8_t *base, ptrdiff_t bstride, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlse8_v_i8m8(const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m8(base, bstride, vl); + return __riscv_vlse8_v_i8m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf8( @@ -75,7 +75,7 @@ vint8m8_t test_vlse8_v_i8m8(const int8_t *base, ptrdiff_t bstride, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlse8_v_u8mf8(const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf8(base, bstride, vl); + return __riscv_vlse8_v_u8mf8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf4( @@ -84,7 +84,7 @@ vuint8mf8_t test_vlse8_v_u8mf8(const uint8_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlse8_v_u8mf4(const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf4(base, bstride, vl); + return __riscv_vlse8_v_u8mf4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf2( @@ -93,7 +93,7 @@ vuint8mf4_t test_vlse8_v_u8mf4(const uint8_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlse8_v_u8mf2(const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf2(base, bstride, vl); + return __riscv_vlse8_v_u8mf2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m1( @@ -102,7 +102,7 @@ vuint8mf2_t test_vlse8_v_u8mf2(const uint8_t *base, ptrdiff_t bstride, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlse8_v_u8m1(const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m1(base, bstride, vl); + return __riscv_vlse8_v_u8m1(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m2( @@ -111,7 +111,7 @@ vuint8m1_t test_vlse8_v_u8m1(const uint8_t *base, ptrdiff_t bstride, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlse8_v_u8m2(const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m2(base, bstride, vl); + return __riscv_vlse8_v_u8m2(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m4( @@ -120,7 +120,7 @@ vuint8m2_t test_vlse8_v_u8m2(const uint8_t *base, ptrdiff_t bstride, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlse8_v_u8m4(const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m4(base, bstride, vl); + return __riscv_vlse8_v_u8m4(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m8( @@ -129,7 +129,7 @@ vuint8m4_t test_vlse8_v_u8m4(const uint8_t *base, ptrdiff_t bstride, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlse8_v_u8m8(const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m8(base, bstride, vl); + return __riscv_vlse8_v_u8m8(base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf8_m( @@ -138,7 +138,7 @@ vuint8m8_t test_vlse8_v_u8m8(const uint8_t *base, ptrdiff_t bstride, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlse8_v_i8mf8_m(vbool64_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf8_m(mask, base, bstride, vl); + return __riscv_vlse8_v_i8mf8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf4_m( @@ -147,7 +147,7 @@ vint8mf8_t test_vlse8_v_i8mf8_m(vbool64_t mask, const int8_t *base, ptrdiff_t bs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlse8_v_i8mf4_m(vbool32_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf4_m(mask, base, bstride, vl); + return __riscv_vlse8_v_i8mf4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf2_m( @@ -156,7 +156,7 @@ vint8mf4_t test_vlse8_v_i8mf4_m(vbool32_t mask, const int8_t *base, ptrdiff_t bs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlse8_v_i8mf2_m(vbool16_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf2_m(mask, base, bstride, vl); + return __riscv_vlse8_v_i8mf2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m1_m( @@ -165,7 +165,7 @@ vint8mf2_t test_vlse8_v_i8mf2_m(vbool16_t mask, const int8_t *base, ptrdiff_t bs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlse8_v_i8m1_m(vbool8_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m1_m(mask, base, bstride, vl); + return __riscv_vlse8_v_i8m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m2_m( @@ -174,7 +174,7 @@ vint8m1_t test_vlse8_v_i8m1_m(vbool8_t mask, const int8_t *base, ptrdiff_t bstri // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlse8_v_i8m2_m(vbool4_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m2_m(mask, base, bstride, vl); + return __riscv_vlse8_v_i8m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m4_m( @@ -183,7 +183,7 @@ vint8m2_t test_vlse8_v_i8m2_m(vbool4_t mask, const int8_t *base, ptrdiff_t bstri // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlse8_v_i8m4_m(vbool2_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m4_m(mask, base, bstride, vl); + return __riscv_vlse8_v_i8m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m8_m( @@ -192,7 +192,7 @@ vint8m4_t test_vlse8_v_i8m4_m(vbool2_t mask, const int8_t *base, ptrdiff_t bstri // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlse8_v_i8m8_m(vbool1_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m8_m(mask, base, bstride, vl); + return __riscv_vlse8_v_i8m8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf8_m( @@ -201,7 +201,7 @@ vint8m8_t test_vlse8_v_i8m8_m(vbool1_t mask, const int8_t *base, ptrdiff_t bstri // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlse8_v_u8mf8_m(vbool64_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf8_m(mask, base, bstride, vl); + return __riscv_vlse8_v_u8mf8_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf4_m( @@ -210,7 +210,7 @@ vuint8mf8_t test_vlse8_v_u8mf8_m(vbool64_t mask, const uint8_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlse8_v_u8mf4_m(vbool32_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf4_m(mask, base, bstride, vl); + return __riscv_vlse8_v_u8mf4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf2_m( @@ -219,7 +219,7 @@ vuint8mf4_t test_vlse8_v_u8mf4_m(vbool32_t mask, const uint8_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlse8_v_u8mf2_m(vbool16_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf2_m(mask, base, bstride, vl); + return __riscv_vlse8_v_u8mf2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m1_m( @@ -228,7 +228,7 @@ vuint8mf2_t test_vlse8_v_u8mf2_m(vbool16_t mask, const uint8_t *base, ptrdiff_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlse8_v_u8m1_m(vbool8_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m1_m(mask, base, bstride, vl); + return __riscv_vlse8_v_u8m1_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m2_m( @@ -237,7 +237,7 @@ vuint8m1_t test_vlse8_v_u8m1_m(vbool8_t mask, const uint8_t *base, ptrdiff_t bst // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlse8_v_u8m2_m(vbool4_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m2_m(mask, base, bstride, vl); + return __riscv_vlse8_v_u8m2_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m4_m( @@ -246,7 +246,7 @@ vuint8m2_t test_vlse8_v_u8m2_m(vbool4_t mask, const uint8_t *base, ptrdiff_t bst // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlse8_v_u8m4_m(vbool2_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m4_m(mask, base, bstride, vl); + return __riscv_vlse8_v_u8m4_m(mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m8_m( @@ -255,6 +255,6 @@ vuint8m4_t test_vlse8_v_u8m4_m(vbool2_t mask, const uint8_t *base, ptrdiff_t bst // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlse8_v_u8m8_m(vbool1_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m8_m(mask, base, bstride, vl); + return __riscv_vlse8_v_u8m8_m(mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16.c index a63b08eb49e65685c47bec4722859ca7fe90e063..2cb4e783edd6828f61028c0e2e6b3557d303425a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf4(v0, v1, base, vl); + return __riscv_vlseg2e16_v_f16mf4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf2( @@ -30,7 +30,7 @@ void test_vlseg2e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf2(v0, v1, base, vl); + return __riscv_vlseg2e16_v_f16mf2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m1( @@ -43,7 +43,7 @@ void test_vlseg2e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m1(v0, v1, base, vl); + return __riscv_vlseg2e16_v_f16m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m2( @@ -56,7 +56,7 @@ void test_vlseg2e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 * // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m2(v0, v1, base, vl); + return __riscv_vlseg2e16_v_f16m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m4( @@ -69,7 +69,7 @@ void test_vlseg2e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 * // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m4(v0, v1, base, vl); + return __riscv_vlseg2e16_v_f16m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf4( @@ -82,7 +82,7 @@ void test_vlseg2e16_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 * // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf4(v0, v1, base, vl); + return __riscv_vlseg2e16_v_i16mf4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf2( @@ -95,7 +95,7 @@ void test_vlseg2e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf2(v0, v1, base, vl); + return __riscv_vlseg2e16_v_i16mf2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m1( @@ -108,7 +108,7 @@ void test_vlseg2e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m1(v0, v1, base, vl); + return __riscv_vlseg2e16_v_i16m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m2( @@ -121,7 +121,7 @@ void test_vlseg2e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m2(v0, v1, base, vl); + return __riscv_vlseg2e16_v_i16m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m4( @@ -134,7 +134,7 @@ void test_vlseg2e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m4(v0, v1, base, vl); + return __riscv_vlseg2e16_v_i16m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf4( @@ -147,7 +147,7 @@ void test_vlseg2e16_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf4(v0, v1, base, vl); + return __riscv_vlseg2e16_v_u16mf4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf2( @@ -160,7 +160,7 @@ void test_vlseg2e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf2(v0, v1, base, vl); + return __riscv_vlseg2e16_v_u16mf2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m1( @@ -173,7 +173,7 @@ void test_vlseg2e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m1(v0, v1, base, vl); + return __riscv_vlseg2e16_v_u16m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m2( @@ -186,7 +186,7 @@ void test_vlseg2e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m2(v0, v1, base, vl); + return __riscv_vlseg2e16_v_u16m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m4( @@ -199,7 +199,7 @@ void test_vlseg2e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m4(v0, v1, base, vl); + return __riscv_vlseg2e16_v_u16m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf4_m( @@ -212,7 +212,7 @@ void test_vlseg2e16_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_f16mf4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf2_m( @@ -225,7 +225,7 @@ void test_vlseg2e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_f16mf2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m1_m( @@ -238,7 +238,7 @@ void test_vlseg2e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_f16m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m2_m( @@ -251,7 +251,7 @@ void test_vlseg2e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_f16m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m4_m( @@ -264,7 +264,7 @@ void test_vlseg2e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_f16m4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf4_m( @@ -277,7 +277,7 @@ void test_vlseg2e16_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_i16mf4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf2_m( @@ -290,7 +290,7 @@ void test_vlseg2e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_i16mf2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m1_m( @@ -303,7 +303,7 @@ void test_vlseg2e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_i16m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m2_m( @@ -316,7 +316,7 @@ void test_vlseg2e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_i16m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m4_m( @@ -329,7 +329,7 @@ void test_vlseg2e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_i16m4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf4_m( @@ -342,7 +342,7 @@ void test_vlseg2e16_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, con // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_u16mf4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf2_m( @@ -355,7 +355,7 @@ void test_vlseg2e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_u16mf2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m1_m( @@ -368,7 +368,7 @@ void test_vlseg2e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_u16m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m2_m( @@ -381,7 +381,7 @@ void test_vlseg2e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_u16m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m4_m( @@ -394,6 +394,6 @@ void test_vlseg2e16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e16_v_u16m4_m(v0, v1, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16ff.c index 310bbde238f5456574e128f2e94a9f785444692f..697e4edb6c8c103d39ed91db4464ad8b14f1a1b6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e16ff.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf2( @@ -34,7 +34,7 @@ void test_vlseg2e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Floa // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m1( @@ -49,7 +49,7 @@ void test_vlseg2e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Floa // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m2( @@ -64,7 +64,7 @@ void test_vlseg2e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m4( @@ -79,7 +79,7 @@ void test_vlseg2e16ff_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf4( @@ -94,7 +94,7 @@ void test_vlseg2e16ff_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf2( @@ -109,7 +109,7 @@ void test_vlseg2e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m1( @@ -124,7 +124,7 @@ void test_vlseg2e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m2( @@ -139,7 +139,7 @@ void test_vlseg2e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m4( @@ -154,7 +154,7 @@ void test_vlseg2e16ff_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf4( @@ -169,7 +169,7 @@ void test_vlseg2e16ff_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf2( @@ -184,7 +184,7 @@ void test_vlseg2e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m1( @@ -199,7 +199,7 @@ void test_vlseg2e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m2( @@ -214,7 +214,7 @@ void test_vlseg2e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m4( @@ -229,7 +229,7 @@ void test_vlseg2e16ff_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf4_m( @@ -244,7 +244,7 @@ void test_vlseg2e16ff_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf2_m( @@ -259,7 +259,7 @@ void test_vlseg2e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m1_m( @@ -274,7 +274,7 @@ void test_vlseg2e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m2_m( @@ -289,7 +289,7 @@ void test_vlseg2e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m4_m( @@ -304,7 +304,7 @@ void test_vlseg2e16ff_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf4_m( @@ -319,7 +319,7 @@ void test_vlseg2e16ff_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf2_m( @@ -334,7 +334,7 @@ void test_vlseg2e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m1_m( @@ -349,7 +349,7 @@ void test_vlseg2e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m2_m( @@ -364,7 +364,7 @@ void test_vlseg2e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m4_m( @@ -379,7 +379,7 @@ void test_vlseg2e16ff_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf4_m( @@ -394,7 +394,7 @@ void test_vlseg2e16ff_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf2_m( @@ -409,7 +409,7 @@ void test_vlseg2e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m1_m( @@ -424,7 +424,7 @@ void test_vlseg2e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m2_m( @@ -439,7 +439,7 @@ void test_vlseg2e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m4_m( @@ -454,6 +454,6 @@ void test_vlseg2e16ff_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m4_m(v0, v1, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32.c index c57c20aa7900b863d31cbae6823f5f1a936c8ebc..923693931c10cd9f87a9d0a1d03edea4a23d4871 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, size_t vl) { - return vlseg2e32_v_f32mf2(v0, v1, base, vl); + return __riscv_vlseg2e32_v_f32mf2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m1( @@ -30,7 +30,7 @@ void test_vlseg2e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, size_t vl) { - return vlseg2e32_v_f32m1(v0, v1, base, vl); + return __riscv_vlseg2e32_v_f32m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m2( @@ -43,7 +43,7 @@ void test_vlseg2e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, size_t vl) { - return vlseg2e32_v_f32m2(v0, v1, base, vl); + return __riscv_vlseg2e32_v_f32m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m4( @@ -56,7 +56,7 @@ void test_vlseg2e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, size_t vl) { - return vlseg2e32_v_f32m4(v0, v1, base, vl); + return __riscv_vlseg2e32_v_f32m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32mf2( @@ -69,7 +69,7 @@ void test_vlseg2e32_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32mf2(v0, v1, base, vl); + return __riscv_vlseg2e32_v_i32mf2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m1( @@ -82,7 +82,7 @@ void test_vlseg2e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m1(v0, v1, base, vl); + return __riscv_vlseg2e32_v_i32m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m2( @@ -95,7 +95,7 @@ void test_vlseg2e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m2(v0, v1, base, vl); + return __riscv_vlseg2e32_v_i32m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m4( @@ -108,7 +108,7 @@ void test_vlseg2e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m4(v0, v1, base, vl); + return __riscv_vlseg2e32_v_i32m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32mf2( @@ -121,7 +121,7 @@ void test_vlseg2e32_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32mf2(v0, v1, base, vl); + return __riscv_vlseg2e32_v_u32mf2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m1( @@ -134,7 +134,7 @@ void test_vlseg2e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m1(v0, v1, base, vl); + return __riscv_vlseg2e32_v_u32m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m2( @@ -147,7 +147,7 @@ void test_vlseg2e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m2(v0, v1, base, vl); + return __riscv_vlseg2e32_v_u32m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m4( @@ -160,7 +160,7 @@ void test_vlseg2e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m4(v0, v1, base, vl); + return __riscv_vlseg2e32_v_u32m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32mf2_m( @@ -173,7 +173,7 @@ void test_vlseg2e32_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, size_t vl) { - return vlseg2e32_v_f32mf2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_f32mf2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m1_m( @@ -186,7 +186,7 @@ void test_vlseg2e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, size_t vl) { - return vlseg2e32_v_f32m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_f32m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m2_m( @@ -199,7 +199,7 @@ void test_vlseg2e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, size_t vl) { - return vlseg2e32_v_f32m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_f32m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m4_m( @@ -212,7 +212,7 @@ void test_vlseg2e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, size_t vl) { - return vlseg2e32_v_f32m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_f32m4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32mf2_m( @@ -225,7 +225,7 @@ void test_vlseg2e32_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32mf2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_i32mf2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m1_m( @@ -238,7 +238,7 @@ void test_vlseg2e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_i32m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m2_m( @@ -251,7 +251,7 @@ void test_vlseg2e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_i32m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m4_m( @@ -264,7 +264,7 @@ void test_vlseg2e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_i32m4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32mf2_m( @@ -277,7 +277,7 @@ void test_vlseg2e32_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32mf2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_u32mf2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m1_m( @@ -290,7 +290,7 @@ void test_vlseg2e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_u32m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m2_m( @@ -303,7 +303,7 @@ void test_vlseg2e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_u32m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m4_m( @@ -316,6 +316,6 @@ void test_vlseg2e32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e32_v_u32m4_m(v0, v1, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff.c index 9b58f40a1578cb86f7e0c46f682027ddc33a653d..f6805a5cd03a63c826be847dba9ed4f7dc378330 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32ff.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32mf2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32mf2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m1( @@ -34,7 +34,7 @@ void test_vlseg2e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m2( @@ -49,7 +49,7 @@ void test_vlseg2e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m4( @@ -64,7 +64,7 @@ void test_vlseg2e32ff_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32mf2( @@ -79,7 +79,7 @@ void test_vlseg2e32ff_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32mf2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32mf2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m1( @@ -94,7 +94,7 @@ void test_vlseg2e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m2( @@ -109,7 +109,7 @@ void test_vlseg2e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m4( @@ -124,7 +124,7 @@ void test_vlseg2e32ff_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32mf2( @@ -139,7 +139,7 @@ void test_vlseg2e32ff_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32mf2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32mf2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m1( @@ -154,7 +154,7 @@ void test_vlseg2e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m2( @@ -169,7 +169,7 @@ void test_vlseg2e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m4( @@ -184,7 +184,7 @@ void test_vlseg2e32ff_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32mf2_m( @@ -199,7 +199,7 @@ void test_vlseg2e32ff_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32mf2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32mf2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m1_m( @@ -214,7 +214,7 @@ void test_vlseg2e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m2_m( @@ -229,7 +229,7 @@ void test_vlseg2e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m4_m( @@ -244,7 +244,7 @@ void test_vlseg2e32ff_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32mf2_m( @@ -259,7 +259,7 @@ void test_vlseg2e32ff_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32mf2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32mf2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m1_m( @@ -274,7 +274,7 @@ void test_vlseg2e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m2_m( @@ -289,7 +289,7 @@ void test_vlseg2e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m4_m( @@ -304,7 +304,7 @@ void test_vlseg2e32ff_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32mf2_m( @@ -319,7 +319,7 @@ void test_vlseg2e32ff_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32mf2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32mf2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m1_m( @@ -334,7 +334,7 @@ void test_vlseg2e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m2_m( @@ -349,7 +349,7 @@ void test_vlseg2e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m4_m( @@ -364,6 +364,6 @@ void test_vlseg2e32ff_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m4_m(v0, v1, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64.c index 00623e573db20e550638bfa85e4ec00c07e695c8..e1f49430637252bc12c56f887aa1d79cea5d5ba3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, size_t vl) { - return vlseg2e64_v_f64m1(v0, v1, base, vl); + return __riscv_vlseg2e64_v_f64m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m2( @@ -30,7 +30,7 @@ void test_vlseg2e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, size_t vl) { - return vlseg2e64_v_f64m2(v0, v1, base, vl); + return __riscv_vlseg2e64_v_f64m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m4( @@ -43,7 +43,7 @@ void test_vlseg2e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, size_t vl) { - return vlseg2e64_v_f64m4(v0, v1, base, vl); + return __riscv_vlseg2e64_v_f64m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m1( @@ -56,7 +56,7 @@ void test_vlseg2e64_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m1(v0, v1, base, vl); + return __riscv_vlseg2e64_v_i64m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m2( @@ -69,7 +69,7 @@ void test_vlseg2e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m2(v0, v1, base, vl); + return __riscv_vlseg2e64_v_i64m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m4( @@ -82,7 +82,7 @@ void test_vlseg2e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m4(v0, v1, base, vl); + return __riscv_vlseg2e64_v_i64m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m1( @@ -95,7 +95,7 @@ void test_vlseg2e64_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m1(v0, v1, base, vl); + return __riscv_vlseg2e64_v_u64m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m2( @@ -108,7 +108,7 @@ void test_vlseg2e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m2(v0, v1, base, vl); + return __riscv_vlseg2e64_v_u64m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m4( @@ -121,7 +121,7 @@ void test_vlseg2e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m4(v0, v1, base, vl); + return __riscv_vlseg2e64_v_u64m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m1_m( @@ -134,7 +134,7 @@ void test_vlseg2e64_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, size_t vl) { - return vlseg2e64_v_f64m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_f64m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m2_m( @@ -147,7 +147,7 @@ void test_vlseg2e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, size_t vl) { - return vlseg2e64_v_f64m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_f64m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m4_m( @@ -160,7 +160,7 @@ void test_vlseg2e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, size_t vl) { - return vlseg2e64_v_f64m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_f64m4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m1_m( @@ -173,7 +173,7 @@ void test_vlseg2e64_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_i64m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m2_m( @@ -186,7 +186,7 @@ void test_vlseg2e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_i64m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m4_m( @@ -199,7 +199,7 @@ void test_vlseg2e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_i64m4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m1_m( @@ -212,7 +212,7 @@ void test_vlseg2e64_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_u64m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m2_m( @@ -225,7 +225,7 @@ void test_vlseg2e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_u64m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m4_m( @@ -238,6 +238,6 @@ void test_vlseg2e64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e64_v_u64m4_m(v0, v1, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64ff.c index 1b631b449699b338e8256e021d717d85043db431..900f14905c672f6565b4fd2182b935b1f02c4c2b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e64ff.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m2( @@ -34,7 +34,7 @@ void test_vlseg2e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m4( @@ -49,7 +49,7 @@ void test_vlseg2e64ff_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m1( @@ -64,7 +64,7 @@ void test_vlseg2e64ff_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m2( @@ -79,7 +79,7 @@ void test_vlseg2e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m4( @@ -94,7 +94,7 @@ void test_vlseg2e64ff_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m1( @@ -109,7 +109,7 @@ void test_vlseg2e64ff_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m2( @@ -124,7 +124,7 @@ void test_vlseg2e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m4( @@ -139,7 +139,7 @@ void test_vlseg2e64ff_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m1_m( @@ -154,7 +154,7 @@ void test_vlseg2e64ff_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m2_m( @@ -169,7 +169,7 @@ void test_vlseg2e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m4_m( @@ -184,7 +184,7 @@ void test_vlseg2e64ff_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m1_m( @@ -199,7 +199,7 @@ void test_vlseg2e64ff_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m2_m( @@ -214,7 +214,7 @@ void test_vlseg2e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m4_m( @@ -229,7 +229,7 @@ void test_vlseg2e64ff_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m1_m( @@ -244,7 +244,7 @@ void test_vlseg2e64ff_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m2_m( @@ -259,7 +259,7 @@ void test_vlseg2e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m4_m( @@ -274,6 +274,6 @@ void test_vlseg2e64ff_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m4_m(v0, v1, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8.c index bcf86e991e6ca0648d94cf1a9741fe453441ec99..5e1d1c7de4361471e6a946a71ba7c037057a879a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf8(v0, v1, base, vl); + return __riscv_vlseg2e8_v_i8mf8(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf4( @@ -29,7 +29,7 @@ void test_vlseg2e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, s // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf4(v0, v1, base, vl); + return __riscv_vlseg2e8_v_i8mf4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf2( @@ -42,7 +42,7 @@ void test_vlseg2e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, s // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf2(v0, v1, base, vl); + return __riscv_vlseg2e8_v_i8mf2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m1( @@ -55,7 +55,7 @@ void test_vlseg2e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, s // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m1(v0, v1, base, vl); + return __riscv_vlseg2e8_v_i8m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m2( @@ -68,7 +68,7 @@ void test_vlseg2e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, size // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m2(v0, v1, base, vl); + return __riscv_vlseg2e8_v_i8m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m4( @@ -81,7 +81,7 @@ void test_vlseg2e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, size // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m4(v0, v1, base, vl); + return __riscv_vlseg2e8_v_i8m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf8( @@ -94,7 +94,7 @@ void test_vlseg2e8_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, size // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf8(v0, v1, base, vl); + return __riscv_vlseg2e8_v_u8mf8(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf4( @@ -107,7 +107,7 @@ void test_vlseg2e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf4(v0, v1, base, vl); + return __riscv_vlseg2e8_v_u8mf4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf2( @@ -120,7 +120,7 @@ void test_vlseg2e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf2(v0, v1, base, vl); + return __riscv_vlseg2e8_v_u8mf2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m1( @@ -133,7 +133,7 @@ void test_vlseg2e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m1(v0, v1, base, vl); + return __riscv_vlseg2e8_v_u8m1(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m2( @@ -146,7 +146,7 @@ void test_vlseg2e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, s // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m2(v0, v1, base, vl); + return __riscv_vlseg2e8_v_u8m2(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m4( @@ -159,7 +159,7 @@ void test_vlseg2e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, s // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m4(v0, v1, base, vl); + return __riscv_vlseg2e8_v_u8m4(v0, v1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf8_m( @@ -172,7 +172,7 @@ void test_vlseg2e8_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, s // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf8_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_i8mf8_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf4_m( @@ -185,7 +185,7 @@ void test_vlseg2e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, con // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_i8mf4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf2_m( @@ -198,7 +198,7 @@ void test_vlseg2e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, con // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_i8mf2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m1_m( @@ -211,7 +211,7 @@ void test_vlseg2e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, con // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_i8m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m2_m( @@ -224,7 +224,7 @@ void test_vlseg2e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const i // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_i8m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m4_m( @@ -237,7 +237,7 @@ void test_vlseg2e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const i // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_i8m4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf8_m( @@ -250,7 +250,7 @@ void test_vlseg2e8_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const i // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf8_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_u8mf8_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf4_m( @@ -263,7 +263,7 @@ void test_vlseg2e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_u8mf4_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf2_m( @@ -276,7 +276,7 @@ void test_vlseg2e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_u8mf2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m1_m( @@ -289,7 +289,7 @@ void test_vlseg2e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m1_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_u8m1_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m2_m( @@ -302,7 +302,7 @@ void test_vlseg2e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m2_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_u8m2_m(v0, v1, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m4_m( @@ -315,6 +315,6 @@ void test_vlseg2e8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m4_m(v0, v1, mask, base, vl); + return __riscv_vlseg2e8_v_u8m4_m(v0, v1, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8ff.c index 2c3cb8fbd581ed6b41885da2cd36c37feb847c19..85ac077eef7426e0332eb0741673e7d07cca7bb2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e8ff.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf8(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf8(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf4( @@ -34,7 +34,7 @@ void test_vlseg2e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf2( @@ -49,7 +49,7 @@ void test_vlseg2e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m1( @@ -64,7 +64,7 @@ void test_vlseg2e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m2( @@ -79,7 +79,7 @@ void test_vlseg2e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, si // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m4( @@ -94,7 +94,7 @@ void test_vlseg2e8ff_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, si // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf8( @@ -109,7 +109,7 @@ void test_vlseg2e8ff_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, si // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf8(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf8(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf4( @@ -124,7 +124,7 @@ void test_vlseg2e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf2( @@ -139,7 +139,7 @@ void test_vlseg2e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m1( @@ -154,7 +154,7 @@ void test_vlseg2e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *ba // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m1(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m1(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m2( @@ -169,7 +169,7 @@ void test_vlseg2e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m2(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m2(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m4( @@ -184,7 +184,7 @@ void test_vlseg2e8ff_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m4(v0, v1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m4(v0, v1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf8_m( @@ -199,7 +199,7 @@ void test_vlseg2e8ff_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf8_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf8_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf4_m( @@ -214,7 +214,7 @@ void test_vlseg2e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf2_m( @@ -229,7 +229,7 @@ void test_vlseg2e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m1_m( @@ -244,7 +244,7 @@ void test_vlseg2e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m2_m( @@ -259,7 +259,7 @@ void test_vlseg2e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m4_m( @@ -274,7 +274,7 @@ void test_vlseg2e8ff_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf8_m( @@ -289,7 +289,7 @@ void test_vlseg2e8ff_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf8_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf8_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf4_m( @@ -304,7 +304,7 @@ void test_vlseg2e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf4_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf2_m( @@ -319,7 +319,7 @@ void test_vlseg2e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m1_m( @@ -334,7 +334,7 @@ void test_vlseg2e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m1_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m1_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m2_m( @@ -349,7 +349,7 @@ void test_vlseg2e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m2_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m2_m(v0, v1, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m4_m( @@ -364,6 +364,6 @@ void test_vlseg2e8ff_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, con // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m4_m(v0, v1, mask, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m4_m(v0, v1, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16.c index 7cf6edc1b7ce337c431b13ca628a56d081fec3b0..674b871cc683fef88faee77850ee51d30f40a036 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf4(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_f16mf4(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf2( @@ -34,7 +34,7 @@ void test_vlseg3e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf2(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_f16mf2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m1( @@ -49,7 +49,7 @@ void test_vlseg3e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_f16m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m2( @@ -64,7 +64,7 @@ void test_vlseg3e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_f16m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf4( @@ -79,7 +79,7 @@ void test_vlseg3e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf4(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_i16mf4(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf2( @@ -94,7 +94,7 @@ void test_vlseg3e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf2(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_i16mf2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m1( @@ -109,7 +109,7 @@ void test_vlseg3e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_i16m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m2( @@ -124,7 +124,7 @@ void test_vlseg3e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_i16m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf4( @@ -139,7 +139,7 @@ void test_vlseg3e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf4(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_u16mf4(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf2( @@ -154,7 +154,7 @@ void test_vlseg3e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf2(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_u16mf2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m1( @@ -169,7 +169,7 @@ void test_vlseg3e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_u16m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m2( @@ -184,7 +184,7 @@ void test_vlseg3e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e16_v_u16m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf4_m( @@ -199,7 +199,7 @@ void test_vlseg3e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf4_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_f16mf4_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf2_m( @@ -214,7 +214,7 @@ void test_vlseg3e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_f16mf2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m1_m( @@ -229,7 +229,7 @@ void test_vlseg3e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_f16m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m2_m( @@ -244,7 +244,7 @@ void test_vlseg3e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_f16m2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf4_m( @@ -259,7 +259,7 @@ void test_vlseg3e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf4_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_i16mf4_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf2_m( @@ -274,7 +274,7 @@ void test_vlseg3e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_i16mf2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m1_m( @@ -289,7 +289,7 @@ void test_vlseg3e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_i16m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m2_m( @@ -304,7 +304,7 @@ void test_vlseg3e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_i16m2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf4_m( @@ -319,7 +319,7 @@ void test_vlseg3e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf4_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_u16mf4_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf2_m( @@ -334,7 +334,7 @@ void test_vlseg3e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_u16mf2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m1_m( @@ -349,7 +349,7 @@ void test_vlseg3e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_u16m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m2_m( @@ -364,6 +364,6 @@ void test_vlseg3e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e16_v_u16m2_m(v0, v1, v2, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16ff.c index 55860b436190611f29279e9e9e8f7e2e00ca7bdd..5929f8a1e80321b0a0a4de327652252dc6edab56 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e16ff.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf4(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf4(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf2( @@ -38,7 +38,7 @@ void test_vlseg3e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m1( @@ -55,7 +55,7 @@ void test_vlseg3e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m2( @@ -72,7 +72,7 @@ void test_vlseg3e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf4( @@ -89,7 +89,7 @@ void test_vlseg3e16ff_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf4(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf4(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf2( @@ -106,7 +106,7 @@ void test_vlseg3e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m1( @@ -123,7 +123,7 @@ void test_vlseg3e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m2( @@ -140,7 +140,7 @@ void test_vlseg3e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf4( @@ -157,7 +157,7 @@ void test_vlseg3e16ff_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf4(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf4(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf2( @@ -174,7 +174,7 @@ void test_vlseg3e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m1( @@ -191,7 +191,7 @@ void test_vlseg3e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m2( @@ -208,7 +208,7 @@ void test_vlseg3e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf4_m( @@ -225,7 +225,7 @@ void test_vlseg3e16ff_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf4_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf4_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf2_m( @@ -242,7 +242,7 @@ void test_vlseg3e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m1_m( @@ -259,7 +259,7 @@ void test_vlseg3e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m2_m( @@ -276,7 +276,7 @@ void test_vlseg3e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf4_m( @@ -293,7 +293,7 @@ void test_vlseg3e16ff_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf4_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf4_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf2_m( @@ -310,7 +310,7 @@ void test_vlseg3e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m1_m( @@ -327,7 +327,7 @@ void test_vlseg3e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m2_m( @@ -344,7 +344,7 @@ void test_vlseg3e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf4_m( @@ -361,7 +361,7 @@ void test_vlseg3e16ff_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf4_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf4_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf2_m( @@ -378,7 +378,7 @@ void test_vlseg3e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m1_m( @@ -395,7 +395,7 @@ void test_vlseg3e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m2_m( @@ -412,6 +412,6 @@ void test_vlseg3e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m2_m(v0, v1, v2, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32.c index 173ce591da2816f8818b18a0e900d77b98910c6f..86af949b7780e4cdb054964ae69bc47f54c663b7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, size_t vl) { - return vlseg3e32_v_f32mf2(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_f32mf2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m1( @@ -34,7 +34,7 @@ void test_vlseg3e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, size_t vl) { - return vlseg3e32_v_f32m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_f32m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m2( @@ -49,7 +49,7 @@ void test_vlseg3e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, size_t vl) { - return vlseg3e32_v_f32m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_f32m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32mf2( @@ -64,7 +64,7 @@ void test_vlseg3e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32mf2(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_i32mf2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m1( @@ -79,7 +79,7 @@ void test_vlseg3e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_i32m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m2( @@ -94,7 +94,7 @@ void test_vlseg3e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_i32m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32mf2( @@ -109,7 +109,7 @@ void test_vlseg3e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32mf2(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_u32mf2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m1( @@ -124,7 +124,7 @@ void test_vlseg3e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_u32m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m2( @@ -139,7 +139,7 @@ void test_vlseg3e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e32_v_u32m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32mf2_m( @@ -154,7 +154,7 @@ void test_vlseg3e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, size_t vl) { - return vlseg3e32_v_f32mf2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_f32mf2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m1_m( @@ -169,7 +169,7 @@ void test_vlseg3e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, size_t vl) { - return vlseg3e32_v_f32m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_f32m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m2_m( @@ -184,7 +184,7 @@ void test_vlseg3e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, size_t vl) { - return vlseg3e32_v_f32m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_f32m2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32mf2_m( @@ -199,7 +199,7 @@ void test_vlseg3e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32mf2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_i32mf2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m1_m( @@ -214,7 +214,7 @@ void test_vlseg3e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_i32m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m2_m( @@ -229,7 +229,7 @@ void test_vlseg3e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_i32m2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32mf2_m( @@ -244,7 +244,7 @@ void test_vlseg3e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32mf2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_u32mf2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m1_m( @@ -259,7 +259,7 @@ void test_vlseg3e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_u32m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m2_m( @@ -274,6 +274,6 @@ void test_vlseg3e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e32_v_u32m2_m(v0, v1, v2, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32ff.c index 63606162891592504223ccf76294d8def59144ff..87145bb83ca3b61680c2f2c5d619c62e40ab5156 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e32ff.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32mf2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32mf2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m1( @@ -38,7 +38,7 @@ void test_vlseg3e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m2( @@ -55,7 +55,7 @@ void test_vlseg3e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32mf2( @@ -72,7 +72,7 @@ void test_vlseg3e32ff_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32mf2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32mf2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m1( @@ -89,7 +89,7 @@ void test_vlseg3e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m2( @@ -106,7 +106,7 @@ void test_vlseg3e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32mf2( @@ -123,7 +123,7 @@ void test_vlseg3e32ff_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32mf2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32mf2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m1( @@ -140,7 +140,7 @@ void test_vlseg3e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m2( @@ -157,7 +157,7 @@ void test_vlseg3e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32mf2_m( @@ -174,7 +174,7 @@ void test_vlseg3e32ff_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32mf2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32mf2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m1_m( @@ -191,7 +191,7 @@ void test_vlseg3e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m2_m( @@ -208,7 +208,7 @@ void test_vlseg3e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32mf2_m( @@ -225,7 +225,7 @@ void test_vlseg3e32ff_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32mf2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32mf2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m1_m( @@ -242,7 +242,7 @@ void test_vlseg3e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m2_m( @@ -259,7 +259,7 @@ void test_vlseg3e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32mf2_m( @@ -276,7 +276,7 @@ void test_vlseg3e32ff_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32mf2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32mf2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m1_m( @@ -293,7 +293,7 @@ void test_vlseg3e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m2_m( @@ -310,6 +310,6 @@ void test_vlseg3e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m2_m(v0, v1, v2, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64.c index 6dc3322159954c15367e8ac07603ede3770db9dc..27cb455f45a12a9846e45994ee66ceb6a970d6aa 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, size_t vl) { - return vlseg3e64_v_f64m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e64_v_f64m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m2( @@ -34,7 +34,7 @@ void test_vlseg3e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, size_t vl) { - return vlseg3e64_v_f64m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e64_v_f64m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m1( @@ -49,7 +49,7 @@ void test_vlseg3e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e64_v_i64m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m2( @@ -64,7 +64,7 @@ void test_vlseg3e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e64_v_i64m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m1( @@ -79,7 +79,7 @@ void test_vlseg3e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e64_v_u64m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m2( @@ -94,7 +94,7 @@ void test_vlseg3e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e64_v_u64m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m1_m( @@ -109,7 +109,7 @@ void test_vlseg3e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, size_t vl) { - return vlseg3e64_v_f64m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e64_v_f64m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m2_m( @@ -124,7 +124,7 @@ void test_vlseg3e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, size_t vl) { - return vlseg3e64_v_f64m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e64_v_f64m2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m1_m( @@ -139,7 +139,7 @@ void test_vlseg3e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e64_v_i64m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m2_m( @@ -154,7 +154,7 @@ void test_vlseg3e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e64_v_i64m2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m1_m( @@ -169,7 +169,7 @@ void test_vlseg3e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e64_v_u64m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m2_m( @@ -184,6 +184,6 @@ void test_vlseg3e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e64_v_u64m2_m(v0, v1, v2, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64ff.c index a537878d237752d0aea4d1d87b60e798129d6f96..7b170b1f8ea79d9e6671ce2c96d559cc0485decf 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e64ff.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m2( @@ -38,7 +38,7 @@ void test_vlseg3e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m1( @@ -55,7 +55,7 @@ void test_vlseg3e64ff_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m2( @@ -72,7 +72,7 @@ void test_vlseg3e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m1( @@ -89,7 +89,7 @@ void test_vlseg3e64ff_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m2( @@ -106,7 +106,7 @@ void test_vlseg3e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m1_m( @@ -123,7 +123,7 @@ void test_vlseg3e64ff_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m2_m( @@ -140,7 +140,7 @@ void test_vlseg3e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m1_m( @@ -157,7 +157,7 @@ void test_vlseg3e64ff_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m2_m( @@ -174,7 +174,7 @@ void test_vlseg3e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m1_m( @@ -191,7 +191,7 @@ void test_vlseg3e64ff_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m2_m( @@ -208,6 +208,6 @@ void test_vlseg3e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m2_m(v0, v1, v2, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8.c index 312a869fd4d10b296e7de31e50f93ec0939d2f52..9b28c4a4ccd878c357c770d5a10a9eb4ab2e5763 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8.c @@ -18,7 +18,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf8(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_i8mf8(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf4( @@ -33,7 +33,7 @@ void test_vlseg3e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf4(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_i8mf4(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf2( @@ -48,7 +48,7 @@ void test_vlseg3e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf2(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_i8mf2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m1( @@ -63,7 +63,7 @@ void test_vlseg3e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_i8m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m2( @@ -78,7 +78,7 @@ void test_vlseg3e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_i8m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf8( @@ -93,7 +93,7 @@ void test_vlseg3e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf8(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_u8mf8(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf4( @@ -108,7 +108,7 @@ void test_vlseg3e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf4(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_u8mf4(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf2( @@ -123,7 +123,7 @@ void test_vlseg3e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf2(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_u8mf2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m1( @@ -138,7 +138,7 @@ void test_vlseg3e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m1(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_u8m1(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m2( @@ -153,7 +153,7 @@ void test_vlseg3e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m2(v0, v1, v2, base, vl); + return __riscv_vlseg3e8_v_u8m2(v0, v1, v2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf8_m( @@ -168,7 +168,7 @@ void test_vlseg3e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf8_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_i8mf8_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf4_m( @@ -183,7 +183,7 @@ void test_vlseg3e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf4_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_i8mf4_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf2_m( @@ -198,7 +198,7 @@ void test_vlseg3e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_i8mf2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m1_m( @@ -213,7 +213,7 @@ void test_vlseg3e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_i8m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m2_m( @@ -228,7 +228,7 @@ void test_vlseg3e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_i8m2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf8_m( @@ -243,7 +243,7 @@ void test_vlseg3e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf8_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_u8mf8_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf4_m( @@ -258,7 +258,7 @@ void test_vlseg3e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf4_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_u8mf4_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf2_m( @@ -273,7 +273,7 @@ void test_vlseg3e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_u8mf2_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m1_m( @@ -288,7 +288,7 @@ void test_vlseg3e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m1_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_u8m1_m(v0, v1, v2, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m2_m( @@ -303,6 +303,6 @@ void test_vlseg3e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m2_m(v0, v1, v2, mask, base, vl); + return __riscv_vlseg3e8_v_u8m2_m(v0, v1, v2, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8ff.c index 9251167cf23e56877049244b4cf4c9643a2f9678..696d072e518d8c065b04067e7c25dc4d556c57e1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg3e8ff.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf8(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf8(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf4( @@ -38,7 +38,7 @@ void test_vlseg3e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf4(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf4(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf2( @@ -55,7 +55,7 @@ void test_vlseg3e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m1( @@ -72,7 +72,7 @@ void test_vlseg3e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m2( @@ -89,7 +89,7 @@ void test_vlseg3e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const i // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf8( @@ -106,7 +106,7 @@ void test_vlseg3e8ff_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const i // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf8(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf8(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf4( @@ -123,7 +123,7 @@ void test_vlseg3e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf4(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf4(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf2( @@ -140,7 +140,7 @@ void test_vlseg3e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m1( @@ -157,7 +157,7 @@ void test_vlseg3e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m1(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m1(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m2( @@ -174,7 +174,7 @@ void test_vlseg3e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m2(v0, v1, v2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m2(v0, v1, v2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf8_m( @@ -191,7 +191,7 @@ void test_vlseg3e8ff_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf8_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf8_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf4_m( @@ -208,7 +208,7 @@ void test_vlseg3e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf4_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf4_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf2_m( @@ -225,7 +225,7 @@ void test_vlseg3e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m1_m( @@ -242,7 +242,7 @@ void test_vlseg3e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m2_m( @@ -259,7 +259,7 @@ void test_vlseg3e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf8_m( @@ -276,7 +276,7 @@ void test_vlseg3e8ff_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf8_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf8_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf4_m( @@ -293,7 +293,7 @@ void test_vlseg3e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf4_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf4_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf2_m( @@ -310,7 +310,7 @@ void test_vlseg3e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf2_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m1_m( @@ -327,7 +327,7 @@ void test_vlseg3e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m1_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m1_m(v0, v1, v2, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m2_m( @@ -344,6 +344,6 @@ void test_vlseg3e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m2_m(v0, v1, v2, mask, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m2_m(v0, v1, v2, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16.c index 872686b60888840eeff1fb2af4cd2a9d7dcb8c9d..0cb953134332a0c0425d7c631f0dce17816c21cc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf4(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_f16mf4(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf2( @@ -38,7 +38,7 @@ void test_vlseg4e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_f16mf2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m1( @@ -55,7 +55,7 @@ void test_vlseg4e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_f16m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m2( @@ -72,7 +72,7 @@ void test_vlseg4e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_f16m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf4( @@ -89,7 +89,7 @@ void test_vlseg4e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf4(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_i16mf4(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf2( @@ -106,7 +106,7 @@ void test_vlseg4e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_i16mf2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m1( @@ -123,7 +123,7 @@ void test_vlseg4e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_i16m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m2( @@ -140,7 +140,7 @@ void test_vlseg4e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_i16m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf4( @@ -157,7 +157,7 @@ void test_vlseg4e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf4(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_u16mf4(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf2( @@ -174,7 +174,7 @@ void test_vlseg4e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_u16mf2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m1( @@ -191,7 +191,7 @@ void test_vlseg4e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_u16m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m2( @@ -208,7 +208,7 @@ void test_vlseg4e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e16_v_u16m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf4_m( @@ -225,7 +225,7 @@ void test_vlseg4e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf4_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_f16mf4_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf2_m( @@ -242,7 +242,7 @@ void test_vlseg4e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_f16mf2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m1_m( @@ -259,7 +259,7 @@ void test_vlseg4e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_f16m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m2_m( @@ -276,7 +276,7 @@ void test_vlseg4e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_f16m2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf4_m( @@ -293,7 +293,7 @@ void test_vlseg4e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf4_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_i16mf4_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf2_m( @@ -310,7 +310,7 @@ void test_vlseg4e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_i16mf2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m1_m( @@ -327,7 +327,7 @@ void test_vlseg4e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_i16m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m2_m( @@ -344,7 +344,7 @@ void test_vlseg4e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_i16m2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf4_m( @@ -361,7 +361,7 @@ void test_vlseg4e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf4_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_u16mf4_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf2_m( @@ -378,7 +378,7 @@ void test_vlseg4e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_u16mf2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m1_m( @@ -395,7 +395,7 @@ void test_vlseg4e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_u16m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m2_m( @@ -412,6 +412,6 @@ void test_vlseg4e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e16_v_u16m2_m(v0, v1, v2, v3, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16ff.c index c71230a25e1b97345d99f22f927018690a6e0d45..e4be39213c9ad18706d03d994a02de2835d4bad0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e16ff.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf4(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf4(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf2( @@ -42,7 +42,7 @@ void test_vlseg4e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m1( @@ -61,7 +61,7 @@ void test_vlseg4e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m2( @@ -80,7 +80,7 @@ void test_vlseg4e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf4( @@ -99,7 +99,7 @@ void test_vlseg4e16ff_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf4(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf4(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf2( @@ -118,7 +118,7 @@ void test_vlseg4e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m1( @@ -137,7 +137,7 @@ void test_vlseg4e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m2( @@ -156,7 +156,7 @@ void test_vlseg4e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf4( @@ -175,7 +175,7 @@ void test_vlseg4e16ff_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf4(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf4(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf2( @@ -194,7 +194,7 @@ void test_vlseg4e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m1( @@ -213,7 +213,7 @@ void test_vlseg4e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m2( @@ -232,7 +232,7 @@ void test_vlseg4e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf4_m( @@ -251,7 +251,7 @@ void test_vlseg4e16ff_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf2_m( @@ -270,7 +270,7 @@ void test_vlseg4e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m1_m( @@ -289,7 +289,7 @@ void test_vlseg4e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m2_m( @@ -308,7 +308,7 @@ void test_vlseg4e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf4_m( @@ -327,7 +327,7 @@ void test_vlseg4e16ff_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vlseg4e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m1_m( @@ -365,7 +365,7 @@ void test_vlseg4e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m2_m( @@ -384,7 +384,7 @@ void test_vlseg4e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf4_m( @@ -403,7 +403,7 @@ void test_vlseg4e16ff_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf2_m( @@ -422,7 +422,7 @@ void test_vlseg4e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m1_m( @@ -441,7 +441,7 @@ void test_vlseg4e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m2_m( @@ -460,6 +460,6 @@ void test_vlseg4e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32.c index 0e9c30c8e4f63f6166d681c6eec871264a5d0d37..deb45c1aed08b5667ba24ba350d7994523a5d7f6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, size_t vl) { - return vlseg4e32_v_f32mf2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_f32mf2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m1( @@ -38,7 +38,7 @@ void test_vlseg4e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, size_t vl) { - return vlseg4e32_v_f32m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_f32m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m2( @@ -55,7 +55,7 @@ void test_vlseg4e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, size_t vl) { - return vlseg4e32_v_f32m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_f32m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32mf2( @@ -72,7 +72,7 @@ void test_vlseg4e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32mf2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_i32mf2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m1( @@ -89,7 +89,7 @@ void test_vlseg4e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_i32m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m2( @@ -106,7 +106,7 @@ void test_vlseg4e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_i32m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32mf2( @@ -123,7 +123,7 @@ void test_vlseg4e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32mf2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_u32mf2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m1( @@ -140,7 +140,7 @@ void test_vlseg4e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_u32m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m2( @@ -157,7 +157,7 @@ void test_vlseg4e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e32_v_u32m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32mf2_m( @@ -174,7 +174,7 @@ void test_vlseg4e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, size_t vl) { - return vlseg4e32_v_f32mf2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_f32mf2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m1_m( @@ -191,7 +191,7 @@ void test_vlseg4e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, size_t vl) { - return vlseg4e32_v_f32m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_f32m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m2_m( @@ -208,7 +208,7 @@ void test_vlseg4e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, size_t vl) { - return vlseg4e32_v_f32m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_f32m2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32mf2_m( @@ -225,7 +225,7 @@ void test_vlseg4e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32mf2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_i32mf2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m1_m( @@ -242,7 +242,7 @@ void test_vlseg4e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_i32m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m2_m( @@ -259,7 +259,7 @@ void test_vlseg4e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_i32m2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32mf2_m( @@ -276,7 +276,7 @@ void test_vlseg4e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32mf2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_u32mf2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m1_m( @@ -293,7 +293,7 @@ void test_vlseg4e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_u32m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m2_m( @@ -310,6 +310,6 @@ void test_vlseg4e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e32_v_u32m2_m(v0, v1, v2, v3, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32ff.c index c085b9130bf41c33b63eeb2e22ba22639154ede6..6b4c323857aa78fa4fbf76f2605370429d45aa75 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e32ff.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32mf2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32mf2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m1( @@ -42,7 +42,7 @@ void test_vlseg4e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m2( @@ -61,7 +61,7 @@ void test_vlseg4e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32mf2( @@ -80,7 +80,7 @@ void test_vlseg4e32ff_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32mf2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32mf2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m1( @@ -99,7 +99,7 @@ void test_vlseg4e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m2( @@ -118,7 +118,7 @@ void test_vlseg4e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32mf2( @@ -137,7 +137,7 @@ void test_vlseg4e32ff_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32mf2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32mf2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m1( @@ -156,7 +156,7 @@ void test_vlseg4e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m2( @@ -175,7 +175,7 @@ void test_vlseg4e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32mf2_m( @@ -194,7 +194,7 @@ void test_vlseg4e32ff_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m1_m( @@ -213,7 +213,7 @@ void test_vlseg4e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m2_m( @@ -232,7 +232,7 @@ void test_vlseg4e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32mf2_m( @@ -251,7 +251,7 @@ void test_vlseg4e32ff_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m1_m( @@ -270,7 +270,7 @@ void test_vlseg4e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m2_m( @@ -289,7 +289,7 @@ void test_vlseg4e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32mf2_m( @@ -308,7 +308,7 @@ void test_vlseg4e32ff_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m1_m( @@ -327,7 +327,7 @@ void test_vlseg4e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m2_m( @@ -346,6 +346,6 @@ void test_vlseg4e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64.c index 7a3b26b5f8e990f488cf63bc623cb525c79db626..7253c2eec58550c7af5a05791d0840d3ea8bc196 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, size_t vl) { - return vlseg4e64_v_f64m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e64_v_f64m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m2( @@ -38,7 +38,7 @@ void test_vlseg4e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, size_t vl) { - return vlseg4e64_v_f64m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e64_v_f64m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m1( @@ -55,7 +55,7 @@ void test_vlseg4e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e64_v_i64m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m2( @@ -72,7 +72,7 @@ void test_vlseg4e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e64_v_i64m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m1( @@ -89,7 +89,7 @@ void test_vlseg4e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e64_v_u64m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m2( @@ -106,7 +106,7 @@ void test_vlseg4e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e64_v_u64m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m1_m( @@ -123,7 +123,7 @@ void test_vlseg4e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, size_t vl) { - return vlseg4e64_v_f64m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e64_v_f64m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m2_m( @@ -140,7 +140,7 @@ void test_vlseg4e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, size_t vl) { - return vlseg4e64_v_f64m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e64_v_f64m2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m1_m( @@ -157,7 +157,7 @@ void test_vlseg4e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e64_v_i64m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m2_m( @@ -174,7 +174,7 @@ void test_vlseg4e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e64_v_i64m2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m1_m( @@ -191,7 +191,7 @@ void test_vlseg4e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e64_v_u64m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m2_m( @@ -208,6 +208,6 @@ void test_vlseg4e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e64_v_u64m2_m(v0, v1, v2, v3, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64ff.c index b18ea64ecaae2f937ebf48e1edb3d71b11bd53f7..92e28f2a96743b82af0d1697914a602e81473874 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e64ff.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m2( @@ -42,7 +42,7 @@ void test_vlseg4e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m1( @@ -61,7 +61,7 @@ void test_vlseg4e64ff_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m2( @@ -80,7 +80,7 @@ void test_vlseg4e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m1( @@ -99,7 +99,7 @@ void test_vlseg4e64ff_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m2( @@ -118,7 +118,7 @@ void test_vlseg4e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m1_m( @@ -137,7 +137,7 @@ void test_vlseg4e64ff_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m2_m( @@ -156,7 +156,7 @@ void test_vlseg4e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m1_m( @@ -175,7 +175,7 @@ void test_vlseg4e64ff_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m2_m( @@ -194,7 +194,7 @@ void test_vlseg4e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m1_m( @@ -213,7 +213,7 @@ void test_vlseg4e64ff_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m2_m( @@ -232,6 +232,6 @@ void test_vlseg4e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8.c index 1855b3f3a904a7fd192b4a800c2b5860bc6f759f..7300012a945e1120cfc6cfdb1eb71b20e52d804b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8.c @@ -20,7 +20,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf8(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_i8mf8(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf4( @@ -37,7 +37,7 @@ void test_vlseg4e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf4(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_i8mf4(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf2( @@ -54,7 +54,7 @@ void test_vlseg4e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_i8mf2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m1( @@ -71,7 +71,7 @@ void test_vlseg4e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_i8m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m2( @@ -88,7 +88,7 @@ void test_vlseg4e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_i8m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf8( @@ -105,7 +105,7 @@ void test_vlseg4e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf8(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_u8mf8(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf4( @@ -122,7 +122,7 @@ void test_vlseg4e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf4(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_u8mf4(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf2( @@ -139,7 +139,7 @@ void test_vlseg4e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_u8mf2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m1( @@ -156,7 +156,7 @@ void test_vlseg4e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m1(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_u8m1(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m2( @@ -173,7 +173,7 @@ void test_vlseg4e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m2(v0, v1, v2, v3, base, vl); + return __riscv_vlseg4e8_v_u8m2(v0, v1, v2, v3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf8_m( @@ -190,7 +190,7 @@ void test_vlseg4e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf8_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_i8mf8_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf4_m( @@ -207,7 +207,7 @@ void test_vlseg4e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf4_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_i8mf4_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf2_m( @@ -224,7 +224,7 @@ void test_vlseg4e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_i8mf2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m1_m( @@ -241,7 +241,7 @@ void test_vlseg4e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_i8m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m2_m( @@ -258,7 +258,7 @@ void test_vlseg4e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_i8m2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf8_m( @@ -275,7 +275,7 @@ void test_vlseg4e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf8_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_u8mf8_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf4_m( @@ -292,7 +292,7 @@ void test_vlseg4e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf4_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_u8mf4_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf2_m( @@ -309,7 +309,7 @@ void test_vlseg4e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_u8mf2_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m1_m( @@ -326,7 +326,7 @@ void test_vlseg4e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m1_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_u8m1_m(v0, v1, v2, v3, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m2_m( @@ -343,6 +343,6 @@ void test_vlseg4e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m2_m(v0, v1, v2, v3, mask, base, vl); + return __riscv_vlseg4e8_v_u8m2_m(v0, v1, v2, v3, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8ff.c index ce3227920ea99a723f553df2a5bd447d6531de6f..0f50dad828fa7eacc84df168c0b8afbde310a1e0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg4e8ff.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf8(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf8(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf4( @@ -42,7 +42,7 @@ void test_vlseg4e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf4(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf4(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf2( @@ -61,7 +61,7 @@ void test_vlseg4e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m1( @@ -80,7 +80,7 @@ void test_vlseg4e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m2( @@ -99,7 +99,7 @@ void test_vlseg4e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf8( @@ -118,7 +118,7 @@ void test_vlseg4e8ff_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf8(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf8(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf4( @@ -137,7 +137,7 @@ void test_vlseg4e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf4(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf4(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf2( @@ -156,7 +156,7 @@ void test_vlseg4e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m1( @@ -175,7 +175,7 @@ void test_vlseg4e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m1(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m1(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m2( @@ -194,7 +194,7 @@ void test_vlseg4e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m2(v0, v1, v2, v3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m2(v0, v1, v2, v3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf8_m( @@ -213,7 +213,7 @@ void test_vlseg4e8ff_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf8_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf8_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf4_m( @@ -232,7 +232,7 @@ void test_vlseg4e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf2_m( @@ -251,7 +251,7 @@ void test_vlseg4e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m1_m( @@ -270,7 +270,7 @@ void test_vlseg4e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m2_m( @@ -289,7 +289,7 @@ void test_vlseg4e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf8_m( @@ -308,7 +308,7 @@ void test_vlseg4e8ff_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf8_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf8_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf4_m( @@ -327,7 +327,7 @@ void test_vlseg4e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf4_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf2_m( @@ -346,7 +346,7 @@ void test_vlseg4e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m1_m( @@ -365,7 +365,7 @@ void test_vlseg4e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m1_m(v0, v1, v2, v3, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m2_m( @@ -384,6 +384,6 @@ void test_vlseg4e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m2_m(v0, v1, v2, v3, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16.c index a6f1d4d4e1c9e601fbe570521ef7d37ff23c07da..01764f94ed1170bf4e73a9a7492b809c4074b634 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf4(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_f16mf4(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf2( @@ -42,7 +42,7 @@ void test_vlseg5e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf2(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_f16mf2(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16m1( @@ -61,7 +61,7 @@ void test_vlseg5e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_f16m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf4( @@ -80,7 +80,7 @@ void test_vlseg5e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf4(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_i16mf4(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf2( @@ -99,7 +99,7 @@ void test_vlseg5e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf2(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_i16mf2(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16m1( @@ -118,7 +118,7 @@ void test_vlseg5e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_i16m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf4( @@ -137,7 +137,7 @@ void test_vlseg5e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf4(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_u16mf4(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf2( @@ -156,7 +156,7 @@ void test_vlseg5e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf2(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_u16mf2(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16m1( @@ -175,7 +175,7 @@ void test_vlseg5e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e16_v_u16m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf4_m( @@ -194,7 +194,7 @@ void test_vlseg5e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf2_m( @@ -213,7 +213,7 @@ void test_vlseg5e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16m1_m( @@ -232,7 +232,7 @@ void test_vlseg5e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf4_m( @@ -251,7 +251,7 @@ void test_vlseg5e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf2_m( @@ -270,7 +270,7 @@ void test_vlseg5e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16m1_m( @@ -289,7 +289,7 @@ void test_vlseg5e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf4_m( @@ -308,7 +308,7 @@ void test_vlseg5e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf2_m( @@ -327,7 +327,7 @@ void test_vlseg5e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16m1_m( @@ -346,6 +346,6 @@ void test_vlseg5e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e16_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16ff.c index 64f16289b21a14fba2a3b32d05890bae622a86f8..c4e1a2cc6d49f975a4e2348162e6c4bf3cfe20af 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e16ff.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf4(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf4(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf2( @@ -46,7 +46,7 @@ void test_vlseg5e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf2(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf2(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16m1( @@ -67,7 +67,7 @@ void test_vlseg5e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf4( @@ -88,7 +88,7 @@ void test_vlseg5e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf4(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf4(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf2( @@ -109,7 +109,7 @@ void test_vlseg5e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf2(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf2(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16m1( @@ -130,7 +130,7 @@ void test_vlseg5e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf4( @@ -151,7 +151,7 @@ void test_vlseg5e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf4(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf4(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf2( @@ -172,7 +172,7 @@ void test_vlseg5e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf2(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf2(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16m1( @@ -193,7 +193,7 @@ void test_vlseg5e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf4_m( @@ -214,7 +214,7 @@ void test_vlseg5e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf2_m( @@ -235,7 +235,7 @@ void test_vlseg5e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16m1_m( @@ -256,7 +256,7 @@ void test_vlseg5e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf4_m( @@ -277,7 +277,7 @@ void test_vlseg5e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf2_m( @@ -298,7 +298,7 @@ void test_vlseg5e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16m1_m( @@ -319,7 +319,7 @@ void test_vlseg5e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf4_m( @@ -340,7 +340,7 @@ void test_vlseg5e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf2_m( @@ -361,7 +361,7 @@ void test_vlseg5e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16m1_m( @@ -382,6 +382,6 @@ void test_vlseg5e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32.c index 51bfca243262c215eb271791e903a04dedb8e70d..996a75996bfc1eb05409a3181c358c8dc717f5c2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, size_t vl) { - return vlseg5e32_v_f32mf2(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e32_v_f32mf2(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32m1( @@ -42,7 +42,7 @@ void test_vlseg5e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, size_t vl) { - return vlseg5e32_v_f32m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e32_v_f32m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32mf2( @@ -61,7 +61,7 @@ void test_vlseg5e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32mf2(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e32_v_i32mf2(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32m1( @@ -80,7 +80,7 @@ void test_vlseg5e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e32_v_i32m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32mf2( @@ -99,7 +99,7 @@ void test_vlseg5e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32mf2(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e32_v_u32mf2(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32m1( @@ -118,7 +118,7 @@ void test_vlseg5e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e32_v_u32m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32mf2_m( @@ -137,7 +137,7 @@ void test_vlseg5e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, size_t vl) { - return vlseg5e32_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e32_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32m1_m( @@ -156,7 +156,7 @@ void test_vlseg5e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, size_t vl) { - return vlseg5e32_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e32_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32mf2_m( @@ -175,7 +175,7 @@ void test_vlseg5e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e32_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32m1_m( @@ -194,7 +194,7 @@ void test_vlseg5e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e32_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32mf2_m( @@ -213,7 +213,7 @@ void test_vlseg5e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e32_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32m1_m( @@ -232,6 +232,6 @@ void test_vlseg5e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e32_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32ff.c index 4918595da73ddb01a7d7ee5dd8491b05bcbb9aaa..5d0fada9413c84e018b498f7fe46f2a59b631d92 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e32ff.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32mf2(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32mf2(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32m1( @@ -46,7 +46,7 @@ void test_vlseg5e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32mf2( @@ -67,7 +67,7 @@ void test_vlseg5e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32mf2(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32mf2(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32m1( @@ -88,7 +88,7 @@ void test_vlseg5e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32mf2( @@ -109,7 +109,7 @@ void test_vlseg5e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32mf2(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32mf2(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32m1( @@ -130,7 +130,7 @@ void test_vlseg5e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32mf2_m( @@ -151,7 +151,7 @@ void test_vlseg5e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32m1_m( @@ -172,7 +172,7 @@ void test_vlseg5e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32mf2_m( @@ -193,7 +193,7 @@ void test_vlseg5e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32m1_m( @@ -214,7 +214,7 @@ void test_vlseg5e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32mf2_m( @@ -235,7 +235,7 @@ void test_vlseg5e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32m1_m( @@ -256,6 +256,6 @@ void test_vlseg5e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64.c index 37712de9262eeffdb281ca9d6492c421a883f0d1..391400f380f6b2113db7686df373d186c46def4c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, size_t vl) { - return vlseg5e64_v_f64m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e64_v_f64m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_i64m1( @@ -42,7 +42,7 @@ void test_vlseg5e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, size_t vl) { - return vlseg5e64_v_i64m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e64_v_i64m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_u64m1( @@ -61,7 +61,7 @@ void test_vlseg5e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, size_t vl) { - return vlseg5e64_v_u64m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e64_v_u64m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_f64m1_m( @@ -80,7 +80,7 @@ void test_vlseg5e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, size_t vl) { - return vlseg5e64_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e64_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_i64m1_m( @@ -99,7 +99,7 @@ void test_vlseg5e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, size_t vl) { - return vlseg5e64_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e64_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_u64m1_m( @@ -118,6 +118,6 @@ void test_vlseg5e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, size_t vl) { - return vlseg5e64_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e64_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64ff.c index 3d0e8606234cbef3914525b69bd7a29c4ab6d94e..78e27dc3c780de86a0ae0826279a438dc41c0f70 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e64ff.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_f64m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_f64m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_i64m1( @@ -46,7 +46,7 @@ void test_vlseg5e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_i64m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_i64m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_u64m1( @@ -67,7 +67,7 @@ void test_vlseg5e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_u64m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_u64m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_f64m1_m( @@ -88,7 +88,7 @@ void test_vlseg5e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_i64m1_m( @@ -109,7 +109,7 @@ void test_vlseg5e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_u64m1_m( @@ -130,6 +130,6 @@ void test_vlseg5e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8.c index 120396587529dcab595325f1005c812fa3b5b040..fe79f70edc0e9f4d32e5de16d29d95bb34a3ab15 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8.c @@ -22,7 +22,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf8(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e8_v_i8mf8(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf4( @@ -41,7 +41,7 @@ void test_vlseg5e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf4(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e8_v_i8mf4(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf2( @@ -60,7 +60,7 @@ void test_vlseg5e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf2(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e8_v_i8mf2(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8m1( @@ -79,7 +79,7 @@ void test_vlseg5e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e8_v_i8m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf8( @@ -98,7 +98,7 @@ void test_vlseg5e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf8(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e8_v_u8mf8(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf4( @@ -117,7 +117,7 @@ void test_vlseg5e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf4(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e8_v_u8mf4(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf2( @@ -136,7 +136,7 @@ void test_vlseg5e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf2(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e8_v_u8mf2(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8m1( @@ -155,7 +155,7 @@ void test_vlseg5e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8m1(v0, v1, v2, v3, v4, base, vl); + return __riscv_vlseg5e8_v_u8m1(v0, v1, v2, v3, v4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf8_m( @@ -174,7 +174,7 @@ void test_vlseg5e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e8_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf4_m( @@ -193,7 +193,7 @@ void test_vlseg5e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e8_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf2_m( @@ -212,7 +212,7 @@ void test_vlseg5e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e8_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8m1_m( @@ -231,7 +231,7 @@ void test_vlseg5e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e8_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf8_m( @@ -250,7 +250,7 @@ void test_vlseg5e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e8_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf4_m( @@ -269,7 +269,7 @@ void test_vlseg5e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e8_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf2_m( @@ -288,7 +288,7 @@ void test_vlseg5e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e8_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8m1_m( @@ -307,6 +307,6 @@ void test_vlseg5e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, vl); + return __riscv_vlseg5e8_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8ff.c index c31a01aaf15f6fe584ddff48477077198377a310..cb26d1b57dccfc151f0dc47583e425e0c850a9db 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg5e8ff.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf8(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf8(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf4( @@ -46,7 +46,7 @@ void test_vlseg5e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf4(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf4(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf2( @@ -67,7 +67,7 @@ void test_vlseg5e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf2(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf2(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8m1( @@ -88,7 +88,7 @@ void test_vlseg5e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf8( @@ -109,7 +109,7 @@ void test_vlseg5e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf8(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf8(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf4( @@ -130,7 +130,7 @@ void test_vlseg5e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf4(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf4(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf2( @@ -151,7 +151,7 @@ void test_vlseg5e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf2(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf2(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8m1( @@ -172,7 +172,7 @@ void test_vlseg5e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8m1(v0, v1, v2, v3, v4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8m1(v0, v1, v2, v3, v4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf8_m( @@ -193,7 +193,7 @@ void test_vlseg5e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf4_m( @@ -214,7 +214,7 @@ void test_vlseg5e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf2_m( @@ -235,7 +235,7 @@ void test_vlseg5e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8m1_m( @@ -256,7 +256,7 @@ void test_vlseg5e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf8_m( @@ -277,7 +277,7 @@ void test_vlseg5e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf4_m( @@ -298,7 +298,7 @@ void test_vlseg5e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf2_m( @@ -319,7 +319,7 @@ void test_vlseg5e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8m1_m( @@ -340,6 +340,6 @@ void test_vlseg5e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16.c index 4eab7bae122d8333bce44125a1a1a08e29a7bdaa..145e3bd88f4fcd9893da5d7838c0a5af1ffd85b4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf4(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_f16mf4(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf2( @@ -46,7 +46,7 @@ void test_vlseg6e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf2(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_f16mf2(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16m1( @@ -67,7 +67,7 @@ void test_vlseg6e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_f16m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf4( @@ -88,7 +88,7 @@ void test_vlseg6e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf4(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_i16mf4(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf2( @@ -109,7 +109,7 @@ void test_vlseg6e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf2(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_i16mf2(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16m1( @@ -130,7 +130,7 @@ void test_vlseg6e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_i16m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf4( @@ -151,7 +151,7 @@ void test_vlseg6e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf4(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_u16mf4(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf2( @@ -172,7 +172,7 @@ void test_vlseg6e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf2(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_u16mf2(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16m1( @@ -193,7 +193,7 @@ void test_vlseg6e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e16_v_u16m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf4_m( @@ -214,7 +214,7 @@ void test_vlseg6e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf2_m( @@ -235,7 +235,7 @@ void test_vlseg6e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16m1_m( @@ -256,7 +256,7 @@ void test_vlseg6e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf4_m( @@ -277,7 +277,7 @@ void test_vlseg6e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf2_m( @@ -298,7 +298,7 @@ void test_vlseg6e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16m1_m( @@ -319,7 +319,7 @@ void test_vlseg6e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf4_m( @@ -340,7 +340,7 @@ void test_vlseg6e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf2_m( @@ -361,7 +361,7 @@ void test_vlseg6e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16m1_m( @@ -382,6 +382,6 @@ void test_vlseg6e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16ff.c index 1ce0af87b187beb8dd3f9450e503263201c27026..7568223781822fcdb036730c4ed38e62ec70113b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e16ff.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf2( @@ -50,7 +50,7 @@ void test_vlseg6e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16m1( @@ -73,7 +73,7 @@ void test_vlseg6e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf4( @@ -96,7 +96,7 @@ void test_vlseg6e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf2( @@ -119,7 +119,7 @@ void test_vlseg6e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16m1( @@ -142,7 +142,7 @@ void test_vlseg6e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf4( @@ -165,7 +165,7 @@ void test_vlseg6e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf2( @@ -188,7 +188,7 @@ void test_vlseg6e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16m1( @@ -211,7 +211,7 @@ void test_vlseg6e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf4_m( @@ -234,7 +234,7 @@ void test_vlseg6e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf2_m( @@ -257,7 +257,7 @@ void test_vlseg6e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16m1_m( @@ -280,7 +280,7 @@ void test_vlseg6e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf4_m( @@ -303,7 +303,7 @@ void test_vlseg6e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf2_m( @@ -326,7 +326,7 @@ void test_vlseg6e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16m1_m( @@ -349,7 +349,7 @@ void test_vlseg6e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf4_m( @@ -372,7 +372,7 @@ void test_vlseg6e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf2_m( @@ -395,7 +395,7 @@ void test_vlseg6e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16m1_m( @@ -418,6 +418,6 @@ void test_vlseg6e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32.c index b200bbb5460ffb143ba4243c17c21edaead7e927..a8e6c0c1d7090979d1cecccaeff678c7e283cbe5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, size_t vl) { - return vlseg6e32_v_f32mf2(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e32_v_f32mf2(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32m1( @@ -46,7 +46,7 @@ void test_vlseg6e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, size_t vl) { - return vlseg6e32_v_f32m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e32_v_f32m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32mf2( @@ -67,7 +67,7 @@ void test_vlseg6e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32mf2(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e32_v_i32mf2(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32m1( @@ -88,7 +88,7 @@ void test_vlseg6e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e32_v_i32m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32mf2( @@ -109,7 +109,7 @@ void test_vlseg6e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32mf2(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e32_v_u32mf2(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32m1( @@ -130,7 +130,7 @@ void test_vlseg6e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e32_v_u32m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32mf2_m( @@ -151,7 +151,7 @@ void test_vlseg6e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, size_t vl) { - return vlseg6e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32m1_m( @@ -172,7 +172,7 @@ void test_vlseg6e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, size_t vl) { - return vlseg6e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32mf2_m( @@ -193,7 +193,7 @@ void test_vlseg6e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32m1_m( @@ -214,7 +214,7 @@ void test_vlseg6e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32mf2_m( @@ -235,7 +235,7 @@ void test_vlseg6e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32m1_m( @@ -256,6 +256,6 @@ void test_vlseg6e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32ff.c index 4ab705e4dec76e748edcb32fd33562da02d5ad11..932fab44f71b5bfe59d158542c879c48160e856c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e32ff.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32m1( @@ -50,7 +50,7 @@ void test_vlseg6e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32mf2( @@ -73,7 +73,7 @@ void test_vlseg6e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32m1( @@ -96,7 +96,7 @@ void test_vlseg6e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32mf2( @@ -119,7 +119,7 @@ void test_vlseg6e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32m1( @@ -142,7 +142,7 @@ void test_vlseg6e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32mf2_m( @@ -165,7 +165,7 @@ void test_vlseg6e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32m1_m( @@ -188,7 +188,7 @@ void test_vlseg6e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32mf2_m( @@ -211,7 +211,7 @@ void test_vlseg6e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32m1_m( @@ -234,7 +234,7 @@ void test_vlseg6e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32mf2_m( @@ -257,7 +257,7 @@ void test_vlseg6e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32m1_m( @@ -280,6 +280,6 @@ void test_vlseg6e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64.c index c6774f1c6a045c16f03e8094b42964cca0548ea9..6c97c6bab892de14b05e7e0c00273cd3a9ebcb49 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, size_t vl) { - return vlseg6e64_v_f64m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e64_v_f64m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_i64m1( @@ -46,7 +46,7 @@ void test_vlseg6e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, size_t vl) { - return vlseg6e64_v_i64m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e64_v_i64m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_u64m1( @@ -67,7 +67,7 @@ void test_vlseg6e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, size_t vl) { - return vlseg6e64_v_u64m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e64_v_u64m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_f64m1_m( @@ -88,7 +88,7 @@ void test_vlseg6e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, size_t vl) { - return vlseg6e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_i64m1_m( @@ -109,7 +109,7 @@ void test_vlseg6e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, size_t vl) { - return vlseg6e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_u64m1_m( @@ -130,6 +130,6 @@ void test_vlseg6e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, size_t vl) { - return vlseg6e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64ff.c index 6ac666ab8c5fda93f9b8a29d43720555fbad09e8..f1e9d62ddd24c49a8142a66372b2f881e6884e8a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e64ff.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_f64m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_f64m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_i64m1( @@ -50,7 +50,7 @@ void test_vlseg6e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_i64m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_i64m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_u64m1( @@ -73,7 +73,7 @@ void test_vlseg6e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_u64m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_u64m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_f64m1_m( @@ -96,7 +96,7 @@ void test_vlseg6e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_i64m1_m( @@ -119,7 +119,7 @@ void test_vlseg6e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_u64m1_m( @@ -142,6 +142,6 @@ void test_vlseg6e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8.c index 01b1f73662abbe50257b5860db858568bba80480..6ec75d36dede47fc453301653b4e9129fdbf00d1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8.c @@ -24,7 +24,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf8(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e8_v_i8mf8(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf4( @@ -45,7 +45,7 @@ void test_vlseg6e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf4(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e8_v_i8mf4(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf2( @@ -66,7 +66,7 @@ void test_vlseg6e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf2(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e8_v_i8mf2(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8m1( @@ -87,7 +87,7 @@ void test_vlseg6e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e8_v_i8m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf8( @@ -108,7 +108,7 @@ void test_vlseg6e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf8(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e8_v_u8mf8(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf4( @@ -129,7 +129,7 @@ void test_vlseg6e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf4(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e8_v_u8mf4(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf2( @@ -150,7 +150,7 @@ void test_vlseg6e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf2(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e8_v_u8mf2(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8m1( @@ -171,7 +171,7 @@ void test_vlseg6e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8m1(v0, v1, v2, v3, v4, v5, base, vl); + return __riscv_vlseg6e8_v_u8m1(v0, v1, v2, v3, v4, v5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf8_m( @@ -192,7 +192,7 @@ void test_vlseg6e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf4_m( @@ -213,7 +213,7 @@ void test_vlseg6e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf2_m( @@ -234,7 +234,7 @@ void test_vlseg6e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8m1_m( @@ -255,7 +255,7 @@ void test_vlseg6e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf8_m( @@ -276,7 +276,7 @@ void test_vlseg6e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf4_m( @@ -297,7 +297,7 @@ void test_vlseg6e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf2_m( @@ -318,7 +318,7 @@ void test_vlseg6e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8m1_m( @@ -339,6 +339,6 @@ void test_vlseg6e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); + return __riscv_vlseg6e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8ff.c index 3720f925666e2389d505d12845e66702bd1abe47..c3f5840a44602264bc0395bd8dd545374d275c77 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg6e8ff.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf8(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf8(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf4( @@ -50,7 +50,7 @@ void test_vlseg6e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf2( @@ -73,7 +73,7 @@ void test_vlseg6e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8m1( @@ -96,7 +96,7 @@ void test_vlseg6e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf8( @@ -119,7 +119,7 @@ void test_vlseg6e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf8(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf8(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf4( @@ -142,7 +142,7 @@ void test_vlseg6e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf4(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf2( @@ -165,7 +165,7 @@ void test_vlseg6e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf2(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8m1( @@ -188,7 +188,7 @@ void test_vlseg6e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8m1(v0, v1, v2, v3, v4, v5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf8_m( @@ -211,7 +211,7 @@ void test_vlseg6e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf4_m( @@ -234,7 +234,7 @@ void test_vlseg6e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf2_m( @@ -257,7 +257,7 @@ void test_vlseg6e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8m1_m( @@ -280,7 +280,7 @@ void test_vlseg6e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf8_m( @@ -303,7 +303,7 @@ void test_vlseg6e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf4_m( @@ -326,7 +326,7 @@ void test_vlseg6e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf2_m( @@ -349,7 +349,7 @@ void test_vlseg6e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8m1_m( @@ -372,6 +372,6 @@ void test_vlseg6e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16.c index f1c7fe46089777ec2ac2ab5c520c4ef2e95335f0..c51042e434aef12aeed7845f45c795fbe6ba42b2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf2( @@ -50,7 +50,7 @@ void test_vlseg7e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16m1( @@ -73,7 +73,7 @@ void test_vlseg7e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf4( @@ -96,7 +96,7 @@ void test_vlseg7e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf2( @@ -119,7 +119,7 @@ void test_vlseg7e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16m1( @@ -142,7 +142,7 @@ void test_vlseg7e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf4( @@ -165,7 +165,7 @@ void test_vlseg7e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf2( @@ -188,7 +188,7 @@ void test_vlseg7e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16m1( @@ -211,7 +211,7 @@ void test_vlseg7e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf4_m( @@ -234,7 +234,7 @@ void test_vlseg7e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf2_m( @@ -257,7 +257,7 @@ void test_vlseg7e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16m1_m( @@ -280,7 +280,7 @@ void test_vlseg7e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf4_m( @@ -303,7 +303,7 @@ void test_vlseg7e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf2_m( @@ -326,7 +326,7 @@ void test_vlseg7e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16m1_m( @@ -349,7 +349,7 @@ void test_vlseg7e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf4_m( @@ -372,7 +372,7 @@ void test_vlseg7e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf2_m( @@ -395,7 +395,7 @@ void test_vlseg7e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16m1_m( @@ -418,6 +418,6 @@ void test_vlseg7e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16ff.c index a0762903551ba19e8787e46103893b7dd3ee1c96..12370830731894e96cfc6bf221e7b864b9f99fc2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e16ff.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf2( @@ -54,7 +54,7 @@ void test_vlseg7e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16m1( @@ -79,7 +79,7 @@ void test_vlseg7e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf4( @@ -104,7 +104,7 @@ void test_vlseg7e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf2( @@ -129,7 +129,7 @@ void test_vlseg7e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16m1( @@ -154,7 +154,7 @@ void test_vlseg7e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf4( @@ -179,7 +179,7 @@ void test_vlseg7e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf2( @@ -204,7 +204,7 @@ void test_vlseg7e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16m1( @@ -229,7 +229,7 @@ void test_vlseg7e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf4_m( @@ -254,7 +254,7 @@ void test_vlseg7e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf2_m( @@ -279,7 +279,7 @@ void test_vlseg7e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16m1_m( @@ -304,7 +304,7 @@ void test_vlseg7e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf4_m( @@ -329,7 +329,7 @@ void test_vlseg7e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf2_m( @@ -354,7 +354,7 @@ void test_vlseg7e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16m1_m( @@ -379,7 +379,7 @@ void test_vlseg7e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf4_m( @@ -404,7 +404,7 @@ void test_vlseg7e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf2_m( @@ -429,7 +429,7 @@ void test_vlseg7e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16m1_m( @@ -454,6 +454,6 @@ void test_vlseg7e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32.c index 5ee74619bcceb471e8792c2d7caab154ac9b109a..73af9f482f9cb176ed63d01fc9f3c5519e1ba4a0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, size_t vl) { - return vlseg7e32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32m1( @@ -50,7 +50,7 @@ void test_vlseg7e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, size_t vl) { - return vlseg7e32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32mf2( @@ -73,7 +73,7 @@ void test_vlseg7e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32m1( @@ -96,7 +96,7 @@ void test_vlseg7e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32mf2( @@ -119,7 +119,7 @@ void test_vlseg7e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32m1( @@ -142,7 +142,7 @@ void test_vlseg7e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32mf2_m( @@ -165,7 +165,7 @@ void test_vlseg7e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, size_t vl) { - return vlseg7e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32m1_m( @@ -188,7 +188,7 @@ void test_vlseg7e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, size_t vl) { - return vlseg7e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32mf2_m( @@ -211,7 +211,7 @@ void test_vlseg7e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32m1_m( @@ -234,7 +234,7 @@ void test_vlseg7e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32mf2_m( @@ -257,7 +257,7 @@ void test_vlseg7e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32m1_m( @@ -280,6 +280,6 @@ void test_vlseg7e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32ff.c index db505f1557481231d2d505ad71539f488b3cd6e5..134b2ff0c4fa61933f27827462f850f9e7beede6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e32ff.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32m1( @@ -54,7 +54,7 @@ void test_vlseg7e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32mf2( @@ -79,7 +79,7 @@ void test_vlseg7e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32m1( @@ -104,7 +104,7 @@ void test_vlseg7e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32mf2( @@ -129,7 +129,7 @@ void test_vlseg7e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32m1( @@ -154,7 +154,7 @@ void test_vlseg7e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32mf2_m( @@ -179,7 +179,7 @@ void test_vlseg7e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32m1_m( @@ -204,7 +204,7 @@ void test_vlseg7e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32mf2_m( @@ -229,7 +229,7 @@ void test_vlseg7e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32m1_m( @@ -254,7 +254,7 @@ void test_vlseg7e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32mf2_m( @@ -279,7 +279,7 @@ void test_vlseg7e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32m1_m( @@ -304,6 +304,6 @@ void test_vlseg7e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64.c index 7b6eb3e3542fd19e834128b3df1445e55c6af1f2..2e6ebf1ce92acec4151728799896fa840b292402 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, size_t vl) { - return vlseg7e64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_i64m1( @@ -50,7 +50,7 @@ void test_vlseg7e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, size_t vl) { - return vlseg7e64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_u64m1( @@ -73,7 +73,7 @@ void test_vlseg7e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, size_t vl) { - return vlseg7e64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_f64m1_m( @@ -96,7 +96,7 @@ void test_vlseg7e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, size_t vl) { - return vlseg7e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_i64m1_m( @@ -119,7 +119,7 @@ void test_vlseg7e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, size_t vl) { - return vlseg7e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_u64m1_m( @@ -142,6 +142,6 @@ void test_vlseg7e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, size_t vl) { - return vlseg7e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64ff.c index 233bb52c9297e391743f358912bdba28c6c8e7e7..beae1e0cdd5a808c33e736d0d7a938c3086b9df7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e64ff.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_i64m1( @@ -54,7 +54,7 @@ void test_vlseg7e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_u64m1( @@ -79,7 +79,7 @@ void test_vlseg7e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_f64m1_m( @@ -104,7 +104,7 @@ void test_vlseg7e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_i64m1_m( @@ -129,7 +129,7 @@ void test_vlseg7e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_u64m1_m( @@ -154,6 +154,6 @@ void test_vlseg7e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8.c index f3a5baef4b805c68bca36383178eab1eee181803..35a7e973898879b4a80b11f15b6eb512beac2c8c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8.c @@ -26,7 +26,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf4( @@ -49,7 +49,7 @@ void test_vlseg7e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf2( @@ -72,7 +72,7 @@ void test_vlseg7e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8m1( @@ -95,7 +95,7 @@ void test_vlseg7e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf8( @@ -118,7 +118,7 @@ void test_vlseg7e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf4( @@ -141,7 +141,7 @@ void test_vlseg7e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf2( @@ -164,7 +164,7 @@ void test_vlseg7e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8m1( @@ -187,7 +187,7 @@ void test_vlseg7e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, vl); + return __riscv_vlseg7e8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf8_m( @@ -210,7 +210,7 @@ void test_vlseg7e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf4_m( @@ -233,7 +233,7 @@ void test_vlseg7e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf2_m( @@ -256,7 +256,7 @@ void test_vlseg7e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8m1_m( @@ -279,7 +279,7 @@ void test_vlseg7e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf8_m( @@ -302,7 +302,7 @@ void test_vlseg7e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf4_m( @@ -325,7 +325,7 @@ void test_vlseg7e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf2_m( @@ -348,7 +348,7 @@ void test_vlseg7e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8m1_m( @@ -371,6 +371,6 @@ void test_vlseg7e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); + return __riscv_vlseg7e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8ff.c index 476363946bb0cfd0b0e68661624d32ad2f80d7d1..a0890bb9909d610b4cddd17397dea422b4071e04 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg7e8ff.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf4( @@ -54,7 +54,7 @@ void test_vlseg7e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf2( @@ -79,7 +79,7 @@ void test_vlseg7e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8m1( @@ -104,7 +104,7 @@ void test_vlseg7e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf8( @@ -129,7 +129,7 @@ void test_vlseg7e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf4( @@ -154,7 +154,7 @@ void test_vlseg7e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf2( @@ -179,7 +179,7 @@ void test_vlseg7e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8m1( @@ -204,7 +204,7 @@ void test_vlseg7e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf8_m( @@ -229,7 +229,7 @@ void test_vlseg7e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf4_m( @@ -254,7 +254,7 @@ void test_vlseg7e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf2_m( @@ -279,7 +279,7 @@ void test_vlseg7e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8m1_m( @@ -304,7 +304,7 @@ void test_vlseg7e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf8_m( @@ -329,7 +329,7 @@ void test_vlseg7e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf4_m( @@ -354,7 +354,7 @@ void test_vlseg7e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf2_m( @@ -379,7 +379,7 @@ void test_vlseg7e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8m1_m( @@ -404,6 +404,6 @@ void test_vlseg7e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16.c index b16c3fab61da7270438c4942f367896bebf07e86..01016492409d949f1ac581fa697fe43ddbbd18b2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf2( @@ -54,7 +54,7 @@ void test_vlseg8e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16m1( @@ -79,7 +79,7 @@ void test_vlseg8e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf4( @@ -104,7 +104,7 @@ void test_vlseg8e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf2( @@ -129,7 +129,7 @@ void test_vlseg8e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16m1( @@ -154,7 +154,7 @@ void test_vlseg8e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf4( @@ -179,7 +179,7 @@ void test_vlseg8e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf2( @@ -204,7 +204,7 @@ void test_vlseg8e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16m1( @@ -229,7 +229,7 @@ void test_vlseg8e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf4_m( @@ -254,7 +254,7 @@ void test_vlseg8e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf2_m( @@ -279,7 +279,7 @@ void test_vlseg8e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16m1_m( @@ -304,7 +304,7 @@ void test_vlseg8e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf4_m( @@ -329,7 +329,7 @@ void test_vlseg8e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf2_m( @@ -354,7 +354,7 @@ void test_vlseg8e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16m1_m( @@ -379,7 +379,7 @@ void test_vlseg8e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf4_m( @@ -404,7 +404,7 @@ void test_vlseg8e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf2_m( @@ -429,7 +429,7 @@ void test_vlseg8e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16m1_m( @@ -454,6 +454,6 @@ void test_vlseg8e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16ff.c index c4df021c5a0b3a50aef6b39bebcee6d488e8a31f..bb9010273ac6ac7d1b69630fc17a9f4d46efb2a7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e16ff.c @@ -31,7 +31,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf2( @@ -58,7 +58,7 @@ void test_vlseg8e16ff_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16m1( @@ -85,7 +85,7 @@ void test_vlseg8e16ff_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf4( @@ -112,7 +112,7 @@ void test_vlseg8e16ff_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf2( @@ -139,7 +139,7 @@ void test_vlseg8e16ff_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16m1( @@ -166,7 +166,7 @@ void test_vlseg8e16ff_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf4( @@ -193,7 +193,7 @@ void test_vlseg8e16ff_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf2( @@ -220,7 +220,7 @@ void test_vlseg8e16ff_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16m1( @@ -247,7 +247,7 @@ void test_vlseg8e16ff_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf4_m( @@ -274,7 +274,7 @@ void test_vlseg8e16ff_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf2_m( @@ -301,7 +301,7 @@ void test_vlseg8e16ff_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16m1_m( @@ -328,7 +328,7 @@ void test_vlseg8e16ff_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf4_m( @@ -355,7 +355,7 @@ void test_vlseg8e16ff_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf2_m( @@ -382,7 +382,7 @@ void test_vlseg8e16ff_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16m1_m( @@ -409,7 +409,7 @@ void test_vlseg8e16ff_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf4_m( @@ -436,7 +436,7 @@ void test_vlseg8e16ff_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf2_m( @@ -463,7 +463,7 @@ void test_vlseg8e16ff_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16m1_m( @@ -490,6 +490,6 @@ void test_vlseg8e16ff_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32.c index 09bdbbede673d601249d4cbce4a078ccd8fd3267..ac6354a458d13ee415b8f8fbdaa82345bfe05328 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, size_t vl) { - return vlseg8e32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32m1( @@ -54,7 +54,7 @@ void test_vlseg8e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, size_t vl) { - return vlseg8e32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32mf2( @@ -79,7 +79,7 @@ void test_vlseg8e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32m1( @@ -104,7 +104,7 @@ void test_vlseg8e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32mf2( @@ -129,7 +129,7 @@ void test_vlseg8e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32m1( @@ -154,7 +154,7 @@ void test_vlseg8e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32mf2_m( @@ -179,7 +179,7 @@ void test_vlseg8e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, size_t vl) { - return vlseg8e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32m1_m( @@ -204,7 +204,7 @@ void test_vlseg8e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, size_t vl) { - return vlseg8e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32mf2_m( @@ -229,7 +229,7 @@ void test_vlseg8e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32m1_m( @@ -254,7 +254,7 @@ void test_vlseg8e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32mf2_m( @@ -279,7 +279,7 @@ void test_vlseg8e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32m1_m( @@ -304,6 +304,6 @@ void test_vlseg8e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32ff.c index a6b550bdc42ba1485cfaa407e823f0713baa85c0..6e6cbf6884fcce2cf6f9417b4589ea867b6b6654 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e32ff.c @@ -31,7 +31,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32m1( @@ -58,7 +58,7 @@ void test_vlseg8e32ff_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32mf2( @@ -85,7 +85,7 @@ void test_vlseg8e32ff_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32m1( @@ -112,7 +112,7 @@ void test_vlseg8e32ff_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32mf2( @@ -139,7 +139,7 @@ void test_vlseg8e32ff_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32m1( @@ -166,7 +166,7 @@ void test_vlseg8e32ff_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32mf2_m( @@ -193,7 +193,7 @@ void test_vlseg8e32ff_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32m1_m( @@ -220,7 +220,7 @@ void test_vlseg8e32ff_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32mf2_m( @@ -247,7 +247,7 @@ void test_vlseg8e32ff_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32m1_m( @@ -274,7 +274,7 @@ void test_vlseg8e32ff_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32mf2_m( @@ -301,7 +301,7 @@ void test_vlseg8e32ff_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32m1_m( @@ -328,6 +328,6 @@ void test_vlseg8e32ff_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64.c index 2b25009ab2742630b53f90d251e11690974a6d91..d041e915e4e6a2ce3e51ac399f4b9ab32237be60 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, size_t vl) { - return vlseg8e64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_i64m1( @@ -54,7 +54,7 @@ void test_vlseg8e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, size_t vl) { - return vlseg8e64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_u64m1( @@ -79,7 +79,7 @@ void test_vlseg8e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, size_t vl) { - return vlseg8e64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_f64m1_m( @@ -104,7 +104,7 @@ void test_vlseg8e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, size_t vl) { - return vlseg8e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_i64m1_m( @@ -129,7 +129,7 @@ void test_vlseg8e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, size_t vl) { - return vlseg8e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_u64m1_m( @@ -154,6 +154,6 @@ void test_vlseg8e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, size_t vl) { - return vlseg8e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64ff.c index 7a6645c15e1364c5b123a994cc95cdb4fa189d66..1fb1692bcf1e133245978cbc7c730e8ef18aa2e2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e64ff.c @@ -31,7 +31,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_i64m1( @@ -58,7 +58,7 @@ void test_vlseg8e64ff_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_u64m1( @@ -85,7 +85,7 @@ void test_vlseg8e64ff_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_f64m1_m( @@ -112,7 +112,7 @@ void test_vlseg8e64ff_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_i64m1_m( @@ -139,7 +139,7 @@ void test_vlseg8e64ff_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_u64m1_m( @@ -166,6 +166,6 @@ void test_vlseg8e64ff_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8.c index 193ae7913090d453187bae4a1e50e6160da6ae5d..c1ac554b89c66af5ed690393306418666ed366d0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8.c @@ -28,7 +28,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf4( @@ -53,7 +53,7 @@ void test_vlseg8e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf2( @@ -78,7 +78,7 @@ void test_vlseg8e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8m1( @@ -103,7 +103,7 @@ void test_vlseg8e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf8( @@ -128,7 +128,7 @@ void test_vlseg8e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf4( @@ -153,7 +153,7 @@ void test_vlseg8e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf2( @@ -178,7 +178,7 @@ void test_vlseg8e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8m1( @@ -203,7 +203,7 @@ void test_vlseg8e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); + return __riscv_vlseg8e8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf8_m( @@ -228,7 +228,7 @@ void test_vlseg8e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf4_m( @@ -253,7 +253,7 @@ void test_vlseg8e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf2_m( @@ -278,7 +278,7 @@ void test_vlseg8e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8m1_m( @@ -303,7 +303,7 @@ void test_vlseg8e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf8_m( @@ -328,7 +328,7 @@ void test_vlseg8e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf4_m( @@ -353,7 +353,7 @@ void test_vlseg8e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf2_m( @@ -378,7 +378,7 @@ void test_vlseg8e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8m1_m( @@ -403,6 +403,6 @@ void test_vlseg8e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); + return __riscv_vlseg8e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8ff.c index 6aee11d46d61db495f2edffdfdd406b10d1964d4..45325b57152efb1475cecfcab16a1cfea6e517ca 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg8e8ff.c @@ -31,7 +31,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf4( @@ -58,7 +58,7 @@ void test_vlseg8e8ff_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf2( @@ -85,7 +85,7 @@ void test_vlseg8e8ff_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8m1( @@ -112,7 +112,7 @@ void test_vlseg8e8ff_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf8( @@ -139,7 +139,7 @@ void test_vlseg8e8ff_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf4( @@ -166,7 +166,7 @@ void test_vlseg8e8ff_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf2( @@ -193,7 +193,7 @@ void test_vlseg8e8ff_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8m1( @@ -220,7 +220,7 @@ void test_vlseg8e8ff_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf8_m( @@ -247,7 +247,7 @@ void test_vlseg8e8ff_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf4_m( @@ -274,7 +274,7 @@ void test_vlseg8e8ff_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf2_m( @@ -301,7 +301,7 @@ void test_vlseg8e8ff_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vlseg8e8ff_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf8_m( @@ -355,7 +355,7 @@ void test_vlseg8e8ff_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf4_m( @@ -382,7 +382,7 @@ void test_vlseg8e8ff_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vlseg8e8ff_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8m1_m( @@ -436,6 +436,6 @@ void test_vlseg8e8ff_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e16.c index 8643592475bbd02e5da088c12a4fb62e9bfc9c6a..82f2c67d2c7164cdbb517b8d07e2782fc0308acc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e16.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf2( @@ -30,7 +30,7 @@ void test_vlsseg2e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m1( @@ -43,7 +43,7 @@ void test_vlsseg2e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m2( @@ -56,7 +56,7 @@ void test_vlsseg2e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m4( @@ -69,7 +69,7 @@ void test_vlsseg2e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf4( @@ -82,7 +82,7 @@ void test_vlsseg2e16_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf2( @@ -95,7 +95,7 @@ void test_vlsseg2e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m1( @@ -108,7 +108,7 @@ void test_vlsseg2e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m2( @@ -121,7 +121,7 @@ void test_vlsseg2e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m4( @@ -134,7 +134,7 @@ void test_vlsseg2e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf4( @@ -147,7 +147,7 @@ void test_vlsseg2e16_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf2( @@ -160,7 +160,7 @@ void test_vlsseg2e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m1( @@ -173,7 +173,7 @@ void test_vlsseg2e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m2( @@ -186,7 +186,7 @@ void test_vlsseg2e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m4( @@ -199,7 +199,7 @@ void test_vlsseg2e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf4_m( @@ -212,7 +212,7 @@ void test_vlsseg2e16_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf2_m( @@ -225,7 +225,7 @@ void test_vlsseg2e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m1_m( @@ -238,7 +238,7 @@ void test_vlsseg2e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m2_m( @@ -251,7 +251,7 @@ void test_vlsseg2e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m4_m( @@ -264,7 +264,7 @@ void test_vlsseg2e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf4_m( @@ -277,7 +277,7 @@ void test_vlsseg2e16_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf2_m( @@ -290,7 +290,7 @@ void test_vlsseg2e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m1_m( @@ -303,7 +303,7 @@ void test_vlsseg2e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m2_m( @@ -316,7 +316,7 @@ void test_vlsseg2e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m4_m( @@ -329,7 +329,7 @@ void test_vlsseg2e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf4_m( @@ -342,7 +342,7 @@ void test_vlsseg2e16_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf2_m( @@ -355,7 +355,7 @@ void test_vlsseg2e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m1_m( @@ -368,7 +368,7 @@ void test_vlsseg2e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m2_m( @@ -381,7 +381,7 @@ void test_vlsseg2e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m4_m( @@ -394,6 +394,6 @@ void test_vlsseg2e16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m4_m(v0, v1, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32.c index 6e9689a63e7d2861d9f5210c9940c66607f3f80d..cb29a7cdc6c0bd9627faeaf45f58447ae233132b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e32.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32mf2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32mf2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m1( @@ -30,7 +30,7 @@ void test_vlsseg2e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m2( @@ -43,7 +43,7 @@ void test_vlsseg2e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *ba // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m4( @@ -56,7 +56,7 @@ void test_vlsseg2e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *ba // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32mf2( @@ -69,7 +69,7 @@ void test_vlsseg2e32_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *ba // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32mf2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32mf2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m1( @@ -82,7 +82,7 @@ void test_vlsseg2e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m2( @@ -95,7 +95,7 @@ void test_vlsseg2e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m4( @@ -108,7 +108,7 @@ void test_vlsseg2e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32mf2( @@ -121,7 +121,7 @@ void test_vlsseg2e32_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32mf2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32mf2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m1( @@ -134,7 +134,7 @@ void test_vlsseg2e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m2( @@ -147,7 +147,7 @@ void test_vlsseg2e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m4( @@ -160,7 +160,7 @@ void test_vlsseg2e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32mf2_m( @@ -173,7 +173,7 @@ void test_vlsseg2e32_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32mf2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32mf2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m1_m( @@ -186,7 +186,7 @@ void test_vlsseg2e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m2_m( @@ -199,7 +199,7 @@ void test_vlsseg2e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m4_m( @@ -212,7 +212,7 @@ void test_vlsseg2e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32mf2_m( @@ -225,7 +225,7 @@ void test_vlsseg2e32_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32mf2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32mf2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m1_m( @@ -238,7 +238,7 @@ void test_vlsseg2e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m2_m( @@ -251,7 +251,7 @@ void test_vlsseg2e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m4_m( @@ -264,7 +264,7 @@ void test_vlsseg2e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32mf2_m( @@ -277,7 +277,7 @@ void test_vlsseg2e32_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32mf2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32mf2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m1_m( @@ -290,7 +290,7 @@ void test_vlsseg2e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m2_m( @@ -303,7 +303,7 @@ void test_vlsseg2e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m4_m( @@ -316,6 +316,6 @@ void test_vlsseg2e32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m4_m(v0, v1, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e64.c index 5f89e4fc0db933b7d31739c9d7eb825f5fc6e45d..e537198539243026a7b76621563d587bc9a5cc6a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e64.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m2( @@ -30,7 +30,7 @@ void test_vlsseg2e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m4( @@ -43,7 +43,7 @@ void test_vlsseg2e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m1( @@ -56,7 +56,7 @@ void test_vlsseg2e64_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m2( @@ -69,7 +69,7 @@ void test_vlsseg2e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m4( @@ -82,7 +82,7 @@ void test_vlsseg2e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m1( @@ -95,7 +95,7 @@ void test_vlsseg2e64_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m2( @@ -108,7 +108,7 @@ void test_vlsseg2e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m4( @@ -121,7 +121,7 @@ void test_vlsseg2e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m1_m( @@ -134,7 +134,7 @@ void test_vlsseg2e64_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *b // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m2_m( @@ -147,7 +147,7 @@ void test_vlsseg2e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m4_m( @@ -160,7 +160,7 @@ void test_vlsseg2e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m1_m( @@ -173,7 +173,7 @@ void test_vlsseg2e64_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m2_m( @@ -186,7 +186,7 @@ void test_vlsseg2e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m4_m( @@ -199,7 +199,7 @@ void test_vlsseg2e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m1_m( @@ -212,7 +212,7 @@ void test_vlsseg2e64_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, c // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m2_m( @@ -225,7 +225,7 @@ void test_vlsseg2e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m4_m( @@ -238,6 +238,6 @@ void test_vlsseg2e64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m4_m(v0, v1, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e8.c index ba42f3aed9db2b917bf68266aa0aae96aa4d4601..0341e7dd8ced3dd4f6d34f4b2544843b6639e72c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg2e8.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf8(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf8(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf4( @@ -29,7 +29,7 @@ void test_vlsseg2e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf2( @@ -42,7 +42,7 @@ void test_vlsseg2e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m1( @@ -55,7 +55,7 @@ void test_vlsseg2e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m2( @@ -68,7 +68,7 @@ void test_vlsseg2e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, ptr // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m4( @@ -81,7 +81,7 @@ void test_vlsseg2e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, ptr // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf8( @@ -94,7 +94,7 @@ void test_vlsseg2e8_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, ptr // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf8(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf8(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf4( @@ -107,7 +107,7 @@ void test_vlsseg2e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf2( @@ -120,7 +120,7 @@ void test_vlsseg2e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m1( @@ -133,7 +133,7 @@ void test_vlsseg2e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m1(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m1(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m2( @@ -146,7 +146,7 @@ void test_vlsseg2e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m2(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m2(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m4( @@ -159,7 +159,7 @@ void test_vlsseg2e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m4(v0, v1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m4(v0, v1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf8_m( @@ -172,7 +172,7 @@ void test_vlsseg2e8_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf8_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf8_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf4_m( @@ -185,7 +185,7 @@ void test_vlsseg2e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf2_m( @@ -198,7 +198,7 @@ void test_vlsseg2e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m1_m( @@ -211,7 +211,7 @@ void test_vlsseg2e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, co // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m2_m( @@ -224,7 +224,7 @@ void test_vlsseg2e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m4_m( @@ -237,7 +237,7 @@ void test_vlsseg2e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf8_m( @@ -250,7 +250,7 @@ void test_vlsseg2e8_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf8_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf8_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf4_m( @@ -263,7 +263,7 @@ void test_vlsseg2e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf4_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf2_m( @@ -276,7 +276,7 @@ void test_vlsseg2e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m1_m( @@ -289,7 +289,7 @@ void test_vlsseg2e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m1_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m1_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m2_m( @@ -302,7 +302,7 @@ void test_vlsseg2e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, cons // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m2_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m2_m(v0, v1, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m4_m( @@ -315,6 +315,6 @@ void test_vlsseg2e8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, cons // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m4_m(v0, v1, mask, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m4_m(v0, v1, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e16.c index 8e13916478aea27766686dae73956b3e0990eda0..708b02e9c0ccd90f3ee12ea3d1dbbe3252df7a02 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e16.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf4(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf4(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf2( @@ -34,7 +34,7 @@ void test_vlsseg3e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m1( @@ -49,7 +49,7 @@ void test_vlsseg3e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m2( @@ -64,7 +64,7 @@ void test_vlsseg3e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf4( @@ -79,7 +79,7 @@ void test_vlsseg3e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf4(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf4(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf2( @@ -94,7 +94,7 @@ void test_vlsseg3e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m1( @@ -109,7 +109,7 @@ void test_vlsseg3e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m2( @@ -124,7 +124,7 @@ void test_vlsseg3e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf4( @@ -139,7 +139,7 @@ void test_vlsseg3e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf4(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf4(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf2( @@ -154,7 +154,7 @@ void test_vlsseg3e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m1( @@ -169,7 +169,7 @@ void test_vlsseg3e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m2( @@ -184,7 +184,7 @@ void test_vlsseg3e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf4_m( @@ -199,7 +199,7 @@ void test_vlsseg3e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf4_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf4_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf2_m( @@ -214,7 +214,7 @@ void test_vlsseg3e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m1_m( @@ -229,7 +229,7 @@ void test_vlsseg3e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m2_m( @@ -244,7 +244,7 @@ void test_vlsseg3e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf4_m( @@ -259,7 +259,7 @@ void test_vlsseg3e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf4_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf4_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf2_m( @@ -274,7 +274,7 @@ void test_vlsseg3e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m1_m( @@ -289,7 +289,7 @@ void test_vlsseg3e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m2_m( @@ -304,7 +304,7 @@ void test_vlsseg3e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf4_m( @@ -319,7 +319,7 @@ void test_vlsseg3e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf4_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf4_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf2_m( @@ -334,7 +334,7 @@ void test_vlsseg3e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m1_m( @@ -349,7 +349,7 @@ void test_vlsseg3e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m2_m( @@ -364,6 +364,6 @@ void test_vlsseg3e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m2_m(v0, v1, v2, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e32.c index 614d805d0c1a65a13149f39e1eaab73ff43bbbf9..b6584fbffac0d22fc12f9631966276164971a4af 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e32.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32mf2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32mf2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m1( @@ -34,7 +34,7 @@ void test_vlsseg3e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m2( @@ -49,7 +49,7 @@ void test_vlsseg3e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32mf2( @@ -64,7 +64,7 @@ void test_vlsseg3e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32mf2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32mf2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m1( @@ -79,7 +79,7 @@ void test_vlsseg3e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m2( @@ -94,7 +94,7 @@ void test_vlsseg3e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32mf2( @@ -109,7 +109,7 @@ void test_vlsseg3e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32mf2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32mf2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m1( @@ -124,7 +124,7 @@ void test_vlsseg3e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m2( @@ -139,7 +139,7 @@ void test_vlsseg3e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32mf2_m( @@ -154,7 +154,7 @@ void test_vlsseg3e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32mf2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32mf2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m1_m( @@ -169,7 +169,7 @@ void test_vlsseg3e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m2_m( @@ -184,7 +184,7 @@ void test_vlsseg3e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32mf2_m( @@ -199,7 +199,7 @@ void test_vlsseg3e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32mf2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32mf2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m1_m( @@ -214,7 +214,7 @@ void test_vlsseg3e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m2_m( @@ -229,7 +229,7 @@ void test_vlsseg3e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32mf2_m( @@ -244,7 +244,7 @@ void test_vlsseg3e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32mf2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32mf2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m1_m( @@ -259,7 +259,7 @@ void test_vlsseg3e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m2_m( @@ -274,6 +274,6 @@ void test_vlsseg3e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m2_m(v0, v1, v2, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e64.c index 441151edd0819b48adece76ed9a97ce8cf7c3861..73e8a564775b1452fc8498cd5ea09b263798bdc0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e64.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m2( @@ -34,7 +34,7 @@ void test_vlsseg3e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m1( @@ -49,7 +49,7 @@ void test_vlsseg3e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m2( @@ -64,7 +64,7 @@ void test_vlsseg3e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m1( @@ -79,7 +79,7 @@ void test_vlsseg3e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m2( @@ -94,7 +94,7 @@ void test_vlsseg3e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m1_m( @@ -109,7 +109,7 @@ void test_vlsseg3e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m2_m( @@ -124,7 +124,7 @@ void test_vlsseg3e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m1_m( @@ -139,7 +139,7 @@ void test_vlsseg3e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m2_m( @@ -154,7 +154,7 @@ void test_vlsseg3e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m1_m( @@ -169,7 +169,7 @@ void test_vlsseg3e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m2_m( @@ -184,6 +184,6 @@ void test_vlsseg3e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m2_m(v0, v1, v2, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e8.c index 2af160fc427c53018d3542ecaeac7c447513ebb7..eec4edc5c11b38b226e633a61ff6d3de45956f59 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg3e8.c @@ -18,7 +18,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf8(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf8(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf4( @@ -33,7 +33,7 @@ void test_vlsseg3e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf4(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf4(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf2( @@ -48,7 +48,7 @@ void test_vlsseg3e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m1( @@ -63,7 +63,7 @@ void test_vlsseg3e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, cons // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m2( @@ -78,7 +78,7 @@ void test_vlsseg3e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const in // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf8( @@ -93,7 +93,7 @@ void test_vlsseg3e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const in // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf8(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf8(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf4( @@ -108,7 +108,7 @@ void test_vlsseg3e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf4(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf4(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf2( @@ -123,7 +123,7 @@ void test_vlsseg3e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m1( @@ -138,7 +138,7 @@ void test_vlsseg3e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m1(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m1(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m2( @@ -153,7 +153,7 @@ void test_vlsseg3e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m2(v0, v1, v2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m2(v0, v1, v2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf8_m( @@ -168,7 +168,7 @@ void test_vlsseg3e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf8_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf8_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf4_m( @@ -183,7 +183,7 @@ void test_vlsseg3e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf4_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf4_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf2_m( @@ -198,7 +198,7 @@ void test_vlsseg3e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m1_m( @@ -213,7 +213,7 @@ void test_vlsseg3e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m2_m( @@ -228,7 +228,7 @@ void test_vlsseg3e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf8_m( @@ -243,7 +243,7 @@ void test_vlsseg3e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf8_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf8_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf4_m( @@ -258,7 +258,7 @@ void test_vlsseg3e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf4_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf4_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf2_m( @@ -273,7 +273,7 @@ void test_vlsseg3e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf2_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m1_m( @@ -288,7 +288,7 @@ void test_vlsseg3e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m1_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m1_m(v0, v1, v2, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m2_m( @@ -303,6 +303,6 @@ void test_vlsseg3e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m2_m(v0, v1, v2, mask, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m2_m(v0, v1, v2, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e16.c index cd6e0a179735dd6cdc9898eec6c9034ba32c3514..4a54cac63e99bab837a805b16c542ef7dee5b37b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e16.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf4(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf4(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf2( @@ -38,7 +38,7 @@ void test_vlsseg4e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m1( @@ -55,7 +55,7 @@ void test_vlsseg4e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m2( @@ -72,7 +72,7 @@ void test_vlsseg4e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf4( @@ -89,7 +89,7 @@ void test_vlsseg4e16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf4(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf4(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf2( @@ -106,7 +106,7 @@ void test_vlsseg4e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m1( @@ -123,7 +123,7 @@ void test_vlsseg4e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m2( @@ -140,7 +140,7 @@ void test_vlsseg4e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf4( @@ -157,7 +157,7 @@ void test_vlsseg4e16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf4(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf4(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf2( @@ -174,7 +174,7 @@ void test_vlsseg4e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m1( @@ -191,7 +191,7 @@ void test_vlsseg4e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m2( @@ -208,7 +208,7 @@ void test_vlsseg4e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf4_m( @@ -225,7 +225,7 @@ void test_vlsseg4e16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf2_m( @@ -242,7 +242,7 @@ void test_vlsseg4e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m1_m( @@ -259,7 +259,7 @@ void test_vlsseg4e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m2_m( @@ -276,7 +276,7 @@ void test_vlsseg4e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf4_m( @@ -293,7 +293,7 @@ void test_vlsseg4e16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf2_m( @@ -310,7 +310,7 @@ void test_vlsseg4e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m1_m( @@ -327,7 +327,7 @@ void test_vlsseg4e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m2_m( @@ -344,7 +344,7 @@ void test_vlsseg4e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf4_m( @@ -361,7 +361,7 @@ void test_vlsseg4e16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf2_m( @@ -378,7 +378,7 @@ void test_vlsseg4e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m1_m( @@ -395,7 +395,7 @@ void test_vlsseg4e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m2_m( @@ -412,6 +412,6 @@ void test_vlsseg4e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e32.c index e839d2061bcb8c51d38b82a02b9a6fa2c1bcdd43..1cd49c509bd07adeef85dddf15430c38e77bc042 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e32.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32mf2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32mf2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m1( @@ -38,7 +38,7 @@ void test_vlsseg4e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m2( @@ -55,7 +55,7 @@ void test_vlsseg4e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32mf2( @@ -72,7 +72,7 @@ void test_vlsseg4e32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32mf2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32mf2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m1( @@ -89,7 +89,7 @@ void test_vlsseg4e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m2( @@ -106,7 +106,7 @@ void test_vlsseg4e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32mf2( @@ -123,7 +123,7 @@ void test_vlsseg4e32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32mf2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32mf2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m1( @@ -140,7 +140,7 @@ void test_vlsseg4e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m2( @@ -157,7 +157,7 @@ void test_vlsseg4e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32mf2_m( @@ -174,7 +174,7 @@ void test_vlsseg4e32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m1_m( @@ -191,7 +191,7 @@ void test_vlsseg4e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m2_m( @@ -208,7 +208,7 @@ void test_vlsseg4e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32mf2_m( @@ -225,7 +225,7 @@ void test_vlsseg4e32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m1_m( @@ -242,7 +242,7 @@ void test_vlsseg4e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m2_m( @@ -259,7 +259,7 @@ void test_vlsseg4e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32mf2_m( @@ -276,7 +276,7 @@ void test_vlsseg4e32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m1_m( @@ -293,7 +293,7 @@ void test_vlsseg4e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m2_m( @@ -310,6 +310,6 @@ void test_vlsseg4e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e64.c index 546a89d61f048cfdb1583cb49cf0e10cb5e1ad6d..33cc59372bd035e7681853f09315e7a9729268f3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e64.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m2( @@ -38,7 +38,7 @@ void test_vlsseg4e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m1( @@ -55,7 +55,7 @@ void test_vlsseg4e64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m2( @@ -72,7 +72,7 @@ void test_vlsseg4e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m1( @@ -89,7 +89,7 @@ void test_vlsseg4e64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m2( @@ -106,7 +106,7 @@ void test_vlsseg4e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m1_m( @@ -123,7 +123,7 @@ void test_vlsseg4e64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m2_m( @@ -140,7 +140,7 @@ void test_vlsseg4e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m1_m( @@ -157,7 +157,7 @@ void test_vlsseg4e64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m2_m( @@ -174,7 +174,7 @@ void test_vlsseg4e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m1_m( @@ -191,7 +191,7 @@ void test_vlsseg4e64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m2_m( @@ -208,6 +208,6 @@ void test_vlsseg4e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e8.c index 7b5af168dd80c55c9000ff548ab3e52d946d6486..ebd4a8c2b0e140f45980e2dddfb5e7261af012a6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg4e8.c @@ -20,7 +20,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf8(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf8(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf4( @@ -37,7 +37,7 @@ void test_vlsseg4e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf4(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf4(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf2( @@ -54,7 +54,7 @@ void test_vlsseg4e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m1( @@ -71,7 +71,7 @@ void test_vlsseg4e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m2( @@ -88,7 +88,7 @@ void test_vlsseg4e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf8( @@ -105,7 +105,7 @@ void test_vlsseg4e8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf8(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf8(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf4( @@ -122,7 +122,7 @@ void test_vlsseg4e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf4(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf4(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf2( @@ -139,7 +139,7 @@ void test_vlsseg4e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m1( @@ -156,7 +156,7 @@ void test_vlsseg4e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m1(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m1(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m2( @@ -173,7 +173,7 @@ void test_vlsseg4e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m2(v0, v1, v2, v3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m2(v0, v1, v2, v3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf8_m( @@ -190,7 +190,7 @@ void test_vlsseg4e8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf8_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf8_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf4_m( @@ -207,7 +207,7 @@ void test_vlsseg4e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf2_m( @@ -224,7 +224,7 @@ void test_vlsseg4e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m1_m( @@ -241,7 +241,7 @@ void test_vlsseg4e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m2_m( @@ -258,7 +258,7 @@ void test_vlsseg4e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf8_m( @@ -275,7 +275,7 @@ void test_vlsseg4e8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf8_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf8_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf4_m( @@ -292,7 +292,7 @@ void test_vlsseg4e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf4_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf2_m( @@ -309,7 +309,7 @@ void test_vlsseg4e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf2_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m1_m( @@ -326,7 +326,7 @@ void test_vlsseg4e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m1_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m1_m(v0, v1, v2, v3, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m2_m( @@ -343,6 +343,6 @@ void test_vlsseg4e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m2_m(v0, v1, v2, v3, mask, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m2_m(v0, v1, v2, v3, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e16.c index 457130f42a7dedb39676396b9c6cc96d419ad778..bd149e0a1b25eeb36e5d6d4130b2a69ca407f8e0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e16.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf4(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf4(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf2( @@ -42,7 +42,7 @@ void test_vlsseg5e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf2(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf2(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16m1( @@ -61,7 +61,7 @@ void test_vlsseg5e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf4( @@ -80,7 +80,7 @@ void test_vlsseg5e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf4(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf4(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf2( @@ -99,7 +99,7 @@ void test_vlsseg5e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf2(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf2(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16m1( @@ -118,7 +118,7 @@ void test_vlsseg5e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf4( @@ -137,7 +137,7 @@ void test_vlsseg5e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf4(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf4(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf2( @@ -156,7 +156,7 @@ void test_vlsseg5e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf2(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf2(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16m1( @@ -175,7 +175,7 @@ void test_vlsseg5e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf4_m( @@ -194,7 +194,7 @@ void test_vlsseg5e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf2_m( @@ -213,7 +213,7 @@ void test_vlsseg5e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16m1_m( @@ -232,7 +232,7 @@ void test_vlsseg5e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf4_m( @@ -251,7 +251,7 @@ void test_vlsseg5e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf2_m( @@ -270,7 +270,7 @@ void test_vlsseg5e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16m1_m( @@ -289,7 +289,7 @@ void test_vlsseg5e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf4_m( @@ -308,7 +308,7 @@ void test_vlsseg5e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf2_m( @@ -327,7 +327,7 @@ void test_vlsseg5e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16m1_m( @@ -346,6 +346,6 @@ void test_vlsseg5e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e32.c index 79637d1676a7b020ff10b8415c911de451a4e97f..6d95635e9a3a4dfefe8e47826d6915f180a3d2dc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e32.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32mf2(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32mf2(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32m1( @@ -42,7 +42,7 @@ void test_vlsseg5e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32mf2( @@ -61,7 +61,7 @@ void test_vlsseg5e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32mf2(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32mf2(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32m1( @@ -80,7 +80,7 @@ void test_vlsseg5e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32mf2( @@ -99,7 +99,7 @@ void test_vlsseg5e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32mf2(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32mf2(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32m1( @@ -118,7 +118,7 @@ void test_vlsseg5e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32mf2_m( @@ -137,7 +137,7 @@ void test_vlsseg5e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32m1_m( @@ -156,7 +156,7 @@ void test_vlsseg5e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32mf2_m( @@ -175,7 +175,7 @@ void test_vlsseg5e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32m1_m( @@ -194,7 +194,7 @@ void test_vlsseg5e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32mf2_m( @@ -213,7 +213,7 @@ void test_vlsseg5e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32m1_m( @@ -232,6 +232,6 @@ void test_vlsseg5e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e64.c index 2e1cfd782e48b61a3950ac1a45def435c1cf74f8..115569da245bf343cd6588591afbf9f77a36db81 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e64.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_f64m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e64_v_f64m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_i64m1( @@ -42,7 +42,7 @@ void test_vlsseg5e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_i64m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e64_v_i64m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_u64m1( @@ -61,7 +61,7 @@ void test_vlsseg5e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_u64m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e64_v_u64m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_f64m1_m( @@ -80,7 +80,7 @@ void test_vlsseg5e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e64_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_i64m1_m( @@ -99,7 +99,7 @@ void test_vlsseg5e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e64_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_u64m1_m( @@ -118,6 +118,6 @@ void test_vlsseg5e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e64_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e8.c index ee53744a16398213bfbc09caecc490fe6a78f832..d18a8dd030f56a7a943548d42309c062d5660d2f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg5e8.c @@ -22,7 +22,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf8(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf8(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf4( @@ -41,7 +41,7 @@ void test_vlsseg5e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf4(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf4(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf2( @@ -60,7 +60,7 @@ void test_vlsseg5e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf2(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf2(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8m1( @@ -79,7 +79,7 @@ void test_vlsseg5e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf8( @@ -98,7 +98,7 @@ void test_vlsseg5e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf8(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf8(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf4( @@ -117,7 +117,7 @@ void test_vlsseg5e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf4(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf4(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf2( @@ -136,7 +136,7 @@ void test_vlsseg5e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf2(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf2(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8m1( @@ -155,7 +155,7 @@ void test_vlsseg5e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8m1(v0, v1, v2, v3, v4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8m1(v0, v1, v2, v3, v4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf8_m( @@ -174,7 +174,7 @@ void test_vlsseg5e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf4_m( @@ -193,7 +193,7 @@ void test_vlsseg5e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf2_m( @@ -212,7 +212,7 @@ void test_vlsseg5e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8m1_m( @@ -231,7 +231,7 @@ void test_vlsseg5e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf8_m( @@ -250,7 +250,7 @@ void test_vlsseg5e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf4_m( @@ -269,7 +269,7 @@ void test_vlsseg5e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf2_m( @@ -288,7 +288,7 @@ void test_vlsseg5e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8m1_m( @@ -307,6 +307,6 @@ void test_vlsseg5e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e16.c index bc766a7a2308719fd07a1a044bd66e4b400f4850..88538bfa757d3db7365a5ba68466129888bc424b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e16.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf2( @@ -46,7 +46,7 @@ void test_vlsseg6e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16m1( @@ -67,7 +67,7 @@ void test_vlsseg6e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf4( @@ -88,7 +88,7 @@ void test_vlsseg6e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf2( @@ -109,7 +109,7 @@ void test_vlsseg6e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16m1( @@ -130,7 +130,7 @@ void test_vlsseg6e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf4( @@ -151,7 +151,7 @@ void test_vlsseg6e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf2( @@ -172,7 +172,7 @@ void test_vlsseg6e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16m1( @@ -193,7 +193,7 @@ void test_vlsseg6e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf4_m( @@ -214,7 +214,7 @@ void test_vlsseg6e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf2_m( @@ -235,7 +235,7 @@ void test_vlsseg6e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16m1_m( @@ -256,7 +256,7 @@ void test_vlsseg6e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf4_m( @@ -277,7 +277,7 @@ void test_vlsseg6e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf2_m( @@ -298,7 +298,7 @@ void test_vlsseg6e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16m1_m( @@ -319,7 +319,7 @@ void test_vlsseg6e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf4_m( @@ -340,7 +340,7 @@ void test_vlsseg6e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf2_m( @@ -361,7 +361,7 @@ void test_vlsseg6e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16m1_m( @@ -382,6 +382,6 @@ void test_vlsseg6e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e32.c index 8fba07179fe99af7392c2cfacdc5defe435ea8c1..253fa579b949cad6ea8cb720b4e74676fc517ac5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e32.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32m1( @@ -46,7 +46,7 @@ void test_vlsseg6e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32mf2( @@ -67,7 +67,7 @@ void test_vlsseg6e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32m1( @@ -88,7 +88,7 @@ void test_vlsseg6e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32mf2( @@ -109,7 +109,7 @@ void test_vlsseg6e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32m1( @@ -130,7 +130,7 @@ void test_vlsseg6e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32mf2_m( @@ -151,7 +151,7 @@ void test_vlsseg6e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32m1_m( @@ -172,7 +172,7 @@ void test_vlsseg6e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32mf2_m( @@ -193,7 +193,7 @@ void test_vlsseg6e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32m1_m( @@ -214,7 +214,7 @@ void test_vlsseg6e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32mf2_m( @@ -235,7 +235,7 @@ void test_vlsseg6e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32m1_m( @@ -256,6 +256,6 @@ void test_vlsseg6e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e64.c index c62a814bac0df621519319dcf7c0f7d77bdf420f..b34e926d6d483733fe5b4b930b2141286ece94c6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e64.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_f64m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e64_v_f64m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_i64m1( @@ -46,7 +46,7 @@ void test_vlsseg6e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_i64m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e64_v_i64m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_u64m1( @@ -67,7 +67,7 @@ void test_vlsseg6e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_u64m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e64_v_u64m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_f64m1_m( @@ -88,7 +88,7 @@ void test_vlsseg6e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_i64m1_m( @@ -109,7 +109,7 @@ void test_vlsseg6e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_u64m1_m( @@ -130,6 +130,6 @@ void test_vlsseg6e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e8.c index 1103717ea92be65c78eae4d7faf0e16f3d0f2251..d88a1241bc5fdfd60fd39759feb0b23c2bab74dd 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg6e8.c @@ -24,7 +24,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf4( @@ -45,7 +45,7 @@ void test_vlsseg6e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf2( @@ -66,7 +66,7 @@ void test_vlsseg6e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8m1( @@ -87,7 +87,7 @@ void test_vlsseg6e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf8( @@ -108,7 +108,7 @@ void test_vlsseg6e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf4( @@ -129,7 +129,7 @@ void test_vlsseg6e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf2( @@ -150,7 +150,7 @@ void test_vlsseg6e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8m1( @@ -171,7 +171,7 @@ void test_vlsseg6e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8m1(v0, v1, v2, v3, v4, v5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf8_m( @@ -192,7 +192,7 @@ void test_vlsseg6e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf4_m( @@ -213,7 +213,7 @@ void test_vlsseg6e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf2_m( @@ -234,7 +234,7 @@ void test_vlsseg6e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8m1_m( @@ -255,7 +255,7 @@ void test_vlsseg6e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf8_m( @@ -276,7 +276,7 @@ void test_vlsseg6e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf4_m( @@ -297,7 +297,7 @@ void test_vlsseg6e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf2_m( @@ -318,7 +318,7 @@ void test_vlsseg6e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8m1_m( @@ -339,6 +339,6 @@ void test_vlsseg6e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e16.c index e4f6fd257219826b43770a4390bfe2ebf7469f54..51bd6b107df462450638023fc2060796c1aa1aab 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e16.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf2( @@ -50,7 +50,7 @@ void test_vlsseg7e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16m1( @@ -73,7 +73,7 @@ void test_vlsseg7e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf4( @@ -96,7 +96,7 @@ void test_vlsseg7e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf2( @@ -119,7 +119,7 @@ void test_vlsseg7e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16m1( @@ -142,7 +142,7 @@ void test_vlsseg7e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf4( @@ -165,7 +165,7 @@ void test_vlsseg7e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf2( @@ -188,7 +188,7 @@ void test_vlsseg7e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16m1( @@ -211,7 +211,7 @@ void test_vlsseg7e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf4_m( @@ -234,7 +234,7 @@ void test_vlsseg7e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf2_m( @@ -257,7 +257,7 @@ void test_vlsseg7e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16m1_m( @@ -280,7 +280,7 @@ void test_vlsseg7e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf4_m( @@ -303,7 +303,7 @@ void test_vlsseg7e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf2_m( @@ -326,7 +326,7 @@ void test_vlsseg7e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16m1_m( @@ -349,7 +349,7 @@ void test_vlsseg7e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf4_m( @@ -372,7 +372,7 @@ void test_vlsseg7e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf2_m( @@ -395,7 +395,7 @@ void test_vlsseg7e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16m1_m( @@ -418,6 +418,6 @@ void test_vlsseg7e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e32.c index 171877a706655f39f690a45cd9c988e5c075c342..68a0a6fd1fd4bfe25c205b067a83759656a1150e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e32.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32m1( @@ -50,7 +50,7 @@ void test_vlsseg7e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32mf2( @@ -73,7 +73,7 @@ void test_vlsseg7e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32m1( @@ -96,7 +96,7 @@ void test_vlsseg7e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32mf2( @@ -119,7 +119,7 @@ void test_vlsseg7e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32m1( @@ -142,7 +142,7 @@ void test_vlsseg7e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32mf2_m( @@ -165,7 +165,7 @@ void test_vlsseg7e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32m1_m( @@ -188,7 +188,7 @@ void test_vlsseg7e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32mf2_m( @@ -211,7 +211,7 @@ void test_vlsseg7e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32m1_m( @@ -234,7 +234,7 @@ void test_vlsseg7e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32mf2_m( @@ -257,7 +257,7 @@ void test_vlsseg7e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32m1_m( @@ -280,6 +280,6 @@ void test_vlsseg7e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e64.c index 9acd46732a963fd42f69abfc8f7ce4d9a3e7eefd..46697c060b78bc697880d8f36e808e80a922b8f6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e64.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_i64m1( @@ -50,7 +50,7 @@ void test_vlsseg7e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_u64m1( @@ -73,7 +73,7 @@ void test_vlsseg7e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_f64m1_m( @@ -96,7 +96,7 @@ void test_vlsseg7e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_i64m1_m( @@ -119,7 +119,7 @@ void test_vlsseg7e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_u64m1_m( @@ -142,6 +142,6 @@ void test_vlsseg7e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e8.c index 67266bca73a5844a23218f3d7d8aa31e4bb6bfb5..d3ba2b7fb2456b31a270fdac1b3fd8344f771877 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg7e8.c @@ -26,7 +26,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf4( @@ -49,7 +49,7 @@ void test_vlsseg7e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf2( @@ -72,7 +72,7 @@ void test_vlsseg7e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8m1( @@ -95,7 +95,7 @@ void test_vlsseg7e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf8( @@ -118,7 +118,7 @@ void test_vlsseg7e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf4( @@ -141,7 +141,7 @@ void test_vlsseg7e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf2( @@ -164,7 +164,7 @@ void test_vlsseg7e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8m1( @@ -187,7 +187,7 @@ void test_vlsseg7e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf8_m( @@ -210,7 +210,7 @@ void test_vlsseg7e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf4_m( @@ -233,7 +233,7 @@ void test_vlsseg7e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf2_m( @@ -256,7 +256,7 @@ void test_vlsseg7e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8m1_m( @@ -279,7 +279,7 @@ void test_vlsseg7e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf8_m( @@ -302,7 +302,7 @@ void test_vlsseg7e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf4_m( @@ -325,7 +325,7 @@ void test_vlsseg7e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf2_m( @@ -348,7 +348,7 @@ void test_vlsseg7e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8m1_m( @@ -371,6 +371,6 @@ void test_vlsseg7e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e16.c index 29729655c6f8cb1beaedf9d8c7184225b5e610e0..c788a3d328a8df652e548add2df2b984114218fb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e16.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf2( @@ -54,7 +54,7 @@ void test_vlsseg8e16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16m1( @@ -79,7 +79,7 @@ void test_vlsseg8e16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf4( @@ -104,7 +104,7 @@ void test_vlsseg8e16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf2( @@ -129,7 +129,7 @@ void test_vlsseg8e16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16m1( @@ -154,7 +154,7 @@ void test_vlsseg8e16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf4( @@ -179,7 +179,7 @@ void test_vlsseg8e16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf2( @@ -204,7 +204,7 @@ void test_vlsseg8e16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16m1( @@ -229,7 +229,7 @@ void test_vlsseg8e16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf4_m( @@ -254,7 +254,7 @@ void test_vlsseg8e16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf2_m( @@ -279,7 +279,7 @@ void test_vlsseg8e16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16m1_m( @@ -304,7 +304,7 @@ void test_vlsseg8e16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf4_m( @@ -329,7 +329,7 @@ void test_vlsseg8e16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf2_m( @@ -354,7 +354,7 @@ void test_vlsseg8e16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16m1_m( @@ -379,7 +379,7 @@ void test_vlsseg8e16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf4_m( @@ -404,7 +404,7 @@ void test_vlsseg8e16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf2_m( @@ -429,7 +429,7 @@ void test_vlsseg8e16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16m1_m( @@ -454,6 +454,6 @@ void test_vlsseg8e16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e32.c index f2aacebb953a4e93c3e32f02f9e1f7ef2468bbcd..7377dbaa97ce439337cfe11c8adfaec9d13d1c30 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e32.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32m1( @@ -54,7 +54,7 @@ void test_vlsseg8e32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32mf2( @@ -79,7 +79,7 @@ void test_vlsseg8e32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32m1( @@ -104,7 +104,7 @@ void test_vlsseg8e32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32mf2( @@ -129,7 +129,7 @@ void test_vlsseg8e32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32m1( @@ -154,7 +154,7 @@ void test_vlsseg8e32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32mf2_m( @@ -179,7 +179,7 @@ void test_vlsseg8e32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32m1_m( @@ -204,7 +204,7 @@ void test_vlsseg8e32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32mf2_m( @@ -229,7 +229,7 @@ void test_vlsseg8e32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32m1_m( @@ -254,7 +254,7 @@ void test_vlsseg8e32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32mf2_m( @@ -279,7 +279,7 @@ void test_vlsseg8e32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32m1_m( @@ -304,6 +304,6 @@ void test_vlsseg8e32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e64.c index c44a621a33c6a9501fbd5a0053600b4b34816a04..353c8afcf9968aa31e2d2ab99427778f9ef013e5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e64.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_i64m1( @@ -54,7 +54,7 @@ void test_vlsseg8e64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_u64m1( @@ -79,7 +79,7 @@ void test_vlsseg8e64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_f64m1_m( @@ -104,7 +104,7 @@ void test_vlsseg8e64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_i64m1_m( @@ -129,7 +129,7 @@ void test_vlsseg8e64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_u64m1_m( @@ -154,6 +154,6 @@ void test_vlsseg8e64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e8.c index e1d33a252efbfdbb455ae605e5b676807e6b81f9..f62d84578b23831d382dbc8dedd2e8556a6faac0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlsseg8e8.c @@ -28,7 +28,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf4( @@ -53,7 +53,7 @@ void test_vlsseg8e8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf2( @@ -78,7 +78,7 @@ void test_vlsseg8e8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8m1( @@ -103,7 +103,7 @@ void test_vlsseg8e8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf8( @@ -128,7 +128,7 @@ void test_vlsseg8e8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf4( @@ -153,7 +153,7 @@ void test_vlsseg8e8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf2( @@ -178,7 +178,7 @@ void test_vlsseg8e8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8m1( @@ -203,7 +203,7 @@ void test_vlsseg8e8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf8_m( @@ -228,7 +228,7 @@ void test_vlsseg8e8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf4_m( @@ -253,7 +253,7 @@ void test_vlsseg8e8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf2_m( @@ -278,7 +278,7 @@ void test_vlsseg8e8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8m1_m( @@ -303,7 +303,7 @@ void test_vlsseg8e8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf8_m( @@ -328,7 +328,7 @@ void test_vlsseg8e8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf4_m( @@ -353,7 +353,7 @@ void test_vlsseg8e8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf2_m( @@ -378,7 +378,7 @@ void test_vlsseg8e8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8m1_m( @@ -403,6 +403,6 @@ void test_vlsseg8e8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei16.c index 2416323b3aff0083011b752e24852704403d92bd..1cbd4a9bcf3f9ceeca8dfa5d9e2945b1586ad4a7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei16_v_f16mf4(const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f16mf4(base, bindex, vl); + return __riscv_vluxei16_v_f16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vluxei16_v_f16mf4(const _Float16 *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei16_v_f16mf2(const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f16mf2(base, bindex, vl); + return __riscv_vluxei16_v_f16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vluxei16_v_f16mf2(const _Float16 *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei16_v_f16m1(const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f16m1(base, bindex, vl); + return __riscv_vluxei16_v_f16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vluxei16_v_f16m1(const _Float16 *base, vuint16m1_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei16_v_f16m2(const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f16m2(base, bindex, vl); + return __riscv_vluxei16_v_f16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vluxei16_v_f16m2(const _Float16 *base, vuint16m2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei16_v_f16m4(const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f16m4(base, bindex, vl); + return __riscv_vluxei16_v_f16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vluxei16_v_f16m4(const _Float16 *base, vuint16m4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei16_v_f16m8(const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_f16m8(base, bindex, vl); + return __riscv_vluxei16_v_f16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vluxei16_v_f16m8(const _Float16 *base, vuint16m8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei16_v_f32mf2(const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f32mf2(base, bindex, vl); + return __riscv_vluxei16_v_f32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vluxei16_v_f32mf2(const float *base, vuint16mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei16_v_f32m1(const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f32m1(base, bindex, vl); + return __riscv_vluxei16_v_f32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vluxei16_v_f32m1(const float *base, vuint16mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei16_v_f32m2(const float *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f32m2(base, bindex, vl); + return __riscv_vluxei16_v_f32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vluxei16_v_f32m2(const float *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei16_v_f32m4(const float *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f32m4(base, bindex, vl); + return __riscv_vluxei16_v_f32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vluxei16_v_f32m4(const float *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei16_v_f32m8(const float *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f32m8(base, bindex, vl); + return __riscv_vluxei16_v_f32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vluxei16_v_f32m8(const float *base, vuint16m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei16_v_f64m1(const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f64m1(base, bindex, vl); + return __riscv_vluxei16_v_f64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vluxei16_v_f64m1(const double *base, vuint16mf4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei16_v_f64m2(const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f64m2(base, bindex, vl); + return __riscv_vluxei16_v_f64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vluxei16_v_f64m2(const double *base, vuint16mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei16_v_f64m4(const double *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f64m4(base, bindex, vl); + return __riscv_vluxei16_v_f64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vluxei16_v_f64m4(const double *base, vuint16m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei16_v_f64m8(const double *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f64m8(base, bindex, vl); + return __riscv_vluxei16_v_f64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf8( @@ -148,7 +148,7 @@ vfloat64m8_t test_vluxei16_v_f64m8(const double *base, vuint16m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei16_v_i8mf8(const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i8mf8(base, bindex, vl); + return __riscv_vluxei16_v_i8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf4( @@ -157,7 +157,7 @@ vint8mf8_t test_vluxei16_v_i8mf8(const int8_t *base, vuint16mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei16_v_i8mf4(const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i8mf4(base, bindex, vl); + return __riscv_vluxei16_v_i8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf2( @@ -166,7 +166,7 @@ vint8mf4_t test_vluxei16_v_i8mf4(const int8_t *base, vuint16mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei16_v_i8mf2(const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i8mf2(base, bindex, vl); + return __riscv_vluxei16_v_i8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m1( @@ -175,7 +175,7 @@ vint8mf2_t test_vluxei16_v_i8mf2(const int8_t *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei16_v_i8m1(const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i8m1(base, bindex, vl); + return __riscv_vluxei16_v_i8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m2( @@ -184,7 +184,7 @@ vint8m1_t test_vluxei16_v_i8m1(const int8_t *base, vuint16m2_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei16_v_i8m2(const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i8m2(base, bindex, vl); + return __riscv_vluxei16_v_i8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m4( @@ -193,7 +193,7 @@ vint8m2_t test_vluxei16_v_i8m2(const int8_t *base, vuint16m4_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei16_v_i8m4(const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i8m4(base, bindex, vl); + return __riscv_vluxei16_v_i8m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf4( @@ -202,7 +202,7 @@ vint8m4_t test_vluxei16_v_i8m4(const int8_t *base, vuint16m8_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei16_v_i16mf4(const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i16mf4(base, bindex, vl); + return __riscv_vluxei16_v_i16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf2( @@ -211,7 +211,7 @@ vint16mf4_t test_vluxei16_v_i16mf4(const int16_t *base, vuint16mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei16_v_i16mf2(const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i16mf2(base, bindex, vl); + return __riscv_vluxei16_v_i16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m1( @@ -220,7 +220,7 @@ vint16mf2_t test_vluxei16_v_i16mf2(const int16_t *base, vuint16mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei16_v_i16m1(const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i16m1(base, bindex, vl); + return __riscv_vluxei16_v_i16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m2( @@ -229,7 +229,7 @@ vint16m1_t test_vluxei16_v_i16m1(const int16_t *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei16_v_i16m2(const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i16m2(base, bindex, vl); + return __riscv_vluxei16_v_i16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m4( @@ -238,7 +238,7 @@ vint16m2_t test_vluxei16_v_i16m2(const int16_t *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei16_v_i16m4(const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i16m4(base, bindex, vl); + return __riscv_vluxei16_v_i16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m8( @@ -247,7 +247,7 @@ vint16m4_t test_vluxei16_v_i16m4(const int16_t *base, vuint16m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei16_v_i16m8(const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i16m8(base, bindex, vl); + return __riscv_vluxei16_v_i16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32mf2( @@ -256,7 +256,7 @@ vint16m8_t test_vluxei16_v_i16m8(const int16_t *base, vuint16m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei16_v_i32mf2(const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i32mf2(base, bindex, vl); + return __riscv_vluxei16_v_i32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vluxei16_v_i32mf2(const int32_t *base, vuint16mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei16_v_i32m1(const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i32m1(base, bindex, vl); + return __riscv_vluxei16_v_i32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m2( @@ -274,7 +274,7 @@ vint32m1_t test_vluxei16_v_i32m1(const int32_t *base, vuint16mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei16_v_i32m2(const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i32m2(base, bindex, vl); + return __riscv_vluxei16_v_i32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m4( @@ -283,7 +283,7 @@ vint32m2_t test_vluxei16_v_i32m2(const int32_t *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei16_v_i32m4(const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i32m4(base, bindex, vl); + return __riscv_vluxei16_v_i32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m8( @@ -292,7 +292,7 @@ vint32m4_t test_vluxei16_v_i32m4(const int32_t *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei16_v_i32m8(const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i32m8(base, bindex, vl); + return __riscv_vluxei16_v_i32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m1( @@ -301,7 +301,7 @@ vint32m8_t test_vluxei16_v_i32m8(const int32_t *base, vuint16m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei16_v_i64m1(const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i64m1(base, bindex, vl); + return __riscv_vluxei16_v_i64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m2( @@ -310,7 +310,7 @@ vint64m1_t test_vluxei16_v_i64m1(const int64_t *base, vuint16mf4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei16_v_i64m2(const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i64m2(base, bindex, vl); + return __riscv_vluxei16_v_i64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m4( @@ -319,7 +319,7 @@ vint64m2_t test_vluxei16_v_i64m2(const int64_t *base, vuint16mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei16_v_i64m4(const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i64m4(base, bindex, vl); + return __riscv_vluxei16_v_i64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m8( @@ -328,7 +328,7 @@ vint64m4_t test_vluxei16_v_i64m4(const int64_t *base, vuint16m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei16_v_i64m8(const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i64m8(base, bindex, vl); + return __riscv_vluxei16_v_i64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf8( @@ -337,7 +337,7 @@ vint64m8_t test_vluxei16_v_i64m8(const int64_t *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei16_v_u8mf8(const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u8mf8(base, bindex, vl); + return __riscv_vluxei16_v_u8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf4( @@ -346,7 +346,7 @@ vuint8mf8_t test_vluxei16_v_u8mf8(const uint8_t *base, vuint16mf4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei16_v_u8mf4(const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u8mf4(base, bindex, vl); + return __riscv_vluxei16_v_u8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf2( @@ -355,7 +355,7 @@ vuint8mf4_t test_vluxei16_v_u8mf4(const uint8_t *base, vuint16mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei16_v_u8mf2(const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u8mf2(base, bindex, vl); + return __riscv_vluxei16_v_u8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m1( @@ -364,7 +364,7 @@ vuint8mf2_t test_vluxei16_v_u8mf2(const uint8_t *base, vuint16m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei16_v_u8m1(const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u8m1(base, bindex, vl); + return __riscv_vluxei16_v_u8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m2( @@ -373,7 +373,7 @@ vuint8m1_t test_vluxei16_v_u8m1(const uint8_t *base, vuint16m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei16_v_u8m2(const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u8m2(base, bindex, vl); + return __riscv_vluxei16_v_u8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m4( @@ -382,7 +382,7 @@ vuint8m2_t test_vluxei16_v_u8m2(const uint8_t *base, vuint16m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei16_v_u8m4(const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u8m4(base, bindex, vl); + return __riscv_vluxei16_v_u8m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf4( @@ -391,7 +391,7 @@ vuint8m4_t test_vluxei16_v_u8m4(const uint8_t *base, vuint16m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei16_v_u16mf4(const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u16mf4(base, bindex, vl); + return __riscv_vluxei16_v_u16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf2( @@ -400,7 +400,7 @@ vuint16mf4_t test_vluxei16_v_u16mf4(const uint16_t *base, vuint16mf4_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei16_v_u16mf2(const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u16mf2(base, bindex, vl); + return __riscv_vluxei16_v_u16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m1( @@ -409,7 +409,7 @@ vuint16mf2_t test_vluxei16_v_u16mf2(const uint16_t *base, vuint16mf2_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei16_v_u16m1(const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u16m1(base, bindex, vl); + return __riscv_vluxei16_v_u16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m2( @@ -418,7 +418,7 @@ vuint16m1_t test_vluxei16_v_u16m1(const uint16_t *base, vuint16m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei16_v_u16m2(const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u16m2(base, bindex, vl); + return __riscv_vluxei16_v_u16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m4( @@ -427,7 +427,7 @@ vuint16m2_t test_vluxei16_v_u16m2(const uint16_t *base, vuint16m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei16_v_u16m4(const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u16m4(base, bindex, vl); + return __riscv_vluxei16_v_u16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m8( @@ -436,7 +436,7 @@ vuint16m4_t test_vluxei16_v_u16m4(const uint16_t *base, vuint16m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei16_v_u16m8(const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u16m8(base, bindex, vl); + return __riscv_vluxei16_v_u16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32mf2( @@ -445,7 +445,7 @@ vuint16m8_t test_vluxei16_v_u16m8(const uint16_t *base, vuint16m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei16_v_u32mf2(const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u32mf2(base, bindex, vl); + return __riscv_vluxei16_v_u32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m1( @@ -454,7 +454,7 @@ vuint32mf2_t test_vluxei16_v_u32mf2(const uint32_t *base, vuint16mf4_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei16_v_u32m1(const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u32m1(base, bindex, vl); + return __riscv_vluxei16_v_u32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m2( @@ -463,7 +463,7 @@ vuint32m1_t test_vluxei16_v_u32m1(const uint32_t *base, vuint16mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei16_v_u32m2(const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u32m2(base, bindex, vl); + return __riscv_vluxei16_v_u32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m4( @@ -472,7 +472,7 @@ vuint32m2_t test_vluxei16_v_u32m2(const uint32_t *base, vuint16m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei16_v_u32m4(const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u32m4(base, bindex, vl); + return __riscv_vluxei16_v_u32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m8( @@ -481,7 +481,7 @@ vuint32m4_t test_vluxei16_v_u32m4(const uint32_t *base, vuint16m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei16_v_u32m8(const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u32m8(base, bindex, vl); + return __riscv_vluxei16_v_u32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m1( @@ -490,7 +490,7 @@ vuint32m8_t test_vluxei16_v_u32m8(const uint32_t *base, vuint16m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei16_v_u64m1(const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u64m1(base, bindex, vl); + return __riscv_vluxei16_v_u64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m2( @@ -499,7 +499,7 @@ vuint64m1_t test_vluxei16_v_u64m1(const uint64_t *base, vuint16mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei16_v_u64m2(const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u64m2(base, bindex, vl); + return __riscv_vluxei16_v_u64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m4( @@ -508,7 +508,7 @@ vuint64m2_t test_vluxei16_v_u64m2(const uint64_t *base, vuint16mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei16_v_u64m4(const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u64m4(base, bindex, vl); + return __riscv_vluxei16_v_u64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m8( @@ -517,7 +517,7 @@ vuint64m4_t test_vluxei16_v_u64m4(const uint64_t *base, vuint16m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei16_v_u64m8(const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u64m8(base, bindex, vl); + return __riscv_vluxei16_v_u64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf4_m( @@ -526,7 +526,7 @@ vuint64m8_t test_vluxei16_v_u64m8(const uint64_t *base, vuint16m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei16_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf2_m( @@ -535,7 +535,7 @@ vfloat16mf4_t test_vluxei16_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei16_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m1_m( @@ -544,7 +544,7 @@ vfloat16mf2_t test_vluxei16_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei16_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f16m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m2_m( @@ -553,7 +553,7 @@ vfloat16m1_t test_vluxei16_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei16_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f16m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m4_m( @@ -562,7 +562,7 @@ vfloat16m2_t test_vluxei16_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei16_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f16m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m8_m( @@ -571,7 +571,7 @@ vfloat16m4_t test_vluxei16_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei16_v_f16m8_m(vbool2_t mask, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_f16m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32mf2_m( @@ -580,7 +580,7 @@ vfloat16m8_t test_vluxei16_v_f16m8_m(vbool2_t mask, const _Float16 *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei16_v_f32mf2_m(vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m1_m( @@ -589,7 +589,7 @@ vfloat32mf2_t test_vluxei16_v_f32mf2_m(vbool64_t mask, const float *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei16_v_f32m1_m(vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f32m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m2_m( @@ -598,7 +598,7 @@ vfloat32m1_t test_vluxei16_v_f32m1_m(vbool32_t mask, const float *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei16_v_f32m2_m(vbool16_t mask, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f32m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m4_m( @@ -607,7 +607,7 @@ vfloat32m2_t test_vluxei16_v_f32m2_m(vbool16_t mask, const float *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei16_v_f32m4_m(vbool8_t mask, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f32m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m8_m( @@ -616,7 +616,7 @@ vfloat32m4_t test_vluxei16_v_f32m4_m(vbool8_t mask, const float *base, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei16_v_f32m8_m(vbool4_t mask, const float *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f32m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m1_m( @@ -625,7 +625,7 @@ vfloat32m8_t test_vluxei16_v_f32m8_m(vbool4_t mask, const float *base, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei16_v_f64m1_m(vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f64m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m2_m( @@ -634,7 +634,7 @@ vfloat64m1_t test_vluxei16_v_f64m1_m(vbool64_t mask, const double *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei16_v_f64m2_m(vbool32_t mask, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f64m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m4_m( @@ -643,7 +643,7 @@ vfloat64m2_t test_vluxei16_v_f64m2_m(vbool32_t mask, const double *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei16_v_f64m4_m(vbool16_t mask, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f64m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m8_m( @@ -652,7 +652,7 @@ vfloat64m4_t test_vluxei16_v_f64m4_m(vbool16_t mask, const double *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei16_v_f64m8_m(vbool8_t mask, const double *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f64m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_f64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf8_m( @@ -661,7 +661,7 @@ vfloat64m8_t test_vluxei16_v_f64m8_m(vbool8_t mask, const double *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei16_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i8mf8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf4_m( @@ -670,7 +670,7 @@ vint8mf8_t test_vluxei16_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei16_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i8mf4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf2_m( @@ -679,7 +679,7 @@ vint8mf4_t test_vluxei16_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei16_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i8mf2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m1_m( @@ -688,7 +688,7 @@ vint8mf2_t test_vluxei16_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei16_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i8m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m2_m( @@ -697,7 +697,7 @@ vint8m1_t test_vluxei16_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei16_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i8m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m4_m( @@ -706,7 +706,7 @@ vint8m2_t test_vluxei16_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei16_v_i8m4_m(vbool2_t mask, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i8m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i8m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf4_m( @@ -715,7 +715,7 @@ vint8m4_t test_vluxei16_v_i8m4_m(vbool2_t mask, const int8_t *base, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei16_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf2_m( @@ -724,7 +724,7 @@ vint16mf4_t test_vluxei16_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei16_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m1_m( @@ -733,7 +733,7 @@ vint16mf2_t test_vluxei16_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei16_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i16m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m2_m( @@ -742,7 +742,7 @@ vint16m1_t test_vluxei16_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei16_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i16m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m4_m( @@ -751,7 +751,7 @@ vint16m2_t test_vluxei16_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei16_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i16m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m8_m( @@ -760,7 +760,7 @@ vint16m4_t test_vluxei16_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei16_v_i16m8_m(vbool2_t mask, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i16m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32mf2_m( @@ -769,7 +769,7 @@ vint16m8_t test_vluxei16_v_i16m8_m(vbool2_t mask, const int16_t *base, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei16_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m1_m( @@ -778,7 +778,7 @@ vint32mf2_t test_vluxei16_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei16_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i32m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m2_m( @@ -787,7 +787,7 @@ vint32m1_t test_vluxei16_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei16_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i32m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m4_m( @@ -796,7 +796,7 @@ vint32m2_t test_vluxei16_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei16_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i32m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m8_m( @@ -805,7 +805,7 @@ vint32m4_t test_vluxei16_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei16_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i32m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m1_m( @@ -814,7 +814,7 @@ vint32m8_t test_vluxei16_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei16_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i64m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m2_m( @@ -823,7 +823,7 @@ vint64m1_t test_vluxei16_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei16_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i64m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m4_m( @@ -832,7 +832,7 @@ vint64m2_t test_vluxei16_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei16_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i64m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m8_m( @@ -841,7 +841,7 @@ vint64m4_t test_vluxei16_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei16_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i64m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_i64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf8_m( @@ -850,7 +850,7 @@ vint64m8_t test_vluxei16_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei16_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u8mf8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf4_m( @@ -859,7 +859,7 @@ vuint8mf8_t test_vluxei16_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei16_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u8mf4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf2_m( @@ -868,7 +868,7 @@ vuint8mf4_t test_vluxei16_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei16_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u8mf2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m1_m( @@ -877,7 +877,7 @@ vuint8mf2_t test_vluxei16_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei16_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u8m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m2_m( @@ -886,7 +886,7 @@ vuint8m1_t test_vluxei16_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei16_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u8m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m4_m( @@ -895,7 +895,7 @@ vuint8m2_t test_vluxei16_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei16_v_u8m4_m(vbool2_t mask, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u8m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u8m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf4_m( @@ -904,7 +904,7 @@ vuint8m4_t test_vluxei16_v_u8m4_m(vbool2_t mask, const uint8_t *base, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei16_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf2_m( @@ -913,7 +913,7 @@ vuint16mf4_t test_vluxei16_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei16_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m1_m( @@ -922,7 +922,7 @@ vuint16mf2_t test_vluxei16_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei16_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u16m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m2_m( @@ -931,7 +931,7 @@ vuint16m1_t test_vluxei16_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei16_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u16m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m4_m( @@ -940,7 +940,7 @@ vuint16m2_t test_vluxei16_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei16_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u16m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m8_m( @@ -949,7 +949,7 @@ vuint16m4_t test_vluxei16_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei16_v_u16m8_m(vbool2_t mask, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u16m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32mf2_m( @@ -958,7 +958,7 @@ vuint16m8_t test_vluxei16_v_u16m8_m(vbool2_t mask, const uint16_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei16_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m1_m( @@ -967,7 +967,7 @@ vuint32mf2_t test_vluxei16_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei16_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u32m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m2_m( @@ -976,7 +976,7 @@ vuint32m1_t test_vluxei16_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei16_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u32m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m4_m( @@ -985,7 +985,7 @@ vuint32m2_t test_vluxei16_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei16_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u32m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m8_m( @@ -994,7 +994,7 @@ vuint32m4_t test_vluxei16_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei16_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u32m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m1_m( @@ -1003,7 +1003,7 @@ vuint32m8_t test_vluxei16_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei16_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u64m1_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m2_m( @@ -1012,7 +1012,7 @@ vuint64m1_t test_vluxei16_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei16_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u64m2_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m4_m( @@ -1021,7 +1021,7 @@ vuint64m2_t test_vluxei16_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei16_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u64m4_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m8_m( @@ -1030,6 +1030,6 @@ vuint64m4_t test_vluxei16_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei16_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u64m8_m(mask, base, bindex, vl); + return __riscv_vluxei16_v_u64m8_m(mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei32.c index 99043abc259bbb11204568cef9ea78bcb2fd2796..f66fc16a5657d601d6187ecaa98aca4f59bb48b5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei32_v_f16mf4(const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f16mf4(base, bindex, vl); + return __riscv_vluxei32_v_f16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vluxei32_v_f16mf4(const _Float16 *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei32_v_f16mf2(const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f16mf2(base, bindex, vl); + return __riscv_vluxei32_v_f16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vluxei32_v_f16mf2(const _Float16 *base, vuint32m1_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei32_v_f16m1(const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f16m1(base, bindex, vl); + return __riscv_vluxei32_v_f16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vluxei32_v_f16m1(const _Float16 *base, vuint32m2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei32_v_f16m2(const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f16m2(base, bindex, vl); + return __riscv_vluxei32_v_f16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vluxei32_v_f16m2(const _Float16 *base, vuint32m4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei32_v_f16m4(const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f16m4(base, bindex, vl); + return __riscv_vluxei32_v_f16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32mf2( @@ -58,7 +58,7 @@ vfloat16m4_t test_vluxei32_v_f16m4(const _Float16 *base, vuint32m8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei32_v_f32mf2(const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f32mf2(base, bindex, vl); + return __riscv_vluxei32_v_f32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m1( @@ -67,7 +67,7 @@ vfloat32mf2_t test_vluxei32_v_f32mf2(const float *base, vuint32mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei32_v_f32m1(const float *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f32m1(base, bindex, vl); + return __riscv_vluxei32_v_f32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m2( @@ -76,7 +76,7 @@ vfloat32m1_t test_vluxei32_v_f32m1(const float *base, vuint32m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei32_v_f32m2(const float *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f32m2(base, bindex, vl); + return __riscv_vluxei32_v_f32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m4( @@ -85,7 +85,7 @@ vfloat32m2_t test_vluxei32_v_f32m2(const float *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei32_v_f32m4(const float *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f32m4(base, bindex, vl); + return __riscv_vluxei32_v_f32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m8( @@ -94,7 +94,7 @@ vfloat32m4_t test_vluxei32_v_f32m4(const float *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei32_v_f32m8(const float *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f32m8(base, bindex, vl); + return __riscv_vluxei32_v_f32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m1( @@ -103,7 +103,7 @@ vfloat32m8_t test_vluxei32_v_f32m8(const float *base, vuint32m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei32_v_f64m1(const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f64m1(base, bindex, vl); + return __riscv_vluxei32_v_f64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m2( @@ -112,7 +112,7 @@ vfloat64m1_t test_vluxei32_v_f64m1(const double *base, vuint32mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei32_v_f64m2(const double *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f64m2(base, bindex, vl); + return __riscv_vluxei32_v_f64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m4( @@ -121,7 +121,7 @@ vfloat64m2_t test_vluxei32_v_f64m2(const double *base, vuint32m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei32_v_f64m4(const double *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f64m4(base, bindex, vl); + return __riscv_vluxei32_v_f64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m8( @@ -130,7 +130,7 @@ vfloat64m4_t test_vluxei32_v_f64m4(const double *base, vuint32m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei32_v_f64m8(const double *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f64m8(base, bindex, vl); + return __riscv_vluxei32_v_f64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf8( @@ -139,7 +139,7 @@ vfloat64m8_t test_vluxei32_v_f64m8(const double *base, vuint32m4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei32_v_i8mf8(const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i8mf8(base, bindex, vl); + return __riscv_vluxei32_v_i8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf4( @@ -148,7 +148,7 @@ vint8mf8_t test_vluxei32_v_i8mf8(const int8_t *base, vuint32mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei32_v_i8mf4(const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i8mf4(base, bindex, vl); + return __riscv_vluxei32_v_i8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf2( @@ -157,7 +157,7 @@ vint8mf4_t test_vluxei32_v_i8mf4(const int8_t *base, vuint32m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei32_v_i8mf2(const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i8mf2(base, bindex, vl); + return __riscv_vluxei32_v_i8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m1( @@ -166,7 +166,7 @@ vint8mf2_t test_vluxei32_v_i8mf2(const int8_t *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei32_v_i8m1(const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i8m1(base, bindex, vl); + return __riscv_vluxei32_v_i8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m2( @@ -175,7 +175,7 @@ vint8m1_t test_vluxei32_v_i8m1(const int8_t *base, vuint32m4_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei32_v_i8m2(const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i8m2(base, bindex, vl); + return __riscv_vluxei32_v_i8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf4( @@ -184,7 +184,7 @@ vint8m2_t test_vluxei32_v_i8m2(const int8_t *base, vuint32m8_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei32_v_i16mf4(const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i16mf4(base, bindex, vl); + return __riscv_vluxei32_v_i16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf2( @@ -193,7 +193,7 @@ vint16mf4_t test_vluxei32_v_i16mf4(const int16_t *base, vuint32mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei32_v_i16mf2(const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i16mf2(base, bindex, vl); + return __riscv_vluxei32_v_i16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m1( @@ -202,7 +202,7 @@ vint16mf2_t test_vluxei32_v_i16mf2(const int16_t *base, vuint32m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei32_v_i16m1(const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i16m1(base, bindex, vl); + return __riscv_vluxei32_v_i16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m2( @@ -211,7 +211,7 @@ vint16m1_t test_vluxei32_v_i16m1(const int16_t *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei32_v_i16m2(const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i16m2(base, bindex, vl); + return __riscv_vluxei32_v_i16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m4( @@ -220,7 +220,7 @@ vint16m2_t test_vluxei32_v_i16m2(const int16_t *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei32_v_i16m4(const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i16m4(base, bindex, vl); + return __riscv_vluxei32_v_i16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32mf2( @@ -229,7 +229,7 @@ vint16m4_t test_vluxei32_v_i16m4(const int16_t *base, vuint32m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei32_v_i32mf2(const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i32mf2(base, bindex, vl); + return __riscv_vluxei32_v_i32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m1( @@ -238,7 +238,7 @@ vint32mf2_t test_vluxei32_v_i32mf2(const int32_t *base, vuint32mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei32_v_i32m1(const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i32m1(base, bindex, vl); + return __riscv_vluxei32_v_i32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m2( @@ -247,7 +247,7 @@ vint32m1_t test_vluxei32_v_i32m1(const int32_t *base, vuint32m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei32_v_i32m2(const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i32m2(base, bindex, vl); + return __riscv_vluxei32_v_i32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m4( @@ -256,7 +256,7 @@ vint32m2_t test_vluxei32_v_i32m2(const int32_t *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei32_v_i32m4(const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i32m4(base, bindex, vl); + return __riscv_vluxei32_v_i32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m8( @@ -265,7 +265,7 @@ vint32m4_t test_vluxei32_v_i32m4(const int32_t *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei32_v_i32m8(const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i32m8(base, bindex, vl); + return __riscv_vluxei32_v_i32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m1( @@ -274,7 +274,7 @@ vint32m8_t test_vluxei32_v_i32m8(const int32_t *base, vuint32m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei32_v_i64m1(const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i64m1(base, bindex, vl); + return __riscv_vluxei32_v_i64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m2( @@ -283,7 +283,7 @@ vint64m1_t test_vluxei32_v_i64m1(const int64_t *base, vuint32mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei32_v_i64m2(const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i64m2(base, bindex, vl); + return __riscv_vluxei32_v_i64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m4( @@ -292,7 +292,7 @@ vint64m2_t test_vluxei32_v_i64m2(const int64_t *base, vuint32m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei32_v_i64m4(const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i64m4(base, bindex, vl); + return __riscv_vluxei32_v_i64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m8( @@ -301,7 +301,7 @@ vint64m4_t test_vluxei32_v_i64m4(const int64_t *base, vuint32m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei32_v_i64m8(const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i64m8(base, bindex, vl); + return __riscv_vluxei32_v_i64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf8( @@ -310,7 +310,7 @@ vint64m8_t test_vluxei32_v_i64m8(const int64_t *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei32_v_u8mf8(const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u8mf8(base, bindex, vl); + return __riscv_vluxei32_v_u8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf4( @@ -319,7 +319,7 @@ vuint8mf8_t test_vluxei32_v_u8mf8(const uint8_t *base, vuint32mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei32_v_u8mf4(const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u8mf4(base, bindex, vl); + return __riscv_vluxei32_v_u8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf2( @@ -328,7 +328,7 @@ vuint8mf4_t test_vluxei32_v_u8mf4(const uint8_t *base, vuint32m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei32_v_u8mf2(const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u8mf2(base, bindex, vl); + return __riscv_vluxei32_v_u8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m1( @@ -337,7 +337,7 @@ vuint8mf2_t test_vluxei32_v_u8mf2(const uint8_t *base, vuint32m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei32_v_u8m1(const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u8m1(base, bindex, vl); + return __riscv_vluxei32_v_u8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m2( @@ -346,7 +346,7 @@ vuint8m1_t test_vluxei32_v_u8m1(const uint8_t *base, vuint32m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei32_v_u8m2(const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u8m2(base, bindex, vl); + return __riscv_vluxei32_v_u8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf4( @@ -355,7 +355,7 @@ vuint8m2_t test_vluxei32_v_u8m2(const uint8_t *base, vuint32m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei32_v_u16mf4(const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u16mf4(base, bindex, vl); + return __riscv_vluxei32_v_u16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf2( @@ -364,7 +364,7 @@ vuint16mf4_t test_vluxei32_v_u16mf4(const uint16_t *base, vuint32mf2_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei32_v_u16mf2(const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u16mf2(base, bindex, vl); + return __riscv_vluxei32_v_u16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m1( @@ -373,7 +373,7 @@ vuint16mf2_t test_vluxei32_v_u16mf2(const uint16_t *base, vuint32m1_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei32_v_u16m1(const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u16m1(base, bindex, vl); + return __riscv_vluxei32_v_u16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m2( @@ -382,7 +382,7 @@ vuint16m1_t test_vluxei32_v_u16m1(const uint16_t *base, vuint32m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei32_v_u16m2(const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u16m2(base, bindex, vl); + return __riscv_vluxei32_v_u16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m4( @@ -391,7 +391,7 @@ vuint16m2_t test_vluxei32_v_u16m2(const uint16_t *base, vuint32m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei32_v_u16m4(const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u16m4(base, bindex, vl); + return __riscv_vluxei32_v_u16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32mf2( @@ -400,7 +400,7 @@ vuint16m4_t test_vluxei32_v_u16m4(const uint16_t *base, vuint32m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei32_v_u32mf2(const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u32mf2(base, bindex, vl); + return __riscv_vluxei32_v_u32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m1( @@ -409,7 +409,7 @@ vuint32mf2_t test_vluxei32_v_u32mf2(const uint32_t *base, vuint32mf2_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei32_v_u32m1(const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u32m1(base, bindex, vl); + return __riscv_vluxei32_v_u32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m2( @@ -418,7 +418,7 @@ vuint32m1_t test_vluxei32_v_u32m1(const uint32_t *base, vuint32m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei32_v_u32m2(const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u32m2(base, bindex, vl); + return __riscv_vluxei32_v_u32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m4( @@ -427,7 +427,7 @@ vuint32m2_t test_vluxei32_v_u32m2(const uint32_t *base, vuint32m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei32_v_u32m4(const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u32m4(base, bindex, vl); + return __riscv_vluxei32_v_u32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m8( @@ -436,7 +436,7 @@ vuint32m4_t test_vluxei32_v_u32m4(const uint32_t *base, vuint32m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei32_v_u32m8(const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u32m8(base, bindex, vl); + return __riscv_vluxei32_v_u32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m1( @@ -445,7 +445,7 @@ vuint32m8_t test_vluxei32_v_u32m8(const uint32_t *base, vuint32m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei32_v_u64m1(const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u64m1(base, bindex, vl); + return __riscv_vluxei32_v_u64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m2( @@ -454,7 +454,7 @@ vuint64m1_t test_vluxei32_v_u64m1(const uint64_t *base, vuint32mf2_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei32_v_u64m2(const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u64m2(base, bindex, vl); + return __riscv_vluxei32_v_u64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m4( @@ -463,7 +463,7 @@ vuint64m2_t test_vluxei32_v_u64m2(const uint64_t *base, vuint32m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei32_v_u64m4(const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u64m4(base, bindex, vl); + return __riscv_vluxei32_v_u64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m8( @@ -472,7 +472,7 @@ vuint64m4_t test_vluxei32_v_u64m4(const uint64_t *base, vuint32m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei32_v_u64m8(const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u64m8(base, bindex, vl); + return __riscv_vluxei32_v_u64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf4_m( @@ -481,7 +481,7 @@ vuint64m8_t test_vluxei32_v_u64m8(const uint64_t *base, vuint32m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei32_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf2_m( @@ -490,7 +490,7 @@ vfloat16mf4_t test_vluxei32_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei32_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m1_m( @@ -499,7 +499,7 @@ vfloat16mf2_t test_vluxei32_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei32_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f16m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m2_m( @@ -508,7 +508,7 @@ vfloat16m1_t test_vluxei32_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei32_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f16m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m4_m( @@ -517,7 +517,7 @@ vfloat16m2_t test_vluxei32_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei32_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f16m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32mf2_m( @@ -526,7 +526,7 @@ vfloat16m4_t test_vluxei32_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei32_v_f32mf2_m(vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m1_m( @@ -535,7 +535,7 @@ vfloat32mf2_t test_vluxei32_v_f32mf2_m(vbool64_t mask, const float *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei32_v_f32m1_m(vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f32m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m2_m( @@ -544,7 +544,7 @@ vfloat32m1_t test_vluxei32_v_f32m1_m(vbool32_t mask, const float *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei32_v_f32m2_m(vbool16_t mask, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f32m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m4_m( @@ -553,7 +553,7 @@ vfloat32m2_t test_vluxei32_v_f32m2_m(vbool16_t mask, const float *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei32_v_f32m4_m(vbool8_t mask, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f32m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m8_m( @@ -562,7 +562,7 @@ vfloat32m4_t test_vluxei32_v_f32m4_m(vbool8_t mask, const float *base, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei32_v_f32m8_m(vbool4_t mask, const float *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f32m8_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m1_m( @@ -571,7 +571,7 @@ vfloat32m8_t test_vluxei32_v_f32m8_m(vbool4_t mask, const float *base, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei32_v_f64m1_m(vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f64m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m2_m( @@ -580,7 +580,7 @@ vfloat64m1_t test_vluxei32_v_f64m1_m(vbool64_t mask, const double *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei32_v_f64m2_m(vbool32_t mask, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f64m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m4_m( @@ -589,7 +589,7 @@ vfloat64m2_t test_vluxei32_v_f64m2_m(vbool32_t mask, const double *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei32_v_f64m4_m(vbool16_t mask, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f64m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m8_m( @@ -598,7 +598,7 @@ vfloat64m4_t test_vluxei32_v_f64m4_m(vbool16_t mask, const double *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei32_v_f64m8_m(vbool8_t mask, const double *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f64m8_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_f64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf8_m( @@ -607,7 +607,7 @@ vfloat64m8_t test_vluxei32_v_f64m8_m(vbool8_t mask, const double *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei32_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i8mf8_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf4_m( @@ -616,7 +616,7 @@ vint8mf8_t test_vluxei32_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei32_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i8mf4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf2_m( @@ -625,7 +625,7 @@ vint8mf4_t test_vluxei32_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei32_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i8mf2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m1_m( @@ -634,7 +634,7 @@ vint8mf2_t test_vluxei32_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei32_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i8m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m2_m( @@ -643,7 +643,7 @@ vint8m1_t test_vluxei32_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei32_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i8m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf4_m( @@ -652,7 +652,7 @@ vint8m2_t test_vluxei32_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei32_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf2_m( @@ -661,7 +661,7 @@ vint16mf4_t test_vluxei32_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei32_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m1_m( @@ -670,7 +670,7 @@ vint16mf2_t test_vluxei32_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei32_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i16m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m2_m( @@ -679,7 +679,7 @@ vint16m1_t test_vluxei32_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei32_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i16m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m4_m( @@ -688,7 +688,7 @@ vint16m2_t test_vluxei32_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei32_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i16m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32mf2_m( @@ -697,7 +697,7 @@ vint16m4_t test_vluxei32_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei32_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m1_m( @@ -706,7 +706,7 @@ vint32mf2_t test_vluxei32_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei32_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i32m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m2_m( @@ -715,7 +715,7 @@ vint32m1_t test_vluxei32_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei32_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i32m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m4_m( @@ -724,7 +724,7 @@ vint32m2_t test_vluxei32_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei32_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i32m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m8_m( @@ -733,7 +733,7 @@ vint32m4_t test_vluxei32_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei32_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i32m8_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m1_m( @@ -742,7 +742,7 @@ vint32m8_t test_vluxei32_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei32_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i64m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m2_m( @@ -751,7 +751,7 @@ vint64m1_t test_vluxei32_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei32_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i64m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m4_m( @@ -760,7 +760,7 @@ vint64m2_t test_vluxei32_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei32_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i64m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m8_m( @@ -769,7 +769,7 @@ vint64m4_t test_vluxei32_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei32_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i64m8_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_i64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf8_m( @@ -778,7 +778,7 @@ vint64m8_t test_vluxei32_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei32_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u8mf8_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf4_m( @@ -787,7 +787,7 @@ vuint8mf8_t test_vluxei32_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei32_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u8mf4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf2_m( @@ -796,7 +796,7 @@ vuint8mf4_t test_vluxei32_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei32_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u8mf2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m1_m( @@ -805,7 +805,7 @@ vuint8mf2_t test_vluxei32_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei32_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u8m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m2_m( @@ -814,7 +814,7 @@ vuint8m1_t test_vluxei32_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei32_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u8m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf4_m( @@ -823,7 +823,7 @@ vuint8m2_t test_vluxei32_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei32_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf2_m( @@ -832,7 +832,7 @@ vuint16mf4_t test_vluxei32_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei32_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m1_m( @@ -841,7 +841,7 @@ vuint16mf2_t test_vluxei32_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei32_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u16m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m2_m( @@ -850,7 +850,7 @@ vuint16m1_t test_vluxei32_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei32_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u16m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m4_m( @@ -859,7 +859,7 @@ vuint16m2_t test_vluxei32_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei32_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u16m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32mf2_m( @@ -868,7 +868,7 @@ vuint16m4_t test_vluxei32_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei32_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m1_m( @@ -877,7 +877,7 @@ vuint32mf2_t test_vluxei32_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei32_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u32m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m2_m( @@ -886,7 +886,7 @@ vuint32m1_t test_vluxei32_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei32_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u32m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m4_m( @@ -895,7 +895,7 @@ vuint32m2_t test_vluxei32_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei32_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u32m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m8_m( @@ -904,7 +904,7 @@ vuint32m4_t test_vluxei32_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei32_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u32m8_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m1_m( @@ -913,7 +913,7 @@ vuint32m8_t test_vluxei32_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei32_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u64m1_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m2_m( @@ -922,7 +922,7 @@ vuint64m1_t test_vluxei32_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei32_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u64m2_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m4_m( @@ -931,7 +931,7 @@ vuint64m2_t test_vluxei32_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei32_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u64m4_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m8_m( @@ -940,6 +940,6 @@ vuint64m4_t test_vluxei32_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei32_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u64m8_m(mask, base, bindex, vl); + return __riscv_vluxei32_v_u64m8_m(mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei64.c index d1f373c9c5a81a12eb73645ca12e3068990542a3..eecc8db96e7098d8eb7a5de4e05d792fcb72c3fb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei64_v_f16mf4(const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f16mf4(base, bindex, vl); + return __riscv_vluxei64_v_f16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vluxei64_v_f16mf4(const _Float16 *base, vuint64m1_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei64_v_f16mf2(const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f16mf2(base, bindex, vl); + return __riscv_vluxei64_v_f16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vluxei64_v_f16mf2(const _Float16 *base, vuint64m2_t bindex, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei64_v_f16m1(const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f16m1(base, bindex, vl); + return __riscv_vluxei64_v_f16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vluxei64_v_f16m1(const _Float16 *base, vuint64m4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei64_v_f16m2(const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f16m2(base, bindex, vl); + return __riscv_vluxei64_v_f16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32mf2( @@ -49,7 +49,7 @@ vfloat16m2_t test_vluxei64_v_f16m2(const _Float16 *base, vuint64m8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei64_v_f32mf2(const float *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f32mf2(base, bindex, vl); + return __riscv_vluxei64_v_f32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m1( @@ -58,7 +58,7 @@ vfloat32mf2_t test_vluxei64_v_f32mf2(const float *base, vuint64m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei64_v_f32m1(const float *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f32m1(base, bindex, vl); + return __riscv_vluxei64_v_f32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m2( @@ -67,7 +67,7 @@ vfloat32m1_t test_vluxei64_v_f32m1(const float *base, vuint64m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei64_v_f32m2(const float *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f32m2(base, bindex, vl); + return __riscv_vluxei64_v_f32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m4( @@ -76,7 +76,7 @@ vfloat32m2_t test_vluxei64_v_f32m2(const float *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei64_v_f32m4(const float *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f32m4(base, bindex, vl); + return __riscv_vluxei64_v_f32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m1( @@ -85,7 +85,7 @@ vfloat32m4_t test_vluxei64_v_f32m4(const float *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei64_v_f64m1(const double *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f64m1(base, bindex, vl); + return __riscv_vluxei64_v_f64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m2( @@ -94,7 +94,7 @@ vfloat64m1_t test_vluxei64_v_f64m1(const double *base, vuint64m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei64_v_f64m2(const double *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f64m2(base, bindex, vl); + return __riscv_vluxei64_v_f64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m4( @@ -103,7 +103,7 @@ vfloat64m2_t test_vluxei64_v_f64m2(const double *base, vuint64m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei64_v_f64m4(const double *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f64m4(base, bindex, vl); + return __riscv_vluxei64_v_f64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m8( @@ -112,7 +112,7 @@ vfloat64m4_t test_vluxei64_v_f64m4(const double *base, vuint64m4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei64_v_f64m8(const double *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f64m8(base, bindex, vl); + return __riscv_vluxei64_v_f64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf8( @@ -121,7 +121,7 @@ vfloat64m8_t test_vluxei64_v_f64m8(const double *base, vuint64m8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei64_v_i8mf8(const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i8mf8(base, bindex, vl); + return __riscv_vluxei64_v_i8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf4( @@ -130,7 +130,7 @@ vint8mf8_t test_vluxei64_v_i8mf8(const int8_t *base, vuint64m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei64_v_i8mf4(const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i8mf4(base, bindex, vl); + return __riscv_vluxei64_v_i8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf2( @@ -139,7 +139,7 @@ vint8mf4_t test_vluxei64_v_i8mf4(const int8_t *base, vuint64m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei64_v_i8mf2(const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i8mf2(base, bindex, vl); + return __riscv_vluxei64_v_i8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8m1( @@ -148,7 +148,7 @@ vint8mf2_t test_vluxei64_v_i8mf2(const int8_t *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei64_v_i8m1(const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i8m1(base, bindex, vl); + return __riscv_vluxei64_v_i8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf4( @@ -157,7 +157,7 @@ vint8m1_t test_vluxei64_v_i8m1(const int8_t *base, vuint64m8_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei64_v_i16mf4(const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i16mf4(base, bindex, vl); + return __riscv_vluxei64_v_i16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf2( @@ -166,7 +166,7 @@ vint16mf4_t test_vluxei64_v_i16mf4(const int16_t *base, vuint64m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei64_v_i16mf2(const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i16mf2(base, bindex, vl); + return __riscv_vluxei64_v_i16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m1( @@ -175,7 +175,7 @@ vint16mf2_t test_vluxei64_v_i16mf2(const int16_t *base, vuint64m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei64_v_i16m1(const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i16m1(base, bindex, vl); + return __riscv_vluxei64_v_i16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m2( @@ -184,7 +184,7 @@ vint16m1_t test_vluxei64_v_i16m1(const int16_t *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei64_v_i16m2(const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i16m2(base, bindex, vl); + return __riscv_vluxei64_v_i16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32mf2( @@ -193,7 +193,7 @@ vint16m2_t test_vluxei64_v_i16m2(const int16_t *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei64_v_i32mf2(const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i32mf2(base, bindex, vl); + return __riscv_vluxei64_v_i32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m1( @@ -202,7 +202,7 @@ vint32mf2_t test_vluxei64_v_i32mf2(const int32_t *base, vuint64m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei64_v_i32m1(const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i32m1(base, bindex, vl); + return __riscv_vluxei64_v_i32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m2( @@ -211,7 +211,7 @@ vint32m1_t test_vluxei64_v_i32m1(const int32_t *base, vuint64m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei64_v_i32m2(const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i32m2(base, bindex, vl); + return __riscv_vluxei64_v_i32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m4( @@ -220,7 +220,7 @@ vint32m2_t test_vluxei64_v_i32m2(const int32_t *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei64_v_i32m4(const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i32m4(base, bindex, vl); + return __riscv_vluxei64_v_i32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m1( @@ -229,7 +229,7 @@ vint32m4_t test_vluxei64_v_i32m4(const int32_t *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei64_v_i64m1(const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i64m1(base, bindex, vl); + return __riscv_vluxei64_v_i64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m2( @@ -238,7 +238,7 @@ vint64m1_t test_vluxei64_v_i64m1(const int64_t *base, vuint64m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei64_v_i64m2(const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i64m2(base, bindex, vl); + return __riscv_vluxei64_v_i64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m4( @@ -247,7 +247,7 @@ vint64m2_t test_vluxei64_v_i64m2(const int64_t *base, vuint64m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei64_v_i64m4(const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i64m4(base, bindex, vl); + return __riscv_vluxei64_v_i64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m8( @@ -256,7 +256,7 @@ vint64m4_t test_vluxei64_v_i64m4(const int64_t *base, vuint64m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei64_v_i64m8(const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i64m8(base, bindex, vl); + return __riscv_vluxei64_v_i64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf8( @@ -265,7 +265,7 @@ vint64m8_t test_vluxei64_v_i64m8(const int64_t *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei64_v_u8mf8(const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u8mf8(base, bindex, vl); + return __riscv_vluxei64_v_u8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf4( @@ -274,7 +274,7 @@ vuint8mf8_t test_vluxei64_v_u8mf8(const uint8_t *base, vuint64m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei64_v_u8mf4(const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u8mf4(base, bindex, vl); + return __riscv_vluxei64_v_u8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf2( @@ -283,7 +283,7 @@ vuint8mf4_t test_vluxei64_v_u8mf4(const uint8_t *base, vuint64m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei64_v_u8mf2(const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u8mf2(base, bindex, vl); + return __riscv_vluxei64_v_u8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8m1( @@ -292,7 +292,7 @@ vuint8mf2_t test_vluxei64_v_u8mf2(const uint8_t *base, vuint64m4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei64_v_u8m1(const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u8m1(base, bindex, vl); + return __riscv_vluxei64_v_u8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf4( @@ -301,7 +301,7 @@ vuint8m1_t test_vluxei64_v_u8m1(const uint8_t *base, vuint64m8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei64_v_u16mf4(const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u16mf4(base, bindex, vl); + return __riscv_vluxei64_v_u16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf2( @@ -310,7 +310,7 @@ vuint16mf4_t test_vluxei64_v_u16mf4(const uint16_t *base, vuint64m1_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei64_v_u16mf2(const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u16mf2(base, bindex, vl); + return __riscv_vluxei64_v_u16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m1( @@ -319,7 +319,7 @@ vuint16mf2_t test_vluxei64_v_u16mf2(const uint16_t *base, vuint64m2_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei64_v_u16m1(const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u16m1(base, bindex, vl); + return __riscv_vluxei64_v_u16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m2( @@ -328,7 +328,7 @@ vuint16m1_t test_vluxei64_v_u16m1(const uint16_t *base, vuint64m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei64_v_u16m2(const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u16m2(base, bindex, vl); + return __riscv_vluxei64_v_u16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32mf2( @@ -337,7 +337,7 @@ vuint16m2_t test_vluxei64_v_u16m2(const uint16_t *base, vuint64m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei64_v_u32mf2(const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u32mf2(base, bindex, vl); + return __riscv_vluxei64_v_u32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m1( @@ -346,7 +346,7 @@ vuint32mf2_t test_vluxei64_v_u32mf2(const uint32_t *base, vuint64m1_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei64_v_u32m1(const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u32m1(base, bindex, vl); + return __riscv_vluxei64_v_u32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m2( @@ -355,7 +355,7 @@ vuint32m1_t test_vluxei64_v_u32m1(const uint32_t *base, vuint64m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei64_v_u32m2(const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u32m2(base, bindex, vl); + return __riscv_vluxei64_v_u32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m4( @@ -364,7 +364,7 @@ vuint32m2_t test_vluxei64_v_u32m2(const uint32_t *base, vuint64m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei64_v_u32m4(const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u32m4(base, bindex, vl); + return __riscv_vluxei64_v_u32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m1( @@ -373,7 +373,7 @@ vuint32m4_t test_vluxei64_v_u32m4(const uint32_t *base, vuint64m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei64_v_u64m1(const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u64m1(base, bindex, vl); + return __riscv_vluxei64_v_u64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m2( @@ -382,7 +382,7 @@ vuint64m1_t test_vluxei64_v_u64m1(const uint64_t *base, vuint64m1_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei64_v_u64m2(const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u64m2(base, bindex, vl); + return __riscv_vluxei64_v_u64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m4( @@ -391,7 +391,7 @@ vuint64m2_t test_vluxei64_v_u64m2(const uint64_t *base, vuint64m2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei64_v_u64m4(const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u64m4(base, bindex, vl); + return __riscv_vluxei64_v_u64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m8( @@ -400,7 +400,7 @@ vuint64m4_t test_vluxei64_v_u64m4(const uint64_t *base, vuint64m4_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei64_v_u64m8(const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u64m8(base, bindex, vl); + return __riscv_vluxei64_v_u64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf4_m( @@ -409,7 +409,7 @@ vuint64m8_t test_vluxei64_v_u64m8(const uint64_t *base, vuint64m8_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei64_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf2_m( @@ -418,7 +418,7 @@ vfloat16mf4_t test_vluxei64_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei64_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m1_m( @@ -427,7 +427,7 @@ vfloat16mf2_t test_vluxei64_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei64_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f16m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m2_m( @@ -436,7 +436,7 @@ vfloat16m1_t test_vluxei64_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei64_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f16m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32mf2_m( @@ -445,7 +445,7 @@ vfloat16m2_t test_vluxei64_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei64_v_f32mf2_m(vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m1_m( @@ -454,7 +454,7 @@ vfloat32mf2_t test_vluxei64_v_f32mf2_m(vbool64_t mask, const float *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei64_v_f32m1_m(vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f32m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m2_m( @@ -463,7 +463,7 @@ vfloat32m1_t test_vluxei64_v_f32m1_m(vbool32_t mask, const float *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei64_v_f32m2_m(vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f32m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m4_m( @@ -472,7 +472,7 @@ vfloat32m2_t test_vluxei64_v_f32m2_m(vbool16_t mask, const float *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei64_v_f32m4_m(vbool8_t mask, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f32m4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m1_m( @@ -481,7 +481,7 @@ vfloat32m4_t test_vluxei64_v_f32m4_m(vbool8_t mask, const float *base, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei64_v_f64m1_m(vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f64m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m2_m( @@ -490,7 +490,7 @@ vfloat64m1_t test_vluxei64_v_f64m1_m(vbool64_t mask, const double *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei64_v_f64m2_m(vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f64m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m4_m( @@ -499,7 +499,7 @@ vfloat64m2_t test_vluxei64_v_f64m2_m(vbool32_t mask, const double *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei64_v_f64m4_m(vbool16_t mask, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f64m4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m8_m( @@ -508,7 +508,7 @@ vfloat64m4_t test_vluxei64_v_f64m4_m(vbool16_t mask, const double *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei64_v_f64m8_m(vbool8_t mask, const double *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f64m8_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_f64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf8_m( @@ -517,7 +517,7 @@ vfloat64m8_t test_vluxei64_v_f64m8_m(vbool8_t mask, const double *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei64_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i8mf8_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf4_m( @@ -526,7 +526,7 @@ vint8mf8_t test_vluxei64_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei64_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i8mf4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf2_m( @@ -535,7 +535,7 @@ vint8mf4_t test_vluxei64_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei64_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i8mf2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8m1_m( @@ -544,7 +544,7 @@ vint8mf2_t test_vluxei64_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei64_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i8m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf4_m( @@ -553,7 +553,7 @@ vint8m1_t test_vluxei64_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei64_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf2_m( @@ -562,7 +562,7 @@ vint16mf4_t test_vluxei64_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei64_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m1_m( @@ -571,7 +571,7 @@ vint16mf2_t test_vluxei64_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei64_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i16m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m2_m( @@ -580,7 +580,7 @@ vint16m1_t test_vluxei64_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei64_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i16m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32mf2_m( @@ -589,7 +589,7 @@ vint16m2_t test_vluxei64_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei64_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m1_m( @@ -598,7 +598,7 @@ vint32mf2_t test_vluxei64_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei64_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i32m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m2_m( @@ -607,7 +607,7 @@ vint32m1_t test_vluxei64_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei64_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i32m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m4_m( @@ -616,7 +616,7 @@ vint32m2_t test_vluxei64_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei64_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i32m4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m1_m( @@ -625,7 +625,7 @@ vint32m4_t test_vluxei64_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei64_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i64m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m2_m( @@ -634,7 +634,7 @@ vint64m1_t test_vluxei64_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei64_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i64m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m4_m( @@ -643,7 +643,7 @@ vint64m2_t test_vluxei64_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei64_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i64m4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m8_m( @@ -652,7 +652,7 @@ vint64m4_t test_vluxei64_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei64_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i64m8_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_i64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf8_m( @@ -661,7 +661,7 @@ vint64m8_t test_vluxei64_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei64_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u8mf8_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf4_m( @@ -670,7 +670,7 @@ vuint8mf8_t test_vluxei64_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei64_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u8mf4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf2_m( @@ -679,7 +679,7 @@ vuint8mf4_t test_vluxei64_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei64_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u8mf2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8m1_m( @@ -688,7 +688,7 @@ vuint8mf2_t test_vluxei64_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei64_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u8m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf4_m( @@ -697,7 +697,7 @@ vuint8m1_t test_vluxei64_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei64_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf2_m( @@ -706,7 +706,7 @@ vuint16mf4_t test_vluxei64_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei64_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m1_m( @@ -715,7 +715,7 @@ vuint16mf2_t test_vluxei64_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei64_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u16m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m2_m( @@ -724,7 +724,7 @@ vuint16m1_t test_vluxei64_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei64_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u16m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32mf2_m( @@ -733,7 +733,7 @@ vuint16m2_t test_vluxei64_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei64_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m1_m( @@ -742,7 +742,7 @@ vuint32mf2_t test_vluxei64_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei64_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u32m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m2_m( @@ -751,7 +751,7 @@ vuint32m1_t test_vluxei64_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei64_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u32m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m4_m( @@ -760,7 +760,7 @@ vuint32m2_t test_vluxei64_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei64_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u32m4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m1_m( @@ -769,7 +769,7 @@ vuint32m4_t test_vluxei64_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei64_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u64m1_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m2_m( @@ -778,7 +778,7 @@ vuint64m1_t test_vluxei64_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei64_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u64m2_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m4_m( @@ -787,7 +787,7 @@ vuint64m2_t test_vluxei64_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei64_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u64m4_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m8_m( @@ -796,6 +796,6 @@ vuint64m4_t test_vluxei64_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei64_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u64m8_m(mask, base, bindex, vl); + return __riscv_vluxei64_v_u64m8_m(mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei8.c index c3450c6b8f1297b9bf9ca92a21f25e4099a065be..f4af174715b977b1605ad7eeb7824e1f54117c4a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei8_v_f16mf4(const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f16mf4(base, bindex, vl); + return __riscv_vluxei8_v_f16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vluxei8_v_f16mf4(const _Float16 *base, vuint8mf8_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei8_v_f16mf2(const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f16mf2(base, bindex, vl); + return __riscv_vluxei8_v_f16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vluxei8_v_f16mf2(const _Float16 *base, vuint8mf4_t bindex, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei8_v_f16m1(const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f16m1(base, bindex, vl); + return __riscv_vluxei8_v_f16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vluxei8_v_f16m1(const _Float16 *base, vuint8mf2_t bindex, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei8_v_f16m2(const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f16m2(base, bindex, vl); + return __riscv_vluxei8_v_f16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vluxei8_v_f16m2(const _Float16 *base, vuint8m1_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei8_v_f16m4(const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f16m4(base, bindex, vl); + return __riscv_vluxei8_v_f16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vluxei8_v_f16m4(const _Float16 *base, vuint8m2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei8_v_f16m8(const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_f16m8(base, bindex, vl); + return __riscv_vluxei8_v_f16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vluxei8_v_f16m8(const _Float16 *base, vuint8m4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei8_v_f32mf2(const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f32mf2(base, bindex, vl); + return __riscv_vluxei8_v_f32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vluxei8_v_f32mf2(const float *base, vuint8mf8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei8_v_f32m1(const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f32m1(base, bindex, vl); + return __riscv_vluxei8_v_f32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vluxei8_v_f32m1(const float *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei8_v_f32m2(const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f32m2(base, bindex, vl); + return __riscv_vluxei8_v_f32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vluxei8_v_f32m2(const float *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei8_v_f32m4(const float *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f32m4(base, bindex, vl); + return __riscv_vluxei8_v_f32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vluxei8_v_f32m4(const float *base, vuint8m1_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei8_v_f32m8(const float *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f32m8(base, bindex, vl); + return __riscv_vluxei8_v_f32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vluxei8_v_f32m8(const float *base, vuint8m2_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei8_v_f64m1(const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f64m1(base, bindex, vl); + return __riscv_vluxei8_v_f64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vluxei8_v_f64m1(const double *base, vuint8mf8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei8_v_f64m2(const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f64m2(base, bindex, vl); + return __riscv_vluxei8_v_f64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vluxei8_v_f64m2(const double *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei8_v_f64m4(const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f64m4(base, bindex, vl); + return __riscv_vluxei8_v_f64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vluxei8_v_f64m4(const double *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei8_v_f64m8(const double *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f64m8(base, bindex, vl); + return __riscv_vluxei8_v_f64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf8( @@ -148,7 +148,7 @@ vfloat64m8_t test_vluxei8_v_f64m8(const double *base, vuint8m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei8_v_i8mf8(const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i8mf8(base, bindex, vl); + return __riscv_vluxei8_v_i8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf4( @@ -157,7 +157,7 @@ vint8mf8_t test_vluxei8_v_i8mf8(const int8_t *base, vuint8mf8_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei8_v_i8mf4(const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i8mf4(base, bindex, vl); + return __riscv_vluxei8_v_i8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf2( @@ -166,7 +166,7 @@ vint8mf4_t test_vluxei8_v_i8mf4(const int8_t *base, vuint8mf4_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei8_v_i8mf2(const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i8mf2(base, bindex, vl); + return __riscv_vluxei8_v_i8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m1( @@ -175,7 +175,7 @@ vint8mf2_t test_vluxei8_v_i8mf2(const int8_t *base, vuint8mf2_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei8_v_i8m1(const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i8m1(base, bindex, vl); + return __riscv_vluxei8_v_i8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m2( @@ -184,7 +184,7 @@ vint8m1_t test_vluxei8_v_i8m1(const int8_t *base, vuint8m1_t bindex, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei8_v_i8m2(const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i8m2(base, bindex, vl); + return __riscv_vluxei8_v_i8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m4( @@ -193,7 +193,7 @@ vint8m2_t test_vluxei8_v_i8m2(const int8_t *base, vuint8m2_t bindex, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei8_v_i8m4(const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i8m4(base, bindex, vl); + return __riscv_vluxei8_v_i8m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m8( @@ -202,7 +202,7 @@ vint8m4_t test_vluxei8_v_i8m4(const int8_t *base, vuint8m4_t bindex, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vluxei8_v_i8m8(const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_i8m8(base, bindex, vl); + return __riscv_vluxei8_v_i8m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf4( @@ -211,7 +211,7 @@ vint8m8_t test_vluxei8_v_i8m8(const int8_t *base, vuint8m8_t bindex, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei8_v_i16mf4(const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i16mf4(base, bindex, vl); + return __riscv_vluxei8_v_i16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf2( @@ -220,7 +220,7 @@ vint16mf4_t test_vluxei8_v_i16mf4(const int16_t *base, vuint8mf8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei8_v_i16mf2(const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i16mf2(base, bindex, vl); + return __riscv_vluxei8_v_i16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m1( @@ -229,7 +229,7 @@ vint16mf2_t test_vluxei8_v_i16mf2(const int16_t *base, vuint8mf4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei8_v_i16m1(const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i16m1(base, bindex, vl); + return __riscv_vluxei8_v_i16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m2( @@ -238,7 +238,7 @@ vint16m1_t test_vluxei8_v_i16m1(const int16_t *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei8_v_i16m2(const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i16m2(base, bindex, vl); + return __riscv_vluxei8_v_i16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m4( @@ -247,7 +247,7 @@ vint16m2_t test_vluxei8_v_i16m2(const int16_t *base, vuint8m1_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei8_v_i16m4(const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i16m4(base, bindex, vl); + return __riscv_vluxei8_v_i16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m8( @@ -256,7 +256,7 @@ vint16m4_t test_vluxei8_v_i16m4(const int16_t *base, vuint8m2_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei8_v_i16m8(const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i16m8(base, bindex, vl); + return __riscv_vluxei8_v_i16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32mf2( @@ -265,7 +265,7 @@ vint16m8_t test_vluxei8_v_i16m8(const int16_t *base, vuint8m4_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei8_v_i32mf2(const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i32mf2(base, bindex, vl); + return __riscv_vluxei8_v_i32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m1( @@ -274,7 +274,7 @@ vint32mf2_t test_vluxei8_v_i32mf2(const int32_t *base, vuint8mf8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei8_v_i32m1(const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i32m1(base, bindex, vl); + return __riscv_vluxei8_v_i32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vluxei8_v_i32m1(const int32_t *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei8_v_i32m2(const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i32m2(base, bindex, vl); + return __riscv_vluxei8_v_i32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m4( @@ -292,7 +292,7 @@ vint32m2_t test_vluxei8_v_i32m2(const int32_t *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei8_v_i32m4(const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i32m4(base, bindex, vl); + return __riscv_vluxei8_v_i32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m8( @@ -301,7 +301,7 @@ vint32m4_t test_vluxei8_v_i32m4(const int32_t *base, vuint8m1_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei8_v_i32m8(const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i32m8(base, bindex, vl); + return __riscv_vluxei8_v_i32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m1( @@ -310,7 +310,7 @@ vint32m8_t test_vluxei8_v_i32m8(const int32_t *base, vuint8m2_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei8_v_i64m1(const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i64m1(base, bindex, vl); + return __riscv_vluxei8_v_i64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m2( @@ -319,7 +319,7 @@ vint64m1_t test_vluxei8_v_i64m1(const int64_t *base, vuint8mf8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei8_v_i64m2(const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i64m2(base, bindex, vl); + return __riscv_vluxei8_v_i64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m4( @@ -328,7 +328,7 @@ vint64m2_t test_vluxei8_v_i64m2(const int64_t *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei8_v_i64m4(const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i64m4(base, bindex, vl); + return __riscv_vluxei8_v_i64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m8( @@ -337,7 +337,7 @@ vint64m4_t test_vluxei8_v_i64m4(const int64_t *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei8_v_i64m8(const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i64m8(base, bindex, vl); + return __riscv_vluxei8_v_i64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf8( @@ -346,7 +346,7 @@ vint64m8_t test_vluxei8_v_i64m8(const int64_t *base, vuint8m1_t bindex, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei8_v_u8mf8(const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u8mf8(base, bindex, vl); + return __riscv_vluxei8_v_u8mf8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf4( @@ -355,7 +355,7 @@ vuint8mf8_t test_vluxei8_v_u8mf8(const uint8_t *base, vuint8mf8_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei8_v_u8mf4(const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u8mf4(base, bindex, vl); + return __riscv_vluxei8_v_u8mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf2( @@ -364,7 +364,7 @@ vuint8mf4_t test_vluxei8_v_u8mf4(const uint8_t *base, vuint8mf4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei8_v_u8mf2(const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u8mf2(base, bindex, vl); + return __riscv_vluxei8_v_u8mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m1( @@ -373,7 +373,7 @@ vuint8mf2_t test_vluxei8_v_u8mf2(const uint8_t *base, vuint8mf2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei8_v_u8m1(const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u8m1(base, bindex, vl); + return __riscv_vluxei8_v_u8m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m2( @@ -382,7 +382,7 @@ vuint8m1_t test_vluxei8_v_u8m1(const uint8_t *base, vuint8m1_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei8_v_u8m2(const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u8m2(base, bindex, vl); + return __riscv_vluxei8_v_u8m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m4( @@ -391,7 +391,7 @@ vuint8m2_t test_vluxei8_v_u8m2(const uint8_t *base, vuint8m2_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei8_v_u8m4(const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u8m4(base, bindex, vl); + return __riscv_vluxei8_v_u8m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m8( @@ -400,7 +400,7 @@ vuint8m4_t test_vluxei8_v_u8m4(const uint8_t *base, vuint8m4_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vluxei8_v_u8m8(const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_u8m8(base, bindex, vl); + return __riscv_vluxei8_v_u8m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf4( @@ -409,7 +409,7 @@ vuint8m8_t test_vluxei8_v_u8m8(const uint8_t *base, vuint8m8_t bindex, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei8_v_u16mf4(const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u16mf4(base, bindex, vl); + return __riscv_vluxei8_v_u16mf4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf2( @@ -418,7 +418,7 @@ vuint16mf4_t test_vluxei8_v_u16mf4(const uint16_t *base, vuint8mf8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei8_v_u16mf2(const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u16mf2(base, bindex, vl); + return __riscv_vluxei8_v_u16mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m1( @@ -427,7 +427,7 @@ vuint16mf2_t test_vluxei8_v_u16mf2(const uint16_t *base, vuint8mf4_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei8_v_u16m1(const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u16m1(base, bindex, vl); + return __riscv_vluxei8_v_u16m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m2( @@ -436,7 +436,7 @@ vuint16m1_t test_vluxei8_v_u16m1(const uint16_t *base, vuint8mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei8_v_u16m2(const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u16m2(base, bindex, vl); + return __riscv_vluxei8_v_u16m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m4( @@ -445,7 +445,7 @@ vuint16m2_t test_vluxei8_v_u16m2(const uint16_t *base, vuint8m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei8_v_u16m4(const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u16m4(base, bindex, vl); + return __riscv_vluxei8_v_u16m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m8( @@ -454,7 +454,7 @@ vuint16m4_t test_vluxei8_v_u16m4(const uint16_t *base, vuint8m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei8_v_u16m8(const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u16m8(base, bindex, vl); + return __riscv_vluxei8_v_u16m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32mf2( @@ -463,7 +463,7 @@ vuint16m8_t test_vluxei8_v_u16m8(const uint16_t *base, vuint8m4_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei8_v_u32mf2(const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u32mf2(base, bindex, vl); + return __riscv_vluxei8_v_u32mf2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m1( @@ -472,7 +472,7 @@ vuint32mf2_t test_vluxei8_v_u32mf2(const uint32_t *base, vuint8mf8_t bindex, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei8_v_u32m1(const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u32m1(base, bindex, vl); + return __riscv_vluxei8_v_u32m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m2( @@ -481,7 +481,7 @@ vuint32m1_t test_vluxei8_v_u32m1(const uint32_t *base, vuint8mf4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei8_v_u32m2(const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u32m2(base, bindex, vl); + return __riscv_vluxei8_v_u32m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m4( @@ -490,7 +490,7 @@ vuint32m2_t test_vluxei8_v_u32m2(const uint32_t *base, vuint8mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei8_v_u32m4(const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u32m4(base, bindex, vl); + return __riscv_vluxei8_v_u32m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m8( @@ -499,7 +499,7 @@ vuint32m4_t test_vluxei8_v_u32m4(const uint32_t *base, vuint8m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei8_v_u32m8(const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u32m8(base, bindex, vl); + return __riscv_vluxei8_v_u32m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m1( @@ -508,7 +508,7 @@ vuint32m8_t test_vluxei8_v_u32m8(const uint32_t *base, vuint8m2_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei8_v_u64m1(const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u64m1(base, bindex, vl); + return __riscv_vluxei8_v_u64m1(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m2( @@ -517,7 +517,7 @@ vuint64m1_t test_vluxei8_v_u64m1(const uint64_t *base, vuint8mf8_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei8_v_u64m2(const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u64m2(base, bindex, vl); + return __riscv_vluxei8_v_u64m2(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m4( @@ -526,7 +526,7 @@ vuint64m2_t test_vluxei8_v_u64m2(const uint64_t *base, vuint8mf4_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei8_v_u64m4(const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u64m4(base, bindex, vl); + return __riscv_vluxei8_v_u64m4(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m8( @@ -535,7 +535,7 @@ vuint64m4_t test_vluxei8_v_u64m4(const uint64_t *base, vuint8mf2_t bindex, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei8_v_u64m8(const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u64m8(base, bindex, vl); + return __riscv_vluxei8_v_u64m8(base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf4_m( @@ -544,7 +544,7 @@ vuint64m8_t test_vluxei8_v_u64m8(const uint64_t *base, vuint8m1_t bindex, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei8_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf2_m( @@ -553,7 +553,7 @@ vfloat16mf4_t test_vluxei8_v_f16mf4_m(vbool64_t mask, const _Float16 *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei8_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m1_m( @@ -562,7 +562,7 @@ vfloat16mf2_t test_vluxei8_v_f16mf2_m(vbool32_t mask, const _Float16 *base, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei8_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f16m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m2_m( @@ -571,7 +571,7 @@ vfloat16m1_t test_vluxei8_v_f16m1_m(vbool16_t mask, const _Float16 *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei8_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f16m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m4_m( @@ -580,7 +580,7 @@ vfloat16m2_t test_vluxei8_v_f16m2_m(vbool8_t mask, const _Float16 *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei8_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f16m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m8_m( @@ -589,7 +589,7 @@ vfloat16m4_t test_vluxei8_v_f16m4_m(vbool4_t mask, const _Float16 *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei8_v_f16m8_m(vbool2_t mask, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_f16m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32mf2_m( @@ -598,7 +598,7 @@ vfloat16m8_t test_vluxei8_v_f16m8_m(vbool2_t mask, const _Float16 *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei8_v_f32mf2_m(vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m1_m( @@ -607,7 +607,7 @@ vfloat32mf2_t test_vluxei8_v_f32mf2_m(vbool64_t mask, const float *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei8_v_f32m1_m(vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f32m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m2_m( @@ -616,7 +616,7 @@ vfloat32m1_t test_vluxei8_v_f32m1_m(vbool32_t mask, const float *base, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei8_v_f32m2_m(vbool16_t mask, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f32m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m4_m( @@ -625,7 +625,7 @@ vfloat32m2_t test_vluxei8_v_f32m2_m(vbool16_t mask, const float *base, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei8_v_f32m4_m(vbool8_t mask, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f32m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m8_m( @@ -634,7 +634,7 @@ vfloat32m4_t test_vluxei8_v_f32m4_m(vbool8_t mask, const float *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei8_v_f32m8_m(vbool4_t mask, const float *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f32m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m1_m( @@ -643,7 +643,7 @@ vfloat32m8_t test_vluxei8_v_f32m8_m(vbool4_t mask, const float *base, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei8_v_f64m1_m(vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f64m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m2_m( @@ -652,7 +652,7 @@ vfloat64m1_t test_vluxei8_v_f64m1_m(vbool64_t mask, const double *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei8_v_f64m2_m(vbool32_t mask, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f64m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m4_m( @@ -661,7 +661,7 @@ vfloat64m2_t test_vluxei8_v_f64m2_m(vbool32_t mask, const double *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei8_v_f64m4_m(vbool16_t mask, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f64m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m8_m( @@ -670,7 +670,7 @@ vfloat64m4_t test_vluxei8_v_f64m4_m(vbool16_t mask, const double *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei8_v_f64m8_m(vbool8_t mask, const double *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f64m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_f64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf8_m( @@ -679,7 +679,7 @@ vfloat64m8_t test_vluxei8_v_f64m8_m(vbool8_t mask, const double *base, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei8_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i8mf8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf4_m( @@ -688,7 +688,7 @@ vint8mf8_t test_vluxei8_v_i8mf8_m(vbool64_t mask, const int8_t *base, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei8_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i8mf4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf2_m( @@ -697,7 +697,7 @@ vint8mf4_t test_vluxei8_v_i8mf4_m(vbool32_t mask, const int8_t *base, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei8_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i8mf2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m1_m( @@ -706,7 +706,7 @@ vint8mf2_t test_vluxei8_v_i8mf2_m(vbool16_t mask, const int8_t *base, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei8_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i8m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m2_m( @@ -715,7 +715,7 @@ vint8m1_t test_vluxei8_v_i8m1_m(vbool8_t mask, const int8_t *base, vuint8m1_t bi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei8_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i8m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m4_m( @@ -724,7 +724,7 @@ vint8m2_t test_vluxei8_v_i8m2_m(vbool4_t mask, const int8_t *base, vuint8m2_t bi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei8_v_i8m4_m(vbool2_t mask, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i8m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i8m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m8_m( @@ -733,7 +733,7 @@ vint8m4_t test_vluxei8_v_i8m4_m(vbool2_t mask, const int8_t *base, vuint8m4_t bi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vluxei8_v_i8m8_m(vbool1_t mask, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_i8m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i8m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf4_m( @@ -742,7 +742,7 @@ vint8m8_t test_vluxei8_v_i8m8_m(vbool1_t mask, const int8_t *base, vuint8m8_t bi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei8_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf2_m( @@ -751,7 +751,7 @@ vint16mf4_t test_vluxei8_v_i16mf4_m(vbool64_t mask, const int16_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei8_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m1_m( @@ -760,7 +760,7 @@ vint16mf2_t test_vluxei8_v_i16mf2_m(vbool32_t mask, const int16_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei8_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i16m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m2_m( @@ -769,7 +769,7 @@ vint16m1_t test_vluxei8_v_i16m1_m(vbool16_t mask, const int16_t *base, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei8_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i16m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m4_m( @@ -778,7 +778,7 @@ vint16m2_t test_vluxei8_v_i16m2_m(vbool8_t mask, const int16_t *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei8_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i16m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m8_m( @@ -787,7 +787,7 @@ vint16m4_t test_vluxei8_v_i16m4_m(vbool4_t mask, const int16_t *base, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei8_v_i16m8_m(vbool2_t mask, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i16m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32mf2_m( @@ -796,7 +796,7 @@ vint16m8_t test_vluxei8_v_i16m8_m(vbool2_t mask, const int16_t *base, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei8_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m1_m( @@ -805,7 +805,7 @@ vint32mf2_t test_vluxei8_v_i32mf2_m(vbool64_t mask, const int32_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei8_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i32m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m2_m( @@ -814,7 +814,7 @@ vint32m1_t test_vluxei8_v_i32m1_m(vbool32_t mask, const int32_t *base, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei8_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i32m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m4_m( @@ -823,7 +823,7 @@ vint32m2_t test_vluxei8_v_i32m2_m(vbool16_t mask, const int32_t *base, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei8_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i32m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m8_m( @@ -832,7 +832,7 @@ vint32m4_t test_vluxei8_v_i32m4_m(vbool8_t mask, const int32_t *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei8_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i32m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m1_m( @@ -841,7 +841,7 @@ vint32m8_t test_vluxei8_v_i32m8_m(vbool4_t mask, const int32_t *base, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei8_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i64m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m2_m( @@ -850,7 +850,7 @@ vint64m1_t test_vluxei8_v_i64m1_m(vbool64_t mask, const int64_t *base, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei8_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i64m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m4_m( @@ -859,7 +859,7 @@ vint64m2_t test_vluxei8_v_i64m2_m(vbool32_t mask, const int64_t *base, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei8_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i64m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m8_m( @@ -868,7 +868,7 @@ vint64m4_t test_vluxei8_v_i64m4_m(vbool16_t mask, const int64_t *base, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei8_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i64m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_i64m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf8_m( @@ -877,7 +877,7 @@ vint64m8_t test_vluxei8_v_i64m8_m(vbool8_t mask, const int64_t *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei8_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u8mf8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u8mf8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf4_m( @@ -886,7 +886,7 @@ vuint8mf8_t test_vluxei8_v_u8mf8_m(vbool64_t mask, const uint8_t *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei8_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u8mf4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u8mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf2_m( @@ -895,7 +895,7 @@ vuint8mf4_t test_vluxei8_v_u8mf4_m(vbool32_t mask, const uint8_t *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei8_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u8mf2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u8mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m1_m( @@ -904,7 +904,7 @@ vuint8mf2_t test_vluxei8_v_u8mf2_m(vbool16_t mask, const uint8_t *base, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei8_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u8m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u8m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m2_m( @@ -913,7 +913,7 @@ vuint8m1_t test_vluxei8_v_u8m1_m(vbool8_t mask, const uint8_t *base, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei8_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u8m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u8m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m4_m( @@ -922,7 +922,7 @@ vuint8m2_t test_vluxei8_v_u8m2_m(vbool4_t mask, const uint8_t *base, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei8_v_u8m4_m(vbool2_t mask, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u8m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u8m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m8_m( @@ -931,7 +931,7 @@ vuint8m4_t test_vluxei8_v_u8m4_m(vbool2_t mask, const uint8_t *base, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vluxei8_v_u8m8_m(vbool1_t mask, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_u8m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u8m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf4_m( @@ -940,7 +940,7 @@ vuint8m8_t test_vluxei8_v_u8m8_m(vbool1_t mask, const uint8_t *base, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei8_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u16mf4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u16mf4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf2_m( @@ -949,7 +949,7 @@ vuint16mf4_t test_vluxei8_v_u16mf4_m(vbool64_t mask, const uint16_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei8_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u16mf2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u16mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m1_m( @@ -958,7 +958,7 @@ vuint16mf2_t test_vluxei8_v_u16mf2_m(vbool32_t mask, const uint16_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei8_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u16m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u16m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m2_m( @@ -967,7 +967,7 @@ vuint16m1_t test_vluxei8_v_u16m1_m(vbool16_t mask, const uint16_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei8_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u16m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u16m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m4_m( @@ -976,7 +976,7 @@ vuint16m2_t test_vluxei8_v_u16m2_m(vbool8_t mask, const uint16_t *base, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei8_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u16m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u16m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m8_m( @@ -985,7 +985,7 @@ vuint16m4_t test_vluxei8_v_u16m4_m(vbool4_t mask, const uint16_t *base, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei8_v_u16m8_m(vbool2_t mask, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u16m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u16m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32mf2_m( @@ -994,7 +994,7 @@ vuint16m8_t test_vluxei8_v_u16m8_m(vbool2_t mask, const uint16_t *base, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei8_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u32mf2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u32mf2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m1_m( @@ -1003,7 +1003,7 @@ vuint32mf2_t test_vluxei8_v_u32mf2_m(vbool64_t mask, const uint32_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei8_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u32m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u32m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m2_m( @@ -1012,7 +1012,7 @@ vuint32m1_t test_vluxei8_v_u32m1_m(vbool32_t mask, const uint32_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei8_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u32m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u32m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m4_m( @@ -1021,7 +1021,7 @@ vuint32m2_t test_vluxei8_v_u32m2_m(vbool16_t mask, const uint32_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei8_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u32m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u32m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m8_m( @@ -1030,7 +1030,7 @@ vuint32m4_t test_vluxei8_v_u32m4_m(vbool8_t mask, const uint32_t *base, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei8_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u32m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u32m8_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m1_m( @@ -1039,7 +1039,7 @@ vuint32m8_t test_vluxei8_v_u32m8_m(vbool4_t mask, const uint32_t *base, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei8_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u64m1_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u64m1_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m2_m( @@ -1048,7 +1048,7 @@ vuint64m1_t test_vluxei8_v_u64m1_m(vbool64_t mask, const uint64_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei8_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u64m2_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u64m2_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m4_m( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vluxei8_v_u64m2_m(vbool32_t mask, const uint64_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei8_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u64m4_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u64m4_m(mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m8_m( @@ -1066,6 +1066,6 @@ vuint64m4_t test_vluxei8_v_u64m4_m(vbool16_t mask, const uint64_t *base, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei8_v_u64m8_m(vbool8_t mask, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u64m8_m(mask, base, bindex, vl); + return __riscv_vluxei8_v_u64m8_m(mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei16.c index 6793a4d2e9adaaef16f0016468986329b6355cae..8900d052ef7019eca8921871b10647da823dea17 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei16.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf2( @@ -30,7 +30,7 @@ void test_vluxseg2ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m1( @@ -43,7 +43,7 @@ void test_vluxseg2ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m2( @@ -56,7 +56,7 @@ void test_vluxseg2ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m4( @@ -69,7 +69,7 @@ void test_vluxseg2ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32mf2( @@ -82,7 +82,7 @@ void test_vluxseg2ei16_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m1( @@ -95,7 +95,7 @@ void test_vluxseg2ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const floa // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m2( @@ -108,7 +108,7 @@ void test_vluxseg2ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m4( @@ -121,7 +121,7 @@ void test_vluxseg2ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m1( @@ -134,7 +134,7 @@ void test_vluxseg2ei16_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m2( @@ -147,7 +147,7 @@ void test_vluxseg2ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m4( @@ -160,7 +160,7 @@ void test_vluxseg2ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf8( @@ -173,7 +173,7 @@ void test_vluxseg2ei16_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf8(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf4( @@ -186,7 +186,7 @@ void test_vluxseg2ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf2( @@ -199,7 +199,7 @@ void test_vluxseg2ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m1( @@ -212,7 +212,7 @@ void test_vluxseg2ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m2( @@ -225,7 +225,7 @@ void test_vluxseg2ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m4( @@ -238,7 +238,7 @@ void test_vluxseg2ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf4( @@ -251,7 +251,7 @@ void test_vluxseg2ei16_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf2( @@ -264,7 +264,7 @@ void test_vluxseg2ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m1( @@ -277,7 +277,7 @@ void test_vluxseg2ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m2( @@ -290,7 +290,7 @@ void test_vluxseg2ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m4( @@ -303,7 +303,7 @@ void test_vluxseg2ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32mf2( @@ -316,7 +316,7 @@ void test_vluxseg2ei16_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m1( @@ -329,7 +329,7 @@ void test_vluxseg2ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m2( @@ -342,7 +342,7 @@ void test_vluxseg2ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m4( @@ -355,7 +355,7 @@ void test_vluxseg2ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m1( @@ -368,7 +368,7 @@ void test_vluxseg2ei16_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m2( @@ -381,7 +381,7 @@ void test_vluxseg2ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m4( @@ -394,7 +394,7 @@ void test_vluxseg2ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf8( @@ -407,7 +407,7 @@ void test_vluxseg2ei16_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf8(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf4( @@ -420,7 +420,7 @@ void test_vluxseg2ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf2( @@ -433,7 +433,7 @@ void test_vluxseg2ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m1( @@ -446,7 +446,7 @@ void test_vluxseg2ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m2( @@ -459,7 +459,7 @@ void test_vluxseg2ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m4( @@ -472,7 +472,7 @@ void test_vluxseg2ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf4( @@ -485,7 +485,7 @@ void test_vluxseg2ei16_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf2( @@ -498,7 +498,7 @@ void test_vluxseg2ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m1( @@ -511,7 +511,7 @@ void test_vluxseg2ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m2( @@ -524,7 +524,7 @@ void test_vluxseg2ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m4( @@ -537,7 +537,7 @@ void test_vluxseg2ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32mf2( @@ -550,7 +550,7 @@ void test_vluxseg2ei16_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m1( @@ -563,7 +563,7 @@ void test_vluxseg2ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m2( @@ -576,7 +576,7 @@ void test_vluxseg2ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m4( @@ -589,7 +589,7 @@ void test_vluxseg2ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m1( @@ -602,7 +602,7 @@ void test_vluxseg2ei16_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m2( @@ -615,7 +615,7 @@ void test_vluxseg2ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m4( @@ -628,7 +628,7 @@ void test_vluxseg2ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf4_m( @@ -641,7 +641,7 @@ void test_vluxseg2ei16_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf2_m( @@ -654,7 +654,7 @@ void test_vluxseg2ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m1_m( @@ -667,7 +667,7 @@ void test_vluxseg2ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m2_m( @@ -680,7 +680,7 @@ void test_vluxseg2ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m4_m( @@ -693,7 +693,7 @@ void test_vluxseg2ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32mf2_m( @@ -706,7 +706,7 @@ void test_vluxseg2ei16_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m1_m( @@ -719,7 +719,7 @@ void test_vluxseg2ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m2_m( @@ -732,7 +732,7 @@ void test_vluxseg2ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m4_m( @@ -745,7 +745,7 @@ void test_vluxseg2ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m1_m( @@ -758,7 +758,7 @@ void test_vluxseg2ei16_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m2_m( @@ -771,7 +771,7 @@ void test_vluxseg2ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m4_m( @@ -784,7 +784,7 @@ void test_vluxseg2ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf8_m( @@ -797,7 +797,7 @@ void test_vluxseg2ei16_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf4_m( @@ -810,7 +810,7 @@ void test_vluxseg2ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf2_m( @@ -823,7 +823,7 @@ void test_vluxseg2ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m1_m( @@ -836,7 +836,7 @@ void test_vluxseg2ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m2_m( @@ -849,7 +849,7 @@ void test_vluxseg2ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m4_m( @@ -862,7 +862,7 @@ void test_vluxseg2ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, con // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf4_m( @@ -875,7 +875,7 @@ void test_vluxseg2ei16_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, con // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf2_m( @@ -888,7 +888,7 @@ void test_vluxseg2ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vluxseg2ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m2_m( @@ -914,7 +914,7 @@ void test_vluxseg2ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m4_m( @@ -927,7 +927,7 @@ void test_vluxseg2ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32mf2_m( @@ -940,7 +940,7 @@ void test_vluxseg2ei16_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m1_m( @@ -953,7 +953,7 @@ void test_vluxseg2ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m2_m( @@ -966,7 +966,7 @@ void test_vluxseg2ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m4_m( @@ -979,7 +979,7 @@ void test_vluxseg2ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m1_m( @@ -992,7 +992,7 @@ void test_vluxseg2ei16_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m2_m( @@ -1005,7 +1005,7 @@ void test_vluxseg2ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m4_m( @@ -1018,7 +1018,7 @@ void test_vluxseg2ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf8_m( @@ -1031,7 +1031,7 @@ void test_vluxseg2ei16_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf4_m( @@ -1044,7 +1044,7 @@ void test_vluxseg2ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf2_m( @@ -1057,7 +1057,7 @@ void test_vluxseg2ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m1_m( @@ -1070,7 +1070,7 @@ void test_vluxseg2ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m2_m( @@ -1083,7 +1083,7 @@ void test_vluxseg2ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m4_m( @@ -1096,7 +1096,7 @@ void test_vluxseg2ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf4_m( @@ -1109,7 +1109,7 @@ void test_vluxseg2ei16_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf2_m( @@ -1122,7 +1122,7 @@ void test_vluxseg2ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m1_m( @@ -1135,7 +1135,7 @@ void test_vluxseg2ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m2_m( @@ -1148,7 +1148,7 @@ void test_vluxseg2ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m4_m( @@ -1161,7 +1161,7 @@ void test_vluxseg2ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32mf2_m( @@ -1174,7 +1174,7 @@ void test_vluxseg2ei16_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m1_m( @@ -1187,7 +1187,7 @@ void test_vluxseg2ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m2_m( @@ -1200,7 +1200,7 @@ void test_vluxseg2ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m4_m( @@ -1213,7 +1213,7 @@ void test_vluxseg2ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m1_m( @@ -1226,7 +1226,7 @@ void test_vluxseg2ei16_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m2_m( @@ -1239,7 +1239,7 @@ void test_vluxseg2ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m4_m( @@ -1252,6 +1252,6 @@ void test_vluxseg2ei16_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m4_m(v0, v1, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32.c index 36210094d881340c0d06328bb1938d9ab2692203..9b7f65f9973c907c70cd197f81db98010ab131e0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei32.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf2( @@ -30,7 +30,7 @@ void test_vluxseg2ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m1( @@ -43,7 +43,7 @@ void test_vluxseg2ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m2( @@ -56,7 +56,7 @@ void test_vluxseg2ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m4( @@ -69,7 +69,7 @@ void test_vluxseg2ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32mf2( @@ -82,7 +82,7 @@ void test_vluxseg2ei32_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m1( @@ -95,7 +95,7 @@ void test_vluxseg2ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const floa // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m2( @@ -108,7 +108,7 @@ void test_vluxseg2ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m4( @@ -121,7 +121,7 @@ void test_vluxseg2ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m1( @@ -134,7 +134,7 @@ void test_vluxseg2ei32_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m2( @@ -147,7 +147,7 @@ void test_vluxseg2ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m4( @@ -160,7 +160,7 @@ void test_vluxseg2ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf8( @@ -173,7 +173,7 @@ void test_vluxseg2ei32_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf8(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf4( @@ -186,7 +186,7 @@ void test_vluxseg2ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf2( @@ -199,7 +199,7 @@ void test_vluxseg2ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m1( @@ -212,7 +212,7 @@ void test_vluxseg2ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m2( @@ -225,7 +225,7 @@ void test_vluxseg2ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf4( @@ -238,7 +238,7 @@ void test_vluxseg2ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf2( @@ -251,7 +251,7 @@ void test_vluxseg2ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m1( @@ -264,7 +264,7 @@ void test_vluxseg2ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m2( @@ -277,7 +277,7 @@ void test_vluxseg2ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m4( @@ -290,7 +290,7 @@ void test_vluxseg2ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32mf2( @@ -303,7 +303,7 @@ void test_vluxseg2ei32_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m1( @@ -316,7 +316,7 @@ void test_vluxseg2ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m2( @@ -329,7 +329,7 @@ void test_vluxseg2ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m4( @@ -342,7 +342,7 @@ void test_vluxseg2ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m1( @@ -355,7 +355,7 @@ void test_vluxseg2ei32_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m2( @@ -368,7 +368,7 @@ void test_vluxseg2ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m4( @@ -381,7 +381,7 @@ void test_vluxseg2ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf8( @@ -394,7 +394,7 @@ void test_vluxseg2ei32_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf8(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf4( @@ -407,7 +407,7 @@ void test_vluxseg2ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf2( @@ -420,7 +420,7 @@ void test_vluxseg2ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m1( @@ -433,7 +433,7 @@ void test_vluxseg2ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m2( @@ -446,7 +446,7 @@ void test_vluxseg2ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf4( @@ -459,7 +459,7 @@ void test_vluxseg2ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf2( @@ -472,7 +472,7 @@ void test_vluxseg2ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m1( @@ -485,7 +485,7 @@ void test_vluxseg2ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m2( @@ -498,7 +498,7 @@ void test_vluxseg2ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m4( @@ -511,7 +511,7 @@ void test_vluxseg2ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32mf2( @@ -524,7 +524,7 @@ void test_vluxseg2ei32_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m1( @@ -537,7 +537,7 @@ void test_vluxseg2ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m2( @@ -550,7 +550,7 @@ void test_vluxseg2ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m4( @@ -563,7 +563,7 @@ void test_vluxseg2ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m1( @@ -576,7 +576,7 @@ void test_vluxseg2ei32_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m2( @@ -589,7 +589,7 @@ void test_vluxseg2ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m4( @@ -602,7 +602,7 @@ void test_vluxseg2ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf4_m( @@ -615,7 +615,7 @@ void test_vluxseg2ei32_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf2_m( @@ -628,7 +628,7 @@ void test_vluxseg2ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m1_m( @@ -641,7 +641,7 @@ void test_vluxseg2ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m2_m( @@ -654,7 +654,7 @@ void test_vluxseg2ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m4_m( @@ -667,7 +667,7 @@ void test_vluxseg2ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32mf2_m( @@ -680,7 +680,7 @@ void test_vluxseg2ei32_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m1_m( @@ -693,7 +693,7 @@ void test_vluxseg2ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m2_m( @@ -706,7 +706,7 @@ void test_vluxseg2ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m4_m( @@ -719,7 +719,7 @@ void test_vluxseg2ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m1_m( @@ -732,7 +732,7 @@ void test_vluxseg2ei32_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m2_m( @@ -745,7 +745,7 @@ void test_vluxseg2ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m4_m( @@ -758,7 +758,7 @@ void test_vluxseg2ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf8_m( @@ -771,7 +771,7 @@ void test_vluxseg2ei32_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf4_m( @@ -784,7 +784,7 @@ void test_vluxseg2ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf2_m( @@ -797,7 +797,7 @@ void test_vluxseg2ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m1_m( @@ -810,7 +810,7 @@ void test_vluxseg2ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m2_m( @@ -823,7 +823,7 @@ void test_vluxseg2ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf4_m( @@ -836,7 +836,7 @@ void test_vluxseg2ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, con // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf2_m( @@ -849,7 +849,7 @@ void test_vluxseg2ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m1_m( @@ -862,7 +862,7 @@ void test_vluxseg2ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m2_m( @@ -875,7 +875,7 @@ void test_vluxseg2ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m4_m( @@ -888,7 +888,7 @@ void test_vluxseg2ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32mf2_m( @@ -901,7 +901,7 @@ void test_vluxseg2ei32_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m1_m( @@ -914,7 +914,7 @@ void test_vluxseg2ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m2_m( @@ -927,7 +927,7 @@ void test_vluxseg2ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m4_m( @@ -940,7 +940,7 @@ void test_vluxseg2ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m1_m( @@ -953,7 +953,7 @@ void test_vluxseg2ei32_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m2_m( @@ -966,7 +966,7 @@ void test_vluxseg2ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m4_m( @@ -979,7 +979,7 @@ void test_vluxseg2ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf8_m( @@ -992,7 +992,7 @@ void test_vluxseg2ei32_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf4_m( @@ -1005,7 +1005,7 @@ void test_vluxseg2ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf2_m( @@ -1018,7 +1018,7 @@ void test_vluxseg2ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m1_m( @@ -1031,7 +1031,7 @@ void test_vluxseg2ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m2_m( @@ -1044,7 +1044,7 @@ void test_vluxseg2ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf4_m( @@ -1057,7 +1057,7 @@ void test_vluxseg2ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf2_m( @@ -1070,7 +1070,7 @@ void test_vluxseg2ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m1_m( @@ -1083,7 +1083,7 @@ void test_vluxseg2ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m2_m( @@ -1096,7 +1096,7 @@ void test_vluxseg2ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m4_m( @@ -1109,7 +1109,7 @@ void test_vluxseg2ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32mf2_m( @@ -1122,7 +1122,7 @@ void test_vluxseg2ei32_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m1_m( @@ -1135,7 +1135,7 @@ void test_vluxseg2ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m2_m( @@ -1148,7 +1148,7 @@ void test_vluxseg2ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m4_m( @@ -1161,7 +1161,7 @@ void test_vluxseg2ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m1_m( @@ -1174,7 +1174,7 @@ void test_vluxseg2ei32_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m2_m( @@ -1187,7 +1187,7 @@ void test_vluxseg2ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m4_m( @@ -1200,6 +1200,6 @@ void test_vluxseg2ei32_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m4_m(v0, v1, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei64.c index f7192c2cce57b2061e3ea0d73f174f4008644fbb..616dcf65dc021d3bc3ee9760648efa548f895a6f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei64.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf2( @@ -30,7 +30,7 @@ void test_vluxseg2ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m1( @@ -43,7 +43,7 @@ void test_vluxseg2ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Flo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m2( @@ -56,7 +56,7 @@ void test_vluxseg2ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32mf2( @@ -69,7 +69,7 @@ void test_vluxseg2ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m1( @@ -82,7 +82,7 @@ void test_vluxseg2ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const floa // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m2( @@ -95,7 +95,7 @@ void test_vluxseg2ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m4( @@ -108,7 +108,7 @@ void test_vluxseg2ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m1( @@ -121,7 +121,7 @@ void test_vluxseg2ei64_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m2( @@ -134,7 +134,7 @@ void test_vluxseg2ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m4( @@ -147,7 +147,7 @@ void test_vluxseg2ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf8( @@ -160,7 +160,7 @@ void test_vluxseg2ei64_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf8(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf4( @@ -173,7 +173,7 @@ void test_vluxseg2ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf2( @@ -186,7 +186,7 @@ void test_vluxseg2ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8m1( @@ -199,7 +199,7 @@ void test_vluxseg2ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i8m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf4( @@ -212,7 +212,7 @@ void test_vluxseg2ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf2( @@ -225,7 +225,7 @@ void test_vluxseg2ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m1( @@ -238,7 +238,7 @@ void test_vluxseg2ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m2( @@ -251,7 +251,7 @@ void test_vluxseg2ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32mf2( @@ -264,7 +264,7 @@ void test_vluxseg2ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m1( @@ -277,7 +277,7 @@ void test_vluxseg2ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m2( @@ -290,7 +290,7 @@ void test_vluxseg2ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m4( @@ -303,7 +303,7 @@ void test_vluxseg2ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m1( @@ -316,7 +316,7 @@ void test_vluxseg2ei64_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m2( @@ -329,7 +329,7 @@ void test_vluxseg2ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m4( @@ -342,7 +342,7 @@ void test_vluxseg2ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf8( @@ -355,7 +355,7 @@ void test_vluxseg2ei64_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *ba // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf8(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf4( @@ -368,7 +368,7 @@ void test_vluxseg2ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf2( @@ -381,7 +381,7 @@ void test_vluxseg2ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8m1( @@ -394,7 +394,7 @@ void test_vluxseg2ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u8m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf4( @@ -407,7 +407,7 @@ void test_vluxseg2ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf2( @@ -420,7 +420,7 @@ void test_vluxseg2ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m1( @@ -433,7 +433,7 @@ void test_vluxseg2ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m2( @@ -446,7 +446,7 @@ void test_vluxseg2ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32mf2( @@ -459,7 +459,7 @@ void test_vluxseg2ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m1( @@ -472,7 +472,7 @@ void test_vluxseg2ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m2( @@ -485,7 +485,7 @@ void test_vluxseg2ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m4( @@ -498,7 +498,7 @@ void test_vluxseg2ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m1( @@ -511,7 +511,7 @@ void test_vluxseg2ei64_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m2( @@ -524,7 +524,7 @@ void test_vluxseg2ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m4( @@ -537,7 +537,7 @@ void test_vluxseg2ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf4_m( @@ -550,7 +550,7 @@ void test_vluxseg2ei64_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf2_m( @@ -563,7 +563,7 @@ void test_vluxseg2ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m1_m( @@ -576,7 +576,7 @@ void test_vluxseg2ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m2_m( @@ -589,7 +589,7 @@ void test_vluxseg2ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32mf2_m( @@ -602,7 +602,7 @@ void test_vluxseg2ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m1_m( @@ -615,7 +615,7 @@ void test_vluxseg2ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m2_m( @@ -628,7 +628,7 @@ void test_vluxseg2ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m4_m( @@ -641,7 +641,7 @@ void test_vluxseg2ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m1_m( @@ -654,7 +654,7 @@ void test_vluxseg2ei64_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m2_m( @@ -667,7 +667,7 @@ void test_vluxseg2ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m4_m( @@ -680,7 +680,7 @@ void test_vluxseg2ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf8_m( @@ -693,7 +693,7 @@ void test_vluxseg2ei64_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf4_m( @@ -706,7 +706,7 @@ void test_vluxseg2ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf2_m( @@ -719,7 +719,7 @@ void test_vluxseg2ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8m1_m( @@ -732,7 +732,7 @@ void test_vluxseg2ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf4_m( @@ -745,7 +745,7 @@ void test_vluxseg2ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, con // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf2_m( @@ -758,7 +758,7 @@ void test_vluxseg2ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m1_m( @@ -771,7 +771,7 @@ void test_vluxseg2ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m2_m( @@ -784,7 +784,7 @@ void test_vluxseg2ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32mf2_m( @@ -797,7 +797,7 @@ void test_vluxseg2ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m1_m( @@ -810,7 +810,7 @@ void test_vluxseg2ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m2_m( @@ -823,7 +823,7 @@ void test_vluxseg2ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m4_m( @@ -836,7 +836,7 @@ void test_vluxseg2ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m1_m( @@ -849,7 +849,7 @@ void test_vluxseg2ei64_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m2_m( @@ -862,7 +862,7 @@ void test_vluxseg2ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m4_m( @@ -875,7 +875,7 @@ void test_vluxseg2ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf8_m( @@ -888,7 +888,7 @@ void test_vluxseg2ei64_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf4_m( @@ -901,7 +901,7 @@ void test_vluxseg2ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf2_m( @@ -914,7 +914,7 @@ void test_vluxseg2ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8m1_m( @@ -927,7 +927,7 @@ void test_vluxseg2ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf4_m( @@ -940,7 +940,7 @@ void test_vluxseg2ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf2_m( @@ -953,7 +953,7 @@ void test_vluxseg2ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m1_m( @@ -966,7 +966,7 @@ void test_vluxseg2ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m2_m( @@ -979,7 +979,7 @@ void test_vluxseg2ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32mf2_m( @@ -992,7 +992,7 @@ void test_vluxseg2ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m1_m( @@ -1005,7 +1005,7 @@ void test_vluxseg2ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m2_m( @@ -1018,7 +1018,7 @@ void test_vluxseg2ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m4_m( @@ -1031,7 +1031,7 @@ void test_vluxseg2ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m1_m( @@ -1044,7 +1044,7 @@ void test_vluxseg2ei64_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m2_m( @@ -1057,7 +1057,7 @@ void test_vluxseg2ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m4_m( @@ -1070,6 +1070,6 @@ void test_vluxseg2ei64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m4_m(v0, v1, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei8.c index 1693432cd5763097bf2d16d283313b7623893492..652608317ee8abd8b0946a6ad5af914d23903a76 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg2ei8.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf2( @@ -30,7 +30,7 @@ void test_vluxseg2ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, const _Floa // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m1( @@ -43,7 +43,7 @@ void test_vluxseg2ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, const _Floa // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m2( @@ -56,7 +56,7 @@ void test_vluxseg2ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m4( @@ -69,7 +69,7 @@ void test_vluxseg2ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32mf2( @@ -82,7 +82,7 @@ void test_vluxseg2ei8_v_f16m4(vfloat16m4_t *v0, vfloat16m4_t *v1, const _Float16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m1( @@ -95,7 +95,7 @@ void test_vluxseg2ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, const float // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m2( @@ -108,7 +108,7 @@ void test_vluxseg2ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m4( @@ -121,7 +121,7 @@ void test_vluxseg2ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m1( @@ -134,7 +134,7 @@ void test_vluxseg2ei8_v_f32m4(vfloat32m4_t *v0, vfloat32m4_t *v1, const float *b // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m2( @@ -147,7 +147,7 @@ void test_vluxseg2ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m4( @@ -160,7 +160,7 @@ void test_vluxseg2ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf8( @@ -173,7 +173,7 @@ void test_vluxseg2ei8_v_f64m4(vfloat64m4_t *v0, vfloat64m4_t *v1, const double * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf8(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf4( @@ -186,7 +186,7 @@ void test_vluxseg2ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, const int8_t *base // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf2( @@ -199,7 +199,7 @@ void test_vluxseg2ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, const int8_t *base // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m1( @@ -212,7 +212,7 @@ void test_vluxseg2ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, const int8_t *base // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m2( @@ -225,7 +225,7 @@ void test_vluxseg2ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, const int8_t *base, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m4( @@ -238,7 +238,7 @@ void test_vluxseg2ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, const int8_t *base, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf4( @@ -251,7 +251,7 @@ void test_vluxseg2ei8_v_i8m4(vint8m4_t *v0, vint8m4_t *v1, const int8_t *base, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf2( @@ -264,7 +264,7 @@ void test_vluxseg2ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, const int16_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m1( @@ -277,7 +277,7 @@ void test_vluxseg2ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, const int16_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m2( @@ -290,7 +290,7 @@ void test_vluxseg2ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m4( @@ -303,7 +303,7 @@ void test_vluxseg2ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32mf2( @@ -316,7 +316,7 @@ void test_vluxseg2ei8_v_i16m4(vint16m4_t *v0, vint16m4_t *v1, const int16_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m1( @@ -329,7 +329,7 @@ void test_vluxseg2ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, const int32_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m2( @@ -342,7 +342,7 @@ void test_vluxseg2ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m4( @@ -355,7 +355,7 @@ void test_vluxseg2ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m1( @@ -368,7 +368,7 @@ void test_vluxseg2ei8_v_i32m4(vint32m4_t *v0, vint32m4_t *v1, const int32_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m2( @@ -381,7 +381,7 @@ void test_vluxseg2ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m4( @@ -394,7 +394,7 @@ void test_vluxseg2ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf8( @@ -407,7 +407,7 @@ void test_vluxseg2ei8_v_i64m4(vint64m4_t *v0, vint64m4_t *v1, const int64_t *bas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf8(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf8(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf4( @@ -420,7 +420,7 @@ void test_vluxseg2ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, const uint8_t *b // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf2( @@ -433,7 +433,7 @@ void test_vluxseg2ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, const uint8_t *b // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m1( @@ -446,7 +446,7 @@ void test_vluxseg2ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, const uint8_t *b // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m2( @@ -459,7 +459,7 @@ void test_vluxseg2ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m4( @@ -472,7 +472,7 @@ void test_vluxseg2ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf4( @@ -485,7 +485,7 @@ void test_vluxseg2ei8_v_u8m4(vuint8m4_t *v0, vuint8m4_t *v1, const uint8_t *base // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf2( @@ -498,7 +498,7 @@ void test_vluxseg2ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, const uint16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m1( @@ -511,7 +511,7 @@ void test_vluxseg2ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, const uint16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m2( @@ -524,7 +524,7 @@ void test_vluxseg2ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m4( @@ -537,7 +537,7 @@ void test_vluxseg2ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32mf2( @@ -550,7 +550,7 @@ void test_vluxseg2ei8_v_u16m4(vuint16m4_t *v0, vuint16m4_t *v1, const uint16_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u32mf2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32mf2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m1( @@ -563,7 +563,7 @@ void test_vluxseg2ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, const uint32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m2( @@ -576,7 +576,7 @@ void test_vluxseg2ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m4( @@ -589,7 +589,7 @@ void test_vluxseg2ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m1( @@ -602,7 +602,7 @@ void test_vluxseg2ei8_v_u32m4(vuint32m4_t *v0, vuint32m4_t *v1, const uint32_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m1(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m1(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m2( @@ -615,7 +615,7 @@ void test_vluxseg2ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m2(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m2(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m4( @@ -628,7 +628,7 @@ void test_vluxseg2ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m4(v0, v1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m4(v0, v1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf4_m( @@ -641,7 +641,7 @@ void test_vluxseg2ei8_v_u64m4(vuint64m4_t *v0, vuint64m4_t *v1, const uint64_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf2_m( @@ -654,7 +654,7 @@ void test_vluxseg2ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m1_m( @@ -667,7 +667,7 @@ void test_vluxseg2ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m2_m( @@ -680,7 +680,7 @@ void test_vluxseg2ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m4_m( @@ -693,7 +693,7 @@ void test_vluxseg2ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32mf2_m( @@ -706,7 +706,7 @@ void test_vluxseg2ei8_v_f16m4_m(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m1_m( @@ -719,7 +719,7 @@ void test_vluxseg2ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m2_m( @@ -732,7 +732,7 @@ void test_vluxseg2ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m4_m( @@ -745,7 +745,7 @@ void test_vluxseg2ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m1_m( @@ -758,7 +758,7 @@ void test_vluxseg2ei8_v_f32m4_m(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m2_m( @@ -771,7 +771,7 @@ void test_vluxseg2ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m4_m( @@ -784,7 +784,7 @@ void test_vluxseg2ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf8_m( @@ -797,7 +797,7 @@ void test_vluxseg2ei8_v_f64m4_m(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf4_m( @@ -810,7 +810,7 @@ void test_vluxseg2ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf2_m( @@ -823,7 +823,7 @@ void test_vluxseg2ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m1_m( @@ -836,7 +836,7 @@ void test_vluxseg2ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m2_m( @@ -849,7 +849,7 @@ void test_vluxseg2ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, cons // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m4_m( @@ -862,7 +862,7 @@ void test_vluxseg2ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, cons // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf4_m( @@ -875,7 +875,7 @@ void test_vluxseg2ei8_v_i8m4_m(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, cons // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf2_m( @@ -888,7 +888,7 @@ void test_vluxseg2ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vluxseg2ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m2_m( @@ -914,7 +914,7 @@ void test_vluxseg2ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m4_m( @@ -927,7 +927,7 @@ void test_vluxseg2ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32mf2_m( @@ -940,7 +940,7 @@ void test_vluxseg2ei8_v_i16m4_m(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m1_m( @@ -953,7 +953,7 @@ void test_vluxseg2ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m2_m( @@ -966,7 +966,7 @@ void test_vluxseg2ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m4_m( @@ -979,7 +979,7 @@ void test_vluxseg2ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m1_m( @@ -992,7 +992,7 @@ void test_vluxseg2ei8_v_i32m4_m(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, c // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m2_m( @@ -1005,7 +1005,7 @@ void test_vluxseg2ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m4_m( @@ -1018,7 +1018,7 @@ void test_vluxseg2ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf8_m( @@ -1031,7 +1031,7 @@ void test_vluxseg2ei8_v_i64m4_m(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf8_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf8_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf4_m( @@ -1044,7 +1044,7 @@ void test_vluxseg2ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf2_m( @@ -1057,7 +1057,7 @@ void test_vluxseg2ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m1_m( @@ -1070,7 +1070,7 @@ void test_vluxseg2ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m2_m( @@ -1083,7 +1083,7 @@ void test_vluxseg2ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, co // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m4_m( @@ -1096,7 +1096,7 @@ void test_vluxseg2ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, co // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf4_m( @@ -1109,7 +1109,7 @@ void test_vluxseg2ei8_v_u8m4_m(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, co // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf2_m( @@ -1122,7 +1122,7 @@ void test_vluxseg2ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m1_m( @@ -1135,7 +1135,7 @@ void test_vluxseg2ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m2_m( @@ -1148,7 +1148,7 @@ void test_vluxseg2ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m4_m( @@ -1161,7 +1161,7 @@ void test_vluxseg2ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32mf2_m( @@ -1174,7 +1174,7 @@ void test_vluxseg2ei8_v_u16m4_m(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u32mf2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32mf2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m1_m( @@ -1187,7 +1187,7 @@ void test_vluxseg2ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m2_m( @@ -1200,7 +1200,7 @@ void test_vluxseg2ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m4_m( @@ -1213,7 +1213,7 @@ void test_vluxseg2ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m4_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m1_m( @@ -1226,7 +1226,7 @@ void test_vluxseg2ei8_v_u32m4_m(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m1_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m1_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m2_m( @@ -1239,7 +1239,7 @@ void test_vluxseg2ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m2_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m2_m(v0, v1, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m4_m( @@ -1252,6 +1252,6 @@ void test_vluxseg2ei8_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m4_m(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m4_m(v0, v1, mask, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m4_m(v0, v1, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei16.c index 416943ece0ceee9643047414ef0755d17383aa28..aab5c8e400d5256167447474f286181b76a4b427 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei16.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf2( @@ -34,7 +34,7 @@ void test_vluxseg3ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m1( @@ -49,7 +49,7 @@ void test_vluxseg3ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m2( @@ -64,7 +64,7 @@ void test_vluxseg3ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32mf2( @@ -79,7 +79,7 @@ void test_vluxseg3ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m1( @@ -94,7 +94,7 @@ void test_vluxseg3ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m2( @@ -109,7 +109,7 @@ void test_vluxseg3ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m1( @@ -124,7 +124,7 @@ void test_vluxseg3ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m2( @@ -139,7 +139,7 @@ void test_vluxseg3ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf8( @@ -154,7 +154,7 @@ void test_vluxseg3ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf4( @@ -169,7 +169,7 @@ void test_vluxseg3ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf2( @@ -184,7 +184,7 @@ void test_vluxseg3ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m1( @@ -199,7 +199,7 @@ void test_vluxseg3ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m2( @@ -214,7 +214,7 @@ void test_vluxseg3ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf4( @@ -229,7 +229,7 @@ void test_vluxseg3ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf2( @@ -244,7 +244,7 @@ void test_vluxseg3ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m1( @@ -259,7 +259,7 @@ void test_vluxseg3ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m2( @@ -274,7 +274,7 @@ void test_vluxseg3ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32mf2( @@ -289,7 +289,7 @@ void test_vluxseg3ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m1( @@ -304,7 +304,7 @@ void test_vluxseg3ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m2( @@ -319,7 +319,7 @@ void test_vluxseg3ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m1( @@ -334,7 +334,7 @@ void test_vluxseg3ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m2( @@ -349,7 +349,7 @@ void test_vluxseg3ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf8( @@ -364,7 +364,7 @@ void test_vluxseg3ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf4( @@ -379,7 +379,7 @@ void test_vluxseg3ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf2( @@ -394,7 +394,7 @@ void test_vluxseg3ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m1( @@ -409,7 +409,7 @@ void test_vluxseg3ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m2( @@ -424,7 +424,7 @@ void test_vluxseg3ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf4( @@ -439,7 +439,7 @@ void test_vluxseg3ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf2( @@ -454,7 +454,7 @@ void test_vluxseg3ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m1( @@ -469,7 +469,7 @@ void test_vluxseg3ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m2( @@ -484,7 +484,7 @@ void test_vluxseg3ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32mf2( @@ -499,7 +499,7 @@ void test_vluxseg3ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m1( @@ -514,7 +514,7 @@ void test_vluxseg3ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m2( @@ -529,7 +529,7 @@ void test_vluxseg3ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m1( @@ -544,7 +544,7 @@ void test_vluxseg3ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m2( @@ -559,7 +559,7 @@ void test_vluxseg3ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf4_m( @@ -574,7 +574,7 @@ void test_vluxseg3ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf2_m( @@ -589,7 +589,7 @@ void test_vluxseg3ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m1_m( @@ -604,7 +604,7 @@ void test_vluxseg3ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m2_m( @@ -619,7 +619,7 @@ void test_vluxseg3ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vluxseg3ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m1_m( @@ -649,7 +649,7 @@ void test_vluxseg3ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m2_m( @@ -664,7 +664,7 @@ void test_vluxseg3ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m1_m( @@ -679,7 +679,7 @@ void test_vluxseg3ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m2_m( @@ -694,7 +694,7 @@ void test_vluxseg3ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf8_m( @@ -709,7 +709,7 @@ void test_vluxseg3ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf4_m( @@ -724,7 +724,7 @@ void test_vluxseg3ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vluxseg3ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m1_m( @@ -754,7 +754,7 @@ void test_vluxseg3ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m2_m( @@ -769,7 +769,7 @@ void test_vluxseg3ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf4_m( @@ -784,7 +784,7 @@ void test_vluxseg3ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf2_m( @@ -799,7 +799,7 @@ void test_vluxseg3ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m1_m( @@ -814,7 +814,7 @@ void test_vluxseg3ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m2_m( @@ -829,7 +829,7 @@ void test_vluxseg3ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vluxseg3ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m1_m( @@ -859,7 +859,7 @@ void test_vluxseg3ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m2_m( @@ -874,7 +874,7 @@ void test_vluxseg3ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m1_m( @@ -889,7 +889,7 @@ void test_vluxseg3ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m2_m( @@ -904,7 +904,7 @@ void test_vluxseg3ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf8_m( @@ -919,7 +919,7 @@ void test_vluxseg3ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf4_m( @@ -934,7 +934,7 @@ void test_vluxseg3ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vluxseg3ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m1_m( @@ -964,7 +964,7 @@ void test_vluxseg3ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m2_m( @@ -979,7 +979,7 @@ void test_vluxseg3ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf4_m( @@ -994,7 +994,7 @@ void test_vluxseg3ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf2_m( @@ -1009,7 +1009,7 @@ void test_vluxseg3ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m1_m( @@ -1024,7 +1024,7 @@ void test_vluxseg3ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m2_m( @@ -1039,7 +1039,7 @@ void test_vluxseg3ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vluxseg3ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m1_m( @@ -1069,7 +1069,7 @@ void test_vluxseg3ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m2_m( @@ -1084,7 +1084,7 @@ void test_vluxseg3ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m1_m( @@ -1099,7 +1099,7 @@ void test_vluxseg3ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m2_m( @@ -1114,6 +1114,6 @@ void test_vluxseg3ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei32.c index 60f7908b17eb8f50f87627678d0b1707b710f0bd..87d65ed0cce344361a3a1989ffed67911da65882 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei32.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf2( @@ -34,7 +34,7 @@ void test_vluxseg3ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m1( @@ -49,7 +49,7 @@ void test_vluxseg3ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m2( @@ -64,7 +64,7 @@ void test_vluxseg3ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32mf2( @@ -79,7 +79,7 @@ void test_vluxseg3ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m1( @@ -94,7 +94,7 @@ void test_vluxseg3ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m2( @@ -109,7 +109,7 @@ void test_vluxseg3ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m1( @@ -124,7 +124,7 @@ void test_vluxseg3ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m2( @@ -139,7 +139,7 @@ void test_vluxseg3ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf8( @@ -154,7 +154,7 @@ void test_vluxseg3ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf4( @@ -169,7 +169,7 @@ void test_vluxseg3ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf2( @@ -184,7 +184,7 @@ void test_vluxseg3ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m1( @@ -199,7 +199,7 @@ void test_vluxseg3ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m2( @@ -214,7 +214,7 @@ void test_vluxseg3ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf4( @@ -229,7 +229,7 @@ void test_vluxseg3ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf2( @@ -244,7 +244,7 @@ void test_vluxseg3ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m1( @@ -259,7 +259,7 @@ void test_vluxseg3ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m2( @@ -274,7 +274,7 @@ void test_vluxseg3ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32mf2( @@ -289,7 +289,7 @@ void test_vluxseg3ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m1( @@ -304,7 +304,7 @@ void test_vluxseg3ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m2( @@ -319,7 +319,7 @@ void test_vluxseg3ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m1( @@ -334,7 +334,7 @@ void test_vluxseg3ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m2( @@ -349,7 +349,7 @@ void test_vluxseg3ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf8( @@ -364,7 +364,7 @@ void test_vluxseg3ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf4( @@ -379,7 +379,7 @@ void test_vluxseg3ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf2( @@ -394,7 +394,7 @@ void test_vluxseg3ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m1( @@ -409,7 +409,7 @@ void test_vluxseg3ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m2( @@ -424,7 +424,7 @@ void test_vluxseg3ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf4( @@ -439,7 +439,7 @@ void test_vluxseg3ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf2( @@ -454,7 +454,7 @@ void test_vluxseg3ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m1( @@ -469,7 +469,7 @@ void test_vluxseg3ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m2( @@ -484,7 +484,7 @@ void test_vluxseg3ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32mf2( @@ -499,7 +499,7 @@ void test_vluxseg3ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m1( @@ -514,7 +514,7 @@ void test_vluxseg3ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m2( @@ -529,7 +529,7 @@ void test_vluxseg3ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m1( @@ -544,7 +544,7 @@ void test_vluxseg3ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m2( @@ -559,7 +559,7 @@ void test_vluxseg3ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf4_m( @@ -574,7 +574,7 @@ void test_vluxseg3ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf2_m( @@ -589,7 +589,7 @@ void test_vluxseg3ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m1_m( @@ -604,7 +604,7 @@ void test_vluxseg3ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m2_m( @@ -619,7 +619,7 @@ void test_vluxseg3ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vluxseg3ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m1_m( @@ -649,7 +649,7 @@ void test_vluxseg3ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m2_m( @@ -664,7 +664,7 @@ void test_vluxseg3ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m1_m( @@ -679,7 +679,7 @@ void test_vluxseg3ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m2_m( @@ -694,7 +694,7 @@ void test_vluxseg3ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf8_m( @@ -709,7 +709,7 @@ void test_vluxseg3ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf4_m( @@ -724,7 +724,7 @@ void test_vluxseg3ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vluxseg3ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m1_m( @@ -754,7 +754,7 @@ void test_vluxseg3ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m2_m( @@ -769,7 +769,7 @@ void test_vluxseg3ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf4_m( @@ -784,7 +784,7 @@ void test_vluxseg3ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf2_m( @@ -799,7 +799,7 @@ void test_vluxseg3ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m1_m( @@ -814,7 +814,7 @@ void test_vluxseg3ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m2_m( @@ -829,7 +829,7 @@ void test_vluxseg3ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vluxseg3ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m1_m( @@ -859,7 +859,7 @@ void test_vluxseg3ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m2_m( @@ -874,7 +874,7 @@ void test_vluxseg3ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m1_m( @@ -889,7 +889,7 @@ void test_vluxseg3ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m2_m( @@ -904,7 +904,7 @@ void test_vluxseg3ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf8_m( @@ -919,7 +919,7 @@ void test_vluxseg3ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf4_m( @@ -934,7 +934,7 @@ void test_vluxseg3ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vluxseg3ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m1_m( @@ -964,7 +964,7 @@ void test_vluxseg3ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m2_m( @@ -979,7 +979,7 @@ void test_vluxseg3ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf4_m( @@ -994,7 +994,7 @@ void test_vluxseg3ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf2_m( @@ -1009,7 +1009,7 @@ void test_vluxseg3ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m1_m( @@ -1024,7 +1024,7 @@ void test_vluxseg3ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m2_m( @@ -1039,7 +1039,7 @@ void test_vluxseg3ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vluxseg3ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m1_m( @@ -1069,7 +1069,7 @@ void test_vluxseg3ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m2_m( @@ -1084,7 +1084,7 @@ void test_vluxseg3ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m1_m( @@ -1099,7 +1099,7 @@ void test_vluxseg3ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m2_m( @@ -1114,6 +1114,6 @@ void test_vluxseg3ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei64.c index 5e29143a0510df35466b07a76692f644806798b7..62d8107667422c2ba7ee484e2cdd37f5b00d4b1b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei64.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf2( @@ -34,7 +34,7 @@ void test_vluxseg3ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m1( @@ -49,7 +49,7 @@ void test_vluxseg3ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m2( @@ -64,7 +64,7 @@ void test_vluxseg3ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32mf2( @@ -79,7 +79,7 @@ void test_vluxseg3ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m1( @@ -94,7 +94,7 @@ void test_vluxseg3ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m2( @@ -109,7 +109,7 @@ void test_vluxseg3ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m1( @@ -124,7 +124,7 @@ void test_vluxseg3ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m2( @@ -139,7 +139,7 @@ void test_vluxseg3ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf8( @@ -154,7 +154,7 @@ void test_vluxseg3ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf4( @@ -169,7 +169,7 @@ void test_vluxseg3ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf2( @@ -184,7 +184,7 @@ void test_vluxseg3ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8m1( @@ -199,7 +199,7 @@ void test_vluxseg3ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf4( @@ -214,7 +214,7 @@ void test_vluxseg3ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf2( @@ -229,7 +229,7 @@ void test_vluxseg3ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m1( @@ -244,7 +244,7 @@ void test_vluxseg3ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m2( @@ -259,7 +259,7 @@ void test_vluxseg3ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32mf2( @@ -274,7 +274,7 @@ void test_vluxseg3ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m1( @@ -289,7 +289,7 @@ void test_vluxseg3ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m2( @@ -304,7 +304,7 @@ void test_vluxseg3ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m1( @@ -319,7 +319,7 @@ void test_vluxseg3ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m2( @@ -334,7 +334,7 @@ void test_vluxseg3ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf8( @@ -349,7 +349,7 @@ void test_vluxseg3ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, c // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf4( @@ -364,7 +364,7 @@ void test_vluxseg3ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf2( @@ -379,7 +379,7 @@ void test_vluxseg3ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8m1( @@ -394,7 +394,7 @@ void test_vluxseg3ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf4( @@ -409,7 +409,7 @@ void test_vluxseg3ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf2( @@ -424,7 +424,7 @@ void test_vluxseg3ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m1( @@ -439,7 +439,7 @@ void test_vluxseg3ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m2( @@ -454,7 +454,7 @@ void test_vluxseg3ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32mf2( @@ -469,7 +469,7 @@ void test_vluxseg3ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m1( @@ -484,7 +484,7 @@ void test_vluxseg3ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m2( @@ -499,7 +499,7 @@ void test_vluxseg3ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m1( @@ -514,7 +514,7 @@ void test_vluxseg3ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m2( @@ -529,7 +529,7 @@ void test_vluxseg3ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf4_m( @@ -544,7 +544,7 @@ void test_vluxseg3ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf2_m( @@ -559,7 +559,7 @@ void test_vluxseg3ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m1_m( @@ -574,7 +574,7 @@ void test_vluxseg3ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m2_m( @@ -589,7 +589,7 @@ void test_vluxseg3ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32mf2_m( @@ -604,7 +604,7 @@ void test_vluxseg3ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m1_m( @@ -619,7 +619,7 @@ void test_vluxseg3ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m2_m( @@ -634,7 +634,7 @@ void test_vluxseg3ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m1_m( @@ -649,7 +649,7 @@ void test_vluxseg3ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m2_m( @@ -664,7 +664,7 @@ void test_vluxseg3ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf8_m( @@ -679,7 +679,7 @@ void test_vluxseg3ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf4_m( @@ -694,7 +694,7 @@ void test_vluxseg3ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf2_m( @@ -709,7 +709,7 @@ void test_vluxseg3ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8m1_m( @@ -724,7 +724,7 @@ void test_vluxseg3ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf4_m( @@ -739,7 +739,7 @@ void test_vluxseg3ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf2_m( @@ -754,7 +754,7 @@ void test_vluxseg3ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m1_m( @@ -769,7 +769,7 @@ void test_vluxseg3ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m2_m( @@ -784,7 +784,7 @@ void test_vluxseg3ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32mf2_m( @@ -799,7 +799,7 @@ void test_vluxseg3ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m1_m( @@ -814,7 +814,7 @@ void test_vluxseg3ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m2_m( @@ -829,7 +829,7 @@ void test_vluxseg3ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m1_m( @@ -844,7 +844,7 @@ void test_vluxseg3ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m2_m( @@ -859,7 +859,7 @@ void test_vluxseg3ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf8_m( @@ -874,7 +874,7 @@ void test_vluxseg3ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf4_m( @@ -889,7 +889,7 @@ void test_vluxseg3ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf2_m( @@ -904,7 +904,7 @@ void test_vluxseg3ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8m1_m( @@ -919,7 +919,7 @@ void test_vluxseg3ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf4_m( @@ -934,7 +934,7 @@ void test_vluxseg3ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf2_m( @@ -949,7 +949,7 @@ void test_vluxseg3ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m1_m( @@ -964,7 +964,7 @@ void test_vluxseg3ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m2_m( @@ -979,7 +979,7 @@ void test_vluxseg3ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32mf2_m( @@ -994,7 +994,7 @@ void test_vluxseg3ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m1_m( @@ -1009,7 +1009,7 @@ void test_vluxseg3ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m2_m( @@ -1024,7 +1024,7 @@ void test_vluxseg3ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m1_m( @@ -1039,7 +1039,7 @@ void test_vluxseg3ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m2_m( @@ -1054,6 +1054,6 @@ void test_vluxseg3ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei8.c index dd9c1fb8ea12f95fdf19be3e7964d9e3bbe44ef7..9aa3a189b497534aa5575a5435a714ce9d50dd6f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg3ei8.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf2( @@ -34,7 +34,7 @@ void test_vluxseg3ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m1( @@ -49,7 +49,7 @@ void test_vluxseg3ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m2( @@ -64,7 +64,7 @@ void test_vluxseg3ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32mf2( @@ -79,7 +79,7 @@ void test_vluxseg3ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m1( @@ -94,7 +94,7 @@ void test_vluxseg3ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m2( @@ -109,7 +109,7 @@ void test_vluxseg3ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m1( @@ -124,7 +124,7 @@ void test_vluxseg3ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m2( @@ -139,7 +139,7 @@ void test_vluxseg3ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf8( @@ -154,7 +154,7 @@ void test_vluxseg3ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf4( @@ -169,7 +169,7 @@ void test_vluxseg3ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf2( @@ -184,7 +184,7 @@ void test_vluxseg3ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m1( @@ -199,7 +199,7 @@ void test_vluxseg3ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m2( @@ -214,7 +214,7 @@ void test_vluxseg3ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf4( @@ -229,7 +229,7 @@ void test_vluxseg3ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, const // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf2( @@ -244,7 +244,7 @@ void test_vluxseg3ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m1( @@ -259,7 +259,7 @@ void test_vluxseg3ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m2( @@ -274,7 +274,7 @@ void test_vluxseg3ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32mf2( @@ -289,7 +289,7 @@ void test_vluxseg3ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m1( @@ -304,7 +304,7 @@ void test_vluxseg3ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m2( @@ -319,7 +319,7 @@ void test_vluxseg3ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m1( @@ -334,7 +334,7 @@ void test_vluxseg3ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m2( @@ -349,7 +349,7 @@ void test_vluxseg3ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf8( @@ -364,7 +364,7 @@ void test_vluxseg3ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, co // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf8(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf8(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf4( @@ -379,7 +379,7 @@ void test_vluxseg3ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf2( @@ -394,7 +394,7 @@ void test_vluxseg3ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m1( @@ -409,7 +409,7 @@ void test_vluxseg3ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m2( @@ -424,7 +424,7 @@ void test_vluxseg3ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf4( @@ -439,7 +439,7 @@ void test_vluxseg3ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, con // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf4(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf4(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf2( @@ -454,7 +454,7 @@ void test_vluxseg3ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m1( @@ -469,7 +469,7 @@ void test_vluxseg3ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m2( @@ -484,7 +484,7 @@ void test_vluxseg3ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32mf2( @@ -499,7 +499,7 @@ void test_vluxseg3ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u32mf2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32mf2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m1( @@ -514,7 +514,7 @@ void test_vluxseg3ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m2( @@ -529,7 +529,7 @@ void test_vluxseg3ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m1( @@ -544,7 +544,7 @@ void test_vluxseg3ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m1(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m1(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m2( @@ -559,7 +559,7 @@ void test_vluxseg3ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m2(v0, v1, v2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m2(v0, v1, v2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf4_m( @@ -574,7 +574,7 @@ void test_vluxseg3ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf2_m( @@ -589,7 +589,7 @@ void test_vluxseg3ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m1_m( @@ -604,7 +604,7 @@ void test_vluxseg3ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m2_m( @@ -619,7 +619,7 @@ void test_vluxseg3ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vluxseg3ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m1_m( @@ -649,7 +649,7 @@ void test_vluxseg3ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m2_m( @@ -664,7 +664,7 @@ void test_vluxseg3ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m1_m( @@ -679,7 +679,7 @@ void test_vluxseg3ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m2_m( @@ -694,7 +694,7 @@ void test_vluxseg3ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf8_m( @@ -709,7 +709,7 @@ void test_vluxseg3ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf4_m( @@ -724,7 +724,7 @@ void test_vluxseg3ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vluxseg3ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m1_m( @@ -754,7 +754,7 @@ void test_vluxseg3ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m2_m( @@ -769,7 +769,7 @@ void test_vluxseg3ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf4_m( @@ -784,7 +784,7 @@ void test_vluxseg3ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf2_m( @@ -799,7 +799,7 @@ void test_vluxseg3ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m1_m( @@ -814,7 +814,7 @@ void test_vluxseg3ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m2_m( @@ -829,7 +829,7 @@ void test_vluxseg3ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vluxseg3ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m1_m( @@ -859,7 +859,7 @@ void test_vluxseg3ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m2_m( @@ -874,7 +874,7 @@ void test_vluxseg3ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m1_m( @@ -889,7 +889,7 @@ void test_vluxseg3ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m2_m( @@ -904,7 +904,7 @@ void test_vluxseg3ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf8_m( @@ -919,7 +919,7 @@ void test_vluxseg3ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf8_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf4_m( @@ -934,7 +934,7 @@ void test_vluxseg3ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vluxseg3ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m1_m( @@ -964,7 +964,7 @@ void test_vluxseg3ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m2_m( @@ -979,7 +979,7 @@ void test_vluxseg3ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf4_m( @@ -994,7 +994,7 @@ void test_vluxseg3ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf4_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf2_m( @@ -1009,7 +1009,7 @@ void test_vluxseg3ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m1_m( @@ -1024,7 +1024,7 @@ void test_vluxseg3ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m2_m( @@ -1039,7 +1039,7 @@ void test_vluxseg3ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vluxseg3ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32mf2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m1_m( @@ -1069,7 +1069,7 @@ void test_vluxseg3ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m2_m( @@ -1084,7 +1084,7 @@ void test_vluxseg3ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m2_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m1_m( @@ -1099,7 +1099,7 @@ void test_vluxseg3ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m1_m(v0, v1, v2, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m2_m( @@ -1114,6 +1114,6 @@ void test_vluxseg3ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m2_m(v0, v1, v2, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei16.c index 2e71ef086bfd6c28e79d78d7e77ce22b9bc56901..478c8080a3fc2ddfd40e766d483c017b814679ef 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei16.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf2( @@ -38,7 +38,7 @@ void test_vluxseg4ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m1( @@ -55,7 +55,7 @@ void test_vluxseg4ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m2( @@ -72,7 +72,7 @@ void test_vluxseg4ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32mf2( @@ -89,7 +89,7 @@ void test_vluxseg4ei16_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m1( @@ -106,7 +106,7 @@ void test_vluxseg4ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m2( @@ -123,7 +123,7 @@ void test_vluxseg4ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m1( @@ -140,7 +140,7 @@ void test_vluxseg4ei16_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m2( @@ -157,7 +157,7 @@ void test_vluxseg4ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf8( @@ -174,7 +174,7 @@ void test_vluxseg4ei16_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf4( @@ -191,7 +191,7 @@ void test_vluxseg4ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf2( @@ -208,7 +208,7 @@ void test_vluxseg4ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m1( @@ -225,7 +225,7 @@ void test_vluxseg4ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m2( @@ -242,7 +242,7 @@ void test_vluxseg4ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf4( @@ -259,7 +259,7 @@ void test_vluxseg4ei16_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf2( @@ -276,7 +276,7 @@ void test_vluxseg4ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m1( @@ -293,7 +293,7 @@ void test_vluxseg4ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m2( @@ -310,7 +310,7 @@ void test_vluxseg4ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32mf2( @@ -327,7 +327,7 @@ void test_vluxseg4ei16_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m1( @@ -344,7 +344,7 @@ void test_vluxseg4ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m2( @@ -361,7 +361,7 @@ void test_vluxseg4ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m1( @@ -378,7 +378,7 @@ void test_vluxseg4ei16_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m2( @@ -395,7 +395,7 @@ void test_vluxseg4ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf8( @@ -412,7 +412,7 @@ void test_vluxseg4ei16_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf4( @@ -429,7 +429,7 @@ void test_vluxseg4ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf2( @@ -446,7 +446,7 @@ void test_vluxseg4ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m1( @@ -463,7 +463,7 @@ void test_vluxseg4ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m2( @@ -480,7 +480,7 @@ void test_vluxseg4ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf4( @@ -497,7 +497,7 @@ void test_vluxseg4ei16_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf2( @@ -514,7 +514,7 @@ void test_vluxseg4ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m1( @@ -531,7 +531,7 @@ void test_vluxseg4ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m2( @@ -548,7 +548,7 @@ void test_vluxseg4ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32mf2( @@ -565,7 +565,7 @@ void test_vluxseg4ei16_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m1( @@ -582,7 +582,7 @@ void test_vluxseg4ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m2( @@ -599,7 +599,7 @@ void test_vluxseg4ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m1( @@ -616,7 +616,7 @@ void test_vluxseg4ei16_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m2( @@ -633,7 +633,7 @@ void test_vluxseg4ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf4_m( @@ -650,7 +650,7 @@ void test_vluxseg4ei16_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf2_m( @@ -667,7 +667,7 @@ void test_vluxseg4ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m1_m( @@ -684,7 +684,7 @@ void test_vluxseg4ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m2_m( @@ -701,7 +701,7 @@ void test_vluxseg4ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32mf2_m( @@ -718,7 +718,7 @@ void test_vluxseg4ei16_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m1_m( @@ -735,7 +735,7 @@ void test_vluxseg4ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m2_m( @@ -752,7 +752,7 @@ void test_vluxseg4ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m1_m( @@ -769,7 +769,7 @@ void test_vluxseg4ei16_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m2_m( @@ -786,7 +786,7 @@ void test_vluxseg4ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf8_m( @@ -803,7 +803,7 @@ void test_vluxseg4ei16_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf4_m( @@ -820,7 +820,7 @@ void test_vluxseg4ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf2_m( @@ -837,7 +837,7 @@ void test_vluxseg4ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m1_m( @@ -854,7 +854,7 @@ void test_vluxseg4ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m2_m( @@ -871,7 +871,7 @@ void test_vluxseg4ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf4_m( @@ -888,7 +888,7 @@ void test_vluxseg4ei16_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf2_m( @@ -905,7 +905,7 @@ void test_vluxseg4ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m1_m( @@ -922,7 +922,7 @@ void test_vluxseg4ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m2_m( @@ -939,7 +939,7 @@ void test_vluxseg4ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32mf2_m( @@ -956,7 +956,7 @@ void test_vluxseg4ei16_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m1_m( @@ -973,7 +973,7 @@ void test_vluxseg4ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m2_m( @@ -990,7 +990,7 @@ void test_vluxseg4ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m1_m( @@ -1007,7 +1007,7 @@ void test_vluxseg4ei16_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m2_m( @@ -1024,7 +1024,7 @@ void test_vluxseg4ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf8_m( @@ -1041,7 +1041,7 @@ void test_vluxseg4ei16_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf4_m( @@ -1058,7 +1058,7 @@ void test_vluxseg4ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf2_m( @@ -1075,7 +1075,7 @@ void test_vluxseg4ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m1_m( @@ -1092,7 +1092,7 @@ void test_vluxseg4ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m2_m( @@ -1109,7 +1109,7 @@ void test_vluxseg4ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf4_m( @@ -1126,7 +1126,7 @@ void test_vluxseg4ei16_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf2_m( @@ -1143,7 +1143,7 @@ void test_vluxseg4ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m1_m( @@ -1160,7 +1160,7 @@ void test_vluxseg4ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m2_m( @@ -1177,7 +1177,7 @@ void test_vluxseg4ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32mf2_m( @@ -1194,7 +1194,7 @@ void test_vluxseg4ei16_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m1_m( @@ -1211,7 +1211,7 @@ void test_vluxseg4ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m2_m( @@ -1228,7 +1228,7 @@ void test_vluxseg4ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m1_m( @@ -1245,7 +1245,7 @@ void test_vluxseg4ei16_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m2_m( @@ -1262,6 +1262,6 @@ void test_vluxseg4ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei32.c index e931b93d81c74098bcdc7b8414ae1dacffe0cefe..62394abdd5b2dd140b234117d701ee2d16f74493 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei32.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf2( @@ -38,7 +38,7 @@ void test_vluxseg4ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m1( @@ -55,7 +55,7 @@ void test_vluxseg4ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m2( @@ -72,7 +72,7 @@ void test_vluxseg4ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32mf2( @@ -89,7 +89,7 @@ void test_vluxseg4ei32_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m1( @@ -106,7 +106,7 @@ void test_vluxseg4ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m2( @@ -123,7 +123,7 @@ void test_vluxseg4ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m1( @@ -140,7 +140,7 @@ void test_vluxseg4ei32_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m2( @@ -157,7 +157,7 @@ void test_vluxseg4ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf8( @@ -174,7 +174,7 @@ void test_vluxseg4ei32_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf4( @@ -191,7 +191,7 @@ void test_vluxseg4ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf2( @@ -208,7 +208,7 @@ void test_vluxseg4ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m1( @@ -225,7 +225,7 @@ void test_vluxseg4ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m2( @@ -242,7 +242,7 @@ void test_vluxseg4ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf4( @@ -259,7 +259,7 @@ void test_vluxseg4ei32_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf2( @@ -276,7 +276,7 @@ void test_vluxseg4ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m1( @@ -293,7 +293,7 @@ void test_vluxseg4ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m2( @@ -310,7 +310,7 @@ void test_vluxseg4ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32mf2( @@ -327,7 +327,7 @@ void test_vluxseg4ei32_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m1( @@ -344,7 +344,7 @@ void test_vluxseg4ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m2( @@ -361,7 +361,7 @@ void test_vluxseg4ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m1( @@ -378,7 +378,7 @@ void test_vluxseg4ei32_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m2( @@ -395,7 +395,7 @@ void test_vluxseg4ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf8( @@ -412,7 +412,7 @@ void test_vluxseg4ei32_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf4( @@ -429,7 +429,7 @@ void test_vluxseg4ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf2( @@ -446,7 +446,7 @@ void test_vluxseg4ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m1( @@ -463,7 +463,7 @@ void test_vluxseg4ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m2( @@ -480,7 +480,7 @@ void test_vluxseg4ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf4( @@ -497,7 +497,7 @@ void test_vluxseg4ei32_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf2( @@ -514,7 +514,7 @@ void test_vluxseg4ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m1( @@ -531,7 +531,7 @@ void test_vluxseg4ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m2( @@ -548,7 +548,7 @@ void test_vluxseg4ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32mf2( @@ -565,7 +565,7 @@ void test_vluxseg4ei32_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m1( @@ -582,7 +582,7 @@ void test_vluxseg4ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m2( @@ -599,7 +599,7 @@ void test_vluxseg4ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m1( @@ -616,7 +616,7 @@ void test_vluxseg4ei32_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m2( @@ -633,7 +633,7 @@ void test_vluxseg4ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf4_m( @@ -650,7 +650,7 @@ void test_vluxseg4ei32_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf2_m( @@ -667,7 +667,7 @@ void test_vluxseg4ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m1_m( @@ -684,7 +684,7 @@ void test_vluxseg4ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m2_m( @@ -701,7 +701,7 @@ void test_vluxseg4ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32mf2_m( @@ -718,7 +718,7 @@ void test_vluxseg4ei32_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m1_m( @@ -735,7 +735,7 @@ void test_vluxseg4ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m2_m( @@ -752,7 +752,7 @@ void test_vluxseg4ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m1_m( @@ -769,7 +769,7 @@ void test_vluxseg4ei32_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m2_m( @@ -786,7 +786,7 @@ void test_vluxseg4ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf8_m( @@ -803,7 +803,7 @@ void test_vluxseg4ei32_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf4_m( @@ -820,7 +820,7 @@ void test_vluxseg4ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf2_m( @@ -837,7 +837,7 @@ void test_vluxseg4ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m1_m( @@ -854,7 +854,7 @@ void test_vluxseg4ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m2_m( @@ -871,7 +871,7 @@ void test_vluxseg4ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf4_m( @@ -888,7 +888,7 @@ void test_vluxseg4ei32_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf2_m( @@ -905,7 +905,7 @@ void test_vluxseg4ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m1_m( @@ -922,7 +922,7 @@ void test_vluxseg4ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m2_m( @@ -939,7 +939,7 @@ void test_vluxseg4ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32mf2_m( @@ -956,7 +956,7 @@ void test_vluxseg4ei32_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m1_m( @@ -973,7 +973,7 @@ void test_vluxseg4ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m2_m( @@ -990,7 +990,7 @@ void test_vluxseg4ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m1_m( @@ -1007,7 +1007,7 @@ void test_vluxseg4ei32_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m2_m( @@ -1024,7 +1024,7 @@ void test_vluxseg4ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf8_m( @@ -1041,7 +1041,7 @@ void test_vluxseg4ei32_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf4_m( @@ -1058,7 +1058,7 @@ void test_vluxseg4ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf2_m( @@ -1075,7 +1075,7 @@ void test_vluxseg4ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m1_m( @@ -1092,7 +1092,7 @@ void test_vluxseg4ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m2_m( @@ -1109,7 +1109,7 @@ void test_vluxseg4ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf4_m( @@ -1126,7 +1126,7 @@ void test_vluxseg4ei32_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf2_m( @@ -1143,7 +1143,7 @@ void test_vluxseg4ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m1_m( @@ -1160,7 +1160,7 @@ void test_vluxseg4ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m2_m( @@ -1177,7 +1177,7 @@ void test_vluxseg4ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32mf2_m( @@ -1194,7 +1194,7 @@ void test_vluxseg4ei32_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m1_m( @@ -1211,7 +1211,7 @@ void test_vluxseg4ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m2_m( @@ -1228,7 +1228,7 @@ void test_vluxseg4ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m1_m( @@ -1245,7 +1245,7 @@ void test_vluxseg4ei32_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m2_m( @@ -1262,6 +1262,6 @@ void test_vluxseg4ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei64.c index 5f567e19b6ed6f4ecd7830e6969b53ee0794190b..84dd477f420d0fea4682d3553a98c63d1143f7e5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei64.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf2( @@ -38,7 +38,7 @@ void test_vluxseg4ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m1( @@ -55,7 +55,7 @@ void test_vluxseg4ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m2( @@ -72,7 +72,7 @@ void test_vluxseg4ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32mf2( @@ -89,7 +89,7 @@ void test_vluxseg4ei64_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m1( @@ -106,7 +106,7 @@ void test_vluxseg4ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m2( @@ -123,7 +123,7 @@ void test_vluxseg4ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m1( @@ -140,7 +140,7 @@ void test_vluxseg4ei64_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m2( @@ -157,7 +157,7 @@ void test_vluxseg4ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf8( @@ -174,7 +174,7 @@ void test_vluxseg4ei64_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf4( @@ -191,7 +191,7 @@ void test_vluxseg4ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf2( @@ -208,7 +208,7 @@ void test_vluxseg4ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8m1( @@ -225,7 +225,7 @@ void test_vluxseg4ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf4( @@ -242,7 +242,7 @@ void test_vluxseg4ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf2( @@ -259,7 +259,7 @@ void test_vluxseg4ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m1( @@ -276,7 +276,7 @@ void test_vluxseg4ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m2( @@ -293,7 +293,7 @@ void test_vluxseg4ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32mf2( @@ -310,7 +310,7 @@ void test_vluxseg4ei64_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m1( @@ -327,7 +327,7 @@ void test_vluxseg4ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m2( @@ -344,7 +344,7 @@ void test_vluxseg4ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m1( @@ -361,7 +361,7 @@ void test_vluxseg4ei64_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m2( @@ -378,7 +378,7 @@ void test_vluxseg4ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf8( @@ -395,7 +395,7 @@ void test_vluxseg4ei64_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf4( @@ -412,7 +412,7 @@ void test_vluxseg4ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf2( @@ -429,7 +429,7 @@ void test_vluxseg4ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8m1( @@ -446,7 +446,7 @@ void test_vluxseg4ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf4( @@ -463,7 +463,7 @@ void test_vluxseg4ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf2( @@ -480,7 +480,7 @@ void test_vluxseg4ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m1( @@ -497,7 +497,7 @@ void test_vluxseg4ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m2( @@ -514,7 +514,7 @@ void test_vluxseg4ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32mf2( @@ -531,7 +531,7 @@ void test_vluxseg4ei64_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m1( @@ -548,7 +548,7 @@ void test_vluxseg4ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m2( @@ -565,7 +565,7 @@ void test_vluxseg4ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m1( @@ -582,7 +582,7 @@ void test_vluxseg4ei64_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m2( @@ -599,7 +599,7 @@ void test_vluxseg4ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf4_m( @@ -616,7 +616,7 @@ void test_vluxseg4ei64_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf2_m( @@ -633,7 +633,7 @@ void test_vluxseg4ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m1_m( @@ -650,7 +650,7 @@ void test_vluxseg4ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m2_m( @@ -667,7 +667,7 @@ void test_vluxseg4ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32mf2_m( @@ -684,7 +684,7 @@ void test_vluxseg4ei64_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m1_m( @@ -701,7 +701,7 @@ void test_vluxseg4ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m2_m( @@ -718,7 +718,7 @@ void test_vluxseg4ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m1_m( @@ -735,7 +735,7 @@ void test_vluxseg4ei64_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m2_m( @@ -752,7 +752,7 @@ void test_vluxseg4ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf8_m( @@ -769,7 +769,7 @@ void test_vluxseg4ei64_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vluxseg4ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf2_m( @@ -803,7 +803,7 @@ void test_vluxseg4ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8m1_m( @@ -820,7 +820,7 @@ void test_vluxseg4ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf4_m( @@ -837,7 +837,7 @@ void test_vluxseg4ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf2_m( @@ -854,7 +854,7 @@ void test_vluxseg4ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m1_m( @@ -871,7 +871,7 @@ void test_vluxseg4ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m2_m( @@ -888,7 +888,7 @@ void test_vluxseg4ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32mf2_m( @@ -905,7 +905,7 @@ void test_vluxseg4ei64_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m1_m( @@ -922,7 +922,7 @@ void test_vluxseg4ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m2_m( @@ -939,7 +939,7 @@ void test_vluxseg4ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m1_m( @@ -956,7 +956,7 @@ void test_vluxseg4ei64_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m2_m( @@ -973,7 +973,7 @@ void test_vluxseg4ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf8_m( @@ -990,7 +990,7 @@ void test_vluxseg4ei64_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf4_m( @@ -1007,7 +1007,7 @@ void test_vluxseg4ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf2_m( @@ -1024,7 +1024,7 @@ void test_vluxseg4ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8m1_m( @@ -1041,7 +1041,7 @@ void test_vluxseg4ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf4_m( @@ -1058,7 +1058,7 @@ void test_vluxseg4ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf2_m( @@ -1075,7 +1075,7 @@ void test_vluxseg4ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m1_m( @@ -1092,7 +1092,7 @@ void test_vluxseg4ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m2_m( @@ -1109,7 +1109,7 @@ void test_vluxseg4ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32mf2_m( @@ -1126,7 +1126,7 @@ void test_vluxseg4ei64_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m1_m( @@ -1143,7 +1143,7 @@ void test_vluxseg4ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m2_m( @@ -1160,7 +1160,7 @@ void test_vluxseg4ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m1_m( @@ -1177,7 +1177,7 @@ void test_vluxseg4ei64_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m2_m( @@ -1194,6 +1194,6 @@ void test_vluxseg4ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei8.c index 513d694c41de3bd2ee279865c7f60e6d12b7c26e..f6fcbd985996f0c9062e647d0548e51b28d54a32 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg4ei8.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf2( @@ -38,7 +38,7 @@ void test_vluxseg4ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m1( @@ -55,7 +55,7 @@ void test_vluxseg4ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m2( @@ -72,7 +72,7 @@ void test_vluxseg4ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32mf2( @@ -89,7 +89,7 @@ void test_vluxseg4ei8_v_f16m2(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m1( @@ -106,7 +106,7 @@ void test_vluxseg4ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m2( @@ -123,7 +123,7 @@ void test_vluxseg4ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m1( @@ -140,7 +140,7 @@ void test_vluxseg4ei8_v_f32m2(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m2( @@ -157,7 +157,7 @@ void test_vluxseg4ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf8( @@ -174,7 +174,7 @@ void test_vluxseg4ei8_v_f64m2(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf4( @@ -191,7 +191,7 @@ void test_vluxseg4ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf2( @@ -208,7 +208,7 @@ void test_vluxseg4ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m1( @@ -225,7 +225,7 @@ void test_vluxseg4ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m2( @@ -242,7 +242,7 @@ void test_vluxseg4ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf4( @@ -259,7 +259,7 @@ void test_vluxseg4ei8_v_i8m2(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf2( @@ -276,7 +276,7 @@ void test_vluxseg4ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m1( @@ -293,7 +293,7 @@ void test_vluxseg4ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m2( @@ -310,7 +310,7 @@ void test_vluxseg4ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32mf2( @@ -327,7 +327,7 @@ void test_vluxseg4ei8_v_i16m2(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m1( @@ -344,7 +344,7 @@ void test_vluxseg4ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m2( @@ -361,7 +361,7 @@ void test_vluxseg4ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m1( @@ -378,7 +378,7 @@ void test_vluxseg4ei8_v_i32m2(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m2( @@ -395,7 +395,7 @@ void test_vluxseg4ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf8( @@ -412,7 +412,7 @@ void test_vluxseg4ei8_v_i64m2(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf8(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf4( @@ -429,7 +429,7 @@ void test_vluxseg4ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf2( @@ -446,7 +446,7 @@ void test_vluxseg4ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m1( @@ -463,7 +463,7 @@ void test_vluxseg4ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m2( @@ -480,7 +480,7 @@ void test_vluxseg4ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf4( @@ -497,7 +497,7 @@ void test_vluxseg4ei8_v_u8m2(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf4(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf2( @@ -514,7 +514,7 @@ void test_vluxseg4ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m1( @@ -531,7 +531,7 @@ void test_vluxseg4ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m2( @@ -548,7 +548,7 @@ void test_vluxseg4ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32mf2( @@ -565,7 +565,7 @@ void test_vluxseg4ei8_v_u16m2(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32mf2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m1( @@ -582,7 +582,7 @@ void test_vluxseg4ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m2( @@ -599,7 +599,7 @@ void test_vluxseg4ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m1( @@ -616,7 +616,7 @@ void test_vluxseg4ei8_v_u32m2(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m1(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m1(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m2( @@ -633,7 +633,7 @@ void test_vluxseg4ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m2(v0, v1, v2, v3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m2(v0, v1, v2, v3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf4_m( @@ -650,7 +650,7 @@ void test_vluxseg4ei8_v_u64m2(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf2_m( @@ -667,7 +667,7 @@ void test_vluxseg4ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m1_m( @@ -684,7 +684,7 @@ void test_vluxseg4ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m2_m( @@ -701,7 +701,7 @@ void test_vluxseg4ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32mf2_m( @@ -718,7 +718,7 @@ void test_vluxseg4ei8_v_f16m2_m(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m1_m( @@ -735,7 +735,7 @@ void test_vluxseg4ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m2_m( @@ -752,7 +752,7 @@ void test_vluxseg4ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m1_m( @@ -769,7 +769,7 @@ void test_vluxseg4ei8_v_f32m2_m(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m2_m( @@ -786,7 +786,7 @@ void test_vluxseg4ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf8_m( @@ -803,7 +803,7 @@ void test_vluxseg4ei8_v_f64m2_m(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf4_m( @@ -820,7 +820,7 @@ void test_vluxseg4ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf2_m( @@ -837,7 +837,7 @@ void test_vluxseg4ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m1_m( @@ -854,7 +854,7 @@ void test_vluxseg4ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m2_m( @@ -871,7 +871,7 @@ void test_vluxseg4ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf4_m( @@ -888,7 +888,7 @@ void test_vluxseg4ei8_v_i8m2_m(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf2_m( @@ -905,7 +905,7 @@ void test_vluxseg4ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m1_m( @@ -922,7 +922,7 @@ void test_vluxseg4ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m2_m( @@ -939,7 +939,7 @@ void test_vluxseg4ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32mf2_m( @@ -956,7 +956,7 @@ void test_vluxseg4ei8_v_i16m2_m(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m1_m( @@ -973,7 +973,7 @@ void test_vluxseg4ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m2_m( @@ -990,7 +990,7 @@ void test_vluxseg4ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m1_m( @@ -1007,7 +1007,7 @@ void test_vluxseg4ei8_v_i32m2_m(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m2_m( @@ -1024,7 +1024,7 @@ void test_vluxseg4ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf8_m( @@ -1041,7 +1041,7 @@ void test_vluxseg4ei8_v_i64m2_m(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf8_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf4_m( @@ -1058,7 +1058,7 @@ void test_vluxseg4ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf2_m( @@ -1075,7 +1075,7 @@ void test_vluxseg4ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m1_m( @@ -1092,7 +1092,7 @@ void test_vluxseg4ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m2_m( @@ -1109,7 +1109,7 @@ void test_vluxseg4ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf4_m( @@ -1126,7 +1126,7 @@ void test_vluxseg4ei8_v_u8m2_m(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf4_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf2_m( @@ -1143,7 +1143,7 @@ void test_vluxseg4ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m1_m( @@ -1160,7 +1160,7 @@ void test_vluxseg4ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m2_m( @@ -1177,7 +1177,7 @@ void test_vluxseg4ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32mf2_m( @@ -1194,7 +1194,7 @@ void test_vluxseg4ei8_v_u16m2_m(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32mf2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m1_m( @@ -1211,7 +1211,7 @@ void test_vluxseg4ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m2_m( @@ -1228,7 +1228,7 @@ void test_vluxseg4ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m1_m( @@ -1245,7 +1245,7 @@ void test_vluxseg4ei8_v_u32m2_m(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m1_m(v0, v1, v2, v3, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m2_m( @@ -1262,6 +1262,6 @@ void test_vluxseg4ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m2_m(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m2_m(v0, v1, v2, v3, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei16.c index e3442bcdeb9b0e151697af14b098f8ade38d7620..006f8fe13ec54960519d338bbb5725ca62fe0bb1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei16.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf2( @@ -42,7 +42,7 @@ void test_vluxseg5ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16m1( @@ -61,7 +61,7 @@ void test_vluxseg5ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32mf2( @@ -80,7 +80,7 @@ void test_vluxseg5ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32m1( @@ -99,7 +99,7 @@ void test_vluxseg5ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f64m1( @@ -118,7 +118,7 @@ void test_vluxseg5ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf8( @@ -137,7 +137,7 @@ void test_vluxseg5ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf4( @@ -156,7 +156,7 @@ void test_vluxseg5ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf2( @@ -175,7 +175,7 @@ void test_vluxseg5ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8m1( @@ -194,7 +194,7 @@ void test_vluxseg5ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf4( @@ -213,7 +213,7 @@ void test_vluxseg5ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf2( @@ -232,7 +232,7 @@ void test_vluxseg5ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16m1( @@ -251,7 +251,7 @@ void test_vluxseg5ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32mf2( @@ -270,7 +270,7 @@ void test_vluxseg5ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32m1( @@ -289,7 +289,7 @@ void test_vluxseg5ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i64m1( @@ -308,7 +308,7 @@ void test_vluxseg5ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf8( @@ -327,7 +327,7 @@ void test_vluxseg5ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf4( @@ -346,7 +346,7 @@ void test_vluxseg5ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf2( @@ -365,7 +365,7 @@ void test_vluxseg5ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8m1( @@ -384,7 +384,7 @@ void test_vluxseg5ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf4( @@ -403,7 +403,7 @@ void test_vluxseg5ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf2( @@ -422,7 +422,7 @@ void test_vluxseg5ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16m1( @@ -441,7 +441,7 @@ void test_vluxseg5ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32mf2( @@ -460,7 +460,7 @@ void test_vluxseg5ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32m1( @@ -479,7 +479,7 @@ void test_vluxseg5ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u64m1( @@ -498,7 +498,7 @@ void test_vluxseg5ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf4_m( @@ -517,7 +517,7 @@ void test_vluxseg5ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf2_m( @@ -536,7 +536,7 @@ void test_vluxseg5ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16m1_m( @@ -555,7 +555,7 @@ void test_vluxseg5ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32mf2_m( @@ -574,7 +574,7 @@ void test_vluxseg5ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32m1_m( @@ -593,7 +593,7 @@ void test_vluxseg5ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f64m1_m( @@ -612,7 +612,7 @@ void test_vluxseg5ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf8_m( @@ -631,7 +631,7 @@ void test_vluxseg5ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf4_m( @@ -650,7 +650,7 @@ void test_vluxseg5ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf2_m( @@ -669,7 +669,7 @@ void test_vluxseg5ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vluxseg5ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf4_m( @@ -707,7 +707,7 @@ void test_vluxseg5ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf2_m( @@ -726,7 +726,7 @@ void test_vluxseg5ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16m1_m( @@ -745,7 +745,7 @@ void test_vluxseg5ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32mf2_m( @@ -764,7 +764,7 @@ void test_vluxseg5ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32m1_m( @@ -783,7 +783,7 @@ void test_vluxseg5ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i64m1_m( @@ -802,7 +802,7 @@ void test_vluxseg5ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf8_m( @@ -821,7 +821,7 @@ void test_vluxseg5ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf4_m( @@ -840,7 +840,7 @@ void test_vluxseg5ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf2_m( @@ -859,7 +859,7 @@ void test_vluxseg5ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8m1_m( @@ -878,7 +878,7 @@ void test_vluxseg5ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf4_m( @@ -897,7 +897,7 @@ void test_vluxseg5ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf2_m( @@ -916,7 +916,7 @@ void test_vluxseg5ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16m1_m( @@ -935,7 +935,7 @@ void test_vluxseg5ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32mf2_m( @@ -954,7 +954,7 @@ void test_vluxseg5ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32m1_m( @@ -973,7 +973,7 @@ void test_vluxseg5ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u64m1_m( @@ -992,6 +992,6 @@ void test_vluxseg5ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei32.c index f143f2d6f158a44083253c713675042026f9f70a..d5fcd65a5968929e54f7a2be03458aabd2f4f1ac 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei32.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf2( @@ -42,7 +42,7 @@ void test_vluxseg5ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16m1( @@ -61,7 +61,7 @@ void test_vluxseg5ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32mf2( @@ -80,7 +80,7 @@ void test_vluxseg5ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32m1( @@ -99,7 +99,7 @@ void test_vluxseg5ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f64m1( @@ -118,7 +118,7 @@ void test_vluxseg5ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf8( @@ -137,7 +137,7 @@ void test_vluxseg5ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf4( @@ -156,7 +156,7 @@ void test_vluxseg5ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf2( @@ -175,7 +175,7 @@ void test_vluxseg5ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8m1( @@ -194,7 +194,7 @@ void test_vluxseg5ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf4( @@ -213,7 +213,7 @@ void test_vluxseg5ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf2( @@ -232,7 +232,7 @@ void test_vluxseg5ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16m1( @@ -251,7 +251,7 @@ void test_vluxseg5ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32mf2( @@ -270,7 +270,7 @@ void test_vluxseg5ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32m1( @@ -289,7 +289,7 @@ void test_vluxseg5ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i64m1( @@ -308,7 +308,7 @@ void test_vluxseg5ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf8( @@ -327,7 +327,7 @@ void test_vluxseg5ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf4( @@ -346,7 +346,7 @@ void test_vluxseg5ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf2( @@ -365,7 +365,7 @@ void test_vluxseg5ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8m1( @@ -384,7 +384,7 @@ void test_vluxseg5ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf4( @@ -403,7 +403,7 @@ void test_vluxseg5ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf2( @@ -422,7 +422,7 @@ void test_vluxseg5ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16m1( @@ -441,7 +441,7 @@ void test_vluxseg5ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32mf2( @@ -460,7 +460,7 @@ void test_vluxseg5ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32m1( @@ -479,7 +479,7 @@ void test_vluxseg5ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u64m1( @@ -498,7 +498,7 @@ void test_vluxseg5ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf4_m( @@ -517,7 +517,7 @@ void test_vluxseg5ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf2_m( @@ -536,7 +536,7 @@ void test_vluxseg5ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16m1_m( @@ -555,7 +555,7 @@ void test_vluxseg5ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32mf2_m( @@ -574,7 +574,7 @@ void test_vluxseg5ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32m1_m( @@ -593,7 +593,7 @@ void test_vluxseg5ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f64m1_m( @@ -612,7 +612,7 @@ void test_vluxseg5ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf8_m( @@ -631,7 +631,7 @@ void test_vluxseg5ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf4_m( @@ -650,7 +650,7 @@ void test_vluxseg5ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf2_m( @@ -669,7 +669,7 @@ void test_vluxseg5ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vluxseg5ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf4_m( @@ -707,7 +707,7 @@ void test_vluxseg5ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf2_m( @@ -726,7 +726,7 @@ void test_vluxseg5ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16m1_m( @@ -745,7 +745,7 @@ void test_vluxseg5ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32mf2_m( @@ -764,7 +764,7 @@ void test_vluxseg5ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32m1_m( @@ -783,7 +783,7 @@ void test_vluxseg5ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i64m1_m( @@ -802,7 +802,7 @@ void test_vluxseg5ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf8_m( @@ -821,7 +821,7 @@ void test_vluxseg5ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf4_m( @@ -840,7 +840,7 @@ void test_vluxseg5ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf2_m( @@ -859,7 +859,7 @@ void test_vluxseg5ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8m1_m( @@ -878,7 +878,7 @@ void test_vluxseg5ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf4_m( @@ -897,7 +897,7 @@ void test_vluxseg5ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf2_m( @@ -916,7 +916,7 @@ void test_vluxseg5ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16m1_m( @@ -935,7 +935,7 @@ void test_vluxseg5ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32mf2_m( @@ -954,7 +954,7 @@ void test_vluxseg5ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32m1_m( @@ -973,7 +973,7 @@ void test_vluxseg5ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u64m1_m( @@ -992,6 +992,6 @@ void test_vluxseg5ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei64.c index f881bedd115c896484cf1bfb7b35bd4dc4496cb1..05f024e065f7a2e78c4faa5f7fa67fac0b9e3739 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei64.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf2( @@ -42,7 +42,7 @@ void test_vluxseg5ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16m1( @@ -61,7 +61,7 @@ void test_vluxseg5ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32mf2( @@ -80,7 +80,7 @@ void test_vluxseg5ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32m1( @@ -99,7 +99,7 @@ void test_vluxseg5ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f64m1( @@ -118,7 +118,7 @@ void test_vluxseg5ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf8( @@ -137,7 +137,7 @@ void test_vluxseg5ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf4( @@ -156,7 +156,7 @@ void test_vluxseg5ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf2( @@ -175,7 +175,7 @@ void test_vluxseg5ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8m1( @@ -194,7 +194,7 @@ void test_vluxseg5ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf4( @@ -213,7 +213,7 @@ void test_vluxseg5ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf2( @@ -232,7 +232,7 @@ void test_vluxseg5ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16m1( @@ -251,7 +251,7 @@ void test_vluxseg5ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32mf2( @@ -270,7 +270,7 @@ void test_vluxseg5ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32m1( @@ -289,7 +289,7 @@ void test_vluxseg5ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i64m1( @@ -308,7 +308,7 @@ void test_vluxseg5ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf8( @@ -327,7 +327,7 @@ void test_vluxseg5ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf4( @@ -346,7 +346,7 @@ void test_vluxseg5ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf2( @@ -365,7 +365,7 @@ void test_vluxseg5ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8m1( @@ -384,7 +384,7 @@ void test_vluxseg5ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf4( @@ -403,7 +403,7 @@ void test_vluxseg5ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf2( @@ -422,7 +422,7 @@ void test_vluxseg5ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16m1( @@ -441,7 +441,7 @@ void test_vluxseg5ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32mf2( @@ -460,7 +460,7 @@ void test_vluxseg5ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32m1( @@ -479,7 +479,7 @@ void test_vluxseg5ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u64m1( @@ -498,7 +498,7 @@ void test_vluxseg5ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf4_m( @@ -517,7 +517,7 @@ void test_vluxseg5ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf2_m( @@ -536,7 +536,7 @@ void test_vluxseg5ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16m1_m( @@ -555,7 +555,7 @@ void test_vluxseg5ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32mf2_m( @@ -574,7 +574,7 @@ void test_vluxseg5ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32m1_m( @@ -593,7 +593,7 @@ void test_vluxseg5ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f64m1_m( @@ -612,7 +612,7 @@ void test_vluxseg5ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf8_m( @@ -631,7 +631,7 @@ void test_vluxseg5ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf4_m( @@ -650,7 +650,7 @@ void test_vluxseg5ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf2_m( @@ -669,7 +669,7 @@ void test_vluxseg5ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vluxseg5ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf4_m( @@ -707,7 +707,7 @@ void test_vluxseg5ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf2_m( @@ -726,7 +726,7 @@ void test_vluxseg5ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16m1_m( @@ -745,7 +745,7 @@ void test_vluxseg5ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32mf2_m( @@ -764,7 +764,7 @@ void test_vluxseg5ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32m1_m( @@ -783,7 +783,7 @@ void test_vluxseg5ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i64m1_m( @@ -802,7 +802,7 @@ void test_vluxseg5ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf8_m( @@ -821,7 +821,7 @@ void test_vluxseg5ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf4_m( @@ -840,7 +840,7 @@ void test_vluxseg5ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf2_m( @@ -859,7 +859,7 @@ void test_vluxseg5ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8m1_m( @@ -878,7 +878,7 @@ void test_vluxseg5ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf4_m( @@ -897,7 +897,7 @@ void test_vluxseg5ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf2_m( @@ -916,7 +916,7 @@ void test_vluxseg5ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16m1_m( @@ -935,7 +935,7 @@ void test_vluxseg5ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32mf2_m( @@ -954,7 +954,7 @@ void test_vluxseg5ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32m1_m( @@ -973,7 +973,7 @@ void test_vluxseg5ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u64m1_m( @@ -992,6 +992,6 @@ void test_vluxseg5ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei8.c index 557c3cb3213541d319d5d5dc7f8332c481009f50..b2b5166cd628cf11a57548d7e310b385a4ce795c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg5ei8.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf2( @@ -42,7 +42,7 @@ void test_vluxseg5ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16m1( @@ -61,7 +61,7 @@ void test_vluxseg5ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32mf2( @@ -80,7 +80,7 @@ void test_vluxseg5ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32m1( @@ -99,7 +99,7 @@ void test_vluxseg5ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f64m1( @@ -118,7 +118,7 @@ void test_vluxseg5ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf8( @@ -137,7 +137,7 @@ void test_vluxseg5ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf4( @@ -156,7 +156,7 @@ void test_vluxseg5ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf2( @@ -175,7 +175,7 @@ void test_vluxseg5ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8m1( @@ -194,7 +194,7 @@ void test_vluxseg5ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf4( @@ -213,7 +213,7 @@ void test_vluxseg5ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf2( @@ -232,7 +232,7 @@ void test_vluxseg5ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16m1( @@ -251,7 +251,7 @@ void test_vluxseg5ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32mf2( @@ -270,7 +270,7 @@ void test_vluxseg5ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32m1( @@ -289,7 +289,7 @@ void test_vluxseg5ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i64m1( @@ -308,7 +308,7 @@ void test_vluxseg5ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf8( @@ -327,7 +327,7 @@ void test_vluxseg5ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf8(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf4( @@ -346,7 +346,7 @@ void test_vluxseg5ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf2( @@ -365,7 +365,7 @@ void test_vluxseg5ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8m1( @@ -384,7 +384,7 @@ void test_vluxseg5ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf4( @@ -403,7 +403,7 @@ void test_vluxseg5ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf4(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf2( @@ -422,7 +422,7 @@ void test_vluxseg5ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16m1( @@ -441,7 +441,7 @@ void test_vluxseg5ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32mf2( @@ -460,7 +460,7 @@ void test_vluxseg5ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32mf2(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32m1( @@ -479,7 +479,7 @@ void test_vluxseg5ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u64m1( @@ -498,7 +498,7 @@ void test_vluxseg5ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u64m1(v0, v1, v2, v3, v4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf4_m( @@ -517,7 +517,7 @@ void test_vluxseg5ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf2_m( @@ -536,7 +536,7 @@ void test_vluxseg5ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16m1_m( @@ -555,7 +555,7 @@ void test_vluxseg5ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32mf2_m( @@ -574,7 +574,7 @@ void test_vluxseg5ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32m1_m( @@ -593,7 +593,7 @@ void test_vluxseg5ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f64m1_m( @@ -612,7 +612,7 @@ void test_vluxseg5ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf8_m( @@ -631,7 +631,7 @@ void test_vluxseg5ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf4_m( @@ -650,7 +650,7 @@ void test_vluxseg5ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf2_m( @@ -669,7 +669,7 @@ void test_vluxseg5ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vluxseg5ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf4_m( @@ -707,7 +707,7 @@ void test_vluxseg5ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf2_m( @@ -726,7 +726,7 @@ void test_vluxseg5ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16m1_m( @@ -745,7 +745,7 @@ void test_vluxseg5ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32mf2_m( @@ -764,7 +764,7 @@ void test_vluxseg5ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32m1_m( @@ -783,7 +783,7 @@ void test_vluxseg5ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i64m1_m( @@ -802,7 +802,7 @@ void test_vluxseg5ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf8_m( @@ -821,7 +821,7 @@ void test_vluxseg5ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf8_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf4_m( @@ -840,7 +840,7 @@ void test_vluxseg5ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf2_m( @@ -859,7 +859,7 @@ void test_vluxseg5ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8m1_m( @@ -878,7 +878,7 @@ void test_vluxseg5ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf4_m( @@ -897,7 +897,7 @@ void test_vluxseg5ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf4_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf2_m( @@ -916,7 +916,7 @@ void test_vluxseg5ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16m1_m( @@ -935,7 +935,7 @@ void test_vluxseg5ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32mf2_m( @@ -954,7 +954,7 @@ void test_vluxseg5ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32mf2_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32m1_m( @@ -973,7 +973,7 @@ void test_vluxseg5ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u64m1_m( @@ -992,6 +992,6 @@ void test_vluxseg5ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u64m1_m(v0, v1, v2, v3, v4, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei16.c index f27418d37b841909361a0eb1f92d61caa121c482..c2d2dd6b2c81c8cb756d8fdd5bd6063272f143d3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei16.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf2( @@ -46,7 +46,7 @@ void test_vluxseg6ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16m1( @@ -67,7 +67,7 @@ void test_vluxseg6ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32mf2( @@ -88,7 +88,7 @@ void test_vluxseg6ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32m1( @@ -109,7 +109,7 @@ void test_vluxseg6ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f64m1( @@ -130,7 +130,7 @@ void test_vluxseg6ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf8( @@ -151,7 +151,7 @@ void test_vluxseg6ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf4( @@ -172,7 +172,7 @@ void test_vluxseg6ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf2( @@ -193,7 +193,7 @@ void test_vluxseg6ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8m1( @@ -214,7 +214,7 @@ void test_vluxseg6ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf4( @@ -235,7 +235,7 @@ void test_vluxseg6ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf2( @@ -256,7 +256,7 @@ void test_vluxseg6ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16m1( @@ -277,7 +277,7 @@ void test_vluxseg6ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32mf2( @@ -298,7 +298,7 @@ void test_vluxseg6ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32m1( @@ -319,7 +319,7 @@ void test_vluxseg6ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i64m1( @@ -340,7 +340,7 @@ void test_vluxseg6ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf8( @@ -361,7 +361,7 @@ void test_vluxseg6ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf4( @@ -382,7 +382,7 @@ void test_vluxseg6ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf2( @@ -403,7 +403,7 @@ void test_vluxseg6ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8m1( @@ -424,7 +424,7 @@ void test_vluxseg6ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf4( @@ -445,7 +445,7 @@ void test_vluxseg6ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf2( @@ -466,7 +466,7 @@ void test_vluxseg6ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16m1( @@ -487,7 +487,7 @@ void test_vluxseg6ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32mf2( @@ -508,7 +508,7 @@ void test_vluxseg6ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32m1( @@ -529,7 +529,7 @@ void test_vluxseg6ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u64m1( @@ -550,7 +550,7 @@ void test_vluxseg6ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf4_m( @@ -571,7 +571,7 @@ void test_vluxseg6ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf2_m( @@ -592,7 +592,7 @@ void test_vluxseg6ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16m1_m( @@ -613,7 +613,7 @@ void test_vluxseg6ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vluxseg6ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32m1_m( @@ -655,7 +655,7 @@ void test_vluxseg6ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f64m1_m( @@ -676,7 +676,7 @@ void test_vluxseg6ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf8_m( @@ -697,7 +697,7 @@ void test_vluxseg6ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf4_m( @@ -718,7 +718,7 @@ void test_vluxseg6ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vluxseg6ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8m1_m( @@ -760,7 +760,7 @@ void test_vluxseg6ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf4_m( @@ -781,7 +781,7 @@ void test_vluxseg6ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf2_m( @@ -802,7 +802,7 @@ void test_vluxseg6ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16m1_m( @@ -823,7 +823,7 @@ void test_vluxseg6ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vluxseg6ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32m1_m( @@ -865,7 +865,7 @@ void test_vluxseg6ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i64m1_m( @@ -886,7 +886,7 @@ void test_vluxseg6ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf8_m( @@ -907,7 +907,7 @@ void test_vluxseg6ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf4_m( @@ -928,7 +928,7 @@ void test_vluxseg6ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vluxseg6ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8m1_m( @@ -970,7 +970,7 @@ void test_vluxseg6ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf4_m( @@ -991,7 +991,7 @@ void test_vluxseg6ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf2_m( @@ -1012,7 +1012,7 @@ void test_vluxseg6ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16m1_m( @@ -1033,7 +1033,7 @@ void test_vluxseg6ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vluxseg6ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32m1_m( @@ -1075,7 +1075,7 @@ void test_vluxseg6ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u64m1_m( @@ -1096,6 +1096,6 @@ void test_vluxseg6ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei32.c index 331a7ba4a56582389916f7fe5db576330d03b41d..990da7dac0fc154aa163970332f0dcdbb36021c3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei32.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf2( @@ -46,7 +46,7 @@ void test_vluxseg6ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16m1( @@ -67,7 +67,7 @@ void test_vluxseg6ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32mf2( @@ -88,7 +88,7 @@ void test_vluxseg6ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32m1( @@ -109,7 +109,7 @@ void test_vluxseg6ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f64m1( @@ -130,7 +130,7 @@ void test_vluxseg6ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf8( @@ -151,7 +151,7 @@ void test_vluxseg6ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf4( @@ -172,7 +172,7 @@ void test_vluxseg6ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf2( @@ -193,7 +193,7 @@ void test_vluxseg6ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8m1( @@ -214,7 +214,7 @@ void test_vluxseg6ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf4( @@ -235,7 +235,7 @@ void test_vluxseg6ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf2( @@ -256,7 +256,7 @@ void test_vluxseg6ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16m1( @@ -277,7 +277,7 @@ void test_vluxseg6ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32mf2( @@ -298,7 +298,7 @@ void test_vluxseg6ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32m1( @@ -319,7 +319,7 @@ void test_vluxseg6ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i64m1( @@ -340,7 +340,7 @@ void test_vluxseg6ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf8( @@ -361,7 +361,7 @@ void test_vluxseg6ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf4( @@ -382,7 +382,7 @@ void test_vluxseg6ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf2( @@ -403,7 +403,7 @@ void test_vluxseg6ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8m1( @@ -424,7 +424,7 @@ void test_vluxseg6ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf4( @@ -445,7 +445,7 @@ void test_vluxseg6ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf2( @@ -466,7 +466,7 @@ void test_vluxseg6ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16m1( @@ -487,7 +487,7 @@ void test_vluxseg6ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32mf2( @@ -508,7 +508,7 @@ void test_vluxseg6ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32m1( @@ -529,7 +529,7 @@ void test_vluxseg6ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u64m1( @@ -550,7 +550,7 @@ void test_vluxseg6ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf4_m( @@ -571,7 +571,7 @@ void test_vluxseg6ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf2_m( @@ -592,7 +592,7 @@ void test_vluxseg6ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16m1_m( @@ -613,7 +613,7 @@ void test_vluxseg6ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vluxseg6ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32m1_m( @@ -655,7 +655,7 @@ void test_vluxseg6ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f64m1_m( @@ -676,7 +676,7 @@ void test_vluxseg6ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf8_m( @@ -697,7 +697,7 @@ void test_vluxseg6ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf4_m( @@ -718,7 +718,7 @@ void test_vluxseg6ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vluxseg6ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8m1_m( @@ -760,7 +760,7 @@ void test_vluxseg6ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf4_m( @@ -781,7 +781,7 @@ void test_vluxseg6ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf2_m( @@ -802,7 +802,7 @@ void test_vluxseg6ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16m1_m( @@ -823,7 +823,7 @@ void test_vluxseg6ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vluxseg6ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32m1_m( @@ -865,7 +865,7 @@ void test_vluxseg6ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i64m1_m( @@ -886,7 +886,7 @@ void test_vluxseg6ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf8_m( @@ -907,7 +907,7 @@ void test_vluxseg6ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf4_m( @@ -928,7 +928,7 @@ void test_vluxseg6ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vluxseg6ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8m1_m( @@ -970,7 +970,7 @@ void test_vluxseg6ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf4_m( @@ -991,7 +991,7 @@ void test_vluxseg6ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf2_m( @@ -1012,7 +1012,7 @@ void test_vluxseg6ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16m1_m( @@ -1033,7 +1033,7 @@ void test_vluxseg6ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vluxseg6ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32m1_m( @@ -1075,7 +1075,7 @@ void test_vluxseg6ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u64m1_m( @@ -1096,6 +1096,6 @@ void test_vluxseg6ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei64.c index 204490a0a08275020cd913bcb0da6b05f5369d57..a212c596b31bcb73b70ad9b098b8406ae8d2fd0d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei64.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf2( @@ -46,7 +46,7 @@ void test_vluxseg6ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16m1( @@ -67,7 +67,7 @@ void test_vluxseg6ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32mf2( @@ -88,7 +88,7 @@ void test_vluxseg6ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32m1( @@ -109,7 +109,7 @@ void test_vluxseg6ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f64m1( @@ -130,7 +130,7 @@ void test_vluxseg6ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf8( @@ -151,7 +151,7 @@ void test_vluxseg6ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf4( @@ -172,7 +172,7 @@ void test_vluxseg6ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf2( @@ -193,7 +193,7 @@ void test_vluxseg6ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8m1( @@ -214,7 +214,7 @@ void test_vluxseg6ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf4( @@ -235,7 +235,7 @@ void test_vluxseg6ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf2( @@ -256,7 +256,7 @@ void test_vluxseg6ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16m1( @@ -277,7 +277,7 @@ void test_vluxseg6ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32mf2( @@ -298,7 +298,7 @@ void test_vluxseg6ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32m1( @@ -319,7 +319,7 @@ void test_vluxseg6ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i64m1( @@ -340,7 +340,7 @@ void test_vluxseg6ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf8( @@ -361,7 +361,7 @@ void test_vluxseg6ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf4( @@ -382,7 +382,7 @@ void test_vluxseg6ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf2( @@ -403,7 +403,7 @@ void test_vluxseg6ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8m1( @@ -424,7 +424,7 @@ void test_vluxseg6ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf4( @@ -445,7 +445,7 @@ void test_vluxseg6ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf2( @@ -466,7 +466,7 @@ void test_vluxseg6ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16m1( @@ -487,7 +487,7 @@ void test_vluxseg6ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32mf2( @@ -508,7 +508,7 @@ void test_vluxseg6ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32m1( @@ -529,7 +529,7 @@ void test_vluxseg6ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u64m1( @@ -550,7 +550,7 @@ void test_vluxseg6ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf4_m( @@ -571,7 +571,7 @@ void test_vluxseg6ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf2_m( @@ -592,7 +592,7 @@ void test_vluxseg6ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16m1_m( @@ -613,7 +613,7 @@ void test_vluxseg6ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vluxseg6ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32m1_m( @@ -655,7 +655,7 @@ void test_vluxseg6ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f64m1_m( @@ -676,7 +676,7 @@ void test_vluxseg6ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf8_m( @@ -697,7 +697,7 @@ void test_vluxseg6ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf4_m( @@ -718,7 +718,7 @@ void test_vluxseg6ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vluxseg6ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8m1_m( @@ -760,7 +760,7 @@ void test_vluxseg6ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf4_m( @@ -781,7 +781,7 @@ void test_vluxseg6ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf2_m( @@ -802,7 +802,7 @@ void test_vluxseg6ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16m1_m( @@ -823,7 +823,7 @@ void test_vluxseg6ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vluxseg6ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32m1_m( @@ -865,7 +865,7 @@ void test_vluxseg6ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i64m1_m( @@ -886,7 +886,7 @@ void test_vluxseg6ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf8_m( @@ -907,7 +907,7 @@ void test_vluxseg6ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf4_m( @@ -928,7 +928,7 @@ void test_vluxseg6ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vluxseg6ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8m1_m( @@ -970,7 +970,7 @@ void test_vluxseg6ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf4_m( @@ -991,7 +991,7 @@ void test_vluxseg6ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf2_m( @@ -1012,7 +1012,7 @@ void test_vluxseg6ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16m1_m( @@ -1033,7 +1033,7 @@ void test_vluxseg6ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vluxseg6ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32m1_m( @@ -1075,7 +1075,7 @@ void test_vluxseg6ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u64m1_m( @@ -1096,6 +1096,6 @@ void test_vluxseg6ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei8.c index 9abb78d27141ed8d0d382bfa1cd9e97a4ecf2221..6c1160bc4f935d1c5931f72404f9b2a6a0419816 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg6ei8.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf2( @@ -46,7 +46,7 @@ void test_vluxseg6ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16m1( @@ -67,7 +67,7 @@ void test_vluxseg6ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32mf2( @@ -88,7 +88,7 @@ void test_vluxseg6ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32m1( @@ -109,7 +109,7 @@ void test_vluxseg6ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f64m1( @@ -130,7 +130,7 @@ void test_vluxseg6ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf8( @@ -151,7 +151,7 @@ void test_vluxseg6ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf4( @@ -172,7 +172,7 @@ void test_vluxseg6ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf2( @@ -193,7 +193,7 @@ void test_vluxseg6ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8m1( @@ -214,7 +214,7 @@ void test_vluxseg6ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf4( @@ -235,7 +235,7 @@ void test_vluxseg6ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf2( @@ -256,7 +256,7 @@ void test_vluxseg6ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16m1( @@ -277,7 +277,7 @@ void test_vluxseg6ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32mf2( @@ -298,7 +298,7 @@ void test_vluxseg6ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32m1( @@ -319,7 +319,7 @@ void test_vluxseg6ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i64m1( @@ -340,7 +340,7 @@ void test_vluxseg6ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf8( @@ -361,7 +361,7 @@ void test_vluxseg6ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf4( @@ -382,7 +382,7 @@ void test_vluxseg6ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf2( @@ -403,7 +403,7 @@ void test_vluxseg6ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8m1( @@ -424,7 +424,7 @@ void test_vluxseg6ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf4( @@ -445,7 +445,7 @@ void test_vluxseg6ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf2( @@ -466,7 +466,7 @@ void test_vluxseg6ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16m1( @@ -487,7 +487,7 @@ void test_vluxseg6ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32mf2( @@ -508,7 +508,7 @@ void test_vluxseg6ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32m1( @@ -529,7 +529,7 @@ void test_vluxseg6ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u64m1( @@ -550,7 +550,7 @@ void test_vluxseg6ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u64m1(v0, v1, v2, v3, v4, v5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf4_m( @@ -571,7 +571,7 @@ void test_vluxseg6ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf2_m( @@ -592,7 +592,7 @@ void test_vluxseg6ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16m1_m( @@ -613,7 +613,7 @@ void test_vluxseg6ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32mf2_m( @@ -634,7 +634,7 @@ void test_vluxseg6ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32m1_m( @@ -655,7 +655,7 @@ void test_vluxseg6ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f64m1_m( @@ -676,7 +676,7 @@ void test_vluxseg6ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf8_m( @@ -697,7 +697,7 @@ void test_vluxseg6ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf4_m( @@ -718,7 +718,7 @@ void test_vluxseg6ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf2_m( @@ -739,7 +739,7 @@ void test_vluxseg6ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8m1_m( @@ -760,7 +760,7 @@ void test_vluxseg6ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf4_m( @@ -781,7 +781,7 @@ void test_vluxseg6ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf2_m( @@ -802,7 +802,7 @@ void test_vluxseg6ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16m1_m( @@ -823,7 +823,7 @@ void test_vluxseg6ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32mf2_m( @@ -844,7 +844,7 @@ void test_vluxseg6ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32m1_m( @@ -865,7 +865,7 @@ void test_vluxseg6ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i64m1_m( @@ -886,7 +886,7 @@ void test_vluxseg6ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf8_m( @@ -907,7 +907,7 @@ void test_vluxseg6ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf4_m( @@ -928,7 +928,7 @@ void test_vluxseg6ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf2_m( @@ -949,7 +949,7 @@ void test_vluxseg6ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8m1_m( @@ -970,7 +970,7 @@ void test_vluxseg6ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf4_m( @@ -991,7 +991,7 @@ void test_vluxseg6ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf2_m( @@ -1012,7 +1012,7 @@ void test_vluxseg6ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16m1_m( @@ -1033,7 +1033,7 @@ void test_vluxseg6ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32mf2_m( @@ -1054,7 +1054,7 @@ void test_vluxseg6ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32m1_m( @@ -1075,7 +1075,7 @@ void test_vluxseg6ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u64m1_m( @@ -1096,6 +1096,6 @@ void test_vluxseg6ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei16.c index 5c68e7c95bbf897c1a5791ec050611db682ee8f0..0ee1f97e5f3df72df2e750f5e9b968c95718d3d3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei16.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf2( @@ -50,7 +50,7 @@ void test_vluxseg7ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16m1( @@ -73,7 +73,7 @@ void test_vluxseg7ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32mf2( @@ -96,7 +96,7 @@ void test_vluxseg7ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32m1( @@ -119,7 +119,7 @@ void test_vluxseg7ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f64m1( @@ -142,7 +142,7 @@ void test_vluxseg7ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf8( @@ -165,7 +165,7 @@ void test_vluxseg7ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf4( @@ -188,7 +188,7 @@ void test_vluxseg7ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf2( @@ -211,7 +211,7 @@ void test_vluxseg7ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8m1( @@ -234,7 +234,7 @@ void test_vluxseg7ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf4( @@ -257,7 +257,7 @@ void test_vluxseg7ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf2( @@ -280,7 +280,7 @@ void test_vluxseg7ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16m1( @@ -303,7 +303,7 @@ void test_vluxseg7ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32mf2( @@ -326,7 +326,7 @@ void test_vluxseg7ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32m1( @@ -349,7 +349,7 @@ void test_vluxseg7ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i64m1( @@ -372,7 +372,7 @@ void test_vluxseg7ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf8( @@ -395,7 +395,7 @@ void test_vluxseg7ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf4( @@ -418,7 +418,7 @@ void test_vluxseg7ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf2( @@ -441,7 +441,7 @@ void test_vluxseg7ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8m1( @@ -464,7 +464,7 @@ void test_vluxseg7ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf4( @@ -487,7 +487,7 @@ void test_vluxseg7ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf2( @@ -510,7 +510,7 @@ void test_vluxseg7ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16m1( @@ -533,7 +533,7 @@ void test_vluxseg7ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32mf2( @@ -556,7 +556,7 @@ void test_vluxseg7ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32m1( @@ -579,7 +579,7 @@ void test_vluxseg7ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u64m1( @@ -602,7 +602,7 @@ void test_vluxseg7ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf4_m( @@ -625,7 +625,7 @@ void test_vluxseg7ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf2_m( @@ -648,7 +648,7 @@ void test_vluxseg7ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16m1_m( @@ -671,7 +671,7 @@ void test_vluxseg7ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32mf2_m( @@ -694,7 +694,7 @@ void test_vluxseg7ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32m1_m( @@ -717,7 +717,7 @@ void test_vluxseg7ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f64m1_m( @@ -740,7 +740,7 @@ void test_vluxseg7ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf8_m( @@ -763,7 +763,7 @@ void test_vluxseg7ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vluxseg7ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf2_m( @@ -809,7 +809,7 @@ void test_vluxseg7ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8m1_m( @@ -832,7 +832,7 @@ void test_vluxseg7ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf4_m( @@ -855,7 +855,7 @@ void test_vluxseg7ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf2_m( @@ -878,7 +878,7 @@ void test_vluxseg7ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vluxseg7ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32mf2_m( @@ -924,7 +924,7 @@ void test_vluxseg7ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32m1_m( @@ -947,7 +947,7 @@ void test_vluxseg7ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i64m1_m( @@ -970,7 +970,7 @@ void test_vluxseg7ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf8_m( @@ -993,7 +993,7 @@ void test_vluxseg7ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf4_m( @@ -1016,7 +1016,7 @@ void test_vluxseg7ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf2_m( @@ -1039,7 +1039,7 @@ void test_vluxseg7ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8m1_m( @@ -1062,7 +1062,7 @@ void test_vluxseg7ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf4_m( @@ -1085,7 +1085,7 @@ void test_vluxseg7ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf2_m( @@ -1108,7 +1108,7 @@ void test_vluxseg7ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16m1_m( @@ -1131,7 +1131,7 @@ void test_vluxseg7ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32mf2_m( @@ -1154,7 +1154,7 @@ void test_vluxseg7ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32m1_m( @@ -1177,7 +1177,7 @@ void test_vluxseg7ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u64m1_m( @@ -1200,6 +1200,6 @@ void test_vluxseg7ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei32.c index 01e2ea3c579f08b4c30c86dc3a5a3284e4c97f10..5be02f168b20f274b46c8de7973dd3600348005d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei32.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf2( @@ -50,7 +50,7 @@ void test_vluxseg7ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16m1( @@ -73,7 +73,7 @@ void test_vluxseg7ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32mf2( @@ -96,7 +96,7 @@ void test_vluxseg7ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32m1( @@ -119,7 +119,7 @@ void test_vluxseg7ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f64m1( @@ -142,7 +142,7 @@ void test_vluxseg7ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf8( @@ -165,7 +165,7 @@ void test_vluxseg7ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf4( @@ -188,7 +188,7 @@ void test_vluxseg7ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf2( @@ -211,7 +211,7 @@ void test_vluxseg7ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8m1( @@ -234,7 +234,7 @@ void test_vluxseg7ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf4( @@ -257,7 +257,7 @@ void test_vluxseg7ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf2( @@ -280,7 +280,7 @@ void test_vluxseg7ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16m1( @@ -303,7 +303,7 @@ void test_vluxseg7ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32mf2( @@ -326,7 +326,7 @@ void test_vluxseg7ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32m1( @@ -349,7 +349,7 @@ void test_vluxseg7ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i64m1( @@ -372,7 +372,7 @@ void test_vluxseg7ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf8( @@ -395,7 +395,7 @@ void test_vluxseg7ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf4( @@ -418,7 +418,7 @@ void test_vluxseg7ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf2( @@ -441,7 +441,7 @@ void test_vluxseg7ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8m1( @@ -464,7 +464,7 @@ void test_vluxseg7ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf4( @@ -487,7 +487,7 @@ void test_vluxseg7ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf2( @@ -510,7 +510,7 @@ void test_vluxseg7ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16m1( @@ -533,7 +533,7 @@ void test_vluxseg7ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32mf2( @@ -556,7 +556,7 @@ void test_vluxseg7ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32m1( @@ -579,7 +579,7 @@ void test_vluxseg7ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u64m1( @@ -602,7 +602,7 @@ void test_vluxseg7ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf4_m( @@ -625,7 +625,7 @@ void test_vluxseg7ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf2_m( @@ -648,7 +648,7 @@ void test_vluxseg7ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16m1_m( @@ -671,7 +671,7 @@ void test_vluxseg7ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32mf2_m( @@ -694,7 +694,7 @@ void test_vluxseg7ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32m1_m( @@ -717,7 +717,7 @@ void test_vluxseg7ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f64m1_m( @@ -740,7 +740,7 @@ void test_vluxseg7ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf8_m( @@ -763,7 +763,7 @@ void test_vluxseg7ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vluxseg7ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf2_m( @@ -809,7 +809,7 @@ void test_vluxseg7ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8m1_m( @@ -832,7 +832,7 @@ void test_vluxseg7ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf4_m( @@ -855,7 +855,7 @@ void test_vluxseg7ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf2_m( @@ -878,7 +878,7 @@ void test_vluxseg7ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vluxseg7ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32mf2_m( @@ -924,7 +924,7 @@ void test_vluxseg7ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32m1_m( @@ -947,7 +947,7 @@ void test_vluxseg7ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i64m1_m( @@ -970,7 +970,7 @@ void test_vluxseg7ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf8_m( @@ -993,7 +993,7 @@ void test_vluxseg7ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf4_m( @@ -1016,7 +1016,7 @@ void test_vluxseg7ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf2_m( @@ -1039,7 +1039,7 @@ void test_vluxseg7ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8m1_m( @@ -1062,7 +1062,7 @@ void test_vluxseg7ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf4_m( @@ -1085,7 +1085,7 @@ void test_vluxseg7ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf2_m( @@ -1108,7 +1108,7 @@ void test_vluxseg7ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16m1_m( @@ -1131,7 +1131,7 @@ void test_vluxseg7ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32mf2_m( @@ -1154,7 +1154,7 @@ void test_vluxseg7ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32m1_m( @@ -1177,7 +1177,7 @@ void test_vluxseg7ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u64m1_m( @@ -1200,6 +1200,6 @@ void test_vluxseg7ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei64.c index a10dbd67c555841327e161a8bcdcc21cf22640a5..585b1b63e7e081ea0363ca10470aded339e16ee2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei64.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf2( @@ -50,7 +50,7 @@ void test_vluxseg7ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16m1( @@ -73,7 +73,7 @@ void test_vluxseg7ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32mf2( @@ -96,7 +96,7 @@ void test_vluxseg7ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32m1( @@ -119,7 +119,7 @@ void test_vluxseg7ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f64m1( @@ -142,7 +142,7 @@ void test_vluxseg7ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf8( @@ -165,7 +165,7 @@ void test_vluxseg7ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf4( @@ -188,7 +188,7 @@ void test_vluxseg7ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf2( @@ -211,7 +211,7 @@ void test_vluxseg7ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8m1( @@ -234,7 +234,7 @@ void test_vluxseg7ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf4( @@ -257,7 +257,7 @@ void test_vluxseg7ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf2( @@ -280,7 +280,7 @@ void test_vluxseg7ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16m1( @@ -303,7 +303,7 @@ void test_vluxseg7ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32mf2( @@ -326,7 +326,7 @@ void test_vluxseg7ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32m1( @@ -349,7 +349,7 @@ void test_vluxseg7ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i64m1( @@ -372,7 +372,7 @@ void test_vluxseg7ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf8( @@ -395,7 +395,7 @@ void test_vluxseg7ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf4( @@ -418,7 +418,7 @@ void test_vluxseg7ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf2( @@ -441,7 +441,7 @@ void test_vluxseg7ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8m1( @@ -464,7 +464,7 @@ void test_vluxseg7ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf4( @@ -487,7 +487,7 @@ void test_vluxseg7ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf2( @@ -510,7 +510,7 @@ void test_vluxseg7ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16m1( @@ -533,7 +533,7 @@ void test_vluxseg7ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32mf2( @@ -556,7 +556,7 @@ void test_vluxseg7ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32m1( @@ -579,7 +579,7 @@ void test_vluxseg7ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u64m1( @@ -602,7 +602,7 @@ void test_vluxseg7ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf4_m( @@ -625,7 +625,7 @@ void test_vluxseg7ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf2_m( @@ -648,7 +648,7 @@ void test_vluxseg7ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16m1_m( @@ -671,7 +671,7 @@ void test_vluxseg7ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32mf2_m( @@ -694,7 +694,7 @@ void test_vluxseg7ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32m1_m( @@ -717,7 +717,7 @@ void test_vluxseg7ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f64m1_m( @@ -740,7 +740,7 @@ void test_vluxseg7ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf8_m( @@ -763,7 +763,7 @@ void test_vluxseg7ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vluxseg7ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf2_m( @@ -809,7 +809,7 @@ void test_vluxseg7ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8m1_m( @@ -832,7 +832,7 @@ void test_vluxseg7ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf4_m( @@ -855,7 +855,7 @@ void test_vluxseg7ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf2_m( @@ -878,7 +878,7 @@ void test_vluxseg7ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vluxseg7ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32mf2_m( @@ -924,7 +924,7 @@ void test_vluxseg7ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32m1_m( @@ -947,7 +947,7 @@ void test_vluxseg7ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i64m1_m( @@ -970,7 +970,7 @@ void test_vluxseg7ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf8_m( @@ -993,7 +993,7 @@ void test_vluxseg7ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf4_m( @@ -1016,7 +1016,7 @@ void test_vluxseg7ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf2_m( @@ -1039,7 +1039,7 @@ void test_vluxseg7ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8m1_m( @@ -1062,7 +1062,7 @@ void test_vluxseg7ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf4_m( @@ -1085,7 +1085,7 @@ void test_vluxseg7ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf2_m( @@ -1108,7 +1108,7 @@ void test_vluxseg7ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16m1_m( @@ -1131,7 +1131,7 @@ void test_vluxseg7ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32mf2_m( @@ -1154,7 +1154,7 @@ void test_vluxseg7ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32m1_m( @@ -1177,7 +1177,7 @@ void test_vluxseg7ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u64m1_m( @@ -1200,6 +1200,6 @@ void test_vluxseg7ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei8.c index 43b859834a39ceef7bcdc63c04c5afc85e1e8af5..fa01ba5e5f86eb7e9f68ce767805c028aed0108e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg7ei8.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf2( @@ -50,7 +50,7 @@ void test_vluxseg7ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16m1( @@ -73,7 +73,7 @@ void test_vluxseg7ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32mf2( @@ -96,7 +96,7 @@ void test_vluxseg7ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32m1( @@ -119,7 +119,7 @@ void test_vluxseg7ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f64m1( @@ -142,7 +142,7 @@ void test_vluxseg7ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf8( @@ -165,7 +165,7 @@ void test_vluxseg7ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf4( @@ -188,7 +188,7 @@ void test_vluxseg7ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf2( @@ -211,7 +211,7 @@ void test_vluxseg7ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8m1( @@ -234,7 +234,7 @@ void test_vluxseg7ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf4( @@ -257,7 +257,7 @@ void test_vluxseg7ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf2( @@ -280,7 +280,7 @@ void test_vluxseg7ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16m1( @@ -303,7 +303,7 @@ void test_vluxseg7ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32mf2( @@ -326,7 +326,7 @@ void test_vluxseg7ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32m1( @@ -349,7 +349,7 @@ void test_vluxseg7ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i64m1( @@ -372,7 +372,7 @@ void test_vluxseg7ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf8( @@ -395,7 +395,7 @@ void test_vluxseg7ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf4( @@ -418,7 +418,7 @@ void test_vluxseg7ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf2( @@ -441,7 +441,7 @@ void test_vluxseg7ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8m1( @@ -464,7 +464,7 @@ void test_vluxseg7ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf4( @@ -487,7 +487,7 @@ void test_vluxseg7ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf2( @@ -510,7 +510,7 @@ void test_vluxseg7ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16m1( @@ -533,7 +533,7 @@ void test_vluxseg7ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32mf2( @@ -556,7 +556,7 @@ void test_vluxseg7ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32m1( @@ -579,7 +579,7 @@ void test_vluxseg7ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u64m1( @@ -602,7 +602,7 @@ void test_vluxseg7ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u64m1(v0, v1, v2, v3, v4, v5, v6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf4_m( @@ -625,7 +625,7 @@ void test_vluxseg7ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf2_m( @@ -648,7 +648,7 @@ void test_vluxseg7ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16m1_m( @@ -671,7 +671,7 @@ void test_vluxseg7ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32mf2_m( @@ -694,7 +694,7 @@ void test_vluxseg7ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32m1_m( @@ -717,7 +717,7 @@ void test_vluxseg7ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f64m1_m( @@ -740,7 +740,7 @@ void test_vluxseg7ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf8_m( @@ -763,7 +763,7 @@ void test_vluxseg7ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf4_m( @@ -786,7 +786,7 @@ void test_vluxseg7ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf2_m( @@ -809,7 +809,7 @@ void test_vluxseg7ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8m1_m( @@ -832,7 +832,7 @@ void test_vluxseg7ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf4_m( @@ -855,7 +855,7 @@ void test_vluxseg7ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf2_m( @@ -878,7 +878,7 @@ void test_vluxseg7ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16m1_m( @@ -901,7 +901,7 @@ void test_vluxseg7ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32mf2_m( @@ -924,7 +924,7 @@ void test_vluxseg7ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32m1_m( @@ -947,7 +947,7 @@ void test_vluxseg7ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i64m1_m( @@ -970,7 +970,7 @@ void test_vluxseg7ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf8_m( @@ -993,7 +993,7 @@ void test_vluxseg7ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf4_m( @@ -1016,7 +1016,7 @@ void test_vluxseg7ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf2_m( @@ -1039,7 +1039,7 @@ void test_vluxseg7ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8m1_m( @@ -1062,7 +1062,7 @@ void test_vluxseg7ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf4_m( @@ -1085,7 +1085,7 @@ void test_vluxseg7ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf2_m( @@ -1108,7 +1108,7 @@ void test_vluxseg7ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16m1_m( @@ -1131,7 +1131,7 @@ void test_vluxseg7ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32mf2_m( @@ -1154,7 +1154,7 @@ void test_vluxseg7ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32m1_m( @@ -1177,7 +1177,7 @@ void test_vluxseg7ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u64m1_m( @@ -1200,6 +1200,6 @@ void test_vluxseg7ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei16.c index 429514eae9cfa9fc950333decea5e964117d5d95..2a8e7ebcb38966e9eb087d0bac28faad9973bec6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei16.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf2( @@ -54,7 +54,7 @@ void test_vluxseg8ei16_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16m1( @@ -79,7 +79,7 @@ void test_vluxseg8ei16_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32mf2( @@ -104,7 +104,7 @@ void test_vluxseg8ei16_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32m1( @@ -129,7 +129,7 @@ void test_vluxseg8ei16_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f64m1( @@ -154,7 +154,7 @@ void test_vluxseg8ei16_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf8( @@ -179,7 +179,7 @@ void test_vluxseg8ei16_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf4( @@ -204,7 +204,7 @@ void test_vluxseg8ei16_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf2( @@ -229,7 +229,7 @@ void test_vluxseg8ei16_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8m1( @@ -254,7 +254,7 @@ void test_vluxseg8ei16_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf4( @@ -279,7 +279,7 @@ void test_vluxseg8ei16_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf2( @@ -304,7 +304,7 @@ void test_vluxseg8ei16_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16m1( @@ -329,7 +329,7 @@ void test_vluxseg8ei16_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32mf2( @@ -354,7 +354,7 @@ void test_vluxseg8ei16_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32m1( @@ -379,7 +379,7 @@ void test_vluxseg8ei16_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i64m1( @@ -404,7 +404,7 @@ void test_vluxseg8ei16_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf8( @@ -429,7 +429,7 @@ void test_vluxseg8ei16_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf4( @@ -454,7 +454,7 @@ void test_vluxseg8ei16_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf2( @@ -479,7 +479,7 @@ void test_vluxseg8ei16_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8m1( @@ -504,7 +504,7 @@ void test_vluxseg8ei16_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf4( @@ -529,7 +529,7 @@ void test_vluxseg8ei16_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf2( @@ -554,7 +554,7 @@ void test_vluxseg8ei16_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16m1( @@ -579,7 +579,7 @@ void test_vluxseg8ei16_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32mf2( @@ -604,7 +604,7 @@ void test_vluxseg8ei16_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32m1( @@ -629,7 +629,7 @@ void test_vluxseg8ei16_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u64m1( @@ -654,7 +654,7 @@ void test_vluxseg8ei16_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf4_m( @@ -679,7 +679,7 @@ void test_vluxseg8ei16_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf2_m( @@ -704,7 +704,7 @@ void test_vluxseg8ei16_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16m1_m( @@ -729,7 +729,7 @@ void test_vluxseg8ei16_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32mf2_m( @@ -754,7 +754,7 @@ void test_vluxseg8ei16_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32m1_m( @@ -779,7 +779,7 @@ void test_vluxseg8ei16_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f64m1_m( @@ -804,7 +804,7 @@ void test_vluxseg8ei16_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf8_m( @@ -829,7 +829,7 @@ void test_vluxseg8ei16_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf4_m( @@ -854,7 +854,7 @@ void test_vluxseg8ei16_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf2_m( @@ -879,7 +879,7 @@ void test_vluxseg8ei16_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8m1_m( @@ -904,7 +904,7 @@ void test_vluxseg8ei16_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf4_m( @@ -929,7 +929,7 @@ void test_vluxseg8ei16_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf2_m( @@ -954,7 +954,7 @@ void test_vluxseg8ei16_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16m1_m( @@ -979,7 +979,7 @@ void test_vluxseg8ei16_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32mf2_m( @@ -1004,7 +1004,7 @@ void test_vluxseg8ei16_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32m1_m( @@ -1029,7 +1029,7 @@ void test_vluxseg8ei16_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i64m1_m( @@ -1054,7 +1054,7 @@ void test_vluxseg8ei16_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf8_m( @@ -1079,7 +1079,7 @@ void test_vluxseg8ei16_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf4_m( @@ -1104,7 +1104,7 @@ void test_vluxseg8ei16_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf2_m( @@ -1129,7 +1129,7 @@ void test_vluxseg8ei16_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8m1_m( @@ -1154,7 +1154,7 @@ void test_vluxseg8ei16_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf4_m( @@ -1179,7 +1179,7 @@ void test_vluxseg8ei16_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf2_m( @@ -1204,7 +1204,7 @@ void test_vluxseg8ei16_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16m1_m( @@ -1229,7 +1229,7 @@ void test_vluxseg8ei16_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32mf2_m( @@ -1254,7 +1254,7 @@ void test_vluxseg8ei16_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32m1_m( @@ -1279,7 +1279,7 @@ void test_vluxseg8ei16_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u64m1_m( @@ -1304,6 +1304,6 @@ void test_vluxseg8ei16_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei32.c index 5a67a70ba37cec6aea9e2d50bbfe7cf49f2f9228..a087e7b52ccd99407dab7f2b92d07268754d3257 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei32.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf2( @@ -54,7 +54,7 @@ void test_vluxseg8ei32_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16m1( @@ -79,7 +79,7 @@ void test_vluxseg8ei32_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32mf2( @@ -104,7 +104,7 @@ void test_vluxseg8ei32_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32m1( @@ -129,7 +129,7 @@ void test_vluxseg8ei32_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f64m1( @@ -154,7 +154,7 @@ void test_vluxseg8ei32_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf8( @@ -179,7 +179,7 @@ void test_vluxseg8ei32_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf4( @@ -204,7 +204,7 @@ void test_vluxseg8ei32_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf2( @@ -229,7 +229,7 @@ void test_vluxseg8ei32_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8m1( @@ -254,7 +254,7 @@ void test_vluxseg8ei32_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf4( @@ -279,7 +279,7 @@ void test_vluxseg8ei32_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf2( @@ -304,7 +304,7 @@ void test_vluxseg8ei32_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16m1( @@ -329,7 +329,7 @@ void test_vluxseg8ei32_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32mf2( @@ -354,7 +354,7 @@ void test_vluxseg8ei32_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32m1( @@ -379,7 +379,7 @@ void test_vluxseg8ei32_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i64m1( @@ -404,7 +404,7 @@ void test_vluxseg8ei32_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf8( @@ -429,7 +429,7 @@ void test_vluxseg8ei32_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf4( @@ -454,7 +454,7 @@ void test_vluxseg8ei32_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf2( @@ -479,7 +479,7 @@ void test_vluxseg8ei32_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8m1( @@ -504,7 +504,7 @@ void test_vluxseg8ei32_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf4( @@ -529,7 +529,7 @@ void test_vluxseg8ei32_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf2( @@ -554,7 +554,7 @@ void test_vluxseg8ei32_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16m1( @@ -579,7 +579,7 @@ void test_vluxseg8ei32_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32mf2( @@ -604,7 +604,7 @@ void test_vluxseg8ei32_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32m1( @@ -629,7 +629,7 @@ void test_vluxseg8ei32_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u64m1( @@ -654,7 +654,7 @@ void test_vluxseg8ei32_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf4_m( @@ -679,7 +679,7 @@ void test_vluxseg8ei32_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf2_m( @@ -704,7 +704,7 @@ void test_vluxseg8ei32_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16m1_m( @@ -729,7 +729,7 @@ void test_vluxseg8ei32_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32mf2_m( @@ -754,7 +754,7 @@ void test_vluxseg8ei32_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32m1_m( @@ -779,7 +779,7 @@ void test_vluxseg8ei32_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f64m1_m( @@ -804,7 +804,7 @@ void test_vluxseg8ei32_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf8_m( @@ -829,7 +829,7 @@ void test_vluxseg8ei32_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf4_m( @@ -854,7 +854,7 @@ void test_vluxseg8ei32_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf2_m( @@ -879,7 +879,7 @@ void test_vluxseg8ei32_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8m1_m( @@ -904,7 +904,7 @@ void test_vluxseg8ei32_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf4_m( @@ -929,7 +929,7 @@ void test_vluxseg8ei32_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf2_m( @@ -954,7 +954,7 @@ void test_vluxseg8ei32_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16m1_m( @@ -979,7 +979,7 @@ void test_vluxseg8ei32_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32mf2_m( @@ -1004,7 +1004,7 @@ void test_vluxseg8ei32_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32m1_m( @@ -1029,7 +1029,7 @@ void test_vluxseg8ei32_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i64m1_m( @@ -1054,7 +1054,7 @@ void test_vluxseg8ei32_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf8_m( @@ -1079,7 +1079,7 @@ void test_vluxseg8ei32_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf4_m( @@ -1104,7 +1104,7 @@ void test_vluxseg8ei32_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf2_m( @@ -1129,7 +1129,7 @@ void test_vluxseg8ei32_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8m1_m( @@ -1154,7 +1154,7 @@ void test_vluxseg8ei32_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf4_m( @@ -1179,7 +1179,7 @@ void test_vluxseg8ei32_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf2_m( @@ -1204,7 +1204,7 @@ void test_vluxseg8ei32_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16m1_m( @@ -1229,7 +1229,7 @@ void test_vluxseg8ei32_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32mf2_m( @@ -1254,7 +1254,7 @@ void test_vluxseg8ei32_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32m1_m( @@ -1279,7 +1279,7 @@ void test_vluxseg8ei32_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u64m1_m( @@ -1304,6 +1304,6 @@ void test_vluxseg8ei32_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei64.c index e954ddc75a8017c42104266bf713f001aa36ecf7..b05e9b3c9804baccb58b783cdda72f3b76f313ca 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei64.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf2( @@ -54,7 +54,7 @@ void test_vluxseg8ei64_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16m1( @@ -79,7 +79,7 @@ void test_vluxseg8ei64_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32mf2( @@ -104,7 +104,7 @@ void test_vluxseg8ei64_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32m1( @@ -129,7 +129,7 @@ void test_vluxseg8ei64_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f64m1( @@ -154,7 +154,7 @@ void test_vluxseg8ei64_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf8( @@ -179,7 +179,7 @@ void test_vluxseg8ei64_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf4( @@ -204,7 +204,7 @@ void test_vluxseg8ei64_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf2( @@ -229,7 +229,7 @@ void test_vluxseg8ei64_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8m1( @@ -254,7 +254,7 @@ void test_vluxseg8ei64_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf4( @@ -279,7 +279,7 @@ void test_vluxseg8ei64_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf2( @@ -304,7 +304,7 @@ void test_vluxseg8ei64_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16m1( @@ -329,7 +329,7 @@ void test_vluxseg8ei64_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32mf2( @@ -354,7 +354,7 @@ void test_vluxseg8ei64_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32m1( @@ -379,7 +379,7 @@ void test_vluxseg8ei64_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i64m1( @@ -404,7 +404,7 @@ void test_vluxseg8ei64_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf8( @@ -429,7 +429,7 @@ void test_vluxseg8ei64_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf4( @@ -454,7 +454,7 @@ void test_vluxseg8ei64_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf2( @@ -479,7 +479,7 @@ void test_vluxseg8ei64_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8m1( @@ -504,7 +504,7 @@ void test_vluxseg8ei64_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf4( @@ -529,7 +529,7 @@ void test_vluxseg8ei64_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf2( @@ -554,7 +554,7 @@ void test_vluxseg8ei64_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16m1( @@ -579,7 +579,7 @@ void test_vluxseg8ei64_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32mf2( @@ -604,7 +604,7 @@ void test_vluxseg8ei64_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32m1( @@ -629,7 +629,7 @@ void test_vluxseg8ei64_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u64m1( @@ -654,7 +654,7 @@ void test_vluxseg8ei64_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf4_m( @@ -679,7 +679,7 @@ void test_vluxseg8ei64_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf2_m( @@ -704,7 +704,7 @@ void test_vluxseg8ei64_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16m1_m( @@ -729,7 +729,7 @@ void test_vluxseg8ei64_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32mf2_m( @@ -754,7 +754,7 @@ void test_vluxseg8ei64_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32m1_m( @@ -779,7 +779,7 @@ void test_vluxseg8ei64_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f64m1_m( @@ -804,7 +804,7 @@ void test_vluxseg8ei64_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf8_m( @@ -829,7 +829,7 @@ void test_vluxseg8ei64_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf4_m( @@ -854,7 +854,7 @@ void test_vluxseg8ei64_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf2_m( @@ -879,7 +879,7 @@ void test_vluxseg8ei64_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8m1_m( @@ -904,7 +904,7 @@ void test_vluxseg8ei64_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf4_m( @@ -929,7 +929,7 @@ void test_vluxseg8ei64_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf2_m( @@ -954,7 +954,7 @@ void test_vluxseg8ei64_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16m1_m( @@ -979,7 +979,7 @@ void test_vluxseg8ei64_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32mf2_m( @@ -1004,7 +1004,7 @@ void test_vluxseg8ei64_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32m1_m( @@ -1029,7 +1029,7 @@ void test_vluxseg8ei64_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i64m1_m( @@ -1054,7 +1054,7 @@ void test_vluxseg8ei64_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf8_m( @@ -1079,7 +1079,7 @@ void test_vluxseg8ei64_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf4_m( @@ -1104,7 +1104,7 @@ void test_vluxseg8ei64_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf2_m( @@ -1129,7 +1129,7 @@ void test_vluxseg8ei64_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8m1_m( @@ -1154,7 +1154,7 @@ void test_vluxseg8ei64_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf4_m( @@ -1179,7 +1179,7 @@ void test_vluxseg8ei64_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf2_m( @@ -1204,7 +1204,7 @@ void test_vluxseg8ei64_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16m1_m( @@ -1229,7 +1229,7 @@ void test_vluxseg8ei64_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32mf2_m( @@ -1254,7 +1254,7 @@ void test_vluxseg8ei64_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32m1_m( @@ -1279,7 +1279,7 @@ void test_vluxseg8ei64_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u64m1_m( @@ -1304,6 +1304,6 @@ void test_vluxseg8ei64_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei8.c index 657328030659642c38c0643b140e6b7b21ebd6f4..95ff59fa3a3d6b95cf3eab5e455eecc89b292bc7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vluxseg8ei8.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf2( @@ -54,7 +54,7 @@ void test_vluxseg8ei8_v_f16mf4(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16m1( @@ -79,7 +79,7 @@ void test_vluxseg8ei8_v_f16mf2(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32mf2( @@ -104,7 +104,7 @@ void test_vluxseg8ei8_v_f16m1(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32m1( @@ -129,7 +129,7 @@ void test_vluxseg8ei8_v_f32mf2(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f64m1( @@ -154,7 +154,7 @@ void test_vluxseg8ei8_v_f32m1(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf8( @@ -179,7 +179,7 @@ void test_vluxseg8ei8_v_f64m1(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf4( @@ -204,7 +204,7 @@ void test_vluxseg8ei8_v_i8mf8(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf2( @@ -229,7 +229,7 @@ void test_vluxseg8ei8_v_i8mf4(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8m1( @@ -254,7 +254,7 @@ void test_vluxseg8ei8_v_i8mf2(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf4( @@ -279,7 +279,7 @@ void test_vluxseg8ei8_v_i8m1(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf2( @@ -304,7 +304,7 @@ void test_vluxseg8ei8_v_i16mf4(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16m1( @@ -329,7 +329,7 @@ void test_vluxseg8ei8_v_i16mf2(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32mf2( @@ -354,7 +354,7 @@ void test_vluxseg8ei8_v_i16m1(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32m1( @@ -379,7 +379,7 @@ void test_vluxseg8ei8_v_i32mf2(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i64m1( @@ -404,7 +404,7 @@ void test_vluxseg8ei8_v_i32m1(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf8( @@ -429,7 +429,7 @@ void test_vluxseg8ei8_v_i64m1(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf8(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf4( @@ -454,7 +454,7 @@ void test_vluxseg8ei8_v_u8mf8(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf2( @@ -479,7 +479,7 @@ void test_vluxseg8ei8_v_u8mf4(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8m1( @@ -504,7 +504,7 @@ void test_vluxseg8ei8_v_u8mf2(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf4( @@ -529,7 +529,7 @@ void test_vluxseg8ei8_v_u8m1(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf4(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf2( @@ -554,7 +554,7 @@ void test_vluxseg8ei8_v_u16mf4(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16m1( @@ -579,7 +579,7 @@ void test_vluxseg8ei8_v_u16mf2(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32mf2( @@ -604,7 +604,7 @@ void test_vluxseg8ei8_v_u16m1(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32mf2(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32m1( @@ -629,7 +629,7 @@ void test_vluxseg8ei8_v_u32mf2(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u64m1( @@ -654,7 +654,7 @@ void test_vluxseg8ei8_v_u32m1(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u64m1(v0, v1, v2, v3, v4, v5, v6, v7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf4_m( @@ -679,7 +679,7 @@ void test_vluxseg8ei8_v_u64m1(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf2_m( @@ -704,7 +704,7 @@ void test_vluxseg8ei8_v_f16mf4_m(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16m1_m( @@ -729,7 +729,7 @@ void test_vluxseg8ei8_v_f16mf2_m(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32mf2_m( @@ -754,7 +754,7 @@ void test_vluxseg8ei8_v_f16m1_m(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32m1_m( @@ -779,7 +779,7 @@ void test_vluxseg8ei8_v_f32mf2_m(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f64m1_m( @@ -804,7 +804,7 @@ void test_vluxseg8ei8_v_f32m1_m(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf8_m( @@ -829,7 +829,7 @@ void test_vluxseg8ei8_v_f64m1_m(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf4_m( @@ -854,7 +854,7 @@ void test_vluxseg8ei8_v_i8mf8_m(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf2_m( @@ -879,7 +879,7 @@ void test_vluxseg8ei8_v_i8mf4_m(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8m1_m( @@ -904,7 +904,7 @@ void test_vluxseg8ei8_v_i8mf2_m(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf4_m( @@ -929,7 +929,7 @@ void test_vluxseg8ei8_v_i8m1_m(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf2_m( @@ -954,7 +954,7 @@ void test_vluxseg8ei8_v_i16mf4_m(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16m1_m( @@ -979,7 +979,7 @@ void test_vluxseg8ei8_v_i16mf2_m(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32mf2_m( @@ -1004,7 +1004,7 @@ void test_vluxseg8ei8_v_i16m1_m(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32m1_m( @@ -1029,7 +1029,7 @@ void test_vluxseg8ei8_v_i32mf2_m(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i64m1_m( @@ -1054,7 +1054,7 @@ void test_vluxseg8ei8_v_i32m1_m(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf8_m( @@ -1079,7 +1079,7 @@ void test_vluxseg8ei8_v_i64m1_m(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf8_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf4_m( @@ -1104,7 +1104,7 @@ void test_vluxseg8ei8_v_u8mf8_m(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf2_m( @@ -1129,7 +1129,7 @@ void test_vluxseg8ei8_v_u8mf4_m(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8m1_m( @@ -1154,7 +1154,7 @@ void test_vluxseg8ei8_v_u8mf2_m(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf4_m( @@ -1179,7 +1179,7 @@ void test_vluxseg8ei8_v_u8m1_m(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf4_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf2_m( @@ -1204,7 +1204,7 @@ void test_vluxseg8ei8_v_u16mf4_m(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16m1_m( @@ -1229,7 +1229,7 @@ void test_vluxseg8ei8_v_u16mf2_m(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32mf2_m( @@ -1254,7 +1254,7 @@ void test_vluxseg8ei8_v_u16m1_m(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32mf2_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32m1_m( @@ -1279,7 +1279,7 @@ void test_vluxseg8ei8_v_u32mf2_m(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u64m1_m( @@ -1304,6 +1304,6 @@ void test_vluxseg8ei8_v_u32m1_m(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u64m1_m(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u64m1_m(v0, v1, v2, v3, v4, v5, v6, v7, mask, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmacc.c index d3c704cb870153c346a7e9b2a55f43580a0fb6ee..cdfd9e14ca2208caf4c2834ce0af3059f9620911 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vv_i8mf8(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vv_i8mf8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf8( @@ -22,7 +22,7 @@ vint8mf8_t test_vmacc_vv_i8mf8(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vx_i8mf8(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vx_i8mf8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf4( @@ -31,7 +31,7 @@ vint8mf8_t test_vmacc_vx_i8mf8(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vv_i8mf4(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vv_i8mf4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf4( @@ -40,7 +40,7 @@ vint8mf4_t test_vmacc_vv_i8mf4(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vx_i8mf4(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vx_i8mf4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf2( @@ -49,7 +49,7 @@ vint8mf4_t test_vmacc_vx_i8mf4(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vv_i8mf2(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vv_i8mf2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf2( @@ -58,7 +58,7 @@ vint8mf2_t test_vmacc_vv_i8mf2(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vx_i8mf2(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vx_i8mf2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m1( @@ -67,7 +67,7 @@ vint8mf2_t test_vmacc_vx_i8mf2(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vv_i8m1(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmacc_vv_i8m1(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m1( @@ -76,7 +76,7 @@ vint8m1_t test_vmacc_vv_i8m1(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vx_i8m1(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmacc_vx_i8m1(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m2( @@ -85,7 +85,7 @@ vint8m1_t test_vmacc_vx_i8m1(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vv_i8m2(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmacc_vv_i8m2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m2( @@ -94,7 +94,7 @@ vint8m2_t test_vmacc_vv_i8m2(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vx_i8m2(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmacc_vx_i8m2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m4( @@ -103,7 +103,7 @@ vint8m2_t test_vmacc_vx_i8m2(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vv_i8m4(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmacc_vv_i8m4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m4( @@ -112,7 +112,7 @@ vint8m4_t test_vmacc_vv_i8m4(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vx_i8m4(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmacc_vx_i8m4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m8( @@ -121,7 +121,7 @@ vint8m4_t test_vmacc_vx_i8m4(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vv_i8m8(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmacc_vv_i8m8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m8( @@ -130,7 +130,7 @@ vint8m8_t test_vmacc_vv_i8m8(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vx_i8m8(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmacc_vx_i8m8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf4( @@ -139,7 +139,7 @@ vint8m8_t test_vmacc_vx_i8m8(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vv_i16mf4(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vv_i16mf4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf4( @@ -148,7 +148,7 @@ vint16mf4_t test_vmacc_vv_i16mf4(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vx_i16mf4(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vx_i16mf4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf2( @@ -157,7 +157,7 @@ vint16mf4_t test_vmacc_vx_i16mf4(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vv_i16mf2(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vv_i16mf2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf2( @@ -166,7 +166,7 @@ vint16mf2_t test_vmacc_vv_i16mf2(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vx_i16mf2(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vx_i16mf2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m1( @@ -175,7 +175,7 @@ vint16mf2_t test_vmacc_vx_i16mf2(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vv_i16m1(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmacc_vv_i16m1(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m1( @@ -184,7 +184,7 @@ vint16m1_t test_vmacc_vv_i16m1(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vx_i16m1(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmacc_vx_i16m1(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m2( @@ -193,7 +193,7 @@ vint16m1_t test_vmacc_vx_i16m1(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vv_i16m2(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmacc_vv_i16m2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m2( @@ -202,7 +202,7 @@ vint16m2_t test_vmacc_vv_i16m2(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vx_i16m2(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmacc_vx_i16m2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m4( @@ -211,7 +211,7 @@ vint16m2_t test_vmacc_vx_i16m2(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vv_i16m4(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmacc_vv_i16m4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m4( @@ -220,7 +220,7 @@ vint16m4_t test_vmacc_vv_i16m4(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vx_i16m4(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmacc_vx_i16m4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m8( @@ -229,7 +229,7 @@ vint16m4_t test_vmacc_vx_i16m4(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vv_i16m8(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmacc_vv_i16m8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m8( @@ -238,7 +238,7 @@ vint16m8_t test_vmacc_vv_i16m8(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vx_i16m8(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmacc_vx_i16m8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32mf2( @@ -247,7 +247,7 @@ vint16m8_t test_vmacc_vx_i16m8(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vv_i32mf2(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vv_i32mf2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32mf2( @@ -256,7 +256,7 @@ vint32mf2_t test_vmacc_vv_i32mf2(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vx_i32mf2(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vx_i32mf2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vmacc_vx_i32mf2(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vv_i32m1(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmacc_vv_i32m1(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m1( @@ -274,7 +274,7 @@ vint32m1_t test_vmacc_vv_i32m1(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vx_i32m1(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmacc_vx_i32m1(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vmacc_vx_i32m1(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vv_i32m2(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmacc_vv_i32m2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m2( @@ -292,7 +292,7 @@ vint32m2_t test_vmacc_vv_i32m2(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vx_i32m2(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmacc_vx_i32m2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m4( @@ -301,7 +301,7 @@ vint32m2_t test_vmacc_vx_i32m2(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vv_i32m4(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmacc_vv_i32m4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m4( @@ -310,7 +310,7 @@ vint32m4_t test_vmacc_vv_i32m4(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vx_i32m4(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmacc_vx_i32m4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m8( @@ -319,7 +319,7 @@ vint32m4_t test_vmacc_vx_i32m4(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vv_i32m8(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmacc_vv_i32m8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m8( @@ -328,7 +328,7 @@ vint32m8_t test_vmacc_vv_i32m8(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vx_i32m8(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmacc_vx_i32m8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m1( @@ -337,7 +337,7 @@ vint32m8_t test_vmacc_vx_i32m8(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vv_i64m1(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmacc_vv_i64m1(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m1( @@ -346,7 +346,7 @@ vint64m1_t test_vmacc_vv_i64m1(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vx_i64m1(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmacc_vx_i64m1(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m2( @@ -355,7 +355,7 @@ vint64m1_t test_vmacc_vx_i64m1(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vv_i64m2(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmacc_vv_i64m2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m2( @@ -364,7 +364,7 @@ vint64m2_t test_vmacc_vv_i64m2(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vx_i64m2(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmacc_vx_i64m2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m4( @@ -373,7 +373,7 @@ vint64m2_t test_vmacc_vx_i64m2(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vv_i64m4(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmacc_vv_i64m4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m4( @@ -382,7 +382,7 @@ vint64m4_t test_vmacc_vv_i64m4(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vx_i64m4(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmacc_vx_i64m4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m8( @@ -391,7 +391,7 @@ vint64m4_t test_vmacc_vx_i64m4(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vv_i64m8(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmacc_vv_i64m8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m8( @@ -400,7 +400,7 @@ vint64m8_t test_vmacc_vv_i64m8(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vx_i64m8(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmacc_vx_i64m8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf8( @@ -409,7 +409,7 @@ vint64m8_t test_vmacc_vx_i64m8(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vv_u8mf8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf8( @@ -418,7 +418,7 @@ vuint8mf8_t test_vmacc_vv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vx_u8mf8(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vx_u8mf8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf4( @@ -427,7 +427,7 @@ vuint8mf8_t test_vmacc_vx_u8mf8(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vv_u8mf4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf4( @@ -436,7 +436,7 @@ vuint8mf4_t test_vmacc_vv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vx_u8mf4(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vx_u8mf4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf2( @@ -445,7 +445,7 @@ vuint8mf4_t test_vmacc_vx_u8mf4(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vv_u8mf2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf2( @@ -454,7 +454,7 @@ vuint8mf2_t test_vmacc_vv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vx_u8mf2(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vx_u8mf2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m1( @@ -463,7 +463,7 @@ vuint8mf2_t test_vmacc_vx_u8mf2(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vv_u8m1(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vv_u8m1(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m1( @@ -472,7 +472,7 @@ vuint8m1_t test_vmacc_vv_u8m1(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vx_u8m1(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vx_u8m1(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m2( @@ -481,7 +481,7 @@ vuint8m1_t test_vmacc_vx_u8m1(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vv_u8m2(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vv_u8m2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m2( @@ -490,7 +490,7 @@ vuint8m2_t test_vmacc_vv_u8m2(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vx_u8m2(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vx_u8m2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m4( @@ -499,7 +499,7 @@ vuint8m2_t test_vmacc_vx_u8m2(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vv_u8m4(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vv_u8m4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m4( @@ -508,7 +508,7 @@ vuint8m4_t test_vmacc_vv_u8m4(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vx_u8m4(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vx_u8m4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m8( @@ -517,7 +517,7 @@ vuint8m4_t test_vmacc_vx_u8m4(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vv_u8m8(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vv_u8m8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m8( @@ -526,7 +526,7 @@ vuint8m8_t test_vmacc_vv_u8m8(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vx_u8m8(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vx_u8m8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf4( @@ -535,7 +535,7 @@ vuint8m8_t test_vmacc_vx_u8m8(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vv_u16mf4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf4( @@ -544,7 +544,7 @@ vuint16mf4_t test_vmacc_vv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vx_u16mf4(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vx_u16mf4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf2( @@ -553,7 +553,7 @@ vuint16mf4_t test_vmacc_vx_u16mf4(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vv_u16mf2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf2( @@ -562,7 +562,7 @@ vuint16mf2_t test_vmacc_vv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vx_u16mf2(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vx_u16mf2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m1( @@ -571,7 +571,7 @@ vuint16mf2_t test_vmacc_vx_u16mf2(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vv_u16m1(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vv_u16m1(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m1( @@ -580,7 +580,7 @@ vuint16m1_t test_vmacc_vv_u16m1(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vx_u16m1(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vx_u16m1(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m2( @@ -589,7 +589,7 @@ vuint16m1_t test_vmacc_vx_u16m1(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vv_u16m2(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vv_u16m2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m2( @@ -598,7 +598,7 @@ vuint16m2_t test_vmacc_vv_u16m2(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vx_u16m2(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vx_u16m2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m4( @@ -607,7 +607,7 @@ vuint16m2_t test_vmacc_vx_u16m2(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vv_u16m4(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vv_u16m4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m4( @@ -616,7 +616,7 @@ vuint16m4_t test_vmacc_vv_u16m4(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vx_u16m4(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vx_u16m4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m8( @@ -625,7 +625,7 @@ vuint16m4_t test_vmacc_vx_u16m4(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vv_u16m8(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vv_u16m8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m8( @@ -634,7 +634,7 @@ vuint16m8_t test_vmacc_vv_u16m8(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vx_u16m8(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vx_u16m8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32mf2( @@ -643,7 +643,7 @@ vuint16m8_t test_vmacc_vx_u16m8(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vv_u32mf2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32mf2( @@ -652,7 +652,7 @@ vuint32mf2_t test_vmacc_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vx_u32mf2(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vx_u32mf2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m1( @@ -661,7 +661,7 @@ vuint32mf2_t test_vmacc_vx_u32mf2(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vv_u32m1(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m1( @@ -670,7 +670,7 @@ vuint32m1_t test_vmacc_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vx_u32m1(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vx_u32m1(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m2( @@ -679,7 +679,7 @@ vuint32m1_t test_vmacc_vx_u32m1(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vv_u32m2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m2( @@ -688,7 +688,7 @@ vuint32m2_t test_vmacc_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vx_u32m2(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vx_u32m2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m4( @@ -697,7 +697,7 @@ vuint32m2_t test_vmacc_vx_u32m2(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vv_u32m4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m4( @@ -706,7 +706,7 @@ vuint32m4_t test_vmacc_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vx_u32m4(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vx_u32m4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m8( @@ -715,7 +715,7 @@ vuint32m4_t test_vmacc_vx_u32m4(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vv_u32m8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m8( @@ -724,7 +724,7 @@ vuint32m8_t test_vmacc_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vx_u32m8(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vx_u32m8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m1( @@ -733,7 +733,7 @@ vuint32m8_t test_vmacc_vx_u32m8(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vv_u64m1(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vv_u64m1(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m1( @@ -742,7 +742,7 @@ vuint64m1_t test_vmacc_vv_u64m1(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vx_u64m1(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vx_u64m1(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m2( @@ -751,7 +751,7 @@ vuint64m1_t test_vmacc_vx_u64m1(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vv_u64m2(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vv_u64m2(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m2( @@ -760,7 +760,7 @@ vuint64m2_t test_vmacc_vv_u64m2(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vx_u64m2(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vx_u64m2(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m4( @@ -769,7 +769,7 @@ vuint64m2_t test_vmacc_vx_u64m2(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vv_u64m4(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vv_u64m4(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m4( @@ -778,7 +778,7 @@ vuint64m4_t test_vmacc_vv_u64m4(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vx_u64m4(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vx_u64m4(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m8( @@ -787,7 +787,7 @@ vuint64m4_t test_vmacc_vx_u64m4(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vv_u64m8(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vv_u64m8(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m8( @@ -796,7 +796,7 @@ vuint64m8_t test_vmacc_vv_u64m8(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vx_u64m8(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vx_u64m8(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf8_m( @@ -805,7 +805,7 @@ vuint64m8_t test_vmacc_vx_u64m8(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vv_i8mf8_m(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vv_i8mf8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf8_m( @@ -814,7 +814,7 @@ vint8mf8_t test_vmacc_vv_i8mf8_m(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vx_i8mf8_m(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vx_i8mf8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf4_m( @@ -823,7 +823,7 @@ vint8mf8_t test_vmacc_vx_i8mf8_m(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vv_i8mf4_m(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vv_i8mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf4_m( @@ -832,7 +832,7 @@ vint8mf4_t test_vmacc_vv_i8mf4_m(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vx_i8mf4_m(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vx_i8mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf2_m( @@ -841,7 +841,7 @@ vint8mf4_t test_vmacc_vx_i8mf4_m(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vv_i8mf2_m(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vv_i8mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf2_m( @@ -850,7 +850,7 @@ vint8mf2_t test_vmacc_vv_i8mf2_m(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vx_i8mf2_m(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vx_i8mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m1_m( @@ -859,7 +859,7 @@ vint8mf2_t test_vmacc_vx_i8mf2_m(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vv_i8m1_m(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmacc_vv_i8m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m1_m( @@ -868,7 +868,7 @@ vint8m1_t test_vmacc_vv_i8m1_m(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vx_i8m1_m(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmacc_vx_i8m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m2_m( @@ -877,7 +877,7 @@ vint8m1_t test_vmacc_vx_i8m1_m(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vv_i8m2_m(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmacc_vv_i8m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m2_m( @@ -886,7 +886,7 @@ vint8m2_t test_vmacc_vv_i8m2_m(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vx_i8m2_m(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmacc_vx_i8m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m4_m( @@ -895,7 +895,7 @@ vint8m2_t test_vmacc_vx_i8m2_m(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vv_i8m4_m(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmacc_vv_i8m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m4_m( @@ -904,7 +904,7 @@ vint8m4_t test_vmacc_vv_i8m4_m(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vx_i8m4_m(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmacc_vx_i8m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m8_m( @@ -913,7 +913,7 @@ vint8m4_t test_vmacc_vx_i8m4_m(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vv_i8m8_m(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmacc_vv_i8m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m8_m( @@ -922,7 +922,7 @@ vint8m8_t test_vmacc_vv_i8m8_m(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vx_i8m8_m(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmacc_vx_i8m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf4_m( @@ -931,7 +931,7 @@ vint8m8_t test_vmacc_vx_i8m8_m(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vv_i16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf4_m( @@ -940,7 +940,7 @@ vint16mf4_t test_vmacc_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint16mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vx_i16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf2_m( @@ -949,7 +949,7 @@ vint16mf4_t test_vmacc_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vv_i16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf2_m( @@ -958,7 +958,7 @@ vint16mf2_t test_vmacc_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vx_i16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m1_m( @@ -967,7 +967,7 @@ vint16mf2_t test_vmacc_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmacc_vv_i16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m1_m( @@ -976,7 +976,7 @@ vint16m1_t test_vmacc_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmacc_vx_i16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m2_m( @@ -985,7 +985,7 @@ vint16m1_t test_vmacc_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmacc_vv_i16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m2_m( @@ -994,7 +994,7 @@ vint16m2_t test_vmacc_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmacc_vx_i16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m4_m( @@ -1003,7 +1003,7 @@ vint16m2_t test_vmacc_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmacc_vv_i16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m4_m( @@ -1012,7 +1012,7 @@ vint16m4_t test_vmacc_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmacc_vx_i16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m8_m( @@ -1021,7 +1021,7 @@ vint16m4_t test_vmacc_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmacc_vv_i16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m8_m( @@ -1030,7 +1030,7 @@ vint16m8_t test_vmacc_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmacc_vx_i16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32mf2_m( @@ -1039,7 +1039,7 @@ vint16m8_t test_vmacc_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vv_i32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32mf2_m( @@ -1048,7 +1048,7 @@ vint32mf2_t test_vmacc_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vx_i32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m1_m( @@ -1057,7 +1057,7 @@ vint32mf2_t test_vmacc_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmacc_vv_i32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m1_m( @@ -1066,7 +1066,7 @@ vint32m1_t test_vmacc_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmacc_vx_i32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m2_m( @@ -1075,7 +1075,7 @@ vint32m1_t test_vmacc_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmacc_vv_i32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m2_m( @@ -1084,7 +1084,7 @@ vint32m2_t test_vmacc_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmacc_vx_i32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m4_m( @@ -1093,7 +1093,7 @@ vint32m2_t test_vmacc_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmacc_vv_i32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m4_m( @@ -1102,7 +1102,7 @@ vint32m4_t test_vmacc_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmacc_vx_i32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m8_m( @@ -1111,7 +1111,7 @@ vint32m4_t test_vmacc_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmacc_vv_i32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m8_m( @@ -1120,7 +1120,7 @@ vint32m8_t test_vmacc_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmacc_vx_i32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m1_m( @@ -1129,7 +1129,7 @@ vint32m8_t test_vmacc_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmacc_vv_i64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m1_m( @@ -1138,7 +1138,7 @@ vint64m1_t test_vmacc_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmacc_vx_i64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m2_m( @@ -1147,7 +1147,7 @@ vint64m1_t test_vmacc_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmacc_vv_i64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m2_m( @@ -1156,7 +1156,7 @@ vint64m2_t test_vmacc_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmacc_vx_i64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m4_m( @@ -1165,7 +1165,7 @@ vint64m2_t test_vmacc_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmacc_vv_i64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m4_m( @@ -1174,7 +1174,7 @@ vint64m4_t test_vmacc_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmacc_vx_i64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m8_m( @@ -1183,7 +1183,7 @@ vint64m4_t test_vmacc_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmacc_vv_i64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m8_m( @@ -1192,7 +1192,7 @@ vint64m8_t test_vmacc_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmacc_vx_i64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf8_m( @@ -1201,7 +1201,7 @@ vint64m8_t test_vmacc_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vv_u8mf8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf8_m( @@ -1210,7 +1210,7 @@ vuint8mf8_t test_vmacc_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vx_u8mf8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf4_m( @@ -1219,7 +1219,7 @@ vuint8mf8_t test_vmacc_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vv_u8mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf4_m( @@ -1228,7 +1228,7 @@ vuint8mf4_t test_vmacc_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vx_u8mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf2_m( @@ -1237,7 +1237,7 @@ vuint8mf4_t test_vmacc_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vv_u8mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf2_m( @@ -1246,7 +1246,7 @@ vuint8mf2_t test_vmacc_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vx_u8mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m1_m( @@ -1255,7 +1255,7 @@ vuint8mf2_t test_vmacc_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vv_u8m1_m(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vv_u8m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m1_m( @@ -1264,7 +1264,7 @@ vuint8m1_t test_vmacc_vv_u8m1_m(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vx_u8m1_m(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vx_u8m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m2_m( @@ -1273,7 +1273,7 @@ vuint8m1_t test_vmacc_vx_u8m1_m(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vv_u8m2_m(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vv_u8m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m2_m( @@ -1282,7 +1282,7 @@ vuint8m2_t test_vmacc_vv_u8m2_m(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vx_u8m2_m(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vx_u8m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m4_m( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vmacc_vx_u8m2_m(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vv_u8m4_m(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vv_u8m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m4_m( @@ -1300,7 +1300,7 @@ vuint8m4_t test_vmacc_vv_u8m4_m(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vx_u8m4_m(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vx_u8m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m8_m( @@ -1309,7 +1309,7 @@ vuint8m4_t test_vmacc_vx_u8m4_m(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vv_u8m8_m(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vv_u8m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m8_m( @@ -1318,7 +1318,7 @@ vuint8m8_t test_vmacc_vv_u8m8_m(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vx_u8m8_m(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vx_u8m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf4_m( @@ -1327,7 +1327,7 @@ vuint8m8_t test_vmacc_vx_u8m8_m(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vv_u16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf4_m( @@ -1336,7 +1336,7 @@ vuint16mf4_t test_vmacc_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vx_u16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf2_m( @@ -1345,7 +1345,7 @@ vuint16mf4_t test_vmacc_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vv_u16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf2_m( @@ -1354,7 +1354,7 @@ vuint16mf2_t test_vmacc_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vx_u16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m1_m( @@ -1363,7 +1363,7 @@ vuint16mf2_t test_vmacc_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vv_u16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m1_m( @@ -1372,7 +1372,7 @@ vuint16m1_t test_vmacc_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vx_u16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m2_m( @@ -1381,7 +1381,7 @@ vuint16m1_t test_vmacc_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vv_u16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m2_m( @@ -1390,7 +1390,7 @@ vuint16m2_t test_vmacc_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vx_u16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m4_m( @@ -1399,7 +1399,7 @@ vuint16m2_t test_vmacc_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vv_u16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m4_m( @@ -1408,7 +1408,7 @@ vuint16m4_t test_vmacc_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vx_u16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m8_m( @@ -1417,7 +1417,7 @@ vuint16m4_t test_vmacc_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vv_u16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m8_m( @@ -1426,7 +1426,7 @@ vuint16m8_t test_vmacc_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vx_u16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32mf2_m( @@ -1435,7 +1435,7 @@ vuint16m8_t test_vmacc_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vv_u32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32mf2_m( @@ -1444,7 +1444,7 @@ vuint32mf2_t test_vmacc_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vx_u32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m1_m( @@ -1453,7 +1453,7 @@ vuint32mf2_t test_vmacc_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vv_u32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m1_m( @@ -1462,7 +1462,7 @@ vuint32m1_t test_vmacc_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vx_u32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m2_m( @@ -1471,7 +1471,7 @@ vuint32m1_t test_vmacc_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vv_u32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m2_m( @@ -1480,7 +1480,7 @@ vuint32m2_t test_vmacc_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vx_u32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m4_m( @@ -1489,7 +1489,7 @@ vuint32m2_t test_vmacc_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vv_u32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m4_m( @@ -1498,7 +1498,7 @@ vuint32m4_t test_vmacc_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vx_u32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m8_m( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vmacc_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vv_u32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m8_m( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vmacc_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vx_u32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m1_m( @@ -1525,7 +1525,7 @@ vuint32m8_t test_vmacc_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vv_u64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m1_m( @@ -1534,7 +1534,7 @@ vuint64m1_t test_vmacc_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vx_u64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m2_m( @@ -1543,7 +1543,7 @@ vuint64m1_t test_vmacc_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vv_u64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m2_m( @@ -1552,7 +1552,7 @@ vuint64m2_t test_vmacc_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vx_u64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m4_m( @@ -1561,7 +1561,7 @@ vuint64m2_t test_vmacc_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vv_u64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m4_m( @@ -1570,7 +1570,7 @@ vuint64m4_t test_vmacc_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vx_u64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m8_m( @@ -1579,7 +1579,7 @@ vuint64m4_t test_vmacc_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vv_u64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m8_m( @@ -1588,6 +1588,6 @@ vuint64m8_t test_vmacc_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vx_u64m8_m(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vx_u64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmadc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmadc.c index 1d2876673141de08fb3e75547c5f97cf9988b3b1..8ca11d11013854213f1830b8850317d45ac53f0d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmadc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmadc.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vvm_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vvm_i8mf8_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i8mf8_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i8mf8_b64( @@ -21,7 +21,7 @@ vbool64_t test_vmadc_vvm_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, vbool64_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vxm_i8mf8_b64(vint8mf8_t op1, int8_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vxm_i8mf8_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i8mf8_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i8mf8_b64( @@ -30,7 +30,7 @@ vbool64_t test_vmadc_vxm_i8mf8_b64(vint8mf8_t op1, int8_t op2, vbool64_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmadc_vv_i8mf8_b64(op1, op2, vl); + return __riscv_vmadc_vv_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i8mf8_b64( @@ -39,7 +39,7 @@ vbool64_t test_vmadc_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmadc_vx_i8mf8_b64(op1, op2, vl); + return __riscv_vmadc_vx_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i8mf4_b32( @@ -48,7 +48,7 @@ vbool64_t test_vmadc_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vvm_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vvm_i8mf4_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i8mf4_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i8mf4_b32( @@ -57,7 +57,7 @@ vbool32_t test_vmadc_vvm_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, vbool32_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vxm_i8mf4_b32(vint8mf4_t op1, int8_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vxm_i8mf4_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i8mf4_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i8mf4_b32( @@ -66,7 +66,7 @@ vbool32_t test_vmadc_vxm_i8mf4_b32(vint8mf4_t op1, int8_t op2, vbool32_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmadc_vv_i8mf4_b32(op1, op2, vl); + return __riscv_vmadc_vv_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i8mf4_b32( @@ -75,7 +75,7 @@ vbool32_t test_vmadc_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmadc_vx_i8mf4_b32(op1, op2, vl); + return __riscv_vmadc_vx_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i8mf2_b16( @@ -84,7 +84,7 @@ vbool32_t test_vmadc_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vvm_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vvm_i8mf2_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i8mf2_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i8mf2_b16( @@ -93,7 +93,7 @@ vbool16_t test_vmadc_vvm_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, vbool16_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vxm_i8mf2_b16(vint8mf2_t op1, int8_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vxm_i8mf2_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i8mf2_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i8mf2_b16( @@ -102,7 +102,7 @@ vbool16_t test_vmadc_vxm_i8mf2_b16(vint8mf2_t op1, int8_t op2, vbool16_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmadc_vv_i8mf2_b16(op1, op2, vl); + return __riscv_vmadc_vv_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i8mf2_b16( @@ -111,7 +111,7 @@ vbool16_t test_vmadc_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmadc_vx_i8mf2_b16(op1, op2, vl); + return __riscv_vmadc_vx_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i8m1_b8( @@ -120,7 +120,7 @@ vbool16_t test_vmadc_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vvm_i8m1_b8(vint8m1_t op1, vint8m1_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vvm_i8m1_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i8m1_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i8m1_b8( @@ -129,7 +129,7 @@ vbool8_t test_vmadc_vvm_i8m1_b8(vint8m1_t op1, vint8m1_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vxm_i8m1_b8(vint8m1_t op1, int8_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vxm_i8m1_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i8m1_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i8m1_b8( @@ -138,7 +138,7 @@ vbool8_t test_vmadc_vxm_i8m1_b8(vint8m1_t op1, int8_t op2, vbool8_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmadc_vv_i8m1_b8(op1, op2, vl); + return __riscv_vmadc_vv_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i8m1_b8( @@ -147,7 +147,7 @@ vbool8_t test_vmadc_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { - return vmadc_vx_i8m1_b8(op1, op2, vl); + return __riscv_vmadc_vx_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i8m2_b4( @@ -156,7 +156,7 @@ vbool8_t test_vmadc_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vvm_i8m2_b4(vint8m2_t op1, vint8m2_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vvm_i8m2_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i8m2_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i8m2_b4( @@ -165,7 +165,7 @@ vbool4_t test_vmadc_vvm_i8m2_b4(vint8m2_t op1, vint8m2_t op2, vbool4_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vxm_i8m2_b4(vint8m2_t op1, int8_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vxm_i8m2_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i8m2_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i8m2_b4( @@ -174,7 +174,7 @@ vbool4_t test_vmadc_vxm_i8m2_b4(vint8m2_t op1, int8_t op2, vbool4_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmadc_vv_i8m2_b4(op1, op2, vl); + return __riscv_vmadc_vv_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i8m2_b4( @@ -183,7 +183,7 @@ vbool4_t test_vmadc_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { - return vmadc_vx_i8m2_b4(op1, op2, vl); + return __riscv_vmadc_vx_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i8m4_b2( @@ -192,7 +192,7 @@ vbool4_t test_vmadc_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vvm_i8m4_b2(vint8m4_t op1, vint8m4_t op2, vbool2_t carryin, size_t vl) { - return vmadc_vvm_i8m4_b2(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i8m4_b2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i8m4_b2( @@ -201,7 +201,7 @@ vbool2_t test_vmadc_vvm_i8m4_b2(vint8m4_t op1, vint8m4_t op2, vbool2_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vxm_i8m4_b2(vint8m4_t op1, int8_t op2, vbool2_t carryin, size_t vl) { - return vmadc_vxm_i8m4_b2(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i8m4_b2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i8m4_b2( @@ -210,7 +210,7 @@ vbool2_t test_vmadc_vxm_i8m4_b2(vint8m4_t op1, int8_t op2, vbool2_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmadc_vv_i8m4_b2(op1, op2, vl); + return __riscv_vmadc_vv_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i8m4_b2( @@ -219,7 +219,7 @@ vbool2_t test_vmadc_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { - return vmadc_vx_i8m4_b2(op1, op2, vl); + return __riscv_vmadc_vx_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i8m8_b1( @@ -228,7 +228,7 @@ vbool2_t test_vmadc_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmadc_vvm_i8m8_b1(vint8m8_t op1, vint8m8_t op2, vbool1_t carryin, size_t vl) { - return vmadc_vvm_i8m8_b1(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i8m8_b1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i8m8_b1( @@ -237,7 +237,7 @@ vbool1_t test_vmadc_vvm_i8m8_b1(vint8m8_t op1, vint8m8_t op2, vbool1_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmadc_vxm_i8m8_b1(vint8m8_t op1, int8_t op2, vbool1_t carryin, size_t vl) { - return vmadc_vxm_i8m8_b1(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i8m8_b1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i8m8_b1( @@ -246,7 +246,7 @@ vbool1_t test_vmadc_vxm_i8m8_b1(vint8m8_t op1, int8_t op2, vbool1_t carryin, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmadc_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmadc_vv_i8m8_b1(op1, op2, vl); + return __riscv_vmadc_vv_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i8m8_b1( @@ -255,7 +255,7 @@ vbool1_t test_vmadc_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmadc_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { - return vmadc_vx_i8m8_b1(op1, op2, vl); + return __riscv_vmadc_vx_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i16mf4_b64( @@ -264,7 +264,7 @@ vbool1_t test_vmadc_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vvm_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vvm_i16mf4_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i16mf4_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i16mf4_b64( @@ -273,7 +273,7 @@ vbool64_t test_vmadc_vvm_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vxm_i16mf4_b64(vint16mf4_t op1, int16_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vxm_i16mf4_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i16mf4_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i16mf4_b64( @@ -282,7 +282,7 @@ vbool64_t test_vmadc_vxm_i16mf4_b64(vint16mf4_t op1, int16_t op2, vbool64_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmadc_vv_i16mf4_b64(op1, op2, vl); + return __riscv_vmadc_vv_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i16mf4_b64( @@ -291,7 +291,7 @@ vbool64_t test_vmadc_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmadc_vx_i16mf4_b64(op1, op2, vl); + return __riscv_vmadc_vx_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i16mf2_b32( @@ -300,7 +300,7 @@ vbool64_t test_vmadc_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vvm_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vvm_i16mf2_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i16mf2_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i16mf2_b32( @@ -309,7 +309,7 @@ vbool32_t test_vmadc_vvm_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, vbool32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vxm_i16mf2_b32(vint16mf2_t op1, int16_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vxm_i16mf2_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i16mf2_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i16mf2_b32( @@ -318,7 +318,7 @@ vbool32_t test_vmadc_vxm_i16mf2_b32(vint16mf2_t op1, int16_t op2, vbool32_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmadc_vv_i16mf2_b32(op1, op2, vl); + return __riscv_vmadc_vv_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i16mf2_b32( @@ -327,7 +327,7 @@ vbool32_t test_vmadc_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmadc_vx_i16mf2_b32(op1, op2, vl); + return __riscv_vmadc_vx_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i16m1_b16( @@ -336,7 +336,7 @@ vbool32_t test_vmadc_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vvm_i16m1_b16(vint16m1_t op1, vint16m1_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vvm_i16m1_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i16m1_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i16m1_b16( @@ -345,7 +345,7 @@ vbool16_t test_vmadc_vvm_i16m1_b16(vint16m1_t op1, vint16m1_t op2, vbool16_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vxm_i16m1_b16(vint16m1_t op1, int16_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vxm_i16m1_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i16m1_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i16m1_b16( @@ -354,7 +354,7 @@ vbool16_t test_vmadc_vxm_i16m1_b16(vint16m1_t op1, int16_t op2, vbool16_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmadc_vv_i16m1_b16(op1, op2, vl); + return __riscv_vmadc_vv_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i16m1_b16( @@ -363,7 +363,7 @@ vbool16_t test_vmadc_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { - return vmadc_vx_i16m1_b16(op1, op2, vl); + return __riscv_vmadc_vx_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i16m2_b8( @@ -372,7 +372,7 @@ vbool16_t test_vmadc_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vvm_i16m2_b8(vint16m2_t op1, vint16m2_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vvm_i16m2_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i16m2_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i16m2_b8( @@ -381,7 +381,7 @@ vbool8_t test_vmadc_vvm_i16m2_b8(vint16m2_t op1, vint16m2_t op2, vbool8_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vxm_i16m2_b8(vint16m2_t op1, int16_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vxm_i16m2_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i16m2_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i16m2_b8( @@ -390,7 +390,7 @@ vbool8_t test_vmadc_vxm_i16m2_b8(vint16m2_t op1, int16_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmadc_vv_i16m2_b8(op1, op2, vl); + return __riscv_vmadc_vv_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i16m2_b8( @@ -399,7 +399,7 @@ vbool8_t test_vmadc_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { - return vmadc_vx_i16m2_b8(op1, op2, vl); + return __riscv_vmadc_vx_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i16m4_b4( @@ -408,7 +408,7 @@ vbool8_t test_vmadc_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vvm_i16m4_b4(vint16m4_t op1, vint16m4_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vvm_i16m4_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i16m4_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i16m4_b4( @@ -417,7 +417,7 @@ vbool4_t test_vmadc_vvm_i16m4_b4(vint16m4_t op1, vint16m4_t op2, vbool4_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vxm_i16m4_b4(vint16m4_t op1, int16_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vxm_i16m4_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i16m4_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i16m4_b4( @@ -426,7 +426,7 @@ vbool4_t test_vmadc_vxm_i16m4_b4(vint16m4_t op1, int16_t op2, vbool4_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmadc_vv_i16m4_b4(op1, op2, vl); + return __riscv_vmadc_vv_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i16m4_b4( @@ -435,7 +435,7 @@ vbool4_t test_vmadc_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmadc_vx_i16m4_b4(op1, op2, vl); + return __riscv_vmadc_vx_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i16m8_b2( @@ -444,7 +444,7 @@ vbool4_t test_vmadc_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vvm_i16m8_b2(vint16m8_t op1, vint16m8_t op2, vbool2_t carryin, size_t vl) { - return vmadc_vvm_i16m8_b2(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i16m8_b2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i16m8_b2( @@ -453,7 +453,7 @@ vbool2_t test_vmadc_vvm_i16m8_b2(vint16m8_t op1, vint16m8_t op2, vbool2_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vxm_i16m8_b2(vint16m8_t op1, int16_t op2, vbool2_t carryin, size_t vl) { - return vmadc_vxm_i16m8_b2(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i16m8_b2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i16m8_b2( @@ -462,7 +462,7 @@ vbool2_t test_vmadc_vxm_i16m8_b2(vint16m8_t op1, int16_t op2, vbool2_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmadc_vv_i16m8_b2(op1, op2, vl); + return __riscv_vmadc_vv_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i16m8_b2( @@ -471,7 +471,7 @@ vbool2_t test_vmadc_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { - return vmadc_vx_i16m8_b2(op1, op2, vl); + return __riscv_vmadc_vx_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i32mf2_b64( @@ -480,7 +480,7 @@ vbool2_t test_vmadc_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vvm_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vvm_i32mf2_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i32mf2_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i32mf2_b64( @@ -489,7 +489,7 @@ vbool64_t test_vmadc_vvm_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vxm_i32mf2_b64(vint32mf2_t op1, int32_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vxm_i32mf2_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i32mf2_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i32mf2_b64( @@ -498,7 +498,7 @@ vbool64_t test_vmadc_vxm_i32mf2_b64(vint32mf2_t op1, int32_t op2, vbool64_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmadc_vv_i32mf2_b64(op1, op2, vl); + return __riscv_vmadc_vv_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i32mf2_b64( @@ -507,7 +507,7 @@ vbool64_t test_vmadc_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmadc_vx_i32mf2_b64(op1, op2, vl); + return __riscv_vmadc_vx_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i32m1_b32( @@ -516,7 +516,7 @@ vbool64_t test_vmadc_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vvm_i32m1_b32(vint32m1_t op1, vint32m1_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vvm_i32m1_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i32m1_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i32m1_b32( @@ -525,7 +525,7 @@ vbool32_t test_vmadc_vvm_i32m1_b32(vint32m1_t op1, vint32m1_t op2, vbool32_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vxm_i32m1_b32(vint32m1_t op1, int32_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vxm_i32m1_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i32m1_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i32m1_b32( @@ -534,7 +534,7 @@ vbool32_t test_vmadc_vxm_i32m1_b32(vint32m1_t op1, int32_t op2, vbool32_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmadc_vv_i32m1_b32(op1, op2, vl); + return __riscv_vmadc_vv_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i32m1_b32( @@ -543,7 +543,7 @@ vbool32_t test_vmadc_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { - return vmadc_vx_i32m1_b32(op1, op2, vl); + return __riscv_vmadc_vx_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i32m2_b16( @@ -552,7 +552,7 @@ vbool32_t test_vmadc_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vvm_i32m2_b16(vint32m2_t op1, vint32m2_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vvm_i32m2_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i32m2_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i32m2_b16( @@ -561,7 +561,7 @@ vbool16_t test_vmadc_vvm_i32m2_b16(vint32m2_t op1, vint32m2_t op2, vbool16_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vxm_i32m2_b16(vint32m2_t op1, int32_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vxm_i32m2_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i32m2_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i32m2_b16( @@ -570,7 +570,7 @@ vbool16_t test_vmadc_vxm_i32m2_b16(vint32m2_t op1, int32_t op2, vbool16_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmadc_vv_i32m2_b16(op1, op2, vl); + return __riscv_vmadc_vv_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i32m2_b16( @@ -579,7 +579,7 @@ vbool16_t test_vmadc_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { - return vmadc_vx_i32m2_b16(op1, op2, vl); + return __riscv_vmadc_vx_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i32m4_b8( @@ -588,7 +588,7 @@ vbool16_t test_vmadc_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vvm_i32m4_b8(vint32m4_t op1, vint32m4_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vvm_i32m4_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i32m4_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i32m4_b8( @@ -597,7 +597,7 @@ vbool8_t test_vmadc_vvm_i32m4_b8(vint32m4_t op1, vint32m4_t op2, vbool8_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vxm_i32m4_b8(vint32m4_t op1, int32_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vxm_i32m4_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i32m4_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i32m4_b8( @@ -606,7 +606,7 @@ vbool8_t test_vmadc_vxm_i32m4_b8(vint32m4_t op1, int32_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmadc_vv_i32m4_b8(op1, op2, vl); + return __riscv_vmadc_vv_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i32m4_b8( @@ -615,7 +615,7 @@ vbool8_t test_vmadc_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { - return vmadc_vx_i32m4_b8(op1, op2, vl); + return __riscv_vmadc_vx_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i32m8_b4( @@ -624,7 +624,7 @@ vbool8_t test_vmadc_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vvm_i32m8_b4(vint32m8_t op1, vint32m8_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vvm_i32m8_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i32m8_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i32m8_b4( @@ -633,7 +633,7 @@ vbool4_t test_vmadc_vvm_i32m8_b4(vint32m8_t op1, vint32m8_t op2, vbool4_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vxm_i32m8_b4(vint32m8_t op1, int32_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vxm_i32m8_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i32m8_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i32m8_b4( @@ -642,7 +642,7 @@ vbool4_t test_vmadc_vxm_i32m8_b4(vint32m8_t op1, int32_t op2, vbool4_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmadc_vv_i32m8_b4(op1, op2, vl); + return __riscv_vmadc_vv_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i32m8_b4( @@ -651,7 +651,7 @@ vbool4_t test_vmadc_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { - return vmadc_vx_i32m8_b4(op1, op2, vl); + return __riscv_vmadc_vx_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i64m1_b64( @@ -660,7 +660,7 @@ vbool4_t test_vmadc_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vvm_i64m1_b64(vint64m1_t op1, vint64m1_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vvm_i64m1_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i64m1_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i64m1_b64( @@ -669,7 +669,7 @@ vbool64_t test_vmadc_vvm_i64m1_b64(vint64m1_t op1, vint64m1_t op2, vbool64_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vxm_i64m1_b64(vint64m1_t op1, int64_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vxm_i64m1_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i64m1_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i64m1_b64( @@ -678,7 +678,7 @@ vbool64_t test_vmadc_vxm_i64m1_b64(vint64m1_t op1, int64_t op2, vbool64_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmadc_vv_i64m1_b64(op1, op2, vl); + return __riscv_vmadc_vv_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i64m1_b64( @@ -687,7 +687,7 @@ vbool64_t test_vmadc_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { - return vmadc_vx_i64m1_b64(op1, op2, vl); + return __riscv_vmadc_vx_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i64m2_b32( @@ -696,7 +696,7 @@ vbool64_t test_vmadc_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vvm_i64m2_b32(vint64m2_t op1, vint64m2_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vvm_i64m2_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i64m2_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i64m2_b32( @@ -705,7 +705,7 @@ vbool32_t test_vmadc_vvm_i64m2_b32(vint64m2_t op1, vint64m2_t op2, vbool32_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vxm_i64m2_b32(vint64m2_t op1, int64_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vxm_i64m2_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i64m2_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i64m2_b32( @@ -714,7 +714,7 @@ vbool32_t test_vmadc_vxm_i64m2_b32(vint64m2_t op1, int64_t op2, vbool32_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmadc_vv_i64m2_b32(op1, op2, vl); + return __riscv_vmadc_vv_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i64m2_b32( @@ -723,7 +723,7 @@ vbool32_t test_vmadc_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { - return vmadc_vx_i64m2_b32(op1, op2, vl); + return __riscv_vmadc_vx_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i64m4_b16( @@ -732,7 +732,7 @@ vbool32_t test_vmadc_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vvm_i64m4_b16(vint64m4_t op1, vint64m4_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vvm_i64m4_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i64m4_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i64m4_b16( @@ -741,7 +741,7 @@ vbool16_t test_vmadc_vvm_i64m4_b16(vint64m4_t op1, vint64m4_t op2, vbool16_t car // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vxm_i64m4_b16(vint64m4_t op1, int64_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vxm_i64m4_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i64m4_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i64m4_b16( @@ -750,7 +750,7 @@ vbool16_t test_vmadc_vxm_i64m4_b16(vint64m4_t op1, int64_t op2, vbool16_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmadc_vv_i64m4_b16(op1, op2, vl); + return __riscv_vmadc_vv_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i64m4_b16( @@ -759,7 +759,7 @@ vbool16_t test_vmadc_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { - return vmadc_vx_i64m4_b16(op1, op2, vl); + return __riscv_vmadc_vx_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_i64m8_b8( @@ -768,7 +768,7 @@ vbool16_t test_vmadc_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vvm_i64m8_b8(vint64m8_t op1, vint64m8_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vvm_i64m8_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_i64m8_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_i64m8_b8( @@ -777,7 +777,7 @@ vbool8_t test_vmadc_vvm_i64m8_b8(vint64m8_t op1, vint64m8_t op2, vbool8_t carryi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vxm_i64m8_b8(vint64m8_t op1, int64_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vxm_i64m8_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_i64m8_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_i64m8_b8( @@ -786,7 +786,7 @@ vbool8_t test_vmadc_vxm_i64m8_b8(vint64m8_t op1, int64_t op2, vbool8_t carryin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmadc_vv_i64m8_b8(op1, op2, vl); + return __riscv_vmadc_vv_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_i64m8_b8( @@ -795,7 +795,7 @@ vbool8_t test_vmadc_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmadc_vx_i64m8_b8(op1, op2, vl); + return __riscv_vmadc_vx_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u8mf8_b64( @@ -804,7 +804,7 @@ vbool8_t test_vmadc_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vvm_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vvm_u8mf8_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u8mf8_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u8mf8_b64( @@ -813,7 +813,7 @@ vbool64_t test_vmadc_vvm_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vxm_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vxm_u8mf8_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u8mf8_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u8mf8_b64( @@ -822,7 +822,7 @@ vbool64_t test_vmadc_vxm_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, vbool64_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmadc_vv_u8mf8_b64(op1, op2, vl); + return __riscv_vmadc_vv_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u8mf8_b64( @@ -831,7 +831,7 @@ vbool64_t test_vmadc_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmadc_vx_u8mf8_b64(op1, op2, vl); + return __riscv_vmadc_vx_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u8mf4_b32( @@ -840,7 +840,7 @@ vbool64_t test_vmadc_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vvm_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vvm_u8mf4_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u8mf4_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u8mf4_b32( @@ -849,7 +849,7 @@ vbool32_t test_vmadc_vvm_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vxm_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vxm_u8mf4_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u8mf4_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u8mf4_b32( @@ -858,7 +858,7 @@ vbool32_t test_vmadc_vxm_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, vbool32_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmadc_vv_u8mf4_b32(op1, op2, vl); + return __riscv_vmadc_vv_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u8mf4_b32( @@ -867,7 +867,7 @@ vbool32_t test_vmadc_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmadc_vx_u8mf4_b32(op1, op2, vl); + return __riscv_vmadc_vx_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u8mf2_b16( @@ -876,7 +876,7 @@ vbool32_t test_vmadc_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vvm_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vvm_u8mf2_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u8mf2_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u8mf2_b16( @@ -885,7 +885,7 @@ vbool16_t test_vmadc_vvm_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vxm_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vxm_u8mf2_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u8mf2_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u8mf2_b16( @@ -894,7 +894,7 @@ vbool16_t test_vmadc_vxm_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, vbool16_t carry // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmadc_vv_u8mf2_b16(op1, op2, vl); + return __riscv_vmadc_vv_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u8mf2_b16( @@ -903,7 +903,7 @@ vbool16_t test_vmadc_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmadc_vx_u8mf2_b16(op1, op2, vl); + return __riscv_vmadc_vx_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u8m1_b8( @@ -912,7 +912,7 @@ vbool16_t test_vmadc_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vvm_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vvm_u8m1_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u8m1_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u8m1_b8( @@ -921,7 +921,7 @@ vbool8_t test_vmadc_vvm_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, vbool8_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vxm_u8m1_b8(vuint8m1_t op1, uint8_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vxm_u8m1_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u8m1_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u8m1_b8( @@ -930,7 +930,7 @@ vbool8_t test_vmadc_vxm_u8m1_b8(vuint8m1_t op1, uint8_t op2, vbool8_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmadc_vv_u8m1_b8(op1, op2, vl); + return __riscv_vmadc_vv_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u8m1_b8( @@ -939,7 +939,7 @@ vbool8_t test_vmadc_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmadc_vx_u8m1_b8(op1, op2, vl); + return __riscv_vmadc_vx_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u8m2_b4( @@ -948,7 +948,7 @@ vbool8_t test_vmadc_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vvm_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vvm_u8m2_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u8m2_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u8m2_b4( @@ -957,7 +957,7 @@ vbool4_t test_vmadc_vvm_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, vbool4_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vxm_u8m2_b4(vuint8m2_t op1, uint8_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vxm_u8m2_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u8m2_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u8m2_b4( @@ -966,7 +966,7 @@ vbool4_t test_vmadc_vxm_u8m2_b4(vuint8m2_t op1, uint8_t op2, vbool4_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmadc_vv_u8m2_b4(op1, op2, vl); + return __riscv_vmadc_vv_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u8m2_b4( @@ -975,7 +975,7 @@ vbool4_t test_vmadc_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmadc_vx_u8m2_b4(op1, op2, vl); + return __riscv_vmadc_vx_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u8m4_b2( @@ -984,7 +984,7 @@ vbool4_t test_vmadc_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vvm_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, vbool2_t carryin, size_t vl) { - return vmadc_vvm_u8m4_b2(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u8m4_b2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u8m4_b2( @@ -993,7 +993,7 @@ vbool2_t test_vmadc_vvm_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, vbool2_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vxm_u8m4_b2(vuint8m4_t op1, uint8_t op2, vbool2_t carryin, size_t vl) { - return vmadc_vxm_u8m4_b2(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u8m4_b2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u8m4_b2( @@ -1002,7 +1002,7 @@ vbool2_t test_vmadc_vxm_u8m4_b2(vuint8m4_t op1, uint8_t op2, vbool2_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmadc_vv_u8m4_b2(op1, op2, vl); + return __riscv_vmadc_vv_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u8m4_b2( @@ -1011,7 +1011,7 @@ vbool2_t test_vmadc_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmadc_vx_u8m4_b2(op1, op2, vl); + return __riscv_vmadc_vx_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u8m8_b1( @@ -1020,7 +1020,7 @@ vbool2_t test_vmadc_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmadc_vvm_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, vbool1_t carryin, size_t vl) { - return vmadc_vvm_u8m8_b1(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u8m8_b1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u8m8_b1( @@ -1029,7 +1029,7 @@ vbool1_t test_vmadc_vvm_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, vbool1_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmadc_vxm_u8m8_b1(vuint8m8_t op1, uint8_t op2, vbool1_t carryin, size_t vl) { - return vmadc_vxm_u8m8_b1(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u8m8_b1(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u8m8_b1( @@ -1038,7 +1038,7 @@ vbool1_t test_vmadc_vxm_u8m8_b1(vuint8m8_t op1, uint8_t op2, vbool1_t carryin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmadc_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmadc_vv_u8m8_b1(op1, op2, vl); + return __riscv_vmadc_vv_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u8m8_b1( @@ -1047,7 +1047,7 @@ vbool1_t test_vmadc_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmadc_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmadc_vx_u8m8_b1(op1, op2, vl); + return __riscv_vmadc_vx_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u16mf4_b64( @@ -1056,7 +1056,7 @@ vbool1_t test_vmadc_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vvm_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vvm_u16mf4_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u16mf4_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u16mf4_b64( @@ -1065,7 +1065,7 @@ vbool64_t test_vmadc_vvm_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vxm_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vxm_u16mf4_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u16mf4_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u16mf4_b64( @@ -1074,7 +1074,7 @@ vbool64_t test_vmadc_vxm_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, vbool64_t ca // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmadc_vv_u16mf4_b64(op1, op2, vl); + return __riscv_vmadc_vv_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u16mf4_b64( @@ -1083,7 +1083,7 @@ vbool64_t test_vmadc_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmadc_vx_u16mf4_b64(op1, op2, vl); + return __riscv_vmadc_vx_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u16mf2_b32( @@ -1092,7 +1092,7 @@ vbool64_t test_vmadc_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vvm_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vvm_u16mf2_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u16mf2_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u16mf2_b32( @@ -1101,7 +1101,7 @@ vbool32_t test_vmadc_vvm_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vxm_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vxm_u16mf2_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u16mf2_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u16mf2_b32( @@ -1110,7 +1110,7 @@ vbool32_t test_vmadc_vxm_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, vbool32_t ca // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmadc_vv_u16mf2_b32(op1, op2, vl); + return __riscv_vmadc_vv_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u16mf2_b32( @@ -1119,7 +1119,7 @@ vbool32_t test_vmadc_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmadc_vx_u16mf2_b32(op1, op2, vl); + return __riscv_vmadc_vx_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u16m1_b16( @@ -1128,7 +1128,7 @@ vbool32_t test_vmadc_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vvm_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vvm_u16m1_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u16m1_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u16m1_b16( @@ -1137,7 +1137,7 @@ vbool16_t test_vmadc_vvm_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, vbool16_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vxm_u16m1_b16(vuint16m1_t op1, uint16_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vxm_u16m1_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u16m1_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u16m1_b16( @@ -1146,7 +1146,7 @@ vbool16_t test_vmadc_vxm_u16m1_b16(vuint16m1_t op1, uint16_t op2, vbool16_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmadc_vv_u16m1_b16(op1, op2, vl); + return __riscv_vmadc_vv_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u16m1_b16( @@ -1155,7 +1155,7 @@ vbool16_t test_vmadc_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmadc_vx_u16m1_b16(op1, op2, vl); + return __riscv_vmadc_vx_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u16m2_b8( @@ -1164,7 +1164,7 @@ vbool16_t test_vmadc_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vvm_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vvm_u16m2_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u16m2_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u16m2_b8( @@ -1173,7 +1173,7 @@ vbool8_t test_vmadc_vvm_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, vbool8_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vxm_u16m2_b8(vuint16m2_t op1, uint16_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vxm_u16m2_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u16m2_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u16m2_b8( @@ -1182,7 +1182,7 @@ vbool8_t test_vmadc_vxm_u16m2_b8(vuint16m2_t op1, uint16_t op2, vbool8_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmadc_vv_u16m2_b8(op1, op2, vl); + return __riscv_vmadc_vv_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u16m2_b8( @@ -1191,7 +1191,7 @@ vbool8_t test_vmadc_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmadc_vx_u16m2_b8(op1, op2, vl); + return __riscv_vmadc_vx_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u16m4_b4( @@ -1200,7 +1200,7 @@ vbool8_t test_vmadc_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vvm_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vvm_u16m4_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u16m4_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u16m4_b4( @@ -1209,7 +1209,7 @@ vbool4_t test_vmadc_vvm_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vxm_u16m4_b4(vuint16m4_t op1, uint16_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vxm_u16m4_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u16m4_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u16m4_b4( @@ -1218,7 +1218,7 @@ vbool4_t test_vmadc_vxm_u16m4_b4(vuint16m4_t op1, uint16_t op2, vbool4_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmadc_vv_u16m4_b4(op1, op2, vl); + return __riscv_vmadc_vv_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u16m4_b4( @@ -1227,7 +1227,7 @@ vbool4_t test_vmadc_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmadc_vx_u16m4_b4(op1, op2, vl); + return __riscv_vmadc_vx_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u16m8_b2( @@ -1236,7 +1236,7 @@ vbool4_t test_vmadc_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vvm_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, vbool2_t carryin, size_t vl) { - return vmadc_vvm_u16m8_b2(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u16m8_b2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u16m8_b2( @@ -1245,7 +1245,7 @@ vbool2_t test_vmadc_vvm_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, vbool2_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vxm_u16m8_b2(vuint16m8_t op1, uint16_t op2, vbool2_t carryin, size_t vl) { - return vmadc_vxm_u16m8_b2(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u16m8_b2(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u16m8_b2( @@ -1254,7 +1254,7 @@ vbool2_t test_vmadc_vxm_u16m8_b2(vuint16m8_t op1, uint16_t op2, vbool2_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmadc_vv_u16m8_b2(op1, op2, vl); + return __riscv_vmadc_vv_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u16m8_b2( @@ -1263,7 +1263,7 @@ vbool2_t test_vmadc_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmadc_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmadc_vx_u16m8_b2(op1, op2, vl); + return __riscv_vmadc_vx_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u32mf2_b64( @@ -1272,7 +1272,7 @@ vbool2_t test_vmadc_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vvm_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vvm_u32mf2_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u32mf2_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u32mf2_b64( @@ -1281,7 +1281,7 @@ vbool64_t test_vmadc_vvm_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vxm_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vxm_u32mf2_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u32mf2_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u32mf2_b64( @@ -1290,7 +1290,7 @@ vbool64_t test_vmadc_vxm_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, vbool64_t ca // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmadc_vv_u32mf2_b64(op1, op2, vl); + return __riscv_vmadc_vv_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u32mf2_b64( @@ -1299,7 +1299,7 @@ vbool64_t test_vmadc_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmadc_vx_u32mf2_b64(op1, op2, vl); + return __riscv_vmadc_vx_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u32m1_b32( @@ -1308,7 +1308,7 @@ vbool64_t test_vmadc_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vvm_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vvm_u32m1_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u32m1_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u32m1_b32( @@ -1317,7 +1317,7 @@ vbool32_t test_vmadc_vvm_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, vbool32_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vxm_u32m1_b32(vuint32m1_t op1, uint32_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vxm_u32m1_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u32m1_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u32m1_b32( @@ -1326,7 +1326,7 @@ vbool32_t test_vmadc_vxm_u32m1_b32(vuint32m1_t op1, uint32_t op2, vbool32_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmadc_vv_u32m1_b32(op1, op2, vl); + return __riscv_vmadc_vv_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u32m1_b32( @@ -1335,7 +1335,7 @@ vbool32_t test_vmadc_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmadc_vx_u32m1_b32(op1, op2, vl); + return __riscv_vmadc_vx_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u32m2_b16( @@ -1344,7 +1344,7 @@ vbool32_t test_vmadc_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vvm_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vvm_u32m2_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u32m2_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u32m2_b16( @@ -1353,7 +1353,7 @@ vbool16_t test_vmadc_vvm_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, vbool16_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vxm_u32m2_b16(vuint32m2_t op1, uint32_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vxm_u32m2_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u32m2_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u32m2_b16( @@ -1362,7 +1362,7 @@ vbool16_t test_vmadc_vxm_u32m2_b16(vuint32m2_t op1, uint32_t op2, vbool16_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmadc_vv_u32m2_b16(op1, op2, vl); + return __riscv_vmadc_vv_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u32m2_b16( @@ -1371,7 +1371,7 @@ vbool16_t test_vmadc_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmadc_vx_u32m2_b16(op1, op2, vl); + return __riscv_vmadc_vx_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u32m4_b8( @@ -1380,7 +1380,7 @@ vbool16_t test_vmadc_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vvm_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vvm_u32m4_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u32m4_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u32m4_b8( @@ -1389,7 +1389,7 @@ vbool8_t test_vmadc_vvm_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, vbool8_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vxm_u32m4_b8(vuint32m4_t op1, uint32_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vxm_u32m4_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u32m4_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u32m4_b8( @@ -1398,7 +1398,7 @@ vbool8_t test_vmadc_vxm_u32m4_b8(vuint32m4_t op1, uint32_t op2, vbool8_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmadc_vv_u32m4_b8(op1, op2, vl); + return __riscv_vmadc_vv_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u32m4_b8( @@ -1407,7 +1407,7 @@ vbool8_t test_vmadc_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmadc_vx_u32m4_b8(op1, op2, vl); + return __riscv_vmadc_vx_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u32m8_b4( @@ -1416,7 +1416,7 @@ vbool8_t test_vmadc_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vvm_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vvm_u32m8_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u32m8_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u32m8_b4( @@ -1425,7 +1425,7 @@ vbool4_t test_vmadc_vvm_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, vbool4_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vxm_u32m8_b4(vuint32m8_t op1, uint32_t op2, vbool4_t carryin, size_t vl) { - return vmadc_vxm_u32m8_b4(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u32m8_b4(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u32m8_b4( @@ -1434,7 +1434,7 @@ vbool4_t test_vmadc_vxm_u32m8_b4(vuint32m8_t op1, uint32_t op2, vbool4_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmadc_vv_u32m8_b4(op1, op2, vl); + return __riscv_vmadc_vv_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u32m8_b4( @@ -1443,7 +1443,7 @@ vbool4_t test_vmadc_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmadc_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmadc_vx_u32m8_b4(op1, op2, vl); + return __riscv_vmadc_vx_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u64m1_b64( @@ -1452,7 +1452,7 @@ vbool4_t test_vmadc_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vvm_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vvm_u64m1_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u64m1_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u64m1_b64( @@ -1461,7 +1461,7 @@ vbool64_t test_vmadc_vvm_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, vbool64_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vxm_u64m1_b64(vuint64m1_t op1, uint64_t op2, vbool64_t carryin, size_t vl) { - return vmadc_vxm_u64m1_b64(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u64m1_b64(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u64m1_b64( @@ -1470,7 +1470,7 @@ vbool64_t test_vmadc_vxm_u64m1_b64(vuint64m1_t op1, uint64_t op2, vbool64_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmadc_vv_u64m1_b64(op1, op2, vl); + return __riscv_vmadc_vv_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u64m1_b64( @@ -1479,7 +1479,7 @@ vbool64_t test_vmadc_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmadc_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmadc_vx_u64m1_b64(op1, op2, vl); + return __riscv_vmadc_vx_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u64m2_b32( @@ -1488,7 +1488,7 @@ vbool64_t test_vmadc_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vvm_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vvm_u64m2_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u64m2_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u64m2_b32( @@ -1497,7 +1497,7 @@ vbool32_t test_vmadc_vvm_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, vbool32_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vxm_u64m2_b32(vuint64m2_t op1, uint64_t op2, vbool32_t carryin, size_t vl) { - return vmadc_vxm_u64m2_b32(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u64m2_b32(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u64m2_b32( @@ -1506,7 +1506,7 @@ vbool32_t test_vmadc_vxm_u64m2_b32(vuint64m2_t op1, uint64_t op2, vbool32_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmadc_vv_u64m2_b32(op1, op2, vl); + return __riscv_vmadc_vv_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u64m2_b32( @@ -1515,7 +1515,7 @@ vbool32_t test_vmadc_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmadc_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmadc_vx_u64m2_b32(op1, op2, vl); + return __riscv_vmadc_vx_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u64m4_b16( @@ -1524,7 +1524,7 @@ vbool32_t test_vmadc_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vvm_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vvm_u64m4_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u64m4_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u64m4_b16( @@ -1533,7 +1533,7 @@ vbool16_t test_vmadc_vvm_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, vbool16_t c // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vxm_u64m4_b16(vuint64m4_t op1, uint64_t op2, vbool16_t carryin, size_t vl) { - return vmadc_vxm_u64m4_b16(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u64m4_b16(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u64m4_b16( @@ -1542,7 +1542,7 @@ vbool16_t test_vmadc_vxm_u64m4_b16(vuint64m4_t op1, uint64_t op2, vbool16_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmadc_vv_u64m4_b16(op1, op2, vl); + return __riscv_vmadc_vv_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u64m4_b16( @@ -1551,7 +1551,7 @@ vbool16_t test_vmadc_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmadc_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmadc_vx_u64m4_b16(op1, op2, vl); + return __riscv_vmadc_vx_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vvm_u64m8_b8( @@ -1560,7 +1560,7 @@ vbool16_t test_vmadc_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vvm_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vvm_u64m8_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vvm_u64m8_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vxm_u64m8_b8( @@ -1569,7 +1569,7 @@ vbool8_t test_vmadc_vvm_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t carr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vxm_u64m8_b8(vuint64m8_t op1, uint64_t op2, vbool8_t carryin, size_t vl) { - return vmadc_vxm_u64m8_b8(op1, op2, carryin, vl); + return __riscv_vmadc_vxm_u64m8_b8(op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vmadc_vv_u64m8_b8( @@ -1578,7 +1578,7 @@ vbool8_t test_vmadc_vxm_u64m8_b8(vuint64m8_t op1, uint64_t op2, vbool8_t carryin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmadc_vv_u64m8_b8(op1, op2, vl); + return __riscv_vmadc_vv_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmadc_vx_u64m8_b8( @@ -1587,6 +1587,6 @@ vbool8_t test_vmadc_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmadc_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmadc_vx_u64m8_b8(op1, op2, vl); + return __riscv_vmadc_vx_u64m8_b8(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmadd.c index bea91a4493bd0b9c7b6a3b92d925d23ff76b9332..3361cd52275b1d20482b44193d2c841170bbfc56 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vv_i8mf8(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vv_i8mf8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf8( @@ -22,7 +22,7 @@ vint8mf8_t test_vmadd_vv_i8mf8(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vx_i8mf8(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vx_i8mf8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf4( @@ -31,7 +31,7 @@ vint8mf8_t test_vmadd_vx_i8mf8(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vv_i8mf4(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vv_i8mf4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf4( @@ -40,7 +40,7 @@ vint8mf4_t test_vmadd_vv_i8mf4(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vx_i8mf4(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vx_i8mf4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf2( @@ -49,7 +49,7 @@ vint8mf4_t test_vmadd_vx_i8mf4(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vv_i8mf2(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vv_i8mf2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf2( @@ -58,7 +58,7 @@ vint8mf2_t test_vmadd_vv_i8mf2(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vx_i8mf2(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vx_i8mf2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m1( @@ -67,7 +67,7 @@ vint8mf2_t test_vmadd_vx_i8mf2(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vv_i8m1(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmadd_vv_i8m1(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m1( @@ -76,7 +76,7 @@ vint8m1_t test_vmadd_vv_i8m1(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vx_i8m1(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmadd_vx_i8m1(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m2( @@ -85,7 +85,7 @@ vint8m1_t test_vmadd_vx_i8m1(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vv_i8m2(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmadd_vv_i8m2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m2( @@ -94,7 +94,7 @@ vint8m2_t test_vmadd_vv_i8m2(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vx_i8m2(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmadd_vx_i8m2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m4( @@ -103,7 +103,7 @@ vint8m2_t test_vmadd_vx_i8m2(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vv_i8m4(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmadd_vv_i8m4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m4( @@ -112,7 +112,7 @@ vint8m4_t test_vmadd_vv_i8m4(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vx_i8m4(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmadd_vx_i8m4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m8( @@ -121,7 +121,7 @@ vint8m4_t test_vmadd_vx_i8m4(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vv_i8m8(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmadd_vv_i8m8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m8( @@ -130,7 +130,7 @@ vint8m8_t test_vmadd_vv_i8m8(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vx_i8m8(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmadd_vx_i8m8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf4( @@ -139,7 +139,7 @@ vint8m8_t test_vmadd_vx_i8m8(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vv_i16mf4(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vv_i16mf4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf4( @@ -148,7 +148,7 @@ vint16mf4_t test_vmadd_vv_i16mf4(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vx_i16mf4(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vx_i16mf4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf2( @@ -157,7 +157,7 @@ vint16mf4_t test_vmadd_vx_i16mf4(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vv_i16mf2(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vv_i16mf2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf2( @@ -166,7 +166,7 @@ vint16mf2_t test_vmadd_vv_i16mf2(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vx_i16mf2(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vx_i16mf2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m1( @@ -175,7 +175,7 @@ vint16mf2_t test_vmadd_vx_i16mf2(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vv_i16m1(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmadd_vv_i16m1(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m1( @@ -184,7 +184,7 @@ vint16m1_t test_vmadd_vv_i16m1(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vx_i16m1(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmadd_vx_i16m1(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m2( @@ -193,7 +193,7 @@ vint16m1_t test_vmadd_vx_i16m1(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vv_i16m2(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmadd_vv_i16m2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m2( @@ -202,7 +202,7 @@ vint16m2_t test_vmadd_vv_i16m2(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vx_i16m2(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmadd_vx_i16m2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m4( @@ -211,7 +211,7 @@ vint16m2_t test_vmadd_vx_i16m2(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vv_i16m4(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmadd_vv_i16m4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m4( @@ -220,7 +220,7 @@ vint16m4_t test_vmadd_vv_i16m4(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vx_i16m4(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmadd_vx_i16m4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m8( @@ -229,7 +229,7 @@ vint16m4_t test_vmadd_vx_i16m4(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vv_i16m8(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmadd_vv_i16m8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m8( @@ -238,7 +238,7 @@ vint16m8_t test_vmadd_vv_i16m8(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vx_i16m8(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmadd_vx_i16m8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32mf2( @@ -247,7 +247,7 @@ vint16m8_t test_vmadd_vx_i16m8(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vv_i32mf2(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vv_i32mf2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32mf2( @@ -256,7 +256,7 @@ vint32mf2_t test_vmadd_vv_i32mf2(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vx_i32mf2(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vx_i32mf2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vmadd_vx_i32mf2(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vv_i32m1(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmadd_vv_i32m1(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m1( @@ -274,7 +274,7 @@ vint32m1_t test_vmadd_vv_i32m1(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vx_i32m1(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmadd_vx_i32m1(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vmadd_vx_i32m1(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vv_i32m2(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmadd_vv_i32m2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m2( @@ -292,7 +292,7 @@ vint32m2_t test_vmadd_vv_i32m2(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vx_i32m2(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmadd_vx_i32m2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m4( @@ -301,7 +301,7 @@ vint32m2_t test_vmadd_vx_i32m2(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vv_i32m4(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmadd_vv_i32m4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m4( @@ -310,7 +310,7 @@ vint32m4_t test_vmadd_vv_i32m4(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vx_i32m4(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmadd_vx_i32m4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m8( @@ -319,7 +319,7 @@ vint32m4_t test_vmadd_vx_i32m4(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vv_i32m8(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmadd_vv_i32m8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m8( @@ -328,7 +328,7 @@ vint32m8_t test_vmadd_vv_i32m8(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vx_i32m8(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmadd_vx_i32m8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m1( @@ -337,7 +337,7 @@ vint32m8_t test_vmadd_vx_i32m8(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vv_i64m1(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmadd_vv_i64m1(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m1( @@ -346,7 +346,7 @@ vint64m1_t test_vmadd_vv_i64m1(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vx_i64m1(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmadd_vx_i64m1(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m2( @@ -355,7 +355,7 @@ vint64m1_t test_vmadd_vx_i64m1(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vv_i64m2(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmadd_vv_i64m2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m2( @@ -364,7 +364,7 @@ vint64m2_t test_vmadd_vv_i64m2(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vx_i64m2(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmadd_vx_i64m2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m4( @@ -373,7 +373,7 @@ vint64m2_t test_vmadd_vx_i64m2(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vv_i64m4(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmadd_vv_i64m4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m4( @@ -382,7 +382,7 @@ vint64m4_t test_vmadd_vv_i64m4(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vx_i64m4(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmadd_vx_i64m4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m8( @@ -391,7 +391,7 @@ vint64m4_t test_vmadd_vx_i64m4(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vv_i64m8(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmadd_vv_i64m8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m8( @@ -400,7 +400,7 @@ vint64m8_t test_vmadd_vv_i64m8(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vx_i64m8(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmadd_vx_i64m8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf8( @@ -409,7 +409,7 @@ vint64m8_t test_vmadd_vx_i64m8(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vv_u8mf8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf8( @@ -418,7 +418,7 @@ vuint8mf8_t test_vmadd_vv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vx_u8mf8(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vx_u8mf8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf4( @@ -427,7 +427,7 @@ vuint8mf8_t test_vmadd_vx_u8mf8(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vv_u8mf4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf4( @@ -436,7 +436,7 @@ vuint8mf4_t test_vmadd_vv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vx_u8mf4(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vx_u8mf4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf2( @@ -445,7 +445,7 @@ vuint8mf4_t test_vmadd_vx_u8mf4(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vv_u8mf2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf2( @@ -454,7 +454,7 @@ vuint8mf2_t test_vmadd_vv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vx_u8mf2(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vx_u8mf2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m1( @@ -463,7 +463,7 @@ vuint8mf2_t test_vmadd_vx_u8mf2(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vv_u8m1(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vv_u8m1(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m1( @@ -472,7 +472,7 @@ vuint8m1_t test_vmadd_vv_u8m1(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vx_u8m1(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vx_u8m1(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m2( @@ -481,7 +481,7 @@ vuint8m1_t test_vmadd_vx_u8m1(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vv_u8m2(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vv_u8m2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m2( @@ -490,7 +490,7 @@ vuint8m2_t test_vmadd_vv_u8m2(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vx_u8m2(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vx_u8m2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m4( @@ -499,7 +499,7 @@ vuint8m2_t test_vmadd_vx_u8m2(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vv_u8m4(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vv_u8m4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m4( @@ -508,7 +508,7 @@ vuint8m4_t test_vmadd_vv_u8m4(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vx_u8m4(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vx_u8m4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m8( @@ -517,7 +517,7 @@ vuint8m4_t test_vmadd_vx_u8m4(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vv_u8m8(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vv_u8m8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m8( @@ -526,7 +526,7 @@ vuint8m8_t test_vmadd_vv_u8m8(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vx_u8m8(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vx_u8m8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf4( @@ -535,7 +535,7 @@ vuint8m8_t test_vmadd_vx_u8m8(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vv_u16mf4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf4( @@ -544,7 +544,7 @@ vuint16mf4_t test_vmadd_vv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vx_u16mf4(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vx_u16mf4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf2( @@ -553,7 +553,7 @@ vuint16mf4_t test_vmadd_vx_u16mf4(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vv_u16mf2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf2( @@ -562,7 +562,7 @@ vuint16mf2_t test_vmadd_vv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vx_u16mf2(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vx_u16mf2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m1( @@ -571,7 +571,7 @@ vuint16mf2_t test_vmadd_vx_u16mf2(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vv_u16m1(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vv_u16m1(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m1( @@ -580,7 +580,7 @@ vuint16m1_t test_vmadd_vv_u16m1(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vx_u16m1(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vx_u16m1(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m2( @@ -589,7 +589,7 @@ vuint16m1_t test_vmadd_vx_u16m1(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vv_u16m2(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vv_u16m2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m2( @@ -598,7 +598,7 @@ vuint16m2_t test_vmadd_vv_u16m2(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vx_u16m2(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vx_u16m2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m4( @@ -607,7 +607,7 @@ vuint16m2_t test_vmadd_vx_u16m2(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vv_u16m4(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vv_u16m4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m4( @@ -616,7 +616,7 @@ vuint16m4_t test_vmadd_vv_u16m4(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vx_u16m4(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vx_u16m4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m8( @@ -625,7 +625,7 @@ vuint16m4_t test_vmadd_vx_u16m4(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vv_u16m8(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vv_u16m8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m8( @@ -634,7 +634,7 @@ vuint16m8_t test_vmadd_vv_u16m8(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vx_u16m8(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vx_u16m8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32mf2( @@ -643,7 +643,7 @@ vuint16m8_t test_vmadd_vx_u16m8(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vv_u32mf2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32mf2( @@ -652,7 +652,7 @@ vuint32mf2_t test_vmadd_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vx_u32mf2(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vx_u32mf2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m1( @@ -661,7 +661,7 @@ vuint32mf2_t test_vmadd_vx_u32mf2(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vv_u32m1(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m1( @@ -670,7 +670,7 @@ vuint32m1_t test_vmadd_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vx_u32m1(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vx_u32m1(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m2( @@ -679,7 +679,7 @@ vuint32m1_t test_vmadd_vx_u32m1(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vv_u32m2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m2( @@ -688,7 +688,7 @@ vuint32m2_t test_vmadd_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vx_u32m2(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vx_u32m2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m4( @@ -697,7 +697,7 @@ vuint32m2_t test_vmadd_vx_u32m2(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vv_u32m4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m4( @@ -706,7 +706,7 @@ vuint32m4_t test_vmadd_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vx_u32m4(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vx_u32m4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m8( @@ -715,7 +715,7 @@ vuint32m4_t test_vmadd_vx_u32m4(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vv_u32m8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m8( @@ -724,7 +724,7 @@ vuint32m8_t test_vmadd_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vx_u32m8(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vx_u32m8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m1( @@ -733,7 +733,7 @@ vuint32m8_t test_vmadd_vx_u32m8(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vv_u64m1(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vv_u64m1(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m1( @@ -742,7 +742,7 @@ vuint64m1_t test_vmadd_vv_u64m1(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vx_u64m1(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vx_u64m1(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m2( @@ -751,7 +751,7 @@ vuint64m1_t test_vmadd_vx_u64m1(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vv_u64m2(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vv_u64m2(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m2( @@ -760,7 +760,7 @@ vuint64m2_t test_vmadd_vv_u64m2(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vx_u64m2(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vx_u64m2(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m4( @@ -769,7 +769,7 @@ vuint64m2_t test_vmadd_vx_u64m2(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vv_u64m4(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vv_u64m4(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m4( @@ -778,7 +778,7 @@ vuint64m4_t test_vmadd_vv_u64m4(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vx_u64m4(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vx_u64m4(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m8( @@ -787,7 +787,7 @@ vuint64m4_t test_vmadd_vx_u64m4(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vv_u64m8(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vv_u64m8(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m8( @@ -796,7 +796,7 @@ vuint64m8_t test_vmadd_vv_u64m8(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vx_u64m8(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vx_u64m8(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf8_m( @@ -805,7 +805,7 @@ vuint64m8_t test_vmadd_vx_u64m8(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vv_i8mf8_m(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vv_i8mf8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf8_m( @@ -814,7 +814,7 @@ vint8mf8_t test_vmadd_vv_i8mf8_m(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vx_i8mf8_m(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vx_i8mf8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf4_m( @@ -823,7 +823,7 @@ vint8mf8_t test_vmadd_vx_i8mf8_m(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vv_i8mf4_m(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vv_i8mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf4_m( @@ -832,7 +832,7 @@ vint8mf4_t test_vmadd_vv_i8mf4_m(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vx_i8mf4_m(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vx_i8mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf2_m( @@ -841,7 +841,7 @@ vint8mf4_t test_vmadd_vx_i8mf4_m(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vv_i8mf2_m(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vv_i8mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf2_m( @@ -850,7 +850,7 @@ vint8mf2_t test_vmadd_vv_i8mf2_m(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vx_i8mf2_m(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vx_i8mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m1_m( @@ -859,7 +859,7 @@ vint8mf2_t test_vmadd_vx_i8mf2_m(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vv_i8m1_m(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmadd_vv_i8m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m1_m( @@ -868,7 +868,7 @@ vint8m1_t test_vmadd_vv_i8m1_m(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vx_i8m1_m(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmadd_vx_i8m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m2_m( @@ -877,7 +877,7 @@ vint8m1_t test_vmadd_vx_i8m1_m(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vv_i8m2_m(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmadd_vv_i8m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m2_m( @@ -886,7 +886,7 @@ vint8m2_t test_vmadd_vv_i8m2_m(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vx_i8m2_m(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmadd_vx_i8m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m4_m( @@ -895,7 +895,7 @@ vint8m2_t test_vmadd_vx_i8m2_m(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vv_i8m4_m(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmadd_vv_i8m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m4_m( @@ -904,7 +904,7 @@ vint8m4_t test_vmadd_vv_i8m4_m(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vx_i8m4_m(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmadd_vx_i8m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m8_m( @@ -913,7 +913,7 @@ vint8m4_t test_vmadd_vx_i8m4_m(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vv_i8m8_m(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmadd_vv_i8m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m8_m( @@ -922,7 +922,7 @@ vint8m8_t test_vmadd_vv_i8m8_m(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vx_i8m8_m(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmadd_vx_i8m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf4_m( @@ -931,7 +931,7 @@ vint8m8_t test_vmadd_vx_i8m8_m(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vv_i16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf4_m( @@ -940,7 +940,7 @@ vint16mf4_t test_vmadd_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint16mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vx_i16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf2_m( @@ -949,7 +949,7 @@ vint16mf4_t test_vmadd_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vv_i16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf2_m( @@ -958,7 +958,7 @@ vint16mf2_t test_vmadd_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vx_i16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m1_m( @@ -967,7 +967,7 @@ vint16mf2_t test_vmadd_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmadd_vv_i16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m1_m( @@ -976,7 +976,7 @@ vint16m1_t test_vmadd_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmadd_vx_i16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m2_m( @@ -985,7 +985,7 @@ vint16m1_t test_vmadd_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmadd_vv_i16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m2_m( @@ -994,7 +994,7 @@ vint16m2_t test_vmadd_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmadd_vx_i16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m4_m( @@ -1003,7 +1003,7 @@ vint16m2_t test_vmadd_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmadd_vv_i16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m4_m( @@ -1012,7 +1012,7 @@ vint16m4_t test_vmadd_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmadd_vx_i16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m8_m( @@ -1021,7 +1021,7 @@ vint16m4_t test_vmadd_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmadd_vv_i16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m8_m( @@ -1030,7 +1030,7 @@ vint16m8_t test_vmadd_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmadd_vx_i16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32mf2_m( @@ -1039,7 +1039,7 @@ vint16m8_t test_vmadd_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vv_i32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32mf2_m( @@ -1048,7 +1048,7 @@ vint32mf2_t test_vmadd_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vx_i32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m1_m( @@ -1057,7 +1057,7 @@ vint32mf2_t test_vmadd_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmadd_vv_i32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m1_m( @@ -1066,7 +1066,7 @@ vint32m1_t test_vmadd_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmadd_vx_i32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m2_m( @@ -1075,7 +1075,7 @@ vint32m1_t test_vmadd_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmadd_vv_i32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m2_m( @@ -1084,7 +1084,7 @@ vint32m2_t test_vmadd_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmadd_vx_i32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m4_m( @@ -1093,7 +1093,7 @@ vint32m2_t test_vmadd_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmadd_vv_i32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m4_m( @@ -1102,7 +1102,7 @@ vint32m4_t test_vmadd_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmadd_vx_i32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m8_m( @@ -1111,7 +1111,7 @@ vint32m4_t test_vmadd_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmadd_vv_i32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m8_m( @@ -1120,7 +1120,7 @@ vint32m8_t test_vmadd_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmadd_vx_i32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m1_m( @@ -1129,7 +1129,7 @@ vint32m8_t test_vmadd_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmadd_vv_i64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m1_m( @@ -1138,7 +1138,7 @@ vint64m1_t test_vmadd_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmadd_vx_i64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m2_m( @@ -1147,7 +1147,7 @@ vint64m1_t test_vmadd_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmadd_vv_i64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m2_m( @@ -1156,7 +1156,7 @@ vint64m2_t test_vmadd_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmadd_vx_i64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m4_m( @@ -1165,7 +1165,7 @@ vint64m2_t test_vmadd_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmadd_vv_i64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m4_m( @@ -1174,7 +1174,7 @@ vint64m4_t test_vmadd_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmadd_vx_i64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m8_m( @@ -1183,7 +1183,7 @@ vint64m4_t test_vmadd_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmadd_vv_i64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m8_m( @@ -1192,7 +1192,7 @@ vint64m8_t test_vmadd_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmadd_vx_i64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf8_m( @@ -1201,7 +1201,7 @@ vint64m8_t test_vmadd_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vv_u8mf8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf8_m( @@ -1210,7 +1210,7 @@ vuint8mf8_t test_vmadd_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vx_u8mf8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf4_m( @@ -1219,7 +1219,7 @@ vuint8mf8_t test_vmadd_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vv_u8mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf4_m( @@ -1228,7 +1228,7 @@ vuint8mf4_t test_vmadd_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vx_u8mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf2_m( @@ -1237,7 +1237,7 @@ vuint8mf4_t test_vmadd_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vv_u8mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf2_m( @@ -1246,7 +1246,7 @@ vuint8mf2_t test_vmadd_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vx_u8mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m1_m( @@ -1255,7 +1255,7 @@ vuint8mf2_t test_vmadd_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vv_u8m1_m(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vv_u8m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m1_m( @@ -1264,7 +1264,7 @@ vuint8m1_t test_vmadd_vv_u8m1_m(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vx_u8m1_m(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vx_u8m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m2_m( @@ -1273,7 +1273,7 @@ vuint8m1_t test_vmadd_vx_u8m1_m(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vv_u8m2_m(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vv_u8m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m2_m( @@ -1282,7 +1282,7 @@ vuint8m2_t test_vmadd_vv_u8m2_m(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vx_u8m2_m(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vx_u8m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m4_m( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vmadd_vx_u8m2_m(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vv_u8m4_m(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vv_u8m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m4_m( @@ -1300,7 +1300,7 @@ vuint8m4_t test_vmadd_vv_u8m4_m(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vx_u8m4_m(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vx_u8m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m8_m( @@ -1309,7 +1309,7 @@ vuint8m4_t test_vmadd_vx_u8m4_m(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vv_u8m8_m(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vv_u8m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m8_m( @@ -1318,7 +1318,7 @@ vuint8m8_t test_vmadd_vv_u8m8_m(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vx_u8m8_m(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vx_u8m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf4_m( @@ -1327,7 +1327,7 @@ vuint8m8_t test_vmadd_vx_u8m8_m(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vv_u16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf4_m( @@ -1336,7 +1336,7 @@ vuint16mf4_t test_vmadd_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vx_u16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf2_m( @@ -1345,7 +1345,7 @@ vuint16mf4_t test_vmadd_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vv_u16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf2_m( @@ -1354,7 +1354,7 @@ vuint16mf2_t test_vmadd_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vx_u16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m1_m( @@ -1363,7 +1363,7 @@ vuint16mf2_t test_vmadd_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vv_u16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m1_m( @@ -1372,7 +1372,7 @@ vuint16m1_t test_vmadd_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vx_u16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m2_m( @@ -1381,7 +1381,7 @@ vuint16m1_t test_vmadd_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vv_u16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m2_m( @@ -1390,7 +1390,7 @@ vuint16m2_t test_vmadd_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vx_u16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m4_m( @@ -1399,7 +1399,7 @@ vuint16m2_t test_vmadd_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vv_u16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m4_m( @@ -1408,7 +1408,7 @@ vuint16m4_t test_vmadd_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vx_u16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m8_m( @@ -1417,7 +1417,7 @@ vuint16m4_t test_vmadd_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vv_u16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m8_m( @@ -1426,7 +1426,7 @@ vuint16m8_t test_vmadd_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vx_u16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32mf2_m( @@ -1435,7 +1435,7 @@ vuint16m8_t test_vmadd_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vv_u32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32mf2_m( @@ -1444,7 +1444,7 @@ vuint32mf2_t test_vmadd_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vx_u32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m1_m( @@ -1453,7 +1453,7 @@ vuint32mf2_t test_vmadd_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vv_u32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m1_m( @@ -1462,7 +1462,7 @@ vuint32m1_t test_vmadd_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vx_u32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m2_m( @@ -1471,7 +1471,7 @@ vuint32m1_t test_vmadd_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vv_u32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m2_m( @@ -1480,7 +1480,7 @@ vuint32m2_t test_vmadd_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vx_u32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m4_m( @@ -1489,7 +1489,7 @@ vuint32m2_t test_vmadd_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vv_u32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m4_m( @@ -1498,7 +1498,7 @@ vuint32m4_t test_vmadd_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vx_u32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m8_m( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vmadd_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vv_u32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m8_m( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vmadd_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vx_u32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m1_m( @@ -1525,7 +1525,7 @@ vuint32m8_t test_vmadd_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vv_u64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m1_m( @@ -1534,7 +1534,7 @@ vuint64m1_t test_vmadd_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vx_u64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m2_m( @@ -1543,7 +1543,7 @@ vuint64m1_t test_vmadd_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vv_u64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m2_m( @@ -1552,7 +1552,7 @@ vuint64m2_t test_vmadd_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vx_u64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m4_m( @@ -1561,7 +1561,7 @@ vuint64m2_t test_vmadd_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vv_u64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m4_m( @@ -1570,7 +1570,7 @@ vuint64m4_t test_vmadd_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vx_u64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m8_m( @@ -1579,7 +1579,7 @@ vuint64m4_t test_vmadd_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vv_u64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m8_m( @@ -1588,6 +1588,6 @@ vuint64m8_t test_vmadd_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vx_u64m8_m(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vx_u64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmand.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmand.c index 6dbb5970eb56bb845b5664543f8d55945756b885..01d43374038a3b26d5880686cfe4a73656c7d2a8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmand.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmand.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmand_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { - return vmand_mm_b1(op1, op2, vl); + return __riscv_vmand_mm_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmand_mm_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmand_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmand_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { - return vmand_mm_b2(op1, op2, vl); + return __riscv_vmand_mm_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmand_mm_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmand_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmand_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { - return vmand_mm_b4(op1, op2, vl); + return __riscv_vmand_mm_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmand_mm_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmand_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmand_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { - return vmand_mm_b8(op1, op2, vl); + return __riscv_vmand_mm_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmand_mm_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmand_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmand_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { - return vmand_mm_b16(op1, op2, vl); + return __riscv_vmand_mm_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmand_mm_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmand_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmand_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { - return vmand_mm_b32(op1, op2, vl); + return __riscv_vmand_mm_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmand_mm_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmand_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmand_mm_b64(vbool64_t op1, vbool64_t op2, size_t vl) { - return vmand_mm_b64(op1, op2, vl); + return __riscv_vmand_mm_b64(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmandn.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmandn.c index 7146f424e30ec790ab6f13c44d3ed5838094528f..90b316c260e431c11756120af3e56bca29f0b3f0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmandn.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmandn.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmandn_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { - return vmandn_mm_b1(op1, op2, vl); + return __riscv_vmandn_mm_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmandn_mm_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmandn_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmandn_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { - return vmandn_mm_b2(op1, op2, vl); + return __riscv_vmandn_mm_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmandn_mm_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmandn_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmandn_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { - return vmandn_mm_b4(op1, op2, vl); + return __riscv_vmandn_mm_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmandn_mm_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmandn_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmandn_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { - return vmandn_mm_b8(op1, op2, vl); + return __riscv_vmandn_mm_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmandn_mm_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmandn_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmandn_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { - return vmandn_mm_b16(op1, op2, vl); + return __riscv_vmandn_mm_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmandn_mm_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmandn_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmandn_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { - return vmandn_mm_b32(op1, op2, vl); + return __riscv_vmandn_mm_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmandn_mm_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmandn_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmandn_mm_b64(vbool64_t op1, vbool64_t op2, size_t vl) { - return vmandn_mm_b64(op1, op2, vl); + return __riscv_vmandn_mm_b64(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmax.c index 248daaf8dcae23bd41c4b5cad64a22fa83d40501..457835507bfeae380c41f66d78761d258f9203cc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmax.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmax.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmax_vv_i8mf8(op1, op2, vl); + return __riscv_vmax_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vmax_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf8(op1, op2, vl); + return __riscv_vmax_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vmax_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmax_vv_i8mf4(op1, op2, vl); + return __riscv_vmax_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vmax_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf4(op1, op2, vl); + return __riscv_vmax_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vmax_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmax_vv_i8mf2(op1, op2, vl); + return __riscv_vmax_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vmax_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf2(op1, op2, vl); + return __riscv_vmax_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vmax_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmax_vv_i8m1(op1, op2, vl); + return __riscv_vmax_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vmax_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m1(op1, op2, vl); + return __riscv_vmax_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vmax_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmax_vv_i8m2(op1, op2, vl); + return __riscv_vmax_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vmax_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m2(op1, op2, vl); + return __riscv_vmax_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vmax_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmax_vv_i8m4(op1, op2, vl); + return __riscv_vmax_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vmax_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m4(op1, op2, vl); + return __riscv_vmax_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vmax_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmax_vv_i8m8(op1, op2, vl); + return __riscv_vmax_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vmax_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m8(op1, op2, vl); + return __riscv_vmax_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vmax_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmax_vv_i16mf4(op1, op2, vl); + return __riscv_vmax_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vmax_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf4(op1, op2, vl); + return __riscv_vmax_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vmax_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmax_vv_i16mf2(op1, op2, vl); + return __riscv_vmax_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vmax_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf2(op1, op2, vl); + return __riscv_vmax_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vmax_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmax_vv_i16m1(op1, op2, vl); + return __riscv_vmax_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vmax_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m1(op1, op2, vl); + return __riscv_vmax_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vmax_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmax_vv_i16m2(op1, op2, vl); + return __riscv_vmax_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vmax_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m2(op1, op2, vl); + return __riscv_vmax_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vmax_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmax_vv_i16m4(op1, op2, vl); + return __riscv_vmax_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vmax_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m4(op1, op2, vl); + return __riscv_vmax_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vmax_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmax_vv_i16m8(op1, op2, vl); + return __riscv_vmax_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vmax_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m8(op1, op2, vl); + return __riscv_vmax_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vmax_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmax_vv_i32mf2(op1, op2, vl); + return __riscv_vmax_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vmax_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32mf2(op1, op2, vl); + return __riscv_vmax_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vmax_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmax_vv_i32m1(op1, op2, vl); + return __riscv_vmax_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vmax_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m1(op1, op2, vl); + return __riscv_vmax_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vmax_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmax_vv_i32m2(op1, op2, vl); + return __riscv_vmax_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vmax_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m2(op1, op2, vl); + return __riscv_vmax_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vmax_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmax_vv_i32m4(op1, op2, vl); + return __riscv_vmax_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vmax_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m4(op1, op2, vl); + return __riscv_vmax_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vmax_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmax_vv_i32m8(op1, op2, vl); + return __riscv_vmax_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vmax_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m8(op1, op2, vl); + return __riscv_vmax_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vmax_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmax_vv_i64m1(op1, op2, vl); + return __riscv_vmax_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vmax_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m1(op1, op2, vl); + return __riscv_vmax_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vmax_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmax_vv_i64m2(op1, op2, vl); + return __riscv_vmax_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vmax_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m2(op1, op2, vl); + return __riscv_vmax_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vmax_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmax_vv_i64m4(op1, op2, vl); + return __riscv_vmax_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vmax_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m4(op1, op2, vl); + return __riscv_vmax_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vmax_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmax_vv_i64m8(op1, op2, vl); + return __riscv_vmax_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vmax_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m8(op1, op2, vl); + return __riscv_vmax_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vmax_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmax_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vmax_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vmax_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmax_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vmax_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vmax_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmax_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vmax_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vmax_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmax_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vmax_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vmax_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmax_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vmax_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vmax_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmax_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vmax_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vmax_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmax_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vmax_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vmax_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmax_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vmax_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vmax_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmax_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vmax_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vmax_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmax_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vmax_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vmax_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmax_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vmax_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vmax_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmax_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vmax_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vmax_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmax_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vmax_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vmax_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmax_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vmax_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vmax_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmax_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vmax_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vmax_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmax_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vmax_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vmax_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmax_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vmax_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vmax_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmax_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vmax_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vmax_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmax_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vmax_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vmax_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmax_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vmax_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vmax_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmax_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vmax_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vmax_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmax_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vmax_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vmax_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vmax_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmaxu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmaxu.c index 7eea8a6e25466c01cf07218cd8e0d45c7cbcbb1e..0508f79fd36c063fefdfbd233338476770d82706 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmaxu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmaxu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmaxu_vv_u8mf8(op1, op2, vl); + return __riscv_vmaxu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vmaxu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf8(op1, op2, vl); + return __riscv_vmaxu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vmaxu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmaxu_vv_u8mf4(op1, op2, vl); + return __riscv_vmaxu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vmaxu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf4(op1, op2, vl); + return __riscv_vmaxu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vmaxu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmaxu_vv_u8mf2(op1, op2, vl); + return __riscv_vmaxu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vmaxu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf2(op1, op2, vl); + return __riscv_vmaxu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vmaxu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmaxu_vv_u8m1(op1, op2, vl); + return __riscv_vmaxu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vmaxu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m1(op1, op2, vl); + return __riscv_vmaxu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vmaxu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmaxu_vv_u8m2(op1, op2, vl); + return __riscv_vmaxu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vmaxu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m2(op1, op2, vl); + return __riscv_vmaxu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vmaxu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmaxu_vv_u8m4(op1, op2, vl); + return __riscv_vmaxu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vmaxu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m4(op1, op2, vl); + return __riscv_vmaxu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vmaxu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmaxu_vv_u8m8(op1, op2, vl); + return __riscv_vmaxu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vmaxu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m8(op1, op2, vl); + return __riscv_vmaxu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vmaxu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmaxu_vv_u16mf4(op1, op2, vl); + return __riscv_vmaxu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vmaxu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf4(op1, op2, vl); + return __riscv_vmaxu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vmaxu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmaxu_vv_u16mf2(op1, op2, vl); + return __riscv_vmaxu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vmaxu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf2(op1, op2, vl); + return __riscv_vmaxu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vmaxu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmaxu_vv_u16m1(op1, op2, vl); + return __riscv_vmaxu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vmaxu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m1(op1, op2, vl); + return __riscv_vmaxu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vmaxu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmaxu_vv_u16m2(op1, op2, vl); + return __riscv_vmaxu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vmaxu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m2(op1, op2, vl); + return __riscv_vmaxu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vmaxu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmaxu_vv_u16m4(op1, op2, vl); + return __riscv_vmaxu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vmaxu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m4(op1, op2, vl); + return __riscv_vmaxu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vmaxu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmaxu_vv_u16m8(op1, op2, vl); + return __riscv_vmaxu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vmaxu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m8(op1, op2, vl); + return __riscv_vmaxu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vmaxu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmaxu_vv_u32mf2(op1, op2, vl); + return __riscv_vmaxu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vmaxu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32mf2(op1, op2, vl); + return __riscv_vmaxu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vmaxu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmaxu_vv_u32m1(op1, op2, vl); + return __riscv_vmaxu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vmaxu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m1(op1, op2, vl); + return __riscv_vmaxu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vmaxu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmaxu_vv_u32m2(op1, op2, vl); + return __riscv_vmaxu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vmaxu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m2(op1, op2, vl); + return __riscv_vmaxu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vmaxu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmaxu_vv_u32m4(op1, op2, vl); + return __riscv_vmaxu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vmaxu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m4(op1, op2, vl); + return __riscv_vmaxu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vmaxu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmaxu_vv_u32m8(op1, op2, vl); + return __riscv_vmaxu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vmaxu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m8(op1, op2, vl); + return __riscv_vmaxu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vmaxu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmaxu_vv_u64m1(op1, op2, vl); + return __riscv_vmaxu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vmaxu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m1(op1, op2, vl); + return __riscv_vmaxu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vmaxu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmaxu_vv_u64m2(op1, op2, vl); + return __riscv_vmaxu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vmaxu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m2(op1, op2, vl); + return __riscv_vmaxu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vmaxu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmaxu_vv_u64m4(op1, op2, vl); + return __riscv_vmaxu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vmaxu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m4(op1, op2, vl); + return __riscv_vmaxu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vmaxu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmaxu_vv_u64m8(op1, op2, vl); + return __riscv_vmaxu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vmaxu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m8(op1, op2, vl); + return __riscv_vmaxu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vmaxu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmaxu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vmaxu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vmaxu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmaxu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vmaxu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vmaxu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmaxu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vmaxu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vmaxu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmaxu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vmaxu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vmaxu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmaxu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vmaxu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vmaxu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmaxu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vmaxu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vmaxu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmaxu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vmaxu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vmaxu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmaxu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vmaxu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vmaxu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmaxu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vmaxu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vmaxu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmaxu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vmaxu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vmaxu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmaxu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vmaxu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vmaxu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmaxu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vmaxu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vmaxu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmaxu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vmaxu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vmaxu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmaxu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vmaxu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vmaxu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmaxu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vmaxu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vmaxu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmaxu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vmaxu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vmaxu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmaxu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vmaxu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vmaxu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmaxu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vmaxu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vmaxu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmaxu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vmaxu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vmaxu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmaxu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vmaxu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vmaxu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmaxu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vmaxu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vmaxu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmaxu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vmaxu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vmaxu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmclr.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmclr.c index 0252c1c79eedd020914bef8c133dbd5ecb92c9c2..70a6a06c5303d2c947f6c9d64638728bf9462b32 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmclr.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmclr.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmclr_m_b1(size_t vl) { - return vmclr_m_b1(vl); + return __riscv_vmclr_m_b1(vl); } // CHECK-RV64-LABEL: @test_vmclr_m_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmclr_m_b1(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmclr_m_b2(size_t vl) { - return vmclr_m_b2(vl); + return __riscv_vmclr_m_b2(vl); } // CHECK-RV64-LABEL: @test_vmclr_m_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmclr_m_b2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmclr_m_b4(size_t vl) { - return vmclr_m_b4(vl); + return __riscv_vmclr_m_b4(vl); } // CHECK-RV64-LABEL: @test_vmclr_m_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmclr_m_b4(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmclr_m_b8(size_t vl) { - return vmclr_m_b8(vl); + return __riscv_vmclr_m_b8(vl); } // CHECK-RV64-LABEL: @test_vmclr_m_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmclr_m_b8(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmclr_m_b16(size_t vl) { - return vmclr_m_b16(vl); + return __riscv_vmclr_m_b16(vl); } // CHECK-RV64-LABEL: @test_vmclr_m_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmclr_m_b16(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmclr_m_b32(size_t vl) { - return vmclr_m_b32(vl); + return __riscv_vmclr_m_b32(vl); } // CHECK-RV64-LABEL: @test_vmclr_m_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmclr_m_b32(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmclr_m_b64(size_t vl) { - return vmclr_m_b64(vl); + return __riscv_vmclr_m_b64(vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmerge.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmerge.c index 6ca7cd64940115116fba2be7b5b3f5f3a7c5414d..07d9e82cdb0f4738889b82af405777684ff2a36a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmerge.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmerge.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmerge_vvm_i8mf8(vint8mf8_t op1, vint8mf8_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_i8mf8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8mf8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8mf8( @@ -22,7 +22,7 @@ vint8mf8_t test_vmerge_vvm_i8mf8(vint8mf8_t op1, vint8mf8_t op2, vbool64_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmerge_vxm_i8mf8(vint8mf8_t op1, int8_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_i8mf8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8mf8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8mf4( @@ -31,7 +31,7 @@ vint8mf8_t test_vmerge_vxm_i8mf8(vint8mf8_t op1, int8_t op2, vbool64_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmerge_vvm_i8mf4(vint8mf4_t op1, vint8mf4_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_i8mf4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8mf4( @@ -40,7 +40,7 @@ vint8mf4_t test_vmerge_vvm_i8mf4(vint8mf4_t op1, vint8mf4_t op2, vbool32_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmerge_vxm_i8mf4(vint8mf4_t op1, int8_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_i8mf4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8mf2( @@ -49,7 +49,7 @@ vint8mf4_t test_vmerge_vxm_i8mf4(vint8mf4_t op1, int8_t op2, vbool32_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmerge_vvm_i8mf2(vint8mf2_t op1, vint8mf2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_i8mf2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8mf2( @@ -58,7 +58,7 @@ vint8mf2_t test_vmerge_vvm_i8mf2(vint8mf2_t op1, vint8mf2_t op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmerge_vxm_i8mf2(vint8mf2_t op1, int8_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_i8mf2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8m1( @@ -67,7 +67,7 @@ vint8mf2_t test_vmerge_vxm_i8mf2(vint8mf2_t op1, int8_t op2, vbool16_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmerge_vvm_i8m1(vint8m1_t op1, vint8m1_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_i8m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8m1( @@ -76,7 +76,7 @@ vint8m1_t test_vmerge_vvm_i8m1(vint8m1_t op1, vint8m1_t op2, vbool8_t mask, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmerge_vxm_i8m1(vint8m1_t op1, int8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_i8m1(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8m2( @@ -85,7 +85,7 @@ vint8m1_t test_vmerge_vxm_i8m1(vint8m1_t op1, int8_t op2, vbool8_t mask, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmerge_vvm_i8m2(vint8m2_t op1, vint8m2_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_i8m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8m2( @@ -94,7 +94,7 @@ vint8m2_t test_vmerge_vvm_i8m2(vint8m2_t op1, vint8m2_t op2, vbool4_t mask, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmerge_vxm_i8m2(vint8m2_t op1, int8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_i8m2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8m4( @@ -103,7 +103,7 @@ vint8m2_t test_vmerge_vxm_i8m2(vint8m2_t op1, int8_t op2, vbool4_t mask, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmerge_vvm_i8m4(vint8m4_t op1, vint8m4_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_i8m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8m4( @@ -112,7 +112,7 @@ vint8m4_t test_vmerge_vvm_i8m4(vint8m4_t op1, vint8m4_t op2, vbool2_t mask, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmerge_vxm_i8m4(vint8m4_t op1, int8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vxm_i8m4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8m8( @@ -121,7 +121,7 @@ vint8m4_t test_vmerge_vxm_i8m4(vint8m4_t op1, int8_t op2, vbool2_t mask, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmerge_vvm_i8m8(vint8m8_t op1, vint8m8_t op2, vbool1_t mask, size_t vl) { - return vmerge_vvm_i8m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8m8( @@ -130,7 +130,7 @@ vint8m8_t test_vmerge_vvm_i8m8(vint8m8_t op1, vint8m8_t op2, vbool1_t mask, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmerge_vxm_i8m8(vint8m8_t op1, int8_t op2, vbool1_t mask, size_t vl) { - return vmerge_vxm_i8m8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16mf4( @@ -139,7 +139,7 @@ vint8m8_t test_vmerge_vxm_i8m8(vint8m8_t op1, int8_t op2, vbool1_t mask, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmerge_vvm_i16mf4(vint16mf4_t op1, vint16mf4_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_i16mf4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16mf4( @@ -148,7 +148,7 @@ vint16mf4_t test_vmerge_vvm_i16mf4(vint16mf4_t op1, vint16mf4_t op2, vbool64_t m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmerge_vxm_i16mf4(vint16mf4_t op1, int16_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_i16mf4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16mf2( @@ -157,7 +157,7 @@ vint16mf4_t test_vmerge_vxm_i16mf4(vint16mf4_t op1, int16_t op2, vbool64_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmerge_vvm_i16mf2(vint16mf2_t op1, vint16mf2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_i16mf2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16mf2( @@ -166,7 +166,7 @@ vint16mf2_t test_vmerge_vvm_i16mf2(vint16mf2_t op1, vint16mf2_t op2, vbool32_t m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmerge_vxm_i16mf2(vint16mf2_t op1, int16_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_i16mf2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16m1( @@ -175,7 +175,7 @@ vint16mf2_t test_vmerge_vxm_i16mf2(vint16mf2_t op1, int16_t op2, vbool32_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmerge_vvm_i16m1(vint16m1_t op1, vint16m1_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_i16m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16m1( @@ -184,7 +184,7 @@ vint16m1_t test_vmerge_vvm_i16m1(vint16m1_t op1, vint16m1_t op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmerge_vxm_i16m1(vint16m1_t op1, int16_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_i16m1(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16m2( @@ -193,7 +193,7 @@ vint16m1_t test_vmerge_vxm_i16m1(vint16m1_t op1, int16_t op2, vbool16_t mask, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmerge_vvm_i16m2(vint16m2_t op1, vint16m2_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_i16m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16m2( @@ -202,7 +202,7 @@ vint16m2_t test_vmerge_vvm_i16m2(vint16m2_t op1, vint16m2_t op2, vbool8_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmerge_vxm_i16m2(vint16m2_t op1, int16_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_i16m2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16m4( @@ -211,7 +211,7 @@ vint16m2_t test_vmerge_vxm_i16m2(vint16m2_t op1, int16_t op2, vbool8_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmerge_vvm_i16m4(vint16m4_t op1, vint16m4_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_i16m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16m4( @@ -220,7 +220,7 @@ vint16m4_t test_vmerge_vvm_i16m4(vint16m4_t op1, vint16m4_t op2, vbool4_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmerge_vxm_i16m4(vint16m4_t op1, int16_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_i16m4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16m8( @@ -229,7 +229,7 @@ vint16m4_t test_vmerge_vxm_i16m4(vint16m4_t op1, int16_t op2, vbool4_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmerge_vvm_i16m8(vint16m8_t op1, vint16m8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_i16m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16m8( @@ -238,7 +238,7 @@ vint16m8_t test_vmerge_vvm_i16m8(vint16m8_t op1, vint16m8_t op2, vbool2_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmerge_vxm_i16m8(vint16m8_t op1, int16_t op2, vbool2_t mask, size_t vl) { - return vmerge_vxm_i16m8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32mf2( @@ -247,7 +247,7 @@ vint16m8_t test_vmerge_vxm_i16m8(vint16m8_t op1, int16_t op2, vbool2_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmerge_vvm_i32mf2(vint32mf2_t op1, vint32mf2_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_i32mf2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32mf2( @@ -256,7 +256,7 @@ vint32mf2_t test_vmerge_vvm_i32mf2(vint32mf2_t op1, vint32mf2_t op2, vbool64_t m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmerge_vxm_i32mf2(vint32mf2_t op1, int32_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_i32mf2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vmerge_vxm_i32mf2(vint32mf2_t op1, int32_t op2, vbool64_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmerge_vvm_i32m1(vint32m1_t op1, vint32m1_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_i32m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32m1( @@ -274,7 +274,7 @@ vint32m1_t test_vmerge_vvm_i32m1(vint32m1_t op1, vint32m1_t op2, vbool32_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmerge_vxm_i32m1(vint32m1_t op1, int32_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_i32m1(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vmerge_vxm_i32m1(vint32m1_t op1, int32_t op2, vbool32_t mask, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmerge_vvm_i32m2(vint32m2_t op1, vint32m2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_i32m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32m2( @@ -292,7 +292,7 @@ vint32m2_t test_vmerge_vvm_i32m2(vint32m2_t op1, vint32m2_t op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmerge_vxm_i32m2(vint32m2_t op1, int32_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_i32m2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32m4( @@ -301,7 +301,7 @@ vint32m2_t test_vmerge_vxm_i32m2(vint32m2_t op1, int32_t op2, vbool16_t mask, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmerge_vvm_i32m4(vint32m4_t op1, vint32m4_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_i32m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32m4( @@ -310,7 +310,7 @@ vint32m4_t test_vmerge_vvm_i32m4(vint32m4_t op1, vint32m4_t op2, vbool8_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmerge_vxm_i32m4(vint32m4_t op1, int32_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_i32m4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32m8( @@ -319,7 +319,7 @@ vint32m4_t test_vmerge_vxm_i32m4(vint32m4_t op1, int32_t op2, vbool8_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmerge_vvm_i32m8(vint32m8_t op1, vint32m8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_i32m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32m8( @@ -328,7 +328,7 @@ vint32m8_t test_vmerge_vvm_i32m8(vint32m8_t op1, vint32m8_t op2, vbool4_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmerge_vxm_i32m8(vint32m8_t op1, int32_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_i32m8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i64m1( @@ -337,7 +337,7 @@ vint32m8_t test_vmerge_vxm_i32m8(vint32m8_t op1, int32_t op2, vbool4_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmerge_vvm_i64m1(vint64m1_t op1, vint64m1_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_i64m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i64m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i64m1( @@ -346,7 +346,7 @@ vint64m1_t test_vmerge_vvm_i64m1(vint64m1_t op1, vint64m1_t op2, vbool64_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmerge_vxm_i64m1(vint64m1_t op1, int64_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_i64m1(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i64m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i64m2( @@ -355,7 +355,7 @@ vint64m1_t test_vmerge_vxm_i64m1(vint64m1_t op1, int64_t op2, vbool64_t mask, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmerge_vvm_i64m2(vint64m2_t op1, vint64m2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_i64m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i64m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i64m2( @@ -364,7 +364,7 @@ vint64m2_t test_vmerge_vvm_i64m2(vint64m2_t op1, vint64m2_t op2, vbool32_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmerge_vxm_i64m2(vint64m2_t op1, int64_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_i64m2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i64m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i64m4( @@ -373,7 +373,7 @@ vint64m2_t test_vmerge_vxm_i64m2(vint64m2_t op1, int64_t op2, vbool32_t mask, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmerge_vvm_i64m4(vint64m4_t op1, vint64m4_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_i64m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i64m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i64m4( @@ -382,7 +382,7 @@ vint64m4_t test_vmerge_vvm_i64m4(vint64m4_t op1, vint64m4_t op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmerge_vxm_i64m4(vint64m4_t op1, int64_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_i64m4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i64m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i64m8( @@ -391,7 +391,7 @@ vint64m4_t test_vmerge_vxm_i64m4(vint64m4_t op1, int64_t op2, vbool16_t mask, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmerge_vvm_i64m8(vint64m8_t op1, vint64m8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_i64m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_i64m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i64m8( @@ -400,7 +400,7 @@ vint64m8_t test_vmerge_vvm_i64m8(vint64m8_t op1, vint64m8_t op2, vbool8_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmerge_vxm_i64m8(vint64m8_t op1, int64_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_i64m8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_i64m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8mf8( @@ -409,7 +409,7 @@ vint64m8_t test_vmerge_vxm_i64m8(vint64m8_t op1, int64_t op2, vbool8_t mask, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmerge_vvm_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_u8mf8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8mf8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8mf8( @@ -418,7 +418,7 @@ vuint8mf8_t test_vmerge_vvm_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmerge_vxm_u8mf8(vuint8mf8_t op1, uint8_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_u8mf8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8mf8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8mf4( @@ -427,7 +427,7 @@ vuint8mf8_t test_vmerge_vxm_u8mf8(vuint8mf8_t op1, uint8_t op2, vbool64_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmerge_vvm_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_u8mf4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8mf4( @@ -436,7 +436,7 @@ vuint8mf4_t test_vmerge_vvm_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmerge_vxm_u8mf4(vuint8mf4_t op1, uint8_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_u8mf4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8mf2( @@ -445,7 +445,7 @@ vuint8mf4_t test_vmerge_vxm_u8mf4(vuint8mf4_t op1, uint8_t op2, vbool32_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmerge_vvm_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_u8mf2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8mf2( @@ -454,7 +454,7 @@ vuint8mf2_t test_vmerge_vvm_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmerge_vxm_u8mf2(vuint8mf2_t op1, uint8_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_u8mf2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8m1( @@ -463,7 +463,7 @@ vuint8mf2_t test_vmerge_vxm_u8mf2(vuint8mf2_t op1, uint8_t op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmerge_vvm_u8m1(vuint8m1_t op1, vuint8m1_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_u8m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8m1( @@ -472,7 +472,7 @@ vuint8m1_t test_vmerge_vvm_u8m1(vuint8m1_t op1, vuint8m1_t op2, vbool8_t mask, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmerge_vxm_u8m1(vuint8m1_t op1, uint8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_u8m1(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8m2( @@ -481,7 +481,7 @@ vuint8m1_t test_vmerge_vxm_u8m1(vuint8m1_t op1, uint8_t op2, vbool8_t mask, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmerge_vvm_u8m2(vuint8m2_t op1, vuint8m2_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_u8m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8m2( @@ -490,7 +490,7 @@ vuint8m2_t test_vmerge_vvm_u8m2(vuint8m2_t op1, vuint8m2_t op2, vbool4_t mask, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmerge_vxm_u8m2(vuint8m2_t op1, uint8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_u8m2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8m4( @@ -499,7 +499,7 @@ vuint8m2_t test_vmerge_vxm_u8m2(vuint8m2_t op1, uint8_t op2, vbool4_t mask, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmerge_vvm_u8m4(vuint8m4_t op1, vuint8m4_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_u8m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8m4( @@ -508,7 +508,7 @@ vuint8m4_t test_vmerge_vvm_u8m4(vuint8m4_t op1, vuint8m4_t op2, vbool2_t mask, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmerge_vxm_u8m4(vuint8m4_t op1, uint8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vxm_u8m4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8m8( @@ -517,7 +517,7 @@ vuint8m4_t test_vmerge_vxm_u8m4(vuint8m4_t op1, uint8_t op2, vbool2_t mask, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmerge_vvm_u8m8(vuint8m8_t op1, vuint8m8_t op2, vbool1_t mask, size_t vl) { - return vmerge_vvm_u8m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8m8( @@ -526,7 +526,7 @@ vuint8m8_t test_vmerge_vvm_u8m8(vuint8m8_t op1, vuint8m8_t op2, vbool1_t mask, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmerge_vxm_u8m8(vuint8m8_t op1, uint8_t op2, vbool1_t mask, size_t vl) { - return vmerge_vxm_u8m8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16mf4( @@ -535,7 +535,7 @@ vuint8m8_t test_vmerge_vxm_u8m8(vuint8m8_t op1, uint8_t op2, vbool1_t mask, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmerge_vvm_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_u16mf4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16mf4( @@ -544,7 +544,7 @@ vuint16mf4_t test_vmerge_vvm_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmerge_vxm_u16mf4(vuint16mf4_t op1, uint16_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_u16mf4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16mf2( @@ -553,7 +553,7 @@ vuint16mf4_t test_vmerge_vxm_u16mf4(vuint16mf4_t op1, uint16_t op2, vbool64_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmerge_vvm_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_u16mf2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16mf2( @@ -562,7 +562,7 @@ vuint16mf2_t test_vmerge_vvm_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmerge_vxm_u16mf2(vuint16mf2_t op1, uint16_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_u16mf2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16m1( @@ -571,7 +571,7 @@ vuint16mf2_t test_vmerge_vxm_u16mf2(vuint16mf2_t op1, uint16_t op2, vbool32_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmerge_vvm_u16m1(vuint16m1_t op1, vuint16m1_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_u16m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16m1( @@ -580,7 +580,7 @@ vuint16m1_t test_vmerge_vvm_u16m1(vuint16m1_t op1, vuint16m1_t op2, vbool16_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmerge_vxm_u16m1(vuint16m1_t op1, uint16_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_u16m1(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16m2( @@ -589,7 +589,7 @@ vuint16m1_t test_vmerge_vxm_u16m1(vuint16m1_t op1, uint16_t op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmerge_vvm_u16m2(vuint16m2_t op1, vuint16m2_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_u16m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16m2( @@ -598,7 +598,7 @@ vuint16m2_t test_vmerge_vvm_u16m2(vuint16m2_t op1, vuint16m2_t op2, vbool8_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmerge_vxm_u16m2(vuint16m2_t op1, uint16_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_u16m2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16m4( @@ -607,7 +607,7 @@ vuint16m2_t test_vmerge_vxm_u16m2(vuint16m2_t op1, uint16_t op2, vbool8_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmerge_vvm_u16m4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_u16m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16m4( @@ -616,7 +616,7 @@ vuint16m4_t test_vmerge_vvm_u16m4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmerge_vxm_u16m4(vuint16m4_t op1, uint16_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_u16m4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16m8( @@ -625,7 +625,7 @@ vuint16m4_t test_vmerge_vxm_u16m4(vuint16m4_t op1, uint16_t op2, vbool4_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmerge_vvm_u16m8(vuint16m8_t op1, vuint16m8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_u16m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16m8( @@ -634,7 +634,7 @@ vuint16m8_t test_vmerge_vvm_u16m8(vuint16m8_t op1, vuint16m8_t op2, vbool2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmerge_vxm_u16m8(vuint16m8_t op1, uint16_t op2, vbool2_t mask, size_t vl) { - return vmerge_vxm_u16m8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32mf2( @@ -643,7 +643,7 @@ vuint16m8_t test_vmerge_vxm_u16m8(vuint16m8_t op1, uint16_t op2, vbool2_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmerge_vvm_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_u32mf2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32mf2( @@ -652,7 +652,7 @@ vuint32mf2_t test_vmerge_vvm_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmerge_vxm_u32mf2(vuint32mf2_t op1, uint32_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_u32mf2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32m1( @@ -661,7 +661,7 @@ vuint32mf2_t test_vmerge_vxm_u32mf2(vuint32mf2_t op1, uint32_t op2, vbool64_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmerge_vvm_u32m1(vuint32m1_t op1, vuint32m1_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_u32m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32m1( @@ -670,7 +670,7 @@ vuint32m1_t test_vmerge_vvm_u32m1(vuint32m1_t op1, vuint32m1_t op2, vbool32_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmerge_vxm_u32m1(vuint32m1_t op1, uint32_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_u32m1(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32m2( @@ -679,7 +679,7 @@ vuint32m1_t test_vmerge_vxm_u32m1(vuint32m1_t op1, uint32_t op2, vbool32_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmerge_vvm_u32m2(vuint32m2_t op1, vuint32m2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_u32m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32m2( @@ -688,7 +688,7 @@ vuint32m2_t test_vmerge_vvm_u32m2(vuint32m2_t op1, vuint32m2_t op2, vbool16_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmerge_vxm_u32m2(vuint32m2_t op1, uint32_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_u32m2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32m4( @@ -697,7 +697,7 @@ vuint32m2_t test_vmerge_vxm_u32m2(vuint32m2_t op1, uint32_t op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmerge_vvm_u32m4(vuint32m4_t op1, vuint32m4_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_u32m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32m4( @@ -706,7 +706,7 @@ vuint32m4_t test_vmerge_vvm_u32m4(vuint32m4_t op1, vuint32m4_t op2, vbool8_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmerge_vxm_u32m4(vuint32m4_t op1, uint32_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_u32m4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32m8( @@ -715,7 +715,7 @@ vuint32m4_t test_vmerge_vxm_u32m4(vuint32m4_t op1, uint32_t op2, vbool8_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmerge_vvm_u32m8(vuint32m8_t op1, vuint32m8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_u32m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32m8( @@ -724,7 +724,7 @@ vuint32m8_t test_vmerge_vvm_u32m8(vuint32m8_t op1, vuint32m8_t op2, vbool4_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmerge_vxm_u32m8(vuint32m8_t op1, uint32_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_u32m8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u64m1( @@ -733,7 +733,7 @@ vuint32m8_t test_vmerge_vxm_u32m8(vuint32m8_t op1, uint32_t op2, vbool4_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmerge_vvm_u64m1(vuint64m1_t op1, vuint64m1_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_u64m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u64m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u64m1( @@ -742,7 +742,7 @@ vuint64m1_t test_vmerge_vvm_u64m1(vuint64m1_t op1, vuint64m1_t op2, vbool64_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmerge_vxm_u64m1(vuint64m1_t op1, uint64_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_u64m1(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u64m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u64m2( @@ -751,7 +751,7 @@ vuint64m1_t test_vmerge_vxm_u64m1(vuint64m1_t op1, uint64_t op2, vbool64_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmerge_vvm_u64m2(vuint64m2_t op1, vuint64m2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_u64m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u64m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u64m2( @@ -760,7 +760,7 @@ vuint64m2_t test_vmerge_vvm_u64m2(vuint64m2_t op1, vuint64m2_t op2, vbool32_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmerge_vxm_u64m2(vuint64m2_t op1, uint64_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_u64m2(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u64m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u64m4( @@ -769,7 +769,7 @@ vuint64m2_t test_vmerge_vxm_u64m2(vuint64m2_t op1, uint64_t op2, vbool32_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmerge_vvm_u64m4(vuint64m4_t op1, vuint64m4_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_u64m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u64m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u64m4( @@ -778,7 +778,7 @@ vuint64m4_t test_vmerge_vvm_u64m4(vuint64m4_t op1, vuint64m4_t op2, vbool16_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmerge_vxm_u64m4(vuint64m4_t op1, uint64_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_u64m4(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u64m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u64m8( @@ -787,7 +787,7 @@ vuint64m4_t test_vmerge_vxm_u64m4(vuint64m4_t op1, uint64_t op2, vbool16_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmerge_vvm_u64m8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_u64m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_u64m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u64m8( @@ -796,7 +796,7 @@ vuint64m8_t test_vmerge_vvm_u64m8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmerge_vxm_u64m8(vuint64m8_t op1, uint64_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_u64m8(op1, op2, mask, vl); + return __riscv_vmerge_vxm_u64m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16mf4( @@ -805,7 +805,7 @@ vuint64m8_t test_vmerge_vxm_u64m8(vuint64m8_t op1, uint64_t op2, vbool8_t mask, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vmerge_vvm_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_f16mf4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16mf4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16mf2( @@ -814,7 +814,7 @@ vfloat16mf4_t test_vmerge_vvm_f16mf4(vfloat16mf4_t op1, vfloat16mf4_t op2, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vmerge_vvm_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_f16mf2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16m1( @@ -823,7 +823,7 @@ vfloat16mf2_t test_vmerge_vvm_f16mf2(vfloat16mf2_t op1, vfloat16mf2_t op2, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vmerge_vvm_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_f16m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16m2( @@ -832,7 +832,7 @@ vfloat16m1_t test_vmerge_vvm_f16m1(vfloat16m1_t op1, vfloat16m1_t op2, vbool16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vmerge_vvm_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_f16m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16m4( @@ -841,7 +841,7 @@ vfloat16m2_t test_vmerge_vvm_f16m2(vfloat16m2_t op1, vfloat16m2_t op2, vbool8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vmerge_vvm_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_f16m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16m8( @@ -850,7 +850,7 @@ vfloat16m4_t test_vmerge_vvm_f16m4(vfloat16m4_t op1, vfloat16m4_t op2, vbool4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vmerge_vvm_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_f16m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32mf2( @@ -859,7 +859,7 @@ vfloat16m8_t test_vmerge_vvm_f16m8(vfloat16m8_t op1, vfloat16m8_t op2, vbool2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vmerge_vvm_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_f32mf2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32mf2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32m1( @@ -868,7 +868,7 @@ vfloat32mf2_t test_vmerge_vvm_f32mf2(vfloat32mf2_t op1, vfloat32mf2_t op2, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vmerge_vvm_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_f32m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32m2( @@ -877,7 +877,7 @@ vfloat32m1_t test_vmerge_vvm_f32m1(vfloat32m1_t op1, vfloat32m1_t op2, vbool32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vmerge_vvm_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_f32m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32m4( @@ -886,7 +886,7 @@ vfloat32m2_t test_vmerge_vvm_f32m2(vfloat32m2_t op1, vfloat32m2_t op2, vbool16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vmerge_vvm_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_f32m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32m8( @@ -895,7 +895,7 @@ vfloat32m4_t test_vmerge_vvm_f32m4(vfloat32m4_t op1, vfloat32m4_t op2, vbool8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vmerge_vvm_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_f32m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32m8(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f64m1( @@ -904,7 +904,7 @@ vfloat32m8_t test_vmerge_vvm_f32m8(vfloat32m8_t op1, vfloat32m8_t op2, vbool4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vmerge_vvm_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_f64m1(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f64m1(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f64m2( @@ -913,7 +913,7 @@ vfloat64m1_t test_vmerge_vvm_f64m1(vfloat64m1_t op1, vfloat64m1_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vmerge_vvm_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_f64m2(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f64m2(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f64m4( @@ -922,7 +922,7 @@ vfloat64m2_t test_vmerge_vvm_f64m2(vfloat64m2_t op1, vfloat64m2_t op2, vbool32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vmerge_vvm_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_f64m4(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f64m4(op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f64m8( @@ -931,6 +931,6 @@ vfloat64m4_t test_vmerge_vvm_f64m4(vfloat64m4_t op1, vfloat64m4_t op2, vbool16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vmerge_vvm_f64m8(vfloat64m8_t op1, vfloat64m8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_f64m8(op1, op2, mask, vl); + return __riscv_vmerge_vvm_f64m8(op1, op2, mask, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfeq.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfeq.c index 723d4110238dd4727107f3350bab4694107b2676..0fb3a192e1b477e48eb464e1b924ec047faf6857 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfeq.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfeq.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfeq_vv_f16mf4_b64(op1, op2, vl); + return __riscv_vmfeq_vv_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16mf4_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmfeq_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16mf4_b64(op1, op2, vl); + return __riscv_vmfeq_vf_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16mf2_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmfeq_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfeq_vv_f16mf2_b32(op1, op2, vl); + return __riscv_vmfeq_vv_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16mf2_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmfeq_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16mf2_b32(op1, op2, vl); + return __riscv_vmfeq_vf_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m1_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmfeq_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfeq_vv_f16m1_b16(op1, op2, vl); + return __riscv_vmfeq_vv_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m1_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmfeq_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m1_b16(op1, op2, vl); + return __riscv_vmfeq_vf_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m2_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmfeq_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfeq_vv_f16m2_b8(op1, op2, vl); + return __riscv_vmfeq_vv_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m2_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmfeq_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m2_b8(op1, op2, vl); + return __riscv_vmfeq_vf_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m4_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmfeq_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfeq_vv_f16m4_b4(op1, op2, vl); + return __riscv_vmfeq_vv_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m4_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmfeq_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m4_b4(op1, op2, vl); + return __riscv_vmfeq_vf_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m8_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmfeq_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfeq_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfeq_vv_f16m8_b2(op1, op2, vl); + return __riscv_vmfeq_vv_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m8_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmfeq_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfeq_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m8_b2(op1, op2, vl); + return __riscv_vmfeq_vf_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32mf2_b64( @@ -121,7 +121,7 @@ vbool2_t test_vmfeq_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfeq_vv_f32mf2_b64(op1, op2, vl); + return __riscv_vmfeq_vv_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32mf2_b64( @@ -130,7 +130,7 @@ vbool64_t test_vmfeq_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { - return vmfeq_vf_f32mf2_b64(op1, op2, vl); + return __riscv_vmfeq_vf_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m1_b32( @@ -139,7 +139,7 @@ vbool64_t test_vmfeq_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfeq_vv_f32m1_b32(op1, op2, vl); + return __riscv_vmfeq_vv_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m1_b32( @@ -148,7 +148,7 @@ vbool32_t test_vmfeq_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m1_b32(op1, op2, vl); + return __riscv_vmfeq_vf_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m2_b16( @@ -157,7 +157,7 @@ vbool32_t test_vmfeq_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfeq_vv_f32m2_b16(op1, op2, vl); + return __riscv_vmfeq_vv_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m2_b16( @@ -166,7 +166,7 @@ vbool16_t test_vmfeq_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m2_b16(op1, op2, vl); + return __riscv_vmfeq_vf_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m4_b8( @@ -175,7 +175,7 @@ vbool16_t test_vmfeq_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfeq_vv_f32m4_b8(op1, op2, vl); + return __riscv_vmfeq_vv_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m4_b8( @@ -184,7 +184,7 @@ vbool8_t test_vmfeq_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m4_b8(op1, op2, vl); + return __riscv_vmfeq_vf_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m8_b4( @@ -193,7 +193,7 @@ vbool8_t test_vmfeq_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfeq_vv_f32m8_b4(op1, op2, vl); + return __riscv_vmfeq_vv_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m8_b4( @@ -202,7 +202,7 @@ vbool4_t test_vmfeq_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m8_b4(op1, op2, vl); + return __riscv_vmfeq_vf_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m1_b64( @@ -211,7 +211,7 @@ vbool4_t test_vmfeq_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfeq_vv_f64m1_b64(op1, op2, vl); + return __riscv_vmfeq_vv_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m1_b64( @@ -220,7 +220,7 @@ vbool64_t test_vmfeq_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m1_b64(op1, op2, vl); + return __riscv_vmfeq_vf_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m2_b32( @@ -229,7 +229,7 @@ vbool64_t test_vmfeq_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfeq_vv_f64m2_b32(op1, op2, vl); + return __riscv_vmfeq_vv_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m2_b32( @@ -238,7 +238,7 @@ vbool32_t test_vmfeq_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m2_b32(op1, op2, vl); + return __riscv_vmfeq_vf_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m4_b16( @@ -247,7 +247,7 @@ vbool32_t test_vmfeq_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfeq_vv_f64m4_b16(op1, op2, vl); + return __riscv_vmfeq_vv_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m4_b16( @@ -256,7 +256,7 @@ vbool16_t test_vmfeq_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m4_b16(op1, op2, vl); + return __riscv_vmfeq_vf_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m8_b8( @@ -265,7 +265,7 @@ vbool16_t test_vmfeq_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfeq_vv_f64m8_b8(op1, op2, vl); + return __riscv_vmfeq_vv_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m8_b8( @@ -274,7 +274,7 @@ vbool8_t test_vmfeq_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m8_b8(op1, op2, vl); + return __riscv_vmfeq_vf_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16mf4_b64_m( @@ -283,7 +283,7 @@ vbool8_t test_vmfeq_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfeq_vv_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16mf4_b64_m( @@ -292,7 +292,7 @@ vbool64_t test_vmfeq_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16mf2_b32_m( @@ -301,7 +301,7 @@ vbool64_t test_vmfeq_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfeq_vv_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16mf2_b32_m( @@ -310,7 +310,7 @@ vbool32_t test_vmfeq_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m1_b16_m( @@ -319,7 +319,7 @@ vbool32_t test_vmfeq_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfeq_vv_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m1_b16_m( @@ -328,7 +328,7 @@ vbool16_t test_vmfeq_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m2_b8_m( @@ -337,7 +337,7 @@ vbool16_t test_vmfeq_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfeq_vv_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m2_b8_m( @@ -346,7 +346,7 @@ vbool8_t test_vmfeq_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m4_b4_m( @@ -355,7 +355,7 @@ vbool8_t test_vmfeq_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfeq_vv_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m4_b4_m( @@ -364,7 +364,7 @@ vbool4_t test_vmfeq_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m8_b2_m( @@ -373,7 +373,7 @@ vbool4_t test_vmfeq_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfeq_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfeq_vv_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m8_b2_m( @@ -382,7 +382,7 @@ vbool2_t test_vmfeq_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfeq_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32mf2_b64_m( @@ -391,7 +391,7 @@ vbool2_t test_vmfeq_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfeq_vv_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32mf2_b64_m( @@ -400,7 +400,7 @@ vbool64_t test_vmfeq_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfeq_vf_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m1_b32_m( @@ -409,7 +409,7 @@ vbool64_t test_vmfeq_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfeq_vv_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m1_b32_m( @@ -418,7 +418,7 @@ vbool32_t test_vmfeq_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m2_b16_m( @@ -427,7 +427,7 @@ vbool32_t test_vmfeq_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfeq_vv_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m2_b16_m( @@ -436,7 +436,7 @@ vbool16_t test_vmfeq_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m4_b8_m( @@ -445,7 +445,7 @@ vbool16_t test_vmfeq_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfeq_vv_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m4_b8_m( @@ -454,7 +454,7 @@ vbool8_t test_vmfeq_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m8_b4_m( @@ -463,7 +463,7 @@ vbool8_t test_vmfeq_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfeq_vv_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m8_b4_m( @@ -472,7 +472,7 @@ vbool4_t test_vmfeq_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m1_b64_m( @@ -481,7 +481,7 @@ vbool4_t test_vmfeq_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfeq_vv_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m1_b64_m( @@ -490,7 +490,7 @@ vbool64_t test_vmfeq_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m2_b32_m( @@ -499,7 +499,7 @@ vbool64_t test_vmfeq_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfeq_vv_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m2_b32_m( @@ -508,7 +508,7 @@ vbool32_t test_vmfeq_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m4_b16_m( @@ -517,7 +517,7 @@ vbool32_t test_vmfeq_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfeq_vv_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m4_b16_m( @@ -526,7 +526,7 @@ vbool16_t test_vmfeq_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m8_b8_m( @@ -535,7 +535,7 @@ vbool16_t test_vmfeq_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfeq_vv_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfeq_vv_f64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m8_b8_m( @@ -544,6 +544,6 @@ vbool8_t test_vmfeq_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfeq_vf_f64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfge.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfge.c index 1074cad920497a6d8d907a72c17ec6b6f81c7480..3bbfb865b6dbf8562f5e374a135997b3568ce7ee 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfge.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfge.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfge_vv_f16mf4_b64(op1, op2, vl); + return __riscv_vmfge_vv_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16mf4_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmfge_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16mf4_b64(op1, op2, vl); + return __riscv_vmfge_vf_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16mf2_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmfge_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfge_vv_f16mf2_b32(op1, op2, vl); + return __riscv_vmfge_vv_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16mf2_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmfge_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16mf2_b32(op1, op2, vl); + return __riscv_vmfge_vf_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m1_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmfge_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfge_vv_f16m1_b16(op1, op2, vl); + return __riscv_vmfge_vv_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m1_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmfge_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m1_b16(op1, op2, vl); + return __riscv_vmfge_vf_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m2_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmfge_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfge_vv_f16m2_b8(op1, op2, vl); + return __riscv_vmfge_vv_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m2_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmfge_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m2_b8(op1, op2, vl); + return __riscv_vmfge_vf_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m4_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmfge_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfge_vv_f16m4_b4(op1, op2, vl); + return __riscv_vmfge_vv_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m4_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmfge_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m4_b4(op1, op2, vl); + return __riscv_vmfge_vf_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m8_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmfge_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfge_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfge_vv_f16m8_b2(op1, op2, vl); + return __riscv_vmfge_vv_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m8_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmfge_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfge_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m8_b2(op1, op2, vl); + return __riscv_vmfge_vf_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32mf2_b64( @@ -121,7 +121,7 @@ vbool2_t test_vmfge_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfge_vv_f32mf2_b64(op1, op2, vl); + return __riscv_vmfge_vv_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32mf2_b64( @@ -130,7 +130,7 @@ vbool64_t test_vmfge_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { - return vmfge_vf_f32mf2_b64(op1, op2, vl); + return __riscv_vmfge_vf_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m1_b32( @@ -139,7 +139,7 @@ vbool64_t test_vmfge_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfge_vv_f32m1_b32(op1, op2, vl); + return __riscv_vmfge_vv_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m1_b32( @@ -148,7 +148,7 @@ vbool32_t test_vmfge_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { - return vmfge_vf_f32m1_b32(op1, op2, vl); + return __riscv_vmfge_vf_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m2_b16( @@ -157,7 +157,7 @@ vbool32_t test_vmfge_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfge_vv_f32m2_b16(op1, op2, vl); + return __riscv_vmfge_vv_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m2_b16( @@ -166,7 +166,7 @@ vbool16_t test_vmfge_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { - return vmfge_vf_f32m2_b16(op1, op2, vl); + return __riscv_vmfge_vf_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m4_b8( @@ -175,7 +175,7 @@ vbool16_t test_vmfge_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfge_vv_f32m4_b8(op1, op2, vl); + return __riscv_vmfge_vv_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m4_b8( @@ -184,7 +184,7 @@ vbool8_t test_vmfge_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { - return vmfge_vf_f32m4_b8(op1, op2, vl); + return __riscv_vmfge_vf_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m8_b4( @@ -193,7 +193,7 @@ vbool8_t test_vmfge_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfge_vv_f32m8_b4(op1, op2, vl); + return __riscv_vmfge_vv_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m8_b4( @@ -202,7 +202,7 @@ vbool4_t test_vmfge_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { - return vmfge_vf_f32m8_b4(op1, op2, vl); + return __riscv_vmfge_vf_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m1_b64( @@ -211,7 +211,7 @@ vbool4_t test_vmfge_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfge_vv_f64m1_b64(op1, op2, vl); + return __riscv_vmfge_vv_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m1_b64( @@ -220,7 +220,7 @@ vbool64_t test_vmfge_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { - return vmfge_vf_f64m1_b64(op1, op2, vl); + return __riscv_vmfge_vf_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m2_b32( @@ -229,7 +229,7 @@ vbool64_t test_vmfge_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfge_vv_f64m2_b32(op1, op2, vl); + return __riscv_vmfge_vv_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m2_b32( @@ -238,7 +238,7 @@ vbool32_t test_vmfge_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { - return vmfge_vf_f64m2_b32(op1, op2, vl); + return __riscv_vmfge_vf_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m4_b16( @@ -247,7 +247,7 @@ vbool32_t test_vmfge_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfge_vv_f64m4_b16(op1, op2, vl); + return __riscv_vmfge_vv_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m4_b16( @@ -256,7 +256,7 @@ vbool16_t test_vmfge_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { - return vmfge_vf_f64m4_b16(op1, op2, vl); + return __riscv_vmfge_vf_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m8_b8( @@ -265,7 +265,7 @@ vbool16_t test_vmfge_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfge_vv_f64m8_b8(op1, op2, vl); + return __riscv_vmfge_vv_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m8_b8( @@ -274,7 +274,7 @@ vbool8_t test_vmfge_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { - return vmfge_vf_f64m8_b8(op1, op2, vl); + return __riscv_vmfge_vf_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16mf4_b64_m( @@ -283,7 +283,7 @@ vbool8_t test_vmfge_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfge_vv_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16mf4_b64_m( @@ -292,7 +292,7 @@ vbool64_t test_vmfge_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16mf2_b32_m( @@ -301,7 +301,7 @@ vbool64_t test_vmfge_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfge_vv_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16mf2_b32_m( @@ -310,7 +310,7 @@ vbool32_t test_vmfge_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m1_b16_m( @@ -319,7 +319,7 @@ vbool32_t test_vmfge_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfge_vv_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m1_b16_m( @@ -328,7 +328,7 @@ vbool16_t test_vmfge_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m2_b8_m( @@ -337,7 +337,7 @@ vbool16_t test_vmfge_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfge_vv_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m2_b8_m( @@ -346,7 +346,7 @@ vbool8_t test_vmfge_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m4_b4_m( @@ -355,7 +355,7 @@ vbool8_t test_vmfge_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfge_vv_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m4_b4_m( @@ -364,7 +364,7 @@ vbool4_t test_vmfge_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m8_b2_m( @@ -373,7 +373,7 @@ vbool4_t test_vmfge_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfge_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfge_vv_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m8_b2_m( @@ -382,7 +382,7 @@ vbool2_t test_vmfge_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfge_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32mf2_b64_m( @@ -391,7 +391,7 @@ vbool2_t test_vmfge_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfge_vv_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32mf2_b64_m( @@ -400,7 +400,7 @@ vbool64_t test_vmfge_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfge_vf_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m1_b32_m( @@ -409,7 +409,7 @@ vbool64_t test_vmfge_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfge_vv_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m1_b32_m( @@ -418,7 +418,7 @@ vbool32_t test_vmfge_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vmfge_vf_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m2_b16_m( @@ -427,7 +427,7 @@ vbool32_t test_vmfge_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfge_vv_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m2_b16_m( @@ -436,7 +436,7 @@ vbool16_t test_vmfge_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vmfge_vf_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m4_b8_m( @@ -445,7 +445,7 @@ vbool16_t test_vmfge_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfge_vv_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m4_b8_m( @@ -454,7 +454,7 @@ vbool8_t test_vmfge_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vmfge_vf_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m8_b4_m( @@ -463,7 +463,7 @@ vbool8_t test_vmfge_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfge_vv_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m8_b4_m( @@ -472,7 +472,7 @@ vbool4_t test_vmfge_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vmfge_vf_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m1_b64_m( @@ -481,7 +481,7 @@ vbool4_t test_vmfge_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfge_vv_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m1_b64_m( @@ -490,7 +490,7 @@ vbool64_t test_vmfge_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vmfge_vf_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m2_b32_m( @@ -499,7 +499,7 @@ vbool64_t test_vmfge_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfge_vv_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m2_b32_m( @@ -508,7 +508,7 @@ vbool32_t test_vmfge_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vmfge_vf_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m4_b16_m( @@ -517,7 +517,7 @@ vbool32_t test_vmfge_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfge_vv_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m4_b16_m( @@ -526,7 +526,7 @@ vbool16_t test_vmfge_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vmfge_vf_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m8_b8_m( @@ -535,7 +535,7 @@ vbool16_t test_vmfge_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfge_vv_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfge_vv_f64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m8_b8_m( @@ -544,6 +544,6 @@ vbool8_t test_vmfge_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vmfge_vf_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfge_vf_f64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfgt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfgt.c index 4a13098a806fd7c8c50010d07b9bbd3107c6554d..6663a54a004b97e397131a6b6f0766148754261a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfgt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfgt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfgt_vv_f16mf4_b64(op1, op2, vl); + return __riscv_vmfgt_vv_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16mf4_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmfgt_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16mf4_b64(op1, op2, vl); + return __riscv_vmfgt_vf_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16mf2_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmfgt_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfgt_vv_f16mf2_b32(op1, op2, vl); + return __riscv_vmfgt_vv_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16mf2_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmfgt_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16mf2_b32(op1, op2, vl); + return __riscv_vmfgt_vf_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m1_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmfgt_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfgt_vv_f16m1_b16(op1, op2, vl); + return __riscv_vmfgt_vv_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m1_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmfgt_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m1_b16(op1, op2, vl); + return __riscv_vmfgt_vf_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m2_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmfgt_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfgt_vv_f16m2_b8(op1, op2, vl); + return __riscv_vmfgt_vv_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m2_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmfgt_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m2_b8(op1, op2, vl); + return __riscv_vmfgt_vf_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m4_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmfgt_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfgt_vv_f16m4_b4(op1, op2, vl); + return __riscv_vmfgt_vv_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m4_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmfgt_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m4_b4(op1, op2, vl); + return __riscv_vmfgt_vf_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m8_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmfgt_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfgt_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfgt_vv_f16m8_b2(op1, op2, vl); + return __riscv_vmfgt_vv_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m8_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmfgt_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfgt_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m8_b2(op1, op2, vl); + return __riscv_vmfgt_vf_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32mf2_b64( @@ -121,7 +121,7 @@ vbool2_t test_vmfgt_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfgt_vv_f32mf2_b64(op1, op2, vl); + return __riscv_vmfgt_vv_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32mf2_b64( @@ -130,7 +130,7 @@ vbool64_t test_vmfgt_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { - return vmfgt_vf_f32mf2_b64(op1, op2, vl); + return __riscv_vmfgt_vf_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m1_b32( @@ -139,7 +139,7 @@ vbool64_t test_vmfgt_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfgt_vv_f32m1_b32(op1, op2, vl); + return __riscv_vmfgt_vv_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m1_b32( @@ -148,7 +148,7 @@ vbool32_t test_vmfgt_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m1_b32(op1, op2, vl); + return __riscv_vmfgt_vf_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m2_b16( @@ -157,7 +157,7 @@ vbool32_t test_vmfgt_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfgt_vv_f32m2_b16(op1, op2, vl); + return __riscv_vmfgt_vv_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m2_b16( @@ -166,7 +166,7 @@ vbool16_t test_vmfgt_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m2_b16(op1, op2, vl); + return __riscv_vmfgt_vf_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m4_b8( @@ -175,7 +175,7 @@ vbool16_t test_vmfgt_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfgt_vv_f32m4_b8(op1, op2, vl); + return __riscv_vmfgt_vv_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m4_b8( @@ -184,7 +184,7 @@ vbool8_t test_vmfgt_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m4_b8(op1, op2, vl); + return __riscv_vmfgt_vf_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m8_b4( @@ -193,7 +193,7 @@ vbool8_t test_vmfgt_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfgt_vv_f32m8_b4(op1, op2, vl); + return __riscv_vmfgt_vv_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m8_b4( @@ -202,7 +202,7 @@ vbool4_t test_vmfgt_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m8_b4(op1, op2, vl); + return __riscv_vmfgt_vf_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m1_b64( @@ -211,7 +211,7 @@ vbool4_t test_vmfgt_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfgt_vv_f64m1_b64(op1, op2, vl); + return __riscv_vmfgt_vv_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m1_b64( @@ -220,7 +220,7 @@ vbool64_t test_vmfgt_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m1_b64(op1, op2, vl); + return __riscv_vmfgt_vf_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m2_b32( @@ -229,7 +229,7 @@ vbool64_t test_vmfgt_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfgt_vv_f64m2_b32(op1, op2, vl); + return __riscv_vmfgt_vv_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m2_b32( @@ -238,7 +238,7 @@ vbool32_t test_vmfgt_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m2_b32(op1, op2, vl); + return __riscv_vmfgt_vf_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m4_b16( @@ -247,7 +247,7 @@ vbool32_t test_vmfgt_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfgt_vv_f64m4_b16(op1, op2, vl); + return __riscv_vmfgt_vv_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m4_b16( @@ -256,7 +256,7 @@ vbool16_t test_vmfgt_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m4_b16(op1, op2, vl); + return __riscv_vmfgt_vf_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m8_b8( @@ -265,7 +265,7 @@ vbool16_t test_vmfgt_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfgt_vv_f64m8_b8(op1, op2, vl); + return __riscv_vmfgt_vv_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m8_b8( @@ -274,7 +274,7 @@ vbool8_t test_vmfgt_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m8_b8(op1, op2, vl); + return __riscv_vmfgt_vf_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16mf4_b64_m( @@ -283,7 +283,7 @@ vbool8_t test_vmfgt_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfgt_vv_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16mf4_b64_m( @@ -292,7 +292,7 @@ vbool64_t test_vmfgt_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16mf2_b32_m( @@ -301,7 +301,7 @@ vbool64_t test_vmfgt_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfgt_vv_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16mf2_b32_m( @@ -310,7 +310,7 @@ vbool32_t test_vmfgt_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m1_b16_m( @@ -319,7 +319,7 @@ vbool32_t test_vmfgt_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfgt_vv_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m1_b16_m( @@ -328,7 +328,7 @@ vbool16_t test_vmfgt_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m2_b8_m( @@ -337,7 +337,7 @@ vbool16_t test_vmfgt_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfgt_vv_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m2_b8_m( @@ -346,7 +346,7 @@ vbool8_t test_vmfgt_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m4_b4_m( @@ -355,7 +355,7 @@ vbool8_t test_vmfgt_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfgt_vv_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m4_b4_m( @@ -364,7 +364,7 @@ vbool4_t test_vmfgt_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m8_b2_m( @@ -373,7 +373,7 @@ vbool4_t test_vmfgt_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfgt_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfgt_vv_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m8_b2_m( @@ -382,7 +382,7 @@ vbool2_t test_vmfgt_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfgt_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32mf2_b64_m( @@ -391,7 +391,7 @@ vbool2_t test_vmfgt_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfgt_vv_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32mf2_b64_m( @@ -400,7 +400,7 @@ vbool64_t test_vmfgt_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfgt_vf_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m1_b32_m( @@ -409,7 +409,7 @@ vbool64_t test_vmfgt_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfgt_vv_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m1_b32_m( @@ -418,7 +418,7 @@ vbool32_t test_vmfgt_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m2_b16_m( @@ -427,7 +427,7 @@ vbool32_t test_vmfgt_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfgt_vv_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m2_b16_m( @@ -436,7 +436,7 @@ vbool16_t test_vmfgt_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m4_b8_m( @@ -445,7 +445,7 @@ vbool16_t test_vmfgt_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfgt_vv_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m4_b8_m( @@ -454,7 +454,7 @@ vbool8_t test_vmfgt_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m8_b4_m( @@ -463,7 +463,7 @@ vbool8_t test_vmfgt_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfgt_vv_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m8_b4_m( @@ -472,7 +472,7 @@ vbool4_t test_vmfgt_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m1_b64_m( @@ -481,7 +481,7 @@ vbool4_t test_vmfgt_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfgt_vv_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m1_b64_m( @@ -490,7 +490,7 @@ vbool64_t test_vmfgt_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m2_b32_m( @@ -499,7 +499,7 @@ vbool64_t test_vmfgt_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfgt_vv_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m2_b32_m( @@ -508,7 +508,7 @@ vbool32_t test_vmfgt_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m4_b16_m( @@ -517,7 +517,7 @@ vbool32_t test_vmfgt_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfgt_vv_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m4_b16_m( @@ -526,7 +526,7 @@ vbool16_t test_vmfgt_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m8_b8_m( @@ -535,7 +535,7 @@ vbool16_t test_vmfgt_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfgt_vv_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfgt_vv_f64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m8_b8_m( @@ -544,6 +544,6 @@ vbool8_t test_vmfgt_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfgt_vf_f64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfle.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfle.c index 3c595196fb0c66c16da606aea149ff76b021b2be..85b1c4efd1aab3b88d576cdd10db2b6abecc578f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfle.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfle.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfle_vv_f16mf4_b64(op1, op2, vl); + return __riscv_vmfle_vv_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16mf4_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmfle_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16mf4_b64(op1, op2, vl); + return __riscv_vmfle_vf_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16mf2_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmfle_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfle_vv_f16mf2_b32(op1, op2, vl); + return __riscv_vmfle_vv_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16mf2_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmfle_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16mf2_b32(op1, op2, vl); + return __riscv_vmfle_vf_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m1_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmfle_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfle_vv_f16m1_b16(op1, op2, vl); + return __riscv_vmfle_vv_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m1_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmfle_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m1_b16(op1, op2, vl); + return __riscv_vmfle_vf_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m2_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmfle_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfle_vv_f16m2_b8(op1, op2, vl); + return __riscv_vmfle_vv_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m2_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmfle_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m2_b8(op1, op2, vl); + return __riscv_vmfle_vf_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m4_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmfle_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfle_vv_f16m4_b4(op1, op2, vl); + return __riscv_vmfle_vv_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m4_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmfle_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m4_b4(op1, op2, vl); + return __riscv_vmfle_vf_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m8_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmfle_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfle_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfle_vv_f16m8_b2(op1, op2, vl); + return __riscv_vmfle_vv_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m8_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmfle_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfle_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m8_b2(op1, op2, vl); + return __riscv_vmfle_vf_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32mf2_b64( @@ -121,7 +121,7 @@ vbool2_t test_vmfle_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfle_vv_f32mf2_b64(op1, op2, vl); + return __riscv_vmfle_vv_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32mf2_b64( @@ -130,7 +130,7 @@ vbool64_t test_vmfle_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { - return vmfle_vf_f32mf2_b64(op1, op2, vl); + return __riscv_vmfle_vf_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m1_b32( @@ -139,7 +139,7 @@ vbool64_t test_vmfle_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfle_vv_f32m1_b32(op1, op2, vl); + return __riscv_vmfle_vv_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m1_b32( @@ -148,7 +148,7 @@ vbool32_t test_vmfle_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { - return vmfle_vf_f32m1_b32(op1, op2, vl); + return __riscv_vmfle_vf_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m2_b16( @@ -157,7 +157,7 @@ vbool32_t test_vmfle_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfle_vv_f32m2_b16(op1, op2, vl); + return __riscv_vmfle_vv_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m2_b16( @@ -166,7 +166,7 @@ vbool16_t test_vmfle_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { - return vmfle_vf_f32m2_b16(op1, op2, vl); + return __riscv_vmfle_vf_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m4_b8( @@ -175,7 +175,7 @@ vbool16_t test_vmfle_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfle_vv_f32m4_b8(op1, op2, vl); + return __riscv_vmfle_vv_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m4_b8( @@ -184,7 +184,7 @@ vbool8_t test_vmfle_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { - return vmfle_vf_f32m4_b8(op1, op2, vl); + return __riscv_vmfle_vf_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m8_b4( @@ -193,7 +193,7 @@ vbool8_t test_vmfle_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfle_vv_f32m8_b4(op1, op2, vl); + return __riscv_vmfle_vv_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m8_b4( @@ -202,7 +202,7 @@ vbool4_t test_vmfle_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { - return vmfle_vf_f32m8_b4(op1, op2, vl); + return __riscv_vmfle_vf_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m1_b64( @@ -211,7 +211,7 @@ vbool4_t test_vmfle_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfle_vv_f64m1_b64(op1, op2, vl); + return __riscv_vmfle_vv_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m1_b64( @@ -220,7 +220,7 @@ vbool64_t test_vmfle_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { - return vmfle_vf_f64m1_b64(op1, op2, vl); + return __riscv_vmfle_vf_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m2_b32( @@ -229,7 +229,7 @@ vbool64_t test_vmfle_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfle_vv_f64m2_b32(op1, op2, vl); + return __riscv_vmfle_vv_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m2_b32( @@ -238,7 +238,7 @@ vbool32_t test_vmfle_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { - return vmfle_vf_f64m2_b32(op1, op2, vl); + return __riscv_vmfle_vf_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m4_b16( @@ -247,7 +247,7 @@ vbool32_t test_vmfle_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfle_vv_f64m4_b16(op1, op2, vl); + return __riscv_vmfle_vv_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m4_b16( @@ -256,7 +256,7 @@ vbool16_t test_vmfle_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { - return vmfle_vf_f64m4_b16(op1, op2, vl); + return __riscv_vmfle_vf_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m8_b8( @@ -265,7 +265,7 @@ vbool16_t test_vmfle_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfle_vv_f64m8_b8(op1, op2, vl); + return __riscv_vmfle_vv_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m8_b8( @@ -274,7 +274,7 @@ vbool8_t test_vmfle_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { - return vmfle_vf_f64m8_b8(op1, op2, vl); + return __riscv_vmfle_vf_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16mf4_b64_m( @@ -283,7 +283,7 @@ vbool8_t test_vmfle_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfle_vv_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16mf4_b64_m( @@ -292,7 +292,7 @@ vbool64_t test_vmfle_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16mf2_b32_m( @@ -301,7 +301,7 @@ vbool64_t test_vmfle_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfle_vv_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16mf2_b32_m( @@ -310,7 +310,7 @@ vbool32_t test_vmfle_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m1_b16_m( @@ -319,7 +319,7 @@ vbool32_t test_vmfle_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfle_vv_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m1_b16_m( @@ -328,7 +328,7 @@ vbool16_t test_vmfle_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m2_b8_m( @@ -337,7 +337,7 @@ vbool16_t test_vmfle_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfle_vv_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m2_b8_m( @@ -346,7 +346,7 @@ vbool8_t test_vmfle_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m4_b4_m( @@ -355,7 +355,7 @@ vbool8_t test_vmfle_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfle_vv_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m4_b4_m( @@ -364,7 +364,7 @@ vbool4_t test_vmfle_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m8_b2_m( @@ -373,7 +373,7 @@ vbool4_t test_vmfle_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfle_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfle_vv_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m8_b2_m( @@ -382,7 +382,7 @@ vbool2_t test_vmfle_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfle_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32mf2_b64_m( @@ -391,7 +391,7 @@ vbool2_t test_vmfle_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfle_vv_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32mf2_b64_m( @@ -400,7 +400,7 @@ vbool64_t test_vmfle_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfle_vf_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m1_b32_m( @@ -409,7 +409,7 @@ vbool64_t test_vmfle_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfle_vv_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m1_b32_m( @@ -418,7 +418,7 @@ vbool32_t test_vmfle_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vmfle_vf_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m2_b16_m( @@ -427,7 +427,7 @@ vbool32_t test_vmfle_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfle_vv_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m2_b16_m( @@ -436,7 +436,7 @@ vbool16_t test_vmfle_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vmfle_vf_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m4_b8_m( @@ -445,7 +445,7 @@ vbool16_t test_vmfle_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfle_vv_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m4_b8_m( @@ -454,7 +454,7 @@ vbool8_t test_vmfle_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vmfle_vf_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m8_b4_m( @@ -463,7 +463,7 @@ vbool8_t test_vmfle_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfle_vv_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m8_b4_m( @@ -472,7 +472,7 @@ vbool4_t test_vmfle_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vmfle_vf_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m1_b64_m( @@ -481,7 +481,7 @@ vbool4_t test_vmfle_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfle_vv_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m1_b64_m( @@ -490,7 +490,7 @@ vbool64_t test_vmfle_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vmfle_vf_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m2_b32_m( @@ -499,7 +499,7 @@ vbool64_t test_vmfle_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfle_vv_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m2_b32_m( @@ -508,7 +508,7 @@ vbool32_t test_vmfle_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vmfle_vf_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m4_b16_m( @@ -517,7 +517,7 @@ vbool32_t test_vmfle_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfle_vv_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m4_b16_m( @@ -526,7 +526,7 @@ vbool16_t test_vmfle_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vmfle_vf_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m8_b8_m( @@ -535,7 +535,7 @@ vbool16_t test_vmfle_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfle_vv_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfle_vv_f64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m8_b8_m( @@ -544,6 +544,6 @@ vbool8_t test_vmfle_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vmfle_vf_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfle_vf_f64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmflt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmflt.c index 44417baa4beb11fddaf5683eda9ff941860fb67e..7ea09a087875df981a91e08db62e2f5d49136da7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmflt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmflt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmflt_vv_f16mf4_b64(op1, op2, vl); + return __riscv_vmflt_vv_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16mf4_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmflt_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16mf4_b64(op1, op2, vl); + return __riscv_vmflt_vf_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16mf2_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmflt_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmflt_vv_f16mf2_b32(op1, op2, vl); + return __riscv_vmflt_vv_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16mf2_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmflt_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16mf2_b32(op1, op2, vl); + return __riscv_vmflt_vf_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m1_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmflt_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmflt_vv_f16m1_b16(op1, op2, vl); + return __riscv_vmflt_vv_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m1_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmflt_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m1_b16(op1, op2, vl); + return __riscv_vmflt_vf_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m2_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmflt_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmflt_vv_f16m2_b8(op1, op2, vl); + return __riscv_vmflt_vv_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m2_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmflt_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m2_b8(op1, op2, vl); + return __riscv_vmflt_vf_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m4_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmflt_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmflt_vv_f16m4_b4(op1, op2, vl); + return __riscv_vmflt_vv_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m4_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmflt_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m4_b4(op1, op2, vl); + return __riscv_vmflt_vf_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m8_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmflt_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmflt_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmflt_vv_f16m8_b2(op1, op2, vl); + return __riscv_vmflt_vv_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m8_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmflt_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmflt_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m8_b2(op1, op2, vl); + return __riscv_vmflt_vf_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32mf2_b64( @@ -121,7 +121,7 @@ vbool2_t test_vmflt_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmflt_vv_f32mf2_b64(op1, op2, vl); + return __riscv_vmflt_vv_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32mf2_b64( @@ -130,7 +130,7 @@ vbool64_t test_vmflt_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { - return vmflt_vf_f32mf2_b64(op1, op2, vl); + return __riscv_vmflt_vf_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m1_b32( @@ -139,7 +139,7 @@ vbool64_t test_vmflt_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmflt_vv_f32m1_b32(op1, op2, vl); + return __riscv_vmflt_vv_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m1_b32( @@ -148,7 +148,7 @@ vbool32_t test_vmflt_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { - return vmflt_vf_f32m1_b32(op1, op2, vl); + return __riscv_vmflt_vf_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m2_b16( @@ -157,7 +157,7 @@ vbool32_t test_vmflt_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmflt_vv_f32m2_b16(op1, op2, vl); + return __riscv_vmflt_vv_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m2_b16( @@ -166,7 +166,7 @@ vbool16_t test_vmflt_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { - return vmflt_vf_f32m2_b16(op1, op2, vl); + return __riscv_vmflt_vf_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m4_b8( @@ -175,7 +175,7 @@ vbool16_t test_vmflt_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmflt_vv_f32m4_b8(op1, op2, vl); + return __riscv_vmflt_vv_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m4_b8( @@ -184,7 +184,7 @@ vbool8_t test_vmflt_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { - return vmflt_vf_f32m4_b8(op1, op2, vl); + return __riscv_vmflt_vf_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m8_b4( @@ -193,7 +193,7 @@ vbool8_t test_vmflt_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmflt_vv_f32m8_b4(op1, op2, vl); + return __riscv_vmflt_vv_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m8_b4( @@ -202,7 +202,7 @@ vbool4_t test_vmflt_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { - return vmflt_vf_f32m8_b4(op1, op2, vl); + return __riscv_vmflt_vf_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m1_b64( @@ -211,7 +211,7 @@ vbool4_t test_vmflt_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmflt_vv_f64m1_b64(op1, op2, vl); + return __riscv_vmflt_vv_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m1_b64( @@ -220,7 +220,7 @@ vbool64_t test_vmflt_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { - return vmflt_vf_f64m1_b64(op1, op2, vl); + return __riscv_vmflt_vf_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m2_b32( @@ -229,7 +229,7 @@ vbool64_t test_vmflt_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmflt_vv_f64m2_b32(op1, op2, vl); + return __riscv_vmflt_vv_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m2_b32( @@ -238,7 +238,7 @@ vbool32_t test_vmflt_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { - return vmflt_vf_f64m2_b32(op1, op2, vl); + return __riscv_vmflt_vf_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m4_b16( @@ -247,7 +247,7 @@ vbool32_t test_vmflt_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmflt_vv_f64m4_b16(op1, op2, vl); + return __riscv_vmflt_vv_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m4_b16( @@ -256,7 +256,7 @@ vbool16_t test_vmflt_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { - return vmflt_vf_f64m4_b16(op1, op2, vl); + return __riscv_vmflt_vf_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m8_b8( @@ -265,7 +265,7 @@ vbool16_t test_vmflt_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmflt_vv_f64m8_b8(op1, op2, vl); + return __riscv_vmflt_vv_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m8_b8( @@ -274,7 +274,7 @@ vbool8_t test_vmflt_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { - return vmflt_vf_f64m8_b8(op1, op2, vl); + return __riscv_vmflt_vf_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16mf4_b64_m( @@ -283,7 +283,7 @@ vbool8_t test_vmflt_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmflt_vv_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16mf4_b64_m( @@ -292,7 +292,7 @@ vbool64_t test_vmflt_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16mf2_b32_m( @@ -301,7 +301,7 @@ vbool64_t test_vmflt_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmflt_vv_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16mf2_b32_m( @@ -310,7 +310,7 @@ vbool32_t test_vmflt_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m1_b16_m( @@ -319,7 +319,7 @@ vbool32_t test_vmflt_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmflt_vv_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m1_b16_m( @@ -328,7 +328,7 @@ vbool16_t test_vmflt_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m2_b8_m( @@ -337,7 +337,7 @@ vbool16_t test_vmflt_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmflt_vv_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m2_b8_m( @@ -346,7 +346,7 @@ vbool8_t test_vmflt_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m4_b4_m( @@ -355,7 +355,7 @@ vbool8_t test_vmflt_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmflt_vv_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m4_b4_m( @@ -364,7 +364,7 @@ vbool4_t test_vmflt_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m8_b2_m( @@ -373,7 +373,7 @@ vbool4_t test_vmflt_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmflt_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmflt_vv_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m8_b2_m( @@ -382,7 +382,7 @@ vbool2_t test_vmflt_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmflt_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32mf2_b64_m( @@ -391,7 +391,7 @@ vbool2_t test_vmflt_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmflt_vv_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32mf2_b64_m( @@ -400,7 +400,7 @@ vbool64_t test_vmflt_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vmflt_vf_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m1_b32_m( @@ -409,7 +409,7 @@ vbool64_t test_vmflt_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmflt_vv_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m1_b32_m( @@ -418,7 +418,7 @@ vbool32_t test_vmflt_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vmflt_vf_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m2_b16_m( @@ -427,7 +427,7 @@ vbool32_t test_vmflt_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmflt_vv_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m2_b16_m( @@ -436,7 +436,7 @@ vbool16_t test_vmflt_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vmflt_vf_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m4_b8_m( @@ -445,7 +445,7 @@ vbool16_t test_vmflt_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmflt_vv_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m4_b8_m( @@ -454,7 +454,7 @@ vbool8_t test_vmflt_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vmflt_vf_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m8_b4_m( @@ -463,7 +463,7 @@ vbool8_t test_vmflt_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmflt_vv_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m8_b4_m( @@ -472,7 +472,7 @@ vbool4_t test_vmflt_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vmflt_vf_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m1_b64_m( @@ -481,7 +481,7 @@ vbool4_t test_vmflt_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmflt_vv_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m1_b64_m( @@ -490,7 +490,7 @@ vbool64_t test_vmflt_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vmflt_vf_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m2_b32_m( @@ -499,7 +499,7 @@ vbool64_t test_vmflt_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmflt_vv_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m2_b32_m( @@ -508,7 +508,7 @@ vbool32_t test_vmflt_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vmflt_vf_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m4_b16_m( @@ -517,7 +517,7 @@ vbool32_t test_vmflt_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmflt_vv_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m4_b16_m( @@ -526,7 +526,7 @@ vbool16_t test_vmflt_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vmflt_vf_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m8_b8_m( @@ -535,7 +535,7 @@ vbool16_t test_vmflt_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmflt_vv_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmflt_vv_f64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m8_b8_m( @@ -544,6 +544,6 @@ vbool8_t test_vmflt_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vmflt_vf_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmflt_vf_f64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfne.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfne.c index 09b35196c58d223173dd4ad477866c346975d89a..44a3019cf09d8a079fd1ca25e5c9ddae407321d9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfne.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmfne.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfne_vv_f16mf4_b64(op1, op2, vl); + return __riscv_vmfne_vv_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16mf4_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmfne_vv_f16mf4_b64(vfloat16mf4_t op1, vfloat16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16mf4_b64(op1, op2, vl); + return __riscv_vmfne_vf_f16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16mf2_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmfne_vf_f16mf4_b64(vfloat16mf4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfne_vv_f16mf2_b32(op1, op2, vl); + return __riscv_vmfne_vv_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16mf2_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmfne_vv_f16mf2_b32(vfloat16mf2_t op1, vfloat16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16mf2_b32(op1, op2, vl); + return __riscv_vmfne_vf_f16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m1_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmfne_vf_f16mf2_b32(vfloat16mf2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfne_vv_f16m1_b16(op1, op2, vl); + return __riscv_vmfne_vv_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m1_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmfne_vv_f16m1_b16(vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m1_b16(op1, op2, vl); + return __riscv_vmfne_vf_f16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m2_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmfne_vf_f16m1_b16(vfloat16m1_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfne_vv_f16m2_b8(op1, op2, vl); + return __riscv_vmfne_vv_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m2_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmfne_vv_f16m2_b8(vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m2_b8(op1, op2, vl); + return __riscv_vmfne_vf_f16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m4_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmfne_vf_f16m2_b8(vfloat16m2_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfne_vv_f16m4_b4(op1, op2, vl); + return __riscv_vmfne_vv_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m4_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmfne_vv_f16m4_b4(vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m4_b4(op1, op2, vl); + return __riscv_vmfne_vf_f16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m8_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmfne_vf_f16m4_b4(vfloat16m4_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfne_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfne_vv_f16m8_b2(op1, op2, vl); + return __riscv_vmfne_vv_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m8_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmfne_vv_f16m8_b2(vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfne_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m8_b2(op1, op2, vl); + return __riscv_vmfne_vf_f16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32mf2_b64( @@ -121,7 +121,7 @@ vbool2_t test_vmfne_vf_f16m8_b2(vfloat16m8_t op1, _Float16 op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfne_vv_f32mf2_b64(op1, op2, vl); + return __riscv_vmfne_vv_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32mf2_b64( @@ -130,7 +130,7 @@ vbool64_t test_vmfne_vv_f32mf2_b64(vfloat32mf2_t op1, vfloat32mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { - return vmfne_vf_f32mf2_b64(op1, op2, vl); + return __riscv_vmfne_vf_f32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m1_b32( @@ -139,7 +139,7 @@ vbool64_t test_vmfne_vf_f32mf2_b64(vfloat32mf2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfne_vv_f32m1_b32(op1, op2, vl); + return __riscv_vmfne_vv_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m1_b32( @@ -148,7 +148,7 @@ vbool32_t test_vmfne_vv_f32m1_b32(vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { - return vmfne_vf_f32m1_b32(op1, op2, vl); + return __riscv_vmfne_vf_f32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m2_b16( @@ -157,7 +157,7 @@ vbool32_t test_vmfne_vf_f32m1_b32(vfloat32m1_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfne_vv_f32m2_b16(op1, op2, vl); + return __riscv_vmfne_vv_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m2_b16( @@ -166,7 +166,7 @@ vbool16_t test_vmfne_vv_f32m2_b16(vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { - return vmfne_vf_f32m2_b16(op1, op2, vl); + return __riscv_vmfne_vf_f32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m4_b8( @@ -175,7 +175,7 @@ vbool16_t test_vmfne_vf_f32m2_b16(vfloat32m2_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfne_vv_f32m4_b8(op1, op2, vl); + return __riscv_vmfne_vv_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m4_b8( @@ -184,7 +184,7 @@ vbool8_t test_vmfne_vv_f32m4_b8(vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { - return vmfne_vf_f32m4_b8(op1, op2, vl); + return __riscv_vmfne_vf_f32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m8_b4( @@ -193,7 +193,7 @@ vbool8_t test_vmfne_vf_f32m4_b8(vfloat32m4_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfne_vv_f32m8_b4(op1, op2, vl); + return __riscv_vmfne_vv_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m8_b4( @@ -202,7 +202,7 @@ vbool4_t test_vmfne_vv_f32m8_b4(vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { - return vmfne_vf_f32m8_b4(op1, op2, vl); + return __riscv_vmfne_vf_f32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m1_b64( @@ -211,7 +211,7 @@ vbool4_t test_vmfne_vf_f32m8_b4(vfloat32m8_t op1, float op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfne_vv_f64m1_b64(op1, op2, vl); + return __riscv_vmfne_vv_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m1_b64( @@ -220,7 +220,7 @@ vbool64_t test_vmfne_vv_f64m1_b64(vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { - return vmfne_vf_f64m1_b64(op1, op2, vl); + return __riscv_vmfne_vf_f64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m2_b32( @@ -229,7 +229,7 @@ vbool64_t test_vmfne_vf_f64m1_b64(vfloat64m1_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfne_vv_f64m2_b32(op1, op2, vl); + return __riscv_vmfne_vv_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m2_b32( @@ -238,7 +238,7 @@ vbool32_t test_vmfne_vv_f64m2_b32(vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { - return vmfne_vf_f64m2_b32(op1, op2, vl); + return __riscv_vmfne_vf_f64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m4_b16( @@ -247,7 +247,7 @@ vbool32_t test_vmfne_vf_f64m2_b32(vfloat64m2_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfne_vv_f64m4_b16(op1, op2, vl); + return __riscv_vmfne_vv_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m4_b16( @@ -256,7 +256,7 @@ vbool16_t test_vmfne_vv_f64m4_b16(vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { - return vmfne_vf_f64m4_b16(op1, op2, vl); + return __riscv_vmfne_vf_f64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m8_b8( @@ -265,7 +265,7 @@ vbool16_t test_vmfne_vf_f64m4_b16(vfloat64m4_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfne_vv_f64m8_b8(op1, op2, vl); + return __riscv_vmfne_vv_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m8_b8( @@ -274,7 +274,7 @@ vbool8_t test_vmfne_vv_f64m8_b8(vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { - return vmfne_vf_f64m8_b8(op1, op2, vl); + return __riscv_vmfne_vf_f64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16mf4_b64_m( @@ -283,7 +283,7 @@ vbool8_t test_vmfne_vf_f64m8_b8(vfloat64m8_t op1, double op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfne_vv_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16mf4_b64_m( @@ -292,7 +292,7 @@ vbool64_t test_vmfne_vv_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16mf2_b32_m( @@ -301,7 +301,7 @@ vbool64_t test_vmfne_vf_f16mf4_b64_m(vbool64_t mask, vfloat16mf4_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfne_vv_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16mf2_b32_m( @@ -310,7 +310,7 @@ vbool32_t test_vmfne_vv_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m1_b16_m( @@ -319,7 +319,7 @@ vbool32_t test_vmfne_vf_f16mf2_b32_m(vbool32_t mask, vfloat16mf2_t op1, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfne_vv_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m1_b16_m( @@ -328,7 +328,7 @@ vbool16_t test_vmfne_vv_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m2_b8_m( @@ -337,7 +337,7 @@ vbool16_t test_vmfne_vf_f16m1_b16_m(vbool16_t mask, vfloat16m1_t op1, _Float16 o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfne_vv_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m2_b8_m( @@ -346,7 +346,7 @@ vbool8_t test_vmfne_vv_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m4_b4_m( @@ -355,7 +355,7 @@ vbool8_t test_vmfne_vf_f16m2_b8_m(vbool8_t mask, vfloat16m2_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfne_vv_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m4_b4_m( @@ -364,7 +364,7 @@ vbool4_t test_vmfne_vv_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m8_b2_m( @@ -373,7 +373,7 @@ vbool4_t test_vmfne_vf_f16m4_b4_m(vbool4_t mask, vfloat16m4_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfne_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfne_vv_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m8_b2_m( @@ -382,7 +382,7 @@ vbool2_t test_vmfne_vv_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfne_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32mf2_b64_m( @@ -391,7 +391,7 @@ vbool2_t test_vmfne_vf_f16m8_b2_m(vbool2_t mask, vfloat16m8_t op1, _Float16 op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfne_vv_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32mf2_b64_m( @@ -400,7 +400,7 @@ vbool64_t test_vmfne_vv_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfne_vf_f32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m1_b32_m( @@ -409,7 +409,7 @@ vbool64_t test_vmfne_vf_f32mf2_b64_m(vbool64_t mask, vfloat32mf2_t op1, float op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfne_vv_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m1_b32_m( @@ -418,7 +418,7 @@ vbool32_t test_vmfne_vv_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, size_t vl) { - return vmfne_vf_f32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m2_b16_m( @@ -427,7 +427,7 @@ vbool32_t test_vmfne_vf_f32m1_b32_m(vbool32_t mask, vfloat32m1_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfne_vv_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m2_b16_m( @@ -436,7 +436,7 @@ vbool16_t test_vmfne_vv_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, size_t vl) { - return vmfne_vf_f32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m4_b8_m( @@ -445,7 +445,7 @@ vbool16_t test_vmfne_vf_f32m2_b16_m(vbool16_t mask, vfloat32m2_t op1, float op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfne_vv_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m4_b8_m( @@ -454,7 +454,7 @@ vbool8_t test_vmfne_vv_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, size_t vl) { - return vmfne_vf_f32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m8_b4_m( @@ -463,7 +463,7 @@ vbool8_t test_vmfne_vf_f32m4_b8_m(vbool8_t mask, vfloat32m4_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfne_vv_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m8_b4_m( @@ -472,7 +472,7 @@ vbool4_t test_vmfne_vv_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, size_t vl) { - return vmfne_vf_f32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m1_b64_m( @@ -481,7 +481,7 @@ vbool4_t test_vmfne_vf_f32m8_b4_m(vbool4_t mask, vfloat32m8_t op1, float op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfne_vv_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m1_b64_m( @@ -490,7 +490,7 @@ vbool64_t test_vmfne_vv_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2, size_t vl) { - return vmfne_vf_f64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m2_b32_m( @@ -499,7 +499,7 @@ vbool64_t test_vmfne_vf_f64m1_b64_m(vbool64_t mask, vfloat64m1_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfne_vv_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m2_b32_m( @@ -508,7 +508,7 @@ vbool32_t test_vmfne_vv_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2, size_t vl) { - return vmfne_vf_f64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m4_b16_m( @@ -517,7 +517,7 @@ vbool32_t test_vmfne_vf_f64m2_b32_m(vbool32_t mask, vfloat64m2_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfne_vv_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m4_b16_m( @@ -526,7 +526,7 @@ vbool16_t test_vmfne_vv_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2, size_t vl) { - return vmfne_vf_f64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m8_b8_m( @@ -535,7 +535,7 @@ vbool16_t test_vmfne_vf_f64m4_b16_m(vbool16_t mask, vfloat64m4_t op1, double op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfne_vv_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfne_vv_f64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m8_b8_m( @@ -544,6 +544,6 @@ vbool8_t test_vmfne_vv_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f64m8_b8_m(vbool8_t mask, vfloat64m8_t op1, double op2, size_t vl) { - return vmfne_vf_f64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmfne_vf_f64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmin.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmin.c index dc160308dc8c986a737ef91540e4a3898d104433..daec44572ddfd0d14e56e41018bf2d09b8cc7149 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmin.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmin.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmin_vv_i8mf8(op1, op2, vl); + return __riscv_vmin_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vmin_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf8(op1, op2, vl); + return __riscv_vmin_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vmin_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmin_vv_i8mf4(op1, op2, vl); + return __riscv_vmin_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vmin_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf4(op1, op2, vl); + return __riscv_vmin_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vmin_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmin_vv_i8mf2(op1, op2, vl); + return __riscv_vmin_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vmin_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf2(op1, op2, vl); + return __riscv_vmin_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vmin_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmin_vv_i8m1(op1, op2, vl); + return __riscv_vmin_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vmin_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m1(op1, op2, vl); + return __riscv_vmin_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vmin_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmin_vv_i8m2(op1, op2, vl); + return __riscv_vmin_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vmin_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m2(op1, op2, vl); + return __riscv_vmin_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vmin_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmin_vv_i8m4(op1, op2, vl); + return __riscv_vmin_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vmin_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m4(op1, op2, vl); + return __riscv_vmin_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vmin_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmin_vv_i8m8(op1, op2, vl); + return __riscv_vmin_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vmin_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m8(op1, op2, vl); + return __riscv_vmin_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vmin_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmin_vv_i16mf4(op1, op2, vl); + return __riscv_vmin_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vmin_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf4(op1, op2, vl); + return __riscv_vmin_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vmin_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmin_vv_i16mf2(op1, op2, vl); + return __riscv_vmin_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vmin_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf2(op1, op2, vl); + return __riscv_vmin_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vmin_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmin_vv_i16m1(op1, op2, vl); + return __riscv_vmin_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vmin_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m1(op1, op2, vl); + return __riscv_vmin_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vmin_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmin_vv_i16m2(op1, op2, vl); + return __riscv_vmin_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vmin_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m2(op1, op2, vl); + return __riscv_vmin_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vmin_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmin_vv_i16m4(op1, op2, vl); + return __riscv_vmin_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vmin_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m4(op1, op2, vl); + return __riscv_vmin_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vmin_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmin_vv_i16m8(op1, op2, vl); + return __riscv_vmin_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vmin_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m8(op1, op2, vl); + return __riscv_vmin_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vmin_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmin_vv_i32mf2(op1, op2, vl); + return __riscv_vmin_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vmin_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32mf2(op1, op2, vl); + return __riscv_vmin_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vmin_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmin_vv_i32m1(op1, op2, vl); + return __riscv_vmin_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vmin_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m1(op1, op2, vl); + return __riscv_vmin_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vmin_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmin_vv_i32m2(op1, op2, vl); + return __riscv_vmin_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vmin_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m2(op1, op2, vl); + return __riscv_vmin_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vmin_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmin_vv_i32m4(op1, op2, vl); + return __riscv_vmin_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vmin_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m4(op1, op2, vl); + return __riscv_vmin_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vmin_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmin_vv_i32m8(op1, op2, vl); + return __riscv_vmin_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vmin_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m8(op1, op2, vl); + return __riscv_vmin_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vmin_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmin_vv_i64m1(op1, op2, vl); + return __riscv_vmin_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vmin_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m1(op1, op2, vl); + return __riscv_vmin_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vmin_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmin_vv_i64m2(op1, op2, vl); + return __riscv_vmin_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vmin_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m2(op1, op2, vl); + return __riscv_vmin_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vmin_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmin_vv_i64m4(op1, op2, vl); + return __riscv_vmin_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vmin_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m4(op1, op2, vl); + return __riscv_vmin_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vmin_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmin_vv_i64m8(op1, op2, vl); + return __riscv_vmin_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vmin_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m8(op1, op2, vl); + return __riscv_vmin_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vmin_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmin_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vmin_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vmin_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmin_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vmin_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vmin_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmin_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vmin_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vmin_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmin_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vmin_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vmin_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmin_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vmin_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vmin_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmin_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vmin_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vmin_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmin_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vmin_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vmin_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmin_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vmin_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vmin_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmin_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vmin_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vmin_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmin_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vmin_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vmin_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmin_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vmin_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vmin_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmin_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vmin_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vmin_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmin_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vmin_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vmin_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmin_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vmin_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vmin_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmin_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vmin_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vmin_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmin_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vmin_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vmin_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmin_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vmin_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vmin_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmin_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vmin_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vmin_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmin_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vmin_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vmin_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmin_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vmin_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vmin_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmin_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vmin_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vmin_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmin_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vmin_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vmin_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vmin_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vminu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vminu.c index 4fb6f72678147604415b75bb66b3584c1f51032c..b1944defaa341926d61ffbfa9e80818029e18122 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vminu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vminu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vminu_vv_u8mf8(op1, op2, vl); + return __riscv_vminu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vminu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf8(op1, op2, vl); + return __riscv_vminu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vminu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vminu_vv_u8mf4(op1, op2, vl); + return __riscv_vminu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vminu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf4(op1, op2, vl); + return __riscv_vminu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vminu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vminu_vv_u8mf2(op1, op2, vl); + return __riscv_vminu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vminu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf2(op1, op2, vl); + return __riscv_vminu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vminu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vminu_vv_u8m1(op1, op2, vl); + return __riscv_vminu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vminu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m1(op1, op2, vl); + return __riscv_vminu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vminu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vminu_vv_u8m2(op1, op2, vl); + return __riscv_vminu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vminu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m2(op1, op2, vl); + return __riscv_vminu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vminu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vminu_vv_u8m4(op1, op2, vl); + return __riscv_vminu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vminu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m4(op1, op2, vl); + return __riscv_vminu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vminu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vminu_vv_u8m8(op1, op2, vl); + return __riscv_vminu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vminu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m8(op1, op2, vl); + return __riscv_vminu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vminu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vminu_vv_u16mf4(op1, op2, vl); + return __riscv_vminu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vminu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf4(op1, op2, vl); + return __riscv_vminu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vminu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vminu_vv_u16mf2(op1, op2, vl); + return __riscv_vminu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vminu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf2(op1, op2, vl); + return __riscv_vminu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vminu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vminu_vv_u16m1(op1, op2, vl); + return __riscv_vminu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vminu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m1(op1, op2, vl); + return __riscv_vminu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vminu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vminu_vv_u16m2(op1, op2, vl); + return __riscv_vminu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vminu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m2(op1, op2, vl); + return __riscv_vminu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vminu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vminu_vv_u16m4(op1, op2, vl); + return __riscv_vminu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vminu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m4(op1, op2, vl); + return __riscv_vminu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vminu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vminu_vv_u16m8(op1, op2, vl); + return __riscv_vminu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vminu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m8(op1, op2, vl); + return __riscv_vminu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vminu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vminu_vv_u32mf2(op1, op2, vl); + return __riscv_vminu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vminu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32mf2(op1, op2, vl); + return __riscv_vminu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vminu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vminu_vv_u32m1(op1, op2, vl); + return __riscv_vminu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vminu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m1(op1, op2, vl); + return __riscv_vminu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vminu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vminu_vv_u32m2(op1, op2, vl); + return __riscv_vminu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vminu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m2(op1, op2, vl); + return __riscv_vminu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vminu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vminu_vv_u32m4(op1, op2, vl); + return __riscv_vminu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vminu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m4(op1, op2, vl); + return __riscv_vminu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vminu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vminu_vv_u32m8(op1, op2, vl); + return __riscv_vminu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vminu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m8(op1, op2, vl); + return __riscv_vminu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vminu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vminu_vv_u64m1(op1, op2, vl); + return __riscv_vminu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vminu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m1(op1, op2, vl); + return __riscv_vminu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vminu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vminu_vv_u64m2(op1, op2, vl); + return __riscv_vminu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vminu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m2(op1, op2, vl); + return __riscv_vminu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vminu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vminu_vv_u64m4(op1, op2, vl); + return __riscv_vminu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vminu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m4(op1, op2, vl); + return __riscv_vminu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vminu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vminu_vv_u64m8(op1, op2, vl); + return __riscv_vminu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vminu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m8(op1, op2, vl); + return __riscv_vminu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vminu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vminu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vminu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vminu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vminu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vminu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vminu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vminu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vminu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vminu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vminu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vminu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vminu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vminu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vminu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vminu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vminu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vminu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vminu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vminu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vminu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vminu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vminu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vminu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vminu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vminu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vminu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vminu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vminu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vminu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vminu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vminu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vminu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vminu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vminu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vminu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vminu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vminu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vminu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vminu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vminu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vminu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vminu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vminu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vminu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vminu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vminu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vminu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vminu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vminu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vminu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vminu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vminu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vminu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vminu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vminu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vminu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vminu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vminu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vminu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vminu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vminu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vminu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vminu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vminu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vminu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vminu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vminu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmmv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmmv.c index b318cba0f11af3ca9ce1b2fa374111442bf987f3..4108bdced270c0a11c766e1e3abe265e08b29521 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmmv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmmv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmmv_m_b1(vbool1_t op1, size_t vl) { - return vmmv_m_b1(op1, vl); + return __riscv_vmmv_m_b1(op1, vl); } // CHECK-RV64-LABEL: @test_vmmv_m_b2( @@ -22,7 +22,7 @@ vbool1_t test_vmmv_m_b1(vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmmv_m_b2(vbool2_t op1, size_t vl) { - return vmmv_m_b2(op1, vl); + return __riscv_vmmv_m_b2(op1, vl); } // CHECK-RV64-LABEL: @test_vmmv_m_b4( @@ -31,7 +31,7 @@ vbool2_t test_vmmv_m_b2(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmmv_m_b4(vbool4_t op1, size_t vl) { - return vmmv_m_b4(op1, vl); + return __riscv_vmmv_m_b4(op1, vl); } // CHECK-RV64-LABEL: @test_vmmv_m_b8( @@ -40,7 +40,7 @@ vbool4_t test_vmmv_m_b4(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmmv_m_b8(vbool8_t op1, size_t vl) { - return vmmv_m_b8(op1, vl); + return __riscv_vmmv_m_b8(op1, vl); } // CHECK-RV64-LABEL: @test_vmmv_m_b16( @@ -49,7 +49,7 @@ vbool8_t test_vmmv_m_b8(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmmv_m_b16(vbool16_t op1, size_t vl) { - return vmmv_m_b16(op1, vl); + return __riscv_vmmv_m_b16(op1, vl); } // CHECK-RV64-LABEL: @test_vmmv_m_b32( @@ -58,7 +58,7 @@ vbool16_t test_vmmv_m_b16(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmmv_m_b32(vbool32_t op1, size_t vl) { - return vmmv_m_b32(op1, vl); + return __riscv_vmmv_m_b32(op1, vl); } // CHECK-RV64-LABEL: @test_vmmv_m_b64( @@ -67,6 +67,6 @@ vbool32_t test_vmmv_m_b32(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmmv_m_b64(vbool64_t op1, size_t vl) { - return vmmv_m_b64(op1, vl); + return __riscv_vmmv_m_b64(op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnand.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnand.c index b9a33f67e52f9f4535ce101e360c8a54f4888a1b..4550b061987355774c18775761e357538b6a0d77 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnand.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnand.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmnand_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { - return vmnand_mm_b1(op1, op2, vl); + return __riscv_vmnand_mm_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnand_mm_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmnand_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmnand_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { - return vmnand_mm_b2(op1, op2, vl); + return __riscv_vmnand_mm_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnand_mm_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmnand_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmnand_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { - return vmnand_mm_b4(op1, op2, vl); + return __riscv_vmnand_mm_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnand_mm_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmnand_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmnand_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { - return vmnand_mm_b8(op1, op2, vl); + return __riscv_vmnand_mm_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnand_mm_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmnand_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmnand_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { - return vmnand_mm_b16(op1, op2, vl); + return __riscv_vmnand_mm_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnand_mm_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmnand_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmnand_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { - return vmnand_mm_b32(op1, op2, vl); + return __riscv_vmnand_mm_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnand_mm_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmnand_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmnand_mm_b64(vbool64_t op1, vbool64_t op2, size_t vl) { - return vmnand_mm_b64(op1, op2, vl); + return __riscv_vmnand_mm_b64(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnor.c index f8180878162bc378e953b5240efdade5dd6bf780..f6c938d9d2b6758afb3ea1aa970f7fd1472f1e69 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmnor_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { - return vmnor_mm_b1(op1, op2, vl); + return __riscv_vmnor_mm_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnor_mm_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmnor_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmnor_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { - return vmnor_mm_b2(op1, op2, vl); + return __riscv_vmnor_mm_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnor_mm_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmnor_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmnor_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { - return vmnor_mm_b4(op1, op2, vl); + return __riscv_vmnor_mm_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnor_mm_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmnor_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmnor_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { - return vmnor_mm_b8(op1, op2, vl); + return __riscv_vmnor_mm_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnor_mm_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmnor_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmnor_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { - return vmnor_mm_b16(op1, op2, vl); + return __riscv_vmnor_mm_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnor_mm_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmnor_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmnor_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { - return vmnor_mm_b32(op1, op2, vl); + return __riscv_vmnor_mm_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmnor_mm_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmnor_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmnor_mm_b64(vbool64_t op1, vbool64_t op2, size_t vl) { - return vmnor_mm_b64(op1, op2, vl); + return __riscv_vmnor_mm_b64(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnot.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnot.c index 13eccf1ea3dd8d2ac851ff9c31e0ee16e74dc52f..ad954171536160f129652b9f510d6c66155618a1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnot.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmnot.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmnot_m_b1(vbool1_t op1, size_t vl) { - return vmnot_m_b1(op1, vl); + return __riscv_vmnot_m_b1(op1, vl); } // CHECK-RV64-LABEL: @test_vmnot_m_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmnot_m_b1(vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmnot_m_b2(vbool2_t op1, size_t vl) { - return vmnot_m_b2(op1, vl); + return __riscv_vmnot_m_b2(op1, vl); } // CHECK-RV64-LABEL: @test_vmnot_m_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmnot_m_b2(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmnot_m_b4(vbool4_t op1, size_t vl) { - return vmnot_m_b4(op1, vl); + return __riscv_vmnot_m_b4(op1, vl); } // CHECK-RV64-LABEL: @test_vmnot_m_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmnot_m_b4(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmnot_m_b8(vbool8_t op1, size_t vl) { - return vmnot_m_b8(op1, vl); + return __riscv_vmnot_m_b8(op1, vl); } // CHECK-RV64-LABEL: @test_vmnot_m_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmnot_m_b8(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmnot_m_b16(vbool16_t op1, size_t vl) { - return vmnot_m_b16(op1, vl); + return __riscv_vmnot_m_b16(op1, vl); } // CHECK-RV64-LABEL: @test_vmnot_m_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmnot_m_b16(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmnot_m_b32(vbool32_t op1, size_t vl) { - return vmnot_m_b32(op1, vl); + return __riscv_vmnot_m_b32(op1, vl); } // CHECK-RV64-LABEL: @test_vmnot_m_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmnot_m_b32(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmnot_m_b64(vbool64_t op1, size_t vl) { - return vmnot_m_b64(op1, vl); + return __riscv_vmnot_m_b64(op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmor.c index 8533d795d64649ba5a23384ee86324f9281d66b9..a65fb4c08862a81a40fd3a2e8a399d06e218a049 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmor_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { - return vmor_mm_b1(op1, op2, vl); + return __riscv_vmor_mm_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmor_mm_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmor_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmor_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { - return vmor_mm_b2(op1, op2, vl); + return __riscv_vmor_mm_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmor_mm_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmor_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmor_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { - return vmor_mm_b4(op1, op2, vl); + return __riscv_vmor_mm_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmor_mm_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmor_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmor_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { - return vmor_mm_b8(op1, op2, vl); + return __riscv_vmor_mm_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmor_mm_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmor_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmor_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { - return vmor_mm_b16(op1, op2, vl); + return __riscv_vmor_mm_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmor_mm_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmor_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmor_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { - return vmor_mm_b32(op1, op2, vl); + return __riscv_vmor_mm_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmor_mm_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmor_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmor_mm_b64(vbool64_t op1, vbool64_t op2, size_t vl) { - return vmor_mm_b64(op1, op2, vl); + return __riscv_vmor_mm_b64(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmorn.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmorn.c index 4bd8ee0376a3eba7d93309e89b14bf9e62ad98e4..5321d56854964d4a97c6aa6b0661acfdc4aac119 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmorn.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmorn.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmorn_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { - return vmorn_mm_b1(op1, op2, vl); + return __riscv_vmorn_mm_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmorn_mm_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmorn_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmorn_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { - return vmorn_mm_b2(op1, op2, vl); + return __riscv_vmorn_mm_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmorn_mm_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmorn_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmorn_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { - return vmorn_mm_b4(op1, op2, vl); + return __riscv_vmorn_mm_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmorn_mm_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmorn_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmorn_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { - return vmorn_mm_b8(op1, op2, vl); + return __riscv_vmorn_mm_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmorn_mm_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmorn_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmorn_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { - return vmorn_mm_b16(op1, op2, vl); + return __riscv_vmorn_mm_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmorn_mm_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmorn_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmorn_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { - return vmorn_mm_b32(op1, op2, vl); + return __riscv_vmorn_mm_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmorn_mm_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmorn_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmorn_mm_b64(vbool64_t op1, vbool64_t op2, size_t vl) { - return vmorn_mm_b64(op1, op2, vl); + return __riscv_vmorn_mm_b64(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsbc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsbc.c index c6a6289b2793e5f805b1887bc433972e3e89f4b3..239a77c01505d6606fec930b20ff147afca34f3f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsbc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsbc.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vvm_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vvm_i8mf8_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i8mf8_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i8mf8_b64( @@ -21,7 +21,7 @@ vbool64_t test_vmsbc_vvm_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, vbool64_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vxm_i8mf8_b64(vint8mf8_t op1, int8_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vxm_i8mf8_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i8mf8_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i8mf8_b64( @@ -30,7 +30,7 @@ vbool64_t test_vmsbc_vxm_i8mf8_b64(vint8mf8_t op1, int8_t op2, vbool64_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsbc_vv_i8mf8_b64(op1, op2, vl); + return __riscv_vmsbc_vv_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i8mf8_b64( @@ -39,7 +39,7 @@ vbool64_t test_vmsbc_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsbc_vx_i8mf8_b64(op1, op2, vl); + return __riscv_vmsbc_vx_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i8mf4_b32( @@ -48,7 +48,7 @@ vbool64_t test_vmsbc_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vvm_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vvm_i8mf4_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i8mf4_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i8mf4_b32( @@ -57,7 +57,7 @@ vbool32_t test_vmsbc_vvm_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, vbool32_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vxm_i8mf4_b32(vint8mf4_t op1, int8_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vxm_i8mf4_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i8mf4_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i8mf4_b32( @@ -66,7 +66,7 @@ vbool32_t test_vmsbc_vxm_i8mf4_b32(vint8mf4_t op1, int8_t op2, vbool32_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsbc_vv_i8mf4_b32(op1, op2, vl); + return __riscv_vmsbc_vv_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i8mf4_b32( @@ -75,7 +75,7 @@ vbool32_t test_vmsbc_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsbc_vx_i8mf4_b32(op1, op2, vl); + return __riscv_vmsbc_vx_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i8mf2_b16( @@ -84,7 +84,7 @@ vbool32_t test_vmsbc_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vvm_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vvm_i8mf2_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i8mf2_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i8mf2_b16( @@ -93,7 +93,7 @@ vbool16_t test_vmsbc_vvm_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, vbool16_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vxm_i8mf2_b16(vint8mf2_t op1, int8_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vxm_i8mf2_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i8mf2_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i8mf2_b16( @@ -102,7 +102,7 @@ vbool16_t test_vmsbc_vxm_i8mf2_b16(vint8mf2_t op1, int8_t op2, vbool16_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsbc_vv_i8mf2_b16(op1, op2, vl); + return __riscv_vmsbc_vv_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i8mf2_b16( @@ -111,7 +111,7 @@ vbool16_t test_vmsbc_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsbc_vx_i8mf2_b16(op1, op2, vl); + return __riscv_vmsbc_vx_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i8m1_b8( @@ -120,7 +120,7 @@ vbool16_t test_vmsbc_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vvm_i8m1_b8(vint8m1_t op1, vint8m1_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vvm_i8m1_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i8m1_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i8m1_b8( @@ -129,7 +129,7 @@ vbool8_t test_vmsbc_vvm_i8m1_b8(vint8m1_t op1, vint8m1_t op2, vbool8_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vxm_i8m1_b8(vint8m1_t op1, int8_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vxm_i8m1_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i8m1_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i8m1_b8( @@ -138,7 +138,7 @@ vbool8_t test_vmsbc_vxm_i8m1_b8(vint8m1_t op1, int8_t op2, vbool8_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsbc_vv_i8m1_b8(op1, op2, vl); + return __riscv_vmsbc_vv_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i8m1_b8( @@ -147,7 +147,7 @@ vbool8_t test_vmsbc_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { - return vmsbc_vx_i8m1_b8(op1, op2, vl); + return __riscv_vmsbc_vx_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i8m2_b4( @@ -156,7 +156,7 @@ vbool8_t test_vmsbc_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vvm_i8m2_b4(vint8m2_t op1, vint8m2_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vvm_i8m2_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i8m2_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i8m2_b4( @@ -165,7 +165,7 @@ vbool4_t test_vmsbc_vvm_i8m2_b4(vint8m2_t op1, vint8m2_t op2, vbool4_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vxm_i8m2_b4(vint8m2_t op1, int8_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vxm_i8m2_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i8m2_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i8m2_b4( @@ -174,7 +174,7 @@ vbool4_t test_vmsbc_vxm_i8m2_b4(vint8m2_t op1, int8_t op2, vbool4_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsbc_vv_i8m2_b4(op1, op2, vl); + return __riscv_vmsbc_vv_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i8m2_b4( @@ -183,7 +183,7 @@ vbool4_t test_vmsbc_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { - return vmsbc_vx_i8m2_b4(op1, op2, vl); + return __riscv_vmsbc_vx_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i8m4_b2( @@ -192,7 +192,7 @@ vbool4_t test_vmsbc_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vvm_i8m4_b2(vint8m4_t op1, vint8m4_t op2, vbool2_t borrowin, size_t vl) { - return vmsbc_vvm_i8m4_b2(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i8m4_b2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i8m4_b2( @@ -201,7 +201,7 @@ vbool2_t test_vmsbc_vvm_i8m4_b2(vint8m4_t op1, vint8m4_t op2, vbool2_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vxm_i8m4_b2(vint8m4_t op1, int8_t op2, vbool2_t borrowin, size_t vl) { - return vmsbc_vxm_i8m4_b2(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i8m4_b2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i8m4_b2( @@ -210,7 +210,7 @@ vbool2_t test_vmsbc_vxm_i8m4_b2(vint8m4_t op1, int8_t op2, vbool2_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsbc_vv_i8m4_b2(op1, op2, vl); + return __riscv_vmsbc_vv_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i8m4_b2( @@ -219,7 +219,7 @@ vbool2_t test_vmsbc_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { - return vmsbc_vx_i8m4_b2(op1, op2, vl); + return __riscv_vmsbc_vx_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i8m8_b1( @@ -228,7 +228,7 @@ vbool2_t test_vmsbc_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbc_vvm_i8m8_b1(vint8m8_t op1, vint8m8_t op2, vbool1_t borrowin, size_t vl) { - return vmsbc_vvm_i8m8_b1(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i8m8_b1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i8m8_b1( @@ -237,7 +237,7 @@ vbool1_t test_vmsbc_vvm_i8m8_b1(vint8m8_t op1, vint8m8_t op2, vbool1_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbc_vxm_i8m8_b1(vint8m8_t op1, int8_t op2, vbool1_t borrowin, size_t vl) { - return vmsbc_vxm_i8m8_b1(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i8m8_b1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i8m8_b1( @@ -246,7 +246,7 @@ vbool1_t test_vmsbc_vxm_i8m8_b1(vint8m8_t op1, int8_t op2, vbool1_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbc_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsbc_vv_i8m8_b1(op1, op2, vl); + return __riscv_vmsbc_vv_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i8m8_b1( @@ -255,7 +255,7 @@ vbool1_t test_vmsbc_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbc_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { - return vmsbc_vx_i8m8_b1(op1, op2, vl); + return __riscv_vmsbc_vx_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i16mf4_b64( @@ -264,7 +264,7 @@ vbool1_t test_vmsbc_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vvm_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vvm_i16mf4_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i16mf4_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i16mf4_b64( @@ -273,7 +273,7 @@ vbool64_t test_vmsbc_vvm_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vxm_i16mf4_b64(vint16mf4_t op1, int16_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vxm_i16mf4_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i16mf4_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i16mf4_b64( @@ -282,7 +282,7 @@ vbool64_t test_vmsbc_vxm_i16mf4_b64(vint16mf4_t op1, int16_t op2, vbool64_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsbc_vv_i16mf4_b64(op1, op2, vl); + return __riscv_vmsbc_vv_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i16mf4_b64( @@ -291,7 +291,7 @@ vbool64_t test_vmsbc_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsbc_vx_i16mf4_b64(op1, op2, vl); + return __riscv_vmsbc_vx_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i16mf2_b32( @@ -300,7 +300,7 @@ vbool64_t test_vmsbc_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vvm_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vvm_i16mf2_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i16mf2_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i16mf2_b32( @@ -309,7 +309,7 @@ vbool32_t test_vmsbc_vvm_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, vbool32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vxm_i16mf2_b32(vint16mf2_t op1, int16_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vxm_i16mf2_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i16mf2_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i16mf2_b32( @@ -318,7 +318,7 @@ vbool32_t test_vmsbc_vxm_i16mf2_b32(vint16mf2_t op1, int16_t op2, vbool32_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsbc_vv_i16mf2_b32(op1, op2, vl); + return __riscv_vmsbc_vv_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i16mf2_b32( @@ -327,7 +327,7 @@ vbool32_t test_vmsbc_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsbc_vx_i16mf2_b32(op1, op2, vl); + return __riscv_vmsbc_vx_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i16m1_b16( @@ -336,7 +336,7 @@ vbool32_t test_vmsbc_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vvm_i16m1_b16(vint16m1_t op1, vint16m1_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vvm_i16m1_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i16m1_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i16m1_b16( @@ -345,7 +345,7 @@ vbool16_t test_vmsbc_vvm_i16m1_b16(vint16m1_t op1, vint16m1_t op2, vbool16_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vxm_i16m1_b16(vint16m1_t op1, int16_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vxm_i16m1_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i16m1_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i16m1_b16( @@ -354,7 +354,7 @@ vbool16_t test_vmsbc_vxm_i16m1_b16(vint16m1_t op1, int16_t op2, vbool16_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsbc_vv_i16m1_b16(op1, op2, vl); + return __riscv_vmsbc_vv_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i16m1_b16( @@ -363,7 +363,7 @@ vbool16_t test_vmsbc_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { - return vmsbc_vx_i16m1_b16(op1, op2, vl); + return __riscv_vmsbc_vx_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i16m2_b8( @@ -372,7 +372,7 @@ vbool16_t test_vmsbc_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vvm_i16m2_b8(vint16m2_t op1, vint16m2_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vvm_i16m2_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i16m2_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i16m2_b8( @@ -381,7 +381,7 @@ vbool8_t test_vmsbc_vvm_i16m2_b8(vint16m2_t op1, vint16m2_t op2, vbool8_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vxm_i16m2_b8(vint16m2_t op1, int16_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vxm_i16m2_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i16m2_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i16m2_b8( @@ -390,7 +390,7 @@ vbool8_t test_vmsbc_vxm_i16m2_b8(vint16m2_t op1, int16_t op2, vbool8_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsbc_vv_i16m2_b8(op1, op2, vl); + return __riscv_vmsbc_vv_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i16m2_b8( @@ -399,7 +399,7 @@ vbool8_t test_vmsbc_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { - return vmsbc_vx_i16m2_b8(op1, op2, vl); + return __riscv_vmsbc_vx_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i16m4_b4( @@ -408,7 +408,7 @@ vbool8_t test_vmsbc_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vvm_i16m4_b4(vint16m4_t op1, vint16m4_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vvm_i16m4_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i16m4_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i16m4_b4( @@ -417,7 +417,7 @@ vbool4_t test_vmsbc_vvm_i16m4_b4(vint16m4_t op1, vint16m4_t op2, vbool4_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vxm_i16m4_b4(vint16m4_t op1, int16_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vxm_i16m4_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i16m4_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i16m4_b4( @@ -426,7 +426,7 @@ vbool4_t test_vmsbc_vxm_i16m4_b4(vint16m4_t op1, int16_t op2, vbool4_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsbc_vv_i16m4_b4(op1, op2, vl); + return __riscv_vmsbc_vv_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i16m4_b4( @@ -435,7 +435,7 @@ vbool4_t test_vmsbc_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmsbc_vx_i16m4_b4(op1, op2, vl); + return __riscv_vmsbc_vx_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i16m8_b2( @@ -444,7 +444,7 @@ vbool4_t test_vmsbc_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vvm_i16m8_b2(vint16m8_t op1, vint16m8_t op2, vbool2_t borrowin, size_t vl) { - return vmsbc_vvm_i16m8_b2(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i16m8_b2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i16m8_b2( @@ -453,7 +453,7 @@ vbool2_t test_vmsbc_vvm_i16m8_b2(vint16m8_t op1, vint16m8_t op2, vbool2_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vxm_i16m8_b2(vint16m8_t op1, int16_t op2, vbool2_t borrowin, size_t vl) { - return vmsbc_vxm_i16m8_b2(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i16m8_b2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i16m8_b2( @@ -462,7 +462,7 @@ vbool2_t test_vmsbc_vxm_i16m8_b2(vint16m8_t op1, int16_t op2, vbool2_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsbc_vv_i16m8_b2(op1, op2, vl); + return __riscv_vmsbc_vv_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i16m8_b2( @@ -471,7 +471,7 @@ vbool2_t test_vmsbc_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { - return vmsbc_vx_i16m8_b2(op1, op2, vl); + return __riscv_vmsbc_vx_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i32mf2_b64( @@ -480,7 +480,7 @@ vbool2_t test_vmsbc_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vvm_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vvm_i32mf2_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i32mf2_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i32mf2_b64( @@ -489,7 +489,7 @@ vbool64_t test_vmsbc_vvm_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vxm_i32mf2_b64(vint32mf2_t op1, int32_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vxm_i32mf2_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i32mf2_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i32mf2_b64( @@ -498,7 +498,7 @@ vbool64_t test_vmsbc_vxm_i32mf2_b64(vint32mf2_t op1, int32_t op2, vbool64_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsbc_vv_i32mf2_b64(op1, op2, vl); + return __riscv_vmsbc_vv_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i32mf2_b64( @@ -507,7 +507,7 @@ vbool64_t test_vmsbc_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsbc_vx_i32mf2_b64(op1, op2, vl); + return __riscv_vmsbc_vx_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i32m1_b32( @@ -516,7 +516,7 @@ vbool64_t test_vmsbc_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vvm_i32m1_b32(vint32m1_t op1, vint32m1_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vvm_i32m1_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i32m1_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i32m1_b32( @@ -525,7 +525,7 @@ vbool32_t test_vmsbc_vvm_i32m1_b32(vint32m1_t op1, vint32m1_t op2, vbool32_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vxm_i32m1_b32(vint32m1_t op1, int32_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vxm_i32m1_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i32m1_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i32m1_b32( @@ -534,7 +534,7 @@ vbool32_t test_vmsbc_vxm_i32m1_b32(vint32m1_t op1, int32_t op2, vbool32_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsbc_vv_i32m1_b32(op1, op2, vl); + return __riscv_vmsbc_vv_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i32m1_b32( @@ -543,7 +543,7 @@ vbool32_t test_vmsbc_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { - return vmsbc_vx_i32m1_b32(op1, op2, vl); + return __riscv_vmsbc_vx_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i32m2_b16( @@ -552,7 +552,7 @@ vbool32_t test_vmsbc_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vvm_i32m2_b16(vint32m2_t op1, vint32m2_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vvm_i32m2_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i32m2_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i32m2_b16( @@ -561,7 +561,7 @@ vbool16_t test_vmsbc_vvm_i32m2_b16(vint32m2_t op1, vint32m2_t op2, vbool16_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vxm_i32m2_b16(vint32m2_t op1, int32_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vxm_i32m2_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i32m2_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i32m2_b16( @@ -570,7 +570,7 @@ vbool16_t test_vmsbc_vxm_i32m2_b16(vint32m2_t op1, int32_t op2, vbool16_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsbc_vv_i32m2_b16(op1, op2, vl); + return __riscv_vmsbc_vv_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i32m2_b16( @@ -579,7 +579,7 @@ vbool16_t test_vmsbc_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { - return vmsbc_vx_i32m2_b16(op1, op2, vl); + return __riscv_vmsbc_vx_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i32m4_b8( @@ -588,7 +588,7 @@ vbool16_t test_vmsbc_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vvm_i32m4_b8(vint32m4_t op1, vint32m4_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vvm_i32m4_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i32m4_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i32m4_b8( @@ -597,7 +597,7 @@ vbool8_t test_vmsbc_vvm_i32m4_b8(vint32m4_t op1, vint32m4_t op2, vbool8_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vxm_i32m4_b8(vint32m4_t op1, int32_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vxm_i32m4_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i32m4_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i32m4_b8( @@ -606,7 +606,7 @@ vbool8_t test_vmsbc_vxm_i32m4_b8(vint32m4_t op1, int32_t op2, vbool8_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsbc_vv_i32m4_b8(op1, op2, vl); + return __riscv_vmsbc_vv_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i32m4_b8( @@ -615,7 +615,7 @@ vbool8_t test_vmsbc_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { - return vmsbc_vx_i32m4_b8(op1, op2, vl); + return __riscv_vmsbc_vx_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i32m8_b4( @@ -624,7 +624,7 @@ vbool8_t test_vmsbc_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vvm_i32m8_b4(vint32m8_t op1, vint32m8_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vvm_i32m8_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i32m8_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i32m8_b4( @@ -633,7 +633,7 @@ vbool4_t test_vmsbc_vvm_i32m8_b4(vint32m8_t op1, vint32m8_t op2, vbool4_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vxm_i32m8_b4(vint32m8_t op1, int32_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vxm_i32m8_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i32m8_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i32m8_b4( @@ -642,7 +642,7 @@ vbool4_t test_vmsbc_vxm_i32m8_b4(vint32m8_t op1, int32_t op2, vbool4_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsbc_vv_i32m8_b4(op1, op2, vl); + return __riscv_vmsbc_vv_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i32m8_b4( @@ -651,7 +651,7 @@ vbool4_t test_vmsbc_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { - return vmsbc_vx_i32m8_b4(op1, op2, vl); + return __riscv_vmsbc_vx_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i64m1_b64( @@ -660,7 +660,7 @@ vbool4_t test_vmsbc_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vvm_i64m1_b64(vint64m1_t op1, vint64m1_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vvm_i64m1_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i64m1_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i64m1_b64( @@ -669,7 +669,7 @@ vbool64_t test_vmsbc_vvm_i64m1_b64(vint64m1_t op1, vint64m1_t op2, vbool64_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vxm_i64m1_b64(vint64m1_t op1, int64_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vxm_i64m1_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i64m1_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i64m1_b64( @@ -678,7 +678,7 @@ vbool64_t test_vmsbc_vxm_i64m1_b64(vint64m1_t op1, int64_t op2, vbool64_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsbc_vv_i64m1_b64(op1, op2, vl); + return __riscv_vmsbc_vv_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i64m1_b64( @@ -687,7 +687,7 @@ vbool64_t test_vmsbc_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { - return vmsbc_vx_i64m1_b64(op1, op2, vl); + return __riscv_vmsbc_vx_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i64m2_b32( @@ -696,7 +696,7 @@ vbool64_t test_vmsbc_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vvm_i64m2_b32(vint64m2_t op1, vint64m2_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vvm_i64m2_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i64m2_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i64m2_b32( @@ -705,7 +705,7 @@ vbool32_t test_vmsbc_vvm_i64m2_b32(vint64m2_t op1, vint64m2_t op2, vbool32_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vxm_i64m2_b32(vint64m2_t op1, int64_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vxm_i64m2_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i64m2_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i64m2_b32( @@ -714,7 +714,7 @@ vbool32_t test_vmsbc_vxm_i64m2_b32(vint64m2_t op1, int64_t op2, vbool32_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsbc_vv_i64m2_b32(op1, op2, vl); + return __riscv_vmsbc_vv_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i64m2_b32( @@ -723,7 +723,7 @@ vbool32_t test_vmsbc_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { - return vmsbc_vx_i64m2_b32(op1, op2, vl); + return __riscv_vmsbc_vx_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i64m4_b16( @@ -732,7 +732,7 @@ vbool32_t test_vmsbc_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vvm_i64m4_b16(vint64m4_t op1, vint64m4_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vvm_i64m4_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i64m4_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i64m4_b16( @@ -741,7 +741,7 @@ vbool16_t test_vmsbc_vvm_i64m4_b16(vint64m4_t op1, vint64m4_t op2, vbool16_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vxm_i64m4_b16(vint64m4_t op1, int64_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vxm_i64m4_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i64m4_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i64m4_b16( @@ -750,7 +750,7 @@ vbool16_t test_vmsbc_vxm_i64m4_b16(vint64m4_t op1, int64_t op2, vbool16_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsbc_vv_i64m4_b16(op1, op2, vl); + return __riscv_vmsbc_vv_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i64m4_b16( @@ -759,7 +759,7 @@ vbool16_t test_vmsbc_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { - return vmsbc_vx_i64m4_b16(op1, op2, vl); + return __riscv_vmsbc_vx_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_i64m8_b8( @@ -768,7 +768,7 @@ vbool16_t test_vmsbc_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vvm_i64m8_b8(vint64m8_t op1, vint64m8_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vvm_i64m8_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_i64m8_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_i64m8_b8( @@ -777,7 +777,7 @@ vbool8_t test_vmsbc_vvm_i64m8_b8(vint64m8_t op1, vint64m8_t op2, vbool8_t borrow // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vxm_i64m8_b8(vint64m8_t op1, int64_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vxm_i64m8_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_i64m8_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_i64m8_b8( @@ -786,7 +786,7 @@ vbool8_t test_vmsbc_vxm_i64m8_b8(vint64m8_t op1, int64_t op2, vbool8_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsbc_vv_i64m8_b8(op1, op2, vl); + return __riscv_vmsbc_vv_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_i64m8_b8( @@ -795,7 +795,7 @@ vbool8_t test_vmsbc_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmsbc_vx_i64m8_b8(op1, op2, vl); + return __riscv_vmsbc_vx_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u8mf8_b64( @@ -804,7 +804,7 @@ vbool8_t test_vmsbc_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vvm_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vvm_u8mf8_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u8mf8_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u8mf8_b64( @@ -813,7 +813,7 @@ vbool64_t test_vmsbc_vvm_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vxm_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vxm_u8mf8_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u8mf8_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u8mf8_b64( @@ -822,7 +822,7 @@ vbool64_t test_vmsbc_vxm_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, vbool64_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsbc_vv_u8mf8_b64(op1, op2, vl); + return __riscv_vmsbc_vv_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u8mf8_b64( @@ -831,7 +831,7 @@ vbool64_t test_vmsbc_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsbc_vx_u8mf8_b64(op1, op2, vl); + return __riscv_vmsbc_vx_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u8mf4_b32( @@ -840,7 +840,7 @@ vbool64_t test_vmsbc_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vvm_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vvm_u8mf4_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u8mf4_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u8mf4_b32( @@ -849,7 +849,7 @@ vbool32_t test_vmsbc_vvm_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vxm_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vxm_u8mf4_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u8mf4_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u8mf4_b32( @@ -858,7 +858,7 @@ vbool32_t test_vmsbc_vxm_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, vbool32_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsbc_vv_u8mf4_b32(op1, op2, vl); + return __riscv_vmsbc_vv_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u8mf4_b32( @@ -867,7 +867,7 @@ vbool32_t test_vmsbc_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsbc_vx_u8mf4_b32(op1, op2, vl); + return __riscv_vmsbc_vx_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u8mf2_b16( @@ -876,7 +876,7 @@ vbool32_t test_vmsbc_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vvm_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vvm_u8mf2_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u8mf2_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u8mf2_b16( @@ -885,7 +885,7 @@ vbool16_t test_vmsbc_vvm_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vxm_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vxm_u8mf2_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u8mf2_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u8mf2_b16( @@ -894,7 +894,7 @@ vbool16_t test_vmsbc_vxm_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, vbool16_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsbc_vv_u8mf2_b16(op1, op2, vl); + return __riscv_vmsbc_vv_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u8mf2_b16( @@ -903,7 +903,7 @@ vbool16_t test_vmsbc_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsbc_vx_u8mf2_b16(op1, op2, vl); + return __riscv_vmsbc_vx_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u8m1_b8( @@ -912,7 +912,7 @@ vbool16_t test_vmsbc_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vvm_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vvm_u8m1_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u8m1_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u8m1_b8( @@ -921,7 +921,7 @@ vbool8_t test_vmsbc_vvm_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, vbool8_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vxm_u8m1_b8(vuint8m1_t op1, uint8_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vxm_u8m1_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u8m1_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u8m1_b8( @@ -930,7 +930,7 @@ vbool8_t test_vmsbc_vxm_u8m1_b8(vuint8m1_t op1, uint8_t op2, vbool8_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsbc_vv_u8m1_b8(op1, op2, vl); + return __riscv_vmsbc_vv_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u8m1_b8( @@ -939,7 +939,7 @@ vbool8_t test_vmsbc_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsbc_vx_u8m1_b8(op1, op2, vl); + return __riscv_vmsbc_vx_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u8m2_b4( @@ -948,7 +948,7 @@ vbool8_t test_vmsbc_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vvm_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vvm_u8m2_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u8m2_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u8m2_b4( @@ -957,7 +957,7 @@ vbool4_t test_vmsbc_vvm_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, vbool4_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vxm_u8m2_b4(vuint8m2_t op1, uint8_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vxm_u8m2_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u8m2_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u8m2_b4( @@ -966,7 +966,7 @@ vbool4_t test_vmsbc_vxm_u8m2_b4(vuint8m2_t op1, uint8_t op2, vbool4_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsbc_vv_u8m2_b4(op1, op2, vl); + return __riscv_vmsbc_vv_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u8m2_b4( @@ -975,7 +975,7 @@ vbool4_t test_vmsbc_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsbc_vx_u8m2_b4(op1, op2, vl); + return __riscv_vmsbc_vx_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u8m4_b2( @@ -984,7 +984,7 @@ vbool4_t test_vmsbc_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vvm_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, vbool2_t borrowin, size_t vl) { - return vmsbc_vvm_u8m4_b2(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u8m4_b2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u8m4_b2( @@ -993,7 +993,7 @@ vbool2_t test_vmsbc_vvm_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, vbool2_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vxm_u8m4_b2(vuint8m4_t op1, uint8_t op2, vbool2_t borrowin, size_t vl) { - return vmsbc_vxm_u8m4_b2(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u8m4_b2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u8m4_b2( @@ -1002,7 +1002,7 @@ vbool2_t test_vmsbc_vxm_u8m4_b2(vuint8m4_t op1, uint8_t op2, vbool2_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsbc_vv_u8m4_b2(op1, op2, vl); + return __riscv_vmsbc_vv_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u8m4_b2( @@ -1011,7 +1011,7 @@ vbool2_t test_vmsbc_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsbc_vx_u8m4_b2(op1, op2, vl); + return __riscv_vmsbc_vx_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u8m8_b1( @@ -1020,7 +1020,7 @@ vbool2_t test_vmsbc_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbc_vvm_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, vbool1_t borrowin, size_t vl) { - return vmsbc_vvm_u8m8_b1(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u8m8_b1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u8m8_b1( @@ -1029,7 +1029,7 @@ vbool1_t test_vmsbc_vvm_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, vbool1_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbc_vxm_u8m8_b1(vuint8m8_t op1, uint8_t op2, vbool1_t borrowin, size_t vl) { - return vmsbc_vxm_u8m8_b1(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u8m8_b1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u8m8_b1( @@ -1038,7 +1038,7 @@ vbool1_t test_vmsbc_vxm_u8m8_b1(vuint8m8_t op1, uint8_t op2, vbool1_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbc_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsbc_vv_u8m8_b1(op1, op2, vl); + return __riscv_vmsbc_vv_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u8m8_b1( @@ -1047,7 +1047,7 @@ vbool1_t test_vmsbc_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbc_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsbc_vx_u8m8_b1(op1, op2, vl); + return __riscv_vmsbc_vx_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u16mf4_b64( @@ -1056,7 +1056,7 @@ vbool1_t test_vmsbc_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vvm_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vvm_u16mf4_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u16mf4_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u16mf4_b64( @@ -1065,7 +1065,7 @@ vbool64_t test_vmsbc_vvm_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vxm_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vxm_u16mf4_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u16mf4_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u16mf4_b64( @@ -1074,7 +1074,7 @@ vbool64_t test_vmsbc_vxm_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, vbool64_t bo // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsbc_vv_u16mf4_b64(op1, op2, vl); + return __riscv_vmsbc_vv_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u16mf4_b64( @@ -1083,7 +1083,7 @@ vbool64_t test_vmsbc_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsbc_vx_u16mf4_b64(op1, op2, vl); + return __riscv_vmsbc_vx_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u16mf2_b32( @@ -1092,7 +1092,7 @@ vbool64_t test_vmsbc_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vvm_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vvm_u16mf2_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u16mf2_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u16mf2_b32( @@ -1101,7 +1101,7 @@ vbool32_t test_vmsbc_vvm_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vxm_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vxm_u16mf2_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u16mf2_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u16mf2_b32( @@ -1110,7 +1110,7 @@ vbool32_t test_vmsbc_vxm_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, vbool32_t bo // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsbc_vv_u16mf2_b32(op1, op2, vl); + return __riscv_vmsbc_vv_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u16mf2_b32( @@ -1119,7 +1119,7 @@ vbool32_t test_vmsbc_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsbc_vx_u16mf2_b32(op1, op2, vl); + return __riscv_vmsbc_vx_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u16m1_b16( @@ -1128,7 +1128,7 @@ vbool32_t test_vmsbc_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vvm_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vvm_u16m1_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u16m1_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u16m1_b16( @@ -1137,7 +1137,7 @@ vbool16_t test_vmsbc_vvm_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, vbool16_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vxm_u16m1_b16(vuint16m1_t op1, uint16_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vxm_u16m1_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u16m1_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u16m1_b16( @@ -1146,7 +1146,7 @@ vbool16_t test_vmsbc_vxm_u16m1_b16(vuint16m1_t op1, uint16_t op2, vbool16_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsbc_vv_u16m1_b16(op1, op2, vl); + return __riscv_vmsbc_vv_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u16m1_b16( @@ -1155,7 +1155,7 @@ vbool16_t test_vmsbc_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsbc_vx_u16m1_b16(op1, op2, vl); + return __riscv_vmsbc_vx_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u16m2_b8( @@ -1164,7 +1164,7 @@ vbool16_t test_vmsbc_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vvm_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vvm_u16m2_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u16m2_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u16m2_b8( @@ -1173,7 +1173,7 @@ vbool8_t test_vmsbc_vvm_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, vbool8_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vxm_u16m2_b8(vuint16m2_t op1, uint16_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vxm_u16m2_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u16m2_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u16m2_b8( @@ -1182,7 +1182,7 @@ vbool8_t test_vmsbc_vxm_u16m2_b8(vuint16m2_t op1, uint16_t op2, vbool8_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsbc_vv_u16m2_b8(op1, op2, vl); + return __riscv_vmsbc_vv_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u16m2_b8( @@ -1191,7 +1191,7 @@ vbool8_t test_vmsbc_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsbc_vx_u16m2_b8(op1, op2, vl); + return __riscv_vmsbc_vx_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u16m4_b4( @@ -1200,7 +1200,7 @@ vbool8_t test_vmsbc_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vvm_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vvm_u16m4_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u16m4_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u16m4_b4( @@ -1209,7 +1209,7 @@ vbool4_t test_vmsbc_vvm_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vxm_u16m4_b4(vuint16m4_t op1, uint16_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vxm_u16m4_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u16m4_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u16m4_b4( @@ -1218,7 +1218,7 @@ vbool4_t test_vmsbc_vxm_u16m4_b4(vuint16m4_t op1, uint16_t op2, vbool4_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsbc_vv_u16m4_b4(op1, op2, vl); + return __riscv_vmsbc_vv_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u16m4_b4( @@ -1227,7 +1227,7 @@ vbool4_t test_vmsbc_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsbc_vx_u16m4_b4(op1, op2, vl); + return __riscv_vmsbc_vx_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u16m8_b2( @@ -1236,7 +1236,7 @@ vbool4_t test_vmsbc_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vvm_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, vbool2_t borrowin, size_t vl) { - return vmsbc_vvm_u16m8_b2(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u16m8_b2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u16m8_b2( @@ -1245,7 +1245,7 @@ vbool2_t test_vmsbc_vvm_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, vbool2_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vxm_u16m8_b2(vuint16m8_t op1, uint16_t op2, vbool2_t borrowin, size_t vl) { - return vmsbc_vxm_u16m8_b2(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u16m8_b2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u16m8_b2( @@ -1254,7 +1254,7 @@ vbool2_t test_vmsbc_vxm_u16m8_b2(vuint16m8_t op1, uint16_t op2, vbool2_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsbc_vv_u16m8_b2(op1, op2, vl); + return __riscv_vmsbc_vv_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u16m8_b2( @@ -1263,7 +1263,7 @@ vbool2_t test_vmsbc_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbc_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsbc_vx_u16m8_b2(op1, op2, vl); + return __riscv_vmsbc_vx_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u32mf2_b64( @@ -1272,7 +1272,7 @@ vbool2_t test_vmsbc_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vvm_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vvm_u32mf2_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u32mf2_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u32mf2_b64( @@ -1281,7 +1281,7 @@ vbool64_t test_vmsbc_vvm_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vxm_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vxm_u32mf2_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u32mf2_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u32mf2_b64( @@ -1290,7 +1290,7 @@ vbool64_t test_vmsbc_vxm_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, vbool64_t bo // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsbc_vv_u32mf2_b64(op1, op2, vl); + return __riscv_vmsbc_vv_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u32mf2_b64( @@ -1299,7 +1299,7 @@ vbool64_t test_vmsbc_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsbc_vx_u32mf2_b64(op1, op2, vl); + return __riscv_vmsbc_vx_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u32m1_b32( @@ -1308,7 +1308,7 @@ vbool64_t test_vmsbc_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vvm_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vvm_u32m1_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u32m1_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u32m1_b32( @@ -1317,7 +1317,7 @@ vbool32_t test_vmsbc_vvm_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, vbool32_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vxm_u32m1_b32(vuint32m1_t op1, uint32_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vxm_u32m1_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u32m1_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u32m1_b32( @@ -1326,7 +1326,7 @@ vbool32_t test_vmsbc_vxm_u32m1_b32(vuint32m1_t op1, uint32_t op2, vbool32_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsbc_vv_u32m1_b32(op1, op2, vl); + return __riscv_vmsbc_vv_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u32m1_b32( @@ -1335,7 +1335,7 @@ vbool32_t test_vmsbc_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsbc_vx_u32m1_b32(op1, op2, vl); + return __riscv_vmsbc_vx_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u32m2_b16( @@ -1344,7 +1344,7 @@ vbool32_t test_vmsbc_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vvm_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vvm_u32m2_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u32m2_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u32m2_b16( @@ -1353,7 +1353,7 @@ vbool16_t test_vmsbc_vvm_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, vbool16_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vxm_u32m2_b16(vuint32m2_t op1, uint32_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vxm_u32m2_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u32m2_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u32m2_b16( @@ -1362,7 +1362,7 @@ vbool16_t test_vmsbc_vxm_u32m2_b16(vuint32m2_t op1, uint32_t op2, vbool16_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsbc_vv_u32m2_b16(op1, op2, vl); + return __riscv_vmsbc_vv_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u32m2_b16( @@ -1371,7 +1371,7 @@ vbool16_t test_vmsbc_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsbc_vx_u32m2_b16(op1, op2, vl); + return __riscv_vmsbc_vx_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u32m4_b8( @@ -1380,7 +1380,7 @@ vbool16_t test_vmsbc_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vvm_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vvm_u32m4_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u32m4_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u32m4_b8( @@ -1389,7 +1389,7 @@ vbool8_t test_vmsbc_vvm_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, vbool8_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vxm_u32m4_b8(vuint32m4_t op1, uint32_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vxm_u32m4_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u32m4_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u32m4_b8( @@ -1398,7 +1398,7 @@ vbool8_t test_vmsbc_vxm_u32m4_b8(vuint32m4_t op1, uint32_t op2, vbool8_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsbc_vv_u32m4_b8(op1, op2, vl); + return __riscv_vmsbc_vv_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u32m4_b8( @@ -1407,7 +1407,7 @@ vbool8_t test_vmsbc_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsbc_vx_u32m4_b8(op1, op2, vl); + return __riscv_vmsbc_vx_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u32m8_b4( @@ -1416,7 +1416,7 @@ vbool8_t test_vmsbc_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vvm_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vvm_u32m8_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u32m8_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u32m8_b4( @@ -1425,7 +1425,7 @@ vbool4_t test_vmsbc_vvm_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, vbool4_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vxm_u32m8_b4(vuint32m8_t op1, uint32_t op2, vbool4_t borrowin, size_t vl) { - return vmsbc_vxm_u32m8_b4(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u32m8_b4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u32m8_b4( @@ -1434,7 +1434,7 @@ vbool4_t test_vmsbc_vxm_u32m8_b4(vuint32m8_t op1, uint32_t op2, vbool4_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsbc_vv_u32m8_b4(op1, op2, vl); + return __riscv_vmsbc_vv_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u32m8_b4( @@ -1443,7 +1443,7 @@ vbool4_t test_vmsbc_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbc_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsbc_vx_u32m8_b4(op1, op2, vl); + return __riscv_vmsbc_vx_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u64m1_b64( @@ -1452,7 +1452,7 @@ vbool4_t test_vmsbc_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vvm_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vvm_u64m1_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u64m1_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u64m1_b64( @@ -1461,7 +1461,7 @@ vbool64_t test_vmsbc_vvm_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, vbool64_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vxm_u64m1_b64(vuint64m1_t op1, uint64_t op2, vbool64_t borrowin, size_t vl) { - return vmsbc_vxm_u64m1_b64(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u64m1_b64(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u64m1_b64( @@ -1470,7 +1470,7 @@ vbool64_t test_vmsbc_vxm_u64m1_b64(vuint64m1_t op1, uint64_t op2, vbool64_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsbc_vv_u64m1_b64(op1, op2, vl); + return __riscv_vmsbc_vv_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u64m1_b64( @@ -1479,7 +1479,7 @@ vbool64_t test_vmsbc_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbc_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsbc_vx_u64m1_b64(op1, op2, vl); + return __riscv_vmsbc_vx_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u64m2_b32( @@ -1488,7 +1488,7 @@ vbool64_t test_vmsbc_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vvm_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vvm_u64m2_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u64m2_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u64m2_b32( @@ -1497,7 +1497,7 @@ vbool32_t test_vmsbc_vvm_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, vbool32_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vxm_u64m2_b32(vuint64m2_t op1, uint64_t op2, vbool32_t borrowin, size_t vl) { - return vmsbc_vxm_u64m2_b32(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u64m2_b32(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u64m2_b32( @@ -1506,7 +1506,7 @@ vbool32_t test_vmsbc_vxm_u64m2_b32(vuint64m2_t op1, uint64_t op2, vbool32_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsbc_vv_u64m2_b32(op1, op2, vl); + return __riscv_vmsbc_vv_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u64m2_b32( @@ -1515,7 +1515,7 @@ vbool32_t test_vmsbc_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbc_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsbc_vx_u64m2_b32(op1, op2, vl); + return __riscv_vmsbc_vx_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u64m4_b16( @@ -1524,7 +1524,7 @@ vbool32_t test_vmsbc_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vvm_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vvm_u64m4_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u64m4_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u64m4_b16( @@ -1533,7 +1533,7 @@ vbool16_t test_vmsbc_vvm_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, vbool16_t b // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vxm_u64m4_b16(vuint64m4_t op1, uint64_t op2, vbool16_t borrowin, size_t vl) { - return vmsbc_vxm_u64m4_b16(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u64m4_b16(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u64m4_b16( @@ -1542,7 +1542,7 @@ vbool16_t test_vmsbc_vxm_u64m4_b16(vuint64m4_t op1, uint64_t op2, vbool16_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsbc_vv_u64m4_b16(op1, op2, vl); + return __riscv_vmsbc_vv_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u64m4_b16( @@ -1551,7 +1551,7 @@ vbool16_t test_vmsbc_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbc_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsbc_vx_u64m4_b16(op1, op2, vl); + return __riscv_vmsbc_vx_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vvm_u64m8_b8( @@ -1560,7 +1560,7 @@ vbool16_t test_vmsbc_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vvm_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vvm_u64m8_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vvm_u64m8_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vxm_u64m8_b8( @@ -1569,7 +1569,7 @@ vbool8_t test_vmsbc_vvm_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vxm_u64m8_b8(vuint64m8_t op1, uint64_t op2, vbool8_t borrowin, size_t vl) { - return vmsbc_vxm_u64m8_b8(op1, op2, borrowin, vl); + return __riscv_vmsbc_vxm_u64m8_b8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vv_u64m8_b8( @@ -1578,7 +1578,7 @@ vbool8_t test_vmsbc_vxm_u64m8_b8(vuint64m8_t op1, uint64_t op2, vbool8_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsbc_vv_u64m8_b8(op1, op2, vl); + return __riscv_vmsbc_vv_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsbc_vx_u64m8_b8( @@ -1587,6 +1587,6 @@ vbool8_t test_vmsbc_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbc_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsbc_vx_u64m8_b8(op1, op2, vl); + return __riscv_vmsbc_vx_u64m8_b8(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsbf.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsbf.c index 5ac58aedc40559bdbd15fd724b029fcea3bf4cdd..db767a781bab7663bdb4e6bf83e130d6db34354b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsbf.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsbf.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbf_m_b1(vbool1_t op1, size_t vl) { - return vmsbf_m_b1(op1, vl); + return __riscv_vmsbf_m_b1(op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmsbf_m_b1(vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbf_m_b2(vbool2_t op1, size_t vl) { - return vmsbf_m_b2(op1, vl); + return __riscv_vmsbf_m_b2(op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmsbf_m_b2(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbf_m_b4(vbool4_t op1, size_t vl) { - return vmsbf_m_b4(op1, vl); + return __riscv_vmsbf_m_b4(op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmsbf_m_b4(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbf_m_b8(vbool8_t op1, size_t vl) { - return vmsbf_m_b8(op1, vl); + return __riscv_vmsbf_m_b8(op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmsbf_m_b8(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbf_m_b16(vbool16_t op1, size_t vl) { - return vmsbf_m_b16(op1, vl); + return __riscv_vmsbf_m_b16(op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmsbf_m_b16(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbf_m_b32(vbool32_t op1, size_t vl) { - return vmsbf_m_b32(op1, vl); + return __riscv_vmsbf_m_b32(op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b64( @@ -66,7 +66,7 @@ vbool32_t test_vmsbf_m_b32(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbf_m_b64(vbool64_t op1, size_t vl) { - return vmsbf_m_b64(op1, vl); + return __riscv_vmsbf_m_b64(op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b1_m( @@ -75,7 +75,7 @@ vbool64_t test_vmsbf_m_b64(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbf_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { - return vmsbf_m_b1_m(mask, op1, vl); + return __riscv_vmsbf_m_b1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b2_m( @@ -84,7 +84,7 @@ vbool1_t test_vmsbf_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbf_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { - return vmsbf_m_b2_m(mask, op1, vl); + return __riscv_vmsbf_m_b2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b4_m( @@ -93,7 +93,7 @@ vbool2_t test_vmsbf_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbf_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { - return vmsbf_m_b4_m(mask, op1, vl); + return __riscv_vmsbf_m_b4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b8_m( @@ -102,7 +102,7 @@ vbool4_t test_vmsbf_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbf_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return vmsbf_m_b8_m(mask, op1, vl); + return __riscv_vmsbf_m_b8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b16_m( @@ -111,7 +111,7 @@ vbool8_t test_vmsbf_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbf_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return vmsbf_m_b16_m(mask, op1, vl); + return __riscv_vmsbf_m_b16_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b32_m( @@ -120,7 +120,7 @@ vbool16_t test_vmsbf_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbf_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return vmsbf_m_b32_m(mask, op1, vl); + return __riscv_vmsbf_m_b32_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b64_m( @@ -129,6 +129,6 @@ vbool32_t test_vmsbf_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbf_m_b64_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return vmsbf_m_b64_m(mask, op1, vl); + return __riscv_vmsbf_m_b64_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmseq.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmseq.c index d1824ff0a570be4cf530ed7a2127f2a5a22f0e5e..783a046c9435ce307be08d2022922bc450096fc7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmseq.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmseq.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmseq_vv_i8mf8_b64(op1, op2, vl); + return __riscv_vmseq_vv_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmseq_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf8_b64(op1, op2, vl); + return __riscv_vmseq_vx_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmseq_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmseq_vv_i8mf4_b32(op1, op2, vl); + return __riscv_vmseq_vv_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmseq_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf4_b32(op1, op2, vl); + return __riscv_vmseq_vx_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmseq_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmseq_vv_i8mf2_b16(op1, op2, vl); + return __riscv_vmseq_vv_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmseq_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf2_b16(op1, op2, vl); + return __riscv_vmseq_vx_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmseq_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmseq_vv_i8m1_b8(op1, op2, vl); + return __riscv_vmseq_vv_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmseq_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m1_b8(op1, op2, vl); + return __riscv_vmseq_vx_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmseq_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmseq_vv_i8m2_b4(op1, op2, vl); + return __riscv_vmseq_vv_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmseq_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m2_b4(op1, op2, vl); + return __riscv_vmseq_vx_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmseq_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmseq_vv_i8m4_b2(op1, op2, vl); + return __riscv_vmseq_vv_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmseq_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m4_b2(op1, op2, vl); + return __riscv_vmseq_vx_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmseq_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmseq_vv_i8m8_b1(op1, op2, vl); + return __riscv_vmseq_vv_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmseq_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m8_b1(op1, op2, vl); + return __riscv_vmseq_vx_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmseq_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmseq_vv_i16mf4_b64(op1, op2, vl); + return __riscv_vmseq_vv_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmseq_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16mf4_b64(op1, op2, vl); + return __riscv_vmseq_vx_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmseq_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmseq_vv_i16mf2_b32(op1, op2, vl); + return __riscv_vmseq_vv_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmseq_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16mf2_b32(op1, op2, vl); + return __riscv_vmseq_vx_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmseq_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmseq_vv_i16m1_b16(op1, op2, vl); + return __riscv_vmseq_vv_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmseq_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m1_b16(op1, op2, vl); + return __riscv_vmseq_vx_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmseq_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmseq_vv_i16m2_b8(op1, op2, vl); + return __riscv_vmseq_vv_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmseq_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m2_b8(op1, op2, vl); + return __riscv_vmseq_vx_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmseq_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmseq_vv_i16m4_b4(op1, op2, vl); + return __riscv_vmseq_vv_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmseq_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m4_b4(op1, op2, vl); + return __riscv_vmseq_vx_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmseq_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmseq_vv_i16m8_b2(op1, op2, vl); + return __riscv_vmseq_vv_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmseq_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m8_b2(op1, op2, vl); + return __riscv_vmseq_vx_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmseq_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmseq_vv_i32mf2_b64(op1, op2, vl); + return __riscv_vmseq_vv_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmseq_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32mf2_b64(op1, op2, vl); + return __riscv_vmseq_vx_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmseq_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmseq_vv_i32m1_b32(op1, op2, vl); + return __riscv_vmseq_vv_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmseq_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m1_b32(op1, op2, vl); + return __riscv_vmseq_vx_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmseq_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmseq_vv_i32m2_b16(op1, op2, vl); + return __riscv_vmseq_vv_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmseq_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m2_b16(op1, op2, vl); + return __riscv_vmseq_vx_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmseq_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmseq_vv_i32m4_b8(op1, op2, vl); + return __riscv_vmseq_vv_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmseq_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m4_b8(op1, op2, vl); + return __riscv_vmseq_vx_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmseq_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmseq_vv_i32m8_b4(op1, op2, vl); + return __riscv_vmseq_vv_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmseq_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m8_b4(op1, op2, vl); + return __riscv_vmseq_vx_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmseq_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmseq_vv_i64m1_b64(op1, op2, vl); + return __riscv_vmseq_vv_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmseq_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m1_b64(op1, op2, vl); + return __riscv_vmseq_vx_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmseq_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmseq_vv_i64m2_b32(op1, op2, vl); + return __riscv_vmseq_vv_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmseq_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m2_b32(op1, op2, vl); + return __riscv_vmseq_vx_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmseq_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmseq_vv_i64m4_b16(op1, op2, vl); + return __riscv_vmseq_vv_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmseq_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m4_b16(op1, op2, vl); + return __riscv_vmseq_vx_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmseq_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmseq_vv_i64m8_b8(op1, op2, vl); + return __riscv_vmseq_vv_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmseq_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m8_b8(op1, op2, vl); + return __riscv_vmseq_vx_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf8_b64( @@ -409,7 +409,7 @@ vbool8_t test_vmseq_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmseq_vv_u8mf8_b64(op1, op2, vl); + return __riscv_vmseq_vv_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf8_b64( @@ -418,7 +418,7 @@ vbool64_t test_vmseq_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf8_b64(op1, op2, vl); + return __riscv_vmseq_vx_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf4_b32( @@ -427,7 +427,7 @@ vbool64_t test_vmseq_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmseq_vv_u8mf4_b32(op1, op2, vl); + return __riscv_vmseq_vv_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf4_b32( @@ -436,7 +436,7 @@ vbool32_t test_vmseq_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf4_b32(op1, op2, vl); + return __riscv_vmseq_vx_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf2_b16( @@ -445,7 +445,7 @@ vbool32_t test_vmseq_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmseq_vv_u8mf2_b16(op1, op2, vl); + return __riscv_vmseq_vv_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf2_b16( @@ -454,7 +454,7 @@ vbool16_t test_vmseq_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf2_b16(op1, op2, vl); + return __riscv_vmseq_vx_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m1_b8( @@ -463,7 +463,7 @@ vbool16_t test_vmseq_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmseq_vv_u8m1_b8(op1, op2, vl); + return __riscv_vmseq_vv_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m1_b8( @@ -472,7 +472,7 @@ vbool8_t test_vmseq_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m1_b8(op1, op2, vl); + return __riscv_vmseq_vx_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m2_b4( @@ -481,7 +481,7 @@ vbool8_t test_vmseq_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmseq_vv_u8m2_b4(op1, op2, vl); + return __riscv_vmseq_vv_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m2_b4( @@ -490,7 +490,7 @@ vbool4_t test_vmseq_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m2_b4(op1, op2, vl); + return __riscv_vmseq_vx_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m4_b2( @@ -499,7 +499,7 @@ vbool4_t test_vmseq_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmseq_vv_u8m4_b2(op1, op2, vl); + return __riscv_vmseq_vv_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m4_b2( @@ -508,7 +508,7 @@ vbool2_t test_vmseq_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m4_b2(op1, op2, vl); + return __riscv_vmseq_vx_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m8_b1( @@ -517,7 +517,7 @@ vbool2_t test_vmseq_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmseq_vv_u8m8_b1(op1, op2, vl); + return __riscv_vmseq_vv_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m8_b1( @@ -526,7 +526,7 @@ vbool1_t test_vmseq_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m8_b1(op1, op2, vl); + return __riscv_vmseq_vx_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16mf4_b64( @@ -535,7 +535,7 @@ vbool1_t test_vmseq_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmseq_vv_u16mf4_b64(op1, op2, vl); + return __riscv_vmseq_vv_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16mf4_b64( @@ -544,7 +544,7 @@ vbool64_t test_vmseq_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16mf4_b64(op1, op2, vl); + return __riscv_vmseq_vx_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16mf2_b32( @@ -553,7 +553,7 @@ vbool64_t test_vmseq_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmseq_vv_u16mf2_b32(op1, op2, vl); + return __riscv_vmseq_vv_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16mf2_b32( @@ -562,7 +562,7 @@ vbool32_t test_vmseq_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16mf2_b32(op1, op2, vl); + return __riscv_vmseq_vx_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m1_b16( @@ -571,7 +571,7 @@ vbool32_t test_vmseq_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmseq_vv_u16m1_b16(op1, op2, vl); + return __riscv_vmseq_vv_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m1_b16( @@ -580,7 +580,7 @@ vbool16_t test_vmseq_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m1_b16(op1, op2, vl); + return __riscv_vmseq_vx_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m2_b8( @@ -589,7 +589,7 @@ vbool16_t test_vmseq_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmseq_vv_u16m2_b8(op1, op2, vl); + return __riscv_vmseq_vv_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m2_b8( @@ -598,7 +598,7 @@ vbool8_t test_vmseq_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m2_b8(op1, op2, vl); + return __riscv_vmseq_vx_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m4_b4( @@ -607,7 +607,7 @@ vbool8_t test_vmseq_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmseq_vv_u16m4_b4(op1, op2, vl); + return __riscv_vmseq_vv_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m4_b4( @@ -616,7 +616,7 @@ vbool4_t test_vmseq_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m4_b4(op1, op2, vl); + return __riscv_vmseq_vx_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m8_b2( @@ -625,7 +625,7 @@ vbool4_t test_vmseq_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmseq_vv_u16m8_b2(op1, op2, vl); + return __riscv_vmseq_vv_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m8_b2( @@ -634,7 +634,7 @@ vbool2_t test_vmseq_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m8_b2(op1, op2, vl); + return __riscv_vmseq_vx_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32mf2_b64( @@ -643,7 +643,7 @@ vbool2_t test_vmseq_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmseq_vv_u32mf2_b64(op1, op2, vl); + return __riscv_vmseq_vv_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32mf2_b64( @@ -652,7 +652,7 @@ vbool64_t test_vmseq_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32mf2_b64(op1, op2, vl); + return __riscv_vmseq_vx_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m1_b32( @@ -661,7 +661,7 @@ vbool64_t test_vmseq_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmseq_vv_u32m1_b32(op1, op2, vl); + return __riscv_vmseq_vv_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m1_b32( @@ -670,7 +670,7 @@ vbool32_t test_vmseq_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m1_b32(op1, op2, vl); + return __riscv_vmseq_vx_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m2_b16( @@ -679,7 +679,7 @@ vbool32_t test_vmseq_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmseq_vv_u32m2_b16(op1, op2, vl); + return __riscv_vmseq_vv_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m2_b16( @@ -688,7 +688,7 @@ vbool16_t test_vmseq_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m2_b16(op1, op2, vl); + return __riscv_vmseq_vx_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m4_b8( @@ -697,7 +697,7 @@ vbool16_t test_vmseq_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmseq_vv_u32m4_b8(op1, op2, vl); + return __riscv_vmseq_vv_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m4_b8( @@ -706,7 +706,7 @@ vbool8_t test_vmseq_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m4_b8(op1, op2, vl); + return __riscv_vmseq_vx_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m8_b4( @@ -715,7 +715,7 @@ vbool8_t test_vmseq_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmseq_vv_u32m8_b4(op1, op2, vl); + return __riscv_vmseq_vv_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m8_b4( @@ -724,7 +724,7 @@ vbool4_t test_vmseq_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m8_b4(op1, op2, vl); + return __riscv_vmseq_vx_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m1_b64( @@ -733,7 +733,7 @@ vbool4_t test_vmseq_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmseq_vv_u64m1_b64(op1, op2, vl); + return __riscv_vmseq_vv_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m1_b64( @@ -742,7 +742,7 @@ vbool64_t test_vmseq_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m1_b64(op1, op2, vl); + return __riscv_vmseq_vx_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m2_b32( @@ -751,7 +751,7 @@ vbool64_t test_vmseq_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmseq_vv_u64m2_b32(op1, op2, vl); + return __riscv_vmseq_vv_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m2_b32( @@ -760,7 +760,7 @@ vbool32_t test_vmseq_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m2_b32(op1, op2, vl); + return __riscv_vmseq_vx_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m4_b16( @@ -769,7 +769,7 @@ vbool32_t test_vmseq_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmseq_vv_u64m4_b16(op1, op2, vl); + return __riscv_vmseq_vv_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m4_b16( @@ -778,7 +778,7 @@ vbool16_t test_vmseq_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m4_b16(op1, op2, vl); + return __riscv_vmseq_vx_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m8_b8( @@ -787,7 +787,7 @@ vbool16_t test_vmseq_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmseq_vv_u64m8_b8(op1, op2, vl); + return __riscv_vmseq_vv_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m8_b8( @@ -796,7 +796,7 @@ vbool8_t test_vmseq_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m8_b8(op1, op2, vl); + return __riscv_vmseq_vx_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8mf8_b64_m( @@ -805,7 +805,7 @@ vbool8_t test_vmseq_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmseq_vv_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf8_b64_m( @@ -814,7 +814,7 @@ vbool64_t test_vmseq_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8mf4_b32_m( @@ -823,7 +823,7 @@ vbool64_t test_vmseq_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmseq_vv_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf4_b32_m( @@ -832,7 +832,7 @@ vbool32_t test_vmseq_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8mf2_b16_m( @@ -841,7 +841,7 @@ vbool32_t test_vmseq_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmseq_vv_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf2_b16_m( @@ -850,7 +850,7 @@ vbool16_t test_vmseq_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m1_b8_m( @@ -859,7 +859,7 @@ vbool16_t test_vmseq_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmseq_vv_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m1_b8_m( @@ -868,7 +868,7 @@ vbool8_t test_vmseq_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m2_b4_m( @@ -877,7 +877,7 @@ vbool8_t test_vmseq_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmseq_vv_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m2_b4_m( @@ -886,7 +886,7 @@ vbool4_t test_vmseq_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m4_b2_m( @@ -895,7 +895,7 @@ vbool4_t test_vmseq_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmseq_vv_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m4_b2_m( @@ -904,7 +904,7 @@ vbool2_t test_vmseq_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m8_b1_m( @@ -913,7 +913,7 @@ vbool2_t test_vmseq_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmseq_vv_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m8_b1_m( @@ -922,7 +922,7 @@ vbool1_t test_vmseq_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16mf4_b64_m( @@ -931,7 +931,7 @@ vbool1_t test_vmseq_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmseq_vv_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16mf4_b64_m( @@ -940,7 +940,7 @@ vbool64_t test_vmseq_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16mf2_b32_m( @@ -949,7 +949,7 @@ vbool64_t test_vmseq_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmseq_vv_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16mf2_b32_m( @@ -958,7 +958,7 @@ vbool32_t test_vmseq_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m1_b16_m( @@ -967,7 +967,7 @@ vbool32_t test_vmseq_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmseq_vv_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m1_b16_m( @@ -976,7 +976,7 @@ vbool16_t test_vmseq_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m2_b8_m( @@ -985,7 +985,7 @@ vbool16_t test_vmseq_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmseq_vv_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m2_b8_m( @@ -994,7 +994,7 @@ vbool8_t test_vmseq_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m4_b4_m( @@ -1003,7 +1003,7 @@ vbool8_t test_vmseq_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmseq_vv_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m4_b4_m( @@ -1012,7 +1012,7 @@ vbool4_t test_vmseq_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m8_b2_m( @@ -1021,7 +1021,7 @@ vbool4_t test_vmseq_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmseq_vv_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m8_b2_m( @@ -1030,7 +1030,7 @@ vbool2_t test_vmseq_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32mf2_b64_m( @@ -1039,7 +1039,7 @@ vbool2_t test_vmseq_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmseq_vv_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32mf2_b64_m( @@ -1048,7 +1048,7 @@ vbool64_t test_vmseq_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m1_b32_m( @@ -1057,7 +1057,7 @@ vbool64_t test_vmseq_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmseq_vv_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m1_b32_m( @@ -1066,7 +1066,7 @@ vbool32_t test_vmseq_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m2_b16_m( @@ -1075,7 +1075,7 @@ vbool32_t test_vmseq_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmseq_vv_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m2_b16_m( @@ -1084,7 +1084,7 @@ vbool16_t test_vmseq_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m4_b8_m( @@ -1093,7 +1093,7 @@ vbool16_t test_vmseq_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmseq_vv_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m4_b8_m( @@ -1102,7 +1102,7 @@ vbool8_t test_vmseq_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m8_b4_m( @@ -1111,7 +1111,7 @@ vbool8_t test_vmseq_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmseq_vv_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m8_b4_m( @@ -1120,7 +1120,7 @@ vbool4_t test_vmseq_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m1_b64_m( @@ -1129,7 +1129,7 @@ vbool4_t test_vmseq_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmseq_vv_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m1_b64_m( @@ -1138,7 +1138,7 @@ vbool64_t test_vmseq_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m2_b32_m( @@ -1147,7 +1147,7 @@ vbool64_t test_vmseq_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmseq_vv_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m2_b32_m( @@ -1156,7 +1156,7 @@ vbool32_t test_vmseq_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m4_b16_m( @@ -1165,7 +1165,7 @@ vbool32_t test_vmseq_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmseq_vv_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m4_b16_m( @@ -1174,7 +1174,7 @@ vbool16_t test_vmseq_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m8_b8_m( @@ -1183,7 +1183,7 @@ vbool16_t test_vmseq_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmseq_vv_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_i64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m8_b8_m( @@ -1192,7 +1192,7 @@ vbool8_t test_vmseq_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_i64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf8_b64_m( @@ -1201,7 +1201,7 @@ vbool8_t test_vmseq_vx_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmseq_vv_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf8_b64_m( @@ -1210,7 +1210,7 @@ vbool64_t test_vmseq_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf4_b32_m( @@ -1219,7 +1219,7 @@ vbool64_t test_vmseq_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmseq_vv_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf4_b32_m( @@ -1228,7 +1228,7 @@ vbool32_t test_vmseq_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf2_b16_m( @@ -1237,7 +1237,7 @@ vbool32_t test_vmseq_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmseq_vv_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf2_b16_m( @@ -1246,7 +1246,7 @@ vbool16_t test_vmseq_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m1_b8_m( @@ -1255,7 +1255,7 @@ vbool16_t test_vmseq_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmseq_vv_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m1_b8_m( @@ -1264,7 +1264,7 @@ vbool8_t test_vmseq_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m2_b4_m( @@ -1273,7 +1273,7 @@ vbool8_t test_vmseq_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmseq_vv_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m2_b4_m( @@ -1282,7 +1282,7 @@ vbool4_t test_vmseq_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m4_b2_m( @@ -1291,7 +1291,7 @@ vbool4_t test_vmseq_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmseq_vv_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m4_b2_m( @@ -1300,7 +1300,7 @@ vbool2_t test_vmseq_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m8_b1_m( @@ -1309,7 +1309,7 @@ vbool2_t test_vmseq_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmseq_vv_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m8_b1_m( @@ -1318,7 +1318,7 @@ vbool1_t test_vmseq_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16mf4_b64_m( @@ -1327,7 +1327,7 @@ vbool1_t test_vmseq_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmseq_vv_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16mf4_b64_m( @@ -1336,7 +1336,7 @@ vbool64_t test_vmseq_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16mf2_b32_m( @@ -1345,7 +1345,7 @@ vbool64_t test_vmseq_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmseq_vv_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16mf2_b32_m( @@ -1354,7 +1354,7 @@ vbool32_t test_vmseq_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m1_b16_m( @@ -1363,7 +1363,7 @@ vbool32_t test_vmseq_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmseq_vv_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m1_b16_m( @@ -1372,7 +1372,7 @@ vbool16_t test_vmseq_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m2_b8_m( @@ -1381,7 +1381,7 @@ vbool16_t test_vmseq_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmseq_vv_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m2_b8_m( @@ -1390,7 +1390,7 @@ vbool8_t test_vmseq_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m4_b4_m( @@ -1399,7 +1399,7 @@ vbool8_t test_vmseq_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmseq_vv_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m4_b4_m( @@ -1408,7 +1408,7 @@ vbool4_t test_vmseq_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m8_b2_m( @@ -1417,7 +1417,7 @@ vbool4_t test_vmseq_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmseq_vv_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m8_b2_m( @@ -1426,7 +1426,7 @@ vbool2_t test_vmseq_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32mf2_b64_m( @@ -1435,7 +1435,7 @@ vbool2_t test_vmseq_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmseq_vv_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32mf2_b64_m( @@ -1444,7 +1444,7 @@ vbool64_t test_vmseq_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m1_b32_m( @@ -1453,7 +1453,7 @@ vbool64_t test_vmseq_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmseq_vv_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m1_b32_m( @@ -1462,7 +1462,7 @@ vbool32_t test_vmseq_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m2_b16_m( @@ -1471,7 +1471,7 @@ vbool32_t test_vmseq_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmseq_vv_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m2_b16_m( @@ -1480,7 +1480,7 @@ vbool16_t test_vmseq_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m4_b8_m( @@ -1489,7 +1489,7 @@ vbool16_t test_vmseq_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmseq_vv_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m4_b8_m( @@ -1498,7 +1498,7 @@ vbool8_t test_vmseq_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m8_b4_m( @@ -1507,7 +1507,7 @@ vbool8_t test_vmseq_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmseq_vv_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m8_b4_m( @@ -1516,7 +1516,7 @@ vbool4_t test_vmseq_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m1_b64_m( @@ -1525,7 +1525,7 @@ vbool4_t test_vmseq_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmseq_vv_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m1_b64_m( @@ -1534,7 +1534,7 @@ vbool64_t test_vmseq_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m2_b32_m( @@ -1543,7 +1543,7 @@ vbool64_t test_vmseq_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmseq_vv_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m2_b32_m( @@ -1552,7 +1552,7 @@ vbool32_t test_vmseq_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m4_b16_m( @@ -1561,7 +1561,7 @@ vbool32_t test_vmseq_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmseq_vv_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m4_b16_m( @@ -1570,7 +1570,7 @@ vbool16_t test_vmseq_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m8_b8_m( @@ -1579,7 +1579,7 @@ vbool16_t test_vmseq_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmseq_vv_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vv_u64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m8_b8_m( @@ -1588,6 +1588,6 @@ vbool8_t test_vmseq_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmseq_vx_u64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmset.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmset.c index 4c2d141616e721bc65b60ca0e06d096824a910e0..e90daaea186019a75cfe3a0c86fa3e30c50b598b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmset.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmset.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmset_m_b1(size_t vl) { - return vmset_m_b1(vl); + return __riscv_vmset_m_b1(vl); } // CHECK-RV64-LABEL: @test_vmset_m_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmset_m_b1(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmset_m_b2(size_t vl) { - return vmset_m_b2(vl); + return __riscv_vmset_m_b2(vl); } // CHECK-RV64-LABEL: @test_vmset_m_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmset_m_b2(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmset_m_b4(size_t vl) { - return vmset_m_b4(vl); + return __riscv_vmset_m_b4(vl); } // CHECK-RV64-LABEL: @test_vmset_m_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmset_m_b4(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmset_m_b8(size_t vl) { - return vmset_m_b8(vl); + return __riscv_vmset_m_b8(vl); } // CHECK-RV64-LABEL: @test_vmset_m_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmset_m_b8(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmset_m_b16(size_t vl) { - return vmset_m_b16(vl); + return __riscv_vmset_m_b16(vl); } // CHECK-RV64-LABEL: @test_vmset_m_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmset_m_b16(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmset_m_b32(size_t vl) { - return vmset_m_b32(vl); + return __riscv_vmset_m_b32(vl); } // CHECK-RV64-LABEL: @test_vmset_m_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmset_m_b32(size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmset_m_b64(size_t vl) { - return vmset_m_b64(vl); + return __riscv_vmset_m_b64(vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsge.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsge.c index 9e5235e3aa9fa3a0b9108992562395711aaa6e1f..1e6001027d4bd5230dc3747a1b6cf8d88af881f0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsge.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsge.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsge_vv_i8mf8_b64(op1, op2, vl); + return __riscv_vmsge_vv_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmsge_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf8_b64(op1, op2, vl); + return __riscv_vmsge_vx_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmsge_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsge_vv_i8mf4_b32(op1, op2, vl); + return __riscv_vmsge_vv_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmsge_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf4_b32(op1, op2, vl); + return __riscv_vmsge_vx_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmsge_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsge_vv_i8mf2_b16(op1, op2, vl); + return __riscv_vmsge_vv_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmsge_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf2_b16(op1, op2, vl); + return __riscv_vmsge_vx_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmsge_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsge_vv_i8m1_b8(op1, op2, vl); + return __riscv_vmsge_vv_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmsge_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m1_b8(op1, op2, vl); + return __riscv_vmsge_vx_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmsge_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsge_vv_i8m2_b4(op1, op2, vl); + return __riscv_vmsge_vv_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmsge_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m2_b4(op1, op2, vl); + return __riscv_vmsge_vx_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmsge_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsge_vv_i8m4_b2(op1, op2, vl); + return __riscv_vmsge_vv_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmsge_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m4_b2(op1, op2, vl); + return __riscv_vmsge_vx_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmsge_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsge_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsge_vv_i8m8_b1(op1, op2, vl); + return __riscv_vmsge_vv_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmsge_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsge_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m8_b1(op1, op2, vl); + return __riscv_vmsge_vx_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmsge_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsge_vv_i16mf4_b64(op1, op2, vl); + return __riscv_vmsge_vv_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmsge_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16mf4_b64(op1, op2, vl); + return __riscv_vmsge_vx_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmsge_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsge_vv_i16mf2_b32(op1, op2, vl); + return __riscv_vmsge_vv_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmsge_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16mf2_b32(op1, op2, vl); + return __riscv_vmsge_vx_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmsge_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsge_vv_i16m1_b16(op1, op2, vl); + return __riscv_vmsge_vv_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmsge_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m1_b16(op1, op2, vl); + return __riscv_vmsge_vx_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmsge_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsge_vv_i16m2_b8(op1, op2, vl); + return __riscv_vmsge_vv_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmsge_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m2_b8(op1, op2, vl); + return __riscv_vmsge_vx_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmsge_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsge_vv_i16m4_b4(op1, op2, vl); + return __riscv_vmsge_vv_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmsge_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m4_b4(op1, op2, vl); + return __riscv_vmsge_vx_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmsge_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsge_vv_i16m8_b2(op1, op2, vl); + return __riscv_vmsge_vv_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmsge_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m8_b2(op1, op2, vl); + return __riscv_vmsge_vx_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmsge_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsge_vv_i32mf2_b64(op1, op2, vl); + return __riscv_vmsge_vv_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmsge_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32mf2_b64(op1, op2, vl); + return __riscv_vmsge_vx_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmsge_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsge_vv_i32m1_b32(op1, op2, vl); + return __riscv_vmsge_vv_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmsge_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m1_b32(op1, op2, vl); + return __riscv_vmsge_vx_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmsge_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsge_vv_i32m2_b16(op1, op2, vl); + return __riscv_vmsge_vv_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmsge_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m2_b16(op1, op2, vl); + return __riscv_vmsge_vx_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmsge_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsge_vv_i32m4_b8(op1, op2, vl); + return __riscv_vmsge_vv_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmsge_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m4_b8(op1, op2, vl); + return __riscv_vmsge_vx_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmsge_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsge_vv_i32m8_b4(op1, op2, vl); + return __riscv_vmsge_vv_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmsge_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m8_b4(op1, op2, vl); + return __riscv_vmsge_vx_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmsge_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsge_vv_i64m1_b64(op1, op2, vl); + return __riscv_vmsge_vv_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmsge_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m1_b64(op1, op2, vl); + return __riscv_vmsge_vx_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmsge_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsge_vv_i64m2_b32(op1, op2, vl); + return __riscv_vmsge_vv_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmsge_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m2_b32(op1, op2, vl); + return __riscv_vmsge_vx_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmsge_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsge_vv_i64m4_b16(op1, op2, vl); + return __riscv_vmsge_vv_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmsge_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m4_b16(op1, op2, vl); + return __riscv_vmsge_vx_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmsge_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsge_vv_i64m8_b8(op1, op2, vl); + return __riscv_vmsge_vv_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmsge_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m8_b8(op1, op2, vl); + return __riscv_vmsge_vx_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8mf8_b64_m( @@ -409,7 +409,7 @@ vbool8_t test_vmsge_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsge_vv_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf8_b64_m( @@ -418,7 +418,7 @@ vbool64_t test_vmsge_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8mf4_b32_m( @@ -427,7 +427,7 @@ vbool64_t test_vmsge_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsge_vv_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf4_b32_m( @@ -436,7 +436,7 @@ vbool32_t test_vmsge_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8mf2_b16_m( @@ -445,7 +445,7 @@ vbool32_t test_vmsge_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsge_vv_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf2_b16_m( @@ -454,7 +454,7 @@ vbool16_t test_vmsge_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m1_b8_m( @@ -463,7 +463,7 @@ vbool16_t test_vmsge_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsge_vv_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m1_b8_m( @@ -472,7 +472,7 @@ vbool8_t test_vmsge_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m2_b4_m( @@ -481,7 +481,7 @@ vbool8_t test_vmsge_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsge_vv_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m2_b4_m( @@ -490,7 +490,7 @@ vbool4_t test_vmsge_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m4_b2_m( @@ -499,7 +499,7 @@ vbool4_t test_vmsge_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsge_vv_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m4_b2_m( @@ -508,7 +508,7 @@ vbool2_t test_vmsge_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m8_b1_m( @@ -517,7 +517,7 @@ vbool2_t test_vmsge_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsge_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsge_vv_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m8_b1_m( @@ -526,7 +526,7 @@ vbool1_t test_vmsge_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsge_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16mf4_b64_m( @@ -535,7 +535,7 @@ vbool1_t test_vmsge_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsge_vv_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16mf4_b64_m( @@ -544,7 +544,7 @@ vbool64_t test_vmsge_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16mf2_b32_m( @@ -553,7 +553,7 @@ vbool64_t test_vmsge_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsge_vv_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16mf2_b32_m( @@ -562,7 +562,7 @@ vbool32_t test_vmsge_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m1_b16_m( @@ -571,7 +571,7 @@ vbool32_t test_vmsge_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsge_vv_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m1_b16_m( @@ -580,7 +580,7 @@ vbool16_t test_vmsge_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m2_b8_m( @@ -589,7 +589,7 @@ vbool16_t test_vmsge_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsge_vv_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m2_b8_m( @@ -598,7 +598,7 @@ vbool8_t test_vmsge_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m4_b4_m( @@ -607,7 +607,7 @@ vbool8_t test_vmsge_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsge_vv_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m4_b4_m( @@ -616,7 +616,7 @@ vbool4_t test_vmsge_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m8_b2_m( @@ -625,7 +625,7 @@ vbool4_t test_vmsge_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsge_vv_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m8_b2_m( @@ -634,7 +634,7 @@ vbool2_t test_vmsge_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32mf2_b64_m( @@ -643,7 +643,7 @@ vbool2_t test_vmsge_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsge_vv_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32mf2_b64_m( @@ -652,7 +652,7 @@ vbool64_t test_vmsge_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m1_b32_m( @@ -661,7 +661,7 @@ vbool64_t test_vmsge_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsge_vv_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m1_b32_m( @@ -670,7 +670,7 @@ vbool32_t test_vmsge_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m2_b16_m( @@ -679,7 +679,7 @@ vbool32_t test_vmsge_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsge_vv_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m2_b16_m( @@ -688,7 +688,7 @@ vbool16_t test_vmsge_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m4_b8_m( @@ -697,7 +697,7 @@ vbool16_t test_vmsge_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsge_vv_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m4_b8_m( @@ -706,7 +706,7 @@ vbool8_t test_vmsge_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m8_b4_m( @@ -715,7 +715,7 @@ vbool8_t test_vmsge_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsge_vv_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m8_b4_m( @@ -724,7 +724,7 @@ vbool4_t test_vmsge_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m1_b64_m( @@ -733,7 +733,7 @@ vbool4_t test_vmsge_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsge_vv_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m1_b64_m( @@ -742,7 +742,7 @@ vbool64_t test_vmsge_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m2_b32_m( @@ -751,7 +751,7 @@ vbool64_t test_vmsge_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsge_vv_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m2_b32_m( @@ -760,7 +760,7 @@ vbool32_t test_vmsge_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m4_b16_m( @@ -769,7 +769,7 @@ vbool32_t test_vmsge_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsge_vv_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m4_b16_m( @@ -778,7 +778,7 @@ vbool16_t test_vmsge_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m8_b8_m( @@ -787,7 +787,7 @@ vbool16_t test_vmsge_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsge_vv_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsge_vv_i64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m8_b8_m( @@ -796,6 +796,6 @@ vbool8_t test_vmsge_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsge_vx_i64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgeu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgeu.c index 0fa09b0f825f021535fe5d6cccf4d299d5395f73..5379f9e12f036d81820163b0f4ed6d145287c33e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgeu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgeu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsgeu_vv_u8mf8_b64(op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmsgeu_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf8_b64(op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmsgeu_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsgeu_vv_u8mf4_b32(op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmsgeu_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf4_b32(op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmsgeu_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsgeu_vv_u8mf2_b16(op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmsgeu_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf2_b16(op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmsgeu_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsgeu_vv_u8m1_b8(op1, op2, vl); + return __riscv_vmsgeu_vv_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmsgeu_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m1_b8(op1, op2, vl); + return __riscv_vmsgeu_vx_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmsgeu_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsgeu_vv_u8m2_b4(op1, op2, vl); + return __riscv_vmsgeu_vv_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmsgeu_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m2_b4(op1, op2, vl); + return __riscv_vmsgeu_vx_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmsgeu_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsgeu_vv_u8m4_b2(op1, op2, vl); + return __riscv_vmsgeu_vv_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmsgeu_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m4_b2(op1, op2, vl); + return __riscv_vmsgeu_vx_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmsgeu_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgeu_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsgeu_vv_u8m8_b1(op1, op2, vl); + return __riscv_vmsgeu_vv_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmsgeu_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgeu_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m8_b1(op1, op2, vl); + return __riscv_vmsgeu_vx_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmsgeu_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsgeu_vv_u16mf4_b64(op1, op2, vl); + return __riscv_vmsgeu_vv_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmsgeu_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16mf4_b64(op1, op2, vl); + return __riscv_vmsgeu_vx_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmsgeu_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsgeu_vv_u16mf2_b32(op1, op2, vl); + return __riscv_vmsgeu_vv_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmsgeu_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16mf2_b32(op1, op2, vl); + return __riscv_vmsgeu_vx_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmsgeu_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsgeu_vv_u16m1_b16(op1, op2, vl); + return __riscv_vmsgeu_vv_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmsgeu_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m1_b16(op1, op2, vl); + return __riscv_vmsgeu_vx_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmsgeu_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsgeu_vv_u16m2_b8(op1, op2, vl); + return __riscv_vmsgeu_vv_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmsgeu_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m2_b8(op1, op2, vl); + return __riscv_vmsgeu_vx_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmsgeu_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsgeu_vv_u16m4_b4(op1, op2, vl); + return __riscv_vmsgeu_vv_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmsgeu_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m4_b4(op1, op2, vl); + return __riscv_vmsgeu_vx_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmsgeu_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsgeu_vv_u16m8_b2(op1, op2, vl); + return __riscv_vmsgeu_vv_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmsgeu_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m8_b2(op1, op2, vl); + return __riscv_vmsgeu_vx_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmsgeu_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsgeu_vv_u32mf2_b64(op1, op2, vl); + return __riscv_vmsgeu_vv_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmsgeu_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32mf2_b64(op1, op2, vl); + return __riscv_vmsgeu_vx_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmsgeu_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsgeu_vv_u32m1_b32(op1, op2, vl); + return __riscv_vmsgeu_vv_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmsgeu_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m1_b32(op1, op2, vl); + return __riscv_vmsgeu_vx_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmsgeu_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsgeu_vv_u32m2_b16(op1, op2, vl); + return __riscv_vmsgeu_vv_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmsgeu_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m2_b16(op1, op2, vl); + return __riscv_vmsgeu_vx_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmsgeu_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsgeu_vv_u32m4_b8(op1, op2, vl); + return __riscv_vmsgeu_vv_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmsgeu_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m4_b8(op1, op2, vl); + return __riscv_vmsgeu_vx_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmsgeu_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsgeu_vv_u32m8_b4(op1, op2, vl); + return __riscv_vmsgeu_vv_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmsgeu_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m8_b4(op1, op2, vl); + return __riscv_vmsgeu_vx_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmsgeu_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsgeu_vv_u64m1_b64(op1, op2, vl); + return __riscv_vmsgeu_vv_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmsgeu_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m1_b64(op1, op2, vl); + return __riscv_vmsgeu_vx_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmsgeu_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsgeu_vv_u64m2_b32(op1, op2, vl); + return __riscv_vmsgeu_vv_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmsgeu_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m2_b32(op1, op2, vl); + return __riscv_vmsgeu_vx_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmsgeu_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsgeu_vv_u64m4_b16(op1, op2, vl); + return __riscv_vmsgeu_vv_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmsgeu_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m4_b16(op1, op2, vl); + return __riscv_vmsgeu_vx_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmsgeu_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsgeu_vv_u64m8_b8(op1, op2, vl); + return __riscv_vmsgeu_vv_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmsgeu_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m8_b8(op1, op2, vl); + return __riscv_vmsgeu_vx_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8mf8_b64_m( @@ -409,7 +409,7 @@ vbool8_t test_vmsgeu_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsgeu_vv_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf8_b64_m( @@ -418,7 +418,7 @@ vbool64_t test_vmsgeu_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8mf4_b32_m( @@ -427,7 +427,7 @@ vbool64_t test_vmsgeu_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsgeu_vv_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf4_b32_m( @@ -436,7 +436,7 @@ vbool32_t test_vmsgeu_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8mf2_b16_m( @@ -445,7 +445,7 @@ vbool32_t test_vmsgeu_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsgeu_vv_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf2_b16_m( @@ -454,7 +454,7 @@ vbool16_t test_vmsgeu_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m1_b8_m( @@ -463,7 +463,7 @@ vbool16_t test_vmsgeu_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsgeu_vv_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m1_b8_m( @@ -472,7 +472,7 @@ vbool8_t test_vmsgeu_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m2_b4_m( @@ -481,7 +481,7 @@ vbool8_t test_vmsgeu_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsgeu_vv_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m2_b4_m( @@ -490,7 +490,7 @@ vbool4_t test_vmsgeu_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m4_b2_m( @@ -499,7 +499,7 @@ vbool4_t test_vmsgeu_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsgeu_vv_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m4_b2_m( @@ -508,7 +508,7 @@ vbool2_t test_vmsgeu_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m8_b1_m( @@ -517,7 +517,7 @@ vbool2_t test_vmsgeu_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgeu_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsgeu_vv_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m8_b1_m( @@ -526,7 +526,7 @@ vbool1_t test_vmsgeu_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgeu_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16mf4_b64_m( @@ -535,7 +535,7 @@ vbool1_t test_vmsgeu_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsgeu_vv_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16mf4_b64_m( @@ -544,7 +544,7 @@ vbool64_t test_vmsgeu_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16mf2_b32_m( @@ -553,7 +553,7 @@ vbool64_t test_vmsgeu_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsgeu_vv_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16mf2_b32_m( @@ -562,7 +562,7 @@ vbool32_t test_vmsgeu_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m1_b16_m( @@ -571,7 +571,7 @@ vbool32_t test_vmsgeu_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsgeu_vv_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m1_b16_m( @@ -580,7 +580,7 @@ vbool16_t test_vmsgeu_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m2_b8_m( @@ -589,7 +589,7 @@ vbool16_t test_vmsgeu_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsgeu_vv_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m2_b8_m( @@ -598,7 +598,7 @@ vbool8_t test_vmsgeu_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m4_b4_m( @@ -607,7 +607,7 @@ vbool8_t test_vmsgeu_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsgeu_vv_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m4_b4_m( @@ -616,7 +616,7 @@ vbool4_t test_vmsgeu_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m8_b2_m( @@ -625,7 +625,7 @@ vbool4_t test_vmsgeu_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsgeu_vv_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m8_b2_m( @@ -634,7 +634,7 @@ vbool2_t test_vmsgeu_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32mf2_b64_m( @@ -643,7 +643,7 @@ vbool2_t test_vmsgeu_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsgeu_vv_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32mf2_b64_m( @@ -652,7 +652,7 @@ vbool64_t test_vmsgeu_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m1_b32_m( @@ -661,7 +661,7 @@ vbool64_t test_vmsgeu_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsgeu_vv_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m1_b32_m( @@ -670,7 +670,7 @@ vbool32_t test_vmsgeu_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m2_b16_m( @@ -679,7 +679,7 @@ vbool32_t test_vmsgeu_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsgeu_vv_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m2_b16_m( @@ -688,7 +688,7 @@ vbool16_t test_vmsgeu_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m4_b8_m( @@ -697,7 +697,7 @@ vbool16_t test_vmsgeu_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsgeu_vv_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m4_b8_m( @@ -706,7 +706,7 @@ vbool8_t test_vmsgeu_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m8_b4_m( @@ -715,7 +715,7 @@ vbool8_t test_vmsgeu_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsgeu_vv_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m8_b4_m( @@ -724,7 +724,7 @@ vbool4_t test_vmsgeu_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m1_b64_m( @@ -733,7 +733,7 @@ vbool4_t test_vmsgeu_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsgeu_vv_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m1_b64_m( @@ -742,7 +742,7 @@ vbool64_t test_vmsgeu_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m2_b32_m( @@ -751,7 +751,7 @@ vbool64_t test_vmsgeu_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsgeu_vv_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m2_b32_m( @@ -760,7 +760,7 @@ vbool32_t test_vmsgeu_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m4_b16_m( @@ -769,7 +769,7 @@ vbool32_t test_vmsgeu_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsgeu_vv_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m4_b16_m( @@ -778,7 +778,7 @@ vbool16_t test_vmsgeu_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m8_b8_m( @@ -787,7 +787,7 @@ vbool16_t test_vmsgeu_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsgeu_vv_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vv_u64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m8_b8_m( @@ -796,6 +796,6 @@ vbool8_t test_vmsgeu_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsgeu_vx_u64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgt.c index 25875b6adba7f9e695c580832faacd0493990ff2..1b597fbbe174ac2f41fd7bb3a1198644c41fae01 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsgt_vv_i8mf8_b64(op1, op2, vl); + return __riscv_vmsgt_vv_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmsgt_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf8_b64(op1, op2, vl); + return __riscv_vmsgt_vx_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmsgt_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsgt_vv_i8mf4_b32(op1, op2, vl); + return __riscv_vmsgt_vv_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmsgt_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf4_b32(op1, op2, vl); + return __riscv_vmsgt_vx_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmsgt_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsgt_vv_i8mf2_b16(op1, op2, vl); + return __riscv_vmsgt_vv_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmsgt_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf2_b16(op1, op2, vl); + return __riscv_vmsgt_vx_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmsgt_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsgt_vv_i8m1_b8(op1, op2, vl); + return __riscv_vmsgt_vv_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmsgt_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m1_b8(op1, op2, vl); + return __riscv_vmsgt_vx_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmsgt_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsgt_vv_i8m2_b4(op1, op2, vl); + return __riscv_vmsgt_vv_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmsgt_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m2_b4(op1, op2, vl); + return __riscv_vmsgt_vx_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmsgt_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsgt_vv_i8m4_b2(op1, op2, vl); + return __riscv_vmsgt_vv_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmsgt_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m4_b2(op1, op2, vl); + return __riscv_vmsgt_vx_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmsgt_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgt_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsgt_vv_i8m8_b1(op1, op2, vl); + return __riscv_vmsgt_vv_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmsgt_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgt_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m8_b1(op1, op2, vl); + return __riscv_vmsgt_vx_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmsgt_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsgt_vv_i16mf4_b64(op1, op2, vl); + return __riscv_vmsgt_vv_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmsgt_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16mf4_b64(op1, op2, vl); + return __riscv_vmsgt_vx_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmsgt_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsgt_vv_i16mf2_b32(op1, op2, vl); + return __riscv_vmsgt_vv_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmsgt_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16mf2_b32(op1, op2, vl); + return __riscv_vmsgt_vx_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmsgt_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsgt_vv_i16m1_b16(op1, op2, vl); + return __riscv_vmsgt_vv_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmsgt_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m1_b16(op1, op2, vl); + return __riscv_vmsgt_vx_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmsgt_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsgt_vv_i16m2_b8(op1, op2, vl); + return __riscv_vmsgt_vv_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmsgt_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m2_b8(op1, op2, vl); + return __riscv_vmsgt_vx_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmsgt_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsgt_vv_i16m4_b4(op1, op2, vl); + return __riscv_vmsgt_vv_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmsgt_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m4_b4(op1, op2, vl); + return __riscv_vmsgt_vx_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmsgt_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsgt_vv_i16m8_b2(op1, op2, vl); + return __riscv_vmsgt_vv_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmsgt_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m8_b2(op1, op2, vl); + return __riscv_vmsgt_vx_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmsgt_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsgt_vv_i32mf2_b64(op1, op2, vl); + return __riscv_vmsgt_vv_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmsgt_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32mf2_b64(op1, op2, vl); + return __riscv_vmsgt_vx_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmsgt_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsgt_vv_i32m1_b32(op1, op2, vl); + return __riscv_vmsgt_vv_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmsgt_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m1_b32(op1, op2, vl); + return __riscv_vmsgt_vx_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmsgt_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsgt_vv_i32m2_b16(op1, op2, vl); + return __riscv_vmsgt_vv_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmsgt_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m2_b16(op1, op2, vl); + return __riscv_vmsgt_vx_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmsgt_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsgt_vv_i32m4_b8(op1, op2, vl); + return __riscv_vmsgt_vv_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmsgt_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m4_b8(op1, op2, vl); + return __riscv_vmsgt_vx_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmsgt_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsgt_vv_i32m8_b4(op1, op2, vl); + return __riscv_vmsgt_vv_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmsgt_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m8_b4(op1, op2, vl); + return __riscv_vmsgt_vx_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmsgt_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsgt_vv_i64m1_b64(op1, op2, vl); + return __riscv_vmsgt_vv_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmsgt_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m1_b64(op1, op2, vl); + return __riscv_vmsgt_vx_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmsgt_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsgt_vv_i64m2_b32(op1, op2, vl); + return __riscv_vmsgt_vv_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmsgt_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m2_b32(op1, op2, vl); + return __riscv_vmsgt_vx_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmsgt_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsgt_vv_i64m4_b16(op1, op2, vl); + return __riscv_vmsgt_vv_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmsgt_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m4_b16(op1, op2, vl); + return __riscv_vmsgt_vx_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmsgt_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsgt_vv_i64m8_b8(op1, op2, vl); + return __riscv_vmsgt_vv_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmsgt_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m8_b8(op1, op2, vl); + return __riscv_vmsgt_vx_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8mf8_b64_m( @@ -409,7 +409,7 @@ vbool8_t test_vmsgt_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsgt_vv_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf8_b64_m( @@ -418,7 +418,7 @@ vbool64_t test_vmsgt_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8mf4_b32_m( @@ -427,7 +427,7 @@ vbool64_t test_vmsgt_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsgt_vv_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf4_b32_m( @@ -436,7 +436,7 @@ vbool32_t test_vmsgt_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8mf2_b16_m( @@ -445,7 +445,7 @@ vbool32_t test_vmsgt_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsgt_vv_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf2_b16_m( @@ -454,7 +454,7 @@ vbool16_t test_vmsgt_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m1_b8_m( @@ -463,7 +463,7 @@ vbool16_t test_vmsgt_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsgt_vv_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m1_b8_m( @@ -472,7 +472,7 @@ vbool8_t test_vmsgt_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m2_b4_m( @@ -481,7 +481,7 @@ vbool8_t test_vmsgt_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsgt_vv_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m2_b4_m( @@ -490,7 +490,7 @@ vbool4_t test_vmsgt_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m4_b2_m( @@ -499,7 +499,7 @@ vbool4_t test_vmsgt_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsgt_vv_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m4_b2_m( @@ -508,7 +508,7 @@ vbool2_t test_vmsgt_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m8_b1_m( @@ -517,7 +517,7 @@ vbool2_t test_vmsgt_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgt_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsgt_vv_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m8_b1_m( @@ -526,7 +526,7 @@ vbool1_t test_vmsgt_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgt_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16mf4_b64_m( @@ -535,7 +535,7 @@ vbool1_t test_vmsgt_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsgt_vv_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16mf4_b64_m( @@ -544,7 +544,7 @@ vbool64_t test_vmsgt_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16mf2_b32_m( @@ -553,7 +553,7 @@ vbool64_t test_vmsgt_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsgt_vv_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16mf2_b32_m( @@ -562,7 +562,7 @@ vbool32_t test_vmsgt_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m1_b16_m( @@ -571,7 +571,7 @@ vbool32_t test_vmsgt_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsgt_vv_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m1_b16_m( @@ -580,7 +580,7 @@ vbool16_t test_vmsgt_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m2_b8_m( @@ -589,7 +589,7 @@ vbool16_t test_vmsgt_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsgt_vv_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m2_b8_m( @@ -598,7 +598,7 @@ vbool8_t test_vmsgt_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m4_b4_m( @@ -607,7 +607,7 @@ vbool8_t test_vmsgt_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsgt_vv_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m4_b4_m( @@ -616,7 +616,7 @@ vbool4_t test_vmsgt_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m8_b2_m( @@ -625,7 +625,7 @@ vbool4_t test_vmsgt_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsgt_vv_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m8_b2_m( @@ -634,7 +634,7 @@ vbool2_t test_vmsgt_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32mf2_b64_m( @@ -643,7 +643,7 @@ vbool2_t test_vmsgt_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsgt_vv_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32mf2_b64_m( @@ -652,7 +652,7 @@ vbool64_t test_vmsgt_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m1_b32_m( @@ -661,7 +661,7 @@ vbool64_t test_vmsgt_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsgt_vv_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m1_b32_m( @@ -670,7 +670,7 @@ vbool32_t test_vmsgt_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m2_b16_m( @@ -679,7 +679,7 @@ vbool32_t test_vmsgt_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsgt_vv_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m2_b16_m( @@ -688,7 +688,7 @@ vbool16_t test_vmsgt_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m4_b8_m( @@ -697,7 +697,7 @@ vbool16_t test_vmsgt_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsgt_vv_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m4_b8_m( @@ -706,7 +706,7 @@ vbool8_t test_vmsgt_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m8_b4_m( @@ -715,7 +715,7 @@ vbool8_t test_vmsgt_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsgt_vv_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m8_b4_m( @@ -724,7 +724,7 @@ vbool4_t test_vmsgt_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m1_b64_m( @@ -733,7 +733,7 @@ vbool4_t test_vmsgt_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsgt_vv_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m1_b64_m( @@ -742,7 +742,7 @@ vbool64_t test_vmsgt_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m2_b32_m( @@ -751,7 +751,7 @@ vbool64_t test_vmsgt_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsgt_vv_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m2_b32_m( @@ -760,7 +760,7 @@ vbool32_t test_vmsgt_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m4_b16_m( @@ -769,7 +769,7 @@ vbool32_t test_vmsgt_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsgt_vv_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m4_b16_m( @@ -778,7 +778,7 @@ vbool16_t test_vmsgt_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m8_b8_m( @@ -787,7 +787,7 @@ vbool16_t test_vmsgt_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsgt_vv_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsgt_vv_i64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m8_b8_m( @@ -796,6 +796,6 @@ vbool8_t test_vmsgt_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsgt_vx_i64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgtu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgtu.c index f8d4079364d1426b879a3abd89fe4fdee66f5fbc..1e46342fd9fd040d1ab8c9e5394b591761c09ef9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgtu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsgtu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsgtu_vv_u8mf8_b64(op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmsgtu_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf8_b64(op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmsgtu_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsgtu_vv_u8mf4_b32(op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmsgtu_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf4_b32(op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmsgtu_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsgtu_vv_u8mf2_b16(op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmsgtu_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf2_b16(op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmsgtu_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsgtu_vv_u8m1_b8(op1, op2, vl); + return __riscv_vmsgtu_vv_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmsgtu_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m1_b8(op1, op2, vl); + return __riscv_vmsgtu_vx_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmsgtu_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsgtu_vv_u8m2_b4(op1, op2, vl); + return __riscv_vmsgtu_vv_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmsgtu_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m2_b4(op1, op2, vl); + return __riscv_vmsgtu_vx_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmsgtu_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsgtu_vv_u8m4_b2(op1, op2, vl); + return __riscv_vmsgtu_vv_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmsgtu_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m4_b2(op1, op2, vl); + return __riscv_vmsgtu_vx_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmsgtu_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgtu_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsgtu_vv_u8m8_b1(op1, op2, vl); + return __riscv_vmsgtu_vv_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmsgtu_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgtu_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m8_b1(op1, op2, vl); + return __riscv_vmsgtu_vx_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmsgtu_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsgtu_vv_u16mf4_b64(op1, op2, vl); + return __riscv_vmsgtu_vv_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmsgtu_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16mf4_b64(op1, op2, vl); + return __riscv_vmsgtu_vx_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmsgtu_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsgtu_vv_u16mf2_b32(op1, op2, vl); + return __riscv_vmsgtu_vv_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmsgtu_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16mf2_b32(op1, op2, vl); + return __riscv_vmsgtu_vx_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmsgtu_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsgtu_vv_u16m1_b16(op1, op2, vl); + return __riscv_vmsgtu_vv_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmsgtu_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m1_b16(op1, op2, vl); + return __riscv_vmsgtu_vx_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmsgtu_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsgtu_vv_u16m2_b8(op1, op2, vl); + return __riscv_vmsgtu_vv_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmsgtu_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m2_b8(op1, op2, vl); + return __riscv_vmsgtu_vx_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmsgtu_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsgtu_vv_u16m4_b4(op1, op2, vl); + return __riscv_vmsgtu_vv_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmsgtu_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m4_b4(op1, op2, vl); + return __riscv_vmsgtu_vx_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmsgtu_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsgtu_vv_u16m8_b2(op1, op2, vl); + return __riscv_vmsgtu_vv_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmsgtu_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m8_b2(op1, op2, vl); + return __riscv_vmsgtu_vx_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmsgtu_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsgtu_vv_u32mf2_b64(op1, op2, vl); + return __riscv_vmsgtu_vv_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmsgtu_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32mf2_b64(op1, op2, vl); + return __riscv_vmsgtu_vx_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmsgtu_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsgtu_vv_u32m1_b32(op1, op2, vl); + return __riscv_vmsgtu_vv_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmsgtu_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m1_b32(op1, op2, vl); + return __riscv_vmsgtu_vx_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmsgtu_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsgtu_vv_u32m2_b16(op1, op2, vl); + return __riscv_vmsgtu_vv_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmsgtu_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m2_b16(op1, op2, vl); + return __riscv_vmsgtu_vx_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmsgtu_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsgtu_vv_u32m4_b8(op1, op2, vl); + return __riscv_vmsgtu_vv_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmsgtu_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m4_b8(op1, op2, vl); + return __riscv_vmsgtu_vx_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmsgtu_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsgtu_vv_u32m8_b4(op1, op2, vl); + return __riscv_vmsgtu_vv_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmsgtu_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m8_b4(op1, op2, vl); + return __riscv_vmsgtu_vx_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmsgtu_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsgtu_vv_u64m1_b64(op1, op2, vl); + return __riscv_vmsgtu_vv_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmsgtu_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m1_b64(op1, op2, vl); + return __riscv_vmsgtu_vx_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmsgtu_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsgtu_vv_u64m2_b32(op1, op2, vl); + return __riscv_vmsgtu_vv_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmsgtu_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m2_b32(op1, op2, vl); + return __riscv_vmsgtu_vx_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmsgtu_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsgtu_vv_u64m4_b16(op1, op2, vl); + return __riscv_vmsgtu_vv_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmsgtu_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m4_b16(op1, op2, vl); + return __riscv_vmsgtu_vx_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmsgtu_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsgtu_vv_u64m8_b8(op1, op2, vl); + return __riscv_vmsgtu_vv_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmsgtu_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m8_b8(op1, op2, vl); + return __riscv_vmsgtu_vx_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8mf8_b64_m( @@ -409,7 +409,7 @@ vbool8_t test_vmsgtu_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsgtu_vv_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf8_b64_m( @@ -418,7 +418,7 @@ vbool64_t test_vmsgtu_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8mf4_b32_m( @@ -427,7 +427,7 @@ vbool64_t test_vmsgtu_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsgtu_vv_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf4_b32_m( @@ -436,7 +436,7 @@ vbool32_t test_vmsgtu_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8mf2_b16_m( @@ -445,7 +445,7 @@ vbool32_t test_vmsgtu_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsgtu_vv_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf2_b16_m( @@ -454,7 +454,7 @@ vbool16_t test_vmsgtu_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m1_b8_m( @@ -463,7 +463,7 @@ vbool16_t test_vmsgtu_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsgtu_vv_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m1_b8_m( @@ -472,7 +472,7 @@ vbool8_t test_vmsgtu_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m2_b4_m( @@ -481,7 +481,7 @@ vbool8_t test_vmsgtu_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsgtu_vv_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m2_b4_m( @@ -490,7 +490,7 @@ vbool4_t test_vmsgtu_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m4_b2_m( @@ -499,7 +499,7 @@ vbool4_t test_vmsgtu_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsgtu_vv_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m4_b2_m( @@ -508,7 +508,7 @@ vbool2_t test_vmsgtu_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m8_b1_m( @@ -517,7 +517,7 @@ vbool2_t test_vmsgtu_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgtu_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsgtu_vv_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m8_b1_m( @@ -526,7 +526,7 @@ vbool1_t test_vmsgtu_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgtu_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16mf4_b64_m( @@ -535,7 +535,7 @@ vbool1_t test_vmsgtu_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsgtu_vv_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16mf4_b64_m( @@ -544,7 +544,7 @@ vbool64_t test_vmsgtu_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16mf2_b32_m( @@ -553,7 +553,7 @@ vbool64_t test_vmsgtu_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsgtu_vv_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16mf2_b32_m( @@ -562,7 +562,7 @@ vbool32_t test_vmsgtu_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m1_b16_m( @@ -571,7 +571,7 @@ vbool32_t test_vmsgtu_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsgtu_vv_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m1_b16_m( @@ -580,7 +580,7 @@ vbool16_t test_vmsgtu_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m2_b8_m( @@ -589,7 +589,7 @@ vbool16_t test_vmsgtu_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsgtu_vv_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m2_b8_m( @@ -598,7 +598,7 @@ vbool8_t test_vmsgtu_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m4_b4_m( @@ -607,7 +607,7 @@ vbool8_t test_vmsgtu_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsgtu_vv_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m4_b4_m( @@ -616,7 +616,7 @@ vbool4_t test_vmsgtu_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m8_b2_m( @@ -625,7 +625,7 @@ vbool4_t test_vmsgtu_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsgtu_vv_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m8_b2_m( @@ -634,7 +634,7 @@ vbool2_t test_vmsgtu_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32mf2_b64_m( @@ -643,7 +643,7 @@ vbool2_t test_vmsgtu_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsgtu_vv_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32mf2_b64_m( @@ -652,7 +652,7 @@ vbool64_t test_vmsgtu_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m1_b32_m( @@ -661,7 +661,7 @@ vbool64_t test_vmsgtu_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsgtu_vv_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m1_b32_m( @@ -670,7 +670,7 @@ vbool32_t test_vmsgtu_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m2_b16_m( @@ -679,7 +679,7 @@ vbool32_t test_vmsgtu_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsgtu_vv_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m2_b16_m( @@ -688,7 +688,7 @@ vbool16_t test_vmsgtu_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m4_b8_m( @@ -697,7 +697,7 @@ vbool16_t test_vmsgtu_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsgtu_vv_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m4_b8_m( @@ -706,7 +706,7 @@ vbool8_t test_vmsgtu_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m8_b4_m( @@ -715,7 +715,7 @@ vbool8_t test_vmsgtu_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsgtu_vv_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m8_b4_m( @@ -724,7 +724,7 @@ vbool4_t test_vmsgtu_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m1_b64_m( @@ -733,7 +733,7 @@ vbool4_t test_vmsgtu_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsgtu_vv_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m1_b64_m( @@ -742,7 +742,7 @@ vbool64_t test_vmsgtu_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m2_b32_m( @@ -751,7 +751,7 @@ vbool64_t test_vmsgtu_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsgtu_vv_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m2_b32_m( @@ -760,7 +760,7 @@ vbool32_t test_vmsgtu_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m4_b16_m( @@ -769,7 +769,7 @@ vbool32_t test_vmsgtu_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsgtu_vv_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m4_b16_m( @@ -778,7 +778,7 @@ vbool16_t test_vmsgtu_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m8_b8_m( @@ -787,7 +787,7 @@ vbool16_t test_vmsgtu_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsgtu_vv_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vv_u64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m8_b8_m( @@ -796,6 +796,6 @@ vbool8_t test_vmsgtu_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsgtu_vx_u64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsif.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsif.c index cd3bb94d22e22c9c2d07dcaeab5609120bbad325..23806d9eff070bebbc3dd8a8fdbbfa4a9f4237d2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsif.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsif.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsif_m_b1(vbool1_t op1, size_t vl) { - return vmsif_m_b1(op1, vl); + return __riscv_vmsif_m_b1(op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmsif_m_b1(vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsif_m_b2(vbool2_t op1, size_t vl) { - return vmsif_m_b2(op1, vl); + return __riscv_vmsif_m_b2(op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmsif_m_b2(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsif_m_b4(vbool4_t op1, size_t vl) { - return vmsif_m_b4(op1, vl); + return __riscv_vmsif_m_b4(op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmsif_m_b4(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsif_m_b8(vbool8_t op1, size_t vl) { - return vmsif_m_b8(op1, vl); + return __riscv_vmsif_m_b8(op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmsif_m_b8(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsif_m_b16(vbool16_t op1, size_t vl) { - return vmsif_m_b16(op1, vl); + return __riscv_vmsif_m_b16(op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmsif_m_b16(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsif_m_b32(vbool32_t op1, size_t vl) { - return vmsif_m_b32(op1, vl); + return __riscv_vmsif_m_b32(op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b64( @@ -66,7 +66,7 @@ vbool32_t test_vmsif_m_b32(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsif_m_b64(vbool64_t op1, size_t vl) { - return vmsif_m_b64(op1, vl); + return __riscv_vmsif_m_b64(op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b1_m( @@ -75,7 +75,7 @@ vbool64_t test_vmsif_m_b64(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsif_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { - return vmsif_m_b1_m(mask, op1, vl); + return __riscv_vmsif_m_b1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b2_m( @@ -84,7 +84,7 @@ vbool1_t test_vmsif_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsif_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { - return vmsif_m_b2_m(mask, op1, vl); + return __riscv_vmsif_m_b2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b4_m( @@ -93,7 +93,7 @@ vbool2_t test_vmsif_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsif_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { - return vmsif_m_b4_m(mask, op1, vl); + return __riscv_vmsif_m_b4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b8_m( @@ -102,7 +102,7 @@ vbool4_t test_vmsif_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsif_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return vmsif_m_b8_m(mask, op1, vl); + return __riscv_vmsif_m_b8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b16_m( @@ -111,7 +111,7 @@ vbool8_t test_vmsif_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsif_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return vmsif_m_b16_m(mask, op1, vl); + return __riscv_vmsif_m_b16_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b32_m( @@ -120,7 +120,7 @@ vbool16_t test_vmsif_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsif_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return vmsif_m_b32_m(mask, op1, vl); + return __riscv_vmsif_m_b32_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b64_m( @@ -129,6 +129,6 @@ vbool32_t test_vmsif_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsif_m_b64_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return vmsif_m_b64_m(mask, op1, vl); + return __riscv_vmsif_m_b64_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsle.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsle.c index b067a7730d86419daa9ca980a0cd06987f0bf59a..7b42d194a4b6686dd31c2d8eadddbb22467e4350 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsle.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsle.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsle_vv_i8mf8_b64(op1, op2, vl); + return __riscv_vmsle_vv_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmsle_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf8_b64(op1, op2, vl); + return __riscv_vmsle_vx_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmsle_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsle_vv_i8mf4_b32(op1, op2, vl); + return __riscv_vmsle_vv_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmsle_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf4_b32(op1, op2, vl); + return __riscv_vmsle_vx_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmsle_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsle_vv_i8mf2_b16(op1, op2, vl); + return __riscv_vmsle_vv_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmsle_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf2_b16(op1, op2, vl); + return __riscv_vmsle_vx_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmsle_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsle_vv_i8m1_b8(op1, op2, vl); + return __riscv_vmsle_vv_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmsle_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m1_b8(op1, op2, vl); + return __riscv_vmsle_vx_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmsle_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsle_vv_i8m2_b4(op1, op2, vl); + return __riscv_vmsle_vv_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmsle_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m2_b4(op1, op2, vl); + return __riscv_vmsle_vx_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmsle_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsle_vv_i8m4_b2(op1, op2, vl); + return __riscv_vmsle_vv_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmsle_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m4_b2(op1, op2, vl); + return __riscv_vmsle_vx_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmsle_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsle_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsle_vv_i8m8_b1(op1, op2, vl); + return __riscv_vmsle_vv_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmsle_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsle_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m8_b1(op1, op2, vl); + return __riscv_vmsle_vx_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmsle_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsle_vv_i16mf4_b64(op1, op2, vl); + return __riscv_vmsle_vv_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmsle_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16mf4_b64(op1, op2, vl); + return __riscv_vmsle_vx_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmsle_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsle_vv_i16mf2_b32(op1, op2, vl); + return __riscv_vmsle_vv_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmsle_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16mf2_b32(op1, op2, vl); + return __riscv_vmsle_vx_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmsle_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsle_vv_i16m1_b16(op1, op2, vl); + return __riscv_vmsle_vv_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmsle_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m1_b16(op1, op2, vl); + return __riscv_vmsle_vx_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmsle_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsle_vv_i16m2_b8(op1, op2, vl); + return __riscv_vmsle_vv_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmsle_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m2_b8(op1, op2, vl); + return __riscv_vmsle_vx_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmsle_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsle_vv_i16m4_b4(op1, op2, vl); + return __riscv_vmsle_vv_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmsle_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m4_b4(op1, op2, vl); + return __riscv_vmsle_vx_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmsle_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsle_vv_i16m8_b2(op1, op2, vl); + return __riscv_vmsle_vv_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmsle_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m8_b2(op1, op2, vl); + return __riscv_vmsle_vx_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmsle_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsle_vv_i32mf2_b64(op1, op2, vl); + return __riscv_vmsle_vv_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmsle_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32mf2_b64(op1, op2, vl); + return __riscv_vmsle_vx_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmsle_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsle_vv_i32m1_b32(op1, op2, vl); + return __riscv_vmsle_vv_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmsle_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m1_b32(op1, op2, vl); + return __riscv_vmsle_vx_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmsle_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsle_vv_i32m2_b16(op1, op2, vl); + return __riscv_vmsle_vv_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmsle_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m2_b16(op1, op2, vl); + return __riscv_vmsle_vx_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmsle_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsle_vv_i32m4_b8(op1, op2, vl); + return __riscv_vmsle_vv_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmsle_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m4_b8(op1, op2, vl); + return __riscv_vmsle_vx_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmsle_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsle_vv_i32m8_b4(op1, op2, vl); + return __riscv_vmsle_vv_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmsle_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m8_b4(op1, op2, vl); + return __riscv_vmsle_vx_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmsle_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsle_vv_i64m1_b64(op1, op2, vl); + return __riscv_vmsle_vv_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmsle_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m1_b64(op1, op2, vl); + return __riscv_vmsle_vx_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmsle_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsle_vv_i64m2_b32(op1, op2, vl); + return __riscv_vmsle_vv_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmsle_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m2_b32(op1, op2, vl); + return __riscv_vmsle_vx_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmsle_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsle_vv_i64m4_b16(op1, op2, vl); + return __riscv_vmsle_vv_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmsle_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m4_b16(op1, op2, vl); + return __riscv_vmsle_vx_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmsle_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsle_vv_i64m8_b8(op1, op2, vl); + return __riscv_vmsle_vv_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmsle_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m8_b8(op1, op2, vl); + return __riscv_vmsle_vx_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8mf8_b64_m( @@ -409,7 +409,7 @@ vbool8_t test_vmsle_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsle_vv_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf8_b64_m( @@ -418,7 +418,7 @@ vbool64_t test_vmsle_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8mf4_b32_m( @@ -427,7 +427,7 @@ vbool64_t test_vmsle_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsle_vv_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf4_b32_m( @@ -436,7 +436,7 @@ vbool32_t test_vmsle_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8mf2_b16_m( @@ -445,7 +445,7 @@ vbool32_t test_vmsle_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsle_vv_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf2_b16_m( @@ -454,7 +454,7 @@ vbool16_t test_vmsle_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m1_b8_m( @@ -463,7 +463,7 @@ vbool16_t test_vmsle_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsle_vv_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m1_b8_m( @@ -472,7 +472,7 @@ vbool8_t test_vmsle_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m2_b4_m( @@ -481,7 +481,7 @@ vbool8_t test_vmsle_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsle_vv_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m2_b4_m( @@ -490,7 +490,7 @@ vbool4_t test_vmsle_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m4_b2_m( @@ -499,7 +499,7 @@ vbool4_t test_vmsle_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsle_vv_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m4_b2_m( @@ -508,7 +508,7 @@ vbool2_t test_vmsle_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m8_b1_m( @@ -517,7 +517,7 @@ vbool2_t test_vmsle_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsle_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsle_vv_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m8_b1_m( @@ -526,7 +526,7 @@ vbool1_t test_vmsle_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsle_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16mf4_b64_m( @@ -535,7 +535,7 @@ vbool1_t test_vmsle_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsle_vv_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16mf4_b64_m( @@ -544,7 +544,7 @@ vbool64_t test_vmsle_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16mf2_b32_m( @@ -553,7 +553,7 @@ vbool64_t test_vmsle_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsle_vv_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16mf2_b32_m( @@ -562,7 +562,7 @@ vbool32_t test_vmsle_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m1_b16_m( @@ -571,7 +571,7 @@ vbool32_t test_vmsle_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsle_vv_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m1_b16_m( @@ -580,7 +580,7 @@ vbool16_t test_vmsle_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m2_b8_m( @@ -589,7 +589,7 @@ vbool16_t test_vmsle_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsle_vv_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m2_b8_m( @@ -598,7 +598,7 @@ vbool8_t test_vmsle_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m4_b4_m( @@ -607,7 +607,7 @@ vbool8_t test_vmsle_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsle_vv_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m4_b4_m( @@ -616,7 +616,7 @@ vbool4_t test_vmsle_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m8_b2_m( @@ -625,7 +625,7 @@ vbool4_t test_vmsle_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsle_vv_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m8_b2_m( @@ -634,7 +634,7 @@ vbool2_t test_vmsle_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32mf2_b64_m( @@ -643,7 +643,7 @@ vbool2_t test_vmsle_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsle_vv_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32mf2_b64_m( @@ -652,7 +652,7 @@ vbool64_t test_vmsle_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m1_b32_m( @@ -661,7 +661,7 @@ vbool64_t test_vmsle_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsle_vv_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m1_b32_m( @@ -670,7 +670,7 @@ vbool32_t test_vmsle_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m2_b16_m( @@ -679,7 +679,7 @@ vbool32_t test_vmsle_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsle_vv_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m2_b16_m( @@ -688,7 +688,7 @@ vbool16_t test_vmsle_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m4_b8_m( @@ -697,7 +697,7 @@ vbool16_t test_vmsle_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsle_vv_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m4_b8_m( @@ -706,7 +706,7 @@ vbool8_t test_vmsle_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m8_b4_m( @@ -715,7 +715,7 @@ vbool8_t test_vmsle_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsle_vv_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m8_b4_m( @@ -724,7 +724,7 @@ vbool4_t test_vmsle_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m1_b64_m( @@ -733,7 +733,7 @@ vbool4_t test_vmsle_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsle_vv_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m1_b64_m( @@ -742,7 +742,7 @@ vbool64_t test_vmsle_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m2_b32_m( @@ -751,7 +751,7 @@ vbool64_t test_vmsle_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsle_vv_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m2_b32_m( @@ -760,7 +760,7 @@ vbool32_t test_vmsle_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m4_b16_m( @@ -769,7 +769,7 @@ vbool32_t test_vmsle_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsle_vv_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m4_b16_m( @@ -778,7 +778,7 @@ vbool16_t test_vmsle_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m8_b8_m( @@ -787,7 +787,7 @@ vbool16_t test_vmsle_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsle_vv_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsle_vv_i64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m8_b8_m( @@ -796,6 +796,6 @@ vbool8_t test_vmsle_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsle_vx_i64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsleu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsleu.c index dbb2078adbe62e10611cb4ce9f17b4a874d69798..29cd51ac7f63c3c9510f55cf79f454ecb8c7ffdf 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsleu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsleu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsleu_vv_u8mf8_b64(op1, op2, vl); + return __riscv_vmsleu_vv_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmsleu_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf8_b64(op1, op2, vl); + return __riscv_vmsleu_vx_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmsleu_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsleu_vv_u8mf4_b32(op1, op2, vl); + return __riscv_vmsleu_vv_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmsleu_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf4_b32(op1, op2, vl); + return __riscv_vmsleu_vx_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmsleu_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsleu_vv_u8mf2_b16(op1, op2, vl); + return __riscv_vmsleu_vv_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmsleu_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf2_b16(op1, op2, vl); + return __riscv_vmsleu_vx_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmsleu_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsleu_vv_u8m1_b8(op1, op2, vl); + return __riscv_vmsleu_vv_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmsleu_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m1_b8(op1, op2, vl); + return __riscv_vmsleu_vx_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmsleu_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsleu_vv_u8m2_b4(op1, op2, vl); + return __riscv_vmsleu_vv_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmsleu_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m2_b4(op1, op2, vl); + return __riscv_vmsleu_vx_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmsleu_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsleu_vv_u8m4_b2(op1, op2, vl); + return __riscv_vmsleu_vv_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmsleu_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m4_b2(op1, op2, vl); + return __riscv_vmsleu_vx_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmsleu_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsleu_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsleu_vv_u8m8_b1(op1, op2, vl); + return __riscv_vmsleu_vv_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmsleu_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsleu_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m8_b1(op1, op2, vl); + return __riscv_vmsleu_vx_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmsleu_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsleu_vv_u16mf4_b64(op1, op2, vl); + return __riscv_vmsleu_vv_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmsleu_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16mf4_b64(op1, op2, vl); + return __riscv_vmsleu_vx_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmsleu_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsleu_vv_u16mf2_b32(op1, op2, vl); + return __riscv_vmsleu_vv_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmsleu_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16mf2_b32(op1, op2, vl); + return __riscv_vmsleu_vx_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmsleu_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsleu_vv_u16m1_b16(op1, op2, vl); + return __riscv_vmsleu_vv_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmsleu_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m1_b16(op1, op2, vl); + return __riscv_vmsleu_vx_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmsleu_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsleu_vv_u16m2_b8(op1, op2, vl); + return __riscv_vmsleu_vv_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmsleu_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m2_b8(op1, op2, vl); + return __riscv_vmsleu_vx_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmsleu_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsleu_vv_u16m4_b4(op1, op2, vl); + return __riscv_vmsleu_vv_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmsleu_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m4_b4(op1, op2, vl); + return __riscv_vmsleu_vx_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmsleu_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsleu_vv_u16m8_b2(op1, op2, vl); + return __riscv_vmsleu_vv_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmsleu_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m8_b2(op1, op2, vl); + return __riscv_vmsleu_vx_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmsleu_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsleu_vv_u32mf2_b64(op1, op2, vl); + return __riscv_vmsleu_vv_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmsleu_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32mf2_b64(op1, op2, vl); + return __riscv_vmsleu_vx_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmsleu_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsleu_vv_u32m1_b32(op1, op2, vl); + return __riscv_vmsleu_vv_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmsleu_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m1_b32(op1, op2, vl); + return __riscv_vmsleu_vx_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmsleu_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsleu_vv_u32m2_b16(op1, op2, vl); + return __riscv_vmsleu_vv_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmsleu_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m2_b16(op1, op2, vl); + return __riscv_vmsleu_vx_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmsleu_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsleu_vv_u32m4_b8(op1, op2, vl); + return __riscv_vmsleu_vv_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmsleu_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m4_b8(op1, op2, vl); + return __riscv_vmsleu_vx_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmsleu_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsleu_vv_u32m8_b4(op1, op2, vl); + return __riscv_vmsleu_vv_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmsleu_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m8_b4(op1, op2, vl); + return __riscv_vmsleu_vx_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmsleu_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsleu_vv_u64m1_b64(op1, op2, vl); + return __riscv_vmsleu_vv_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmsleu_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m1_b64(op1, op2, vl); + return __riscv_vmsleu_vx_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmsleu_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsleu_vv_u64m2_b32(op1, op2, vl); + return __riscv_vmsleu_vv_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmsleu_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m2_b32(op1, op2, vl); + return __riscv_vmsleu_vx_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmsleu_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsleu_vv_u64m4_b16(op1, op2, vl); + return __riscv_vmsleu_vv_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmsleu_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m4_b16(op1, op2, vl); + return __riscv_vmsleu_vx_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmsleu_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsleu_vv_u64m8_b8(op1, op2, vl); + return __riscv_vmsleu_vv_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmsleu_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m8_b8(op1, op2, vl); + return __riscv_vmsleu_vx_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8mf8_b64_m( @@ -409,7 +409,7 @@ vbool8_t test_vmsleu_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsleu_vv_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf8_b64_m( @@ -418,7 +418,7 @@ vbool64_t test_vmsleu_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8mf4_b32_m( @@ -427,7 +427,7 @@ vbool64_t test_vmsleu_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsleu_vv_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf4_b32_m( @@ -436,7 +436,7 @@ vbool32_t test_vmsleu_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8mf2_b16_m( @@ -445,7 +445,7 @@ vbool32_t test_vmsleu_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsleu_vv_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf2_b16_m( @@ -454,7 +454,7 @@ vbool16_t test_vmsleu_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m1_b8_m( @@ -463,7 +463,7 @@ vbool16_t test_vmsleu_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsleu_vv_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m1_b8_m( @@ -472,7 +472,7 @@ vbool8_t test_vmsleu_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m2_b4_m( @@ -481,7 +481,7 @@ vbool8_t test_vmsleu_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsleu_vv_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m2_b4_m( @@ -490,7 +490,7 @@ vbool4_t test_vmsleu_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m4_b2_m( @@ -499,7 +499,7 @@ vbool4_t test_vmsleu_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsleu_vv_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m4_b2_m( @@ -508,7 +508,7 @@ vbool2_t test_vmsleu_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m8_b1_m( @@ -517,7 +517,7 @@ vbool2_t test_vmsleu_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsleu_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsleu_vv_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m8_b1_m( @@ -526,7 +526,7 @@ vbool1_t test_vmsleu_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsleu_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16mf4_b64_m( @@ -535,7 +535,7 @@ vbool1_t test_vmsleu_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsleu_vv_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16mf4_b64_m( @@ -544,7 +544,7 @@ vbool64_t test_vmsleu_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16mf2_b32_m( @@ -553,7 +553,7 @@ vbool64_t test_vmsleu_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsleu_vv_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16mf2_b32_m( @@ -562,7 +562,7 @@ vbool32_t test_vmsleu_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m1_b16_m( @@ -571,7 +571,7 @@ vbool32_t test_vmsleu_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsleu_vv_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m1_b16_m( @@ -580,7 +580,7 @@ vbool16_t test_vmsleu_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m2_b8_m( @@ -589,7 +589,7 @@ vbool16_t test_vmsleu_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsleu_vv_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m2_b8_m( @@ -598,7 +598,7 @@ vbool8_t test_vmsleu_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m4_b4_m( @@ -607,7 +607,7 @@ vbool8_t test_vmsleu_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsleu_vv_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m4_b4_m( @@ -616,7 +616,7 @@ vbool4_t test_vmsleu_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m8_b2_m( @@ -625,7 +625,7 @@ vbool4_t test_vmsleu_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsleu_vv_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m8_b2_m( @@ -634,7 +634,7 @@ vbool2_t test_vmsleu_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32mf2_b64_m( @@ -643,7 +643,7 @@ vbool2_t test_vmsleu_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsleu_vv_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32mf2_b64_m( @@ -652,7 +652,7 @@ vbool64_t test_vmsleu_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m1_b32_m( @@ -661,7 +661,7 @@ vbool64_t test_vmsleu_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsleu_vv_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m1_b32_m( @@ -670,7 +670,7 @@ vbool32_t test_vmsleu_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m2_b16_m( @@ -679,7 +679,7 @@ vbool32_t test_vmsleu_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsleu_vv_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m2_b16_m( @@ -688,7 +688,7 @@ vbool16_t test_vmsleu_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m4_b8_m( @@ -697,7 +697,7 @@ vbool16_t test_vmsleu_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsleu_vv_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m4_b8_m( @@ -706,7 +706,7 @@ vbool8_t test_vmsleu_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m8_b4_m( @@ -715,7 +715,7 @@ vbool8_t test_vmsleu_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsleu_vv_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m8_b4_m( @@ -724,7 +724,7 @@ vbool4_t test_vmsleu_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m1_b64_m( @@ -733,7 +733,7 @@ vbool4_t test_vmsleu_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsleu_vv_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m1_b64_m( @@ -742,7 +742,7 @@ vbool64_t test_vmsleu_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m2_b32_m( @@ -751,7 +751,7 @@ vbool64_t test_vmsleu_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsleu_vv_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m2_b32_m( @@ -760,7 +760,7 @@ vbool32_t test_vmsleu_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m4_b16_m( @@ -769,7 +769,7 @@ vbool32_t test_vmsleu_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsleu_vv_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m4_b16_m( @@ -778,7 +778,7 @@ vbool16_t test_vmsleu_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m8_b8_m( @@ -787,7 +787,7 @@ vbool16_t test_vmsleu_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsleu_vv_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsleu_vv_u64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m8_b8_m( @@ -796,6 +796,6 @@ vbool8_t test_vmsleu_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsleu_vx_u64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmslt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmslt.c index 64f5414e0113324daa4cda7fbfe9f21ee2145d40..c85841fb41e112e4fbb40416a32584b67f1756ab 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmslt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmslt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmslt_vv_i8mf8_b64(op1, op2, vl); + return __riscv_vmslt_vv_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmslt_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf8_b64(op1, op2, vl); + return __riscv_vmslt_vx_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmslt_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmslt_vv_i8mf4_b32(op1, op2, vl); + return __riscv_vmslt_vv_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmslt_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf4_b32(op1, op2, vl); + return __riscv_vmslt_vx_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmslt_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmslt_vv_i8mf2_b16(op1, op2, vl); + return __riscv_vmslt_vv_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmslt_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf2_b16(op1, op2, vl); + return __riscv_vmslt_vx_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmslt_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmslt_vv_i8m1_b8(op1, op2, vl); + return __riscv_vmslt_vv_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmslt_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m1_b8(op1, op2, vl); + return __riscv_vmslt_vx_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmslt_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmslt_vv_i8m2_b4(op1, op2, vl); + return __riscv_vmslt_vv_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmslt_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m2_b4(op1, op2, vl); + return __riscv_vmslt_vx_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmslt_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmslt_vv_i8m4_b2(op1, op2, vl); + return __riscv_vmslt_vv_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmslt_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m4_b2(op1, op2, vl); + return __riscv_vmslt_vx_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmslt_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmslt_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmslt_vv_i8m8_b1(op1, op2, vl); + return __riscv_vmslt_vv_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmslt_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmslt_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m8_b1(op1, op2, vl); + return __riscv_vmslt_vx_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmslt_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmslt_vv_i16mf4_b64(op1, op2, vl); + return __riscv_vmslt_vv_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmslt_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16mf4_b64(op1, op2, vl); + return __riscv_vmslt_vx_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmslt_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmslt_vv_i16mf2_b32(op1, op2, vl); + return __riscv_vmslt_vv_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmslt_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16mf2_b32(op1, op2, vl); + return __riscv_vmslt_vx_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmslt_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmslt_vv_i16m1_b16(op1, op2, vl); + return __riscv_vmslt_vv_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmslt_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m1_b16(op1, op2, vl); + return __riscv_vmslt_vx_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmslt_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmslt_vv_i16m2_b8(op1, op2, vl); + return __riscv_vmslt_vv_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmslt_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m2_b8(op1, op2, vl); + return __riscv_vmslt_vx_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmslt_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmslt_vv_i16m4_b4(op1, op2, vl); + return __riscv_vmslt_vv_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmslt_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m4_b4(op1, op2, vl); + return __riscv_vmslt_vx_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmslt_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmslt_vv_i16m8_b2(op1, op2, vl); + return __riscv_vmslt_vv_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmslt_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m8_b2(op1, op2, vl); + return __riscv_vmslt_vx_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmslt_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmslt_vv_i32mf2_b64(op1, op2, vl); + return __riscv_vmslt_vv_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmslt_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32mf2_b64(op1, op2, vl); + return __riscv_vmslt_vx_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmslt_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmslt_vv_i32m1_b32(op1, op2, vl); + return __riscv_vmslt_vv_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmslt_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m1_b32(op1, op2, vl); + return __riscv_vmslt_vx_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmslt_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmslt_vv_i32m2_b16(op1, op2, vl); + return __riscv_vmslt_vv_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmslt_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m2_b16(op1, op2, vl); + return __riscv_vmslt_vx_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmslt_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmslt_vv_i32m4_b8(op1, op2, vl); + return __riscv_vmslt_vv_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmslt_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m4_b8(op1, op2, vl); + return __riscv_vmslt_vx_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmslt_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmslt_vv_i32m8_b4(op1, op2, vl); + return __riscv_vmslt_vv_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmslt_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m8_b4(op1, op2, vl); + return __riscv_vmslt_vx_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmslt_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmslt_vv_i64m1_b64(op1, op2, vl); + return __riscv_vmslt_vv_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmslt_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m1_b64(op1, op2, vl); + return __riscv_vmslt_vx_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmslt_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmslt_vv_i64m2_b32(op1, op2, vl); + return __riscv_vmslt_vv_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmslt_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m2_b32(op1, op2, vl); + return __riscv_vmslt_vx_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmslt_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmslt_vv_i64m4_b16(op1, op2, vl); + return __riscv_vmslt_vv_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmslt_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m4_b16(op1, op2, vl); + return __riscv_vmslt_vx_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmslt_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmslt_vv_i64m8_b8(op1, op2, vl); + return __riscv_vmslt_vv_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmslt_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m8_b8(op1, op2, vl); + return __riscv_vmslt_vx_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8mf8_b64_m( @@ -409,7 +409,7 @@ vbool8_t test_vmslt_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmslt_vv_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf8_b64_m( @@ -418,7 +418,7 @@ vbool64_t test_vmslt_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8mf4_b32_m( @@ -427,7 +427,7 @@ vbool64_t test_vmslt_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmslt_vv_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf4_b32_m( @@ -436,7 +436,7 @@ vbool32_t test_vmslt_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8mf2_b16_m( @@ -445,7 +445,7 @@ vbool32_t test_vmslt_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmslt_vv_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf2_b16_m( @@ -454,7 +454,7 @@ vbool16_t test_vmslt_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m1_b8_m( @@ -463,7 +463,7 @@ vbool16_t test_vmslt_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmslt_vv_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m1_b8_m( @@ -472,7 +472,7 @@ vbool8_t test_vmslt_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m2_b4_m( @@ -481,7 +481,7 @@ vbool8_t test_vmslt_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmslt_vv_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m2_b4_m( @@ -490,7 +490,7 @@ vbool4_t test_vmslt_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m4_b2_m( @@ -499,7 +499,7 @@ vbool4_t test_vmslt_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmslt_vv_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m4_b2_m( @@ -508,7 +508,7 @@ vbool2_t test_vmslt_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m8_b1_m( @@ -517,7 +517,7 @@ vbool2_t test_vmslt_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmslt_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmslt_vv_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m8_b1_m( @@ -526,7 +526,7 @@ vbool1_t test_vmslt_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmslt_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16mf4_b64_m( @@ -535,7 +535,7 @@ vbool1_t test_vmslt_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmslt_vv_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16mf4_b64_m( @@ -544,7 +544,7 @@ vbool64_t test_vmslt_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16mf2_b32_m( @@ -553,7 +553,7 @@ vbool64_t test_vmslt_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmslt_vv_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16mf2_b32_m( @@ -562,7 +562,7 @@ vbool32_t test_vmslt_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m1_b16_m( @@ -571,7 +571,7 @@ vbool32_t test_vmslt_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmslt_vv_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m1_b16_m( @@ -580,7 +580,7 @@ vbool16_t test_vmslt_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m2_b8_m( @@ -589,7 +589,7 @@ vbool16_t test_vmslt_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmslt_vv_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m2_b8_m( @@ -598,7 +598,7 @@ vbool8_t test_vmslt_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m4_b4_m( @@ -607,7 +607,7 @@ vbool8_t test_vmslt_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmslt_vv_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m4_b4_m( @@ -616,7 +616,7 @@ vbool4_t test_vmslt_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m8_b2_m( @@ -625,7 +625,7 @@ vbool4_t test_vmslt_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmslt_vv_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m8_b2_m( @@ -634,7 +634,7 @@ vbool2_t test_vmslt_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32mf2_b64_m( @@ -643,7 +643,7 @@ vbool2_t test_vmslt_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmslt_vv_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32mf2_b64_m( @@ -652,7 +652,7 @@ vbool64_t test_vmslt_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m1_b32_m( @@ -661,7 +661,7 @@ vbool64_t test_vmslt_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmslt_vv_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m1_b32_m( @@ -670,7 +670,7 @@ vbool32_t test_vmslt_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m2_b16_m( @@ -679,7 +679,7 @@ vbool32_t test_vmslt_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmslt_vv_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m2_b16_m( @@ -688,7 +688,7 @@ vbool16_t test_vmslt_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m4_b8_m( @@ -697,7 +697,7 @@ vbool16_t test_vmslt_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmslt_vv_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m4_b8_m( @@ -706,7 +706,7 @@ vbool8_t test_vmslt_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m8_b4_m( @@ -715,7 +715,7 @@ vbool8_t test_vmslt_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmslt_vv_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m8_b4_m( @@ -724,7 +724,7 @@ vbool4_t test_vmslt_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m1_b64_m( @@ -733,7 +733,7 @@ vbool4_t test_vmslt_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmslt_vv_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m1_b64_m( @@ -742,7 +742,7 @@ vbool64_t test_vmslt_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m2_b32_m( @@ -751,7 +751,7 @@ vbool64_t test_vmslt_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmslt_vv_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m2_b32_m( @@ -760,7 +760,7 @@ vbool32_t test_vmslt_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m4_b16_m( @@ -769,7 +769,7 @@ vbool32_t test_vmslt_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmslt_vv_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m4_b16_m( @@ -778,7 +778,7 @@ vbool16_t test_vmslt_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m8_b8_m( @@ -787,7 +787,7 @@ vbool16_t test_vmslt_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmslt_vv_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmslt_vv_i64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m8_b8_m( @@ -796,6 +796,6 @@ vbool8_t test_vmslt_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmslt_vx_i64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsltu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsltu.c index 09e2f3e635c5585c9945b789e1d810de3cbe9f1b..b98a91d53f249d72eb220cfdf7f6fa068f6bc26a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsltu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsltu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsltu_vv_u8mf8_b64(op1, op2, vl); + return __riscv_vmsltu_vv_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmsltu_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf8_b64(op1, op2, vl); + return __riscv_vmsltu_vx_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmsltu_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsltu_vv_u8mf4_b32(op1, op2, vl); + return __riscv_vmsltu_vv_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmsltu_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf4_b32(op1, op2, vl); + return __riscv_vmsltu_vx_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmsltu_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsltu_vv_u8mf2_b16(op1, op2, vl); + return __riscv_vmsltu_vv_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmsltu_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf2_b16(op1, op2, vl); + return __riscv_vmsltu_vx_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmsltu_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsltu_vv_u8m1_b8(op1, op2, vl); + return __riscv_vmsltu_vv_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmsltu_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m1_b8(op1, op2, vl); + return __riscv_vmsltu_vx_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmsltu_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsltu_vv_u8m2_b4(op1, op2, vl); + return __riscv_vmsltu_vv_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmsltu_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m2_b4(op1, op2, vl); + return __riscv_vmsltu_vx_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmsltu_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsltu_vv_u8m4_b2(op1, op2, vl); + return __riscv_vmsltu_vv_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmsltu_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m4_b2(op1, op2, vl); + return __riscv_vmsltu_vx_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmsltu_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsltu_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsltu_vv_u8m8_b1(op1, op2, vl); + return __riscv_vmsltu_vv_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmsltu_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsltu_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m8_b1(op1, op2, vl); + return __riscv_vmsltu_vx_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmsltu_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsltu_vv_u16mf4_b64(op1, op2, vl); + return __riscv_vmsltu_vv_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmsltu_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16mf4_b64(op1, op2, vl); + return __riscv_vmsltu_vx_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmsltu_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsltu_vv_u16mf2_b32(op1, op2, vl); + return __riscv_vmsltu_vv_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmsltu_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16mf2_b32(op1, op2, vl); + return __riscv_vmsltu_vx_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmsltu_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsltu_vv_u16m1_b16(op1, op2, vl); + return __riscv_vmsltu_vv_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmsltu_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m1_b16(op1, op2, vl); + return __riscv_vmsltu_vx_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmsltu_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsltu_vv_u16m2_b8(op1, op2, vl); + return __riscv_vmsltu_vv_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmsltu_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m2_b8(op1, op2, vl); + return __riscv_vmsltu_vx_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmsltu_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsltu_vv_u16m4_b4(op1, op2, vl); + return __riscv_vmsltu_vv_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmsltu_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m4_b4(op1, op2, vl); + return __riscv_vmsltu_vx_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmsltu_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsltu_vv_u16m8_b2(op1, op2, vl); + return __riscv_vmsltu_vv_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmsltu_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m8_b2(op1, op2, vl); + return __riscv_vmsltu_vx_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmsltu_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsltu_vv_u32mf2_b64(op1, op2, vl); + return __riscv_vmsltu_vv_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmsltu_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32mf2_b64(op1, op2, vl); + return __riscv_vmsltu_vx_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmsltu_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsltu_vv_u32m1_b32(op1, op2, vl); + return __riscv_vmsltu_vv_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmsltu_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m1_b32(op1, op2, vl); + return __riscv_vmsltu_vx_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmsltu_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsltu_vv_u32m2_b16(op1, op2, vl); + return __riscv_vmsltu_vv_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmsltu_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m2_b16(op1, op2, vl); + return __riscv_vmsltu_vx_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmsltu_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsltu_vv_u32m4_b8(op1, op2, vl); + return __riscv_vmsltu_vv_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmsltu_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m4_b8(op1, op2, vl); + return __riscv_vmsltu_vx_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmsltu_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsltu_vv_u32m8_b4(op1, op2, vl); + return __riscv_vmsltu_vv_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmsltu_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m8_b4(op1, op2, vl); + return __riscv_vmsltu_vx_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmsltu_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsltu_vv_u64m1_b64(op1, op2, vl); + return __riscv_vmsltu_vv_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmsltu_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m1_b64(op1, op2, vl); + return __riscv_vmsltu_vx_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmsltu_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsltu_vv_u64m2_b32(op1, op2, vl); + return __riscv_vmsltu_vv_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmsltu_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m2_b32(op1, op2, vl); + return __riscv_vmsltu_vx_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmsltu_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsltu_vv_u64m4_b16(op1, op2, vl); + return __riscv_vmsltu_vv_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmsltu_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m4_b16(op1, op2, vl); + return __riscv_vmsltu_vx_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmsltu_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsltu_vv_u64m8_b8(op1, op2, vl); + return __riscv_vmsltu_vv_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmsltu_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m8_b8(op1, op2, vl); + return __riscv_vmsltu_vx_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8mf8_b64_m( @@ -409,7 +409,7 @@ vbool8_t test_vmsltu_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsltu_vv_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf8_b64_m( @@ -418,7 +418,7 @@ vbool64_t test_vmsltu_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8mf4_b32_m( @@ -427,7 +427,7 @@ vbool64_t test_vmsltu_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsltu_vv_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf4_b32_m( @@ -436,7 +436,7 @@ vbool32_t test_vmsltu_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8mf2_b16_m( @@ -445,7 +445,7 @@ vbool32_t test_vmsltu_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsltu_vv_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf2_b16_m( @@ -454,7 +454,7 @@ vbool16_t test_vmsltu_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m1_b8_m( @@ -463,7 +463,7 @@ vbool16_t test_vmsltu_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsltu_vv_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m1_b8_m( @@ -472,7 +472,7 @@ vbool8_t test_vmsltu_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m2_b4_m( @@ -481,7 +481,7 @@ vbool8_t test_vmsltu_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsltu_vv_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m2_b4_m( @@ -490,7 +490,7 @@ vbool4_t test_vmsltu_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m4_b2_m( @@ -499,7 +499,7 @@ vbool4_t test_vmsltu_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsltu_vv_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m4_b2_m( @@ -508,7 +508,7 @@ vbool2_t test_vmsltu_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m8_b1_m( @@ -517,7 +517,7 @@ vbool2_t test_vmsltu_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsltu_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsltu_vv_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m8_b1_m( @@ -526,7 +526,7 @@ vbool1_t test_vmsltu_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsltu_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16mf4_b64_m( @@ -535,7 +535,7 @@ vbool1_t test_vmsltu_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsltu_vv_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16mf4_b64_m( @@ -544,7 +544,7 @@ vbool64_t test_vmsltu_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16mf2_b32_m( @@ -553,7 +553,7 @@ vbool64_t test_vmsltu_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsltu_vv_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16mf2_b32_m( @@ -562,7 +562,7 @@ vbool32_t test_vmsltu_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m1_b16_m( @@ -571,7 +571,7 @@ vbool32_t test_vmsltu_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsltu_vv_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m1_b16_m( @@ -580,7 +580,7 @@ vbool16_t test_vmsltu_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m2_b8_m( @@ -589,7 +589,7 @@ vbool16_t test_vmsltu_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsltu_vv_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m2_b8_m( @@ -598,7 +598,7 @@ vbool8_t test_vmsltu_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m4_b4_m( @@ -607,7 +607,7 @@ vbool8_t test_vmsltu_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsltu_vv_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m4_b4_m( @@ -616,7 +616,7 @@ vbool4_t test_vmsltu_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m8_b2_m( @@ -625,7 +625,7 @@ vbool4_t test_vmsltu_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsltu_vv_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m8_b2_m( @@ -634,7 +634,7 @@ vbool2_t test_vmsltu_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32mf2_b64_m( @@ -643,7 +643,7 @@ vbool2_t test_vmsltu_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsltu_vv_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32mf2_b64_m( @@ -652,7 +652,7 @@ vbool64_t test_vmsltu_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m1_b32_m( @@ -661,7 +661,7 @@ vbool64_t test_vmsltu_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsltu_vv_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m1_b32_m( @@ -670,7 +670,7 @@ vbool32_t test_vmsltu_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m2_b16_m( @@ -679,7 +679,7 @@ vbool32_t test_vmsltu_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsltu_vv_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m2_b16_m( @@ -688,7 +688,7 @@ vbool16_t test_vmsltu_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m4_b8_m( @@ -697,7 +697,7 @@ vbool16_t test_vmsltu_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsltu_vv_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m4_b8_m( @@ -706,7 +706,7 @@ vbool8_t test_vmsltu_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m8_b4_m( @@ -715,7 +715,7 @@ vbool8_t test_vmsltu_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsltu_vv_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m8_b4_m( @@ -724,7 +724,7 @@ vbool4_t test_vmsltu_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m1_b64_m( @@ -733,7 +733,7 @@ vbool4_t test_vmsltu_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsltu_vv_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m1_b64_m( @@ -742,7 +742,7 @@ vbool64_t test_vmsltu_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m2_b32_m( @@ -751,7 +751,7 @@ vbool64_t test_vmsltu_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsltu_vv_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m2_b32_m( @@ -760,7 +760,7 @@ vbool32_t test_vmsltu_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m4_b16_m( @@ -769,7 +769,7 @@ vbool32_t test_vmsltu_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsltu_vv_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m4_b16_m( @@ -778,7 +778,7 @@ vbool16_t test_vmsltu_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m8_b8_m( @@ -787,7 +787,7 @@ vbool16_t test_vmsltu_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsltu_vv_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsltu_vv_u64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m8_b8_m( @@ -796,6 +796,6 @@ vbool8_t test_vmsltu_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsltu_vx_u64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsne.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsne.c index 7112d5c2384edc3de98bb5cbd13b211ca7be3ed2..25ddf5cfa481fc5f14fce11b8bdd21e7bb655dd7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsne.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsne.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsne_vv_i8mf8_b64(op1, op2, vl); + return __riscv_vmsne_vv_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf8_b64( @@ -22,7 +22,7 @@ vbool64_t test_vmsne_vv_i8mf8_b64(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf8_b64(op1, op2, vl); + return __riscv_vmsne_vx_i8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8mf4_b32( @@ -31,7 +31,7 @@ vbool64_t test_vmsne_vx_i8mf8_b64(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsne_vv_i8mf4_b32(op1, op2, vl); + return __riscv_vmsne_vv_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf4_b32( @@ -40,7 +40,7 @@ vbool32_t test_vmsne_vv_i8mf4_b32(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf4_b32(op1, op2, vl); + return __riscv_vmsne_vx_i8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8mf2_b16( @@ -49,7 +49,7 @@ vbool32_t test_vmsne_vx_i8mf4_b32(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsne_vv_i8mf2_b16(op1, op2, vl); + return __riscv_vmsne_vv_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf2_b16( @@ -58,7 +58,7 @@ vbool16_t test_vmsne_vv_i8mf2_b16(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf2_b16(op1, op2, vl); + return __riscv_vmsne_vx_i8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m1_b8( @@ -67,7 +67,7 @@ vbool16_t test_vmsne_vx_i8mf2_b16(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsne_vv_i8m1_b8(op1, op2, vl); + return __riscv_vmsne_vv_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m1_b8( @@ -76,7 +76,7 @@ vbool8_t test_vmsne_vv_i8m1_b8(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m1_b8(op1, op2, vl); + return __riscv_vmsne_vx_i8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m2_b4( @@ -85,7 +85,7 @@ vbool8_t test_vmsne_vx_i8m1_b8(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsne_vv_i8m2_b4(op1, op2, vl); + return __riscv_vmsne_vv_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m2_b4( @@ -94,7 +94,7 @@ vbool4_t test_vmsne_vv_i8m2_b4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m2_b4(op1, op2, vl); + return __riscv_vmsne_vx_i8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m4_b2( @@ -103,7 +103,7 @@ vbool4_t test_vmsne_vx_i8m2_b4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsne_vv_i8m4_b2(op1, op2, vl); + return __riscv_vmsne_vv_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m4_b2( @@ -112,7 +112,7 @@ vbool2_t test_vmsne_vv_i8m4_b2(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m4_b2(op1, op2, vl); + return __riscv_vmsne_vx_i8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m8_b1( @@ -121,7 +121,7 @@ vbool2_t test_vmsne_vx_i8m4_b2(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsne_vv_i8m8_b1(op1, op2, vl); + return __riscv_vmsne_vv_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m8_b1( @@ -130,7 +130,7 @@ vbool1_t test_vmsne_vv_i8m8_b1(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m8_b1(op1, op2, vl); + return __riscv_vmsne_vx_i8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16mf4_b64( @@ -139,7 +139,7 @@ vbool1_t test_vmsne_vx_i8m8_b1(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsne_vv_i16mf4_b64(op1, op2, vl); + return __riscv_vmsne_vv_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16mf4_b64( @@ -148,7 +148,7 @@ vbool64_t test_vmsne_vv_i16mf4_b64(vint16mf4_t op1, vint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16mf4_b64(op1, op2, vl); + return __riscv_vmsne_vx_i16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16mf2_b32( @@ -157,7 +157,7 @@ vbool64_t test_vmsne_vx_i16mf4_b64(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsne_vv_i16mf2_b32(op1, op2, vl); + return __riscv_vmsne_vv_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16mf2_b32( @@ -166,7 +166,7 @@ vbool32_t test_vmsne_vv_i16mf2_b32(vint16mf2_t op1, vint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16mf2_b32(op1, op2, vl); + return __riscv_vmsne_vx_i16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m1_b16( @@ -175,7 +175,7 @@ vbool32_t test_vmsne_vx_i16mf2_b32(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsne_vv_i16m1_b16(op1, op2, vl); + return __riscv_vmsne_vv_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m1_b16( @@ -184,7 +184,7 @@ vbool16_t test_vmsne_vv_i16m1_b16(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m1_b16(op1, op2, vl); + return __riscv_vmsne_vx_i16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m2_b8( @@ -193,7 +193,7 @@ vbool16_t test_vmsne_vx_i16m1_b16(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsne_vv_i16m2_b8(op1, op2, vl); + return __riscv_vmsne_vv_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m2_b8( @@ -202,7 +202,7 @@ vbool8_t test_vmsne_vv_i16m2_b8(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m2_b8(op1, op2, vl); + return __riscv_vmsne_vx_i16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m4_b4( @@ -211,7 +211,7 @@ vbool8_t test_vmsne_vx_i16m2_b8(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsne_vv_i16m4_b4(op1, op2, vl); + return __riscv_vmsne_vv_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m4_b4( @@ -220,7 +220,7 @@ vbool4_t test_vmsne_vv_i16m4_b4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m4_b4(op1, op2, vl); + return __riscv_vmsne_vx_i16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m8_b2( @@ -229,7 +229,7 @@ vbool4_t test_vmsne_vx_i16m4_b4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsne_vv_i16m8_b2(op1, op2, vl); + return __riscv_vmsne_vv_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m8_b2( @@ -238,7 +238,7 @@ vbool2_t test_vmsne_vv_i16m8_b2(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m8_b2(op1, op2, vl); + return __riscv_vmsne_vx_i16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32mf2_b64( @@ -247,7 +247,7 @@ vbool2_t test_vmsne_vx_i16m8_b2(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsne_vv_i32mf2_b64(op1, op2, vl); + return __riscv_vmsne_vv_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32mf2_b64( @@ -256,7 +256,7 @@ vbool64_t test_vmsne_vv_i32mf2_b64(vint32mf2_t op1, vint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32mf2_b64(op1, op2, vl); + return __riscv_vmsne_vx_i32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m1_b32( @@ -265,7 +265,7 @@ vbool64_t test_vmsne_vx_i32mf2_b64(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsne_vv_i32m1_b32(op1, op2, vl); + return __riscv_vmsne_vv_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m1_b32( @@ -274,7 +274,7 @@ vbool32_t test_vmsne_vv_i32m1_b32(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m1_b32(op1, op2, vl); + return __riscv_vmsne_vx_i32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m2_b16( @@ -283,7 +283,7 @@ vbool32_t test_vmsne_vx_i32m1_b32(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsne_vv_i32m2_b16(op1, op2, vl); + return __riscv_vmsne_vv_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m2_b16( @@ -292,7 +292,7 @@ vbool16_t test_vmsne_vv_i32m2_b16(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m2_b16(op1, op2, vl); + return __riscv_vmsne_vx_i32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m4_b8( @@ -301,7 +301,7 @@ vbool16_t test_vmsne_vx_i32m2_b16(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsne_vv_i32m4_b8(op1, op2, vl); + return __riscv_vmsne_vv_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m4_b8( @@ -310,7 +310,7 @@ vbool8_t test_vmsne_vv_i32m4_b8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m4_b8(op1, op2, vl); + return __riscv_vmsne_vx_i32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m8_b4( @@ -319,7 +319,7 @@ vbool8_t test_vmsne_vx_i32m4_b8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsne_vv_i32m8_b4(op1, op2, vl); + return __riscv_vmsne_vv_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m8_b4( @@ -328,7 +328,7 @@ vbool4_t test_vmsne_vv_i32m8_b4(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m8_b4(op1, op2, vl); + return __riscv_vmsne_vx_i32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m1_b64( @@ -337,7 +337,7 @@ vbool4_t test_vmsne_vx_i32m8_b4(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsne_vv_i64m1_b64(op1, op2, vl); + return __riscv_vmsne_vv_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m1_b64( @@ -346,7 +346,7 @@ vbool64_t test_vmsne_vv_i64m1_b64(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m1_b64(op1, op2, vl); + return __riscv_vmsne_vx_i64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m2_b32( @@ -355,7 +355,7 @@ vbool64_t test_vmsne_vx_i64m1_b64(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsne_vv_i64m2_b32(op1, op2, vl); + return __riscv_vmsne_vv_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m2_b32( @@ -364,7 +364,7 @@ vbool32_t test_vmsne_vv_i64m2_b32(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m2_b32(op1, op2, vl); + return __riscv_vmsne_vx_i64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m4_b16( @@ -373,7 +373,7 @@ vbool32_t test_vmsne_vx_i64m2_b32(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsne_vv_i64m4_b16(op1, op2, vl); + return __riscv_vmsne_vv_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m4_b16( @@ -382,7 +382,7 @@ vbool16_t test_vmsne_vv_i64m4_b16(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m4_b16(op1, op2, vl); + return __riscv_vmsne_vx_i64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m8_b8( @@ -391,7 +391,7 @@ vbool16_t test_vmsne_vx_i64m4_b16(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsne_vv_i64m8_b8(op1, op2, vl); + return __riscv_vmsne_vv_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m8_b8( @@ -400,7 +400,7 @@ vbool8_t test_vmsne_vv_i64m8_b8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m8_b8(op1, op2, vl); + return __riscv_vmsne_vx_i64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf8_b64( @@ -409,7 +409,7 @@ vbool8_t test_vmsne_vx_i64m8_b8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsne_vv_u8mf8_b64(op1, op2, vl); + return __riscv_vmsne_vv_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf8_b64( @@ -418,7 +418,7 @@ vbool64_t test_vmsne_vv_u8mf8_b64(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf8_b64(op1, op2, vl); + return __riscv_vmsne_vx_u8mf8_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf4_b32( @@ -427,7 +427,7 @@ vbool64_t test_vmsne_vx_u8mf8_b64(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsne_vv_u8mf4_b32(op1, op2, vl); + return __riscv_vmsne_vv_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf4_b32( @@ -436,7 +436,7 @@ vbool32_t test_vmsne_vv_u8mf4_b32(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf4_b32(op1, op2, vl); + return __riscv_vmsne_vx_u8mf4_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf2_b16( @@ -445,7 +445,7 @@ vbool32_t test_vmsne_vx_u8mf4_b32(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsne_vv_u8mf2_b16(op1, op2, vl); + return __riscv_vmsne_vv_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf2_b16( @@ -454,7 +454,7 @@ vbool16_t test_vmsne_vv_u8mf2_b16(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf2_b16(op1, op2, vl); + return __riscv_vmsne_vx_u8mf2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m1_b8( @@ -463,7 +463,7 @@ vbool16_t test_vmsne_vx_u8mf2_b16(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsne_vv_u8m1_b8(op1, op2, vl); + return __riscv_vmsne_vv_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m1_b8( @@ -472,7 +472,7 @@ vbool8_t test_vmsne_vv_u8m1_b8(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m1_b8(op1, op2, vl); + return __riscv_vmsne_vx_u8m1_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m2_b4( @@ -481,7 +481,7 @@ vbool8_t test_vmsne_vx_u8m1_b8(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsne_vv_u8m2_b4(op1, op2, vl); + return __riscv_vmsne_vv_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m2_b4( @@ -490,7 +490,7 @@ vbool4_t test_vmsne_vv_u8m2_b4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m2_b4(op1, op2, vl); + return __riscv_vmsne_vx_u8m2_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m4_b2( @@ -499,7 +499,7 @@ vbool4_t test_vmsne_vx_u8m2_b4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsne_vv_u8m4_b2(op1, op2, vl); + return __riscv_vmsne_vv_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m4_b2( @@ -508,7 +508,7 @@ vbool2_t test_vmsne_vv_u8m4_b2(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m4_b2(op1, op2, vl); + return __riscv_vmsne_vx_u8m4_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m8_b1( @@ -517,7 +517,7 @@ vbool2_t test_vmsne_vx_u8m4_b2(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsne_vv_u8m8_b1(op1, op2, vl); + return __riscv_vmsne_vv_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m8_b1( @@ -526,7 +526,7 @@ vbool1_t test_vmsne_vv_u8m8_b1(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m8_b1(op1, op2, vl); + return __riscv_vmsne_vx_u8m8_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16mf4_b64( @@ -535,7 +535,7 @@ vbool1_t test_vmsne_vx_u8m8_b1(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsne_vv_u16mf4_b64(op1, op2, vl); + return __riscv_vmsne_vv_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16mf4_b64( @@ -544,7 +544,7 @@ vbool64_t test_vmsne_vv_u16mf4_b64(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16mf4_b64(op1, op2, vl); + return __riscv_vmsne_vx_u16mf4_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16mf2_b32( @@ -553,7 +553,7 @@ vbool64_t test_vmsne_vx_u16mf4_b64(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsne_vv_u16mf2_b32(op1, op2, vl); + return __riscv_vmsne_vv_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16mf2_b32( @@ -562,7 +562,7 @@ vbool32_t test_vmsne_vv_u16mf2_b32(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16mf2_b32(op1, op2, vl); + return __riscv_vmsne_vx_u16mf2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m1_b16( @@ -571,7 +571,7 @@ vbool32_t test_vmsne_vx_u16mf2_b32(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsne_vv_u16m1_b16(op1, op2, vl); + return __riscv_vmsne_vv_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m1_b16( @@ -580,7 +580,7 @@ vbool16_t test_vmsne_vv_u16m1_b16(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m1_b16(op1, op2, vl); + return __riscv_vmsne_vx_u16m1_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m2_b8( @@ -589,7 +589,7 @@ vbool16_t test_vmsne_vx_u16m1_b16(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsne_vv_u16m2_b8(op1, op2, vl); + return __riscv_vmsne_vv_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m2_b8( @@ -598,7 +598,7 @@ vbool8_t test_vmsne_vv_u16m2_b8(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m2_b8(op1, op2, vl); + return __riscv_vmsne_vx_u16m2_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m4_b4( @@ -607,7 +607,7 @@ vbool8_t test_vmsne_vx_u16m2_b8(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsne_vv_u16m4_b4(op1, op2, vl); + return __riscv_vmsne_vv_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m4_b4( @@ -616,7 +616,7 @@ vbool4_t test_vmsne_vv_u16m4_b4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m4_b4(op1, op2, vl); + return __riscv_vmsne_vx_u16m4_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m8_b2( @@ -625,7 +625,7 @@ vbool4_t test_vmsne_vx_u16m4_b4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsne_vv_u16m8_b2(op1, op2, vl); + return __riscv_vmsne_vv_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m8_b2( @@ -634,7 +634,7 @@ vbool2_t test_vmsne_vv_u16m8_b2(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m8_b2(op1, op2, vl); + return __riscv_vmsne_vx_u16m8_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32mf2_b64( @@ -643,7 +643,7 @@ vbool2_t test_vmsne_vx_u16m8_b2(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsne_vv_u32mf2_b64(op1, op2, vl); + return __riscv_vmsne_vv_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32mf2_b64( @@ -652,7 +652,7 @@ vbool64_t test_vmsne_vv_u32mf2_b64(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32mf2_b64(op1, op2, vl); + return __riscv_vmsne_vx_u32mf2_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m1_b32( @@ -661,7 +661,7 @@ vbool64_t test_vmsne_vx_u32mf2_b64(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsne_vv_u32m1_b32(op1, op2, vl); + return __riscv_vmsne_vv_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m1_b32( @@ -670,7 +670,7 @@ vbool32_t test_vmsne_vv_u32m1_b32(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m1_b32(op1, op2, vl); + return __riscv_vmsne_vx_u32m1_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m2_b16( @@ -679,7 +679,7 @@ vbool32_t test_vmsne_vx_u32m1_b32(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsne_vv_u32m2_b16(op1, op2, vl); + return __riscv_vmsne_vv_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m2_b16( @@ -688,7 +688,7 @@ vbool16_t test_vmsne_vv_u32m2_b16(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m2_b16(op1, op2, vl); + return __riscv_vmsne_vx_u32m2_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m4_b8( @@ -697,7 +697,7 @@ vbool16_t test_vmsne_vx_u32m2_b16(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsne_vv_u32m4_b8(op1, op2, vl); + return __riscv_vmsne_vv_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m4_b8( @@ -706,7 +706,7 @@ vbool8_t test_vmsne_vv_u32m4_b8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m4_b8(op1, op2, vl); + return __riscv_vmsne_vx_u32m4_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m8_b4( @@ -715,7 +715,7 @@ vbool8_t test_vmsne_vx_u32m4_b8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsne_vv_u32m8_b4(op1, op2, vl); + return __riscv_vmsne_vv_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m8_b4( @@ -724,7 +724,7 @@ vbool4_t test_vmsne_vv_u32m8_b4(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m8_b4(op1, op2, vl); + return __riscv_vmsne_vx_u32m8_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m1_b64( @@ -733,7 +733,7 @@ vbool4_t test_vmsne_vx_u32m8_b4(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsne_vv_u64m1_b64(op1, op2, vl); + return __riscv_vmsne_vv_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m1_b64( @@ -742,7 +742,7 @@ vbool64_t test_vmsne_vv_u64m1_b64(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m1_b64(op1, op2, vl); + return __riscv_vmsne_vx_u64m1_b64(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m2_b32( @@ -751,7 +751,7 @@ vbool64_t test_vmsne_vx_u64m1_b64(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsne_vv_u64m2_b32(op1, op2, vl); + return __riscv_vmsne_vv_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m2_b32( @@ -760,7 +760,7 @@ vbool32_t test_vmsne_vv_u64m2_b32(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m2_b32(op1, op2, vl); + return __riscv_vmsne_vx_u64m2_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m4_b16( @@ -769,7 +769,7 @@ vbool32_t test_vmsne_vx_u64m2_b32(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsne_vv_u64m4_b16(op1, op2, vl); + return __riscv_vmsne_vv_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m4_b16( @@ -778,7 +778,7 @@ vbool16_t test_vmsne_vv_u64m4_b16(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m4_b16(op1, op2, vl); + return __riscv_vmsne_vx_u64m4_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m8_b8( @@ -787,7 +787,7 @@ vbool16_t test_vmsne_vx_u64m4_b16(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsne_vv_u64m8_b8(op1, op2, vl); + return __riscv_vmsne_vv_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m8_b8( @@ -796,7 +796,7 @@ vbool8_t test_vmsne_vv_u64m8_b8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m8_b8(op1, op2, vl); + return __riscv_vmsne_vx_u64m8_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8mf8_b64_m( @@ -805,7 +805,7 @@ vbool8_t test_vmsne_vx_u64m8_b8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsne_vv_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf8_b64_m( @@ -814,7 +814,7 @@ vbool64_t test_vmsne_vv_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8mf4_b32_m( @@ -823,7 +823,7 @@ vbool64_t test_vmsne_vx_i8mf8_b64_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsne_vv_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf4_b32_m( @@ -832,7 +832,7 @@ vbool32_t test_vmsne_vv_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8mf2_b16_m( @@ -841,7 +841,7 @@ vbool32_t test_vmsne_vx_i8mf4_b32_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsne_vv_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf2_b16_m( @@ -850,7 +850,7 @@ vbool16_t test_vmsne_vv_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m1_b8_m( @@ -859,7 +859,7 @@ vbool16_t test_vmsne_vx_i8mf2_b16_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsne_vv_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m1_b8_m( @@ -868,7 +868,7 @@ vbool8_t test_vmsne_vv_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m2_b4_m( @@ -877,7 +877,7 @@ vbool8_t test_vmsne_vx_i8m1_b8_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsne_vv_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m2_b4_m( @@ -886,7 +886,7 @@ vbool4_t test_vmsne_vv_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m4_b2_m( @@ -895,7 +895,7 @@ vbool4_t test_vmsne_vx_i8m2_b4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsne_vv_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m4_b2_m( @@ -904,7 +904,7 @@ vbool2_t test_vmsne_vv_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m8_b1_m( @@ -913,7 +913,7 @@ vbool2_t test_vmsne_vx_i8m4_b2_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsne_vv_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m8_b1_m( @@ -922,7 +922,7 @@ vbool1_t test_vmsne_vv_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16mf4_b64_m( @@ -931,7 +931,7 @@ vbool1_t test_vmsne_vx_i8m8_b1_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsne_vv_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16mf4_b64_m( @@ -940,7 +940,7 @@ vbool64_t test_vmsne_vv_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16mf2_b32_m( @@ -949,7 +949,7 @@ vbool64_t test_vmsne_vx_i16mf4_b64_m(vbool64_t mask, vint16mf4_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsne_vv_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16mf2_b32_m( @@ -958,7 +958,7 @@ vbool32_t test_vmsne_vv_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m1_b16_m( @@ -967,7 +967,7 @@ vbool32_t test_vmsne_vx_i16mf2_b32_m(vbool32_t mask, vint16mf2_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsne_vv_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m1_b16_m( @@ -976,7 +976,7 @@ vbool16_t test_vmsne_vv_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, vint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m2_b8_m( @@ -985,7 +985,7 @@ vbool16_t test_vmsne_vx_i16m1_b16_m(vbool16_t mask, vint16m1_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsne_vv_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m2_b8_m( @@ -994,7 +994,7 @@ vbool8_t test_vmsne_vv_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m4_b4_m( @@ -1003,7 +1003,7 @@ vbool8_t test_vmsne_vx_i16m2_b8_m(vbool8_t mask, vint16m2_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsne_vv_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m4_b4_m( @@ -1012,7 +1012,7 @@ vbool4_t test_vmsne_vv_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m8_b2_m( @@ -1021,7 +1021,7 @@ vbool4_t test_vmsne_vx_i16m4_b4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsne_vv_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m8_b2_m( @@ -1030,7 +1030,7 @@ vbool2_t test_vmsne_vv_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32mf2_b64_m( @@ -1039,7 +1039,7 @@ vbool2_t test_vmsne_vx_i16m8_b2_m(vbool2_t mask, vint16m8_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsne_vv_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32mf2_b64_m( @@ -1048,7 +1048,7 @@ vbool64_t test_vmsne_vv_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m1_b32_m( @@ -1057,7 +1057,7 @@ vbool64_t test_vmsne_vx_i32mf2_b64_m(vbool64_t mask, vint32mf2_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsne_vv_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m1_b32_m( @@ -1066,7 +1066,7 @@ vbool32_t test_vmsne_vv_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, vint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m2_b16_m( @@ -1075,7 +1075,7 @@ vbool32_t test_vmsne_vx_i32m1_b32_m(vbool32_t mask, vint32m1_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsne_vv_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m2_b16_m( @@ -1084,7 +1084,7 @@ vbool16_t test_vmsne_vv_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, vint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m4_b8_m( @@ -1093,7 +1093,7 @@ vbool16_t test_vmsne_vx_i32m2_b16_m(vbool16_t mask, vint32m2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsne_vv_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m4_b8_m( @@ -1102,7 +1102,7 @@ vbool8_t test_vmsne_vv_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m8_b4_m( @@ -1111,7 +1111,7 @@ vbool8_t test_vmsne_vx_i32m4_b8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsne_vv_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m8_b4_m( @@ -1120,7 +1120,7 @@ vbool4_t test_vmsne_vv_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m1_b64_m( @@ -1129,7 +1129,7 @@ vbool4_t test_vmsne_vx_i32m8_b4_m(vbool4_t mask, vint32m8_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsne_vv_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m1_b64_m( @@ -1138,7 +1138,7 @@ vbool64_t test_vmsne_vv_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, vint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m2_b32_m( @@ -1147,7 +1147,7 @@ vbool64_t test_vmsne_vx_i64m1_b64_m(vbool64_t mask, vint64m1_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsne_vv_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m2_b32_m( @@ -1156,7 +1156,7 @@ vbool32_t test_vmsne_vv_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, vint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m4_b16_m( @@ -1165,7 +1165,7 @@ vbool32_t test_vmsne_vx_i64m2_b32_m(vbool32_t mask, vint64m2_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsne_vv_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m4_b16_m( @@ -1174,7 +1174,7 @@ vbool16_t test_vmsne_vv_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, vint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m8_b8_m( @@ -1183,7 +1183,7 @@ vbool16_t test_vmsne_vx_i64m4_b16_m(vbool16_t mask, vint64m4_t op1, int64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsne_vv_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_i64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m8_b8_m( @@ -1192,7 +1192,7 @@ vbool8_t test_vmsne_vv_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_i64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf8_b64_m( @@ -1201,7 +1201,7 @@ vbool8_t test_vmsne_vx_i64m8_b8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsne_vv_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf8_b64_m( @@ -1210,7 +1210,7 @@ vbool64_t test_vmsne_vv_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf8_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u8mf8_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf4_b32_m( @@ -1219,7 +1219,7 @@ vbool64_t test_vmsne_vx_u8mf8_b64_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsne_vv_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf4_b32_m( @@ -1228,7 +1228,7 @@ vbool32_t test_vmsne_vv_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf4_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u8mf4_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf2_b16_m( @@ -1237,7 +1237,7 @@ vbool32_t test_vmsne_vx_u8mf4_b32_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsne_vv_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf2_b16_m( @@ -1246,7 +1246,7 @@ vbool16_t test_vmsne_vv_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf2_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u8mf2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m1_b8_m( @@ -1255,7 +1255,7 @@ vbool16_t test_vmsne_vx_u8mf2_b16_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsne_vv_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m1_b8_m( @@ -1264,7 +1264,7 @@ vbool8_t test_vmsne_vv_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m1_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u8m1_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m2_b4_m( @@ -1273,7 +1273,7 @@ vbool8_t test_vmsne_vx_u8m1_b8_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsne_vv_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m2_b4_m( @@ -1282,7 +1282,7 @@ vbool4_t test_vmsne_vv_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m2_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u8m2_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m4_b2_m( @@ -1291,7 +1291,7 @@ vbool4_t test_vmsne_vx_u8m2_b4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsne_vv_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m4_b2_m( @@ -1300,7 +1300,7 @@ vbool2_t test_vmsne_vv_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m4_b2_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u8m4_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m8_b1_m( @@ -1309,7 +1309,7 @@ vbool2_t test_vmsne_vx_u8m4_b2_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsne_vv_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m8_b1_m( @@ -1318,7 +1318,7 @@ vbool1_t test_vmsne_vv_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m8_b1_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u8m8_b1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16mf4_b64_m( @@ -1327,7 +1327,7 @@ vbool1_t test_vmsne_vx_u8m8_b1_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsne_vv_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16mf4_b64_m( @@ -1336,7 +1336,7 @@ vbool64_t test_vmsne_vv_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16mf4_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u16mf4_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16mf2_b32_m( @@ -1345,7 +1345,7 @@ vbool64_t test_vmsne_vx_u16mf4_b64_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsne_vv_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16mf2_b32_m( @@ -1354,7 +1354,7 @@ vbool32_t test_vmsne_vv_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16mf2_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u16mf2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m1_b16_m( @@ -1363,7 +1363,7 @@ vbool32_t test_vmsne_vx_u16mf2_b32_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsne_vv_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m1_b16_m( @@ -1372,7 +1372,7 @@ vbool16_t test_vmsne_vv_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m1_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u16m1_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m2_b8_m( @@ -1381,7 +1381,7 @@ vbool16_t test_vmsne_vx_u16m1_b16_m(vbool16_t mask, vuint16m1_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsne_vv_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m2_b8_m( @@ -1390,7 +1390,7 @@ vbool8_t test_vmsne_vv_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m2_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u16m2_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m4_b4_m( @@ -1399,7 +1399,7 @@ vbool8_t test_vmsne_vx_u16m2_b8_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsne_vv_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m4_b4_m( @@ -1408,7 +1408,7 @@ vbool4_t test_vmsne_vv_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m4_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u16m4_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m8_b2_m( @@ -1417,7 +1417,7 @@ vbool4_t test_vmsne_vx_u16m4_b4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsne_vv_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m8_b2_m( @@ -1426,7 +1426,7 @@ vbool2_t test_vmsne_vv_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m8_b2_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u16m8_b2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32mf2_b64_m( @@ -1435,7 +1435,7 @@ vbool2_t test_vmsne_vx_u16m8_b2_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsne_vv_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32mf2_b64_m( @@ -1444,7 +1444,7 @@ vbool64_t test_vmsne_vv_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32mf2_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u32mf2_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m1_b32_m( @@ -1453,7 +1453,7 @@ vbool64_t test_vmsne_vx_u32mf2_b64_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsne_vv_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m1_b32_m( @@ -1462,7 +1462,7 @@ vbool32_t test_vmsne_vv_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m1_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u32m1_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m2_b16_m( @@ -1471,7 +1471,7 @@ vbool32_t test_vmsne_vx_u32m1_b32_m(vbool32_t mask, vuint32m1_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsne_vv_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m2_b16_m( @@ -1480,7 +1480,7 @@ vbool16_t test_vmsne_vv_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m2_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u32m2_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m4_b8_m( @@ -1489,7 +1489,7 @@ vbool16_t test_vmsne_vx_u32m2_b16_m(vbool16_t mask, vuint32m2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsne_vv_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m4_b8_m( @@ -1498,7 +1498,7 @@ vbool8_t test_vmsne_vv_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m4_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u32m4_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m8_b4_m( @@ -1507,7 +1507,7 @@ vbool8_t test_vmsne_vx_u32m4_b8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsne_vv_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m8_b4_m( @@ -1516,7 +1516,7 @@ vbool4_t test_vmsne_vv_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m8_b4_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u32m8_b4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m1_b64_m( @@ -1525,7 +1525,7 @@ vbool4_t test_vmsne_vx_u32m8_b4_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsne_vv_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m1_b64_m( @@ -1534,7 +1534,7 @@ vbool64_t test_vmsne_vv_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m1_b64_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u64m1_b64_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m2_b32_m( @@ -1543,7 +1543,7 @@ vbool64_t test_vmsne_vx_u64m1_b64_m(vbool64_t mask, vuint64m1_t op1, uint64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsne_vv_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m2_b32_m( @@ -1552,7 +1552,7 @@ vbool32_t test_vmsne_vv_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m2_b32_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u64m2_b32_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m4_b16_m( @@ -1561,7 +1561,7 @@ vbool32_t test_vmsne_vx_u64m2_b32_m(vbool32_t mask, vuint64m2_t op1, uint64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsne_vv_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m4_b16_m( @@ -1570,7 +1570,7 @@ vbool16_t test_vmsne_vv_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m4_b16_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u64m4_b16_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m8_b8_m( @@ -1579,7 +1579,7 @@ vbool16_t test_vmsne_vx_u64m4_b16_m(vbool16_t mask, vuint64m4_t op1, uint64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsne_vv_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vv_u64m8_b8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m8_b8_m( @@ -1588,6 +1588,6 @@ vbool8_t test_vmsne_vv_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u64m8_b8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m8_b8_m(mask, op1, op2, vl); + return __riscv_vmsne_vx_u64m8_b8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsof.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsof.c index 2e7aca0e1e9593d9e923070d1a7e2cc751652359..bd522c9ac61a1180d494f10c75bb7553bb676f06 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsof.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmsof.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsof_m_b1(vbool1_t op1, size_t vl) { - return vmsof_m_b1(op1, vl); + return __riscv_vmsof_m_b1(op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmsof_m_b1(vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsof_m_b2(vbool2_t op1, size_t vl) { - return vmsof_m_b2(op1, vl); + return __riscv_vmsof_m_b2(op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmsof_m_b2(vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsof_m_b4(vbool4_t op1, size_t vl) { - return vmsof_m_b4(op1, vl); + return __riscv_vmsof_m_b4(op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmsof_m_b4(vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsof_m_b8(vbool8_t op1, size_t vl) { - return vmsof_m_b8(op1, vl); + return __riscv_vmsof_m_b8(op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmsof_m_b8(vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsof_m_b16(vbool16_t op1, size_t vl) { - return vmsof_m_b16(op1, vl); + return __riscv_vmsof_m_b16(op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmsof_m_b16(vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsof_m_b32(vbool32_t op1, size_t vl) { - return vmsof_m_b32(op1, vl); + return __riscv_vmsof_m_b32(op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b64( @@ -66,7 +66,7 @@ vbool32_t test_vmsof_m_b32(vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsof_m_b64(vbool64_t op1, size_t vl) { - return vmsof_m_b64(op1, vl); + return __riscv_vmsof_m_b64(op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b1_m( @@ -75,7 +75,7 @@ vbool64_t test_vmsof_m_b64(vbool64_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsof_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { - return vmsof_m_b1_m(mask, op1, vl); + return __riscv_vmsof_m_b1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b2_m( @@ -84,7 +84,7 @@ vbool1_t test_vmsof_m_b1_m(vbool1_t mask, vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsof_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { - return vmsof_m_b2_m(mask, op1, vl); + return __riscv_vmsof_m_b2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b4_m( @@ -93,7 +93,7 @@ vbool2_t test_vmsof_m_b2_m(vbool2_t mask, vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsof_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { - return vmsof_m_b4_m(mask, op1, vl); + return __riscv_vmsof_m_b4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b8_m( @@ -102,7 +102,7 @@ vbool4_t test_vmsof_m_b4_m(vbool4_t mask, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsof_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { - return vmsof_m_b8_m(mask, op1, vl); + return __riscv_vmsof_m_b8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b16_m( @@ -111,7 +111,7 @@ vbool8_t test_vmsof_m_b8_m(vbool8_t mask, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsof_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { - return vmsof_m_b16_m(mask, op1, vl); + return __riscv_vmsof_m_b16_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b32_m( @@ -120,7 +120,7 @@ vbool16_t test_vmsof_m_b16_m(vbool16_t mask, vbool16_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsof_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { - return vmsof_m_b32_m(mask, op1, vl); + return __riscv_vmsof_m_b32_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b64_m( @@ -129,6 +129,6 @@ vbool32_t test_vmsof_m_b32_m(vbool32_t mask, vbool32_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsof_m_b64_m(vbool64_t mask, vbool64_t op1, size_t vl) { - return vmsof_m_b64_m(mask, op1, vl); + return __riscv_vmsof_m_b64_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmul.c index 1866cecfe93f5f3c39d3235571d232bfcd47332e..4a569b512717d74a421c9260dc6988a54fb05bb0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmul.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmul_vv_i8mf8(op1, op2, vl); + return __riscv_vmul_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vmul_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf8(op1, op2, vl); + return __riscv_vmul_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vmul_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmul_vv_i8mf4(op1, op2, vl); + return __riscv_vmul_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vmul_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf4(op1, op2, vl); + return __riscv_vmul_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vmul_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmul_vv_i8mf2(op1, op2, vl); + return __riscv_vmul_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vmul_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf2(op1, op2, vl); + return __riscv_vmul_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vmul_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmul_vv_i8m1(op1, op2, vl); + return __riscv_vmul_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vmul_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m1(op1, op2, vl); + return __riscv_vmul_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vmul_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmul_vv_i8m2(op1, op2, vl); + return __riscv_vmul_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vmul_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m2(op1, op2, vl); + return __riscv_vmul_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vmul_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmul_vv_i8m4(op1, op2, vl); + return __riscv_vmul_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vmul_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m4(op1, op2, vl); + return __riscv_vmul_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vmul_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmul_vv_i8m8(op1, op2, vl); + return __riscv_vmul_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vmul_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m8(op1, op2, vl); + return __riscv_vmul_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vmul_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmul_vv_i16mf4(op1, op2, vl); + return __riscv_vmul_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vmul_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf4(op1, op2, vl); + return __riscv_vmul_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vmul_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmul_vv_i16mf2(op1, op2, vl); + return __riscv_vmul_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vmul_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf2(op1, op2, vl); + return __riscv_vmul_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vmul_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmul_vv_i16m1(op1, op2, vl); + return __riscv_vmul_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vmul_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m1(op1, op2, vl); + return __riscv_vmul_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vmul_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmul_vv_i16m2(op1, op2, vl); + return __riscv_vmul_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vmul_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m2(op1, op2, vl); + return __riscv_vmul_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vmul_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmul_vv_i16m4(op1, op2, vl); + return __riscv_vmul_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vmul_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m4(op1, op2, vl); + return __riscv_vmul_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vmul_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmul_vv_i16m8(op1, op2, vl); + return __riscv_vmul_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vmul_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m8(op1, op2, vl); + return __riscv_vmul_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vmul_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmul_vv_i32mf2(op1, op2, vl); + return __riscv_vmul_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vmul_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32mf2(op1, op2, vl); + return __riscv_vmul_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vmul_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmul_vv_i32m1(op1, op2, vl); + return __riscv_vmul_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vmul_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m1(op1, op2, vl); + return __riscv_vmul_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vmul_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmul_vv_i32m2(op1, op2, vl); + return __riscv_vmul_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vmul_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m2(op1, op2, vl); + return __riscv_vmul_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vmul_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmul_vv_i32m4(op1, op2, vl); + return __riscv_vmul_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vmul_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m4(op1, op2, vl); + return __riscv_vmul_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vmul_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmul_vv_i32m8(op1, op2, vl); + return __riscv_vmul_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vmul_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m8(op1, op2, vl); + return __riscv_vmul_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vmul_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmul_vv_i64m1(op1, op2, vl); + return __riscv_vmul_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vmul_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m1(op1, op2, vl); + return __riscv_vmul_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vmul_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmul_vv_i64m2(op1, op2, vl); + return __riscv_vmul_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vmul_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m2(op1, op2, vl); + return __riscv_vmul_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vmul_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmul_vv_i64m4(op1, op2, vl); + return __riscv_vmul_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vmul_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m4(op1, op2, vl); + return __riscv_vmul_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vmul_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmul_vv_i64m8(op1, op2, vl); + return __riscv_vmul_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vmul_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m8(op1, op2, vl); + return __riscv_vmul_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vmul_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmul_vv_u8mf8(op1, op2, vl); + return __riscv_vmul_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vmul_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf8(op1, op2, vl); + return __riscv_vmul_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vmul_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmul_vv_u8mf4(op1, op2, vl); + return __riscv_vmul_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vmul_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf4(op1, op2, vl); + return __riscv_vmul_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vmul_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmul_vv_u8mf2(op1, op2, vl); + return __riscv_vmul_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vmul_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf2(op1, op2, vl); + return __riscv_vmul_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vmul_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmul_vv_u8m1(op1, op2, vl); + return __riscv_vmul_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vmul_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m1(op1, op2, vl); + return __riscv_vmul_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vmul_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmul_vv_u8m2(op1, op2, vl); + return __riscv_vmul_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vmul_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m2(op1, op2, vl); + return __riscv_vmul_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vmul_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmul_vv_u8m4(op1, op2, vl); + return __riscv_vmul_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vmul_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m4(op1, op2, vl); + return __riscv_vmul_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vmul_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmul_vv_u8m8(op1, op2, vl); + return __riscv_vmul_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vmul_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m8(op1, op2, vl); + return __riscv_vmul_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vmul_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmul_vv_u16mf4(op1, op2, vl); + return __riscv_vmul_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vmul_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf4(op1, op2, vl); + return __riscv_vmul_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vmul_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmul_vv_u16mf2(op1, op2, vl); + return __riscv_vmul_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vmul_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf2(op1, op2, vl); + return __riscv_vmul_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vmul_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmul_vv_u16m1(op1, op2, vl); + return __riscv_vmul_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vmul_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m1(op1, op2, vl); + return __riscv_vmul_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vmul_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmul_vv_u16m2(op1, op2, vl); + return __riscv_vmul_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vmul_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m2(op1, op2, vl); + return __riscv_vmul_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vmul_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmul_vv_u16m4(op1, op2, vl); + return __riscv_vmul_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vmul_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m4(op1, op2, vl); + return __riscv_vmul_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vmul_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmul_vv_u16m8(op1, op2, vl); + return __riscv_vmul_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vmul_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m8(op1, op2, vl); + return __riscv_vmul_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vmul_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmul_vv_u32mf2(op1, op2, vl); + return __riscv_vmul_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vmul_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32mf2(op1, op2, vl); + return __riscv_vmul_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vmul_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmul_vv_u32m1(op1, op2, vl); + return __riscv_vmul_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vmul_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m1(op1, op2, vl); + return __riscv_vmul_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vmul_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmul_vv_u32m2(op1, op2, vl); + return __riscv_vmul_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vmul_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m2(op1, op2, vl); + return __riscv_vmul_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vmul_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmul_vv_u32m4(op1, op2, vl); + return __riscv_vmul_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vmul_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m4(op1, op2, vl); + return __riscv_vmul_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vmul_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmul_vv_u32m8(op1, op2, vl); + return __riscv_vmul_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vmul_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m8(op1, op2, vl); + return __riscv_vmul_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vmul_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmul_vv_u64m1(op1, op2, vl); + return __riscv_vmul_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vmul_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m1(op1, op2, vl); + return __riscv_vmul_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vmul_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmul_vv_u64m2(op1, op2, vl); + return __riscv_vmul_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vmul_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m2(op1, op2, vl); + return __riscv_vmul_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vmul_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmul_vv_u64m4(op1, op2, vl); + return __riscv_vmul_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vmul_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m4(op1, op2, vl); + return __riscv_vmul_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vmul_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmul_vv_u64m8(op1, op2, vl); + return __riscv_vmul_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m8( @@ -795,7 +795,7 @@ vuint64m8_t test_vmul_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m8(op1, op2, vl); + return __riscv_vmul_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf8_m( @@ -804,7 +804,7 @@ vuint64m8_t test_vmul_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmul_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf8_m( @@ -813,7 +813,7 @@ vint8mf8_t test_vmul_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf4_m( @@ -822,7 +822,7 @@ vint8mf8_t test_vmul_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmul_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf4_m( @@ -831,7 +831,7 @@ vint8mf4_t test_vmul_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf2_m( @@ -840,7 +840,7 @@ vint8mf4_t test_vmul_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmul_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf2_m( @@ -849,7 +849,7 @@ vint8mf2_t test_vmul_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m1_m( @@ -858,7 +858,7 @@ vint8mf2_t test_vmul_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmul_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m1_m( @@ -867,7 +867,7 @@ vint8m1_t test_vmul_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m2_m( @@ -876,7 +876,7 @@ vint8m1_t test_vmul_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmul_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m2_m( @@ -885,7 +885,7 @@ vint8m2_t test_vmul_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m4_m( @@ -894,7 +894,7 @@ vint8m2_t test_vmul_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmul_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m4_m( @@ -903,7 +903,7 @@ vint8m4_t test_vmul_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m8_m( @@ -912,7 +912,7 @@ vint8m4_t test_vmul_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmul_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m8_m( @@ -921,7 +921,7 @@ vint8m8_t test_vmul_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf4_m( @@ -930,7 +930,7 @@ vint8m8_t test_vmul_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmul_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf4_m( @@ -939,7 +939,7 @@ vint16mf4_t test_vmul_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf2_m( @@ -948,7 +948,7 @@ vint16mf4_t test_vmul_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmul_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf2_m( @@ -957,7 +957,7 @@ vint16mf2_t test_vmul_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m1_m( @@ -966,7 +966,7 @@ vint16mf2_t test_vmul_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmul_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m1_m( @@ -975,7 +975,7 @@ vint16m1_t test_vmul_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m2_m( @@ -984,7 +984,7 @@ vint16m1_t test_vmul_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmul_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m2_m( @@ -993,7 +993,7 @@ vint16m2_t test_vmul_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m4_m( @@ -1002,7 +1002,7 @@ vint16m2_t test_vmul_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmul_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m4_m( @@ -1011,7 +1011,7 @@ vint16m4_t test_vmul_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m8_m( @@ -1020,7 +1020,7 @@ vint16m4_t test_vmul_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmul_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m8_m( @@ -1029,7 +1029,7 @@ vint16m8_t test_vmul_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32mf2_m( @@ -1038,7 +1038,7 @@ vint16m8_t test_vmul_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmul_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32mf2_m( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vmul_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m1_m( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vmul_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmul_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m1_m( @@ -1065,7 +1065,7 @@ vint32m1_t test_vmul_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m2_m( @@ -1074,7 +1074,7 @@ vint32m1_t test_vmul_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmul_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m2_m( @@ -1083,7 +1083,7 @@ vint32m2_t test_vmul_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m4_m( @@ -1092,7 +1092,7 @@ vint32m2_t test_vmul_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmul_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m4_m( @@ -1101,7 +1101,7 @@ vint32m4_t test_vmul_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m8_m( @@ -1110,7 +1110,7 @@ vint32m4_t test_vmul_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmul_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m8_m( @@ -1119,7 +1119,7 @@ vint32m8_t test_vmul_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m1_m( @@ -1128,7 +1128,7 @@ vint32m8_t test_vmul_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmul_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m1_m( @@ -1137,7 +1137,7 @@ vint64m1_t test_vmul_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m2_m( @@ -1146,7 +1146,7 @@ vint64m1_t test_vmul_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmul_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m2_m( @@ -1155,7 +1155,7 @@ vint64m2_t test_vmul_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m4_m( @@ -1164,7 +1164,7 @@ vint64m2_t test_vmul_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmul_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m4_m( @@ -1173,7 +1173,7 @@ vint64m4_t test_vmul_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m8_m( @@ -1182,7 +1182,7 @@ vint64m4_t test_vmul_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmul_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m8_m( @@ -1191,7 +1191,7 @@ vint64m8_t test_vmul_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf8_m( @@ -1200,7 +1200,7 @@ vint64m8_t test_vmul_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmul_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf8_m( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vmul_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf4_m( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vmul_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmul_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf4_m( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vmul_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf2_m( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vmul_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmul_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf2_m( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vmul_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m1_m( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vmul_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmul_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m1_m( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vmul_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m2_m( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vmul_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmul_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m2_m( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vmul_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m4_m( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vmul_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmul_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m4_m( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vmul_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m8_m( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vmul_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmul_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m8_m( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vmul_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf4_m( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vmul_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmul_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf4_m( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vmul_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf2_m( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vmul_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmul_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf2_m( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vmul_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m1_m( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vmul_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmul_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m1_m( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vmul_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m2_m( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vmul_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmul_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m2_m( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vmul_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m4_m( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vmul_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmul_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m4_m( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vmul_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m8_m( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vmul_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmul_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m8_m( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vmul_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32mf2_m( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vmul_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmul_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32mf2_m( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vmul_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m1_m( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vmul_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmul_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m1_m( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vmul_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m2_m( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vmul_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmul_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m2_m( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vmul_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m4_m( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vmul_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmul_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m4_m( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vmul_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m8_m( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vmul_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmul_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m8_m( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vmul_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m1_m( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vmul_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmul_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m1_m( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vmul_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m2_m( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vmul_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmul_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m2_m( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vmul_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m4_m( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vmul_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmul_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m4_m( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vmul_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m8_m( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vmul_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmul_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vmul_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m8_m( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vmul_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vmul_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulh.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulh.c index 517507b4fb5422f079219047d6bce19ca0019163..b00cc5f399c57d4aed2dc5628c9bb7128dc7a34d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulh.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulh.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmulh_vv_i8mf8(op1, op2, vl); + return __riscv_vmulh_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vmulh_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf8(op1, op2, vl); + return __riscv_vmulh_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vmulh_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmulh_vv_i8mf4(op1, op2, vl); + return __riscv_vmulh_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vmulh_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf4(op1, op2, vl); + return __riscv_vmulh_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vmulh_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmulh_vv_i8mf2(op1, op2, vl); + return __riscv_vmulh_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vmulh_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf2(op1, op2, vl); + return __riscv_vmulh_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vmulh_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmulh_vv_i8m1(op1, op2, vl); + return __riscv_vmulh_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vmulh_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m1(op1, op2, vl); + return __riscv_vmulh_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vmulh_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmulh_vv_i8m2(op1, op2, vl); + return __riscv_vmulh_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vmulh_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m2(op1, op2, vl); + return __riscv_vmulh_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vmulh_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmulh_vv_i8m4(op1, op2, vl); + return __riscv_vmulh_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vmulh_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m4(op1, op2, vl); + return __riscv_vmulh_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vmulh_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmulh_vv_i8m8(op1, op2, vl); + return __riscv_vmulh_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vmulh_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m8(op1, op2, vl); + return __riscv_vmulh_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vmulh_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmulh_vv_i16mf4(op1, op2, vl); + return __riscv_vmulh_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vmulh_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf4(op1, op2, vl); + return __riscv_vmulh_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vmulh_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmulh_vv_i16mf2(op1, op2, vl); + return __riscv_vmulh_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vmulh_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf2(op1, op2, vl); + return __riscv_vmulh_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vmulh_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmulh_vv_i16m1(op1, op2, vl); + return __riscv_vmulh_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vmulh_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m1(op1, op2, vl); + return __riscv_vmulh_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vmulh_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmulh_vv_i16m2(op1, op2, vl); + return __riscv_vmulh_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vmulh_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m2(op1, op2, vl); + return __riscv_vmulh_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vmulh_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmulh_vv_i16m4(op1, op2, vl); + return __riscv_vmulh_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vmulh_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m4(op1, op2, vl); + return __riscv_vmulh_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vmulh_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmulh_vv_i16m8(op1, op2, vl); + return __riscv_vmulh_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vmulh_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m8(op1, op2, vl); + return __riscv_vmulh_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vmulh_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmulh_vv_i32mf2(op1, op2, vl); + return __riscv_vmulh_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vmulh_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32mf2(op1, op2, vl); + return __riscv_vmulh_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vmulh_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmulh_vv_i32m1(op1, op2, vl); + return __riscv_vmulh_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vmulh_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m1(op1, op2, vl); + return __riscv_vmulh_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vmulh_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmulh_vv_i32m2(op1, op2, vl); + return __riscv_vmulh_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vmulh_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m2(op1, op2, vl); + return __riscv_vmulh_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vmulh_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmulh_vv_i32m4(op1, op2, vl); + return __riscv_vmulh_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vmulh_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m4(op1, op2, vl); + return __riscv_vmulh_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vmulh_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmulh_vv_i32m8(op1, op2, vl); + return __riscv_vmulh_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vmulh_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m8(op1, op2, vl); + return __riscv_vmulh_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vmulh_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmulh_vv_i64m1(op1, op2, vl); + return __riscv_vmulh_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vmulh_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m1(op1, op2, vl); + return __riscv_vmulh_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vmulh_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmulh_vv_i64m2(op1, op2, vl); + return __riscv_vmulh_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vmulh_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m2(op1, op2, vl); + return __riscv_vmulh_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vmulh_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmulh_vv_i64m4(op1, op2, vl); + return __riscv_vmulh_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vmulh_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m4(op1, op2, vl); + return __riscv_vmulh_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vmulh_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmulh_vv_i64m8(op1, op2, vl); + return __riscv_vmulh_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vmulh_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m8(op1, op2, vl); + return __riscv_vmulh_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vmulh_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmulh_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vmulh_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vmulh_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmulh_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vmulh_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vmulh_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmulh_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vmulh_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vmulh_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmulh_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vmulh_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vmulh_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmulh_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vmulh_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vmulh_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmulh_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vmulh_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vmulh_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmulh_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vmulh_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vmulh_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmulh_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vmulh_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vmulh_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmulh_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vmulh_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vmulh_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmulh_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vmulh_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vmulh_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmulh_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vmulh_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vmulh_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmulh_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vmulh_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vmulh_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmulh_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vmulh_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vmulh_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmulh_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vmulh_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vmulh_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmulh_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vmulh_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vmulh_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmulh_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vmulh_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vmulh_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmulh_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vmulh_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vmulh_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmulh_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vmulh_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vmulh_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmulh_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vmulh_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vmulh_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmulh_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vmulh_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vmulh_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmulh_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vmulh_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vmulh_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmulh_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vmulh_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulhsu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulhsu.c index 41a9df19eb827105ee88ab1d12ffa3ab1cf07390..8a270612011d6cb6bc06326747fc30cee7d33828 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulhsu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulhsu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhsu_vv_i8mf8(op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vmulhsu_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vx_i8mf8(vint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf8(op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vmulhsu_vx_i8mf8(vint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhsu_vv_i8mf4(op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vmulhsu_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vx_i8mf4(vint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf4(op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vmulhsu_vx_i8mf4(vint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhsu_vv_i8mf2(op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vmulhsu_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vx_i8mf2(vint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf2(op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vmulhsu_vx_i8mf2(vint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vv_i8m1(vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhsu_vv_i8m1(op1, op2, vl); + return __riscv_vmulhsu_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vmulhsu_vv_i8m1(vint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vx_i8m1(vint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m1(op1, op2, vl); + return __riscv_vmulhsu_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vmulhsu_vx_i8m1(vint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vv_i8m2(vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhsu_vv_i8m2(op1, op2, vl); + return __riscv_vmulhsu_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vmulhsu_vv_i8m2(vint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vx_i8m2(vint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m2(op1, op2, vl); + return __riscv_vmulhsu_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vmulhsu_vx_i8m2(vint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vv_i8m4(vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhsu_vv_i8m4(op1, op2, vl); + return __riscv_vmulhsu_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vmulhsu_vv_i8m4(vint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vx_i8m4(vint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m4(op1, op2, vl); + return __riscv_vmulhsu_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vmulhsu_vx_i8m4(vint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vv_i8m8(vint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhsu_vv_i8m8(op1, op2, vl); + return __riscv_vmulhsu_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vmulhsu_vv_i8m8(vint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vx_i8m8(vint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m8(op1, op2, vl); + return __riscv_vmulhsu_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vmulhsu_vx_i8m8(vint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhsu_vv_i16mf4(op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vmulhsu_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vx_i16mf4(vint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf4(op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vmulhsu_vx_i16mf4(vint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhsu_vv_i16mf2(op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vmulhsu_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vx_i16mf2(vint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf2(op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vmulhsu_vx_i16mf2(vint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vv_i16m1(vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhsu_vv_i16m1(op1, op2, vl); + return __riscv_vmulhsu_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vmulhsu_vv_i16m1(vint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vx_i16m1(vint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m1(op1, op2, vl); + return __riscv_vmulhsu_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vmulhsu_vx_i16m1(vint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vv_i16m2(vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhsu_vv_i16m2(op1, op2, vl); + return __riscv_vmulhsu_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vmulhsu_vv_i16m2(vint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vx_i16m2(vint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m2(op1, op2, vl); + return __riscv_vmulhsu_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vmulhsu_vx_i16m2(vint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vv_i16m4(vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhsu_vv_i16m4(op1, op2, vl); + return __riscv_vmulhsu_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vmulhsu_vv_i16m4(vint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vx_i16m4(vint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m4(op1, op2, vl); + return __riscv_vmulhsu_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vmulhsu_vx_i16m4(vint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vv_i16m8(vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhsu_vv_i16m8(op1, op2, vl); + return __riscv_vmulhsu_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vmulhsu_vv_i16m8(vint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vx_i16m8(vint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m8(op1, op2, vl); + return __riscv_vmulhsu_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vmulhsu_vx_i16m8(vint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhsu_vv_i32mf2(op1, op2, vl); + return __riscv_vmulhsu_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vmulhsu_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vx_i32mf2(vint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32mf2(op1, op2, vl); + return __riscv_vmulhsu_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vmulhsu_vx_i32mf2(vint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vv_i32m1(vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhsu_vv_i32m1(op1, op2, vl); + return __riscv_vmulhsu_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vmulhsu_vv_i32m1(vint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vx_i32m1(vint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m1(op1, op2, vl); + return __riscv_vmulhsu_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vmulhsu_vx_i32m1(vint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vv_i32m2(vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhsu_vv_i32m2(op1, op2, vl); + return __riscv_vmulhsu_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vmulhsu_vv_i32m2(vint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vx_i32m2(vint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m2(op1, op2, vl); + return __riscv_vmulhsu_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vmulhsu_vx_i32m2(vint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vv_i32m4(vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhsu_vv_i32m4(op1, op2, vl); + return __riscv_vmulhsu_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vmulhsu_vv_i32m4(vint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vx_i32m4(vint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m4(op1, op2, vl); + return __riscv_vmulhsu_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vmulhsu_vx_i32m4(vint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vv_i32m8(vint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhsu_vv_i32m8(op1, op2, vl); + return __riscv_vmulhsu_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vmulhsu_vv_i32m8(vint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vx_i32m8(vint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m8(op1, op2, vl); + return __riscv_vmulhsu_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vmulhsu_vx_i32m8(vint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vv_i64m1(vint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhsu_vv_i64m1(op1, op2, vl); + return __riscv_vmulhsu_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vmulhsu_vv_i64m1(vint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vx_i64m1(vint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m1(op1, op2, vl); + return __riscv_vmulhsu_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vmulhsu_vx_i64m1(vint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vv_i64m2(vint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhsu_vv_i64m2(op1, op2, vl); + return __riscv_vmulhsu_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vmulhsu_vv_i64m2(vint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vx_i64m2(vint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m2(op1, op2, vl); + return __riscv_vmulhsu_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vmulhsu_vx_i64m2(vint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vv_i64m4(vint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhsu_vv_i64m4(op1, op2, vl); + return __riscv_vmulhsu_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vmulhsu_vv_i64m4(vint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vx_i64m4(vint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m4(op1, op2, vl); + return __riscv_vmulhsu_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vmulhsu_vx_i64m4(vint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vv_i64m8(vint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhsu_vv_i64m8(op1, op2, vl); + return __riscv_vmulhsu_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vmulhsu_vv_i64m8(vint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vx_i64m8(vint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m8(op1, op2, vl); + return __riscv_vmulhsu_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vmulhsu_vx_i64m8(vint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhsu_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vmulhsu_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vmulhsu_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhsu_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vmulhsu_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vmulhsu_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhsu_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vmulhsu_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vmulhsu_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhsu_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vmulhsu_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vmulhsu_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhsu_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vmulhsu_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vmulhsu_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhsu_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vmulhsu_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vmulhsu_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhsu_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vmulhsu_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vmulhsu_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhsu_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vmulhsu_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vmulhsu_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhsu_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vmulhsu_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vmulhsu_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhsu_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vmulhsu_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vmulhsu_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhsu_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vmulhsu_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vmulhsu_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhsu_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vmulhsu_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vmulhsu_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhsu_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vmulhsu_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vmulhsu_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhsu_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vmulhsu_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vmulhsu_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhsu_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vmulhsu_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vmulhsu_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhsu_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vmulhsu_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vmulhsu_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhsu_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vmulhsu_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vmulhsu_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhsu_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vmulhsu_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vmulhsu_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhsu_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vmulhsu_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vmulhsu_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhsu_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vmulhsu_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vmulhsu_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhsu_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vmulhsu_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vmulhsu_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhsu_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vmulhsu_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulhu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulhu.c index 0bc234775bd8e262523171441c871c2992c53f9b..9e589485637138a1640b77a2fade755f8a9f2387 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulhu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmulhu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhu_vv_u8mf8(op1, op2, vl); + return __riscv_vmulhu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vmulhu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf8(op1, op2, vl); + return __riscv_vmulhu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vmulhu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhu_vv_u8mf4(op1, op2, vl); + return __riscv_vmulhu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vmulhu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf4(op1, op2, vl); + return __riscv_vmulhu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vmulhu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhu_vv_u8mf2(op1, op2, vl); + return __riscv_vmulhu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vmulhu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf2(op1, op2, vl); + return __riscv_vmulhu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vmulhu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhu_vv_u8m1(op1, op2, vl); + return __riscv_vmulhu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vmulhu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m1(op1, op2, vl); + return __riscv_vmulhu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vmulhu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhu_vv_u8m2(op1, op2, vl); + return __riscv_vmulhu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vmulhu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m2(op1, op2, vl); + return __riscv_vmulhu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vmulhu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhu_vv_u8m4(op1, op2, vl); + return __riscv_vmulhu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vmulhu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m4(op1, op2, vl); + return __riscv_vmulhu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vmulhu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhu_vv_u8m8(op1, op2, vl); + return __riscv_vmulhu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vmulhu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m8(op1, op2, vl); + return __riscv_vmulhu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vmulhu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhu_vv_u16mf4(op1, op2, vl); + return __riscv_vmulhu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vmulhu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf4(op1, op2, vl); + return __riscv_vmulhu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vmulhu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhu_vv_u16mf2(op1, op2, vl); + return __riscv_vmulhu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vmulhu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf2(op1, op2, vl); + return __riscv_vmulhu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vmulhu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhu_vv_u16m1(op1, op2, vl); + return __riscv_vmulhu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vmulhu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m1(op1, op2, vl); + return __riscv_vmulhu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vmulhu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhu_vv_u16m2(op1, op2, vl); + return __riscv_vmulhu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vmulhu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m2(op1, op2, vl); + return __riscv_vmulhu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vmulhu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhu_vv_u16m4(op1, op2, vl); + return __riscv_vmulhu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vmulhu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m4(op1, op2, vl); + return __riscv_vmulhu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vmulhu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhu_vv_u16m8(op1, op2, vl); + return __riscv_vmulhu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vmulhu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m8(op1, op2, vl); + return __riscv_vmulhu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vmulhu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhu_vv_u32mf2(op1, op2, vl); + return __riscv_vmulhu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vmulhu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32mf2(op1, op2, vl); + return __riscv_vmulhu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vmulhu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhu_vv_u32m1(op1, op2, vl); + return __riscv_vmulhu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vmulhu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m1(op1, op2, vl); + return __riscv_vmulhu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vmulhu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhu_vv_u32m2(op1, op2, vl); + return __riscv_vmulhu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vmulhu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m2(op1, op2, vl); + return __riscv_vmulhu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vmulhu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhu_vv_u32m4(op1, op2, vl); + return __riscv_vmulhu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vmulhu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m4(op1, op2, vl); + return __riscv_vmulhu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vmulhu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhu_vv_u32m8(op1, op2, vl); + return __riscv_vmulhu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vmulhu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m8(op1, op2, vl); + return __riscv_vmulhu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vmulhu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhu_vv_u64m1(op1, op2, vl); + return __riscv_vmulhu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vmulhu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m1(op1, op2, vl); + return __riscv_vmulhu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vmulhu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhu_vv_u64m2(op1, op2, vl); + return __riscv_vmulhu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vmulhu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m2(op1, op2, vl); + return __riscv_vmulhu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vmulhu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhu_vv_u64m4(op1, op2, vl); + return __riscv_vmulhu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vmulhu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m4(op1, op2, vl); + return __riscv_vmulhu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vmulhu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhu_vv_u64m8(op1, op2, vl); + return __riscv_vmulhu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vmulhu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m8(op1, op2, vl); + return __riscv_vmulhu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vmulhu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vmulhu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vmulhu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vmulhu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vmulhu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vmulhu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vmulhu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vmulhu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vmulhu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vmulhu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vmulhu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vmulhu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vmulhu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vmulhu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vmulhu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vmulhu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vmulhu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vmulhu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vmulhu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vmulhu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vmulhu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vmulhu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vmulhu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vmulhu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vmulhu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vmulhu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vmulhu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vmulhu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vmulhu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vmulhu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vmulhu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vmulhu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vmulhu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vmulhu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vmulhu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vmulhu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vmulhu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vmulhu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vmulhu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vmulhu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vmulhu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vmulhu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vmulhu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vmulhu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmv.c index 2e4dc657420a51e551da5ed328c0627a780b32ef..5364bd0630cc0c95c268cfafd4d8863d8a0b2e9f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmv_v_v_i8mf8(vint8mf8_t src, size_t vl) { - return vmv_v_v_i8mf8(src, vl); + return __riscv_vmv_v_v_i8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8mf8( @@ -22,7 +22,7 @@ vint8mf8_t test_vmv_v_v_i8mf8(vint8mf8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmv_v_x_i8mf8(int8_t src, size_t vl) { - return vmv_v_x_i8mf8(src, vl); + return __riscv_vmv_v_x_i8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8mf4( @@ -31,7 +31,7 @@ vint8mf8_t test_vmv_v_x_i8mf8(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmv_v_v_i8mf4(vint8mf4_t src, size_t vl) { - return vmv_v_v_i8mf4(src, vl); + return __riscv_vmv_v_v_i8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8mf4( @@ -40,7 +40,7 @@ vint8mf4_t test_vmv_v_v_i8mf4(vint8mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmv_v_x_i8mf4(int8_t src, size_t vl) { - return vmv_v_x_i8mf4(src, vl); + return __riscv_vmv_v_x_i8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8mf2( @@ -49,7 +49,7 @@ vint8mf4_t test_vmv_v_x_i8mf4(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmv_v_v_i8mf2(vint8mf2_t src, size_t vl) { - return vmv_v_v_i8mf2(src, vl); + return __riscv_vmv_v_v_i8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8mf2( @@ -58,7 +58,7 @@ vint8mf2_t test_vmv_v_v_i8mf2(vint8mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmv_v_x_i8mf2(int8_t src, size_t vl) { - return vmv_v_x_i8mf2(src, vl); + return __riscv_vmv_v_x_i8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8m1( @@ -67,7 +67,7 @@ vint8mf2_t test_vmv_v_x_i8mf2(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmv_v_v_i8m1(vint8m1_t src, size_t vl) { - return vmv_v_v_i8m1(src, vl); + return __riscv_vmv_v_v_i8m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8m1( @@ -76,7 +76,7 @@ vint8m1_t test_vmv_v_v_i8m1(vint8m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmv_v_x_i8m1(int8_t src, size_t vl) { - return vmv_v_x_i8m1(src, vl); + return __riscv_vmv_v_x_i8m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8m2( @@ -85,7 +85,7 @@ vint8m1_t test_vmv_v_x_i8m1(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmv_v_v_i8m2(vint8m2_t src, size_t vl) { - return vmv_v_v_i8m2(src, vl); + return __riscv_vmv_v_v_i8m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8m2( @@ -94,7 +94,7 @@ vint8m2_t test_vmv_v_v_i8m2(vint8m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmv_v_x_i8m2(int8_t src, size_t vl) { - return vmv_v_x_i8m2(src, vl); + return __riscv_vmv_v_x_i8m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8m4( @@ -103,7 +103,7 @@ vint8m2_t test_vmv_v_x_i8m2(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmv_v_v_i8m4(vint8m4_t src, size_t vl) { - return vmv_v_v_i8m4(src, vl); + return __riscv_vmv_v_v_i8m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8m4( @@ -112,7 +112,7 @@ vint8m4_t test_vmv_v_v_i8m4(vint8m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmv_v_x_i8m4(int8_t src, size_t vl) { - return vmv_v_x_i8m4(src, vl); + return __riscv_vmv_v_x_i8m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8m8( @@ -121,7 +121,7 @@ vint8m4_t test_vmv_v_x_i8m4(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmv_v_v_i8m8(vint8m8_t src, size_t vl) { - return vmv_v_v_i8m8(src, vl); + return __riscv_vmv_v_v_i8m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8m8( @@ -130,7 +130,7 @@ vint8m8_t test_vmv_v_v_i8m8(vint8m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmv_v_x_i8m8(int8_t src, size_t vl) { - return vmv_v_x_i8m8(src, vl); + return __riscv_vmv_v_x_i8m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16mf4( @@ -139,7 +139,7 @@ vint8m8_t test_vmv_v_x_i8m8(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmv_v_v_i16mf4(vint16mf4_t src, size_t vl) { - return vmv_v_v_i16mf4(src, vl); + return __riscv_vmv_v_v_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16mf4( @@ -148,7 +148,7 @@ vint16mf4_t test_vmv_v_v_i16mf4(vint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmv_v_x_i16mf4(int16_t src, size_t vl) { - return vmv_v_x_i16mf4(src, vl); + return __riscv_vmv_v_x_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16mf2( @@ -157,7 +157,7 @@ vint16mf4_t test_vmv_v_x_i16mf4(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmv_v_v_i16mf2(vint16mf2_t src, size_t vl) { - return vmv_v_v_i16mf2(src, vl); + return __riscv_vmv_v_v_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16mf2( @@ -166,7 +166,7 @@ vint16mf2_t test_vmv_v_v_i16mf2(vint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmv_v_x_i16mf2(int16_t src, size_t vl) { - return vmv_v_x_i16mf2(src, vl); + return __riscv_vmv_v_x_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16m1( @@ -175,7 +175,7 @@ vint16mf2_t test_vmv_v_x_i16mf2(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmv_v_v_i16m1(vint16m1_t src, size_t vl) { - return vmv_v_v_i16m1(src, vl); + return __riscv_vmv_v_v_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16m1( @@ -184,7 +184,7 @@ vint16m1_t test_vmv_v_v_i16m1(vint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmv_v_x_i16m1(int16_t src, size_t vl) { - return vmv_v_x_i16m1(src, vl); + return __riscv_vmv_v_x_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16m2( @@ -193,7 +193,7 @@ vint16m1_t test_vmv_v_x_i16m1(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmv_v_v_i16m2(vint16m2_t src, size_t vl) { - return vmv_v_v_i16m2(src, vl); + return __riscv_vmv_v_v_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16m2( @@ -202,7 +202,7 @@ vint16m2_t test_vmv_v_v_i16m2(vint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmv_v_x_i16m2(int16_t src, size_t vl) { - return vmv_v_x_i16m2(src, vl); + return __riscv_vmv_v_x_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16m4( @@ -211,7 +211,7 @@ vint16m2_t test_vmv_v_x_i16m2(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmv_v_v_i16m4(vint16m4_t src, size_t vl) { - return vmv_v_v_i16m4(src, vl); + return __riscv_vmv_v_v_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16m4( @@ -220,7 +220,7 @@ vint16m4_t test_vmv_v_v_i16m4(vint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmv_v_x_i16m4(int16_t src, size_t vl) { - return vmv_v_x_i16m4(src, vl); + return __riscv_vmv_v_x_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16m8( @@ -229,7 +229,7 @@ vint16m4_t test_vmv_v_x_i16m4(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmv_v_v_i16m8(vint16m8_t src, size_t vl) { - return vmv_v_v_i16m8(src, vl); + return __riscv_vmv_v_v_i16m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16m8( @@ -238,7 +238,7 @@ vint16m8_t test_vmv_v_v_i16m8(vint16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmv_v_x_i16m8(int16_t src, size_t vl) { - return vmv_v_x_i16m8(src, vl); + return __riscv_vmv_v_x_i16m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32mf2( @@ -247,7 +247,7 @@ vint16m8_t test_vmv_v_x_i16m8(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmv_v_v_i32mf2(vint32mf2_t src, size_t vl) { - return vmv_v_v_i32mf2(src, vl); + return __riscv_vmv_v_v_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32mf2( @@ -256,7 +256,7 @@ vint32mf2_t test_vmv_v_v_i32mf2(vint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmv_v_x_i32mf2(int32_t src, size_t vl) { - return vmv_v_x_i32mf2(src, vl); + return __riscv_vmv_v_x_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vmv_v_x_i32mf2(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmv_v_v_i32m1(vint32m1_t src, size_t vl) { - return vmv_v_v_i32m1(src, vl); + return __riscv_vmv_v_v_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32m1( @@ -274,7 +274,7 @@ vint32m1_t test_vmv_v_v_i32m1(vint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmv_v_x_i32m1(int32_t src, size_t vl) { - return vmv_v_x_i32m1(src, vl); + return __riscv_vmv_v_x_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vmv_v_x_i32m1(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmv_v_v_i32m2(vint32m2_t src, size_t vl) { - return vmv_v_v_i32m2(src, vl); + return __riscv_vmv_v_v_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32m2( @@ -292,7 +292,7 @@ vint32m2_t test_vmv_v_v_i32m2(vint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmv_v_x_i32m2(int32_t src, size_t vl) { - return vmv_v_x_i32m2(src, vl); + return __riscv_vmv_v_x_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32m4( @@ -301,7 +301,7 @@ vint32m2_t test_vmv_v_x_i32m2(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmv_v_v_i32m4(vint32m4_t src, size_t vl) { - return vmv_v_v_i32m4(src, vl); + return __riscv_vmv_v_v_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32m4( @@ -310,7 +310,7 @@ vint32m4_t test_vmv_v_v_i32m4(vint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmv_v_x_i32m4(int32_t src, size_t vl) { - return vmv_v_x_i32m4(src, vl); + return __riscv_vmv_v_x_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32m8( @@ -319,7 +319,7 @@ vint32m4_t test_vmv_v_x_i32m4(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmv_v_v_i32m8(vint32m8_t src, size_t vl) { - return vmv_v_v_i32m8(src, vl); + return __riscv_vmv_v_v_i32m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32m8( @@ -328,7 +328,7 @@ vint32m8_t test_vmv_v_v_i32m8(vint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmv_v_x_i32m8(int32_t src, size_t vl) { - return vmv_v_x_i32m8(src, vl); + return __riscv_vmv_v_x_i32m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i64m1( @@ -337,7 +337,7 @@ vint32m8_t test_vmv_v_x_i32m8(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmv_v_v_i64m1(vint64m1_t src, size_t vl) { - return vmv_v_v_i64m1(src, vl); + return __riscv_vmv_v_v_i64m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i64m1( @@ -346,7 +346,7 @@ vint64m1_t test_vmv_v_v_i64m1(vint64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmv_v_x_i64m1(int64_t src, size_t vl) { - return vmv_v_x_i64m1(src, vl); + return __riscv_vmv_v_x_i64m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i64m2( @@ -355,7 +355,7 @@ vint64m1_t test_vmv_v_x_i64m1(int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmv_v_v_i64m2(vint64m2_t src, size_t vl) { - return vmv_v_v_i64m2(src, vl); + return __riscv_vmv_v_v_i64m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i64m2( @@ -364,7 +364,7 @@ vint64m2_t test_vmv_v_v_i64m2(vint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmv_v_x_i64m2(int64_t src, size_t vl) { - return vmv_v_x_i64m2(src, vl); + return __riscv_vmv_v_x_i64m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i64m4( @@ -373,7 +373,7 @@ vint64m2_t test_vmv_v_x_i64m2(int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmv_v_v_i64m4(vint64m4_t src, size_t vl) { - return vmv_v_v_i64m4(src, vl); + return __riscv_vmv_v_v_i64m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i64m4( @@ -382,7 +382,7 @@ vint64m4_t test_vmv_v_v_i64m4(vint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmv_v_x_i64m4(int64_t src, size_t vl) { - return vmv_v_x_i64m4(src, vl); + return __riscv_vmv_v_x_i64m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i64m8( @@ -391,7 +391,7 @@ vint64m4_t test_vmv_v_x_i64m4(int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmv_v_v_i64m8(vint64m8_t src, size_t vl) { - return vmv_v_v_i64m8(src, vl); + return __riscv_vmv_v_v_i64m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i64m8( @@ -400,7 +400,7 @@ vint64m8_t test_vmv_v_v_i64m8(vint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmv_v_x_i64m8(int64_t src, size_t vl) { - return vmv_v_x_i64m8(src, vl); + return __riscv_vmv_v_x_i64m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8mf8( @@ -409,7 +409,7 @@ vint64m8_t test_vmv_v_x_i64m8(int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmv_v_v_u8mf8(vuint8mf8_t src, size_t vl) { - return vmv_v_v_u8mf8(src, vl); + return __riscv_vmv_v_v_u8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8mf8( @@ -418,7 +418,7 @@ vuint8mf8_t test_vmv_v_v_u8mf8(vuint8mf8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmv_v_x_u8mf8(uint8_t src, size_t vl) { - return vmv_v_x_u8mf8(src, vl); + return __riscv_vmv_v_x_u8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8mf4( @@ -427,7 +427,7 @@ vuint8mf8_t test_vmv_v_x_u8mf8(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmv_v_v_u8mf4(vuint8mf4_t src, size_t vl) { - return vmv_v_v_u8mf4(src, vl); + return __riscv_vmv_v_v_u8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8mf4( @@ -436,7 +436,7 @@ vuint8mf4_t test_vmv_v_v_u8mf4(vuint8mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmv_v_x_u8mf4(uint8_t src, size_t vl) { - return vmv_v_x_u8mf4(src, vl); + return __riscv_vmv_v_x_u8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8mf2( @@ -445,7 +445,7 @@ vuint8mf4_t test_vmv_v_x_u8mf4(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmv_v_v_u8mf2(vuint8mf2_t src, size_t vl) { - return vmv_v_v_u8mf2(src, vl); + return __riscv_vmv_v_v_u8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8mf2( @@ -454,7 +454,7 @@ vuint8mf2_t test_vmv_v_v_u8mf2(vuint8mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmv_v_x_u8mf2(uint8_t src, size_t vl) { - return vmv_v_x_u8mf2(src, vl); + return __riscv_vmv_v_x_u8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8m1( @@ -463,7 +463,7 @@ vuint8mf2_t test_vmv_v_x_u8mf2(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmv_v_v_u8m1(vuint8m1_t src, size_t vl) { - return vmv_v_v_u8m1(src, vl); + return __riscv_vmv_v_v_u8m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8m1( @@ -472,7 +472,7 @@ vuint8m1_t test_vmv_v_v_u8m1(vuint8m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmv_v_x_u8m1(uint8_t src, size_t vl) { - return vmv_v_x_u8m1(src, vl); + return __riscv_vmv_v_x_u8m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8m2( @@ -481,7 +481,7 @@ vuint8m1_t test_vmv_v_x_u8m1(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmv_v_v_u8m2(vuint8m2_t src, size_t vl) { - return vmv_v_v_u8m2(src, vl); + return __riscv_vmv_v_v_u8m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8m2( @@ -490,7 +490,7 @@ vuint8m2_t test_vmv_v_v_u8m2(vuint8m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmv_v_x_u8m2(uint8_t src, size_t vl) { - return vmv_v_x_u8m2(src, vl); + return __riscv_vmv_v_x_u8m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8m4( @@ -499,7 +499,7 @@ vuint8m2_t test_vmv_v_x_u8m2(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmv_v_v_u8m4(vuint8m4_t src, size_t vl) { - return vmv_v_v_u8m4(src, vl); + return __riscv_vmv_v_v_u8m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8m4( @@ -508,7 +508,7 @@ vuint8m4_t test_vmv_v_v_u8m4(vuint8m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmv_v_x_u8m4(uint8_t src, size_t vl) { - return vmv_v_x_u8m4(src, vl); + return __riscv_vmv_v_x_u8m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8m8( @@ -517,7 +517,7 @@ vuint8m4_t test_vmv_v_x_u8m4(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmv_v_v_u8m8(vuint8m8_t src, size_t vl) { - return vmv_v_v_u8m8(src, vl); + return __riscv_vmv_v_v_u8m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8m8( @@ -526,7 +526,7 @@ vuint8m8_t test_vmv_v_v_u8m8(vuint8m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmv_v_x_u8m8(uint8_t src, size_t vl) { - return vmv_v_x_u8m8(src, vl); + return __riscv_vmv_v_x_u8m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16mf4( @@ -535,7 +535,7 @@ vuint8m8_t test_vmv_v_x_u8m8(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmv_v_v_u16mf4(vuint16mf4_t src, size_t vl) { - return vmv_v_v_u16mf4(src, vl); + return __riscv_vmv_v_v_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16mf4( @@ -544,7 +544,7 @@ vuint16mf4_t test_vmv_v_v_u16mf4(vuint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmv_v_x_u16mf4(uint16_t src, size_t vl) { - return vmv_v_x_u16mf4(src, vl); + return __riscv_vmv_v_x_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16mf2( @@ -553,7 +553,7 @@ vuint16mf4_t test_vmv_v_x_u16mf4(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmv_v_v_u16mf2(vuint16mf2_t src, size_t vl) { - return vmv_v_v_u16mf2(src, vl); + return __riscv_vmv_v_v_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16mf2( @@ -562,7 +562,7 @@ vuint16mf2_t test_vmv_v_v_u16mf2(vuint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmv_v_x_u16mf2(uint16_t src, size_t vl) { - return vmv_v_x_u16mf2(src, vl); + return __riscv_vmv_v_x_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16m1( @@ -571,7 +571,7 @@ vuint16mf2_t test_vmv_v_x_u16mf2(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmv_v_v_u16m1(vuint16m1_t src, size_t vl) { - return vmv_v_v_u16m1(src, vl); + return __riscv_vmv_v_v_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16m1( @@ -580,7 +580,7 @@ vuint16m1_t test_vmv_v_v_u16m1(vuint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmv_v_x_u16m1(uint16_t src, size_t vl) { - return vmv_v_x_u16m1(src, vl); + return __riscv_vmv_v_x_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16m2( @@ -589,7 +589,7 @@ vuint16m1_t test_vmv_v_x_u16m1(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmv_v_v_u16m2(vuint16m2_t src, size_t vl) { - return vmv_v_v_u16m2(src, vl); + return __riscv_vmv_v_v_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16m2( @@ -598,7 +598,7 @@ vuint16m2_t test_vmv_v_v_u16m2(vuint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmv_v_x_u16m2(uint16_t src, size_t vl) { - return vmv_v_x_u16m2(src, vl); + return __riscv_vmv_v_x_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16m4( @@ -607,7 +607,7 @@ vuint16m2_t test_vmv_v_x_u16m2(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmv_v_v_u16m4(vuint16m4_t src, size_t vl) { - return vmv_v_v_u16m4(src, vl); + return __riscv_vmv_v_v_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16m4( @@ -616,7 +616,7 @@ vuint16m4_t test_vmv_v_v_u16m4(vuint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmv_v_x_u16m4(uint16_t src, size_t vl) { - return vmv_v_x_u16m4(src, vl); + return __riscv_vmv_v_x_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16m8( @@ -625,7 +625,7 @@ vuint16m4_t test_vmv_v_x_u16m4(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmv_v_v_u16m8(vuint16m8_t src, size_t vl) { - return vmv_v_v_u16m8(src, vl); + return __riscv_vmv_v_v_u16m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16m8( @@ -634,7 +634,7 @@ vuint16m8_t test_vmv_v_v_u16m8(vuint16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmv_v_x_u16m8(uint16_t src, size_t vl) { - return vmv_v_x_u16m8(src, vl); + return __riscv_vmv_v_x_u16m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32mf2( @@ -643,7 +643,7 @@ vuint16m8_t test_vmv_v_x_u16m8(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmv_v_v_u32mf2(vuint32mf2_t src, size_t vl) { - return vmv_v_v_u32mf2(src, vl); + return __riscv_vmv_v_v_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32mf2( @@ -652,7 +652,7 @@ vuint32mf2_t test_vmv_v_v_u32mf2(vuint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmv_v_x_u32mf2(uint32_t src, size_t vl) { - return vmv_v_x_u32mf2(src, vl); + return __riscv_vmv_v_x_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32m1( @@ -661,7 +661,7 @@ vuint32mf2_t test_vmv_v_x_u32mf2(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmv_v_v_u32m1(vuint32m1_t src, size_t vl) { - return vmv_v_v_u32m1(src, vl); + return __riscv_vmv_v_v_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32m1( @@ -670,7 +670,7 @@ vuint32m1_t test_vmv_v_v_u32m1(vuint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmv_v_x_u32m1(uint32_t src, size_t vl) { - return vmv_v_x_u32m1(src, vl); + return __riscv_vmv_v_x_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32m2( @@ -679,7 +679,7 @@ vuint32m1_t test_vmv_v_x_u32m1(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmv_v_v_u32m2(vuint32m2_t src, size_t vl) { - return vmv_v_v_u32m2(src, vl); + return __riscv_vmv_v_v_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32m2( @@ -688,7 +688,7 @@ vuint32m2_t test_vmv_v_v_u32m2(vuint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmv_v_x_u32m2(uint32_t src, size_t vl) { - return vmv_v_x_u32m2(src, vl); + return __riscv_vmv_v_x_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32m4( @@ -697,7 +697,7 @@ vuint32m2_t test_vmv_v_x_u32m2(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmv_v_v_u32m4(vuint32m4_t src, size_t vl) { - return vmv_v_v_u32m4(src, vl); + return __riscv_vmv_v_v_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32m4( @@ -706,7 +706,7 @@ vuint32m4_t test_vmv_v_v_u32m4(vuint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmv_v_x_u32m4(uint32_t src, size_t vl) { - return vmv_v_x_u32m4(src, vl); + return __riscv_vmv_v_x_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32m8( @@ -715,7 +715,7 @@ vuint32m4_t test_vmv_v_x_u32m4(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmv_v_v_u32m8(vuint32m8_t src, size_t vl) { - return vmv_v_v_u32m8(src, vl); + return __riscv_vmv_v_v_u32m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32m8( @@ -724,7 +724,7 @@ vuint32m8_t test_vmv_v_v_u32m8(vuint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmv_v_x_u32m8(uint32_t src, size_t vl) { - return vmv_v_x_u32m8(src, vl); + return __riscv_vmv_v_x_u32m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u64m1( @@ -733,7 +733,7 @@ vuint32m8_t test_vmv_v_x_u32m8(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmv_v_v_u64m1(vuint64m1_t src, size_t vl) { - return vmv_v_v_u64m1(src, vl); + return __riscv_vmv_v_v_u64m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u64m1( @@ -742,7 +742,7 @@ vuint64m1_t test_vmv_v_v_u64m1(vuint64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmv_v_x_u64m1(uint64_t src, size_t vl) { - return vmv_v_x_u64m1(src, vl); + return __riscv_vmv_v_x_u64m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u64m2( @@ -751,7 +751,7 @@ vuint64m1_t test_vmv_v_x_u64m1(uint64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmv_v_v_u64m2(vuint64m2_t src, size_t vl) { - return vmv_v_v_u64m2(src, vl); + return __riscv_vmv_v_v_u64m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u64m2( @@ -760,7 +760,7 @@ vuint64m2_t test_vmv_v_v_u64m2(vuint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmv_v_x_u64m2(uint64_t src, size_t vl) { - return vmv_v_x_u64m2(src, vl); + return __riscv_vmv_v_x_u64m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u64m4( @@ -769,7 +769,7 @@ vuint64m2_t test_vmv_v_x_u64m2(uint64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmv_v_v_u64m4(vuint64m4_t src, size_t vl) { - return vmv_v_v_u64m4(src, vl); + return __riscv_vmv_v_v_u64m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u64m4( @@ -778,7 +778,7 @@ vuint64m4_t test_vmv_v_v_u64m4(vuint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmv_v_x_u64m4(uint64_t src, size_t vl) { - return vmv_v_x_u64m4(src, vl); + return __riscv_vmv_v_x_u64m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u64m8( @@ -787,7 +787,7 @@ vuint64m4_t test_vmv_v_x_u64m4(uint64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmv_v_v_u64m8(vuint64m8_t src, size_t vl) { - return vmv_v_v_u64m8(src, vl); + return __riscv_vmv_v_v_u64m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u64m8( @@ -796,7 +796,7 @@ vuint64m8_t test_vmv_v_v_u64m8(vuint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmv_v_x_u64m8(uint64_t src, size_t vl) { - return vmv_v_x_u64m8(src, vl); + return __riscv_vmv_v_x_u64m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16mf4( @@ -805,7 +805,7 @@ vuint64m8_t test_vmv_v_x_u64m8(uint64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vmv_v_v_f16mf4(vfloat16mf4_t src, size_t vl) { - return vmv_v_v_f16mf4(src, vl); + return __riscv_vmv_v_v_f16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16mf2( @@ -814,7 +814,7 @@ vfloat16mf4_t test_vmv_v_v_f16mf4(vfloat16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vmv_v_v_f16mf2(vfloat16mf2_t src, size_t vl) { - return vmv_v_v_f16mf2(src, vl); + return __riscv_vmv_v_v_f16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16m1( @@ -823,7 +823,7 @@ vfloat16mf2_t test_vmv_v_v_f16mf2(vfloat16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vmv_v_v_f16m1(vfloat16m1_t src, size_t vl) { - return vmv_v_v_f16m1(src, vl); + return __riscv_vmv_v_v_f16m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16m2( @@ -832,7 +832,7 @@ vfloat16m1_t test_vmv_v_v_f16m1(vfloat16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vmv_v_v_f16m2(vfloat16m2_t src, size_t vl) { - return vmv_v_v_f16m2(src, vl); + return __riscv_vmv_v_v_f16m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16m4( @@ -841,7 +841,7 @@ vfloat16m2_t test_vmv_v_v_f16m2(vfloat16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vmv_v_v_f16m4(vfloat16m4_t src, size_t vl) { - return vmv_v_v_f16m4(src, vl); + return __riscv_vmv_v_v_f16m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16m8( @@ -850,7 +850,7 @@ vfloat16m4_t test_vmv_v_v_f16m4(vfloat16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vmv_v_v_f16m8(vfloat16m8_t src, size_t vl) { - return vmv_v_v_f16m8(src, vl); + return __riscv_vmv_v_v_f16m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32mf2( @@ -859,7 +859,7 @@ vfloat16m8_t test_vmv_v_v_f16m8(vfloat16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vmv_v_v_f32mf2(vfloat32mf2_t src, size_t vl) { - return vmv_v_v_f32mf2(src, vl); + return __riscv_vmv_v_v_f32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32m1( @@ -868,7 +868,7 @@ vfloat32mf2_t test_vmv_v_v_f32mf2(vfloat32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vmv_v_v_f32m1(vfloat32m1_t src, size_t vl) { - return vmv_v_v_f32m1(src, vl); + return __riscv_vmv_v_v_f32m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32m2( @@ -877,7 +877,7 @@ vfloat32m1_t test_vmv_v_v_f32m1(vfloat32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vmv_v_v_f32m2(vfloat32m2_t src, size_t vl) { - return vmv_v_v_f32m2(src, vl); + return __riscv_vmv_v_v_f32m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32m4( @@ -886,7 +886,7 @@ vfloat32m2_t test_vmv_v_v_f32m2(vfloat32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vmv_v_v_f32m4(vfloat32m4_t src, size_t vl) { - return vmv_v_v_f32m4(src, vl); + return __riscv_vmv_v_v_f32m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32m8( @@ -895,7 +895,7 @@ vfloat32m4_t test_vmv_v_v_f32m4(vfloat32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vmv_v_v_f32m8(vfloat32m8_t src, size_t vl) { - return vmv_v_v_f32m8(src, vl); + return __riscv_vmv_v_v_f32m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f64m1( @@ -904,7 +904,7 @@ vfloat32m8_t test_vmv_v_v_f32m8(vfloat32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vmv_v_v_f64m1(vfloat64m1_t src, size_t vl) { - return vmv_v_v_f64m1(src, vl); + return __riscv_vmv_v_v_f64m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f64m2( @@ -913,7 +913,7 @@ vfloat64m1_t test_vmv_v_v_f64m1(vfloat64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vmv_v_v_f64m2(vfloat64m2_t src, size_t vl) { - return vmv_v_v_f64m2(src, vl); + return __riscv_vmv_v_v_f64m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f64m4( @@ -922,7 +922,7 @@ vfloat64m2_t test_vmv_v_v_f64m2(vfloat64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vmv_v_v_f64m4(vfloat64m4_t src, size_t vl) { - return vmv_v_v_f64m4(src, vl); + return __riscv_vmv_v_v_f64m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f64m8( @@ -931,7 +931,7 @@ vfloat64m4_t test_vmv_v_v_f64m4(vfloat64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vmv_v_v_f64m8(vfloat64m8_t src, size_t vl) { - return vmv_v_v_f64m8(src, vl); + return __riscv_vmv_v_v_f64m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i8mf8_i8( @@ -940,7 +940,7 @@ vfloat64m8_t test_vmv_v_v_f64m8(vfloat64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // int8_t test_vmv_x_s_i8mf8_i8(vint8mf8_t src) { - return vmv_x_s_i8mf8_i8(src); + return __riscv_vmv_x_s_i8mf8_i8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8mf8( @@ -949,7 +949,7 @@ int8_t test_vmv_x_s_i8mf8_i8(vint8mf8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmv_s_x_i8mf8(int8_t src, size_t vl) { - return vmv_s_x_i8mf8(src, vl); + return __riscv_vmv_s_x_i8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i8mf4_i8( @@ -958,7 +958,7 @@ vint8mf8_t test_vmv_s_x_i8mf8(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // int8_t test_vmv_x_s_i8mf4_i8(vint8mf4_t src) { - return vmv_x_s_i8mf4_i8(src); + return __riscv_vmv_x_s_i8mf4_i8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8mf4( @@ -967,7 +967,7 @@ int8_t test_vmv_x_s_i8mf4_i8(vint8mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmv_s_x_i8mf4(int8_t src, size_t vl) { - return vmv_s_x_i8mf4(src, vl); + return __riscv_vmv_s_x_i8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i8mf2_i8( @@ -976,7 +976,7 @@ vint8mf4_t test_vmv_s_x_i8mf4(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // int8_t test_vmv_x_s_i8mf2_i8(vint8mf2_t src) { - return vmv_x_s_i8mf2_i8(src); + return __riscv_vmv_x_s_i8mf2_i8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8mf2( @@ -985,7 +985,7 @@ int8_t test_vmv_x_s_i8mf2_i8(vint8mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmv_s_x_i8mf2(int8_t src, size_t vl) { - return vmv_s_x_i8mf2(src, vl); + return __riscv_vmv_s_x_i8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i8m1_i8( @@ -994,7 +994,7 @@ vint8mf2_t test_vmv_s_x_i8mf2(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // int8_t test_vmv_x_s_i8m1_i8(vint8m1_t src) { - return vmv_x_s_i8m1_i8(src); + return __riscv_vmv_x_s_i8m1_i8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8m1( @@ -1003,7 +1003,7 @@ int8_t test_vmv_x_s_i8m1_i8(vint8m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmv_s_x_i8m1(int8_t src, size_t vl) { - return vmv_s_x_i8m1(src, vl); + return __riscv_vmv_s_x_i8m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i8m2_i8( @@ -1012,7 +1012,7 @@ vint8m1_t test_vmv_s_x_i8m1(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // int8_t test_vmv_x_s_i8m2_i8(vint8m2_t src) { - return vmv_x_s_i8m2_i8(src); + return __riscv_vmv_x_s_i8m2_i8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8m2( @@ -1021,7 +1021,7 @@ int8_t test_vmv_x_s_i8m2_i8(vint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmv_s_x_i8m2(int8_t src, size_t vl) { - return vmv_s_x_i8m2(src, vl); + return __riscv_vmv_s_x_i8m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i8m4_i8( @@ -1030,7 +1030,7 @@ vint8m2_t test_vmv_s_x_i8m2(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // int8_t test_vmv_x_s_i8m4_i8(vint8m4_t src) { - return vmv_x_s_i8m4_i8(src); + return __riscv_vmv_x_s_i8m4_i8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8m4( @@ -1039,7 +1039,7 @@ int8_t test_vmv_x_s_i8m4_i8(vint8m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmv_s_x_i8m4(int8_t src, size_t vl) { - return vmv_s_x_i8m4(src, vl); + return __riscv_vmv_s_x_i8m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i8m8_i8( @@ -1048,7 +1048,7 @@ vint8m4_t test_vmv_s_x_i8m4(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // int8_t test_vmv_x_s_i8m8_i8(vint8m8_t src) { - return vmv_x_s_i8m8_i8(src); + return __riscv_vmv_x_s_i8m8_i8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8m8( @@ -1057,7 +1057,7 @@ int8_t test_vmv_x_s_i8m8_i8(vint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmv_s_x_i8m8(int8_t src, size_t vl) { - return vmv_s_x_i8m8(src, vl); + return __riscv_vmv_s_x_i8m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i16mf4_i16( @@ -1066,7 +1066,7 @@ vint8m8_t test_vmv_s_x_i8m8(int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // int16_t test_vmv_x_s_i16mf4_i16(vint16mf4_t src) { - return vmv_x_s_i16mf4_i16(src); + return __riscv_vmv_x_s_i16mf4_i16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16mf4( @@ -1075,7 +1075,7 @@ int16_t test_vmv_x_s_i16mf4_i16(vint16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmv_s_x_i16mf4(int16_t src, size_t vl) { - return vmv_s_x_i16mf4(src, vl); + return __riscv_vmv_s_x_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i16mf2_i16( @@ -1084,7 +1084,7 @@ vint16mf4_t test_vmv_s_x_i16mf4(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // int16_t test_vmv_x_s_i16mf2_i16(vint16mf2_t src) { - return vmv_x_s_i16mf2_i16(src); + return __riscv_vmv_x_s_i16mf2_i16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16mf2( @@ -1093,7 +1093,7 @@ int16_t test_vmv_x_s_i16mf2_i16(vint16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmv_s_x_i16mf2(int16_t src, size_t vl) { - return vmv_s_x_i16mf2(src, vl); + return __riscv_vmv_s_x_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i16m1_i16( @@ -1102,7 +1102,7 @@ vint16mf2_t test_vmv_s_x_i16mf2(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // int16_t test_vmv_x_s_i16m1_i16(vint16m1_t src) { - return vmv_x_s_i16m1_i16(src); + return __riscv_vmv_x_s_i16m1_i16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16m1( @@ -1111,7 +1111,7 @@ int16_t test_vmv_x_s_i16m1_i16(vint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmv_s_x_i16m1(int16_t src, size_t vl) { - return vmv_s_x_i16m1(src, vl); + return __riscv_vmv_s_x_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i16m2_i16( @@ -1120,7 +1120,7 @@ vint16m1_t test_vmv_s_x_i16m1(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // int16_t test_vmv_x_s_i16m2_i16(vint16m2_t src) { - return vmv_x_s_i16m2_i16(src); + return __riscv_vmv_x_s_i16m2_i16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16m2( @@ -1129,7 +1129,7 @@ int16_t test_vmv_x_s_i16m2_i16(vint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmv_s_x_i16m2(int16_t src, size_t vl) { - return vmv_s_x_i16m2(src, vl); + return __riscv_vmv_s_x_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i16m4_i16( @@ -1138,7 +1138,7 @@ vint16m2_t test_vmv_s_x_i16m2(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // int16_t test_vmv_x_s_i16m4_i16(vint16m4_t src) { - return vmv_x_s_i16m4_i16(src); + return __riscv_vmv_x_s_i16m4_i16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16m4( @@ -1147,7 +1147,7 @@ int16_t test_vmv_x_s_i16m4_i16(vint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmv_s_x_i16m4(int16_t src, size_t vl) { - return vmv_s_x_i16m4(src, vl); + return __riscv_vmv_s_x_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i16m8_i16( @@ -1156,7 +1156,7 @@ vint16m4_t test_vmv_s_x_i16m4(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // int16_t test_vmv_x_s_i16m8_i16(vint16m8_t src) { - return vmv_x_s_i16m8_i16(src); + return __riscv_vmv_x_s_i16m8_i16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16m8( @@ -1165,7 +1165,7 @@ int16_t test_vmv_x_s_i16m8_i16(vint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmv_s_x_i16m8(int16_t src, size_t vl) { - return vmv_s_x_i16m8(src, vl); + return __riscv_vmv_s_x_i16m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i32mf2_i32( @@ -1174,7 +1174,7 @@ vint16m8_t test_vmv_s_x_i16m8(int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // int32_t test_vmv_x_s_i32mf2_i32(vint32mf2_t src) { - return vmv_x_s_i32mf2_i32(src); + return __riscv_vmv_x_s_i32mf2_i32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32mf2( @@ -1183,7 +1183,7 @@ int32_t test_vmv_x_s_i32mf2_i32(vint32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmv_s_x_i32mf2(int32_t src, size_t vl) { - return vmv_s_x_i32mf2(src, vl); + return __riscv_vmv_s_x_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i32m1_i32( @@ -1192,7 +1192,7 @@ vint32mf2_t test_vmv_s_x_i32mf2(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // int32_t test_vmv_x_s_i32m1_i32(vint32m1_t src) { - return vmv_x_s_i32m1_i32(src); + return __riscv_vmv_x_s_i32m1_i32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32m1( @@ -1201,7 +1201,7 @@ int32_t test_vmv_x_s_i32m1_i32(vint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmv_s_x_i32m1(int32_t src, size_t vl) { - return vmv_s_x_i32m1(src, vl); + return __riscv_vmv_s_x_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i32m2_i32( @@ -1210,7 +1210,7 @@ vint32m1_t test_vmv_s_x_i32m1(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // int32_t test_vmv_x_s_i32m2_i32(vint32m2_t src) { - return vmv_x_s_i32m2_i32(src); + return __riscv_vmv_x_s_i32m2_i32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32m2( @@ -1219,7 +1219,7 @@ int32_t test_vmv_x_s_i32m2_i32(vint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmv_s_x_i32m2(int32_t src, size_t vl) { - return vmv_s_x_i32m2(src, vl); + return __riscv_vmv_s_x_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i32m4_i32( @@ -1228,7 +1228,7 @@ vint32m2_t test_vmv_s_x_i32m2(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // int32_t test_vmv_x_s_i32m4_i32(vint32m4_t src) { - return vmv_x_s_i32m4_i32(src); + return __riscv_vmv_x_s_i32m4_i32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32m4( @@ -1237,7 +1237,7 @@ int32_t test_vmv_x_s_i32m4_i32(vint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmv_s_x_i32m4(int32_t src, size_t vl) { - return vmv_s_x_i32m4(src, vl); + return __riscv_vmv_s_x_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i32m8_i32( @@ -1246,7 +1246,7 @@ vint32m4_t test_vmv_s_x_i32m4(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // int32_t test_vmv_x_s_i32m8_i32(vint32m8_t src) { - return vmv_x_s_i32m8_i32(src); + return __riscv_vmv_x_s_i32m8_i32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32m8( @@ -1255,7 +1255,7 @@ int32_t test_vmv_x_s_i32m8_i32(vint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmv_s_x_i32m8(int32_t src, size_t vl) { - return vmv_s_x_i32m8(src, vl); + return __riscv_vmv_s_x_i32m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i64m1_i64( @@ -1264,7 +1264,7 @@ vint32m8_t test_vmv_s_x_i32m8(int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // int64_t test_vmv_x_s_i64m1_i64(vint64m1_t src) { - return vmv_x_s_i64m1_i64(src); + return __riscv_vmv_x_s_i64m1_i64(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i64m1( @@ -1273,7 +1273,7 @@ int64_t test_vmv_x_s_i64m1_i64(vint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmv_s_x_i64m1(int64_t src, size_t vl) { - return vmv_s_x_i64m1(src, vl); + return __riscv_vmv_s_x_i64m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i64m2_i64( @@ -1282,7 +1282,7 @@ vint64m1_t test_vmv_s_x_i64m1(int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // int64_t test_vmv_x_s_i64m2_i64(vint64m2_t src) { - return vmv_x_s_i64m2_i64(src); + return __riscv_vmv_x_s_i64m2_i64(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i64m2( @@ -1291,7 +1291,7 @@ int64_t test_vmv_x_s_i64m2_i64(vint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmv_s_x_i64m2(int64_t src, size_t vl) { - return vmv_s_x_i64m2(src, vl); + return __riscv_vmv_s_x_i64m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i64m4_i64( @@ -1300,7 +1300,7 @@ vint64m2_t test_vmv_s_x_i64m2(int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // int64_t test_vmv_x_s_i64m4_i64(vint64m4_t src) { - return vmv_x_s_i64m4_i64(src); + return __riscv_vmv_x_s_i64m4_i64(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i64m4( @@ -1309,7 +1309,7 @@ int64_t test_vmv_x_s_i64m4_i64(vint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmv_s_x_i64m4(int64_t src, size_t vl) { - return vmv_s_x_i64m4(src, vl); + return __riscv_vmv_s_x_i64m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_i64m8_i64( @@ -1318,7 +1318,7 @@ vint64m4_t test_vmv_s_x_i64m4(int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // int64_t test_vmv_x_s_i64m8_i64(vint64m8_t src) { - return vmv_x_s_i64m8_i64(src); + return __riscv_vmv_x_s_i64m8_i64(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_i64m8( @@ -1327,7 +1327,7 @@ int64_t test_vmv_x_s_i64m8_i64(vint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmv_s_x_i64m8(int64_t src, size_t vl) { - return vmv_s_x_i64m8(src, vl); + return __riscv_vmv_s_x_i64m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u8mf8_u8( @@ -1336,7 +1336,7 @@ vint64m8_t test_vmv_s_x_i64m8(int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // uint8_t test_vmv_x_s_u8mf8_u8(vuint8mf8_t src) { - return vmv_x_s_u8mf8_u8(src); + return __riscv_vmv_x_s_u8mf8_u8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8mf8( @@ -1345,7 +1345,7 @@ uint8_t test_vmv_x_s_u8mf8_u8(vuint8mf8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmv_s_x_u8mf8(uint8_t src, size_t vl) { - return vmv_s_x_u8mf8(src, vl); + return __riscv_vmv_s_x_u8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u8mf4_u8( @@ -1354,7 +1354,7 @@ vuint8mf8_t test_vmv_s_x_u8mf8(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // uint8_t test_vmv_x_s_u8mf4_u8(vuint8mf4_t src) { - return vmv_x_s_u8mf4_u8(src); + return __riscv_vmv_x_s_u8mf4_u8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8mf4( @@ -1363,7 +1363,7 @@ uint8_t test_vmv_x_s_u8mf4_u8(vuint8mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmv_s_x_u8mf4(uint8_t src, size_t vl) { - return vmv_s_x_u8mf4(src, vl); + return __riscv_vmv_s_x_u8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u8mf2_u8( @@ -1372,7 +1372,7 @@ vuint8mf4_t test_vmv_s_x_u8mf4(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // uint8_t test_vmv_x_s_u8mf2_u8(vuint8mf2_t src) { - return vmv_x_s_u8mf2_u8(src); + return __riscv_vmv_x_s_u8mf2_u8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8mf2( @@ -1381,7 +1381,7 @@ uint8_t test_vmv_x_s_u8mf2_u8(vuint8mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmv_s_x_u8mf2(uint8_t src, size_t vl) { - return vmv_s_x_u8mf2(src, vl); + return __riscv_vmv_s_x_u8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u8m1_u8( @@ -1390,7 +1390,7 @@ vuint8mf2_t test_vmv_s_x_u8mf2(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // uint8_t test_vmv_x_s_u8m1_u8(vuint8m1_t src) { - return vmv_x_s_u8m1_u8(src); + return __riscv_vmv_x_s_u8m1_u8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8m1( @@ -1399,7 +1399,7 @@ uint8_t test_vmv_x_s_u8m1_u8(vuint8m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmv_s_x_u8m1(uint8_t src, size_t vl) { - return vmv_s_x_u8m1(src, vl); + return __riscv_vmv_s_x_u8m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u8m2_u8( @@ -1408,7 +1408,7 @@ vuint8m1_t test_vmv_s_x_u8m1(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // uint8_t test_vmv_x_s_u8m2_u8(vuint8m2_t src) { - return vmv_x_s_u8m2_u8(src); + return __riscv_vmv_x_s_u8m2_u8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8m2( @@ -1417,7 +1417,7 @@ uint8_t test_vmv_x_s_u8m2_u8(vuint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmv_s_x_u8m2(uint8_t src, size_t vl) { - return vmv_s_x_u8m2(src, vl); + return __riscv_vmv_s_x_u8m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u8m4_u8( @@ -1426,7 +1426,7 @@ vuint8m2_t test_vmv_s_x_u8m2(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // uint8_t test_vmv_x_s_u8m4_u8(vuint8m4_t src) { - return vmv_x_s_u8m4_u8(src); + return __riscv_vmv_x_s_u8m4_u8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8m4( @@ -1435,7 +1435,7 @@ uint8_t test_vmv_x_s_u8m4_u8(vuint8m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmv_s_x_u8m4(uint8_t src, size_t vl) { - return vmv_s_x_u8m4(src, vl); + return __riscv_vmv_s_x_u8m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u8m8_u8( @@ -1444,7 +1444,7 @@ vuint8m4_t test_vmv_s_x_u8m4(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i8 [[TMP0]] // uint8_t test_vmv_x_s_u8m8_u8(vuint8m8_t src) { - return vmv_x_s_u8m8_u8(src); + return __riscv_vmv_x_s_u8m8_u8(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8m8( @@ -1453,7 +1453,7 @@ uint8_t test_vmv_x_s_u8m8_u8(vuint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmv_s_x_u8m8(uint8_t src, size_t vl) { - return vmv_s_x_u8m8(src, vl); + return __riscv_vmv_s_x_u8m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u16mf4_u16( @@ -1462,7 +1462,7 @@ vuint8m8_t test_vmv_s_x_u8m8(uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // uint16_t test_vmv_x_s_u16mf4_u16(vuint16mf4_t src) { - return vmv_x_s_u16mf4_u16(src); + return __riscv_vmv_x_s_u16mf4_u16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16mf4( @@ -1471,7 +1471,7 @@ uint16_t test_vmv_x_s_u16mf4_u16(vuint16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmv_s_x_u16mf4(uint16_t src, size_t vl) { - return vmv_s_x_u16mf4(src, vl); + return __riscv_vmv_s_x_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u16mf2_u16( @@ -1480,7 +1480,7 @@ vuint16mf4_t test_vmv_s_x_u16mf4(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // uint16_t test_vmv_x_s_u16mf2_u16(vuint16mf2_t src) { - return vmv_x_s_u16mf2_u16(src); + return __riscv_vmv_x_s_u16mf2_u16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16mf2( @@ -1489,7 +1489,7 @@ uint16_t test_vmv_x_s_u16mf2_u16(vuint16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmv_s_x_u16mf2(uint16_t src, size_t vl) { - return vmv_s_x_u16mf2(src, vl); + return __riscv_vmv_s_x_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u16m1_u16( @@ -1498,7 +1498,7 @@ vuint16mf2_t test_vmv_s_x_u16mf2(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // uint16_t test_vmv_x_s_u16m1_u16(vuint16m1_t src) { - return vmv_x_s_u16m1_u16(src); + return __riscv_vmv_x_s_u16m1_u16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16m1( @@ -1507,7 +1507,7 @@ uint16_t test_vmv_x_s_u16m1_u16(vuint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmv_s_x_u16m1(uint16_t src, size_t vl) { - return vmv_s_x_u16m1(src, vl); + return __riscv_vmv_s_x_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u16m2_u16( @@ -1516,7 +1516,7 @@ vuint16m1_t test_vmv_s_x_u16m1(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // uint16_t test_vmv_x_s_u16m2_u16(vuint16m2_t src) { - return vmv_x_s_u16m2_u16(src); + return __riscv_vmv_x_s_u16m2_u16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16m2( @@ -1525,7 +1525,7 @@ uint16_t test_vmv_x_s_u16m2_u16(vuint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmv_s_x_u16m2(uint16_t src, size_t vl) { - return vmv_s_x_u16m2(src, vl); + return __riscv_vmv_s_x_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u16m4_u16( @@ -1534,7 +1534,7 @@ vuint16m2_t test_vmv_s_x_u16m2(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // uint16_t test_vmv_x_s_u16m4_u16(vuint16m4_t src) { - return vmv_x_s_u16m4_u16(src); + return __riscv_vmv_x_s_u16m4_u16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16m4( @@ -1543,7 +1543,7 @@ uint16_t test_vmv_x_s_u16m4_u16(vuint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmv_s_x_u16m4(uint16_t src, size_t vl) { - return vmv_s_x_u16m4(src, vl); + return __riscv_vmv_s_x_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u16m8_u16( @@ -1552,7 +1552,7 @@ vuint16m4_t test_vmv_s_x_u16m4(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i16 [[TMP0]] // uint16_t test_vmv_x_s_u16m8_u16(vuint16m8_t src) { - return vmv_x_s_u16m8_u16(src); + return __riscv_vmv_x_s_u16m8_u16(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16m8( @@ -1561,7 +1561,7 @@ uint16_t test_vmv_x_s_u16m8_u16(vuint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmv_s_x_u16m8(uint16_t src, size_t vl) { - return vmv_s_x_u16m8(src, vl); + return __riscv_vmv_s_x_u16m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u32mf2_u32( @@ -1570,7 +1570,7 @@ vuint16m8_t test_vmv_s_x_u16m8(uint16_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // uint32_t test_vmv_x_s_u32mf2_u32(vuint32mf2_t src) { - return vmv_x_s_u32mf2_u32(src); + return __riscv_vmv_x_s_u32mf2_u32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32mf2( @@ -1579,7 +1579,7 @@ uint32_t test_vmv_x_s_u32mf2_u32(vuint32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmv_s_x_u32mf2(uint32_t src, size_t vl) { - return vmv_s_x_u32mf2(src, vl); + return __riscv_vmv_s_x_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u32m1_u32( @@ -1588,7 +1588,7 @@ vuint32mf2_t test_vmv_s_x_u32mf2(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // uint32_t test_vmv_x_s_u32m1_u32(vuint32m1_t src) { - return vmv_x_s_u32m1_u32(src); + return __riscv_vmv_x_s_u32m1_u32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32m1( @@ -1597,7 +1597,7 @@ uint32_t test_vmv_x_s_u32m1_u32(vuint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmv_s_x_u32m1(uint32_t src, size_t vl) { - return vmv_s_x_u32m1(src, vl); + return __riscv_vmv_s_x_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u32m2_u32( @@ -1606,7 +1606,7 @@ vuint32m1_t test_vmv_s_x_u32m1(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // uint32_t test_vmv_x_s_u32m2_u32(vuint32m2_t src) { - return vmv_x_s_u32m2_u32(src); + return __riscv_vmv_x_s_u32m2_u32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32m2( @@ -1615,7 +1615,7 @@ uint32_t test_vmv_x_s_u32m2_u32(vuint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmv_s_x_u32m2(uint32_t src, size_t vl) { - return vmv_s_x_u32m2(src, vl); + return __riscv_vmv_s_x_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u32m4_u32( @@ -1624,7 +1624,7 @@ vuint32m2_t test_vmv_s_x_u32m2(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // uint32_t test_vmv_x_s_u32m4_u32(vuint32m4_t src) { - return vmv_x_s_u32m4_u32(src); + return __riscv_vmv_x_s_u32m4_u32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32m4( @@ -1633,7 +1633,7 @@ uint32_t test_vmv_x_s_u32m4_u32(vuint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmv_s_x_u32m4(uint32_t src, size_t vl) { - return vmv_s_x_u32m4(src, vl); + return __riscv_vmv_s_x_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u32m8_u32( @@ -1642,7 +1642,7 @@ vuint32m4_t test_vmv_s_x_u32m4(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i32 [[TMP0]] // uint32_t test_vmv_x_s_u32m8_u32(vuint32m8_t src) { - return vmv_x_s_u32m8_u32(src); + return __riscv_vmv_x_s_u32m8_u32(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32m8( @@ -1651,7 +1651,7 @@ uint32_t test_vmv_x_s_u32m8_u32(vuint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmv_s_x_u32m8(uint32_t src, size_t vl) { - return vmv_s_x_u32m8(src, vl); + return __riscv_vmv_s_x_u32m8(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u64m1_u64( @@ -1660,7 +1660,7 @@ vuint32m8_t test_vmv_s_x_u32m8(uint32_t src, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // uint64_t test_vmv_x_s_u64m1_u64(vuint64m1_t src) { - return vmv_x_s_u64m1_u64(src); + return __riscv_vmv_x_s_u64m1_u64(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u64m1( @@ -1669,7 +1669,7 @@ uint64_t test_vmv_x_s_u64m1_u64(vuint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmv_s_x_u64m1(uint64_t src, size_t vl) { - return vmv_s_x_u64m1(src, vl); + return __riscv_vmv_s_x_u64m1(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u64m2_u64( @@ -1678,7 +1678,7 @@ vuint64m1_t test_vmv_s_x_u64m1(uint64_t src, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // uint64_t test_vmv_x_s_u64m2_u64(vuint64m2_t src) { - return vmv_x_s_u64m2_u64(src); + return __riscv_vmv_x_s_u64m2_u64(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u64m2( @@ -1687,7 +1687,7 @@ uint64_t test_vmv_x_s_u64m2_u64(vuint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmv_s_x_u64m2(uint64_t src, size_t vl) { - return vmv_s_x_u64m2(src, vl); + return __riscv_vmv_s_x_u64m2(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u64m4_u64( @@ -1696,7 +1696,7 @@ vuint64m2_t test_vmv_s_x_u64m2(uint64_t src, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // uint64_t test_vmv_x_s_u64m4_u64(vuint64m4_t src) { - return vmv_x_s_u64m4_u64(src); + return __riscv_vmv_x_s_u64m4_u64(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u64m4( @@ -1705,7 +1705,7 @@ uint64_t test_vmv_x_s_u64m4_u64(vuint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmv_s_x_u64m4(uint64_t src, size_t vl) { - return vmv_s_x_u64m4(src, vl); + return __riscv_vmv_s_x_u64m4(src, vl); } // CHECK-RV64-LABEL: @test_vmv_x_s_u64m8_u64( @@ -1714,7 +1714,7 @@ vuint64m4_t test_vmv_s_x_u64m4(uint64_t src, size_t vl) { // CHECK-RV64-NEXT: ret i64 [[TMP0]] // uint64_t test_vmv_x_s_u64m8_u64(vuint64m8_t src) { - return vmv_x_s_u64m8_u64(src); + return __riscv_vmv_x_s_u64m8_u64(src); } // CHECK-RV64-LABEL: @test_vmv_s_x_u64m8( @@ -1723,6 +1723,6 @@ uint64_t test_vmv_x_s_u64m8_u64(vuint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmv_s_x_u64m8(uint64_t src, size_t vl) { - return vmv_s_x_u64m8(src, vl); + return __riscv_vmv_s_x_u64m8(src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmxnor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmxnor.c index 786433bc3c601b6e9fca6ee85802a877a7d343ce..2bd3ee15b01f9d8cdbbaac3482930109aa61e309 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmxnor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmxnor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmxnor_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { - return vmxnor_mm_b1(op1, op2, vl); + return __riscv_vmxnor_mm_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxnor_mm_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmxnor_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmxnor_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { - return vmxnor_mm_b2(op1, op2, vl); + return __riscv_vmxnor_mm_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxnor_mm_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmxnor_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmxnor_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { - return vmxnor_mm_b4(op1, op2, vl); + return __riscv_vmxnor_mm_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxnor_mm_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmxnor_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmxnor_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { - return vmxnor_mm_b8(op1, op2, vl); + return __riscv_vmxnor_mm_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxnor_mm_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmxnor_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmxnor_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { - return vmxnor_mm_b16(op1, op2, vl); + return __riscv_vmxnor_mm_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxnor_mm_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmxnor_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmxnor_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { - return vmxnor_mm_b32(op1, op2, vl); + return __riscv_vmxnor_mm_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxnor_mm_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmxnor_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmxnor_mm_b64(vbool64_t op1, vbool64_t op2, size_t vl) { - return vmxnor_mm_b64(op1, op2, vl); + return __riscv_vmxnor_mm_b64(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmxor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmxor.c index fd731402a61b6992381ae2d6cd1536d4224a2418..3073dd114338c2635244bded841933ea0eea80dc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmxor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vmxor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmxor_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { - return vmxor_mm_b1(op1, op2, vl); + return __riscv_vmxor_mm_b1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxor_mm_b2( @@ -21,7 +21,7 @@ vbool1_t test_vmxor_mm_b1(vbool1_t op1, vbool1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmxor_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { - return vmxor_mm_b2(op1, op2, vl); + return __riscv_vmxor_mm_b2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxor_mm_b4( @@ -30,7 +30,7 @@ vbool2_t test_vmxor_mm_b2(vbool2_t op1, vbool2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmxor_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { - return vmxor_mm_b4(op1, op2, vl); + return __riscv_vmxor_mm_b4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxor_mm_b8( @@ -39,7 +39,7 @@ vbool4_t test_vmxor_mm_b4(vbool4_t op1, vbool4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmxor_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { - return vmxor_mm_b8(op1, op2, vl); + return __riscv_vmxor_mm_b8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxor_mm_b16( @@ -48,7 +48,7 @@ vbool8_t test_vmxor_mm_b8(vbool8_t op1, vbool8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmxor_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { - return vmxor_mm_b16(op1, op2, vl); + return __riscv_vmxor_mm_b16(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxor_mm_b32( @@ -57,7 +57,7 @@ vbool16_t test_vmxor_mm_b16(vbool16_t op1, vbool16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmxor_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { - return vmxor_mm_b32(op1, op2, vl); + return __riscv_vmxor_mm_b32(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmxor_mm_b64( @@ -66,6 +66,6 @@ vbool32_t test_vmxor_mm_b32(vbool32_t op1, vbool32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmxor_mm_b64(vbool64_t op1, vbool64_t op2, size_t vl) { - return vmxor_mm_b64(op1, op2, vl); + return __riscv_vmxor_mm_b64(op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclip.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclip.c index 9fe8c7ba2da959b83fedaa2c70e60500fc54ecb9..a3ad33821b5e09506080aaa1f612d8ea8b885b60 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclip.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclip.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclip_wv_i8mf8(op1, shift, vl); + return __riscv_vnclip_wv_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vnclip_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf8(op1, shift, vl); + return __riscv_vnclip_wx_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vnclip_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclip_wv_i8mf4(op1, shift, vl); + return __riscv_vnclip_wv_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vnclip_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf4(op1, shift, vl); + return __riscv_vnclip_wx_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vnclip_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclip_wv_i8mf2(op1, shift, vl); + return __riscv_vnclip_wv_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vnclip_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf2(op1, shift, vl); + return __riscv_vnclip_wx_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vnclip_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclip_wv_i8m1(op1, shift, vl); + return __riscv_vnclip_wv_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vnclip_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m1(op1, shift, vl); + return __riscv_vnclip_wx_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vnclip_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclip_wv_i8m2(op1, shift, vl); + return __riscv_vnclip_wv_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vnclip_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m2(op1, shift, vl); + return __riscv_vnclip_wx_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vnclip_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wv_i8m4(vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclip_wv_i8m4(op1, shift, vl); + return __riscv_vnclip_wv_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vnclip_wv_i8m4(vint16m8_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wx_i8m4(vint16m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m4(op1, shift, vl); + return __riscv_vnclip_wx_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf4( @@ -120,7 +120,7 @@ vint8m4_t test_vnclip_wx_i8m4(vint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wv_i16mf4(vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclip_wv_i16mf4(op1, shift, vl); + return __riscv_vnclip_wv_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf4( @@ -129,7 +129,7 @@ vint16mf4_t test_vnclip_wv_i16mf4(vint32mf2_t op1, vuint16mf4_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wx_i16mf4(vint32mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf4(op1, shift, vl); + return __riscv_vnclip_wx_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf2( @@ -138,7 +138,7 @@ vint16mf4_t test_vnclip_wx_i16mf4(vint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wv_i16mf2(vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclip_wv_i16mf2(op1, shift, vl); + return __riscv_vnclip_wv_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf2( @@ -147,7 +147,7 @@ vint16mf2_t test_vnclip_wv_i16mf2(vint32m1_t op1, vuint16mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wx_i16mf2(vint32m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf2(op1, shift, vl); + return __riscv_vnclip_wx_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m1( @@ -156,7 +156,7 @@ vint16mf2_t test_vnclip_wx_i16mf2(vint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wv_i16m1(vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclip_wv_i16m1(op1, shift, vl); + return __riscv_vnclip_wv_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m1( @@ -165,7 +165,7 @@ vint16m1_t test_vnclip_wv_i16m1(vint32m2_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wx_i16m1(vint32m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m1(op1, shift, vl); + return __riscv_vnclip_wx_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m2( @@ -174,7 +174,7 @@ vint16m1_t test_vnclip_wx_i16m1(vint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wv_i16m2(vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclip_wv_i16m2(op1, shift, vl); + return __riscv_vnclip_wv_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m2( @@ -183,7 +183,7 @@ vint16m2_t test_vnclip_wv_i16m2(vint32m4_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wx_i16m2(vint32m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m2(op1, shift, vl); + return __riscv_vnclip_wx_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m4( @@ -192,7 +192,7 @@ vint16m2_t test_vnclip_wx_i16m2(vint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wv_i16m4(vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclip_wv_i16m4(op1, shift, vl); + return __riscv_vnclip_wv_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m4( @@ -201,7 +201,7 @@ vint16m4_t test_vnclip_wv_i16m4(vint32m8_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wx_i16m4(vint32m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m4(op1, shift, vl); + return __riscv_vnclip_wx_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32mf2( @@ -210,7 +210,7 @@ vint16m4_t test_vnclip_wx_i16m4(vint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wv_i32mf2(vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclip_wv_i32mf2(op1, shift, vl); + return __riscv_vnclip_wv_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32mf2( @@ -219,7 +219,7 @@ vint32mf2_t test_vnclip_wv_i32mf2(vint64m1_t op1, vuint32mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wx_i32mf2(vint64m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32mf2(op1, shift, vl); + return __riscv_vnclip_wx_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m1( @@ -228,7 +228,7 @@ vint32mf2_t test_vnclip_wx_i32mf2(vint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wv_i32m1(vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclip_wv_i32m1(op1, shift, vl); + return __riscv_vnclip_wv_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m1( @@ -237,7 +237,7 @@ vint32m1_t test_vnclip_wv_i32m1(vint64m2_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wx_i32m1(vint64m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m1(op1, shift, vl); + return __riscv_vnclip_wx_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m2( @@ -246,7 +246,7 @@ vint32m1_t test_vnclip_wx_i32m1(vint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wv_i32m2(vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclip_wv_i32m2(op1, shift, vl); + return __riscv_vnclip_wv_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m2( @@ -255,7 +255,7 @@ vint32m2_t test_vnclip_wv_i32m2(vint64m4_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wx_i32m2(vint64m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m2(op1, shift, vl); + return __riscv_vnclip_wx_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m4( @@ -264,7 +264,7 @@ vint32m2_t test_vnclip_wx_i32m2(vint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wv_i32m4(vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclip_wv_i32m4(op1, shift, vl); + return __riscv_vnclip_wv_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m4( @@ -273,7 +273,7 @@ vint32m4_t test_vnclip_wv_i32m4(vint64m8_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wx_i32m4(vint64m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m4(op1, shift, vl); + return __riscv_vnclip_wx_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf8_m( @@ -282,7 +282,7 @@ vint32m4_t test_vnclip_wx_i32m4(vint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wv_i8mf8_m(vbool64_t mask, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclip_wv_i8mf8_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf8_m( @@ -291,7 +291,7 @@ vint8mf8_t test_vnclip_wv_i8mf8_m(vbool64_t mask, vint16mf4_t op1, vuint8mf8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wx_i8mf8_m(vbool64_t mask, vint16mf4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf8_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf4_m( @@ -300,7 +300,7 @@ vint8mf8_t test_vnclip_wx_i8mf8_m(vbool64_t mask, vint16mf4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wv_i8mf4_m(vbool32_t mask, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclip_wv_i8mf4_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf4_m( @@ -309,7 +309,7 @@ vint8mf4_t test_vnclip_wv_i8mf4_m(vbool32_t mask, vint16mf2_t op1, vuint8mf4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wx_i8mf4_m(vbool32_t mask, vint16mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf4_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf2_m( @@ -318,7 +318,7 @@ vint8mf4_t test_vnclip_wx_i8mf4_m(vbool32_t mask, vint16mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wv_i8mf2_m(vbool16_t mask, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclip_wv_i8mf2_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf2_m( @@ -327,7 +327,7 @@ vint8mf2_t test_vnclip_wv_i8mf2_m(vbool16_t mask, vint16m1_t op1, vuint8mf2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wx_i8mf2_m(vbool16_t mask, vint16m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf2_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m1_m( @@ -336,7 +336,7 @@ vint8mf2_t test_vnclip_wx_i8mf2_m(vbool16_t mask, vint16m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wv_i8m1_m(vbool8_t mask, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclip_wv_i8m1_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m1_m( @@ -345,7 +345,7 @@ vint8m1_t test_vnclip_wv_i8m1_m(vbool8_t mask, vint16m2_t op1, vuint8m1_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wx_i8m1_m(vbool8_t mask, vint16m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m1_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m2_m( @@ -354,7 +354,7 @@ vint8m1_t test_vnclip_wx_i8m1_m(vbool8_t mask, vint16m2_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wv_i8m2_m(vbool4_t mask, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclip_wv_i8m2_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m2_m( @@ -363,7 +363,7 @@ vint8m2_t test_vnclip_wv_i8m2_m(vbool4_t mask, vint16m4_t op1, vuint8m2_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wx_i8m2_m(vbool4_t mask, vint16m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m2_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m4_m( @@ -372,7 +372,7 @@ vint8m2_t test_vnclip_wx_i8m2_m(vbool4_t mask, vint16m4_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wv_i8m4_m(vbool2_t mask, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclip_wv_i8m4_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m4_m( @@ -381,7 +381,7 @@ vint8m4_t test_vnclip_wv_i8m4_m(vbool2_t mask, vint16m8_t op1, vuint8m4_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wx_i8m4_m(vbool2_t mask, vint16m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m4_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf4_m( @@ -390,7 +390,7 @@ vint8m4_t test_vnclip_wx_i8m4_m(vbool2_t mask, vint16m8_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wv_i16mf4_m(vbool64_t mask, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclip_wv_i16mf4_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf4_m( @@ -399,7 +399,7 @@ vint16mf4_t test_vnclip_wv_i16mf4_m(vbool64_t mask, vint32mf2_t op1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wx_i16mf4_m(vbool64_t mask, vint32mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf4_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf2_m( @@ -408,7 +408,7 @@ vint16mf4_t test_vnclip_wx_i16mf4_m(vbool64_t mask, vint32mf2_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wv_i16mf2_m(vbool32_t mask, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclip_wv_i16mf2_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf2_m( @@ -417,7 +417,7 @@ vint16mf2_t test_vnclip_wv_i16mf2_m(vbool32_t mask, vint32m1_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wx_i16mf2_m(vbool32_t mask, vint32m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf2_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m1_m( @@ -426,7 +426,7 @@ vint16mf2_t test_vnclip_wx_i16mf2_m(vbool32_t mask, vint32m1_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wv_i16m1_m(vbool16_t mask, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclip_wv_i16m1_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m1_m( @@ -435,7 +435,7 @@ vint16m1_t test_vnclip_wv_i16m1_m(vbool16_t mask, vint32m2_t op1, vuint16m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wx_i16m1_m(vbool16_t mask, vint32m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m1_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m2_m( @@ -444,7 +444,7 @@ vint16m1_t test_vnclip_wx_i16m1_m(vbool16_t mask, vint32m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wv_i16m2_m(vbool8_t mask, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclip_wv_i16m2_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m2_m( @@ -453,7 +453,7 @@ vint16m2_t test_vnclip_wv_i16m2_m(vbool8_t mask, vint32m4_t op1, vuint16m2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wx_i16m2_m(vbool8_t mask, vint32m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m2_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m4_m( @@ -462,7 +462,7 @@ vint16m2_t test_vnclip_wx_i16m2_m(vbool8_t mask, vint32m4_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wv_i16m4_m(vbool4_t mask, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclip_wv_i16m4_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m4_m( @@ -471,7 +471,7 @@ vint16m4_t test_vnclip_wv_i16m4_m(vbool4_t mask, vint32m8_t op1, vuint16m4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wx_i16m4_m(vbool4_t mask, vint32m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m4_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32mf2_m( @@ -480,7 +480,7 @@ vint16m4_t test_vnclip_wx_i16m4_m(vbool4_t mask, vint32m8_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wv_i32mf2_m(vbool64_t mask, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclip_wv_i32mf2_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32mf2_m( @@ -489,7 +489,7 @@ vint32mf2_t test_vnclip_wv_i32mf2_m(vbool64_t mask, vint64m1_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wx_i32mf2_m(vbool64_t mask, vint64m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32mf2_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m1_m( @@ -498,7 +498,7 @@ vint32mf2_t test_vnclip_wx_i32mf2_m(vbool64_t mask, vint64m1_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wv_i32m1_m(vbool32_t mask, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclip_wv_i32m1_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m1_m( @@ -507,7 +507,7 @@ vint32m1_t test_vnclip_wv_i32m1_m(vbool32_t mask, vint64m2_t op1, vuint32m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wx_i32m1_m(vbool32_t mask, vint64m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m1_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m2_m( @@ -516,7 +516,7 @@ vint32m1_t test_vnclip_wx_i32m1_m(vbool32_t mask, vint64m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wv_i32m2_m(vbool16_t mask, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclip_wv_i32m2_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m2_m( @@ -525,7 +525,7 @@ vint32m2_t test_vnclip_wv_i32m2_m(vbool16_t mask, vint64m4_t op1, vuint32m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wx_i32m2_m(vbool16_t mask, vint64m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m2_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m4_m( @@ -534,7 +534,7 @@ vint32m2_t test_vnclip_wx_i32m2_m(vbool16_t mask, vint64m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wv_i32m4_m(vbool8_t mask, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclip_wv_i32m4_m(mask, op1, shift, vl); + return __riscv_vnclip_wv_i32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m4_m( @@ -543,6 +543,6 @@ vint32m4_t test_vnclip_wv_i32m4_m(vbool8_t mask, vint64m8_t op1, vuint32m4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wx_i32m4_m(vbool8_t mask, vint64m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m4_m(mask, op1, shift, vl); + return __riscv_vnclip_wx_i32m4_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclipu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclipu.c index a7d8522b84fd11b3a150991c76ea88050b185c35..937cb0047493b7316c805c3ab91c460c977154df 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclipu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclipu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclipu_wv_u8mf8(op1, shift, vl); + return __riscv_vnclipu_wv_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vnclipu_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf8(op1, shift, vl); + return __riscv_vnclipu_wx_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vnclipu_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclipu_wv_u8mf4(op1, shift, vl); + return __riscv_vnclipu_wv_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vnclipu_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf4(op1, shift, vl); + return __riscv_vnclipu_wx_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vnclipu_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclipu_wv_u8mf2(op1, shift, vl); + return __riscv_vnclipu_wv_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vnclipu_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf2(op1, shift, vl); + return __riscv_vnclipu_wx_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vnclipu_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclipu_wv_u8m1(op1, shift, vl); + return __riscv_vnclipu_wv_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vnclipu_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m1(op1, shift, vl); + return __riscv_vnclipu_wx_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vnclipu_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclipu_wv_u8m2(op1, shift, vl); + return __riscv_vnclipu_wv_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vnclipu_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m2(op1, shift, vl); + return __riscv_vnclipu_wx_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vnclipu_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wv_u8m4(vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclipu_wv_u8m4(op1, shift, vl); + return __riscv_vnclipu_wv_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vnclipu_wv_u8m4(vuint16m8_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wx_u8m4(vuint16m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m4(op1, shift, vl); + return __riscv_vnclipu_wx_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf4( @@ -120,7 +120,7 @@ vuint8m4_t test_vnclipu_wx_u8m4(vuint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wv_u16mf4(vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclipu_wv_u16mf4(op1, shift, vl); + return __riscv_vnclipu_wv_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf4( @@ -129,7 +129,7 @@ vuint16mf4_t test_vnclipu_wv_u16mf4(vuint32mf2_t op1, vuint16mf4_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wx_u16mf4(vuint32mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf4(op1, shift, vl); + return __riscv_vnclipu_wx_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf2( @@ -138,7 +138,7 @@ vuint16mf4_t test_vnclipu_wx_u16mf4(vuint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wv_u16mf2(vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclipu_wv_u16mf2(op1, shift, vl); + return __riscv_vnclipu_wv_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf2( @@ -147,7 +147,7 @@ vuint16mf2_t test_vnclipu_wv_u16mf2(vuint32m1_t op1, vuint16mf2_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wx_u16mf2(vuint32m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf2(op1, shift, vl); + return __riscv_vnclipu_wx_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m1( @@ -156,7 +156,7 @@ vuint16mf2_t test_vnclipu_wx_u16mf2(vuint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wv_u16m1(vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclipu_wv_u16m1(op1, shift, vl); + return __riscv_vnclipu_wv_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m1( @@ -165,7 +165,7 @@ vuint16m1_t test_vnclipu_wv_u16m1(vuint32m2_t op1, vuint16m1_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wx_u16m1(vuint32m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m1(op1, shift, vl); + return __riscv_vnclipu_wx_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m2( @@ -174,7 +174,7 @@ vuint16m1_t test_vnclipu_wx_u16m1(vuint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wv_u16m2(vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclipu_wv_u16m2(op1, shift, vl); + return __riscv_vnclipu_wv_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m2( @@ -183,7 +183,7 @@ vuint16m2_t test_vnclipu_wv_u16m2(vuint32m4_t op1, vuint16m2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wx_u16m2(vuint32m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m2(op1, shift, vl); + return __riscv_vnclipu_wx_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m4( @@ -192,7 +192,7 @@ vuint16m2_t test_vnclipu_wx_u16m2(vuint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wv_u16m4(vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclipu_wv_u16m4(op1, shift, vl); + return __riscv_vnclipu_wv_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m4( @@ -201,7 +201,7 @@ vuint16m4_t test_vnclipu_wv_u16m4(vuint32m8_t op1, vuint16m4_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wx_u16m4(vuint32m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m4(op1, shift, vl); + return __riscv_vnclipu_wx_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32mf2( @@ -210,7 +210,7 @@ vuint16m4_t test_vnclipu_wx_u16m4(vuint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wv_u32mf2(vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclipu_wv_u32mf2(op1, shift, vl); + return __riscv_vnclipu_wv_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32mf2( @@ -219,7 +219,7 @@ vuint32mf2_t test_vnclipu_wv_u32mf2(vuint64m1_t op1, vuint32mf2_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wx_u32mf2(vuint64m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32mf2(op1, shift, vl); + return __riscv_vnclipu_wx_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m1( @@ -228,7 +228,7 @@ vuint32mf2_t test_vnclipu_wx_u32mf2(vuint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wv_u32m1(vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclipu_wv_u32m1(op1, shift, vl); + return __riscv_vnclipu_wv_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m1( @@ -237,7 +237,7 @@ vuint32m1_t test_vnclipu_wv_u32m1(vuint64m2_t op1, vuint32m1_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wx_u32m1(vuint64m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m1(op1, shift, vl); + return __riscv_vnclipu_wx_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m2( @@ -246,7 +246,7 @@ vuint32m1_t test_vnclipu_wx_u32m1(vuint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wv_u32m2(vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclipu_wv_u32m2(op1, shift, vl); + return __riscv_vnclipu_wv_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m2( @@ -255,7 +255,7 @@ vuint32m2_t test_vnclipu_wv_u32m2(vuint64m4_t op1, vuint32m2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wx_u32m2(vuint64m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m2(op1, shift, vl); + return __riscv_vnclipu_wx_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m4( @@ -264,7 +264,7 @@ vuint32m2_t test_vnclipu_wx_u32m2(vuint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wv_u32m4(vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclipu_wv_u32m4(op1, shift, vl); + return __riscv_vnclipu_wv_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m4( @@ -273,7 +273,7 @@ vuint32m4_t test_vnclipu_wv_u32m4(vuint64m8_t op1, vuint32m4_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wx_u32m4(vuint64m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m4(op1, shift, vl); + return __riscv_vnclipu_wx_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf8_m( @@ -282,7 +282,7 @@ vuint32m4_t test_vnclipu_wx_u32m4(vuint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wv_u8mf8_m(vbool64_t mask, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclipu_wv_u8mf8_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf8_m( @@ -291,7 +291,7 @@ vuint8mf8_t test_vnclipu_wv_u8mf8_m(vbool64_t mask, vuint16mf4_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wx_u8mf8_m(vbool64_t mask, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf8_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf4_m( @@ -300,7 +300,7 @@ vuint8mf8_t test_vnclipu_wx_u8mf8_m(vbool64_t mask, vuint16mf4_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wv_u8mf4_m(vbool32_t mask, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclipu_wv_u8mf4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf4_m( @@ -309,7 +309,7 @@ vuint8mf4_t test_vnclipu_wv_u8mf4_m(vbool32_t mask, vuint16mf2_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wx_u8mf4_m(vbool32_t mask, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf2_m( @@ -318,7 +318,7 @@ vuint8mf4_t test_vnclipu_wx_u8mf4_m(vbool32_t mask, vuint16mf2_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wv_u8mf2_m(vbool16_t mask, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclipu_wv_u8mf2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf2_m( @@ -327,7 +327,7 @@ vuint8mf2_t test_vnclipu_wv_u8mf2_m(vbool16_t mask, vuint16m1_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wx_u8mf2_m(vbool16_t mask, vuint16m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m1_m( @@ -336,7 +336,7 @@ vuint8mf2_t test_vnclipu_wx_u8mf2_m(vbool16_t mask, vuint16m1_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wv_u8m1_m(vbool8_t mask, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclipu_wv_u8m1_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m1_m( @@ -345,7 +345,7 @@ vuint8m1_t test_vnclipu_wv_u8m1_m(vbool8_t mask, vuint16m2_t op1, vuint8m1_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wx_u8m1_m(vbool8_t mask, vuint16m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m1_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m2_m( @@ -354,7 +354,7 @@ vuint8m1_t test_vnclipu_wx_u8m1_m(vbool8_t mask, vuint16m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wv_u8m2_m(vbool4_t mask, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclipu_wv_u8m2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m2_m( @@ -363,7 +363,7 @@ vuint8m2_t test_vnclipu_wv_u8m2_m(vbool4_t mask, vuint16m4_t op1, vuint8m2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wx_u8m2_m(vbool4_t mask, vuint16m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m4_m( @@ -372,7 +372,7 @@ vuint8m2_t test_vnclipu_wx_u8m2_m(vbool4_t mask, vuint16m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wv_u8m4_m(vbool2_t mask, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclipu_wv_u8m4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m4_m( @@ -381,7 +381,7 @@ vuint8m4_t test_vnclipu_wv_u8m4_m(vbool2_t mask, vuint16m8_t op1, vuint8m4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wx_u8m4_m(vbool2_t mask, vuint16m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf4_m( @@ -390,7 +390,7 @@ vuint8m4_t test_vnclipu_wx_u8m4_m(vbool2_t mask, vuint16m8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wv_u16mf4_m(vbool64_t mask, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclipu_wv_u16mf4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf4_m( @@ -399,7 +399,7 @@ vuint16mf4_t test_vnclipu_wv_u16mf4_m(vbool64_t mask, vuint32mf2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wx_u16mf4_m(vbool64_t mask, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf2_m( @@ -408,7 +408,7 @@ vuint16mf4_t test_vnclipu_wx_u16mf4_m(vbool64_t mask, vuint32mf2_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wv_u16mf2_m(vbool32_t mask, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclipu_wv_u16mf2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf2_m( @@ -417,7 +417,7 @@ vuint16mf2_t test_vnclipu_wv_u16mf2_m(vbool32_t mask, vuint32m1_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wx_u16mf2_m(vbool32_t mask, vuint32m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m1_m( @@ -426,7 +426,7 @@ vuint16mf2_t test_vnclipu_wx_u16mf2_m(vbool32_t mask, vuint32m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wv_u16m1_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclipu_wv_u16m1_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m1_m( @@ -435,7 +435,7 @@ vuint16m1_t test_vnclipu_wv_u16m1_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wx_u16m1_m(vbool16_t mask, vuint32m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m1_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m2_m( @@ -444,7 +444,7 @@ vuint16m1_t test_vnclipu_wx_u16m1_m(vbool16_t mask, vuint32m2_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wv_u16m2_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclipu_wv_u16m2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m2_m( @@ -453,7 +453,7 @@ vuint16m2_t test_vnclipu_wv_u16m2_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wx_u16m2_m(vbool8_t mask, vuint32m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m4_m( @@ -462,7 +462,7 @@ vuint16m2_t test_vnclipu_wx_u16m2_m(vbool8_t mask, vuint32m4_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wv_u16m4_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclipu_wv_u16m4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m4_m( @@ -471,7 +471,7 @@ vuint16m4_t test_vnclipu_wv_u16m4_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wx_u16m4_m(vbool4_t mask, vuint32m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32mf2_m( @@ -480,7 +480,7 @@ vuint16m4_t test_vnclipu_wx_u16m4_m(vbool4_t mask, vuint32m8_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wv_u32mf2_m(vbool64_t mask, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclipu_wv_u32mf2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32mf2_m( @@ -489,7 +489,7 @@ vuint32mf2_t test_vnclipu_wv_u32mf2_m(vbool64_t mask, vuint64m1_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wx_u32mf2_m(vbool64_t mask, vuint64m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32mf2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m1_m( @@ -498,7 +498,7 @@ vuint32mf2_t test_vnclipu_wx_u32mf2_m(vbool64_t mask, vuint64m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wv_u32m1_m(vbool32_t mask, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclipu_wv_u32m1_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m1_m( @@ -507,7 +507,7 @@ vuint32m1_t test_vnclipu_wv_u32m1_m(vbool32_t mask, vuint64m2_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wx_u32m1_m(vbool32_t mask, vuint64m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m1_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m2_m( @@ -516,7 +516,7 @@ vuint32m1_t test_vnclipu_wx_u32m1_m(vbool32_t mask, vuint64m2_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wv_u32m2_m(vbool16_t mask, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclipu_wv_u32m2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m2_m( @@ -525,7 +525,7 @@ vuint32m2_t test_vnclipu_wv_u32m2_m(vbool16_t mask, vuint64m4_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wx_u32m2_m(vbool16_t mask, vuint64m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m2_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m4_m( @@ -534,7 +534,7 @@ vuint32m2_t test_vnclipu_wx_u32m2_m(vbool16_t mask, vuint64m4_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wv_u32m4_m(vbool8_t mask, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclipu_wv_u32m4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wv_u32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m4_m( @@ -543,6 +543,6 @@ vuint32m4_t test_vnclipu_wv_u32m4_m(vbool8_t mask, vuint64m8_t op1, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wx_u32m4_m(vbool8_t mask, vuint64m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m4_m(mask, op1, shift, vl); + return __riscv_vnclipu_wx_u32m4_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vncvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vncvt.c index e29c4c6d1d4bafa5e05a5f8f6ab98fbf72dfddc8..825369b165a46e408255851811a97e1716c0614e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vncvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vncvt.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vncvt_x_x_w_i8mf8(vint16mf4_t src, size_t vl) { - return vncvt_x_x_w_i8mf8(src, vl); + return __riscv_vncvt_x_x_w_i8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf4( @@ -21,7 +21,7 @@ vint8mf8_t test_vncvt_x_x_w_i8mf8(vint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vncvt_x_x_w_i8mf4(vint16mf2_t src, size_t vl) { - return vncvt_x_x_w_i8mf4(src, vl); + return __riscv_vncvt_x_x_w_i8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf2( @@ -30,7 +30,7 @@ vint8mf4_t test_vncvt_x_x_w_i8mf4(vint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vncvt_x_x_w_i8mf2(vint16m1_t src, size_t vl) { - return vncvt_x_x_w_i8mf2(src, vl); + return __riscv_vncvt_x_x_w_i8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m1( @@ -39,7 +39,7 @@ vint8mf2_t test_vncvt_x_x_w_i8mf2(vint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vncvt_x_x_w_i8m1(vint16m2_t src, size_t vl) { - return vncvt_x_x_w_i8m1(src, vl); + return __riscv_vncvt_x_x_w_i8m1(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m2( @@ -48,7 +48,7 @@ vint8m1_t test_vncvt_x_x_w_i8m1(vint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vncvt_x_x_w_i8m2(vint16m4_t src, size_t vl) { - return vncvt_x_x_w_i8m2(src, vl); + return __riscv_vncvt_x_x_w_i8m2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m4( @@ -57,7 +57,7 @@ vint8m2_t test_vncvt_x_x_w_i8m2(vint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vncvt_x_x_w_i8m4(vint16m8_t src, size_t vl) { - return vncvt_x_x_w_i8m4(src, vl); + return __riscv_vncvt_x_x_w_i8m4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf8( @@ -66,7 +66,7 @@ vint8m4_t test_vncvt_x_x_w_i8m4(vint16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vncvt_x_x_w_u8mf8(vuint16mf4_t src, size_t vl) { - return vncvt_x_x_w_u8mf8(src, vl); + return __riscv_vncvt_x_x_w_u8mf8(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf4( @@ -75,7 +75,7 @@ vuint8mf8_t test_vncvt_x_x_w_u8mf8(vuint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vncvt_x_x_w_u8mf4(vuint16mf2_t src, size_t vl) { - return vncvt_x_x_w_u8mf4(src, vl); + return __riscv_vncvt_x_x_w_u8mf4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf2( @@ -84,7 +84,7 @@ vuint8mf4_t test_vncvt_x_x_w_u8mf4(vuint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vncvt_x_x_w_u8mf2(vuint16m1_t src, size_t vl) { - return vncvt_x_x_w_u8mf2(src, vl); + return __riscv_vncvt_x_x_w_u8mf2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m1( @@ -93,7 +93,7 @@ vuint8mf2_t test_vncvt_x_x_w_u8mf2(vuint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vncvt_x_x_w_u8m1(vuint16m2_t src, size_t vl) { - return vncvt_x_x_w_u8m1(src, vl); + return __riscv_vncvt_x_x_w_u8m1(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m2( @@ -102,7 +102,7 @@ vuint8m1_t test_vncvt_x_x_w_u8m1(vuint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vncvt_x_x_w_u8m2(vuint16m4_t src, size_t vl) { - return vncvt_x_x_w_u8m2(src, vl); + return __riscv_vncvt_x_x_w_u8m2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m4( @@ -111,7 +111,7 @@ vuint8m2_t test_vncvt_x_x_w_u8m2(vuint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vncvt_x_x_w_u8m4(vuint16m8_t src, size_t vl) { - return vncvt_x_x_w_u8m4(src, vl); + return __riscv_vncvt_x_x_w_u8m4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf4( @@ -120,7 +120,7 @@ vuint8m4_t test_vncvt_x_x_w_u8m4(vuint16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vncvt_x_x_w_i16mf4(vint32mf2_t src, size_t vl) { - return vncvt_x_x_w_i16mf4(src, vl); + return __riscv_vncvt_x_x_w_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf2( @@ -129,7 +129,7 @@ vint16mf4_t test_vncvt_x_x_w_i16mf4(vint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vncvt_x_x_w_i16mf2(vint32m1_t src, size_t vl) { - return vncvt_x_x_w_i16mf2(src, vl); + return __riscv_vncvt_x_x_w_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m1( @@ -138,7 +138,7 @@ vint16mf2_t test_vncvt_x_x_w_i16mf2(vint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vncvt_x_x_w_i16m1(vint32m2_t src, size_t vl) { - return vncvt_x_x_w_i16m1(src, vl); + return __riscv_vncvt_x_x_w_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m2( @@ -147,7 +147,7 @@ vint16m1_t test_vncvt_x_x_w_i16m1(vint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vncvt_x_x_w_i16m2(vint32m4_t src, size_t vl) { - return vncvt_x_x_w_i16m2(src, vl); + return __riscv_vncvt_x_x_w_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m4( @@ -156,7 +156,7 @@ vint16m2_t test_vncvt_x_x_w_i16m2(vint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vncvt_x_x_w_i16m4(vint32m8_t src, size_t vl) { - return vncvt_x_x_w_i16m4(src, vl); + return __riscv_vncvt_x_x_w_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf4( @@ -165,7 +165,7 @@ vint16m4_t test_vncvt_x_x_w_i16m4(vint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vncvt_x_x_w_u16mf4(vuint32mf2_t src, size_t vl) { - return vncvt_x_x_w_u16mf4(src, vl); + return __riscv_vncvt_x_x_w_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf2( @@ -174,7 +174,7 @@ vuint16mf4_t test_vncvt_x_x_w_u16mf4(vuint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vncvt_x_x_w_u16mf2(vuint32m1_t src, size_t vl) { - return vncvt_x_x_w_u16mf2(src, vl); + return __riscv_vncvt_x_x_w_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m1( @@ -183,7 +183,7 @@ vuint16mf2_t test_vncvt_x_x_w_u16mf2(vuint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vncvt_x_x_w_u16m1(vuint32m2_t src, size_t vl) { - return vncvt_x_x_w_u16m1(src, vl); + return __riscv_vncvt_x_x_w_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vncvt_x_x_w_u16m1(vuint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vncvt_x_x_w_u16m2(vuint32m4_t src, size_t vl) { - return vncvt_x_x_w_u16m2(src, vl); + return __riscv_vncvt_x_x_w_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m4( @@ -201,7 +201,7 @@ vuint16m2_t test_vncvt_x_x_w_u16m2(vuint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vncvt_x_x_w_u16m4(vuint32m8_t src, size_t vl) { - return vncvt_x_x_w_u16m4(src, vl); + return __riscv_vncvt_x_x_w_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32mf2( @@ -210,7 +210,7 @@ vuint16m4_t test_vncvt_x_x_w_u16m4(vuint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vncvt_x_x_w_i32mf2(vint64m1_t src, size_t vl) { - return vncvt_x_x_w_i32mf2(src, vl); + return __riscv_vncvt_x_x_w_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m1( @@ -219,7 +219,7 @@ vint32mf2_t test_vncvt_x_x_w_i32mf2(vint64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vncvt_x_x_w_i32m1(vint64m2_t src, size_t vl) { - return vncvt_x_x_w_i32m1(src, vl); + return __riscv_vncvt_x_x_w_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m2( @@ -228,7 +228,7 @@ vint32m1_t test_vncvt_x_x_w_i32m1(vint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vncvt_x_x_w_i32m2(vint64m4_t src, size_t vl) { - return vncvt_x_x_w_i32m2(src, vl); + return __riscv_vncvt_x_x_w_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m4( @@ -237,7 +237,7 @@ vint32m2_t test_vncvt_x_x_w_i32m2(vint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vncvt_x_x_w_i32m4(vint64m8_t src, size_t vl) { - return vncvt_x_x_w_i32m4(src, vl); + return __riscv_vncvt_x_x_w_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32mf2( @@ -246,7 +246,7 @@ vint32m4_t test_vncvt_x_x_w_i32m4(vint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vncvt_x_x_w_u32mf2(vuint64m1_t src, size_t vl) { - return vncvt_x_x_w_u32mf2(src, vl); + return __riscv_vncvt_x_x_w_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m1( @@ -255,7 +255,7 @@ vuint32mf2_t test_vncvt_x_x_w_u32mf2(vuint64m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vncvt_x_x_w_u32m1(vuint64m2_t src, size_t vl) { - return vncvt_x_x_w_u32m1(src, vl); + return __riscv_vncvt_x_x_w_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m2( @@ -264,7 +264,7 @@ vuint32m1_t test_vncvt_x_x_w_u32m1(vuint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vncvt_x_x_w_u32m2(vuint64m4_t src, size_t vl) { - return vncvt_x_x_w_u32m2(src, vl); + return __riscv_vncvt_x_x_w_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m4( @@ -273,7 +273,7 @@ vuint32m2_t test_vncvt_x_x_w_u32m2(vuint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vncvt_x_x_w_u32m4(vuint64m8_t src, size_t vl) { - return vncvt_x_x_w_u32m4(src, vl); + return __riscv_vncvt_x_x_w_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf8_m( @@ -282,7 +282,7 @@ vuint32m4_t test_vncvt_x_x_w_u32m4(vuint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vncvt_x_x_w_i8mf8_m(vbool64_t mask, vint16mf4_t src, size_t vl) { - return vncvt_x_x_w_i8mf8_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i8mf8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf4_m( @@ -291,7 +291,7 @@ vint8mf8_t test_vncvt_x_x_w_i8mf8_m(vbool64_t mask, vint16mf4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vncvt_x_x_w_i8mf4_m(vbool32_t mask, vint16mf2_t src, size_t vl) { - return vncvt_x_x_w_i8mf4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i8mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf2_m( @@ -300,7 +300,7 @@ vint8mf4_t test_vncvt_x_x_w_i8mf4_m(vbool32_t mask, vint16mf2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vncvt_x_x_w_i8mf2_m(vbool16_t mask, vint16m1_t src, size_t vl) { - return vncvt_x_x_w_i8mf2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i8mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m1_m( @@ -309,7 +309,7 @@ vint8mf2_t test_vncvt_x_x_w_i8mf2_m(vbool16_t mask, vint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vncvt_x_x_w_i8m1_m(vbool8_t mask, vint16m2_t src, size_t vl) { - return vncvt_x_x_w_i8m1_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i8m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m2_m( @@ -318,7 +318,7 @@ vint8m1_t test_vncvt_x_x_w_i8m1_m(vbool8_t mask, vint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vncvt_x_x_w_i8m2_m(vbool4_t mask, vint16m4_t src, size_t vl) { - return vncvt_x_x_w_i8m2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i8m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m4_m( @@ -327,7 +327,7 @@ vint8m2_t test_vncvt_x_x_w_i8m2_m(vbool4_t mask, vint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vncvt_x_x_w_i8m4_m(vbool2_t mask, vint16m8_t src, size_t vl) { - return vncvt_x_x_w_i8m4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i8m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf8_m( @@ -336,7 +336,7 @@ vint8m4_t test_vncvt_x_x_w_i8m4_m(vbool2_t mask, vint16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vncvt_x_x_w_u8mf8_m(vbool64_t mask, vuint16mf4_t src, size_t vl) { - return vncvt_x_x_w_u8mf8_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u8mf8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf4_m( @@ -345,7 +345,7 @@ vuint8mf8_t test_vncvt_x_x_w_u8mf8_m(vbool64_t mask, vuint16mf4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vncvt_x_x_w_u8mf4_m(vbool32_t mask, vuint16mf2_t src, size_t vl) { - return vncvt_x_x_w_u8mf4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u8mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf2_m( @@ -354,7 +354,7 @@ vuint8mf4_t test_vncvt_x_x_w_u8mf4_m(vbool32_t mask, vuint16mf2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vncvt_x_x_w_u8mf2_m(vbool16_t mask, vuint16m1_t src, size_t vl) { - return vncvt_x_x_w_u8mf2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u8mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m1_m( @@ -363,7 +363,7 @@ vuint8mf2_t test_vncvt_x_x_w_u8mf2_m(vbool16_t mask, vuint16m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vncvt_x_x_w_u8m1_m(vbool8_t mask, vuint16m2_t src, size_t vl) { - return vncvt_x_x_w_u8m1_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u8m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m2_m( @@ -372,7 +372,7 @@ vuint8m1_t test_vncvt_x_x_w_u8m1_m(vbool8_t mask, vuint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vncvt_x_x_w_u8m2_m(vbool4_t mask, vuint16m4_t src, size_t vl) { - return vncvt_x_x_w_u8m2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u8m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m4_m( @@ -381,7 +381,7 @@ vuint8m2_t test_vncvt_x_x_w_u8m2_m(vbool4_t mask, vuint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vncvt_x_x_w_u8m4_m(vbool2_t mask, vuint16m8_t src, size_t vl) { - return vncvt_x_x_w_u8m4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u8m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf4_m( @@ -390,7 +390,7 @@ vuint8m4_t test_vncvt_x_x_w_u8m4_m(vbool2_t mask, vuint16m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vncvt_x_x_w_i16mf4_m(vbool64_t mask, vint32mf2_t src, size_t vl) { - return vncvt_x_x_w_i16mf4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf2_m( @@ -399,7 +399,7 @@ vint16mf4_t test_vncvt_x_x_w_i16mf4_m(vbool64_t mask, vint32mf2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vncvt_x_x_w_i16mf2_m(vbool32_t mask, vint32m1_t src, size_t vl) { - return vncvt_x_x_w_i16mf2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m1_m( @@ -408,7 +408,7 @@ vint16mf2_t test_vncvt_x_x_w_i16mf2_m(vbool32_t mask, vint32m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vncvt_x_x_w_i16m1_m(vbool16_t mask, vint32m2_t src, size_t vl) { - return vncvt_x_x_w_i16m1_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m2_m( @@ -417,7 +417,7 @@ vint16m1_t test_vncvt_x_x_w_i16m1_m(vbool16_t mask, vint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vncvt_x_x_w_i16m2_m(vbool8_t mask, vint32m4_t src, size_t vl) { - return vncvt_x_x_w_i16m2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m4_m( @@ -426,7 +426,7 @@ vint16m2_t test_vncvt_x_x_w_i16m2_m(vbool8_t mask, vint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vncvt_x_x_w_i16m4_m(vbool4_t mask, vint32m8_t src, size_t vl) { - return vncvt_x_x_w_i16m4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf4_m( @@ -435,7 +435,7 @@ vint16m4_t test_vncvt_x_x_w_i16m4_m(vbool4_t mask, vint32m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vncvt_x_x_w_u16mf4_m(vbool64_t mask, vuint32mf2_t src, size_t vl) { - return vncvt_x_x_w_u16mf4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf2_m( @@ -444,7 +444,7 @@ vuint16mf4_t test_vncvt_x_x_w_u16mf4_m(vbool64_t mask, vuint32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vncvt_x_x_w_u16mf2_m(vbool32_t mask, vuint32m1_t src, size_t vl) { - return vncvt_x_x_w_u16mf2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m1_m( @@ -453,7 +453,7 @@ vuint16mf2_t test_vncvt_x_x_w_u16mf2_m(vbool32_t mask, vuint32m1_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vncvt_x_x_w_u16m1_m(vbool16_t mask, vuint32m2_t src, size_t vl) { - return vncvt_x_x_w_u16m1_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m2_m( @@ -462,7 +462,7 @@ vuint16m1_t test_vncvt_x_x_w_u16m1_m(vbool16_t mask, vuint32m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vncvt_x_x_w_u16m2_m(vbool8_t mask, vuint32m4_t src, size_t vl) { - return vncvt_x_x_w_u16m2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m4_m( @@ -471,7 +471,7 @@ vuint16m2_t test_vncvt_x_x_w_u16m2_m(vbool8_t mask, vuint32m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vncvt_x_x_w_u16m4_m(vbool4_t mask, vuint32m8_t src, size_t vl) { - return vncvt_x_x_w_u16m4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32mf2_m( @@ -480,7 +480,7 @@ vuint16m4_t test_vncvt_x_x_w_u16m4_m(vbool4_t mask, vuint32m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vncvt_x_x_w_i32mf2_m(vbool64_t mask, vint64m1_t src, size_t vl) { - return vncvt_x_x_w_i32mf2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m1_m( @@ -489,7 +489,7 @@ vint32mf2_t test_vncvt_x_x_w_i32mf2_m(vbool64_t mask, vint64m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vncvt_x_x_w_i32m1_m(vbool32_t mask, vint64m2_t src, size_t vl) { - return vncvt_x_x_w_i32m1_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m2_m( @@ -498,7 +498,7 @@ vint32m1_t test_vncvt_x_x_w_i32m1_m(vbool32_t mask, vint64m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vncvt_x_x_w_i32m2_m(vbool16_t mask, vint64m4_t src, size_t vl) { - return vncvt_x_x_w_i32m2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m4_m( @@ -507,7 +507,7 @@ vint32m2_t test_vncvt_x_x_w_i32m2_m(vbool16_t mask, vint64m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vncvt_x_x_w_i32m4_m(vbool8_t mask, vint64m8_t src, size_t vl) { - return vncvt_x_x_w_i32m4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_i32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32mf2_m( @@ -516,7 +516,7 @@ vint32m4_t test_vncvt_x_x_w_i32m4_m(vbool8_t mask, vint64m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vncvt_x_x_w_u32mf2_m(vbool64_t mask, vuint64m1_t src, size_t vl) { - return vncvt_x_x_w_u32mf2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m1_m( @@ -525,7 +525,7 @@ vuint32mf2_t test_vncvt_x_x_w_u32mf2_m(vbool64_t mask, vuint64m1_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vncvt_x_x_w_u32m1_m(vbool32_t mask, vuint64m2_t src, size_t vl) { - return vncvt_x_x_w_u32m1_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m2_m( @@ -534,7 +534,7 @@ vuint32m1_t test_vncvt_x_x_w_u32m1_m(vbool32_t mask, vuint64m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vncvt_x_x_w_u32m2_m(vbool16_t mask, vuint64m4_t src, size_t vl) { - return vncvt_x_x_w_u32m2_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m4_m( @@ -543,6 +543,6 @@ vuint32m2_t test_vncvt_x_x_w_u32m2_m(vbool16_t mask, vuint64m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vncvt_x_x_w_u32m4_m(vbool8_t mask, vuint64m8_t src, size_t vl) { - return vncvt_x_x_w_u32m4_m(mask, src, vl); + return __riscv_vncvt_x_x_w_u32m4_m(mask, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vneg.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vneg.c index c8ed4d98668dbac9ceabc36e81feaf932eac8aac..d79593ce4a5e355d87484af7ae282d3d25fb06da 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vneg.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vneg.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vneg_v_i8mf8(vint8mf8_t op1, size_t vl) { - return vneg_v_i8mf8(op1, vl); + return __riscv_vneg_v_i8mf8(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf4( @@ -22,7 +22,7 @@ vint8mf8_t test_vneg_v_i8mf8(vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vneg_v_i8mf4(vint8mf4_t op1, size_t vl) { - return vneg_v_i8mf4(op1, vl); + return __riscv_vneg_v_i8mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf2( @@ -31,7 +31,7 @@ vint8mf4_t test_vneg_v_i8mf4(vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vneg_v_i8mf2(vint8mf2_t op1, size_t vl) { - return vneg_v_i8mf2(op1, vl); + return __riscv_vneg_v_i8mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m1( @@ -40,7 +40,7 @@ vint8mf2_t test_vneg_v_i8mf2(vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vneg_v_i8m1(vint8m1_t op1, size_t vl) { - return vneg_v_i8m1(op1, vl); + return __riscv_vneg_v_i8m1(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m2( @@ -49,7 +49,7 @@ vint8m1_t test_vneg_v_i8m1(vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vneg_v_i8m2(vint8m2_t op1, size_t vl) { - return vneg_v_i8m2(op1, vl); + return __riscv_vneg_v_i8m2(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m4( @@ -58,7 +58,7 @@ vint8m2_t test_vneg_v_i8m2(vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vneg_v_i8m4(vint8m4_t op1, size_t vl) { - return vneg_v_i8m4(op1, vl); + return __riscv_vneg_v_i8m4(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m8( @@ -67,7 +67,7 @@ vint8m4_t test_vneg_v_i8m4(vint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vneg_v_i8m8(vint8m8_t op1, size_t vl) { - return vneg_v_i8m8(op1, vl); + return __riscv_vneg_v_i8m8(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf4( @@ -76,7 +76,7 @@ vint8m8_t test_vneg_v_i8m8(vint8m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vneg_v_i16mf4(vint16mf4_t op1, size_t vl) { - return vneg_v_i16mf4(op1, vl); + return __riscv_vneg_v_i16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf2( @@ -85,7 +85,7 @@ vint16mf4_t test_vneg_v_i16mf4(vint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vneg_v_i16mf2(vint16mf2_t op1, size_t vl) { - return vneg_v_i16mf2(op1, vl); + return __riscv_vneg_v_i16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m1( @@ -94,7 +94,7 @@ vint16mf2_t test_vneg_v_i16mf2(vint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vneg_v_i16m1(vint16m1_t op1, size_t vl) { - return vneg_v_i16m1(op1, vl); + return __riscv_vneg_v_i16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m2( @@ -103,7 +103,7 @@ vint16m1_t test_vneg_v_i16m1(vint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vneg_v_i16m2(vint16m2_t op1, size_t vl) { - return vneg_v_i16m2(op1, vl); + return __riscv_vneg_v_i16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m4( @@ -112,7 +112,7 @@ vint16m2_t test_vneg_v_i16m2(vint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vneg_v_i16m4(vint16m4_t op1, size_t vl) { - return vneg_v_i16m4(op1, vl); + return __riscv_vneg_v_i16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m8( @@ -121,7 +121,7 @@ vint16m4_t test_vneg_v_i16m4(vint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vneg_v_i16m8(vint16m8_t op1, size_t vl) { - return vneg_v_i16m8(op1, vl); + return __riscv_vneg_v_i16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32mf2( @@ -130,7 +130,7 @@ vint16m8_t test_vneg_v_i16m8(vint16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vneg_v_i32mf2(vint32mf2_t op1, size_t vl) { - return vneg_v_i32mf2(op1, vl); + return __riscv_vneg_v_i32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m1( @@ -139,7 +139,7 @@ vint32mf2_t test_vneg_v_i32mf2(vint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vneg_v_i32m1(vint32m1_t op1, size_t vl) { - return vneg_v_i32m1(op1, vl); + return __riscv_vneg_v_i32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m2( @@ -148,7 +148,7 @@ vint32m1_t test_vneg_v_i32m1(vint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vneg_v_i32m2(vint32m2_t op1, size_t vl) { - return vneg_v_i32m2(op1, vl); + return __riscv_vneg_v_i32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m4( @@ -157,7 +157,7 @@ vint32m2_t test_vneg_v_i32m2(vint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vneg_v_i32m4(vint32m4_t op1, size_t vl) { - return vneg_v_i32m4(op1, vl); + return __riscv_vneg_v_i32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m8( @@ -166,7 +166,7 @@ vint32m4_t test_vneg_v_i32m4(vint32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vneg_v_i32m8(vint32m8_t op1, size_t vl) { - return vneg_v_i32m8(op1, vl); + return __riscv_vneg_v_i32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m1( @@ -175,7 +175,7 @@ vint32m8_t test_vneg_v_i32m8(vint32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vneg_v_i64m1(vint64m1_t op1, size_t vl) { - return vneg_v_i64m1(op1, vl); + return __riscv_vneg_v_i64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m2( @@ -184,7 +184,7 @@ vint64m1_t test_vneg_v_i64m1(vint64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vneg_v_i64m2(vint64m2_t op1, size_t vl) { - return vneg_v_i64m2(op1, vl); + return __riscv_vneg_v_i64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m4( @@ -193,7 +193,7 @@ vint64m2_t test_vneg_v_i64m2(vint64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vneg_v_i64m4(vint64m4_t op1, size_t vl) { - return vneg_v_i64m4(op1, vl); + return __riscv_vneg_v_i64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m8( @@ -202,7 +202,7 @@ vint64m4_t test_vneg_v_i64m4(vint64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vneg_v_i64m8(vint64m8_t op1, size_t vl) { - return vneg_v_i64m8(op1, vl); + return __riscv_vneg_v_i64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf8_m( @@ -211,7 +211,7 @@ vint64m8_t test_vneg_v_i64m8(vint64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vneg_v_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { - return vneg_v_i8mf8_m(mask, op1, vl); + return __riscv_vneg_v_i8mf8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf4_m( @@ -220,7 +220,7 @@ vint8mf8_t test_vneg_v_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vneg_v_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { - return vneg_v_i8mf4_m(mask, op1, vl); + return __riscv_vneg_v_i8mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf2_m( @@ -229,7 +229,7 @@ vint8mf4_t test_vneg_v_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vneg_v_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { - return vneg_v_i8mf2_m(mask, op1, vl); + return __riscv_vneg_v_i8mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m1_m( @@ -238,7 +238,7 @@ vint8mf2_t test_vneg_v_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vneg_v_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t vl) { - return vneg_v_i8m1_m(mask, op1, vl); + return __riscv_vneg_v_i8m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m2_m( @@ -247,7 +247,7 @@ vint8m1_t test_vneg_v_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vneg_v_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t vl) { - return vneg_v_i8m2_m(mask, op1, vl); + return __riscv_vneg_v_i8m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m4_m( @@ -256,7 +256,7 @@ vint8m2_t test_vneg_v_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vneg_v_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t vl) { - return vneg_v_i8m4_m(mask, op1, vl); + return __riscv_vneg_v_i8m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m8_m( @@ -265,7 +265,7 @@ vint8m4_t test_vneg_v_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vneg_v_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t vl) { - return vneg_v_i8m8_m(mask, op1, vl); + return __riscv_vneg_v_i8m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf4_m( @@ -274,7 +274,7 @@ vint8m8_t test_vneg_v_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vneg_v_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t vl) { - return vneg_v_i16mf4_m(mask, op1, vl); + return __riscv_vneg_v_i16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf2_m( @@ -283,7 +283,7 @@ vint16mf4_t test_vneg_v_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vneg_v_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t vl) { - return vneg_v_i16mf2_m(mask, op1, vl); + return __riscv_vneg_v_i16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m1_m( @@ -292,7 +292,7 @@ vint16mf2_t test_vneg_v_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vneg_v_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t vl) { - return vneg_v_i16m1_m(mask, op1, vl); + return __riscv_vneg_v_i16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m2_m( @@ -301,7 +301,7 @@ vint16m1_t test_vneg_v_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vneg_v_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t vl) { - return vneg_v_i16m2_m(mask, op1, vl); + return __riscv_vneg_v_i16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m4_m( @@ -310,7 +310,7 @@ vint16m2_t test_vneg_v_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vneg_v_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t vl) { - return vneg_v_i16m4_m(mask, op1, vl); + return __riscv_vneg_v_i16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m8_m( @@ -319,7 +319,7 @@ vint16m4_t test_vneg_v_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vneg_v_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t vl) { - return vneg_v_i16m8_m(mask, op1, vl); + return __riscv_vneg_v_i16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32mf2_m( @@ -328,7 +328,7 @@ vint16m8_t test_vneg_v_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vneg_v_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t vl) { - return vneg_v_i32mf2_m(mask, op1, vl); + return __riscv_vneg_v_i32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m1_m( @@ -337,7 +337,7 @@ vint32mf2_t test_vneg_v_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vneg_v_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t vl) { - return vneg_v_i32m1_m(mask, op1, vl); + return __riscv_vneg_v_i32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m2_m( @@ -346,7 +346,7 @@ vint32m1_t test_vneg_v_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vneg_v_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t vl) { - return vneg_v_i32m2_m(mask, op1, vl); + return __riscv_vneg_v_i32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m4_m( @@ -355,7 +355,7 @@ vint32m2_t test_vneg_v_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vneg_v_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t vl) { - return vneg_v_i32m4_m(mask, op1, vl); + return __riscv_vneg_v_i32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m8_m( @@ -364,7 +364,7 @@ vint32m4_t test_vneg_v_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vneg_v_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t vl) { - return vneg_v_i32m8_m(mask, op1, vl); + return __riscv_vneg_v_i32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m1_m( @@ -373,7 +373,7 @@ vint32m8_t test_vneg_v_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vneg_v_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t vl) { - return vneg_v_i64m1_m(mask, op1, vl); + return __riscv_vneg_v_i64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m2_m( @@ -382,7 +382,7 @@ vint64m1_t test_vneg_v_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vneg_v_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t vl) { - return vneg_v_i64m2_m(mask, op1, vl); + return __riscv_vneg_v_i64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m4_m( @@ -391,7 +391,7 @@ vint64m2_t test_vneg_v_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vneg_v_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t vl) { - return vneg_v_i64m4_m(mask, op1, vl); + return __riscv_vneg_v_i64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m8_m( @@ -400,6 +400,6 @@ vint64m4_t test_vneg_v_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vneg_v_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t vl) { - return vneg_v_i64m8_m(mask, op1, vl); + return __riscv_vneg_v_i64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnmsac.c index 1bb938bbc519f534985abc43c51390f1f77f6853..d23f965b759deff6af4a743929382d981b596c9c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vv_i8mf8(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vv_i8mf8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf8( @@ -22,7 +22,7 @@ vint8mf8_t test_vnmsac_vv_i8mf8(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vx_i8mf8(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vx_i8mf8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf4( @@ -31,7 +31,7 @@ vint8mf8_t test_vnmsac_vx_i8mf8(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vv_i8mf4(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vv_i8mf4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf4( @@ -40,7 +40,7 @@ vint8mf4_t test_vnmsac_vv_i8mf4(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vx_i8mf4(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vx_i8mf4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf2( @@ -49,7 +49,7 @@ vint8mf4_t test_vnmsac_vx_i8mf4(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vv_i8mf2(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vv_i8mf2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf2( @@ -58,7 +58,7 @@ vint8mf2_t test_vnmsac_vv_i8mf2(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vx_i8mf2(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vx_i8mf2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m1( @@ -67,7 +67,7 @@ vint8mf2_t test_vnmsac_vx_i8mf2(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vv_i8m1(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vv_i8m1(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m1( @@ -76,7 +76,7 @@ vint8m1_t test_vnmsac_vv_i8m1(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vx_i8m1(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vx_i8m1(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m2( @@ -85,7 +85,7 @@ vint8m1_t test_vnmsac_vx_i8m1(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vv_i8m2(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vv_i8m2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m2( @@ -94,7 +94,7 @@ vint8m2_t test_vnmsac_vv_i8m2(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vx_i8m2(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vx_i8m2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m4( @@ -103,7 +103,7 @@ vint8m2_t test_vnmsac_vx_i8m2(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vv_i8m4(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vv_i8m4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m4( @@ -112,7 +112,7 @@ vint8m4_t test_vnmsac_vv_i8m4(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vx_i8m4(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vx_i8m4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m8( @@ -121,7 +121,7 @@ vint8m4_t test_vnmsac_vx_i8m4(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vv_i8m8(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vv_i8m8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m8( @@ -130,7 +130,7 @@ vint8m8_t test_vnmsac_vv_i8m8(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vx_i8m8(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vx_i8m8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf4( @@ -139,7 +139,7 @@ vint8m8_t test_vnmsac_vx_i8m8(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vv_i16mf4(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vv_i16mf4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf4( @@ -148,7 +148,7 @@ vint16mf4_t test_vnmsac_vv_i16mf4(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vx_i16mf4(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vx_i16mf4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf2( @@ -157,7 +157,7 @@ vint16mf4_t test_vnmsac_vx_i16mf4(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vv_i16mf2(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vv_i16mf2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf2( @@ -166,7 +166,7 @@ vint16mf2_t test_vnmsac_vv_i16mf2(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vx_i16mf2(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vx_i16mf2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m1( @@ -175,7 +175,7 @@ vint16mf2_t test_vnmsac_vx_i16mf2(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vv_i16m1(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vv_i16m1(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m1( @@ -184,7 +184,7 @@ vint16m1_t test_vnmsac_vv_i16m1(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vx_i16m1(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vx_i16m1(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m2( @@ -193,7 +193,7 @@ vint16m1_t test_vnmsac_vx_i16m1(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vv_i16m2(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vv_i16m2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m2( @@ -202,7 +202,7 @@ vint16m2_t test_vnmsac_vv_i16m2(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vx_i16m2(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vx_i16m2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m4( @@ -211,7 +211,7 @@ vint16m2_t test_vnmsac_vx_i16m2(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vv_i16m4(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vv_i16m4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m4( @@ -220,7 +220,7 @@ vint16m4_t test_vnmsac_vv_i16m4(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vx_i16m4(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vx_i16m4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m8( @@ -229,7 +229,7 @@ vint16m4_t test_vnmsac_vx_i16m4(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vv_i16m8(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vv_i16m8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m8( @@ -238,7 +238,7 @@ vint16m8_t test_vnmsac_vv_i16m8(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vx_i16m8(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vx_i16m8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32mf2( @@ -247,7 +247,7 @@ vint16m8_t test_vnmsac_vx_i16m8(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vv_i32mf2(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vv_i32mf2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32mf2( @@ -256,7 +256,7 @@ vint32mf2_t test_vnmsac_vv_i32mf2(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vx_i32mf2(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vx_i32mf2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vnmsac_vx_i32mf2(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vv_i32m1(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vv_i32m1(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m1( @@ -274,7 +274,7 @@ vint32m1_t test_vnmsac_vv_i32m1(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vx_i32m1(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vx_i32m1(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vnmsac_vx_i32m1(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vv_i32m2(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vv_i32m2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m2( @@ -292,7 +292,7 @@ vint32m2_t test_vnmsac_vv_i32m2(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vx_i32m2(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vx_i32m2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m4( @@ -301,7 +301,7 @@ vint32m2_t test_vnmsac_vx_i32m2(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vv_i32m4(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vv_i32m4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m4( @@ -310,7 +310,7 @@ vint32m4_t test_vnmsac_vv_i32m4(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vx_i32m4(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vx_i32m4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m8( @@ -319,7 +319,7 @@ vint32m4_t test_vnmsac_vx_i32m4(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vv_i32m8(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vv_i32m8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m8( @@ -328,7 +328,7 @@ vint32m8_t test_vnmsac_vv_i32m8(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vx_i32m8(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vx_i32m8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m1( @@ -337,7 +337,7 @@ vint32m8_t test_vnmsac_vx_i32m8(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vv_i64m1(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vv_i64m1(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m1( @@ -346,7 +346,7 @@ vint64m1_t test_vnmsac_vv_i64m1(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vx_i64m1(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vx_i64m1(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m2( @@ -355,7 +355,7 @@ vint64m1_t test_vnmsac_vx_i64m1(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vv_i64m2(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vv_i64m2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m2( @@ -364,7 +364,7 @@ vint64m2_t test_vnmsac_vv_i64m2(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vx_i64m2(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vx_i64m2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m4( @@ -373,7 +373,7 @@ vint64m2_t test_vnmsac_vx_i64m2(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vv_i64m4(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vv_i64m4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m4( @@ -382,7 +382,7 @@ vint64m4_t test_vnmsac_vv_i64m4(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vx_i64m4(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vx_i64m4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m8( @@ -391,7 +391,7 @@ vint64m4_t test_vnmsac_vx_i64m4(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vv_i64m8(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vv_i64m8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m8( @@ -400,7 +400,7 @@ vint64m8_t test_vnmsac_vv_i64m8(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vx_i64m8(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vx_i64m8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf8( @@ -409,7 +409,7 @@ vint64m8_t test_vnmsac_vx_i64m8(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vv_u8mf8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf8( @@ -418,7 +418,7 @@ vuint8mf8_t test_vnmsac_vv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vx_u8mf8(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vx_u8mf8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf4( @@ -427,7 +427,7 @@ vuint8mf8_t test_vnmsac_vx_u8mf8(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vv_u8mf4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf4( @@ -436,7 +436,7 @@ vuint8mf4_t test_vnmsac_vv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vx_u8mf4(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vx_u8mf4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf2( @@ -445,7 +445,7 @@ vuint8mf4_t test_vnmsac_vx_u8mf4(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vv_u8mf2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf2( @@ -454,7 +454,7 @@ vuint8mf2_t test_vnmsac_vv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vx_u8mf2(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vx_u8mf2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m1( @@ -463,7 +463,7 @@ vuint8mf2_t test_vnmsac_vx_u8mf2(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vv_u8m1(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vv_u8m1(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m1( @@ -472,7 +472,7 @@ vuint8m1_t test_vnmsac_vv_u8m1(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vx_u8m1(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vx_u8m1(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m2( @@ -481,7 +481,7 @@ vuint8m1_t test_vnmsac_vx_u8m1(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vv_u8m2(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vv_u8m2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m2( @@ -490,7 +490,7 @@ vuint8m2_t test_vnmsac_vv_u8m2(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vx_u8m2(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vx_u8m2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m4( @@ -499,7 +499,7 @@ vuint8m2_t test_vnmsac_vx_u8m2(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vv_u8m4(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vv_u8m4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m4( @@ -508,7 +508,7 @@ vuint8m4_t test_vnmsac_vv_u8m4(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vx_u8m4(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vx_u8m4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m8( @@ -517,7 +517,7 @@ vuint8m4_t test_vnmsac_vx_u8m4(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vv_u8m8(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vv_u8m8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m8( @@ -526,7 +526,7 @@ vuint8m8_t test_vnmsac_vv_u8m8(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vx_u8m8(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vx_u8m8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf4( @@ -535,7 +535,7 @@ vuint8m8_t test_vnmsac_vx_u8m8(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vv_u16mf4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf4( @@ -544,7 +544,7 @@ vuint16mf4_t test_vnmsac_vv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vx_u16mf4(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vx_u16mf4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf2( @@ -553,7 +553,7 @@ vuint16mf4_t test_vnmsac_vx_u16mf4(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vv_u16mf2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf2( @@ -562,7 +562,7 @@ vuint16mf2_t test_vnmsac_vv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vx_u16mf2(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vx_u16mf2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m1( @@ -571,7 +571,7 @@ vuint16mf2_t test_vnmsac_vx_u16mf2(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vv_u16m1(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vv_u16m1(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m1( @@ -580,7 +580,7 @@ vuint16m1_t test_vnmsac_vv_u16m1(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vx_u16m1(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vx_u16m1(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m2( @@ -589,7 +589,7 @@ vuint16m1_t test_vnmsac_vx_u16m1(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vv_u16m2(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vv_u16m2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m2( @@ -598,7 +598,7 @@ vuint16m2_t test_vnmsac_vv_u16m2(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vx_u16m2(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vx_u16m2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m4( @@ -607,7 +607,7 @@ vuint16m2_t test_vnmsac_vx_u16m2(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vv_u16m4(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vv_u16m4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m4( @@ -616,7 +616,7 @@ vuint16m4_t test_vnmsac_vv_u16m4(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vx_u16m4(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vx_u16m4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m8( @@ -625,7 +625,7 @@ vuint16m4_t test_vnmsac_vx_u16m4(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vv_u16m8(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vv_u16m8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m8( @@ -634,7 +634,7 @@ vuint16m8_t test_vnmsac_vv_u16m8(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vx_u16m8(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vx_u16m8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32mf2( @@ -643,7 +643,7 @@ vuint16m8_t test_vnmsac_vx_u16m8(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vv_u32mf2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32mf2( @@ -652,7 +652,7 @@ vuint32mf2_t test_vnmsac_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vx_u32mf2(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vx_u32mf2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m1( @@ -661,7 +661,7 @@ vuint32mf2_t test_vnmsac_vx_u32mf2(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vv_u32m1(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m1( @@ -670,7 +670,7 @@ vuint32m1_t test_vnmsac_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vx_u32m1(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vx_u32m1(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m2( @@ -679,7 +679,7 @@ vuint32m1_t test_vnmsac_vx_u32m1(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vv_u32m2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m2( @@ -688,7 +688,7 @@ vuint32m2_t test_vnmsac_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vx_u32m2(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vx_u32m2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m4( @@ -697,7 +697,7 @@ vuint32m2_t test_vnmsac_vx_u32m2(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vv_u32m4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m4( @@ -706,7 +706,7 @@ vuint32m4_t test_vnmsac_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vx_u32m4(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vx_u32m4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m8( @@ -715,7 +715,7 @@ vuint32m4_t test_vnmsac_vx_u32m4(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vv_u32m8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m8( @@ -724,7 +724,7 @@ vuint32m8_t test_vnmsac_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vx_u32m8(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vx_u32m8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m1( @@ -733,7 +733,7 @@ vuint32m8_t test_vnmsac_vx_u32m8(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vv_u64m1(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vv_u64m1(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m1( @@ -742,7 +742,7 @@ vuint64m1_t test_vnmsac_vv_u64m1(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vx_u64m1(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vx_u64m1(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m2( @@ -751,7 +751,7 @@ vuint64m1_t test_vnmsac_vx_u64m1(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vv_u64m2(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vv_u64m2(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m2( @@ -760,7 +760,7 @@ vuint64m2_t test_vnmsac_vv_u64m2(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vx_u64m2(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vx_u64m2(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m4( @@ -769,7 +769,7 @@ vuint64m2_t test_vnmsac_vx_u64m2(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vv_u64m4(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vv_u64m4(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m4( @@ -778,7 +778,7 @@ vuint64m4_t test_vnmsac_vv_u64m4(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vx_u64m4(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vx_u64m4(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m8( @@ -787,7 +787,7 @@ vuint64m4_t test_vnmsac_vx_u64m4(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vv_u64m8(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vv_u64m8(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m8( @@ -796,7 +796,7 @@ vuint64m8_t test_vnmsac_vv_u64m8(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vx_u64m8(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vx_u64m8(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf8_m( @@ -805,7 +805,7 @@ vuint64m8_t test_vnmsac_vx_u64m8(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vv_i8mf8_m(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vv_i8mf8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf8_m( @@ -814,7 +814,7 @@ vint8mf8_t test_vnmsac_vv_i8mf8_m(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vx_i8mf8_m(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vx_i8mf8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf4_m( @@ -823,7 +823,7 @@ vint8mf8_t test_vnmsac_vx_i8mf8_m(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vv_i8mf4_m(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vv_i8mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf4_m( @@ -832,7 +832,7 @@ vint8mf4_t test_vnmsac_vv_i8mf4_m(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vx_i8mf4_m(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vx_i8mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf2_m( @@ -841,7 +841,7 @@ vint8mf4_t test_vnmsac_vx_i8mf4_m(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vv_i8mf2_m(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vv_i8mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf2_m( @@ -850,7 +850,7 @@ vint8mf2_t test_vnmsac_vv_i8mf2_m(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vx_i8mf2_m(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vx_i8mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m1_m( @@ -859,7 +859,7 @@ vint8mf2_t test_vnmsac_vx_i8mf2_m(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vv_i8m1_m(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vv_i8m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m1_m( @@ -868,7 +868,7 @@ vint8m1_t test_vnmsac_vv_i8m1_m(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vx_i8m1_m(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vx_i8m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m2_m( @@ -877,7 +877,7 @@ vint8m1_t test_vnmsac_vx_i8m1_m(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vv_i8m2_m(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vv_i8m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m2_m( @@ -886,7 +886,7 @@ vint8m2_t test_vnmsac_vv_i8m2_m(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vx_i8m2_m(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vx_i8m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m4_m( @@ -895,7 +895,7 @@ vint8m2_t test_vnmsac_vx_i8m2_m(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vv_i8m4_m(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vv_i8m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m4_m( @@ -904,7 +904,7 @@ vint8m4_t test_vnmsac_vv_i8m4_m(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vx_i8m4_m(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vx_i8m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m8_m( @@ -913,7 +913,7 @@ vint8m4_t test_vnmsac_vx_i8m4_m(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vv_i8m8_m(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vv_i8m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m8_m( @@ -922,7 +922,7 @@ vint8m8_t test_vnmsac_vv_i8m8_m(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vx_i8m8_m(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vx_i8m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf4_m( @@ -931,7 +931,7 @@ vint8m8_t test_vnmsac_vx_i8m8_m(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vv_i16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf4_m( @@ -940,7 +940,7 @@ vint16mf4_t test_vnmsac_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vx_i16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf2_m( @@ -949,7 +949,7 @@ vint16mf4_t test_vnmsac_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vv_i16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf2_m( @@ -958,7 +958,7 @@ vint16mf2_t test_vnmsac_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vx_i16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m1_m( @@ -967,7 +967,7 @@ vint16mf2_t test_vnmsac_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vv_i16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m1_m( @@ -976,7 +976,7 @@ vint16m1_t test_vnmsac_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vx_i16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m2_m( @@ -985,7 +985,7 @@ vint16m1_t test_vnmsac_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vv_i16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m2_m( @@ -994,7 +994,7 @@ vint16m2_t test_vnmsac_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vx_i16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m4_m( @@ -1003,7 +1003,7 @@ vint16m2_t test_vnmsac_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vv_i16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m4_m( @@ -1012,7 +1012,7 @@ vint16m4_t test_vnmsac_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vx_i16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m8_m( @@ -1021,7 +1021,7 @@ vint16m4_t test_vnmsac_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vv_i16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m8_m( @@ -1030,7 +1030,7 @@ vint16m8_t test_vnmsac_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vx_i16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32mf2_m( @@ -1039,7 +1039,7 @@ vint16m8_t test_vnmsac_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vv_i32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32mf2_m( @@ -1048,7 +1048,7 @@ vint32mf2_t test_vnmsac_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vx_i32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m1_m( @@ -1057,7 +1057,7 @@ vint32mf2_t test_vnmsac_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vv_i32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m1_m( @@ -1066,7 +1066,7 @@ vint32m1_t test_vnmsac_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vx_i32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m2_m( @@ -1075,7 +1075,7 @@ vint32m1_t test_vnmsac_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vv_i32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m2_m( @@ -1084,7 +1084,7 @@ vint32m2_t test_vnmsac_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vx_i32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m4_m( @@ -1093,7 +1093,7 @@ vint32m2_t test_vnmsac_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vv_i32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m4_m( @@ -1102,7 +1102,7 @@ vint32m4_t test_vnmsac_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vx_i32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m8_m( @@ -1111,7 +1111,7 @@ vint32m4_t test_vnmsac_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vv_i32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m8_m( @@ -1120,7 +1120,7 @@ vint32m8_t test_vnmsac_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vx_i32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m1_m( @@ -1129,7 +1129,7 @@ vint32m8_t test_vnmsac_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vv_i64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m1_m( @@ -1138,7 +1138,7 @@ vint64m1_t test_vnmsac_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vx_i64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m2_m( @@ -1147,7 +1147,7 @@ vint64m1_t test_vnmsac_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vv_i64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m2_m( @@ -1156,7 +1156,7 @@ vint64m2_t test_vnmsac_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vx_i64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m4_m( @@ -1165,7 +1165,7 @@ vint64m2_t test_vnmsac_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vv_i64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m4_m( @@ -1174,7 +1174,7 @@ vint64m4_t test_vnmsac_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vx_i64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m8_m( @@ -1183,7 +1183,7 @@ vint64m4_t test_vnmsac_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vv_i64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m8_m( @@ -1192,7 +1192,7 @@ vint64m8_t test_vnmsac_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vx_i64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf8_m( @@ -1201,7 +1201,7 @@ vint64m8_t test_vnmsac_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vv_u8mf8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf8_m( @@ -1210,7 +1210,7 @@ vuint8mf8_t test_vnmsac_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vx_u8mf8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf4_m( @@ -1219,7 +1219,7 @@ vuint8mf8_t test_vnmsac_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vv_u8mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf4_m( @@ -1228,7 +1228,7 @@ vuint8mf4_t test_vnmsac_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vx_u8mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf2_m( @@ -1237,7 +1237,7 @@ vuint8mf4_t test_vnmsac_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vv_u8mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf2_m( @@ -1246,7 +1246,7 @@ vuint8mf2_t test_vnmsac_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vx_u8mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m1_m( @@ -1255,7 +1255,7 @@ vuint8mf2_t test_vnmsac_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vv_u8m1_m(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vv_u8m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m1_m( @@ -1264,7 +1264,7 @@ vuint8m1_t test_vnmsac_vv_u8m1_m(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vx_u8m1_m(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vx_u8m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m2_m( @@ -1273,7 +1273,7 @@ vuint8m1_t test_vnmsac_vx_u8m1_m(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vv_u8m2_m(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vv_u8m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m2_m( @@ -1282,7 +1282,7 @@ vuint8m2_t test_vnmsac_vv_u8m2_m(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vx_u8m2_m(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vx_u8m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m4_m( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vnmsac_vx_u8m2_m(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vv_u8m4_m(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vv_u8m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m4_m( @@ -1300,7 +1300,7 @@ vuint8m4_t test_vnmsac_vv_u8m4_m(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vx_u8m4_m(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vx_u8m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m8_m( @@ -1309,7 +1309,7 @@ vuint8m4_t test_vnmsac_vx_u8m4_m(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vv_u8m8_m(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vv_u8m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m8_m( @@ -1318,7 +1318,7 @@ vuint8m8_t test_vnmsac_vv_u8m8_m(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vx_u8m8_m(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vx_u8m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf4_m( @@ -1327,7 +1327,7 @@ vuint8m8_t test_vnmsac_vx_u8m8_m(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vv_u16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf4_m( @@ -1336,7 +1336,7 @@ vuint16mf4_t test_vnmsac_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vx_u16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf2_m( @@ -1345,7 +1345,7 @@ vuint16mf4_t test_vnmsac_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vv_u16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf2_m( @@ -1354,7 +1354,7 @@ vuint16mf2_t test_vnmsac_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vx_u16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m1_m( @@ -1363,7 +1363,7 @@ vuint16mf2_t test_vnmsac_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vv_u16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m1_m( @@ -1372,7 +1372,7 @@ vuint16m1_t test_vnmsac_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vx_u16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m2_m( @@ -1381,7 +1381,7 @@ vuint16m1_t test_vnmsac_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vv_u16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m2_m( @@ -1390,7 +1390,7 @@ vuint16m2_t test_vnmsac_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vx_u16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m4_m( @@ -1399,7 +1399,7 @@ vuint16m2_t test_vnmsac_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vv_u16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m4_m( @@ -1408,7 +1408,7 @@ vuint16m4_t test_vnmsac_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vx_u16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m8_m( @@ -1417,7 +1417,7 @@ vuint16m4_t test_vnmsac_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vv_u16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m8_m( @@ -1426,7 +1426,7 @@ vuint16m8_t test_vnmsac_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vx_u16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32mf2_m( @@ -1435,7 +1435,7 @@ vuint16m8_t test_vnmsac_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vv_u32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32mf2_m( @@ -1444,7 +1444,7 @@ vuint32mf2_t test_vnmsac_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vx_u32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m1_m( @@ -1453,7 +1453,7 @@ vuint32mf2_t test_vnmsac_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vv_u32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m1_m( @@ -1462,7 +1462,7 @@ vuint32m1_t test_vnmsac_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vx_u32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m2_m( @@ -1471,7 +1471,7 @@ vuint32m1_t test_vnmsac_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vv_u32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m2_m( @@ -1480,7 +1480,7 @@ vuint32m2_t test_vnmsac_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vx_u32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m4_m( @@ -1489,7 +1489,7 @@ vuint32m2_t test_vnmsac_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vv_u32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m4_m( @@ -1498,7 +1498,7 @@ vuint32m4_t test_vnmsac_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vx_u32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m8_m( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vnmsac_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vv_u32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m8_m( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vnmsac_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vx_u32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m1_m( @@ -1525,7 +1525,7 @@ vuint32m8_t test_vnmsac_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vv_u64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m1_m( @@ -1534,7 +1534,7 @@ vuint64m1_t test_vnmsac_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vx_u64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m2_m( @@ -1543,7 +1543,7 @@ vuint64m1_t test_vnmsac_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vv_u64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m2_m( @@ -1552,7 +1552,7 @@ vuint64m2_t test_vnmsac_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vx_u64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m4_m( @@ -1561,7 +1561,7 @@ vuint64m2_t test_vnmsac_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vv_u64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m4_m( @@ -1570,7 +1570,7 @@ vuint64m4_t test_vnmsac_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vx_u64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m8_m( @@ -1579,7 +1579,7 @@ vuint64m4_t test_vnmsac_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vv_u64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m8_m( @@ -1588,6 +1588,6 @@ vuint64m8_t test_vnmsac_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vx_u64m8_m(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vx_u64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnmsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnmsub.c index f19c55926c224746d204bab8156818f35f432112..679eafedf76542337376486476d2c9b6d7371fb2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnmsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnmsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vv_i8mf8(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vv_i8mf8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf8( @@ -22,7 +22,7 @@ vint8mf8_t test_vnmsub_vv_i8mf8(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vx_i8mf8(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vx_i8mf8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf4( @@ -31,7 +31,7 @@ vint8mf8_t test_vnmsub_vx_i8mf8(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vv_i8mf4(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vv_i8mf4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf4( @@ -40,7 +40,7 @@ vint8mf4_t test_vnmsub_vv_i8mf4(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vx_i8mf4(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vx_i8mf4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf2( @@ -49,7 +49,7 @@ vint8mf4_t test_vnmsub_vx_i8mf4(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vv_i8mf2(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vv_i8mf2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf2( @@ -58,7 +58,7 @@ vint8mf2_t test_vnmsub_vv_i8mf2(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vx_i8mf2(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vx_i8mf2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m1( @@ -67,7 +67,7 @@ vint8mf2_t test_vnmsub_vx_i8mf2(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vv_i8m1(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vv_i8m1(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m1( @@ -76,7 +76,7 @@ vint8m1_t test_vnmsub_vv_i8m1(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vx_i8m1(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vx_i8m1(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m2( @@ -85,7 +85,7 @@ vint8m1_t test_vnmsub_vx_i8m1(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vv_i8m2(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vv_i8m2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m2( @@ -94,7 +94,7 @@ vint8m2_t test_vnmsub_vv_i8m2(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vx_i8m2(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vx_i8m2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m4( @@ -103,7 +103,7 @@ vint8m2_t test_vnmsub_vx_i8m2(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vv_i8m4(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vv_i8m4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m4( @@ -112,7 +112,7 @@ vint8m4_t test_vnmsub_vv_i8m4(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vx_i8m4(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vx_i8m4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m8( @@ -121,7 +121,7 @@ vint8m4_t test_vnmsub_vx_i8m4(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vv_i8m8(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vv_i8m8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m8( @@ -130,7 +130,7 @@ vint8m8_t test_vnmsub_vv_i8m8(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vx_i8m8(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vx_i8m8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf4( @@ -139,7 +139,7 @@ vint8m8_t test_vnmsub_vx_i8m8(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vv_i16mf4(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vv_i16mf4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf4( @@ -148,7 +148,7 @@ vint16mf4_t test_vnmsub_vv_i16mf4(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vx_i16mf4(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vx_i16mf4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf2( @@ -157,7 +157,7 @@ vint16mf4_t test_vnmsub_vx_i16mf4(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vv_i16mf2(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vv_i16mf2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf2( @@ -166,7 +166,7 @@ vint16mf2_t test_vnmsub_vv_i16mf2(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vx_i16mf2(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vx_i16mf2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m1( @@ -175,7 +175,7 @@ vint16mf2_t test_vnmsub_vx_i16mf2(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vv_i16m1(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vv_i16m1(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m1( @@ -184,7 +184,7 @@ vint16m1_t test_vnmsub_vv_i16m1(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vx_i16m1(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vx_i16m1(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m2( @@ -193,7 +193,7 @@ vint16m1_t test_vnmsub_vx_i16m1(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vv_i16m2(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vv_i16m2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m2( @@ -202,7 +202,7 @@ vint16m2_t test_vnmsub_vv_i16m2(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vx_i16m2(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vx_i16m2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m4( @@ -211,7 +211,7 @@ vint16m2_t test_vnmsub_vx_i16m2(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vv_i16m4(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vv_i16m4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m4( @@ -220,7 +220,7 @@ vint16m4_t test_vnmsub_vv_i16m4(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vx_i16m4(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vx_i16m4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m8( @@ -229,7 +229,7 @@ vint16m4_t test_vnmsub_vx_i16m4(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vv_i16m8(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vv_i16m8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m8( @@ -238,7 +238,7 @@ vint16m8_t test_vnmsub_vv_i16m8(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vx_i16m8(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vx_i16m8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32mf2( @@ -247,7 +247,7 @@ vint16m8_t test_vnmsub_vx_i16m8(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vv_i32mf2(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vv_i32mf2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32mf2( @@ -256,7 +256,7 @@ vint32mf2_t test_vnmsub_vv_i32mf2(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vx_i32mf2(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vx_i32mf2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vnmsub_vx_i32mf2(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vv_i32m1(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vv_i32m1(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m1( @@ -274,7 +274,7 @@ vint32m1_t test_vnmsub_vv_i32m1(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vx_i32m1(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vx_i32m1(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vnmsub_vx_i32m1(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vv_i32m2(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vv_i32m2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m2( @@ -292,7 +292,7 @@ vint32m2_t test_vnmsub_vv_i32m2(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vx_i32m2(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vx_i32m2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m4( @@ -301,7 +301,7 @@ vint32m2_t test_vnmsub_vx_i32m2(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vv_i32m4(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vv_i32m4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m4( @@ -310,7 +310,7 @@ vint32m4_t test_vnmsub_vv_i32m4(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vx_i32m4(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vx_i32m4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m8( @@ -319,7 +319,7 @@ vint32m4_t test_vnmsub_vx_i32m4(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vv_i32m8(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vv_i32m8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m8( @@ -328,7 +328,7 @@ vint32m8_t test_vnmsub_vv_i32m8(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vx_i32m8(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vx_i32m8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m1( @@ -337,7 +337,7 @@ vint32m8_t test_vnmsub_vx_i32m8(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vv_i64m1(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vv_i64m1(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m1( @@ -346,7 +346,7 @@ vint64m1_t test_vnmsub_vv_i64m1(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vx_i64m1(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vx_i64m1(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m2( @@ -355,7 +355,7 @@ vint64m1_t test_vnmsub_vx_i64m1(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vv_i64m2(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vv_i64m2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m2( @@ -364,7 +364,7 @@ vint64m2_t test_vnmsub_vv_i64m2(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vx_i64m2(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vx_i64m2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m4( @@ -373,7 +373,7 @@ vint64m2_t test_vnmsub_vx_i64m2(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vv_i64m4(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vv_i64m4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m4( @@ -382,7 +382,7 @@ vint64m4_t test_vnmsub_vv_i64m4(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vx_i64m4(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vx_i64m4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m8( @@ -391,7 +391,7 @@ vint64m4_t test_vnmsub_vx_i64m4(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vv_i64m8(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vv_i64m8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m8( @@ -400,7 +400,7 @@ vint64m8_t test_vnmsub_vv_i64m8(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vx_i64m8(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vx_i64m8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf8( @@ -409,7 +409,7 @@ vint64m8_t test_vnmsub_vx_i64m8(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vv_u8mf8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf8( @@ -418,7 +418,7 @@ vuint8mf8_t test_vnmsub_vv_u8mf8(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vx_u8mf8(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vx_u8mf8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf4( @@ -427,7 +427,7 @@ vuint8mf8_t test_vnmsub_vx_u8mf8(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vv_u8mf4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf4( @@ -436,7 +436,7 @@ vuint8mf4_t test_vnmsub_vv_u8mf4(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vx_u8mf4(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vx_u8mf4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf2( @@ -445,7 +445,7 @@ vuint8mf4_t test_vnmsub_vx_u8mf4(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vv_u8mf2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf2( @@ -454,7 +454,7 @@ vuint8mf2_t test_vnmsub_vv_u8mf2(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vx_u8mf2(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vx_u8mf2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m1( @@ -463,7 +463,7 @@ vuint8mf2_t test_vnmsub_vx_u8mf2(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vv_u8m1(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vv_u8m1(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m1( @@ -472,7 +472,7 @@ vuint8m1_t test_vnmsub_vv_u8m1(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vx_u8m1(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vx_u8m1(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m2( @@ -481,7 +481,7 @@ vuint8m1_t test_vnmsub_vx_u8m1(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vv_u8m2(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vv_u8m2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m2( @@ -490,7 +490,7 @@ vuint8m2_t test_vnmsub_vv_u8m2(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vx_u8m2(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vx_u8m2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m4( @@ -499,7 +499,7 @@ vuint8m2_t test_vnmsub_vx_u8m2(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vv_u8m4(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vv_u8m4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m4( @@ -508,7 +508,7 @@ vuint8m4_t test_vnmsub_vv_u8m4(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vx_u8m4(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vx_u8m4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m8( @@ -517,7 +517,7 @@ vuint8m4_t test_vnmsub_vx_u8m4(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vv_u8m8(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vv_u8m8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m8( @@ -526,7 +526,7 @@ vuint8m8_t test_vnmsub_vv_u8m8(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vx_u8m8(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vx_u8m8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf4( @@ -535,7 +535,7 @@ vuint8m8_t test_vnmsub_vx_u8m8(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vv_u16mf4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf4( @@ -544,7 +544,7 @@ vuint16mf4_t test_vnmsub_vv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vx_u16mf4(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vx_u16mf4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf2( @@ -553,7 +553,7 @@ vuint16mf4_t test_vnmsub_vx_u16mf4(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vv_u16mf2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf2( @@ -562,7 +562,7 @@ vuint16mf2_t test_vnmsub_vv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vx_u16mf2(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vx_u16mf2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m1( @@ -571,7 +571,7 @@ vuint16mf2_t test_vnmsub_vx_u16mf2(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vv_u16m1(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vv_u16m1(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m1( @@ -580,7 +580,7 @@ vuint16m1_t test_vnmsub_vv_u16m1(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vx_u16m1(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vx_u16m1(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m2( @@ -589,7 +589,7 @@ vuint16m1_t test_vnmsub_vx_u16m1(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vv_u16m2(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vv_u16m2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m2( @@ -598,7 +598,7 @@ vuint16m2_t test_vnmsub_vv_u16m2(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vx_u16m2(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vx_u16m2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m4( @@ -607,7 +607,7 @@ vuint16m2_t test_vnmsub_vx_u16m2(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vv_u16m4(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vv_u16m4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m4( @@ -616,7 +616,7 @@ vuint16m4_t test_vnmsub_vv_u16m4(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vx_u16m4(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vx_u16m4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m8( @@ -625,7 +625,7 @@ vuint16m4_t test_vnmsub_vx_u16m4(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vv_u16m8(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vv_u16m8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m8( @@ -634,7 +634,7 @@ vuint16m8_t test_vnmsub_vv_u16m8(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vx_u16m8(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vx_u16m8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32mf2( @@ -643,7 +643,7 @@ vuint16m8_t test_vnmsub_vx_u16m8(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vv_u32mf2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32mf2( @@ -652,7 +652,7 @@ vuint32mf2_t test_vnmsub_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vx_u32mf2(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vx_u32mf2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m1( @@ -661,7 +661,7 @@ vuint32mf2_t test_vnmsub_vx_u32mf2(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vv_u32m1(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m1( @@ -670,7 +670,7 @@ vuint32m1_t test_vnmsub_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vx_u32m1(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vx_u32m1(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m2( @@ -679,7 +679,7 @@ vuint32m1_t test_vnmsub_vx_u32m1(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vv_u32m2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m2( @@ -688,7 +688,7 @@ vuint32m2_t test_vnmsub_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vx_u32m2(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vx_u32m2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m4( @@ -697,7 +697,7 @@ vuint32m2_t test_vnmsub_vx_u32m2(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vv_u32m4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m4( @@ -706,7 +706,7 @@ vuint32m4_t test_vnmsub_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vx_u32m4(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vx_u32m4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m8( @@ -715,7 +715,7 @@ vuint32m4_t test_vnmsub_vx_u32m4(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vv_u32m8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m8( @@ -724,7 +724,7 @@ vuint32m8_t test_vnmsub_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vx_u32m8(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vx_u32m8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m1( @@ -733,7 +733,7 @@ vuint32m8_t test_vnmsub_vx_u32m8(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vv_u64m1(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vv_u64m1(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m1( @@ -742,7 +742,7 @@ vuint64m1_t test_vnmsub_vv_u64m1(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vx_u64m1(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vx_u64m1(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m2( @@ -751,7 +751,7 @@ vuint64m1_t test_vnmsub_vx_u64m1(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vv_u64m2(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vv_u64m2(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m2( @@ -760,7 +760,7 @@ vuint64m2_t test_vnmsub_vv_u64m2(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vx_u64m2(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vx_u64m2(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m4( @@ -769,7 +769,7 @@ vuint64m2_t test_vnmsub_vx_u64m2(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vv_u64m4(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vv_u64m4(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m4( @@ -778,7 +778,7 @@ vuint64m4_t test_vnmsub_vv_u64m4(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vx_u64m4(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vx_u64m4(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m8( @@ -787,7 +787,7 @@ vuint64m4_t test_vnmsub_vx_u64m4(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vv_u64m8(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vv_u64m8(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m8( @@ -796,7 +796,7 @@ vuint64m8_t test_vnmsub_vv_u64m8(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vx_u64m8(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vx_u64m8(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf8_m( @@ -805,7 +805,7 @@ vuint64m8_t test_vnmsub_vx_u64m8(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vv_i8mf8_m(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vv_i8mf8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf8_m( @@ -814,7 +814,7 @@ vint8mf8_t test_vnmsub_vv_i8mf8_m(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vx_i8mf8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf4_m( @@ -823,7 +823,7 @@ vint8mf8_t test_vnmsub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vv_i8mf4_m(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vv_i8mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf4_m( @@ -832,7 +832,7 @@ vint8mf4_t test_vnmsub_vv_i8mf4_m(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vx_i8mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf2_m( @@ -841,7 +841,7 @@ vint8mf4_t test_vnmsub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vv_i8mf2_m(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vv_i8mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf2_m( @@ -850,7 +850,7 @@ vint8mf2_t test_vnmsub_vv_i8mf2_m(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vx_i8mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m1_m( @@ -859,7 +859,7 @@ vint8mf2_t test_vnmsub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vv_i8m1_m(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vv_i8m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m1_m( @@ -868,7 +868,7 @@ vint8m1_t test_vnmsub_vv_i8m1_m(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vx_i8m1_m(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vx_i8m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m2_m( @@ -877,7 +877,7 @@ vint8m1_t test_vnmsub_vx_i8m1_m(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vv_i8m2_m(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vv_i8m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m2_m( @@ -886,7 +886,7 @@ vint8m2_t test_vnmsub_vv_i8m2_m(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vx_i8m2_m(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vx_i8m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m4_m( @@ -895,7 +895,7 @@ vint8m2_t test_vnmsub_vx_i8m2_m(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vv_i8m4_m(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vv_i8m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m4_m( @@ -904,7 +904,7 @@ vint8m4_t test_vnmsub_vv_i8m4_m(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vx_i8m4_m(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vx_i8m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m8_m( @@ -913,7 +913,7 @@ vint8m4_t test_vnmsub_vx_i8m4_m(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vv_i8m8_m(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vv_i8m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m8_m( @@ -922,7 +922,7 @@ vint8m8_t test_vnmsub_vv_i8m8_m(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vx_i8m8_m(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vx_i8m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf4_m( @@ -931,7 +931,7 @@ vint8m8_t test_vnmsub_vx_i8m8_m(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vv_i16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf4_m( @@ -940,7 +940,7 @@ vint16mf4_t test_vnmsub_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vx_i16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf2_m( @@ -949,7 +949,7 @@ vint16mf4_t test_vnmsub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vv_i16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf2_m( @@ -958,7 +958,7 @@ vint16mf2_t test_vnmsub_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vx_i16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m1_m( @@ -967,7 +967,7 @@ vint16mf2_t test_vnmsub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vv_i16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m1_m( @@ -976,7 +976,7 @@ vint16m1_t test_vnmsub_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vx_i16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m2_m( @@ -985,7 +985,7 @@ vint16m1_t test_vnmsub_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vv_i16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m2_m( @@ -994,7 +994,7 @@ vint16m2_t test_vnmsub_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vx_i16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m4_m( @@ -1003,7 +1003,7 @@ vint16m2_t test_vnmsub_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vv_i16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m4_m( @@ -1012,7 +1012,7 @@ vint16m4_t test_vnmsub_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vx_i16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m8_m( @@ -1021,7 +1021,7 @@ vint16m4_t test_vnmsub_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vv_i16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m8_m( @@ -1030,7 +1030,7 @@ vint16m8_t test_vnmsub_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vx_i16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32mf2_m( @@ -1039,7 +1039,7 @@ vint16m8_t test_vnmsub_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vv_i32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32mf2_m( @@ -1048,7 +1048,7 @@ vint32mf2_t test_vnmsub_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vx_i32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m1_m( @@ -1057,7 +1057,7 @@ vint32mf2_t test_vnmsub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vv_i32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m1_m( @@ -1066,7 +1066,7 @@ vint32m1_t test_vnmsub_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vx_i32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m2_m( @@ -1075,7 +1075,7 @@ vint32m1_t test_vnmsub_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vv_i32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m2_m( @@ -1084,7 +1084,7 @@ vint32m2_t test_vnmsub_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vx_i32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m4_m( @@ -1093,7 +1093,7 @@ vint32m2_t test_vnmsub_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vv_i32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m4_m( @@ -1102,7 +1102,7 @@ vint32m4_t test_vnmsub_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vx_i32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m8_m( @@ -1111,7 +1111,7 @@ vint32m4_t test_vnmsub_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vv_i32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m8_m( @@ -1120,7 +1120,7 @@ vint32m8_t test_vnmsub_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vx_i32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m1_m( @@ -1129,7 +1129,7 @@ vint32m8_t test_vnmsub_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vv_i64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m1_m( @@ -1138,7 +1138,7 @@ vint64m1_t test_vnmsub_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vx_i64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m2_m( @@ -1147,7 +1147,7 @@ vint64m1_t test_vnmsub_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vv_i64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m2_m( @@ -1156,7 +1156,7 @@ vint64m2_t test_vnmsub_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vx_i64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m4_m( @@ -1165,7 +1165,7 @@ vint64m2_t test_vnmsub_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vv_i64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m4_m( @@ -1174,7 +1174,7 @@ vint64m4_t test_vnmsub_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vx_i64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m8_m( @@ -1183,7 +1183,7 @@ vint64m4_t test_vnmsub_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vv_i64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m8_m( @@ -1192,7 +1192,7 @@ vint64m8_t test_vnmsub_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vx_i64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf8_m( @@ -1201,7 +1201,7 @@ vint64m8_t test_vnmsub_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vv_u8mf8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf8_m( @@ -1210,7 +1210,7 @@ vuint8mf8_t test_vnmsub_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vx_u8mf8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf4_m( @@ -1219,7 +1219,7 @@ vuint8mf8_t test_vnmsub_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vv_u8mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf4_m( @@ -1228,7 +1228,7 @@ vuint8mf4_t test_vnmsub_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vx_u8mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf2_m( @@ -1237,7 +1237,7 @@ vuint8mf4_t test_vnmsub_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vv_u8mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf2_m( @@ -1246,7 +1246,7 @@ vuint8mf2_t test_vnmsub_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vx_u8mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m1_m( @@ -1255,7 +1255,7 @@ vuint8mf2_t test_vnmsub_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vv_u8m1_m(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vv_u8m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m1_m( @@ -1264,7 +1264,7 @@ vuint8m1_t test_vnmsub_vv_u8m1_m(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vx_u8m1_m(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vx_u8m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m2_m( @@ -1273,7 +1273,7 @@ vuint8m1_t test_vnmsub_vx_u8m1_m(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vv_u8m2_m(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vv_u8m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m2_m( @@ -1282,7 +1282,7 @@ vuint8m2_t test_vnmsub_vv_u8m2_m(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vx_u8m2_m(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vx_u8m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m4_m( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vnmsub_vx_u8m2_m(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vv_u8m4_m(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vv_u8m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m4_m( @@ -1300,7 +1300,7 @@ vuint8m4_t test_vnmsub_vv_u8m4_m(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vx_u8m4_m(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vx_u8m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m8_m( @@ -1309,7 +1309,7 @@ vuint8m4_t test_vnmsub_vx_u8m4_m(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vv_u8m8_m(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vv_u8m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m8_m( @@ -1318,7 +1318,7 @@ vuint8m8_t test_vnmsub_vv_u8m8_m(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vx_u8m8_m(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vx_u8m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf4_m( @@ -1327,7 +1327,7 @@ vuint8m8_t test_vnmsub_vx_u8m8_m(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vv_u16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf4_m( @@ -1336,7 +1336,7 @@ vuint16mf4_t test_vnmsub_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vx_u16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf2_m( @@ -1345,7 +1345,7 @@ vuint16mf4_t test_vnmsub_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vv_u16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf2_m( @@ -1354,7 +1354,7 @@ vuint16mf2_t test_vnmsub_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vx_u16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m1_m( @@ -1363,7 +1363,7 @@ vuint16mf2_t test_vnmsub_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vv_u16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m1_m( @@ -1372,7 +1372,7 @@ vuint16m1_t test_vnmsub_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vx_u16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m2_m( @@ -1381,7 +1381,7 @@ vuint16m1_t test_vnmsub_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vv_u16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m2_m( @@ -1390,7 +1390,7 @@ vuint16m2_t test_vnmsub_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vx_u16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m4_m( @@ -1399,7 +1399,7 @@ vuint16m2_t test_vnmsub_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vv_u16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m4_m( @@ -1408,7 +1408,7 @@ vuint16m4_t test_vnmsub_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vx_u16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m8_m( @@ -1417,7 +1417,7 @@ vuint16m4_t test_vnmsub_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vv_u16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m8_m( @@ -1426,7 +1426,7 @@ vuint16m8_t test_vnmsub_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vx_u16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32mf2_m( @@ -1435,7 +1435,7 @@ vuint16m8_t test_vnmsub_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vv_u32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32mf2_m( @@ -1444,7 +1444,7 @@ vuint32mf2_t test_vnmsub_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vx_u32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m1_m( @@ -1453,7 +1453,7 @@ vuint32mf2_t test_vnmsub_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vv_u32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m1_m( @@ -1462,7 +1462,7 @@ vuint32m1_t test_vnmsub_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vx_u32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m2_m( @@ -1471,7 +1471,7 @@ vuint32m1_t test_vnmsub_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vv_u32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m2_m( @@ -1480,7 +1480,7 @@ vuint32m2_t test_vnmsub_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vx_u32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m4_m( @@ -1489,7 +1489,7 @@ vuint32m2_t test_vnmsub_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vv_u32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m4_m( @@ -1498,7 +1498,7 @@ vuint32m4_t test_vnmsub_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vx_u32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m8_m( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vnmsub_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vv_u32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m8_m( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vnmsub_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vx_u32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m1_m( @@ -1525,7 +1525,7 @@ vuint32m8_t test_vnmsub_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vv_u64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m1_m( @@ -1534,7 +1534,7 @@ vuint64m1_t test_vnmsub_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vx_u64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m2_m( @@ -1543,7 +1543,7 @@ vuint64m1_t test_vnmsub_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vv_u64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m2_m( @@ -1552,7 +1552,7 @@ vuint64m2_t test_vnmsub_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vx_u64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m4_m( @@ -1561,7 +1561,7 @@ vuint64m2_t test_vnmsub_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vv_u64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m4_m( @@ -1570,7 +1570,7 @@ vuint64m4_t test_vnmsub_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vx_u64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m8_m( @@ -1579,7 +1579,7 @@ vuint64m4_t test_vnmsub_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vv_u64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m8_m( @@ -1588,6 +1588,6 @@ vuint64m8_t test_vnmsub_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vx_u64m8_m(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vx_u64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnot.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnot.c index 9c432918a6a85ddee39f63c8e3ecd7560e7b4af6..8b9115596856baee539394de7e55a3bd9d763950 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnot.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnot.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnot_v_i8mf8(vint8mf8_t op1, size_t vl) { - return vnot_v_i8mf8(op1, vl); + return __riscv_vnot_v_i8mf8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf4( @@ -21,7 +21,7 @@ vint8mf8_t test_vnot_v_i8mf8(vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnot_v_i8mf4(vint8mf4_t op1, size_t vl) { - return vnot_v_i8mf4(op1, vl); + return __riscv_vnot_v_i8mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf2( @@ -30,7 +30,7 @@ vint8mf4_t test_vnot_v_i8mf4(vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnot_v_i8mf2(vint8mf2_t op1, size_t vl) { - return vnot_v_i8mf2(op1, vl); + return __riscv_vnot_v_i8mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m1( @@ -39,7 +39,7 @@ vint8mf2_t test_vnot_v_i8mf2(vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnot_v_i8m1(vint8m1_t op1, size_t vl) { - return vnot_v_i8m1(op1, vl); + return __riscv_vnot_v_i8m1(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m2( @@ -48,7 +48,7 @@ vint8m1_t test_vnot_v_i8m1(vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnot_v_i8m2(vint8m2_t op1, size_t vl) { - return vnot_v_i8m2(op1, vl); + return __riscv_vnot_v_i8m2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m4( @@ -57,7 +57,7 @@ vint8m2_t test_vnot_v_i8m2(vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnot_v_i8m4(vint8m4_t op1, size_t vl) { - return vnot_v_i8m4(op1, vl); + return __riscv_vnot_v_i8m4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m8( @@ -66,7 +66,7 @@ vint8m4_t test_vnot_v_i8m4(vint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnot_v_i8m8(vint8m8_t op1, size_t vl) { - return vnot_v_i8m8(op1, vl); + return __riscv_vnot_v_i8m8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf4( @@ -75,7 +75,7 @@ vint8m8_t test_vnot_v_i8m8(vint8m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnot_v_i16mf4(vint16mf4_t op1, size_t vl) { - return vnot_v_i16mf4(op1, vl); + return __riscv_vnot_v_i16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf2( @@ -84,7 +84,7 @@ vint16mf4_t test_vnot_v_i16mf4(vint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnot_v_i16mf2(vint16mf2_t op1, size_t vl) { - return vnot_v_i16mf2(op1, vl); + return __riscv_vnot_v_i16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m1( @@ -93,7 +93,7 @@ vint16mf2_t test_vnot_v_i16mf2(vint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnot_v_i16m1(vint16m1_t op1, size_t vl) { - return vnot_v_i16m1(op1, vl); + return __riscv_vnot_v_i16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m2( @@ -102,7 +102,7 @@ vint16m1_t test_vnot_v_i16m1(vint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnot_v_i16m2(vint16m2_t op1, size_t vl) { - return vnot_v_i16m2(op1, vl); + return __riscv_vnot_v_i16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m4( @@ -111,7 +111,7 @@ vint16m2_t test_vnot_v_i16m2(vint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnot_v_i16m4(vint16m4_t op1, size_t vl) { - return vnot_v_i16m4(op1, vl); + return __riscv_vnot_v_i16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m8( @@ -120,7 +120,7 @@ vint16m4_t test_vnot_v_i16m4(vint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnot_v_i16m8(vint16m8_t op1, size_t vl) { - return vnot_v_i16m8(op1, vl); + return __riscv_vnot_v_i16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32mf2( @@ -129,7 +129,7 @@ vint16m8_t test_vnot_v_i16m8(vint16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnot_v_i32mf2(vint32mf2_t op1, size_t vl) { - return vnot_v_i32mf2(op1, vl); + return __riscv_vnot_v_i32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m1( @@ -138,7 +138,7 @@ vint32mf2_t test_vnot_v_i32mf2(vint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnot_v_i32m1(vint32m1_t op1, size_t vl) { - return vnot_v_i32m1(op1, vl); + return __riscv_vnot_v_i32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m2( @@ -147,7 +147,7 @@ vint32m1_t test_vnot_v_i32m1(vint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnot_v_i32m2(vint32m2_t op1, size_t vl) { - return vnot_v_i32m2(op1, vl); + return __riscv_vnot_v_i32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m4( @@ -156,7 +156,7 @@ vint32m2_t test_vnot_v_i32m2(vint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnot_v_i32m4(vint32m4_t op1, size_t vl) { - return vnot_v_i32m4(op1, vl); + return __riscv_vnot_v_i32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m8( @@ -165,7 +165,7 @@ vint32m4_t test_vnot_v_i32m4(vint32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnot_v_i32m8(vint32m8_t op1, size_t vl) { - return vnot_v_i32m8(op1, vl); + return __riscv_vnot_v_i32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m1( @@ -174,7 +174,7 @@ vint32m8_t test_vnot_v_i32m8(vint32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnot_v_i64m1(vint64m1_t op1, size_t vl) { - return vnot_v_i64m1(op1, vl); + return __riscv_vnot_v_i64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m2( @@ -183,7 +183,7 @@ vint64m1_t test_vnot_v_i64m1(vint64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnot_v_i64m2(vint64m2_t op1, size_t vl) { - return vnot_v_i64m2(op1, vl); + return __riscv_vnot_v_i64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m4( @@ -192,7 +192,7 @@ vint64m2_t test_vnot_v_i64m2(vint64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnot_v_i64m4(vint64m4_t op1, size_t vl) { - return vnot_v_i64m4(op1, vl); + return __riscv_vnot_v_i64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m8( @@ -201,7 +201,7 @@ vint64m4_t test_vnot_v_i64m4(vint64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnot_v_i64m8(vint64m8_t op1, size_t vl) { - return vnot_v_i64m8(op1, vl); + return __riscv_vnot_v_i64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf8( @@ -210,7 +210,7 @@ vint64m8_t test_vnot_v_i64m8(vint64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnot_v_u8mf8(vuint8mf8_t op1, size_t vl) { - return vnot_v_u8mf8(op1, vl); + return __riscv_vnot_v_u8mf8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf4( @@ -219,7 +219,7 @@ vuint8mf8_t test_vnot_v_u8mf8(vuint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnot_v_u8mf4(vuint8mf4_t op1, size_t vl) { - return vnot_v_u8mf4(op1, vl); + return __riscv_vnot_v_u8mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf2( @@ -228,7 +228,7 @@ vuint8mf4_t test_vnot_v_u8mf4(vuint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnot_v_u8mf2(vuint8mf2_t op1, size_t vl) { - return vnot_v_u8mf2(op1, vl); + return __riscv_vnot_v_u8mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m1( @@ -237,7 +237,7 @@ vuint8mf2_t test_vnot_v_u8mf2(vuint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnot_v_u8m1(vuint8m1_t op1, size_t vl) { - return vnot_v_u8m1(op1, vl); + return __riscv_vnot_v_u8m1(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m2( @@ -246,7 +246,7 @@ vuint8m1_t test_vnot_v_u8m1(vuint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnot_v_u8m2(vuint8m2_t op1, size_t vl) { - return vnot_v_u8m2(op1, vl); + return __riscv_vnot_v_u8m2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m4( @@ -255,7 +255,7 @@ vuint8m2_t test_vnot_v_u8m2(vuint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnot_v_u8m4(vuint8m4_t op1, size_t vl) { - return vnot_v_u8m4(op1, vl); + return __riscv_vnot_v_u8m4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m8( @@ -264,7 +264,7 @@ vuint8m4_t test_vnot_v_u8m4(vuint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnot_v_u8m8(vuint8m8_t op1, size_t vl) { - return vnot_v_u8m8(op1, vl); + return __riscv_vnot_v_u8m8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf4( @@ -273,7 +273,7 @@ vuint8m8_t test_vnot_v_u8m8(vuint8m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnot_v_u16mf4(vuint16mf4_t op1, size_t vl) { - return vnot_v_u16mf4(op1, vl); + return __riscv_vnot_v_u16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf2( @@ -282,7 +282,7 @@ vuint16mf4_t test_vnot_v_u16mf4(vuint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnot_v_u16mf2(vuint16mf2_t op1, size_t vl) { - return vnot_v_u16mf2(op1, vl); + return __riscv_vnot_v_u16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m1( @@ -291,7 +291,7 @@ vuint16mf2_t test_vnot_v_u16mf2(vuint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnot_v_u16m1(vuint16m1_t op1, size_t vl) { - return vnot_v_u16m1(op1, vl); + return __riscv_vnot_v_u16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m2( @@ -300,7 +300,7 @@ vuint16m1_t test_vnot_v_u16m1(vuint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnot_v_u16m2(vuint16m2_t op1, size_t vl) { - return vnot_v_u16m2(op1, vl); + return __riscv_vnot_v_u16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m4( @@ -309,7 +309,7 @@ vuint16m2_t test_vnot_v_u16m2(vuint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnot_v_u16m4(vuint16m4_t op1, size_t vl) { - return vnot_v_u16m4(op1, vl); + return __riscv_vnot_v_u16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m8( @@ -318,7 +318,7 @@ vuint16m4_t test_vnot_v_u16m4(vuint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnot_v_u16m8(vuint16m8_t op1, size_t vl) { - return vnot_v_u16m8(op1, vl); + return __riscv_vnot_v_u16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32mf2( @@ -327,7 +327,7 @@ vuint16m8_t test_vnot_v_u16m8(vuint16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnot_v_u32mf2(vuint32mf2_t op1, size_t vl) { - return vnot_v_u32mf2(op1, vl); + return __riscv_vnot_v_u32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m1( @@ -336,7 +336,7 @@ vuint32mf2_t test_vnot_v_u32mf2(vuint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnot_v_u32m1(vuint32m1_t op1, size_t vl) { - return vnot_v_u32m1(op1, vl); + return __riscv_vnot_v_u32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m2( @@ -345,7 +345,7 @@ vuint32m1_t test_vnot_v_u32m1(vuint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnot_v_u32m2(vuint32m2_t op1, size_t vl) { - return vnot_v_u32m2(op1, vl); + return __riscv_vnot_v_u32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m4( @@ -354,7 +354,7 @@ vuint32m2_t test_vnot_v_u32m2(vuint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnot_v_u32m4(vuint32m4_t op1, size_t vl) { - return vnot_v_u32m4(op1, vl); + return __riscv_vnot_v_u32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m8( @@ -363,7 +363,7 @@ vuint32m4_t test_vnot_v_u32m4(vuint32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnot_v_u32m8(vuint32m8_t op1, size_t vl) { - return vnot_v_u32m8(op1, vl); + return __riscv_vnot_v_u32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m1( @@ -372,7 +372,7 @@ vuint32m8_t test_vnot_v_u32m8(vuint32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnot_v_u64m1(vuint64m1_t op1, size_t vl) { - return vnot_v_u64m1(op1, vl); + return __riscv_vnot_v_u64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m2( @@ -381,7 +381,7 @@ vuint64m1_t test_vnot_v_u64m1(vuint64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnot_v_u64m2(vuint64m2_t op1, size_t vl) { - return vnot_v_u64m2(op1, vl); + return __riscv_vnot_v_u64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m4( @@ -390,7 +390,7 @@ vuint64m2_t test_vnot_v_u64m2(vuint64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnot_v_u64m4(vuint64m4_t op1, size_t vl) { - return vnot_v_u64m4(op1, vl); + return __riscv_vnot_v_u64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m8( @@ -399,7 +399,7 @@ vuint64m4_t test_vnot_v_u64m4(vuint64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnot_v_u64m8(vuint64m8_t op1, size_t vl) { - return vnot_v_u64m8(op1, vl); + return __riscv_vnot_v_u64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vnot_v_u64m8(vuint64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnot_v_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { - return vnot_v_i8mf8_m(mask, op1, vl); + return __riscv_vnot_v_i8mf8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf4_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vnot_v_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnot_v_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { - return vnot_v_i8mf4_m(mask, op1, vl); + return __riscv_vnot_v_i8mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf2_m( @@ -426,7 +426,7 @@ vint8mf4_t test_vnot_v_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnot_v_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { - return vnot_v_i8mf2_m(mask, op1, vl); + return __riscv_vnot_v_i8mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m1_m( @@ -435,7 +435,7 @@ vint8mf2_t test_vnot_v_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnot_v_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t vl) { - return vnot_v_i8m1_m(mask, op1, vl); + return __riscv_vnot_v_i8m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m2_m( @@ -444,7 +444,7 @@ vint8m1_t test_vnot_v_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnot_v_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t vl) { - return vnot_v_i8m2_m(mask, op1, vl); + return __riscv_vnot_v_i8m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m4_m( @@ -453,7 +453,7 @@ vint8m2_t test_vnot_v_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnot_v_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t vl) { - return vnot_v_i8m4_m(mask, op1, vl); + return __riscv_vnot_v_i8m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m8_m( @@ -462,7 +462,7 @@ vint8m4_t test_vnot_v_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnot_v_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t vl) { - return vnot_v_i8m8_m(mask, op1, vl); + return __riscv_vnot_v_i8m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf4_m( @@ -471,7 +471,7 @@ vint8m8_t test_vnot_v_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnot_v_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t vl) { - return vnot_v_i16mf4_m(mask, op1, vl); + return __riscv_vnot_v_i16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf2_m( @@ -480,7 +480,7 @@ vint16mf4_t test_vnot_v_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnot_v_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t vl) { - return vnot_v_i16mf2_m(mask, op1, vl); + return __riscv_vnot_v_i16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m1_m( @@ -489,7 +489,7 @@ vint16mf2_t test_vnot_v_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnot_v_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t vl) { - return vnot_v_i16m1_m(mask, op1, vl); + return __riscv_vnot_v_i16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m2_m( @@ -498,7 +498,7 @@ vint16m1_t test_vnot_v_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnot_v_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t vl) { - return vnot_v_i16m2_m(mask, op1, vl); + return __riscv_vnot_v_i16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m4_m( @@ -507,7 +507,7 @@ vint16m2_t test_vnot_v_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnot_v_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t vl) { - return vnot_v_i16m4_m(mask, op1, vl); + return __riscv_vnot_v_i16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m8_m( @@ -516,7 +516,7 @@ vint16m4_t test_vnot_v_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnot_v_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t vl) { - return vnot_v_i16m8_m(mask, op1, vl); + return __riscv_vnot_v_i16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32mf2_m( @@ -525,7 +525,7 @@ vint16m8_t test_vnot_v_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnot_v_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t vl) { - return vnot_v_i32mf2_m(mask, op1, vl); + return __riscv_vnot_v_i32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m1_m( @@ -534,7 +534,7 @@ vint32mf2_t test_vnot_v_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnot_v_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t vl) { - return vnot_v_i32m1_m(mask, op1, vl); + return __riscv_vnot_v_i32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m2_m( @@ -543,7 +543,7 @@ vint32m1_t test_vnot_v_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnot_v_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t vl) { - return vnot_v_i32m2_m(mask, op1, vl); + return __riscv_vnot_v_i32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m4_m( @@ -552,7 +552,7 @@ vint32m2_t test_vnot_v_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnot_v_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t vl) { - return vnot_v_i32m4_m(mask, op1, vl); + return __riscv_vnot_v_i32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m8_m( @@ -561,7 +561,7 @@ vint32m4_t test_vnot_v_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnot_v_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t vl) { - return vnot_v_i32m8_m(mask, op1, vl); + return __riscv_vnot_v_i32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m1_m( @@ -570,7 +570,7 @@ vint32m8_t test_vnot_v_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnot_v_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t vl) { - return vnot_v_i64m1_m(mask, op1, vl); + return __riscv_vnot_v_i64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m2_m( @@ -579,7 +579,7 @@ vint64m1_t test_vnot_v_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnot_v_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t vl) { - return vnot_v_i64m2_m(mask, op1, vl); + return __riscv_vnot_v_i64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m4_m( @@ -588,7 +588,7 @@ vint64m2_t test_vnot_v_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnot_v_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t vl) { - return vnot_v_i64m4_m(mask, op1, vl); + return __riscv_vnot_v_i64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m8_m( @@ -597,7 +597,7 @@ vint64m4_t test_vnot_v_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnot_v_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t vl) { - return vnot_v_i64m8_m(mask, op1, vl); + return __riscv_vnot_v_i64m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf8_m( @@ -606,7 +606,7 @@ vint64m8_t test_vnot_v_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnot_v_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t vl) { - return vnot_v_u8mf8_m(mask, op1, vl); + return __riscv_vnot_v_u8mf8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf4_m( @@ -615,7 +615,7 @@ vuint8mf8_t test_vnot_v_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnot_v_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t vl) { - return vnot_v_u8mf4_m(mask, op1, vl); + return __riscv_vnot_v_u8mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf2_m( @@ -624,7 +624,7 @@ vuint8mf4_t test_vnot_v_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnot_v_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t vl) { - return vnot_v_u8mf2_m(mask, op1, vl); + return __riscv_vnot_v_u8mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m1_m( @@ -633,7 +633,7 @@ vuint8mf2_t test_vnot_v_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnot_v_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t vl) { - return vnot_v_u8m1_m(mask, op1, vl); + return __riscv_vnot_v_u8m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m2_m( @@ -642,7 +642,7 @@ vuint8m1_t test_vnot_v_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnot_v_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t vl) { - return vnot_v_u8m2_m(mask, op1, vl); + return __riscv_vnot_v_u8m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m4_m( @@ -651,7 +651,7 @@ vuint8m2_t test_vnot_v_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnot_v_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t vl) { - return vnot_v_u8m4_m(mask, op1, vl); + return __riscv_vnot_v_u8m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m8_m( @@ -660,7 +660,7 @@ vuint8m4_t test_vnot_v_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnot_v_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t vl) { - return vnot_v_u8m8_m(mask, op1, vl); + return __riscv_vnot_v_u8m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf4_m( @@ -669,7 +669,7 @@ vuint8m8_t test_vnot_v_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnot_v_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t vl) { - return vnot_v_u16mf4_m(mask, op1, vl); + return __riscv_vnot_v_u16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf2_m( @@ -678,7 +678,7 @@ vuint16mf4_t test_vnot_v_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnot_v_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t vl) { - return vnot_v_u16mf2_m(mask, op1, vl); + return __riscv_vnot_v_u16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m1_m( @@ -687,7 +687,7 @@ vuint16mf2_t test_vnot_v_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnot_v_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t vl) { - return vnot_v_u16m1_m(mask, op1, vl); + return __riscv_vnot_v_u16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m2_m( @@ -696,7 +696,7 @@ vuint16m1_t test_vnot_v_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnot_v_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t vl) { - return vnot_v_u16m2_m(mask, op1, vl); + return __riscv_vnot_v_u16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m4_m( @@ -705,7 +705,7 @@ vuint16m2_t test_vnot_v_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnot_v_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t vl) { - return vnot_v_u16m4_m(mask, op1, vl); + return __riscv_vnot_v_u16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m8_m( @@ -714,7 +714,7 @@ vuint16m4_t test_vnot_v_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnot_v_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t vl) { - return vnot_v_u16m8_m(mask, op1, vl); + return __riscv_vnot_v_u16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32mf2_m( @@ -723,7 +723,7 @@ vuint16m8_t test_vnot_v_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnot_v_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t vl) { - return vnot_v_u32mf2_m(mask, op1, vl); + return __riscv_vnot_v_u32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m1_m( @@ -732,7 +732,7 @@ vuint32mf2_t test_vnot_v_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnot_v_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t vl) { - return vnot_v_u32m1_m(mask, op1, vl); + return __riscv_vnot_v_u32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m2_m( @@ -741,7 +741,7 @@ vuint32m1_t test_vnot_v_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnot_v_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t vl) { - return vnot_v_u32m2_m(mask, op1, vl); + return __riscv_vnot_v_u32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m4_m( @@ -750,7 +750,7 @@ vuint32m2_t test_vnot_v_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnot_v_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t vl) { - return vnot_v_u32m4_m(mask, op1, vl); + return __riscv_vnot_v_u32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m8_m( @@ -759,7 +759,7 @@ vuint32m4_t test_vnot_v_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnot_v_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t vl) { - return vnot_v_u32m8_m(mask, op1, vl); + return __riscv_vnot_v_u32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m1_m( @@ -768,7 +768,7 @@ vuint32m8_t test_vnot_v_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnot_v_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t vl) { - return vnot_v_u64m1_m(mask, op1, vl); + return __riscv_vnot_v_u64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m2_m( @@ -777,7 +777,7 @@ vuint64m1_t test_vnot_v_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnot_v_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t vl) { - return vnot_v_u64m2_m(mask, op1, vl); + return __riscv_vnot_v_u64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m4_m( @@ -786,7 +786,7 @@ vuint64m2_t test_vnot_v_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnot_v_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t vl) { - return vnot_v_u64m4_m(mask, op1, vl); + return __riscv_vnot_v_u64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m8_m( @@ -795,6 +795,6 @@ vuint64m4_t test_vnot_v_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnot_v_u64m8_m(vbool8_t mask, vuint64m8_t op1, size_t vl) { - return vnot_v_u64m8_m(mask, op1, vl); + return __riscv_vnot_v_u64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnsra.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnsra.c index 0bb7077dbf815f38c6f80ac8f1c36567bb90cd8e..cf22c2c44700422d7f1e298c49e40324c780552a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnsra.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnsra.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsra_wv_i8mf8(op1, shift, vl); + return __riscv_vnsra_wv_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vnsra_wv_i8mf8(vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf8(op1, shift, vl); + return __riscv_vnsra_wx_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vnsra_wx_i8mf8(vint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsra_wv_i8mf4(op1, shift, vl); + return __riscv_vnsra_wv_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vnsra_wv_i8mf4(vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf4(op1, shift, vl); + return __riscv_vnsra_wx_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vnsra_wx_i8mf4(vint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsra_wv_i8mf2(op1, shift, vl); + return __riscv_vnsra_wv_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vnsra_wv_i8mf2(vint16m1_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf2(op1, shift, vl); + return __riscv_vnsra_wx_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vnsra_wx_i8mf2(vint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsra_wv_i8m1(op1, shift, vl); + return __riscv_vnsra_wv_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vnsra_wv_i8m1(vint16m2_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m1(op1, shift, vl); + return __riscv_vnsra_wx_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vnsra_wx_i8m1(vint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsra_wv_i8m2(op1, shift, vl); + return __riscv_vnsra_wv_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vnsra_wv_i8m2(vint16m4_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m2(op1, shift, vl); + return __riscv_vnsra_wx_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vnsra_wx_i8m2(vint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wv_i8m4(vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsra_wv_i8m4(op1, shift, vl); + return __riscv_vnsra_wv_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vnsra_wv_i8m4(vint16m8_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wx_i8m4(vint16m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m4(op1, shift, vl); + return __riscv_vnsra_wx_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf4( @@ -120,7 +120,7 @@ vint8m4_t test_vnsra_wx_i8m4(vint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wv_i16mf4(vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsra_wv_i16mf4(op1, shift, vl); + return __riscv_vnsra_wv_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf4( @@ -129,7 +129,7 @@ vint16mf4_t test_vnsra_wv_i16mf4(vint32mf2_t op1, vuint16mf4_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wx_i16mf4(vint32mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf4(op1, shift, vl); + return __riscv_vnsra_wx_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf2( @@ -138,7 +138,7 @@ vint16mf4_t test_vnsra_wx_i16mf4(vint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wv_i16mf2(vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsra_wv_i16mf2(op1, shift, vl); + return __riscv_vnsra_wv_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf2( @@ -147,7 +147,7 @@ vint16mf2_t test_vnsra_wv_i16mf2(vint32m1_t op1, vuint16mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wx_i16mf2(vint32m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf2(op1, shift, vl); + return __riscv_vnsra_wx_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m1( @@ -156,7 +156,7 @@ vint16mf2_t test_vnsra_wx_i16mf2(vint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wv_i16m1(vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsra_wv_i16m1(op1, shift, vl); + return __riscv_vnsra_wv_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m1( @@ -165,7 +165,7 @@ vint16m1_t test_vnsra_wv_i16m1(vint32m2_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wx_i16m1(vint32m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m1(op1, shift, vl); + return __riscv_vnsra_wx_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m2( @@ -174,7 +174,7 @@ vint16m1_t test_vnsra_wx_i16m1(vint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wv_i16m2(vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsra_wv_i16m2(op1, shift, vl); + return __riscv_vnsra_wv_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m2( @@ -183,7 +183,7 @@ vint16m2_t test_vnsra_wv_i16m2(vint32m4_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wx_i16m2(vint32m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m2(op1, shift, vl); + return __riscv_vnsra_wx_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m4( @@ -192,7 +192,7 @@ vint16m2_t test_vnsra_wx_i16m2(vint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wv_i16m4(vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsra_wv_i16m4(op1, shift, vl); + return __riscv_vnsra_wv_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m4( @@ -201,7 +201,7 @@ vint16m4_t test_vnsra_wv_i16m4(vint32m8_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wx_i16m4(vint32m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m4(op1, shift, vl); + return __riscv_vnsra_wx_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32mf2( @@ -210,7 +210,7 @@ vint16m4_t test_vnsra_wx_i16m4(vint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wv_i32mf2(vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsra_wv_i32mf2(op1, shift, vl); + return __riscv_vnsra_wv_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32mf2( @@ -219,7 +219,7 @@ vint32mf2_t test_vnsra_wv_i32mf2(vint64m1_t op1, vuint32mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wx_i32mf2(vint64m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32mf2(op1, shift, vl); + return __riscv_vnsra_wx_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m1( @@ -228,7 +228,7 @@ vint32mf2_t test_vnsra_wx_i32mf2(vint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wv_i32m1(vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsra_wv_i32m1(op1, shift, vl); + return __riscv_vnsra_wv_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m1( @@ -237,7 +237,7 @@ vint32m1_t test_vnsra_wv_i32m1(vint64m2_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wx_i32m1(vint64m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m1(op1, shift, vl); + return __riscv_vnsra_wx_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m2( @@ -246,7 +246,7 @@ vint32m1_t test_vnsra_wx_i32m1(vint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wv_i32m2(vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsra_wv_i32m2(op1, shift, vl); + return __riscv_vnsra_wv_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m2( @@ -255,7 +255,7 @@ vint32m2_t test_vnsra_wv_i32m2(vint64m4_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wx_i32m2(vint64m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m2(op1, shift, vl); + return __riscv_vnsra_wx_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m4( @@ -264,7 +264,7 @@ vint32m2_t test_vnsra_wx_i32m2(vint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wv_i32m4(vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsra_wv_i32m4(op1, shift, vl); + return __riscv_vnsra_wv_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m4( @@ -273,7 +273,7 @@ vint32m4_t test_vnsra_wv_i32m4(vint64m8_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wx_i32m4(vint64m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m4(op1, shift, vl); + return __riscv_vnsra_wx_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf8_m( @@ -282,7 +282,7 @@ vint32m4_t test_vnsra_wx_i32m4(vint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wv_i8mf8_m(vbool64_t mask, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsra_wv_i8mf8_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf8_m( @@ -291,7 +291,7 @@ vint8mf8_t test_vnsra_wv_i8mf8_m(vbool64_t mask, vint16mf4_t op1, vuint8mf8_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wx_i8mf8_m(vbool64_t mask, vint16mf4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf8_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf4_m( @@ -300,7 +300,7 @@ vint8mf8_t test_vnsra_wx_i8mf8_m(vbool64_t mask, vint16mf4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wv_i8mf4_m(vbool32_t mask, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsra_wv_i8mf4_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf4_m( @@ -309,7 +309,7 @@ vint8mf4_t test_vnsra_wv_i8mf4_m(vbool32_t mask, vint16mf2_t op1, vuint8mf4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wx_i8mf4_m(vbool32_t mask, vint16mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf4_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf2_m( @@ -318,7 +318,7 @@ vint8mf4_t test_vnsra_wx_i8mf4_m(vbool32_t mask, vint16mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wv_i8mf2_m(vbool16_t mask, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsra_wv_i8mf2_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf2_m( @@ -327,7 +327,7 @@ vint8mf2_t test_vnsra_wv_i8mf2_m(vbool16_t mask, vint16m1_t op1, vuint8mf2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wx_i8mf2_m(vbool16_t mask, vint16m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf2_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m1_m( @@ -336,7 +336,7 @@ vint8mf2_t test_vnsra_wx_i8mf2_m(vbool16_t mask, vint16m1_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wv_i8m1_m(vbool8_t mask, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsra_wv_i8m1_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m1_m( @@ -345,7 +345,7 @@ vint8m1_t test_vnsra_wv_i8m1_m(vbool8_t mask, vint16m2_t op1, vuint8m1_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wx_i8m1_m(vbool8_t mask, vint16m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m1_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m2_m( @@ -354,7 +354,7 @@ vint8m1_t test_vnsra_wx_i8m1_m(vbool8_t mask, vint16m2_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wv_i8m2_m(vbool4_t mask, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsra_wv_i8m2_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m2_m( @@ -363,7 +363,7 @@ vint8m2_t test_vnsra_wv_i8m2_m(vbool4_t mask, vint16m4_t op1, vuint8m2_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wx_i8m2_m(vbool4_t mask, vint16m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m2_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m4_m( @@ -372,7 +372,7 @@ vint8m2_t test_vnsra_wx_i8m2_m(vbool4_t mask, vint16m4_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wv_i8m4_m(vbool2_t mask, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsra_wv_i8m4_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m4_m( @@ -381,7 +381,7 @@ vint8m4_t test_vnsra_wv_i8m4_m(vbool2_t mask, vint16m8_t op1, vuint8m4_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wx_i8m4_m(vbool2_t mask, vint16m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m4_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf4_m( @@ -390,7 +390,7 @@ vint8m4_t test_vnsra_wx_i8m4_m(vbool2_t mask, vint16m8_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wv_i16mf4_m(vbool64_t mask, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsra_wv_i16mf4_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf4_m( @@ -399,7 +399,7 @@ vint16mf4_t test_vnsra_wv_i16mf4_m(vbool64_t mask, vint32mf2_t op1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wx_i16mf4_m(vbool64_t mask, vint32mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf4_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf2_m( @@ -408,7 +408,7 @@ vint16mf4_t test_vnsra_wx_i16mf4_m(vbool64_t mask, vint32mf2_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wv_i16mf2_m(vbool32_t mask, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsra_wv_i16mf2_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf2_m( @@ -417,7 +417,7 @@ vint16mf2_t test_vnsra_wv_i16mf2_m(vbool32_t mask, vint32m1_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wx_i16mf2_m(vbool32_t mask, vint32m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf2_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m1_m( @@ -426,7 +426,7 @@ vint16mf2_t test_vnsra_wx_i16mf2_m(vbool32_t mask, vint32m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wv_i16m1_m(vbool16_t mask, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsra_wv_i16m1_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m1_m( @@ -435,7 +435,7 @@ vint16m1_t test_vnsra_wv_i16m1_m(vbool16_t mask, vint32m2_t op1, vuint16m1_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wx_i16m1_m(vbool16_t mask, vint32m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m1_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m2_m( @@ -444,7 +444,7 @@ vint16m1_t test_vnsra_wx_i16m1_m(vbool16_t mask, vint32m2_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wv_i16m2_m(vbool8_t mask, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsra_wv_i16m2_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m2_m( @@ -453,7 +453,7 @@ vint16m2_t test_vnsra_wv_i16m2_m(vbool8_t mask, vint32m4_t op1, vuint16m2_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wx_i16m2_m(vbool8_t mask, vint32m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m2_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m4_m( @@ -462,7 +462,7 @@ vint16m2_t test_vnsra_wx_i16m2_m(vbool8_t mask, vint32m4_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wv_i16m4_m(vbool4_t mask, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsra_wv_i16m4_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m4_m( @@ -471,7 +471,7 @@ vint16m4_t test_vnsra_wv_i16m4_m(vbool4_t mask, vint32m8_t op1, vuint16m4_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wx_i16m4_m(vbool4_t mask, vint32m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m4_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32mf2_m( @@ -480,7 +480,7 @@ vint16m4_t test_vnsra_wx_i16m4_m(vbool4_t mask, vint32m8_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wv_i32mf2_m(vbool64_t mask, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsra_wv_i32mf2_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32mf2_m( @@ -489,7 +489,7 @@ vint32mf2_t test_vnsra_wv_i32mf2_m(vbool64_t mask, vint64m1_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wx_i32mf2_m(vbool64_t mask, vint64m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32mf2_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m1_m( @@ -498,7 +498,7 @@ vint32mf2_t test_vnsra_wx_i32mf2_m(vbool64_t mask, vint64m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wv_i32m1_m(vbool32_t mask, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsra_wv_i32m1_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m1_m( @@ -507,7 +507,7 @@ vint32m1_t test_vnsra_wv_i32m1_m(vbool32_t mask, vint64m2_t op1, vuint32m1_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wx_i32m1_m(vbool32_t mask, vint64m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m1_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m2_m( @@ -516,7 +516,7 @@ vint32m1_t test_vnsra_wx_i32m1_m(vbool32_t mask, vint64m2_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wv_i32m2_m(vbool16_t mask, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsra_wv_i32m2_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m2_m( @@ -525,7 +525,7 @@ vint32m2_t test_vnsra_wv_i32m2_m(vbool16_t mask, vint64m4_t op1, vuint32m2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wx_i32m2_m(vbool16_t mask, vint64m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m2_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m4_m( @@ -534,7 +534,7 @@ vint32m2_t test_vnsra_wx_i32m2_m(vbool16_t mask, vint64m4_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wv_i32m4_m(vbool8_t mask, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsra_wv_i32m4_m(mask, op1, shift, vl); + return __riscv_vnsra_wv_i32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m4_m( @@ -543,6 +543,6 @@ vint32m4_t test_vnsra_wv_i32m4_m(vbool8_t mask, vint64m8_t op1, vuint32m4_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wx_i32m4_m(vbool8_t mask, vint64m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m4_m(mask, op1, shift, vl); + return __riscv_vnsra_wx_i32m4_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnsrl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnsrl.c index 571b9f0f733f65a6060bbf0f208e763b089dfa8e..0506681b1a5b7395c989965f117e62da16cb83c2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnsrl.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnsrl.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsrl_wv_u8mf8(op1, shift, vl); + return __riscv_vnsrl_wv_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vnsrl_wv_u8mf8(vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf8(op1, shift, vl); + return __riscv_vnsrl_wx_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vnsrl_wx_u8mf8(vuint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsrl_wv_u8mf4(op1, shift, vl); + return __riscv_vnsrl_wv_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vnsrl_wv_u8mf4(vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf4(op1, shift, vl); + return __riscv_vnsrl_wx_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vnsrl_wx_u8mf4(vuint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsrl_wv_u8mf2(op1, shift, vl); + return __riscv_vnsrl_wv_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vnsrl_wv_u8mf2(vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf2(op1, shift, vl); + return __riscv_vnsrl_wx_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vnsrl_wx_u8mf2(vuint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsrl_wv_u8m1(op1, shift, vl); + return __riscv_vnsrl_wv_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vnsrl_wv_u8m1(vuint16m2_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m1(op1, shift, vl); + return __riscv_vnsrl_wx_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vnsrl_wx_u8m1(vuint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsrl_wv_u8m2(op1, shift, vl); + return __riscv_vnsrl_wv_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vnsrl_wv_u8m2(vuint16m4_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m2(op1, shift, vl); + return __riscv_vnsrl_wx_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vnsrl_wx_u8m2(vuint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wv_u8m4(vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsrl_wv_u8m4(op1, shift, vl); + return __riscv_vnsrl_wv_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vnsrl_wv_u8m4(vuint16m8_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wx_u8m4(vuint16m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m4(op1, shift, vl); + return __riscv_vnsrl_wx_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf4( @@ -120,7 +120,7 @@ vuint8m4_t test_vnsrl_wx_u8m4(vuint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wv_u16mf4(vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsrl_wv_u16mf4(op1, shift, vl); + return __riscv_vnsrl_wv_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf4( @@ -129,7 +129,7 @@ vuint16mf4_t test_vnsrl_wv_u16mf4(vuint32mf2_t op1, vuint16mf4_t shift, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wx_u16mf4(vuint32mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf4(op1, shift, vl); + return __riscv_vnsrl_wx_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf2( @@ -138,7 +138,7 @@ vuint16mf4_t test_vnsrl_wx_u16mf4(vuint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wv_u16mf2(vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsrl_wv_u16mf2(op1, shift, vl); + return __riscv_vnsrl_wv_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf2( @@ -147,7 +147,7 @@ vuint16mf2_t test_vnsrl_wv_u16mf2(vuint32m1_t op1, vuint16mf2_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wx_u16mf2(vuint32m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf2(op1, shift, vl); + return __riscv_vnsrl_wx_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m1( @@ -156,7 +156,7 @@ vuint16mf2_t test_vnsrl_wx_u16mf2(vuint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wv_u16m1(vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsrl_wv_u16m1(op1, shift, vl); + return __riscv_vnsrl_wv_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m1( @@ -165,7 +165,7 @@ vuint16m1_t test_vnsrl_wv_u16m1(vuint32m2_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wx_u16m1(vuint32m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m1(op1, shift, vl); + return __riscv_vnsrl_wx_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m2( @@ -174,7 +174,7 @@ vuint16m1_t test_vnsrl_wx_u16m1(vuint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wv_u16m2(vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsrl_wv_u16m2(op1, shift, vl); + return __riscv_vnsrl_wv_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m2( @@ -183,7 +183,7 @@ vuint16m2_t test_vnsrl_wv_u16m2(vuint32m4_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wx_u16m2(vuint32m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m2(op1, shift, vl); + return __riscv_vnsrl_wx_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m4( @@ -192,7 +192,7 @@ vuint16m2_t test_vnsrl_wx_u16m2(vuint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wv_u16m4(vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsrl_wv_u16m4(op1, shift, vl); + return __riscv_vnsrl_wv_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m4( @@ -201,7 +201,7 @@ vuint16m4_t test_vnsrl_wv_u16m4(vuint32m8_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wx_u16m4(vuint32m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m4(op1, shift, vl); + return __riscv_vnsrl_wx_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32mf2( @@ -210,7 +210,7 @@ vuint16m4_t test_vnsrl_wx_u16m4(vuint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wv_u32mf2(vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsrl_wv_u32mf2(op1, shift, vl); + return __riscv_vnsrl_wv_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32mf2( @@ -219,7 +219,7 @@ vuint32mf2_t test_vnsrl_wv_u32mf2(vuint64m1_t op1, vuint32mf2_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wx_u32mf2(vuint64m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32mf2(op1, shift, vl); + return __riscv_vnsrl_wx_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m1( @@ -228,7 +228,7 @@ vuint32mf2_t test_vnsrl_wx_u32mf2(vuint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wv_u32m1(vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsrl_wv_u32m1(op1, shift, vl); + return __riscv_vnsrl_wv_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m1( @@ -237,7 +237,7 @@ vuint32m1_t test_vnsrl_wv_u32m1(vuint64m2_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wx_u32m1(vuint64m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m1(op1, shift, vl); + return __riscv_vnsrl_wx_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m2( @@ -246,7 +246,7 @@ vuint32m1_t test_vnsrl_wx_u32m1(vuint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wv_u32m2(vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsrl_wv_u32m2(op1, shift, vl); + return __riscv_vnsrl_wv_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m2( @@ -255,7 +255,7 @@ vuint32m2_t test_vnsrl_wv_u32m2(vuint64m4_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wx_u32m2(vuint64m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m2(op1, shift, vl); + return __riscv_vnsrl_wx_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m4( @@ -264,7 +264,7 @@ vuint32m2_t test_vnsrl_wx_u32m2(vuint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wv_u32m4(vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsrl_wv_u32m4(op1, shift, vl); + return __riscv_vnsrl_wv_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m4( @@ -273,7 +273,7 @@ vuint32m4_t test_vnsrl_wv_u32m4(vuint64m8_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wx_u32m4(vuint64m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m4(op1, shift, vl); + return __riscv_vnsrl_wx_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf8_m( @@ -282,7 +282,7 @@ vuint32m4_t test_vnsrl_wx_u32m4(vuint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wv_u8mf8_m(vbool64_t mask, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsrl_wv_u8mf8_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf8_m( @@ -291,7 +291,7 @@ vuint8mf8_t test_vnsrl_wv_u8mf8_m(vbool64_t mask, vuint16mf4_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wx_u8mf8_m(vbool64_t mask, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf8_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf4_m( @@ -300,7 +300,7 @@ vuint8mf8_t test_vnsrl_wx_u8mf8_m(vbool64_t mask, vuint16mf4_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wv_u8mf4_m(vbool32_t mask, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsrl_wv_u8mf4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf4_m( @@ -309,7 +309,7 @@ vuint8mf4_t test_vnsrl_wv_u8mf4_m(vbool32_t mask, vuint16mf2_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wx_u8mf4_m(vbool32_t mask, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf2_m( @@ -318,7 +318,7 @@ vuint8mf4_t test_vnsrl_wx_u8mf4_m(vbool32_t mask, vuint16mf2_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wv_u8mf2_m(vbool16_t mask, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsrl_wv_u8mf2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf2_m( @@ -327,7 +327,7 @@ vuint8mf2_t test_vnsrl_wv_u8mf2_m(vbool16_t mask, vuint16m1_t op1, vuint8mf2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wx_u8mf2_m(vbool16_t mask, vuint16m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m1_m( @@ -336,7 +336,7 @@ vuint8mf2_t test_vnsrl_wx_u8mf2_m(vbool16_t mask, vuint16m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wv_u8m1_m(vbool8_t mask, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsrl_wv_u8m1_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m1_m( @@ -345,7 +345,7 @@ vuint8m1_t test_vnsrl_wv_u8m1_m(vbool8_t mask, vuint16m2_t op1, vuint8m1_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wx_u8m1_m(vbool8_t mask, vuint16m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m1_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m2_m( @@ -354,7 +354,7 @@ vuint8m1_t test_vnsrl_wx_u8m1_m(vbool8_t mask, vuint16m2_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wv_u8m2_m(vbool4_t mask, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsrl_wv_u8m2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m2_m( @@ -363,7 +363,7 @@ vuint8m2_t test_vnsrl_wv_u8m2_m(vbool4_t mask, vuint16m4_t op1, vuint8m2_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wx_u8m2_m(vbool4_t mask, vuint16m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m4_m( @@ -372,7 +372,7 @@ vuint8m2_t test_vnsrl_wx_u8m2_m(vbool4_t mask, vuint16m4_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wv_u8m4_m(vbool2_t mask, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsrl_wv_u8m4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m4_m( @@ -381,7 +381,7 @@ vuint8m4_t test_vnsrl_wv_u8m4_m(vbool2_t mask, vuint16m8_t op1, vuint8m4_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wx_u8m4_m(vbool2_t mask, vuint16m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf4_m( @@ -390,7 +390,7 @@ vuint8m4_t test_vnsrl_wx_u8m4_m(vbool2_t mask, vuint16m8_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wv_u16mf4_m(vbool64_t mask, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsrl_wv_u16mf4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf4_m( @@ -399,7 +399,7 @@ vuint16mf4_t test_vnsrl_wv_u16mf4_m(vbool64_t mask, vuint32mf2_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wx_u16mf4_m(vbool64_t mask, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf2_m( @@ -408,7 +408,7 @@ vuint16mf4_t test_vnsrl_wx_u16mf4_m(vbool64_t mask, vuint32mf2_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wv_u16mf2_m(vbool32_t mask, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsrl_wv_u16mf2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf2_m( @@ -417,7 +417,7 @@ vuint16mf2_t test_vnsrl_wv_u16mf2_m(vbool32_t mask, vuint32m1_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wx_u16mf2_m(vbool32_t mask, vuint32m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m1_m( @@ -426,7 +426,7 @@ vuint16mf2_t test_vnsrl_wx_u16mf2_m(vbool32_t mask, vuint32m1_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wv_u16m1_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsrl_wv_u16m1_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m1_m( @@ -435,7 +435,7 @@ vuint16m1_t test_vnsrl_wv_u16m1_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wx_u16m1_m(vbool16_t mask, vuint32m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m1_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m2_m( @@ -444,7 +444,7 @@ vuint16m1_t test_vnsrl_wx_u16m1_m(vbool16_t mask, vuint32m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wv_u16m2_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsrl_wv_u16m2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m2_m( @@ -453,7 +453,7 @@ vuint16m2_t test_vnsrl_wv_u16m2_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wx_u16m2_m(vbool8_t mask, vuint32m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m4_m( @@ -462,7 +462,7 @@ vuint16m2_t test_vnsrl_wx_u16m2_m(vbool8_t mask, vuint32m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wv_u16m4_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsrl_wv_u16m4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m4_m( @@ -471,7 +471,7 @@ vuint16m4_t test_vnsrl_wv_u16m4_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wx_u16m4_m(vbool4_t mask, vuint32m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32mf2_m( @@ -480,7 +480,7 @@ vuint16m4_t test_vnsrl_wx_u16m4_m(vbool4_t mask, vuint32m8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wv_u32mf2_m(vbool64_t mask, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsrl_wv_u32mf2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32mf2_m( @@ -489,7 +489,7 @@ vuint32mf2_t test_vnsrl_wv_u32mf2_m(vbool64_t mask, vuint64m1_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wx_u32mf2_m(vbool64_t mask, vuint64m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32mf2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m1_m( @@ -498,7 +498,7 @@ vuint32mf2_t test_vnsrl_wx_u32mf2_m(vbool64_t mask, vuint64m1_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wv_u32m1_m(vbool32_t mask, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsrl_wv_u32m1_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m1_m( @@ -507,7 +507,7 @@ vuint32m1_t test_vnsrl_wv_u32m1_m(vbool32_t mask, vuint64m2_t op1, vuint32m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wx_u32m1_m(vbool32_t mask, vuint64m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m1_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m2_m( @@ -516,7 +516,7 @@ vuint32m1_t test_vnsrl_wx_u32m1_m(vbool32_t mask, vuint64m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wv_u32m2_m(vbool16_t mask, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsrl_wv_u32m2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m2_m( @@ -525,7 +525,7 @@ vuint32m2_t test_vnsrl_wv_u32m2_m(vbool16_t mask, vuint64m4_t op1, vuint32m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wx_u32m2_m(vbool16_t mask, vuint64m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m2_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m4_m( @@ -534,7 +534,7 @@ vuint32m2_t test_vnsrl_wx_u32m2_m(vbool16_t mask, vuint64m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wv_u32m4_m(vbool8_t mask, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsrl_wv_u32m4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wv_u32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m4_m( @@ -543,6 +543,6 @@ vuint32m4_t test_vnsrl_wv_u32m4_m(vbool8_t mask, vuint64m8_t op1, vuint32m4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wx_u32m4_m(vbool8_t mask, vuint64m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m4_m(mask, op1, shift, vl); + return __riscv_vnsrl_wx_u32m4_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vor.c index 6a7a52a49a0b0d759b8556f3b8e010949f35b919..d5358def7a328f8acb3fe3e2e6baa093260d8a31 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vor_vv_i8mf8(op1, op2, vl); + return __riscv_vor_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vor_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf8(op1, op2, vl); + return __riscv_vor_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vor_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vor_vv_i8mf4(op1, op2, vl); + return __riscv_vor_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vor_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf4(op1, op2, vl); + return __riscv_vor_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vor_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vor_vv_i8mf2(op1, op2, vl); + return __riscv_vor_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vor_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf2(op1, op2, vl); + return __riscv_vor_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vor_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vor_vv_i8m1(op1, op2, vl); + return __riscv_vor_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vor_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m1(op1, op2, vl); + return __riscv_vor_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vor_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vor_vv_i8m2(op1, op2, vl); + return __riscv_vor_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vor_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m2(op1, op2, vl); + return __riscv_vor_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vor_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vor_vv_i8m4(op1, op2, vl); + return __riscv_vor_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vor_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m4(op1, op2, vl); + return __riscv_vor_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vor_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vor_vv_i8m8(op1, op2, vl); + return __riscv_vor_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vor_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m8(op1, op2, vl); + return __riscv_vor_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vor_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vor_vv_i16mf4(op1, op2, vl); + return __riscv_vor_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vor_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf4(op1, op2, vl); + return __riscv_vor_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vor_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vor_vv_i16mf2(op1, op2, vl); + return __riscv_vor_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vor_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf2(op1, op2, vl); + return __riscv_vor_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vor_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vor_vv_i16m1(op1, op2, vl); + return __riscv_vor_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vor_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m1(op1, op2, vl); + return __riscv_vor_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vor_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vor_vv_i16m2(op1, op2, vl); + return __riscv_vor_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vor_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m2(op1, op2, vl); + return __riscv_vor_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vor_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vor_vv_i16m4(op1, op2, vl); + return __riscv_vor_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vor_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m4(op1, op2, vl); + return __riscv_vor_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vor_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vor_vv_i16m8(op1, op2, vl); + return __riscv_vor_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vor_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m8(op1, op2, vl); + return __riscv_vor_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vor_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vor_vv_i32mf2(op1, op2, vl); + return __riscv_vor_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vor_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32mf2(op1, op2, vl); + return __riscv_vor_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vor_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vor_vv_i32m1(op1, op2, vl); + return __riscv_vor_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vor_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m1(op1, op2, vl); + return __riscv_vor_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vor_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vor_vv_i32m2(op1, op2, vl); + return __riscv_vor_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vor_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m2(op1, op2, vl); + return __riscv_vor_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vor_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vor_vv_i32m4(op1, op2, vl); + return __riscv_vor_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vor_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m4(op1, op2, vl); + return __riscv_vor_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vor_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vor_vv_i32m8(op1, op2, vl); + return __riscv_vor_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vor_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m8(op1, op2, vl); + return __riscv_vor_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vor_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vor_vv_i64m1(op1, op2, vl); + return __riscv_vor_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vor_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m1(op1, op2, vl); + return __riscv_vor_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vor_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vor_vv_i64m2(op1, op2, vl); + return __riscv_vor_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vor_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m2(op1, op2, vl); + return __riscv_vor_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vor_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vor_vv_i64m4(op1, op2, vl); + return __riscv_vor_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vor_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m4(op1, op2, vl); + return __riscv_vor_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vor_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vor_vv_i64m8(op1, op2, vl); + return __riscv_vor_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vor_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m8(op1, op2, vl); + return __riscv_vor_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vor_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vor_vv_u8mf8(op1, op2, vl); + return __riscv_vor_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vor_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf8(op1, op2, vl); + return __riscv_vor_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vor_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vor_vv_u8mf4(op1, op2, vl); + return __riscv_vor_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vor_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf4(op1, op2, vl); + return __riscv_vor_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vor_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vor_vv_u8mf2(op1, op2, vl); + return __riscv_vor_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vor_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf2(op1, op2, vl); + return __riscv_vor_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vor_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vor_vv_u8m1(op1, op2, vl); + return __riscv_vor_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vor_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m1(op1, op2, vl); + return __riscv_vor_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vor_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vor_vv_u8m2(op1, op2, vl); + return __riscv_vor_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vor_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m2(op1, op2, vl); + return __riscv_vor_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vor_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vor_vv_u8m4(op1, op2, vl); + return __riscv_vor_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vor_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m4(op1, op2, vl); + return __riscv_vor_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vor_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vor_vv_u8m8(op1, op2, vl); + return __riscv_vor_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vor_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m8(op1, op2, vl); + return __riscv_vor_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vor_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vor_vv_u16mf4(op1, op2, vl); + return __riscv_vor_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vor_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf4(op1, op2, vl); + return __riscv_vor_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vor_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vor_vv_u16mf2(op1, op2, vl); + return __riscv_vor_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vor_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf2(op1, op2, vl); + return __riscv_vor_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vor_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vor_vv_u16m1(op1, op2, vl); + return __riscv_vor_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vor_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m1(op1, op2, vl); + return __riscv_vor_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vor_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vor_vv_u16m2(op1, op2, vl); + return __riscv_vor_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vor_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m2(op1, op2, vl); + return __riscv_vor_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vor_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vor_vv_u16m4(op1, op2, vl); + return __riscv_vor_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vor_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m4(op1, op2, vl); + return __riscv_vor_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vor_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vor_vv_u16m8(op1, op2, vl); + return __riscv_vor_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vor_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m8(op1, op2, vl); + return __riscv_vor_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vor_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vor_vv_u32mf2(op1, op2, vl); + return __riscv_vor_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vor_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32mf2(op1, op2, vl); + return __riscv_vor_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vor_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vor_vv_u32m1(op1, op2, vl); + return __riscv_vor_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vor_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m1(op1, op2, vl); + return __riscv_vor_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vor_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vor_vv_u32m2(op1, op2, vl); + return __riscv_vor_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vor_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m2(op1, op2, vl); + return __riscv_vor_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vor_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vor_vv_u32m4(op1, op2, vl); + return __riscv_vor_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vor_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m4(op1, op2, vl); + return __riscv_vor_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vor_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vor_vv_u32m8(op1, op2, vl); + return __riscv_vor_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vor_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m8(op1, op2, vl); + return __riscv_vor_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vor_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vor_vv_u64m1(op1, op2, vl); + return __riscv_vor_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vor_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m1(op1, op2, vl); + return __riscv_vor_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vor_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vor_vv_u64m2(op1, op2, vl); + return __riscv_vor_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vor_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m2(op1, op2, vl); + return __riscv_vor_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vor_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vor_vv_u64m4(op1, op2, vl); + return __riscv_vor_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vor_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m4(op1, op2, vl); + return __riscv_vor_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vor_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vor_vv_u64m8(op1, op2, vl); + return __riscv_vor_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m8( @@ -795,7 +795,7 @@ vuint64m8_t test_vor_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m8(op1, op2, vl); + return __riscv_vor_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf8_m( @@ -804,7 +804,7 @@ vuint64m8_t test_vor_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vor_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vor_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf8_m( @@ -813,7 +813,7 @@ vint8mf8_t test_vor_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vor_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf4_m( @@ -822,7 +822,7 @@ vint8mf8_t test_vor_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vor_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vor_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf4_m( @@ -831,7 +831,7 @@ vint8mf4_t test_vor_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vor_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf2_m( @@ -840,7 +840,7 @@ vint8mf4_t test_vor_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vor_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vor_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf2_m( @@ -849,7 +849,7 @@ vint8mf2_t test_vor_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vor_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m1_m( @@ -858,7 +858,7 @@ vint8mf2_t test_vor_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vor_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vor_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m1_m( @@ -867,7 +867,7 @@ vint8m1_t test_vor_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vor_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m2_m( @@ -876,7 +876,7 @@ vint8m1_t test_vor_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vor_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vor_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m2_m( @@ -885,7 +885,7 @@ vint8m2_t test_vor_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vor_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m4_m( @@ -894,7 +894,7 @@ vint8m2_t test_vor_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vor_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vor_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m4_m( @@ -903,7 +903,7 @@ vint8m4_t test_vor_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vor_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m8_m( @@ -912,7 +912,7 @@ vint8m4_t test_vor_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vor_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vor_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m8_m( @@ -921,7 +921,7 @@ vint8m8_t test_vor_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vor_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf4_m( @@ -930,7 +930,7 @@ vint8m8_t test_vor_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vor_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vor_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf4_m( @@ -939,7 +939,7 @@ vint16mf4_t test_vor_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vor_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf2_m( @@ -948,7 +948,7 @@ vint16mf4_t test_vor_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vor_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vor_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf2_m( @@ -957,7 +957,7 @@ vint16mf2_t test_vor_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vor_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m1_m( @@ -966,7 +966,7 @@ vint16mf2_t test_vor_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vor_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vor_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m1_m( @@ -975,7 +975,7 @@ vint16m1_t test_vor_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vor_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m2_m( @@ -984,7 +984,7 @@ vint16m1_t test_vor_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vor_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vor_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m2_m( @@ -993,7 +993,7 @@ vint16m2_t test_vor_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vor_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m4_m( @@ -1002,7 +1002,7 @@ vint16m2_t test_vor_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vor_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vor_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m4_m( @@ -1011,7 +1011,7 @@ vint16m4_t test_vor_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vor_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m8_m( @@ -1020,7 +1020,7 @@ vint16m4_t test_vor_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vor_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vor_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m8_m( @@ -1029,7 +1029,7 @@ vint16m8_t test_vor_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vor_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32mf2_m( @@ -1038,7 +1038,7 @@ vint16m8_t test_vor_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vor_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vor_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32mf2_m( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vor_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vor_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m1_m( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vor_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vor_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vor_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m1_m( @@ -1065,7 +1065,7 @@ vint32m1_t test_vor_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vor_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m2_m( @@ -1074,7 +1074,7 @@ vint32m1_t test_vor_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vor_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vor_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m2_m( @@ -1083,7 +1083,7 @@ vint32m2_t test_vor_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vor_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m4_m( @@ -1092,7 +1092,7 @@ vint32m2_t test_vor_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vor_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vor_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m4_m( @@ -1101,7 +1101,7 @@ vint32m4_t test_vor_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vor_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m8_m( @@ -1110,7 +1110,7 @@ vint32m4_t test_vor_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vor_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vor_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m8_m( @@ -1119,7 +1119,7 @@ vint32m8_t test_vor_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vor_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m1_m( @@ -1128,7 +1128,7 @@ vint32m8_t test_vor_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vor_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vor_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m1_m( @@ -1137,7 +1137,7 @@ vint64m1_t test_vor_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vor_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m2_m( @@ -1146,7 +1146,7 @@ vint64m1_t test_vor_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vor_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vor_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m2_m( @@ -1155,7 +1155,7 @@ vint64m2_t test_vor_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vor_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m4_m( @@ -1164,7 +1164,7 @@ vint64m2_t test_vor_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vor_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vor_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m4_m( @@ -1173,7 +1173,7 @@ vint64m4_t test_vor_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vor_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m8_m( @@ -1182,7 +1182,7 @@ vint64m4_t test_vor_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vor_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vor_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m8_m( @@ -1191,7 +1191,7 @@ vint64m8_t test_vor_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vor_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf8_m( @@ -1200,7 +1200,7 @@ vint64m8_t test_vor_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vor_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vor_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf8_m( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vor_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vor_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf4_m( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vor_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vor_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vor_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf4_m( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vor_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vor_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf2_m( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vor_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vor_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vor_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf2_m( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vor_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vor_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m1_m( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vor_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vor_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vor_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m1_m( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vor_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vor_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m2_m( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vor_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vor_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vor_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m2_m( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vor_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vor_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m4_m( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vor_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vor_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vor_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m4_m( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vor_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vor_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m8_m( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vor_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vor_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vor_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m8_m( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vor_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vor_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf4_m( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vor_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vor_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vor_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf4_m( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vor_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vor_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf2_m( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vor_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vor_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vor_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf2_m( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vor_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vor_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m1_m( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vor_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vor_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vor_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m1_m( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vor_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vor_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m2_m( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vor_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vor_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vor_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m2_m( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vor_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vor_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m4_m( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vor_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vor_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vor_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m4_m( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vor_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vor_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m8_m( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vor_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vor_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vor_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m8_m( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vor_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vor_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32mf2_m( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vor_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vor_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vor_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32mf2_m( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vor_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vor_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m1_m( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vor_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vor_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vor_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m1_m( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vor_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vor_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m2_m( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vor_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vor_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vor_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m2_m( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vor_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vor_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m4_m( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vor_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vor_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vor_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m4_m( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vor_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vor_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m8_m( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vor_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vor_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vor_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m8_m( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vor_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vor_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m1_m( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vor_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vor_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vor_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m1_m( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vor_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vor_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m2_m( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vor_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vor_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vor_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m2_m( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vor_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vor_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m4_m( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vor_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vor_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vor_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m4_m( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vor_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vor_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m8_m( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vor_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vor_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vor_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m8_m( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vor_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vor_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredand.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredand.c index 82b03e8c3f0ae9b383f267bac700ec9cad1afbf9..c2d942f05b5e07f74cf7919e706203baf281cb87 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredand.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredand.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf8_i8m1(vector, scalar, vl); + return __riscv_vredand_vs_i8mf8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf4_i8m1( @@ -21,7 +21,7 @@ vint8m1_t test_vredand_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf4_i8m1(vector, scalar, vl); + return __riscv_vredand_vs_i8mf4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf2_i8m1( @@ -30,7 +30,7 @@ vint8m1_t test_vredand_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf2_i8m1(vector, scalar, vl); + return __riscv_vredand_vs_i8mf2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m1_i8m1( @@ -39,7 +39,7 @@ vint8m1_t test_vredand_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m1_i8m1(vector, scalar, vl); + return __riscv_vredand_vs_i8m1_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m2_i8m1( @@ -48,7 +48,7 @@ vint8m1_t test_vredand_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m2_i8m1(vector, scalar, vl); + return __riscv_vredand_vs_i8m2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m4_i8m1( @@ -57,7 +57,7 @@ vint8m1_t test_vredand_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m4_i8m1(vector, scalar, vl); + return __riscv_vredand_vs_i8m4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m8_i8m1( @@ -66,7 +66,7 @@ vint8m1_t test_vredand_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m8_i8m1(vector, scalar, vl); + return __riscv_vredand_vs_i8m8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16mf4_i16m1( @@ -75,7 +75,7 @@ vint8m1_t test_vredand_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16mf4_i16m1(vector, scalar, vl); + return __riscv_vredand_vs_i16mf4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16mf2_i16m1( @@ -84,7 +84,7 @@ vint16m1_t test_vredand_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16mf2_i16m1(vector, scalar, vl); + return __riscv_vredand_vs_i16mf2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m1_i16m1( @@ -93,7 +93,7 @@ vint16m1_t test_vredand_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m1_i16m1(vector, scalar, vl); + return __riscv_vredand_vs_i16m1_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m2_i16m1( @@ -102,7 +102,7 @@ vint16m1_t test_vredand_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m2_i16m1(vector, scalar, vl); + return __riscv_vredand_vs_i16m2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m4_i16m1( @@ -111,7 +111,7 @@ vint16m1_t test_vredand_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m4_i16m1(vector, scalar, vl); + return __riscv_vredand_vs_i16m4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m8_i16m1( @@ -120,7 +120,7 @@ vint16m1_t test_vredand_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m8_i16m1(vector, scalar, vl); + return __riscv_vredand_vs_i16m8_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32mf2_i32m1( @@ -129,7 +129,7 @@ vint16m1_t test_vredand_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32mf2_i32m1(vector, scalar, vl); + return __riscv_vredand_vs_i32mf2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m1_i32m1( @@ -138,7 +138,7 @@ vint32m1_t test_vredand_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m1_i32m1(vector, scalar, vl); + return __riscv_vredand_vs_i32m1_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m2_i32m1( @@ -147,7 +147,7 @@ vint32m1_t test_vredand_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m2_i32m1(vector, scalar, vl); + return __riscv_vredand_vs_i32m2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m4_i32m1( @@ -156,7 +156,7 @@ vint32m1_t test_vredand_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m4_i32m1(vector, scalar, vl); + return __riscv_vredand_vs_i32m4_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m8_i32m1( @@ -165,7 +165,7 @@ vint32m1_t test_vredand_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m8_i32m1(vector, scalar, vl); + return __riscv_vredand_vs_i32m8_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m1_i64m1( @@ -174,7 +174,7 @@ vint32m1_t test_vredand_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m1_i64m1(vector, scalar, vl); + return __riscv_vredand_vs_i64m1_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m2_i64m1( @@ -183,7 +183,7 @@ vint64m1_t test_vredand_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m2_i64m1(vector, scalar, vl); + return __riscv_vredand_vs_i64m2_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m4_i64m1( @@ -192,7 +192,7 @@ vint64m1_t test_vredand_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m4_i64m1(vector, scalar, vl); + return __riscv_vredand_vs_i64m4_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m8_i64m1( @@ -201,7 +201,7 @@ vint64m1_t test_vredand_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m8_i64m1(vector, scalar, vl); + return __riscv_vredand_vs_i64m8_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf8_u8m1( @@ -210,7 +210,7 @@ vint64m1_t test_vredand_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf8_u8m1(vector, scalar, vl); + return __riscv_vredand_vs_u8mf8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf4_u8m1( @@ -219,7 +219,7 @@ vuint8m1_t test_vredand_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf4_u8m1(vector, scalar, vl); + return __riscv_vredand_vs_u8mf4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf2_u8m1( @@ -228,7 +228,7 @@ vuint8m1_t test_vredand_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf2_u8m1(vector, scalar, vl); + return __riscv_vredand_vs_u8mf2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m1_u8m1( @@ -237,7 +237,7 @@ vuint8m1_t test_vredand_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m1_u8m1(vector, scalar, vl); + return __riscv_vredand_vs_u8m1_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m2_u8m1( @@ -246,7 +246,7 @@ vuint8m1_t test_vredand_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m2_u8m1(vector, scalar, vl); + return __riscv_vredand_vs_u8m2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m4_u8m1( @@ -255,7 +255,7 @@ vuint8m1_t test_vredand_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m4_u8m1(vector, scalar, vl); + return __riscv_vredand_vs_u8m4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m8_u8m1( @@ -264,7 +264,7 @@ vuint8m1_t test_vredand_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m8_u8m1(vector, scalar, vl); + return __riscv_vredand_vs_u8m8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16mf4_u16m1( @@ -273,7 +273,7 @@ vuint8m1_t test_vredand_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16mf4_u16m1(vector, scalar, vl); + return __riscv_vredand_vs_u16mf4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16mf2_u16m1( @@ -282,7 +282,7 @@ vuint16m1_t test_vredand_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16mf2_u16m1(vector, scalar, vl); + return __riscv_vredand_vs_u16mf2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m1_u16m1( @@ -291,7 +291,7 @@ vuint16m1_t test_vredand_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m1_u16m1(vector, scalar, vl); + return __riscv_vredand_vs_u16m1_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m2_u16m1( @@ -300,7 +300,7 @@ vuint16m1_t test_vredand_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m2_u16m1(vector, scalar, vl); + return __riscv_vredand_vs_u16m2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m4_u16m1( @@ -309,7 +309,7 @@ vuint16m1_t test_vredand_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m4_u16m1(vector, scalar, vl); + return __riscv_vredand_vs_u16m4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m8_u16m1( @@ -318,7 +318,7 @@ vuint16m1_t test_vredand_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m8_u16m1(vector, scalar, vl); + return __riscv_vredand_vs_u16m8_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32mf2_u32m1( @@ -327,7 +327,7 @@ vuint16m1_t test_vredand_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32mf2_u32m1(vector, scalar, vl); + return __riscv_vredand_vs_u32mf2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m1_u32m1( @@ -336,7 +336,7 @@ vuint32m1_t test_vredand_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m1_u32m1(vector, scalar, vl); + return __riscv_vredand_vs_u32m1_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m2_u32m1( @@ -345,7 +345,7 @@ vuint32m1_t test_vredand_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m2_u32m1(vector, scalar, vl); + return __riscv_vredand_vs_u32m2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m4_u32m1( @@ -354,7 +354,7 @@ vuint32m1_t test_vredand_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m4_u32m1(vector, scalar, vl); + return __riscv_vredand_vs_u32m4_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m8_u32m1( @@ -363,7 +363,7 @@ vuint32m1_t test_vredand_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m8_u32m1(vector, scalar, vl); + return __riscv_vredand_vs_u32m8_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m1_u64m1( @@ -372,7 +372,7 @@ vuint32m1_t test_vredand_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m1_u64m1(vector, scalar, vl); + return __riscv_vredand_vs_u64m1_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m2_u64m1( @@ -381,7 +381,7 @@ vuint64m1_t test_vredand_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m2_u64m1(vector, scalar, vl); + return __riscv_vredand_vs_u64m2_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m4_u64m1( @@ -390,7 +390,7 @@ vuint64m1_t test_vredand_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m4_u64m1(vector, scalar, vl); + return __riscv_vredand_vs_u64m4_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m8_u64m1( @@ -399,7 +399,7 @@ vuint64m1_t test_vredand_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m8_u64m1(vector, scalar, vl); + return __riscv_vredand_vs_u64m8_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf8_i8m1_m( @@ -408,7 +408,7 @@ vuint64m1_t test_vredand_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf4_i8m1_m( @@ -417,7 +417,7 @@ vint8m1_t test_vredand_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf2_i8m1_m( @@ -426,7 +426,7 @@ vint8m1_t test_vredand_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m1_i8m1_m( @@ -435,7 +435,7 @@ vint8m1_t test_vredand_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m1_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i8m1_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m2_i8m1_m( @@ -444,7 +444,7 @@ vint8m1_t test_vredand_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i8m2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m4_i8m1_m( @@ -453,7 +453,7 @@ vint8m1_t test_vredand_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i8m4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m8_i8m1_m( @@ -462,7 +462,7 @@ vint8m1_t test_vredand_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i8m8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16mf4_i16m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vredand_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16mf2_i16m1_m( @@ -480,7 +480,7 @@ vint16m1_t test_vredand_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m1_i16m1_m( @@ -489,7 +489,7 @@ vint16m1_t test_vredand_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m1_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i16m1_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m2_i16m1_m( @@ -498,7 +498,7 @@ vint16m1_t test_vredand_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i16m2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m4_i16m1_m( @@ -507,7 +507,7 @@ vint16m1_t test_vredand_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i16m4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m8_i16m1_m( @@ -516,7 +516,7 @@ vint16m1_t test_vredand_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m8_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i16m8_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32mf2_i32m1_m( @@ -525,7 +525,7 @@ vint16m1_t test_vredand_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m1_i32m1_m( @@ -534,7 +534,7 @@ vint32m1_t test_vredand_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m1_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i32m1_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m2_i32m1_m( @@ -543,7 +543,7 @@ vint32m1_t test_vredand_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i32m2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m4_i32m1_m( @@ -552,7 +552,7 @@ vint32m1_t test_vredand_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m4_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i32m4_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m8_i32m1_m( @@ -561,7 +561,7 @@ vint32m1_t test_vredand_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m8_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i32m8_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m1_i64m1_m( @@ -570,7 +570,7 @@ vint32m1_t test_vredand_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m1_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i64m1_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m2_i64m1_m( @@ -579,7 +579,7 @@ vint64m1_t test_vredand_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m2_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i64m2_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m4_i64m1_m( @@ -588,7 +588,7 @@ vint64m1_t test_vredand_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m4_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i64m4_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m8_i64m1_m( @@ -597,7 +597,7 @@ vint64m1_t test_vredand_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m8_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_i64m8_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf8_u8m1_m( @@ -606,7 +606,7 @@ vint64m1_t test_vredand_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf4_u8m1_m( @@ -615,7 +615,7 @@ vuint8m1_t test_vredand_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf2_u8m1_m( @@ -624,7 +624,7 @@ vuint8m1_t test_vredand_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m1_u8m1_m( @@ -633,7 +633,7 @@ vuint8m1_t test_vredand_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m1_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u8m1_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m2_u8m1_m( @@ -642,7 +642,7 @@ vuint8m1_t test_vredand_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u8m2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m4_u8m1_m( @@ -651,7 +651,7 @@ vuint8m1_t test_vredand_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u8m4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m8_u8m1_m( @@ -660,7 +660,7 @@ vuint8m1_t test_vredand_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u8m8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16mf4_u16m1_m( @@ -669,7 +669,7 @@ vuint8m1_t test_vredand_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16mf2_u16m1_m( @@ -678,7 +678,7 @@ vuint16m1_t test_vredand_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m1_u16m1_m( @@ -687,7 +687,7 @@ vuint16m1_t test_vredand_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m1_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u16m1_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m2_u16m1_m( @@ -696,7 +696,7 @@ vuint16m1_t test_vredand_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u16m2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m4_u16m1_m( @@ -705,7 +705,7 @@ vuint16m1_t test_vredand_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u16m4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m8_u16m1_m( @@ -714,7 +714,7 @@ vuint16m1_t test_vredand_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m8_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u16m8_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32mf2_u32m1_m( @@ -723,7 +723,7 @@ vuint16m1_t test_vredand_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m1_u32m1_m( @@ -732,7 +732,7 @@ vuint32m1_t test_vredand_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m1_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u32m1_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m2_u32m1_m( @@ -741,7 +741,7 @@ vuint32m1_t test_vredand_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u32m2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m4_u32m1_m( @@ -750,7 +750,7 @@ vuint32m1_t test_vredand_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m4_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u32m4_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m8_u32m1_m( @@ -759,7 +759,7 @@ vuint32m1_t test_vredand_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m8_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u32m8_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m1_u64m1_m( @@ -768,7 +768,7 @@ vuint32m1_t test_vredand_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m1_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u64m1_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m2_u64m1_m( @@ -777,7 +777,7 @@ vuint64m1_t test_vredand_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m2_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u64m2_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m4_u64m1_m( @@ -786,7 +786,7 @@ vuint64m1_t test_vredand_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m4_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u64m4_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m8_u64m1_m( @@ -795,6 +795,6 @@ vuint64m1_t test_vredand_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m8_u64m1_m(vbool8_t mask, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m8_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredand_vs_u64m8_u64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmax.c index 539fa5909fab169c82eb5f5b2638ea6c12aafe1c..a6e3217db99419d35ddc73c554b1a74f701585e8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmax.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmax.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf8_i8m1(vector, scalar, vl); + return __riscv_vredmax_vs_i8mf8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf4_i8m1( @@ -21,7 +21,7 @@ vint8m1_t test_vredmax_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf4_i8m1(vector, scalar, vl); + return __riscv_vredmax_vs_i8mf4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf2_i8m1( @@ -30,7 +30,7 @@ vint8m1_t test_vredmax_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf2_i8m1(vector, scalar, vl); + return __riscv_vredmax_vs_i8mf2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m1_i8m1( @@ -39,7 +39,7 @@ vint8m1_t test_vredmax_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m1_i8m1(vector, scalar, vl); + return __riscv_vredmax_vs_i8m1_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m2_i8m1( @@ -48,7 +48,7 @@ vint8m1_t test_vredmax_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m2_i8m1(vector, scalar, vl); + return __riscv_vredmax_vs_i8m2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m4_i8m1( @@ -57,7 +57,7 @@ vint8m1_t test_vredmax_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m4_i8m1(vector, scalar, vl); + return __riscv_vredmax_vs_i8m4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m8_i8m1( @@ -66,7 +66,7 @@ vint8m1_t test_vredmax_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m8_i8m1(vector, scalar, vl); + return __riscv_vredmax_vs_i8m8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16mf4_i16m1( @@ -75,7 +75,7 @@ vint8m1_t test_vredmax_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16mf4_i16m1(vector, scalar, vl); + return __riscv_vredmax_vs_i16mf4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16mf2_i16m1( @@ -84,7 +84,7 @@ vint16m1_t test_vredmax_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16mf2_i16m1(vector, scalar, vl); + return __riscv_vredmax_vs_i16mf2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m1_i16m1( @@ -93,7 +93,7 @@ vint16m1_t test_vredmax_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m1_i16m1(vector, scalar, vl); + return __riscv_vredmax_vs_i16m1_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m2_i16m1( @@ -102,7 +102,7 @@ vint16m1_t test_vredmax_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m2_i16m1(vector, scalar, vl); + return __riscv_vredmax_vs_i16m2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m4_i16m1( @@ -111,7 +111,7 @@ vint16m1_t test_vredmax_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m4_i16m1(vector, scalar, vl); + return __riscv_vredmax_vs_i16m4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m8_i16m1( @@ -120,7 +120,7 @@ vint16m1_t test_vredmax_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m8_i16m1(vector, scalar, vl); + return __riscv_vredmax_vs_i16m8_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32mf2_i32m1( @@ -129,7 +129,7 @@ vint16m1_t test_vredmax_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32mf2_i32m1(vector, scalar, vl); + return __riscv_vredmax_vs_i32mf2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m1_i32m1( @@ -138,7 +138,7 @@ vint32m1_t test_vredmax_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m1_i32m1(vector, scalar, vl); + return __riscv_vredmax_vs_i32m1_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m2_i32m1( @@ -147,7 +147,7 @@ vint32m1_t test_vredmax_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m2_i32m1(vector, scalar, vl); + return __riscv_vredmax_vs_i32m2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m4_i32m1( @@ -156,7 +156,7 @@ vint32m1_t test_vredmax_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m4_i32m1(vector, scalar, vl); + return __riscv_vredmax_vs_i32m4_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m8_i32m1( @@ -165,7 +165,7 @@ vint32m1_t test_vredmax_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m8_i32m1(vector, scalar, vl); + return __riscv_vredmax_vs_i32m8_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m1_i64m1( @@ -174,7 +174,7 @@ vint32m1_t test_vredmax_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m1_i64m1(vector, scalar, vl); + return __riscv_vredmax_vs_i64m1_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m2_i64m1( @@ -183,7 +183,7 @@ vint64m1_t test_vredmax_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m2_i64m1(vector, scalar, vl); + return __riscv_vredmax_vs_i64m2_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m4_i64m1( @@ -192,7 +192,7 @@ vint64m1_t test_vredmax_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m4_i64m1(vector, scalar, vl); + return __riscv_vredmax_vs_i64m4_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m8_i64m1( @@ -201,7 +201,7 @@ vint64m1_t test_vredmax_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m8_i64m1(vector, scalar, vl); + return __riscv_vredmax_vs_i64m8_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf8_i8m1_m( @@ -210,7 +210,7 @@ vint64m1_t test_vredmax_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf4_i8m1_m( @@ -219,7 +219,7 @@ vint8m1_t test_vredmax_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf2_i8m1_m( @@ -228,7 +228,7 @@ vint8m1_t test_vredmax_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m1_i8m1_m( @@ -237,7 +237,7 @@ vint8m1_t test_vredmax_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m1_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i8m1_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m2_i8m1_m( @@ -246,7 +246,7 @@ vint8m1_t test_vredmax_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i8m2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m4_i8m1_m( @@ -255,7 +255,7 @@ vint8m1_t test_vredmax_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i8m4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m8_i8m1_m( @@ -264,7 +264,7 @@ vint8m1_t test_vredmax_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i8m8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16mf4_i16m1_m( @@ -273,7 +273,7 @@ vint8m1_t test_vredmax_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16mf2_i16m1_m( @@ -282,7 +282,7 @@ vint16m1_t test_vredmax_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m1_i16m1_m( @@ -291,7 +291,7 @@ vint16m1_t test_vredmax_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m1_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i16m1_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m2_i16m1_m( @@ -300,7 +300,7 @@ vint16m1_t test_vredmax_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i16m2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m4_i16m1_m( @@ -309,7 +309,7 @@ vint16m1_t test_vredmax_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i16m4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m8_i16m1_m( @@ -318,7 +318,7 @@ vint16m1_t test_vredmax_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m8_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i16m8_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32mf2_i32m1_m( @@ -327,7 +327,7 @@ vint16m1_t test_vredmax_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m1_i32m1_m( @@ -336,7 +336,7 @@ vint32m1_t test_vredmax_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m1_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i32m1_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m2_i32m1_m( @@ -345,7 +345,7 @@ vint32m1_t test_vredmax_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i32m2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m4_i32m1_m( @@ -354,7 +354,7 @@ vint32m1_t test_vredmax_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m4_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i32m4_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m8_i32m1_m( @@ -363,7 +363,7 @@ vint32m1_t test_vredmax_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m8_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i32m8_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m1_i64m1_m( @@ -372,7 +372,7 @@ vint32m1_t test_vredmax_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m1_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i64m1_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m2_i64m1_m( @@ -381,7 +381,7 @@ vint64m1_t test_vredmax_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m2_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i64m2_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m4_i64m1_m( @@ -390,7 +390,7 @@ vint64m1_t test_vredmax_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m4_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i64m4_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m8_i64m1_m( @@ -399,6 +399,6 @@ vint64m1_t test_vredmax_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m8_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredmax_vs_i64m8_i64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmaxu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmaxu.c index 605c36b55eada42e53eebcfdec3f55743b20b99b..7c019b36adc9e28d9affec233a8467361fa9dd11 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmaxu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmaxu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf8_u8m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf4_u8m1( @@ -21,7 +21,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf4_u8m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf2_u8m1( @@ -30,7 +30,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf2_u8m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m1_u8m1( @@ -39,7 +39,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m1_u8m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m1_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m2_u8m1( @@ -48,7 +48,7 @@ vuint8m1_t test_vredmaxu_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m2_u8m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m4_u8m1( @@ -57,7 +57,7 @@ vuint8m1_t test_vredmaxu_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m4_u8m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m8_u8m1( @@ -66,7 +66,7 @@ vuint8m1_t test_vredmaxu_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m8_u8m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16mf4_u16m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vredmaxu_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16mf4_u16m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u16mf4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16mf2_u16m1( @@ -84,7 +84,7 @@ vuint16m1_t test_vredmaxu_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scala // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16mf2_u16m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u16mf2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m1_u16m1( @@ -93,7 +93,7 @@ vuint16m1_t test_vredmaxu_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scala // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m1_u16m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m1_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m2_u16m1( @@ -102,7 +102,7 @@ vuint16m1_t test_vredmaxu_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m2_u16m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m4_u16m1( @@ -111,7 +111,7 @@ vuint16m1_t test_vredmaxu_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m4_u16m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m8_u16m1( @@ -120,7 +120,7 @@ vuint16m1_t test_vredmaxu_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m8_u16m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m8_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32mf2_u32m1( @@ -129,7 +129,7 @@ vuint16m1_t test_vredmaxu_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32mf2_u32m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u32mf2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m1_u32m1( @@ -138,7 +138,7 @@ vuint32m1_t test_vredmaxu_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scala // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m1_u32m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m1_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m2_u32m1( @@ -147,7 +147,7 @@ vuint32m1_t test_vredmaxu_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m2_u32m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m4_u32m1( @@ -156,7 +156,7 @@ vuint32m1_t test_vredmaxu_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m4_u32m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m4_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m8_u32m1( @@ -165,7 +165,7 @@ vuint32m1_t test_vredmaxu_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m8_u32m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m8_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m1_u64m1( @@ -174,7 +174,7 @@ vuint32m1_t test_vredmaxu_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m1_u64m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m1_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m2_u64m1( @@ -183,7 +183,7 @@ vuint64m1_t test_vredmaxu_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m2_u64m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m2_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m4_u64m1( @@ -192,7 +192,7 @@ vuint64m1_t test_vredmaxu_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m4_u64m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m4_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m8_u64m1( @@ -201,7 +201,7 @@ vuint64m1_t test_vredmaxu_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m8_u64m1(vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m8_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf8_u8m1_m( @@ -210,7 +210,7 @@ vuint64m1_t test_vredmaxu_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf4_u8m1_m( @@ -219,7 +219,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf2_u8m1_m( @@ -228,7 +228,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m1_u8m1_m( @@ -237,7 +237,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m1_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m1_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m2_u8m1_m( @@ -246,7 +246,7 @@ vuint8m1_t test_vredmaxu_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m4_u8m1_m( @@ -255,7 +255,7 @@ vuint8m1_t test_vredmaxu_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m8_u8m1_m( @@ -264,7 +264,7 @@ vuint8m1_t test_vredmaxu_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16mf4_u16m1_m( @@ -273,7 +273,7 @@ vuint8m1_t test_vredmaxu_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16mf2_u16m1_m( @@ -282,7 +282,7 @@ vuint16m1_t test_vredmaxu_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m1_u16m1_m( @@ -291,7 +291,7 @@ vuint16m1_t test_vredmaxu_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m1_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m1_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m2_u16m1_m( @@ -300,7 +300,7 @@ vuint16m1_t test_vredmaxu_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m4_u16m1_m( @@ -309,7 +309,7 @@ vuint16m1_t test_vredmaxu_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m8_u16m1_m( @@ -318,7 +318,7 @@ vuint16m1_t test_vredmaxu_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m8_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m8_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32mf2_u32m1_m( @@ -327,7 +327,7 @@ vuint16m1_t test_vredmaxu_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m1_u32m1_m( @@ -336,7 +336,7 @@ vuint32m1_t test_vredmaxu_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m1_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m1_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m2_u32m1_m( @@ -345,7 +345,7 @@ vuint32m1_t test_vredmaxu_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m4_u32m1_m( @@ -354,7 +354,7 @@ vuint32m1_t test_vredmaxu_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m4_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m4_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m8_u32m1_m( @@ -363,7 +363,7 @@ vuint32m1_t test_vredmaxu_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m8_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m8_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m1_u64m1_m( @@ -372,7 +372,7 @@ vuint32m1_t test_vredmaxu_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m1_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m1_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m2_u64m1_m( @@ -381,7 +381,7 @@ vuint64m1_t test_vredmaxu_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m2_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m2_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m4_u64m1_m( @@ -390,7 +390,7 @@ vuint64m1_t test_vredmaxu_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m4_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m4_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m8_u64m1_m( @@ -399,6 +399,6 @@ vuint64m1_t test_vredmaxu_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m8_u64m1_m(vbool8_t mask, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m8_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m8_u64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmin.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmin.c index 78634f4966f0afdb070601cbda632f15e8954313..c89e388485250f7d271d04d51ab3a06942ecb36a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmin.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredmin.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf8_i8m1(vector, scalar, vl); + return __riscv_vredmin_vs_i8mf8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf4_i8m1( @@ -21,7 +21,7 @@ vint8m1_t test_vredmin_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf4_i8m1(vector, scalar, vl); + return __riscv_vredmin_vs_i8mf4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf2_i8m1( @@ -30,7 +30,7 @@ vint8m1_t test_vredmin_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf2_i8m1(vector, scalar, vl); + return __riscv_vredmin_vs_i8mf2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m1_i8m1( @@ -39,7 +39,7 @@ vint8m1_t test_vredmin_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m1_i8m1(vector, scalar, vl); + return __riscv_vredmin_vs_i8m1_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m2_i8m1( @@ -48,7 +48,7 @@ vint8m1_t test_vredmin_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m2_i8m1(vector, scalar, vl); + return __riscv_vredmin_vs_i8m2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m4_i8m1( @@ -57,7 +57,7 @@ vint8m1_t test_vredmin_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m4_i8m1(vector, scalar, vl); + return __riscv_vredmin_vs_i8m4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m8_i8m1( @@ -66,7 +66,7 @@ vint8m1_t test_vredmin_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m8_i8m1(vector, scalar, vl); + return __riscv_vredmin_vs_i8m8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16mf4_i16m1( @@ -75,7 +75,7 @@ vint8m1_t test_vredmin_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16mf4_i16m1(vector, scalar, vl); + return __riscv_vredmin_vs_i16mf4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16mf2_i16m1( @@ -84,7 +84,7 @@ vint16m1_t test_vredmin_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16mf2_i16m1(vector, scalar, vl); + return __riscv_vredmin_vs_i16mf2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m1_i16m1( @@ -93,7 +93,7 @@ vint16m1_t test_vredmin_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m1_i16m1(vector, scalar, vl); + return __riscv_vredmin_vs_i16m1_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m2_i16m1( @@ -102,7 +102,7 @@ vint16m1_t test_vredmin_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m2_i16m1(vector, scalar, vl); + return __riscv_vredmin_vs_i16m2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m4_i16m1( @@ -111,7 +111,7 @@ vint16m1_t test_vredmin_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m4_i16m1(vector, scalar, vl); + return __riscv_vredmin_vs_i16m4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m8_i16m1( @@ -120,7 +120,7 @@ vint16m1_t test_vredmin_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m8_i16m1(vector, scalar, vl); + return __riscv_vredmin_vs_i16m8_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32mf2_i32m1( @@ -129,7 +129,7 @@ vint16m1_t test_vredmin_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32mf2_i32m1(vector, scalar, vl); + return __riscv_vredmin_vs_i32mf2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m1_i32m1( @@ -138,7 +138,7 @@ vint32m1_t test_vredmin_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m1_i32m1(vector, scalar, vl); + return __riscv_vredmin_vs_i32m1_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m2_i32m1( @@ -147,7 +147,7 @@ vint32m1_t test_vredmin_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m2_i32m1(vector, scalar, vl); + return __riscv_vredmin_vs_i32m2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m4_i32m1( @@ -156,7 +156,7 @@ vint32m1_t test_vredmin_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m4_i32m1(vector, scalar, vl); + return __riscv_vredmin_vs_i32m4_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m8_i32m1( @@ -165,7 +165,7 @@ vint32m1_t test_vredmin_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m8_i32m1(vector, scalar, vl); + return __riscv_vredmin_vs_i32m8_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m1_i64m1( @@ -174,7 +174,7 @@ vint32m1_t test_vredmin_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m1_i64m1(vector, scalar, vl); + return __riscv_vredmin_vs_i64m1_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m2_i64m1( @@ -183,7 +183,7 @@ vint64m1_t test_vredmin_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m2_i64m1(vector, scalar, vl); + return __riscv_vredmin_vs_i64m2_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m4_i64m1( @@ -192,7 +192,7 @@ vint64m1_t test_vredmin_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m4_i64m1(vector, scalar, vl); + return __riscv_vredmin_vs_i64m4_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m8_i64m1( @@ -201,7 +201,7 @@ vint64m1_t test_vredmin_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m8_i64m1(vector, scalar, vl); + return __riscv_vredmin_vs_i64m8_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf8_i8m1_m( @@ -210,7 +210,7 @@ vint64m1_t test_vredmin_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf4_i8m1_m( @@ -219,7 +219,7 @@ vint8m1_t test_vredmin_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf2_i8m1_m( @@ -228,7 +228,7 @@ vint8m1_t test_vredmin_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m1_i8m1_m( @@ -237,7 +237,7 @@ vint8m1_t test_vredmin_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m1_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i8m1_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m2_i8m1_m( @@ -246,7 +246,7 @@ vint8m1_t test_vredmin_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i8m2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m4_i8m1_m( @@ -255,7 +255,7 @@ vint8m1_t test_vredmin_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i8m4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m8_i8m1_m( @@ -264,7 +264,7 @@ vint8m1_t test_vredmin_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i8m8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16mf4_i16m1_m( @@ -273,7 +273,7 @@ vint8m1_t test_vredmin_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16mf2_i16m1_m( @@ -282,7 +282,7 @@ vint16m1_t test_vredmin_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m1_i16m1_m( @@ -291,7 +291,7 @@ vint16m1_t test_vredmin_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m1_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i16m1_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m2_i16m1_m( @@ -300,7 +300,7 @@ vint16m1_t test_vredmin_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i16m2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m4_i16m1_m( @@ -309,7 +309,7 @@ vint16m1_t test_vredmin_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i16m4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m8_i16m1_m( @@ -318,7 +318,7 @@ vint16m1_t test_vredmin_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m8_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i16m8_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32mf2_i32m1_m( @@ -327,7 +327,7 @@ vint16m1_t test_vredmin_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m1_i32m1_m( @@ -336,7 +336,7 @@ vint32m1_t test_vredmin_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m1_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i32m1_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m2_i32m1_m( @@ -345,7 +345,7 @@ vint32m1_t test_vredmin_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i32m2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m4_i32m1_m( @@ -354,7 +354,7 @@ vint32m1_t test_vredmin_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m4_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i32m4_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m8_i32m1_m( @@ -363,7 +363,7 @@ vint32m1_t test_vredmin_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m8_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i32m8_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m1_i64m1_m( @@ -372,7 +372,7 @@ vint32m1_t test_vredmin_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m1_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i64m1_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m2_i64m1_m( @@ -381,7 +381,7 @@ vint64m1_t test_vredmin_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m2_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i64m2_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m4_i64m1_m( @@ -390,7 +390,7 @@ vint64m1_t test_vredmin_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m4_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i64m4_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m8_i64m1_m( @@ -399,6 +399,6 @@ vint64m1_t test_vredmin_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m8_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredmin_vs_i64m8_i64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredminu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredminu.c index 8518f88850ebcb61e023c561a9f372d1edf28876..cf6a29425b26e32ba4bbb5ed7724f00ebaf12256 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredminu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredminu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf8_u8m1(vector, scalar, vl); + return __riscv_vredminu_vs_u8mf8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf4_u8m1( @@ -21,7 +21,7 @@ vuint8m1_t test_vredminu_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf4_u8m1(vector, scalar, vl); + return __riscv_vredminu_vs_u8mf4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf2_u8m1( @@ -30,7 +30,7 @@ vuint8m1_t test_vredminu_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf2_u8m1(vector, scalar, vl); + return __riscv_vredminu_vs_u8mf2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m1_u8m1( @@ -39,7 +39,7 @@ vuint8m1_t test_vredminu_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m1_u8m1(vector, scalar, vl); + return __riscv_vredminu_vs_u8m1_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m2_u8m1( @@ -48,7 +48,7 @@ vuint8m1_t test_vredminu_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m2_u8m1(vector, scalar, vl); + return __riscv_vredminu_vs_u8m2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m4_u8m1( @@ -57,7 +57,7 @@ vuint8m1_t test_vredminu_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m4_u8m1(vector, scalar, vl); + return __riscv_vredminu_vs_u8m4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m8_u8m1( @@ -66,7 +66,7 @@ vuint8m1_t test_vredminu_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m8_u8m1(vector, scalar, vl); + return __riscv_vredminu_vs_u8m8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16mf4_u16m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vredminu_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16mf4_u16m1(vector, scalar, vl); + return __riscv_vredminu_vs_u16mf4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16mf2_u16m1( @@ -84,7 +84,7 @@ vuint16m1_t test_vredminu_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scala // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16mf2_u16m1(vector, scalar, vl); + return __riscv_vredminu_vs_u16mf2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m1_u16m1( @@ -93,7 +93,7 @@ vuint16m1_t test_vredminu_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scala // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m1_u16m1(vector, scalar, vl); + return __riscv_vredminu_vs_u16m1_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m2_u16m1( @@ -102,7 +102,7 @@ vuint16m1_t test_vredminu_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m2_u16m1(vector, scalar, vl); + return __riscv_vredminu_vs_u16m2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m4_u16m1( @@ -111,7 +111,7 @@ vuint16m1_t test_vredminu_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m4_u16m1(vector, scalar, vl); + return __riscv_vredminu_vs_u16m4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m8_u16m1( @@ -120,7 +120,7 @@ vuint16m1_t test_vredminu_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m8_u16m1(vector, scalar, vl); + return __riscv_vredminu_vs_u16m8_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32mf2_u32m1( @@ -129,7 +129,7 @@ vuint16m1_t test_vredminu_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32mf2_u32m1(vector, scalar, vl); + return __riscv_vredminu_vs_u32mf2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m1_u32m1( @@ -138,7 +138,7 @@ vuint32m1_t test_vredminu_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scala // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m1_u32m1(vector, scalar, vl); + return __riscv_vredminu_vs_u32m1_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m2_u32m1( @@ -147,7 +147,7 @@ vuint32m1_t test_vredminu_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m2_u32m1(vector, scalar, vl); + return __riscv_vredminu_vs_u32m2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m4_u32m1( @@ -156,7 +156,7 @@ vuint32m1_t test_vredminu_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m4_u32m1(vector, scalar, vl); + return __riscv_vredminu_vs_u32m4_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m8_u32m1( @@ -165,7 +165,7 @@ vuint32m1_t test_vredminu_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m8_u32m1(vector, scalar, vl); + return __riscv_vredminu_vs_u32m8_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m1_u64m1( @@ -174,7 +174,7 @@ vuint32m1_t test_vredminu_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m1_u64m1(vector, scalar, vl); + return __riscv_vredminu_vs_u64m1_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m2_u64m1( @@ -183,7 +183,7 @@ vuint64m1_t test_vredminu_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m2_u64m1(vector, scalar, vl); + return __riscv_vredminu_vs_u64m2_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m4_u64m1( @@ -192,7 +192,7 @@ vuint64m1_t test_vredminu_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m4_u64m1(vector, scalar, vl); + return __riscv_vredminu_vs_u64m4_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m8_u64m1( @@ -201,7 +201,7 @@ vuint64m1_t test_vredminu_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m8_u64m1(vector, scalar, vl); + return __riscv_vredminu_vs_u64m8_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf8_u8m1_m( @@ -210,7 +210,7 @@ vuint64m1_t test_vredminu_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf4_u8m1_m( @@ -219,7 +219,7 @@ vuint8m1_t test_vredminu_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf2_u8m1_m( @@ -228,7 +228,7 @@ vuint8m1_t test_vredminu_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m1_u8m1_m( @@ -237,7 +237,7 @@ vuint8m1_t test_vredminu_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m1_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u8m1_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m2_u8m1_m( @@ -246,7 +246,7 @@ vuint8m1_t test_vredminu_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u8m2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m4_u8m1_m( @@ -255,7 +255,7 @@ vuint8m1_t test_vredminu_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u8m4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m8_u8m1_m( @@ -264,7 +264,7 @@ vuint8m1_t test_vredminu_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u8m8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16mf4_u16m1_m( @@ -273,7 +273,7 @@ vuint8m1_t test_vredminu_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16mf2_u16m1_m( @@ -282,7 +282,7 @@ vuint16m1_t test_vredminu_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m1_u16m1_m( @@ -291,7 +291,7 @@ vuint16m1_t test_vredminu_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m1_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u16m1_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m2_u16m1_m( @@ -300,7 +300,7 @@ vuint16m1_t test_vredminu_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u16m2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m4_u16m1_m( @@ -309,7 +309,7 @@ vuint16m1_t test_vredminu_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u16m4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m8_u16m1_m( @@ -318,7 +318,7 @@ vuint16m1_t test_vredminu_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m8_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u16m8_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32mf2_u32m1_m( @@ -327,7 +327,7 @@ vuint16m1_t test_vredminu_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m1_u32m1_m( @@ -336,7 +336,7 @@ vuint32m1_t test_vredminu_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m1_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u32m1_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m2_u32m1_m( @@ -345,7 +345,7 @@ vuint32m1_t test_vredminu_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u32m2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m4_u32m1_m( @@ -354,7 +354,7 @@ vuint32m1_t test_vredminu_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m4_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u32m4_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m8_u32m1_m( @@ -363,7 +363,7 @@ vuint32m1_t test_vredminu_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m8_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u32m8_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m1_u64m1_m( @@ -372,7 +372,7 @@ vuint32m1_t test_vredminu_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m1_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u64m1_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m2_u64m1_m( @@ -381,7 +381,7 @@ vuint64m1_t test_vredminu_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m2_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u64m2_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m4_u64m1_m( @@ -390,7 +390,7 @@ vuint64m1_t test_vredminu_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m4_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u64m4_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m8_u64m1_m( @@ -399,6 +399,6 @@ vuint64m1_t test_vredminu_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m8_u64m1_m(vbool8_t mask, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m8_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredminu_vs_u64m8_u64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredor.c index c12ffdc50d55a9364412be2b23b12753697663fd..5b2955aaf0569b3aec74399ce42c7ed205287170 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf8_i8m1(vector, scalar, vl); + return __riscv_vredor_vs_i8mf8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf4_i8m1( @@ -21,7 +21,7 @@ vint8m1_t test_vredor_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf4_i8m1(vector, scalar, vl); + return __riscv_vredor_vs_i8mf4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf2_i8m1( @@ -30,7 +30,7 @@ vint8m1_t test_vredor_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf2_i8m1(vector, scalar, vl); + return __riscv_vredor_vs_i8mf2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m1_i8m1( @@ -39,7 +39,7 @@ vint8m1_t test_vredor_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m1_i8m1(vector, scalar, vl); + return __riscv_vredor_vs_i8m1_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m2_i8m1( @@ -48,7 +48,7 @@ vint8m1_t test_vredor_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m2_i8m1(vector, scalar, vl); + return __riscv_vredor_vs_i8m2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m4_i8m1( @@ -57,7 +57,7 @@ vint8m1_t test_vredor_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m4_i8m1(vector, scalar, vl); + return __riscv_vredor_vs_i8m4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m8_i8m1( @@ -66,7 +66,7 @@ vint8m1_t test_vredor_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m8_i8m1(vector, scalar, vl); + return __riscv_vredor_vs_i8m8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16mf4_i16m1( @@ -75,7 +75,7 @@ vint8m1_t test_vredor_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16mf4_i16m1(vector, scalar, vl); + return __riscv_vredor_vs_i16mf4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16mf2_i16m1( @@ -84,7 +84,7 @@ vint16m1_t test_vredor_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16mf2_i16m1(vector, scalar, vl); + return __riscv_vredor_vs_i16mf2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m1_i16m1( @@ -93,7 +93,7 @@ vint16m1_t test_vredor_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m1_i16m1(vector, scalar, vl); + return __riscv_vredor_vs_i16m1_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m2_i16m1( @@ -102,7 +102,7 @@ vint16m1_t test_vredor_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m2_i16m1(vector, scalar, vl); + return __riscv_vredor_vs_i16m2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m4_i16m1( @@ -111,7 +111,7 @@ vint16m1_t test_vredor_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m4_i16m1(vector, scalar, vl); + return __riscv_vredor_vs_i16m4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m8_i16m1( @@ -120,7 +120,7 @@ vint16m1_t test_vredor_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m8_i16m1(vector, scalar, vl); + return __riscv_vredor_vs_i16m8_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32mf2_i32m1( @@ -129,7 +129,7 @@ vint16m1_t test_vredor_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32mf2_i32m1(vector, scalar, vl); + return __riscv_vredor_vs_i32mf2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m1_i32m1( @@ -138,7 +138,7 @@ vint32m1_t test_vredor_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m1_i32m1(vector, scalar, vl); + return __riscv_vredor_vs_i32m1_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m2_i32m1( @@ -147,7 +147,7 @@ vint32m1_t test_vredor_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m2_i32m1(vector, scalar, vl); + return __riscv_vredor_vs_i32m2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m4_i32m1( @@ -156,7 +156,7 @@ vint32m1_t test_vredor_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m4_i32m1(vector, scalar, vl); + return __riscv_vredor_vs_i32m4_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m8_i32m1( @@ -165,7 +165,7 @@ vint32m1_t test_vredor_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m8_i32m1(vector, scalar, vl); + return __riscv_vredor_vs_i32m8_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m1_i64m1( @@ -174,7 +174,7 @@ vint32m1_t test_vredor_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m1_i64m1(vector, scalar, vl); + return __riscv_vredor_vs_i64m1_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m2_i64m1( @@ -183,7 +183,7 @@ vint64m1_t test_vredor_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m2_i64m1(vector, scalar, vl); + return __riscv_vredor_vs_i64m2_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m4_i64m1( @@ -192,7 +192,7 @@ vint64m1_t test_vredor_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m4_i64m1(vector, scalar, vl); + return __riscv_vredor_vs_i64m4_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m8_i64m1( @@ -201,7 +201,7 @@ vint64m1_t test_vredor_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m8_i64m1(vector, scalar, vl); + return __riscv_vredor_vs_i64m8_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf8_u8m1( @@ -210,7 +210,7 @@ vint64m1_t test_vredor_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf8_u8m1(vector, scalar, vl); + return __riscv_vredor_vs_u8mf8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf4_u8m1( @@ -219,7 +219,7 @@ vuint8m1_t test_vredor_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf4_u8m1(vector, scalar, vl); + return __riscv_vredor_vs_u8mf4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf2_u8m1( @@ -228,7 +228,7 @@ vuint8m1_t test_vredor_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf2_u8m1(vector, scalar, vl); + return __riscv_vredor_vs_u8mf2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m1_u8m1( @@ -237,7 +237,7 @@ vuint8m1_t test_vredor_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m1_u8m1(vector, scalar, vl); + return __riscv_vredor_vs_u8m1_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m2_u8m1( @@ -246,7 +246,7 @@ vuint8m1_t test_vredor_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m2_u8m1(vector, scalar, vl); + return __riscv_vredor_vs_u8m2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m4_u8m1( @@ -255,7 +255,7 @@ vuint8m1_t test_vredor_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m4_u8m1(vector, scalar, vl); + return __riscv_vredor_vs_u8m4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m8_u8m1( @@ -264,7 +264,7 @@ vuint8m1_t test_vredor_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m8_u8m1(vector, scalar, vl); + return __riscv_vredor_vs_u8m8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16mf4_u16m1( @@ -273,7 +273,7 @@ vuint8m1_t test_vredor_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16mf4_u16m1(vector, scalar, vl); + return __riscv_vredor_vs_u16mf4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16mf2_u16m1( @@ -282,7 +282,7 @@ vuint16m1_t test_vredor_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16mf2_u16m1(vector, scalar, vl); + return __riscv_vredor_vs_u16mf2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m1_u16m1( @@ -291,7 +291,7 @@ vuint16m1_t test_vredor_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m1_u16m1(vector, scalar, vl); + return __riscv_vredor_vs_u16m1_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m2_u16m1( @@ -300,7 +300,7 @@ vuint16m1_t test_vredor_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m2_u16m1(vector, scalar, vl); + return __riscv_vredor_vs_u16m2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m4_u16m1( @@ -309,7 +309,7 @@ vuint16m1_t test_vredor_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m4_u16m1(vector, scalar, vl); + return __riscv_vredor_vs_u16m4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m8_u16m1( @@ -318,7 +318,7 @@ vuint16m1_t test_vredor_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m8_u16m1(vector, scalar, vl); + return __riscv_vredor_vs_u16m8_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32mf2_u32m1( @@ -327,7 +327,7 @@ vuint16m1_t test_vredor_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32mf2_u32m1(vector, scalar, vl); + return __riscv_vredor_vs_u32mf2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m1_u32m1( @@ -336,7 +336,7 @@ vuint32m1_t test_vredor_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m1_u32m1(vector, scalar, vl); + return __riscv_vredor_vs_u32m1_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m2_u32m1( @@ -345,7 +345,7 @@ vuint32m1_t test_vredor_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m2_u32m1(vector, scalar, vl); + return __riscv_vredor_vs_u32m2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m4_u32m1( @@ -354,7 +354,7 @@ vuint32m1_t test_vredor_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m4_u32m1(vector, scalar, vl); + return __riscv_vredor_vs_u32m4_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m8_u32m1( @@ -363,7 +363,7 @@ vuint32m1_t test_vredor_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m8_u32m1(vector, scalar, vl); + return __riscv_vredor_vs_u32m8_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m1_u64m1( @@ -372,7 +372,7 @@ vuint32m1_t test_vredor_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m1_u64m1(vector, scalar, vl); + return __riscv_vredor_vs_u64m1_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m2_u64m1( @@ -381,7 +381,7 @@ vuint64m1_t test_vredor_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m2_u64m1(vector, scalar, vl); + return __riscv_vredor_vs_u64m2_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m4_u64m1( @@ -390,7 +390,7 @@ vuint64m1_t test_vredor_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m4_u64m1(vector, scalar, vl); + return __riscv_vredor_vs_u64m4_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m8_u64m1( @@ -399,7 +399,7 @@ vuint64m1_t test_vredor_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m8_u64m1(vector, scalar, vl); + return __riscv_vredor_vs_u64m8_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf8_i8m1_m( @@ -408,7 +408,7 @@ vuint64m1_t test_vredor_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf4_i8m1_m( @@ -417,7 +417,7 @@ vint8m1_t test_vredor_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf2_i8m1_m( @@ -426,7 +426,7 @@ vint8m1_t test_vredor_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m1_i8m1_m( @@ -435,7 +435,7 @@ vint8m1_t test_vredor_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m1_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i8m1_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m2_i8m1_m( @@ -444,7 +444,7 @@ vint8m1_t test_vredor_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i8m2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m4_i8m1_m( @@ -453,7 +453,7 @@ vint8m1_t test_vredor_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i8m4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m8_i8m1_m( @@ -462,7 +462,7 @@ vint8m1_t test_vredor_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i8m8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16mf4_i16m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vredor_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16mf2_i16m1_m( @@ -480,7 +480,7 @@ vint16m1_t test_vredor_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m1_i16m1_m( @@ -489,7 +489,7 @@ vint16m1_t test_vredor_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m1_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i16m1_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m2_i16m1_m( @@ -498,7 +498,7 @@ vint16m1_t test_vredor_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i16m2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m4_i16m1_m( @@ -507,7 +507,7 @@ vint16m1_t test_vredor_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i16m4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m8_i16m1_m( @@ -516,7 +516,7 @@ vint16m1_t test_vredor_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m8_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i16m8_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32mf2_i32m1_m( @@ -525,7 +525,7 @@ vint16m1_t test_vredor_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m1_i32m1_m( @@ -534,7 +534,7 @@ vint32m1_t test_vredor_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m1_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i32m1_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m2_i32m1_m( @@ -543,7 +543,7 @@ vint32m1_t test_vredor_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i32m2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m4_i32m1_m( @@ -552,7 +552,7 @@ vint32m1_t test_vredor_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m4_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i32m4_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m8_i32m1_m( @@ -561,7 +561,7 @@ vint32m1_t test_vredor_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m8_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i32m8_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m1_i64m1_m( @@ -570,7 +570,7 @@ vint32m1_t test_vredor_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m1_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i64m1_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m2_i64m1_m( @@ -579,7 +579,7 @@ vint64m1_t test_vredor_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m2_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i64m2_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m4_i64m1_m( @@ -588,7 +588,7 @@ vint64m1_t test_vredor_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m4_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i64m4_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m8_i64m1_m( @@ -597,7 +597,7 @@ vint64m1_t test_vredor_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m8_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_i64m8_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf8_u8m1_m( @@ -606,7 +606,7 @@ vint64m1_t test_vredor_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf4_u8m1_m( @@ -615,7 +615,7 @@ vuint8m1_t test_vredor_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf2_u8m1_m( @@ -624,7 +624,7 @@ vuint8m1_t test_vredor_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m1_u8m1_m( @@ -633,7 +633,7 @@ vuint8m1_t test_vredor_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m1_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u8m1_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m2_u8m1_m( @@ -642,7 +642,7 @@ vuint8m1_t test_vredor_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u8m2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m4_u8m1_m( @@ -651,7 +651,7 @@ vuint8m1_t test_vredor_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u8m4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m8_u8m1_m( @@ -660,7 +660,7 @@ vuint8m1_t test_vredor_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u8m8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16mf4_u16m1_m( @@ -669,7 +669,7 @@ vuint8m1_t test_vredor_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16mf2_u16m1_m( @@ -678,7 +678,7 @@ vuint16m1_t test_vredor_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m1_u16m1_m( @@ -687,7 +687,7 @@ vuint16m1_t test_vredor_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m1_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u16m1_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m2_u16m1_m( @@ -696,7 +696,7 @@ vuint16m1_t test_vredor_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u16m2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m4_u16m1_m( @@ -705,7 +705,7 @@ vuint16m1_t test_vredor_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u16m4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m8_u16m1_m( @@ -714,7 +714,7 @@ vuint16m1_t test_vredor_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m8_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u16m8_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32mf2_u32m1_m( @@ -723,7 +723,7 @@ vuint16m1_t test_vredor_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m1_u32m1_m( @@ -732,7 +732,7 @@ vuint32m1_t test_vredor_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m1_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u32m1_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m2_u32m1_m( @@ -741,7 +741,7 @@ vuint32m1_t test_vredor_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u32m2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m4_u32m1_m( @@ -750,7 +750,7 @@ vuint32m1_t test_vredor_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m4_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u32m4_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m8_u32m1_m( @@ -759,7 +759,7 @@ vuint32m1_t test_vredor_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m8_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u32m8_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m1_u64m1_m( @@ -768,7 +768,7 @@ vuint32m1_t test_vredor_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m1_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u64m1_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m2_u64m1_m( @@ -777,7 +777,7 @@ vuint64m1_t test_vredor_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m2_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u64m2_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m4_u64m1_m( @@ -786,7 +786,7 @@ vuint64m1_t test_vredor_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m4_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u64m4_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m8_u64m1_m( @@ -795,6 +795,6 @@ vuint64m1_t test_vredor_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m8_u64m1_m(vbool8_t mask, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m8_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredor_vs_u64m8_u64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredsum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredsum.c index 195d84f5facc4f600de8db4a73e0b450269d51cd..14ee95394a597896855e23bc433542717df6d87b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredsum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredsum.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf8_i8m1(vector, scalar, vl); + return __riscv_vredsum_vs_i8mf8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf4_i8m1( @@ -21,7 +21,7 @@ vint8m1_t test_vredsum_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf4_i8m1(vector, scalar, vl); + return __riscv_vredsum_vs_i8mf4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf2_i8m1( @@ -30,7 +30,7 @@ vint8m1_t test_vredsum_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf2_i8m1(vector, scalar, vl); + return __riscv_vredsum_vs_i8mf2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m1_i8m1( @@ -39,7 +39,7 @@ vint8m1_t test_vredsum_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m1_i8m1(vector, scalar, vl); + return __riscv_vredsum_vs_i8m1_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m2_i8m1( @@ -48,7 +48,7 @@ vint8m1_t test_vredsum_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m2_i8m1(vector, scalar, vl); + return __riscv_vredsum_vs_i8m2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m4_i8m1( @@ -57,7 +57,7 @@ vint8m1_t test_vredsum_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m4_i8m1(vector, scalar, vl); + return __riscv_vredsum_vs_i8m4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m8_i8m1( @@ -66,7 +66,7 @@ vint8m1_t test_vredsum_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m8_i8m1(vector, scalar, vl); + return __riscv_vredsum_vs_i8m8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16mf4_i16m1( @@ -75,7 +75,7 @@ vint8m1_t test_vredsum_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16mf4_i16m1(vector, scalar, vl); + return __riscv_vredsum_vs_i16mf4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16mf2_i16m1( @@ -84,7 +84,7 @@ vint16m1_t test_vredsum_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16mf2_i16m1(vector, scalar, vl); + return __riscv_vredsum_vs_i16mf2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m1_i16m1( @@ -93,7 +93,7 @@ vint16m1_t test_vredsum_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m1_i16m1(vector, scalar, vl); + return __riscv_vredsum_vs_i16m1_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m2_i16m1( @@ -102,7 +102,7 @@ vint16m1_t test_vredsum_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m2_i16m1(vector, scalar, vl); + return __riscv_vredsum_vs_i16m2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m4_i16m1( @@ -111,7 +111,7 @@ vint16m1_t test_vredsum_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m4_i16m1(vector, scalar, vl); + return __riscv_vredsum_vs_i16m4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m8_i16m1( @@ -120,7 +120,7 @@ vint16m1_t test_vredsum_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m8_i16m1(vector, scalar, vl); + return __riscv_vredsum_vs_i16m8_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32mf2_i32m1( @@ -129,7 +129,7 @@ vint16m1_t test_vredsum_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32mf2_i32m1(vector, scalar, vl); + return __riscv_vredsum_vs_i32mf2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m1_i32m1( @@ -138,7 +138,7 @@ vint32m1_t test_vredsum_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m1_i32m1(vector, scalar, vl); + return __riscv_vredsum_vs_i32m1_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m2_i32m1( @@ -147,7 +147,7 @@ vint32m1_t test_vredsum_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m2_i32m1(vector, scalar, vl); + return __riscv_vredsum_vs_i32m2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m4_i32m1( @@ -156,7 +156,7 @@ vint32m1_t test_vredsum_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m4_i32m1(vector, scalar, vl); + return __riscv_vredsum_vs_i32m4_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m8_i32m1( @@ -165,7 +165,7 @@ vint32m1_t test_vredsum_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m8_i32m1(vector, scalar, vl); + return __riscv_vredsum_vs_i32m8_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m1_i64m1( @@ -174,7 +174,7 @@ vint32m1_t test_vredsum_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m1_i64m1(vector, scalar, vl); + return __riscv_vredsum_vs_i64m1_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m2_i64m1( @@ -183,7 +183,7 @@ vint64m1_t test_vredsum_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m2_i64m1(vector, scalar, vl); + return __riscv_vredsum_vs_i64m2_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m4_i64m1( @@ -192,7 +192,7 @@ vint64m1_t test_vredsum_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m4_i64m1(vector, scalar, vl); + return __riscv_vredsum_vs_i64m4_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m8_i64m1( @@ -201,7 +201,7 @@ vint64m1_t test_vredsum_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m8_i64m1(vector, scalar, vl); + return __riscv_vredsum_vs_i64m8_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf8_u8m1( @@ -210,7 +210,7 @@ vint64m1_t test_vredsum_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf8_u8m1(vector, scalar, vl); + return __riscv_vredsum_vs_u8mf8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf4_u8m1( @@ -219,7 +219,7 @@ vuint8m1_t test_vredsum_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf4_u8m1(vector, scalar, vl); + return __riscv_vredsum_vs_u8mf4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf2_u8m1( @@ -228,7 +228,7 @@ vuint8m1_t test_vredsum_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf2_u8m1(vector, scalar, vl); + return __riscv_vredsum_vs_u8mf2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m1_u8m1( @@ -237,7 +237,7 @@ vuint8m1_t test_vredsum_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m1_u8m1(vector, scalar, vl); + return __riscv_vredsum_vs_u8m1_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m2_u8m1( @@ -246,7 +246,7 @@ vuint8m1_t test_vredsum_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m2_u8m1(vector, scalar, vl); + return __riscv_vredsum_vs_u8m2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m4_u8m1( @@ -255,7 +255,7 @@ vuint8m1_t test_vredsum_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m4_u8m1(vector, scalar, vl); + return __riscv_vredsum_vs_u8m4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m8_u8m1( @@ -264,7 +264,7 @@ vuint8m1_t test_vredsum_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m8_u8m1(vector, scalar, vl); + return __riscv_vredsum_vs_u8m8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16mf4_u16m1( @@ -273,7 +273,7 @@ vuint8m1_t test_vredsum_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16mf4_u16m1(vector, scalar, vl); + return __riscv_vredsum_vs_u16mf4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16mf2_u16m1( @@ -282,7 +282,7 @@ vuint16m1_t test_vredsum_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16mf2_u16m1(vector, scalar, vl); + return __riscv_vredsum_vs_u16mf2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m1_u16m1( @@ -291,7 +291,7 @@ vuint16m1_t test_vredsum_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m1_u16m1(vector, scalar, vl); + return __riscv_vredsum_vs_u16m1_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m2_u16m1( @@ -300,7 +300,7 @@ vuint16m1_t test_vredsum_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m2_u16m1(vector, scalar, vl); + return __riscv_vredsum_vs_u16m2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m4_u16m1( @@ -309,7 +309,7 @@ vuint16m1_t test_vredsum_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m4_u16m1(vector, scalar, vl); + return __riscv_vredsum_vs_u16m4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m8_u16m1( @@ -318,7 +318,7 @@ vuint16m1_t test_vredsum_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m8_u16m1(vector, scalar, vl); + return __riscv_vredsum_vs_u16m8_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32mf2_u32m1( @@ -327,7 +327,7 @@ vuint16m1_t test_vredsum_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32mf2_u32m1(vector, scalar, vl); + return __riscv_vredsum_vs_u32mf2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m1_u32m1( @@ -336,7 +336,7 @@ vuint32m1_t test_vredsum_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m1_u32m1(vector, scalar, vl); + return __riscv_vredsum_vs_u32m1_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m2_u32m1( @@ -345,7 +345,7 @@ vuint32m1_t test_vredsum_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m2_u32m1(vector, scalar, vl); + return __riscv_vredsum_vs_u32m2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m4_u32m1( @@ -354,7 +354,7 @@ vuint32m1_t test_vredsum_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m4_u32m1(vector, scalar, vl); + return __riscv_vredsum_vs_u32m4_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m8_u32m1( @@ -363,7 +363,7 @@ vuint32m1_t test_vredsum_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m8_u32m1(vector, scalar, vl); + return __riscv_vredsum_vs_u32m8_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m1_u64m1( @@ -372,7 +372,7 @@ vuint32m1_t test_vredsum_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m1_u64m1(vector, scalar, vl); + return __riscv_vredsum_vs_u64m1_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m2_u64m1( @@ -381,7 +381,7 @@ vuint64m1_t test_vredsum_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m2_u64m1(vector, scalar, vl); + return __riscv_vredsum_vs_u64m2_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m4_u64m1( @@ -390,7 +390,7 @@ vuint64m1_t test_vredsum_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m4_u64m1(vector, scalar, vl); + return __riscv_vredsum_vs_u64m4_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m8_u64m1( @@ -399,7 +399,7 @@ vuint64m1_t test_vredsum_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m8_u64m1(vector, scalar, vl); + return __riscv_vredsum_vs_u64m8_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf8_i8m1_m( @@ -408,7 +408,7 @@ vuint64m1_t test_vredsum_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf4_i8m1_m( @@ -417,7 +417,7 @@ vint8m1_t test_vredsum_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf2_i8m1_m( @@ -426,7 +426,7 @@ vint8m1_t test_vredsum_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m1_i8m1_m( @@ -435,7 +435,7 @@ vint8m1_t test_vredsum_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m1_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i8m1_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m2_i8m1_m( @@ -444,7 +444,7 @@ vint8m1_t test_vredsum_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i8m2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m4_i8m1_m( @@ -453,7 +453,7 @@ vint8m1_t test_vredsum_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i8m4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m8_i8m1_m( @@ -462,7 +462,7 @@ vint8m1_t test_vredsum_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i8m8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16mf4_i16m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vredsum_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16mf2_i16m1_m( @@ -480,7 +480,7 @@ vint16m1_t test_vredsum_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m1_i16m1_m( @@ -489,7 +489,7 @@ vint16m1_t test_vredsum_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m1_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i16m1_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m2_i16m1_m( @@ -498,7 +498,7 @@ vint16m1_t test_vredsum_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i16m2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m4_i16m1_m( @@ -507,7 +507,7 @@ vint16m1_t test_vredsum_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i16m4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m8_i16m1_m( @@ -516,7 +516,7 @@ vint16m1_t test_vredsum_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m8_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i16m8_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32mf2_i32m1_m( @@ -525,7 +525,7 @@ vint16m1_t test_vredsum_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m1_i32m1_m( @@ -534,7 +534,7 @@ vint32m1_t test_vredsum_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m1_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i32m1_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m2_i32m1_m( @@ -543,7 +543,7 @@ vint32m1_t test_vredsum_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i32m2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m4_i32m1_m( @@ -552,7 +552,7 @@ vint32m1_t test_vredsum_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m4_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i32m4_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m8_i32m1_m( @@ -561,7 +561,7 @@ vint32m1_t test_vredsum_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m8_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i32m8_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m1_i64m1_m( @@ -570,7 +570,7 @@ vint32m1_t test_vredsum_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m1_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i64m1_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m2_i64m1_m( @@ -579,7 +579,7 @@ vint64m1_t test_vredsum_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m2_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i64m2_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m4_i64m1_m( @@ -588,7 +588,7 @@ vint64m1_t test_vredsum_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m4_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i64m4_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m8_i64m1_m( @@ -597,7 +597,7 @@ vint64m1_t test_vredsum_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m8_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_i64m8_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf8_u8m1_m( @@ -606,7 +606,7 @@ vint64m1_t test_vredsum_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf4_u8m1_m( @@ -615,7 +615,7 @@ vuint8m1_t test_vredsum_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf2_u8m1_m( @@ -624,7 +624,7 @@ vuint8m1_t test_vredsum_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m1_u8m1_m( @@ -633,7 +633,7 @@ vuint8m1_t test_vredsum_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m1_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u8m1_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m2_u8m1_m( @@ -642,7 +642,7 @@ vuint8m1_t test_vredsum_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u8m2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m4_u8m1_m( @@ -651,7 +651,7 @@ vuint8m1_t test_vredsum_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u8m4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m8_u8m1_m( @@ -660,7 +660,7 @@ vuint8m1_t test_vredsum_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u8m8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16mf4_u16m1_m( @@ -669,7 +669,7 @@ vuint8m1_t test_vredsum_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16mf2_u16m1_m( @@ -678,7 +678,7 @@ vuint16m1_t test_vredsum_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m1_u16m1_m( @@ -687,7 +687,7 @@ vuint16m1_t test_vredsum_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m1_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u16m1_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m2_u16m1_m( @@ -696,7 +696,7 @@ vuint16m1_t test_vredsum_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u16m2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m4_u16m1_m( @@ -705,7 +705,7 @@ vuint16m1_t test_vredsum_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u16m4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m8_u16m1_m( @@ -714,7 +714,7 @@ vuint16m1_t test_vredsum_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m8_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u16m8_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32mf2_u32m1_m( @@ -723,7 +723,7 @@ vuint16m1_t test_vredsum_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m1_u32m1_m( @@ -732,7 +732,7 @@ vuint32m1_t test_vredsum_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m1_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u32m1_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m2_u32m1_m( @@ -741,7 +741,7 @@ vuint32m1_t test_vredsum_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u32m2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m4_u32m1_m( @@ -750,7 +750,7 @@ vuint32m1_t test_vredsum_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m4_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u32m4_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m8_u32m1_m( @@ -759,7 +759,7 @@ vuint32m1_t test_vredsum_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m8_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u32m8_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m1_u64m1_m( @@ -768,7 +768,7 @@ vuint32m1_t test_vredsum_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m1_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u64m1_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m2_u64m1_m( @@ -777,7 +777,7 @@ vuint64m1_t test_vredsum_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m2_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u64m2_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m4_u64m1_m( @@ -786,7 +786,7 @@ vuint64m1_t test_vredsum_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m4_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u64m4_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m8_u64m1_m( @@ -795,6 +795,6 @@ vuint64m1_t test_vredsum_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m8_u64m1_m(vbool8_t mask, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m8_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredsum_vs_u64m8_u64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredxor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredxor.c index 064e0ec4b5e2f8431d34de78a64d0a13bd71c632..fe5409fc274c6614f29a083d8cf376689669efb4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredxor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vredxor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf8_i8m1(vector, scalar, vl); + return __riscv_vredxor_vs_i8mf8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf4_i8m1( @@ -21,7 +21,7 @@ vint8m1_t test_vredxor_vs_i8mf8_i8m1(vint8mf8_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf4_i8m1(vector, scalar, vl); + return __riscv_vredxor_vs_i8mf4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf2_i8m1( @@ -30,7 +30,7 @@ vint8m1_t test_vredxor_vs_i8mf4_i8m1(vint8mf4_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf2_i8m1(vector, scalar, vl); + return __riscv_vredxor_vs_i8mf2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m1_i8m1( @@ -39,7 +39,7 @@ vint8m1_t test_vredxor_vs_i8mf2_i8m1(vint8mf2_t vector, vint8m1_t scalar, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m1_i8m1(vector, scalar, vl); + return __riscv_vredxor_vs_i8m1_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m2_i8m1( @@ -48,7 +48,7 @@ vint8m1_t test_vredxor_vs_i8m1_i8m1(vint8m1_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m2_i8m1(vector, scalar, vl); + return __riscv_vredxor_vs_i8m2_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m4_i8m1( @@ -57,7 +57,7 @@ vint8m1_t test_vredxor_vs_i8m2_i8m1(vint8m2_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m4_i8m1(vector, scalar, vl); + return __riscv_vredxor_vs_i8m4_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m8_i8m1( @@ -66,7 +66,7 @@ vint8m1_t test_vredxor_vs_i8m4_i8m1(vint8m4_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m8_i8m1(vector, scalar, vl); + return __riscv_vredxor_vs_i8m8_i8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16mf4_i16m1( @@ -75,7 +75,7 @@ vint8m1_t test_vredxor_vs_i8m8_i8m1(vint8m8_t vector, vint8m1_t scalar, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16mf4_i16m1(vector, scalar, vl); + return __riscv_vredxor_vs_i16mf4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16mf2_i16m1( @@ -84,7 +84,7 @@ vint16m1_t test_vredxor_vs_i16mf4_i16m1(vint16mf4_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16mf2_i16m1(vector, scalar, vl); + return __riscv_vredxor_vs_i16mf2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m1_i16m1( @@ -93,7 +93,7 @@ vint16m1_t test_vredxor_vs_i16mf2_i16m1(vint16mf2_t vector, vint16m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m1_i16m1(vector, scalar, vl); + return __riscv_vredxor_vs_i16m1_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m2_i16m1( @@ -102,7 +102,7 @@ vint16m1_t test_vredxor_vs_i16m1_i16m1(vint16m1_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m2_i16m1(vector, scalar, vl); + return __riscv_vredxor_vs_i16m2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m4_i16m1( @@ -111,7 +111,7 @@ vint16m1_t test_vredxor_vs_i16m2_i16m1(vint16m2_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m4_i16m1(vector, scalar, vl); + return __riscv_vredxor_vs_i16m4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m8_i16m1( @@ -120,7 +120,7 @@ vint16m1_t test_vredxor_vs_i16m4_i16m1(vint16m4_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m8_i16m1(vector, scalar, vl); + return __riscv_vredxor_vs_i16m8_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32mf2_i32m1( @@ -129,7 +129,7 @@ vint16m1_t test_vredxor_vs_i16m8_i16m1(vint16m8_t vector, vint16m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32mf2_i32m1(vector, scalar, vl); + return __riscv_vredxor_vs_i32mf2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m1_i32m1( @@ -138,7 +138,7 @@ vint32m1_t test_vredxor_vs_i32mf2_i32m1(vint32mf2_t vector, vint32m1_t scalar, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m1_i32m1(vector, scalar, vl); + return __riscv_vredxor_vs_i32m1_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m2_i32m1( @@ -147,7 +147,7 @@ vint32m1_t test_vredxor_vs_i32m1_i32m1(vint32m1_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m2_i32m1(vector, scalar, vl); + return __riscv_vredxor_vs_i32m2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m4_i32m1( @@ -156,7 +156,7 @@ vint32m1_t test_vredxor_vs_i32m2_i32m1(vint32m2_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m4_i32m1(vector, scalar, vl); + return __riscv_vredxor_vs_i32m4_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m8_i32m1( @@ -165,7 +165,7 @@ vint32m1_t test_vredxor_vs_i32m4_i32m1(vint32m4_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m8_i32m1(vector, scalar, vl); + return __riscv_vredxor_vs_i32m8_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m1_i64m1( @@ -174,7 +174,7 @@ vint32m1_t test_vredxor_vs_i32m8_i32m1(vint32m8_t vector, vint32m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m1_i64m1(vector, scalar, vl); + return __riscv_vredxor_vs_i64m1_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m2_i64m1( @@ -183,7 +183,7 @@ vint64m1_t test_vredxor_vs_i64m1_i64m1(vint64m1_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m2_i64m1(vector, scalar, vl); + return __riscv_vredxor_vs_i64m2_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m4_i64m1( @@ -192,7 +192,7 @@ vint64m1_t test_vredxor_vs_i64m2_i64m1(vint64m2_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m4_i64m1(vector, scalar, vl); + return __riscv_vredxor_vs_i64m4_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m8_i64m1( @@ -201,7 +201,7 @@ vint64m1_t test_vredxor_vs_i64m4_i64m1(vint64m4_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m8_i64m1(vector, scalar, vl); + return __riscv_vredxor_vs_i64m8_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf8_u8m1( @@ -210,7 +210,7 @@ vint64m1_t test_vredxor_vs_i64m8_i64m1(vint64m8_t vector, vint64m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf8_u8m1(vector, scalar, vl); + return __riscv_vredxor_vs_u8mf8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf4_u8m1( @@ -219,7 +219,7 @@ vuint8m1_t test_vredxor_vs_u8mf8_u8m1(vuint8mf8_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf4_u8m1(vector, scalar, vl); + return __riscv_vredxor_vs_u8mf4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf2_u8m1( @@ -228,7 +228,7 @@ vuint8m1_t test_vredxor_vs_u8mf4_u8m1(vuint8mf4_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf2_u8m1(vector, scalar, vl); + return __riscv_vredxor_vs_u8mf2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m1_u8m1( @@ -237,7 +237,7 @@ vuint8m1_t test_vredxor_vs_u8mf2_u8m1(vuint8mf2_t vector, vuint8m1_t scalar, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m1_u8m1(vector, scalar, vl); + return __riscv_vredxor_vs_u8m1_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m2_u8m1( @@ -246,7 +246,7 @@ vuint8m1_t test_vredxor_vs_u8m1_u8m1(vuint8m1_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m2_u8m1(vector, scalar, vl); + return __riscv_vredxor_vs_u8m2_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m4_u8m1( @@ -255,7 +255,7 @@ vuint8m1_t test_vredxor_vs_u8m2_u8m1(vuint8m2_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m4_u8m1(vector, scalar, vl); + return __riscv_vredxor_vs_u8m4_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m8_u8m1( @@ -264,7 +264,7 @@ vuint8m1_t test_vredxor_vs_u8m4_u8m1(vuint8m4_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m8_u8m1(vector, scalar, vl); + return __riscv_vredxor_vs_u8m8_u8m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16mf4_u16m1( @@ -273,7 +273,7 @@ vuint8m1_t test_vredxor_vs_u8m8_u8m1(vuint8m8_t vector, vuint8m1_t scalar, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16mf4_u16m1(vector, scalar, vl); + return __riscv_vredxor_vs_u16mf4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16mf2_u16m1( @@ -282,7 +282,7 @@ vuint16m1_t test_vredxor_vs_u16mf4_u16m1(vuint16mf4_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16mf2_u16m1(vector, scalar, vl); + return __riscv_vredxor_vs_u16mf2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m1_u16m1( @@ -291,7 +291,7 @@ vuint16m1_t test_vredxor_vs_u16mf2_u16m1(vuint16mf2_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m1_u16m1(vector, scalar, vl); + return __riscv_vredxor_vs_u16m1_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m2_u16m1( @@ -300,7 +300,7 @@ vuint16m1_t test_vredxor_vs_u16m1_u16m1(vuint16m1_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m2_u16m1(vector, scalar, vl); + return __riscv_vredxor_vs_u16m2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m4_u16m1( @@ -309,7 +309,7 @@ vuint16m1_t test_vredxor_vs_u16m2_u16m1(vuint16m2_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m4_u16m1(vector, scalar, vl); + return __riscv_vredxor_vs_u16m4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m8_u16m1( @@ -318,7 +318,7 @@ vuint16m1_t test_vredxor_vs_u16m4_u16m1(vuint16m4_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m8_u16m1(vector, scalar, vl); + return __riscv_vredxor_vs_u16m8_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32mf2_u32m1( @@ -327,7 +327,7 @@ vuint16m1_t test_vredxor_vs_u16m8_u16m1(vuint16m8_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32mf2_u32m1(vector, scalar, vl); + return __riscv_vredxor_vs_u32mf2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m1_u32m1( @@ -336,7 +336,7 @@ vuint32m1_t test_vredxor_vs_u32mf2_u32m1(vuint32mf2_t vector, vuint32m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m1_u32m1(vector, scalar, vl); + return __riscv_vredxor_vs_u32m1_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m2_u32m1( @@ -345,7 +345,7 @@ vuint32m1_t test_vredxor_vs_u32m1_u32m1(vuint32m1_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m2_u32m1(vector, scalar, vl); + return __riscv_vredxor_vs_u32m2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m4_u32m1( @@ -354,7 +354,7 @@ vuint32m1_t test_vredxor_vs_u32m2_u32m1(vuint32m2_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m4_u32m1(vector, scalar, vl); + return __riscv_vredxor_vs_u32m4_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m8_u32m1( @@ -363,7 +363,7 @@ vuint32m1_t test_vredxor_vs_u32m4_u32m1(vuint32m4_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m8_u32m1(vector, scalar, vl); + return __riscv_vredxor_vs_u32m8_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m1_u64m1( @@ -372,7 +372,7 @@ vuint32m1_t test_vredxor_vs_u32m8_u32m1(vuint32m8_t vector, vuint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m1_u64m1(vector, scalar, vl); + return __riscv_vredxor_vs_u64m1_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m2_u64m1( @@ -381,7 +381,7 @@ vuint64m1_t test_vredxor_vs_u64m1_u64m1(vuint64m1_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m2_u64m1(vector, scalar, vl); + return __riscv_vredxor_vs_u64m2_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m4_u64m1( @@ -390,7 +390,7 @@ vuint64m1_t test_vredxor_vs_u64m2_u64m1(vuint64m2_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m4_u64m1(vector, scalar, vl); + return __riscv_vredxor_vs_u64m4_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m8_u64m1( @@ -399,7 +399,7 @@ vuint64m1_t test_vredxor_vs_u64m4_u64m1(vuint64m4_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m8_u64m1(vector, scalar, vl); + return __riscv_vredxor_vs_u64m8_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf8_i8m1_m( @@ -408,7 +408,7 @@ vuint64m1_t test_vredxor_vs_u64m8_u64m1(vuint64m8_t vector, vuint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf4_i8m1_m( @@ -417,7 +417,7 @@ vint8m1_t test_vredxor_vs_i8mf8_i8m1_m(vbool64_t mask, vint8mf8_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf2_i8m1_m( @@ -426,7 +426,7 @@ vint8m1_t test_vredxor_vs_i8mf4_i8m1_m(vbool32_t mask, vint8mf4_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m1_i8m1_m( @@ -435,7 +435,7 @@ vint8m1_t test_vredxor_vs_i8mf2_i8m1_m(vbool16_t mask, vint8mf2_t vector, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m1_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i8m1_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m2_i8m1_m( @@ -444,7 +444,7 @@ vint8m1_t test_vredxor_vs_i8m1_i8m1_m(vbool8_t mask, vint8m1_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m2_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i8m2_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m4_i8m1_m( @@ -453,7 +453,7 @@ vint8m1_t test_vredxor_vs_i8m2_i8m1_m(vbool4_t mask, vint8m2_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m4_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i8m4_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m8_i8m1_m( @@ -462,7 +462,7 @@ vint8m1_t test_vredxor_vs_i8m4_i8m1_m(vbool2_t mask, vint8m4_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m8_i8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i8m8_i8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16mf4_i16m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vredxor_vs_i8m8_i8m1_m(vbool1_t mask, vint8m8_t vector, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i16mf4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16mf2_i16m1_m( @@ -480,7 +480,7 @@ vint16m1_t test_vredxor_vs_i16mf4_i16m1_m(vbool64_t mask, vint16mf4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i16mf2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m1_i16m1_m( @@ -489,7 +489,7 @@ vint16m1_t test_vredxor_vs_i16mf2_i16m1_m(vbool32_t mask, vint16mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m1_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i16m1_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m2_i16m1_m( @@ -498,7 +498,7 @@ vint16m1_t test_vredxor_vs_i16m1_i16m1_m(vbool16_t mask, vint16m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i16m2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m4_i16m1_m( @@ -507,7 +507,7 @@ vint16m1_t test_vredxor_vs_i16m2_i16m1_m(vbool8_t mask, vint16m2_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i16m4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m8_i16m1_m( @@ -516,7 +516,7 @@ vint16m1_t test_vredxor_vs_i16m4_i16m1_m(vbool4_t mask, vint16m4_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m8_i16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i16m8_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32mf2_i32m1_m( @@ -525,7 +525,7 @@ vint16m1_t test_vredxor_vs_i16m8_i16m1_m(vbool2_t mask, vint16m8_t vector, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i32mf2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m1_i32m1_m( @@ -534,7 +534,7 @@ vint32m1_t test_vredxor_vs_i32mf2_i32m1_m(vbool64_t mask, vint32mf2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m1_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i32m1_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m2_i32m1_m( @@ -543,7 +543,7 @@ vint32m1_t test_vredxor_vs_i32m1_i32m1_m(vbool32_t mask, vint32m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i32m2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m4_i32m1_m( @@ -552,7 +552,7 @@ vint32m1_t test_vredxor_vs_i32m2_i32m1_m(vbool16_t mask, vint32m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m4_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i32m4_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m8_i32m1_m( @@ -561,7 +561,7 @@ vint32m1_t test_vredxor_vs_i32m4_i32m1_m(vbool8_t mask, vint32m4_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m8_i32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i32m8_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m1_i64m1_m( @@ -570,7 +570,7 @@ vint32m1_t test_vredxor_vs_i32m8_i32m1_m(vbool4_t mask, vint32m8_t vector, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m1_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i64m1_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m2_i64m1_m( @@ -579,7 +579,7 @@ vint64m1_t test_vredxor_vs_i64m1_i64m1_m(vbool64_t mask, vint64m1_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m2_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i64m2_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m4_i64m1_m( @@ -588,7 +588,7 @@ vint64m1_t test_vredxor_vs_i64m2_i64m1_m(vbool32_t mask, vint64m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m4_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i64m4_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m8_i64m1_m( @@ -597,7 +597,7 @@ vint64m1_t test_vredxor_vs_i64m4_i64m1_m(vbool16_t mask, vint64m4_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m8_i64m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_i64m8_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf8_u8m1_m( @@ -606,7 +606,7 @@ vint64m1_t test_vredxor_vs_i64m8_i64m1_m(vbool8_t mask, vint64m8_t vector, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf4_u8m1_m( @@ -615,7 +615,7 @@ vuint8m1_t test_vredxor_vs_u8mf8_u8m1_m(vbool64_t mask, vuint8mf8_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf2_u8m1_m( @@ -624,7 +624,7 @@ vuint8m1_t test_vredxor_vs_u8mf4_u8m1_m(vbool32_t mask, vuint8mf4_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m1_u8m1_m( @@ -633,7 +633,7 @@ vuint8m1_t test_vredxor_vs_u8mf2_u8m1_m(vbool16_t mask, vuint8mf2_t vector, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m1_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u8m1_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m2_u8m1_m( @@ -642,7 +642,7 @@ vuint8m1_t test_vredxor_vs_u8m1_u8m1_m(vbool8_t mask, vuint8m1_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m2_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u8m2_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m4_u8m1_m( @@ -651,7 +651,7 @@ vuint8m1_t test_vredxor_vs_u8m2_u8m1_m(vbool4_t mask, vuint8m2_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m4_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u8m4_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m8_u8m1_m( @@ -660,7 +660,7 @@ vuint8m1_t test_vredxor_vs_u8m4_u8m1_m(vbool2_t mask, vuint8m4_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m8_u8m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u8m8_u8m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16mf4_u16m1_m( @@ -669,7 +669,7 @@ vuint8m1_t test_vredxor_vs_u8m8_u8m1_m(vbool1_t mask, vuint8m8_t vector, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u16mf4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16mf2_u16m1_m( @@ -678,7 +678,7 @@ vuint16m1_t test_vredxor_vs_u16mf4_u16m1_m(vbool64_t mask, vuint16mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u16mf2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m1_u16m1_m( @@ -687,7 +687,7 @@ vuint16m1_t test_vredxor_vs_u16mf2_u16m1_m(vbool32_t mask, vuint16mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m1_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u16m1_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m2_u16m1_m( @@ -696,7 +696,7 @@ vuint16m1_t test_vredxor_vs_u16m1_u16m1_m(vbool16_t mask, vuint16m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u16m2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m4_u16m1_m( @@ -705,7 +705,7 @@ vuint16m1_t test_vredxor_vs_u16m2_u16m1_m(vbool8_t mask, vuint16m2_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u16m4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m8_u16m1_m( @@ -714,7 +714,7 @@ vuint16m1_t test_vredxor_vs_u16m4_u16m1_m(vbool4_t mask, vuint16m4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m8_u16m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u16m8_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32mf2_u32m1_m( @@ -723,7 +723,7 @@ vuint16m1_t test_vredxor_vs_u16m8_u16m1_m(vbool2_t mask, vuint16m8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u32mf2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m1_u32m1_m( @@ -732,7 +732,7 @@ vuint32m1_t test_vredxor_vs_u32mf2_u32m1_m(vbool64_t mask, vuint32mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m1_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u32m1_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m2_u32m1_m( @@ -741,7 +741,7 @@ vuint32m1_t test_vredxor_vs_u32m1_u32m1_m(vbool32_t mask, vuint32m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u32m2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m4_u32m1_m( @@ -750,7 +750,7 @@ vuint32m1_t test_vredxor_vs_u32m2_u32m1_m(vbool16_t mask, vuint32m2_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m4_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u32m4_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m8_u32m1_m( @@ -759,7 +759,7 @@ vuint32m1_t test_vredxor_vs_u32m4_u32m1_m(vbool8_t mask, vuint32m4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m8_u32m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u32m8_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m1_u64m1_m( @@ -768,7 +768,7 @@ vuint32m1_t test_vredxor_vs_u32m8_u32m1_m(vbool4_t mask, vuint32m8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m1_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u64m1_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m2_u64m1_m( @@ -777,7 +777,7 @@ vuint64m1_t test_vredxor_vs_u64m1_u64m1_m(vbool64_t mask, vuint64m1_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m2_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u64m2_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m4_u64m1_m( @@ -786,7 +786,7 @@ vuint64m1_t test_vredxor_vs_u64m2_u64m1_m(vbool32_t mask, vuint64m2_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m4_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u64m4_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m8_u64m1_m( @@ -795,6 +795,6 @@ vuint64m1_t test_vredxor_vs_u64m4_u64m1_m(vbool16_t mask, vuint64m4_t vector, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m8_u64m1_m(vbool8_t mask, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m8_u64m1_m(mask, vector, scalar, vl); + return __riscv_vredxor_vs_u64m8_u64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c index c5d71fb2f0c2540f47f075bd1a5f257ca5060b63..f11aacd35b18de047e3b335f40d032a16923ae78 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint8mf8_t test_vreinterpret_v_i8mf8_u8mf8(vint8mf8_t src) { - return vreinterpret_v_i8mf8_u8mf8(src); + return __riscv_vreinterpret_v_i8mf8_u8mf8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8mf4_u8mf4( @@ -20,7 +20,7 @@ vuint8mf8_t test_vreinterpret_v_i8mf8_u8mf8(vint8mf8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint8mf4_t test_vreinterpret_v_i8mf4_u8mf4(vint8mf4_t src) { - return vreinterpret_v_i8mf4_u8mf4(src); + return __riscv_vreinterpret_v_i8mf4_u8mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8mf2_u8mf2( @@ -28,7 +28,7 @@ vuint8mf4_t test_vreinterpret_v_i8mf4_u8mf4(vint8mf4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint8mf2_t test_vreinterpret_v_i8mf2_u8mf2(vint8mf2_t src) { - return vreinterpret_v_i8mf2_u8mf2(src); + return __riscv_vreinterpret_v_i8mf2_u8mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m1_u8m1( @@ -36,7 +36,7 @@ vuint8mf2_t test_vreinterpret_v_i8mf2_u8mf2(vint8mf2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint8m1_t test_vreinterpret_v_i8m1_u8m1(vint8m1_t src) { - return vreinterpret_v_i8m1_u8m1(src); + return __riscv_vreinterpret_v_i8m1_u8m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m2_u8m2( @@ -44,7 +44,7 @@ vuint8m1_t test_vreinterpret_v_i8m1_u8m1(vint8m1_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint8m2_t test_vreinterpret_v_i8m2_u8m2(vint8m2_t src) { - return vreinterpret_v_i8m2_u8m2(src); + return __riscv_vreinterpret_v_i8m2_u8m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m4_u8m4( @@ -52,7 +52,7 @@ vuint8m2_t test_vreinterpret_v_i8m2_u8m2(vint8m2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint8m4_t test_vreinterpret_v_i8m4_u8m4(vint8m4_t src) { - return vreinterpret_v_i8m4_u8m4(src); + return __riscv_vreinterpret_v_i8m4_u8m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m8_u8m8( @@ -60,7 +60,7 @@ vuint8m4_t test_vreinterpret_v_i8m4_u8m4(vint8m4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint8m8_t test_vreinterpret_v_i8m8_u8m8(vint8m8_t src) { - return vreinterpret_v_i8m8_u8m8(src); + return __riscv_vreinterpret_v_i8m8_u8m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8mf8_i8mf8( @@ -68,7 +68,7 @@ vuint8m8_t test_vreinterpret_v_i8m8_u8m8(vint8m8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint8mf8_t test_vreinterpret_v_u8mf8_i8mf8(vuint8mf8_t src) { - return vreinterpret_v_u8mf8_i8mf8(src); + return __riscv_vreinterpret_v_u8mf8_i8mf8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8mf4_i8mf4( @@ -76,7 +76,7 @@ vint8mf8_t test_vreinterpret_v_u8mf8_i8mf8(vuint8mf8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint8mf4_t test_vreinterpret_v_u8mf4_i8mf4(vuint8mf4_t src) { - return vreinterpret_v_u8mf4_i8mf4(src); + return __riscv_vreinterpret_v_u8mf4_i8mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8mf2_i8mf2( @@ -84,7 +84,7 @@ vint8mf4_t test_vreinterpret_v_u8mf4_i8mf4(vuint8mf4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint8mf2_t test_vreinterpret_v_u8mf2_i8mf2(vuint8mf2_t src) { - return vreinterpret_v_u8mf2_i8mf2(src); + return __riscv_vreinterpret_v_u8mf2_i8mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m1_i8m1( @@ -92,7 +92,7 @@ vint8mf2_t test_vreinterpret_v_u8mf2_i8mf2(vuint8mf2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint8m1_t test_vreinterpret_v_u8m1_i8m1(vuint8m1_t src) { - return vreinterpret_v_u8m1_i8m1(src); + return __riscv_vreinterpret_v_u8m1_i8m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m2_i8m2( @@ -100,7 +100,7 @@ vint8m1_t test_vreinterpret_v_u8m1_i8m1(vuint8m1_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint8m2_t test_vreinterpret_v_u8m2_i8m2(vuint8m2_t src) { - return vreinterpret_v_u8m2_i8m2(src); + return __riscv_vreinterpret_v_u8m2_i8m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m4_i8m4( @@ -108,7 +108,7 @@ vint8m2_t test_vreinterpret_v_u8m2_i8m2(vuint8m2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint8m4_t test_vreinterpret_v_u8m4_i8m4(vuint8m4_t src) { - return vreinterpret_v_u8m4_i8m4(src); + return __riscv_vreinterpret_v_u8m4_i8m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m8_i8m8( @@ -116,7 +116,7 @@ vint8m4_t test_vreinterpret_v_u8m4_i8m4(vuint8m4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint8m8_t test_vreinterpret_v_u8m8_i8m8(vuint8m8_t src) { - return vreinterpret_v_u8m8_i8m8(src); + return __riscv_vreinterpret_v_u8m8_i8m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16mf4_f16mf4( @@ -125,7 +125,7 @@ vint8m8_t test_vreinterpret_v_u8m8_i8m8(vuint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vreinterpret_v_i16mf4_f16mf4(vint16mf4_t src) { - return vreinterpret_v_i16mf4_f16mf4(src); + return __riscv_vreinterpret_v_i16mf4_f16mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16mf2_f16mf2( @@ -134,7 +134,7 @@ vfloat16mf4_t test_vreinterpret_v_i16mf4_f16mf4(vint16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vreinterpret_v_i16mf2_f16mf2(vint16mf2_t src) { - return vreinterpret_v_i16mf2_f16mf2(src); + return __riscv_vreinterpret_v_i16mf2_f16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m1_f16m1( @@ -143,7 +143,7 @@ vfloat16mf2_t test_vreinterpret_v_i16mf2_f16mf2(vint16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vreinterpret_v_i16m1_f16m1(vint16m1_t src) { - return vreinterpret_v_i16m1_f16m1(src); + return __riscv_vreinterpret_v_i16m1_f16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m2_f16m2( @@ -152,7 +152,7 @@ vfloat16m1_t test_vreinterpret_v_i16m1_f16m1(vint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vreinterpret_v_i16m2_f16m2(vint16m2_t src) { - return vreinterpret_v_i16m2_f16m2(src); + return __riscv_vreinterpret_v_i16m2_f16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m4_f16m4( @@ -161,7 +161,7 @@ vfloat16m2_t test_vreinterpret_v_i16m2_f16m2(vint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vreinterpret_v_i16m4_f16m4(vint16m4_t src) { - return vreinterpret_v_i16m4_f16m4(src); + return __riscv_vreinterpret_v_i16m4_f16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m8_f16m8( @@ -170,7 +170,7 @@ vfloat16m4_t test_vreinterpret_v_i16m4_f16m4(vint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vreinterpret_v_i16m8_f16m8(vint16m8_t src) { - return vreinterpret_v_i16m8_f16m8(src); + return __riscv_vreinterpret_v_i16m8_f16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16mf4_f16mf4( @@ -179,7 +179,7 @@ vfloat16m8_t test_vreinterpret_v_i16m8_f16m8(vint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vreinterpret_v_u16mf4_f16mf4(vuint16mf4_t src) { - return vreinterpret_v_u16mf4_f16mf4(src); + return __riscv_vreinterpret_v_u16mf4_f16mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16mf2_f16mf2( @@ -188,7 +188,7 @@ vfloat16mf4_t test_vreinterpret_v_u16mf4_f16mf4(vuint16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vreinterpret_v_u16mf2_f16mf2(vuint16mf2_t src) { - return vreinterpret_v_u16mf2_f16mf2(src); + return __riscv_vreinterpret_v_u16mf2_f16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m1_f16m1( @@ -197,7 +197,7 @@ vfloat16mf2_t test_vreinterpret_v_u16mf2_f16mf2(vuint16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vreinterpret_v_u16m1_f16m1(vuint16m1_t src) { - return vreinterpret_v_u16m1_f16m1(src); + return __riscv_vreinterpret_v_u16m1_f16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m2_f16m2( @@ -206,7 +206,7 @@ vfloat16m1_t test_vreinterpret_v_u16m1_f16m1(vuint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vreinterpret_v_u16m2_f16m2(vuint16m2_t src) { - return vreinterpret_v_u16m2_f16m2(src); + return __riscv_vreinterpret_v_u16m2_f16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m4_f16m4( @@ -215,7 +215,7 @@ vfloat16m2_t test_vreinterpret_v_u16m2_f16m2(vuint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vreinterpret_v_u16m4_f16m4(vuint16m4_t src) { - return vreinterpret_v_u16m4_f16m4(src); + return __riscv_vreinterpret_v_u16m4_f16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m8_f16m8( @@ -224,7 +224,7 @@ vfloat16m4_t test_vreinterpret_v_u16m4_f16m4(vuint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vreinterpret_v_u16m8_f16m8(vuint16m8_t src) { - return vreinterpret_v_u16m8_f16m8(src); + return __riscv_vreinterpret_v_u16m8_f16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16mf4_u16mf4( @@ -232,7 +232,7 @@ vfloat16m8_t test_vreinterpret_v_u16m8_f16m8(vuint16m8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint16mf4_t test_vreinterpret_v_i16mf4_u16mf4(vint16mf4_t src) { - return vreinterpret_v_i16mf4_u16mf4(src); + return __riscv_vreinterpret_v_i16mf4_u16mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16mf2_u16mf2( @@ -240,7 +240,7 @@ vuint16mf4_t test_vreinterpret_v_i16mf4_u16mf4(vint16mf4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint16mf2_t test_vreinterpret_v_i16mf2_u16mf2(vint16mf2_t src) { - return vreinterpret_v_i16mf2_u16mf2(src); + return __riscv_vreinterpret_v_i16mf2_u16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m1_u16m1( @@ -248,7 +248,7 @@ vuint16mf2_t test_vreinterpret_v_i16mf2_u16mf2(vint16mf2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint16m1_t test_vreinterpret_v_i16m1_u16m1(vint16m1_t src) { - return vreinterpret_v_i16m1_u16m1(src); + return __riscv_vreinterpret_v_i16m1_u16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m2_u16m2( @@ -256,7 +256,7 @@ vuint16m1_t test_vreinterpret_v_i16m1_u16m1(vint16m1_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint16m2_t test_vreinterpret_v_i16m2_u16m2(vint16m2_t src) { - return vreinterpret_v_i16m2_u16m2(src); + return __riscv_vreinterpret_v_i16m2_u16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m4_u16m4( @@ -264,7 +264,7 @@ vuint16m2_t test_vreinterpret_v_i16m2_u16m2(vint16m2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint16m4_t test_vreinterpret_v_i16m4_u16m4(vint16m4_t src) { - return vreinterpret_v_i16m4_u16m4(src); + return __riscv_vreinterpret_v_i16m4_u16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m8_u16m8( @@ -272,7 +272,7 @@ vuint16m4_t test_vreinterpret_v_i16m4_u16m4(vint16m4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint16m8_t test_vreinterpret_v_i16m8_u16m8(vint16m8_t src) { - return vreinterpret_v_i16m8_u16m8(src); + return __riscv_vreinterpret_v_i16m8_u16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16mf4_i16mf4( @@ -280,7 +280,7 @@ vuint16m8_t test_vreinterpret_v_i16m8_u16m8(vint16m8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint16mf4_t test_vreinterpret_v_u16mf4_i16mf4(vuint16mf4_t src) { - return vreinterpret_v_u16mf4_i16mf4(src); + return __riscv_vreinterpret_v_u16mf4_i16mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16mf2_i16mf2( @@ -288,7 +288,7 @@ vint16mf4_t test_vreinterpret_v_u16mf4_i16mf4(vuint16mf4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint16mf2_t test_vreinterpret_v_u16mf2_i16mf2(vuint16mf2_t src) { - return vreinterpret_v_u16mf2_i16mf2(src); + return __riscv_vreinterpret_v_u16mf2_i16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m1_i16m1( @@ -296,7 +296,7 @@ vint16mf2_t test_vreinterpret_v_u16mf2_i16mf2(vuint16mf2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint16m1_t test_vreinterpret_v_u16m1_i16m1(vuint16m1_t src) { - return vreinterpret_v_u16m1_i16m1(src); + return __riscv_vreinterpret_v_u16m1_i16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m2_i16m2( @@ -304,7 +304,7 @@ vint16m1_t test_vreinterpret_v_u16m1_i16m1(vuint16m1_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint16m2_t test_vreinterpret_v_u16m2_i16m2(vuint16m2_t src) { - return vreinterpret_v_u16m2_i16m2(src); + return __riscv_vreinterpret_v_u16m2_i16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m4_i16m4( @@ -312,7 +312,7 @@ vint16m2_t test_vreinterpret_v_u16m2_i16m2(vuint16m2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint16m4_t test_vreinterpret_v_u16m4_i16m4(vuint16m4_t src) { - return vreinterpret_v_u16m4_i16m4(src); + return __riscv_vreinterpret_v_u16m4_i16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m8_i16m8( @@ -320,7 +320,7 @@ vint16m4_t test_vreinterpret_v_u16m4_i16m4(vuint16m4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint16m8_t test_vreinterpret_v_u16m8_i16m8(vuint16m8_t src) { - return vreinterpret_v_u16m8_i16m8(src); + return __riscv_vreinterpret_v_u16m8_i16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16mf4_i16mf4( @@ -329,7 +329,7 @@ vint16m8_t test_vreinterpret_v_u16m8_i16m8(vuint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vreinterpret_v_f16mf4_i16mf4(vfloat16mf4_t src) { - return vreinterpret_v_f16mf4_i16mf4(src); + return __riscv_vreinterpret_v_f16mf4_i16mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16mf2_i16mf2( @@ -338,7 +338,7 @@ vint16mf4_t test_vreinterpret_v_f16mf4_i16mf4(vfloat16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vreinterpret_v_f16mf2_i16mf2(vfloat16mf2_t src) { - return vreinterpret_v_f16mf2_i16mf2(src); + return __riscv_vreinterpret_v_f16mf2_i16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16m1_i16m1( @@ -347,7 +347,7 @@ vint16mf2_t test_vreinterpret_v_f16mf2_i16mf2(vfloat16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vreinterpret_v_f16m1_i16m1(vfloat16m1_t src) { - return vreinterpret_v_f16m1_i16m1(src); + return __riscv_vreinterpret_v_f16m1_i16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16m2_i16m2( @@ -356,7 +356,7 @@ vint16m1_t test_vreinterpret_v_f16m1_i16m1(vfloat16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vreinterpret_v_f16m2_i16m2(vfloat16m2_t src) { - return vreinterpret_v_f16m2_i16m2(src); + return __riscv_vreinterpret_v_f16m2_i16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16m4_i16m4( @@ -365,7 +365,7 @@ vint16m2_t test_vreinterpret_v_f16m2_i16m2(vfloat16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vreinterpret_v_f16m4_i16m4(vfloat16m4_t src) { - return vreinterpret_v_f16m4_i16m4(src); + return __riscv_vreinterpret_v_f16m4_i16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16m8_i16m8( @@ -374,7 +374,7 @@ vint16m4_t test_vreinterpret_v_f16m4_i16m4(vfloat16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vreinterpret_v_f16m8_i16m8(vfloat16m8_t src) { - return vreinterpret_v_f16m8_i16m8(src); + return __riscv_vreinterpret_v_f16m8_i16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16mf4_u16mf4( @@ -383,7 +383,7 @@ vint16m8_t test_vreinterpret_v_f16m8_i16m8(vfloat16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vreinterpret_v_f16mf4_u16mf4(vfloat16mf4_t src) { - return vreinterpret_v_f16mf4_u16mf4(src); + return __riscv_vreinterpret_v_f16mf4_u16mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16mf2_u16mf2( @@ -392,7 +392,7 @@ vuint16mf4_t test_vreinterpret_v_f16mf4_u16mf4(vfloat16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vreinterpret_v_f16mf2_u16mf2(vfloat16mf2_t src) { - return vreinterpret_v_f16mf2_u16mf2(src); + return __riscv_vreinterpret_v_f16mf2_u16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16m1_u16m1( @@ -401,7 +401,7 @@ vuint16mf2_t test_vreinterpret_v_f16mf2_u16mf2(vfloat16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vreinterpret_v_f16m1_u16m1(vfloat16m1_t src) { - return vreinterpret_v_f16m1_u16m1(src); + return __riscv_vreinterpret_v_f16m1_u16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16m2_u16m2( @@ -410,7 +410,7 @@ vuint16m1_t test_vreinterpret_v_f16m1_u16m1(vfloat16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vreinterpret_v_f16m2_u16m2(vfloat16m2_t src) { - return vreinterpret_v_f16m2_u16m2(src); + return __riscv_vreinterpret_v_f16m2_u16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16m4_u16m4( @@ -419,7 +419,7 @@ vuint16m2_t test_vreinterpret_v_f16m2_u16m2(vfloat16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vreinterpret_v_f16m4_u16m4(vfloat16m4_t src) { - return vreinterpret_v_f16m4_u16m4(src); + return __riscv_vreinterpret_v_f16m4_u16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f16m8_u16m8( @@ -428,7 +428,7 @@ vuint16m4_t test_vreinterpret_v_f16m4_u16m4(vfloat16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vreinterpret_v_f16m8_u16m8(vfloat16m8_t src) { - return vreinterpret_v_f16m8_u16m8(src); + return __riscv_vreinterpret_v_f16m8_u16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32mf2_f32mf2( @@ -437,7 +437,7 @@ vuint16m8_t test_vreinterpret_v_f16m8_u16m8(vfloat16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vreinterpret_v_i32mf2_f32mf2(vint32mf2_t src) { - return vreinterpret_v_i32mf2_f32mf2(src); + return __riscv_vreinterpret_v_i32mf2_f32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m1_f32m1( @@ -446,7 +446,7 @@ vfloat32mf2_t test_vreinterpret_v_i32mf2_f32mf2(vint32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vreinterpret_v_i32m1_f32m1(vint32m1_t src) { - return vreinterpret_v_i32m1_f32m1(src); + return __riscv_vreinterpret_v_i32m1_f32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m2_f32m2( @@ -455,7 +455,7 @@ vfloat32m1_t test_vreinterpret_v_i32m1_f32m1(vint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vreinterpret_v_i32m2_f32m2(vint32m2_t src) { - return vreinterpret_v_i32m2_f32m2(src); + return __riscv_vreinterpret_v_i32m2_f32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m4_f32m4( @@ -464,7 +464,7 @@ vfloat32m2_t test_vreinterpret_v_i32m2_f32m2(vint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vreinterpret_v_i32m4_f32m4(vint32m4_t src) { - return vreinterpret_v_i32m4_f32m4(src); + return __riscv_vreinterpret_v_i32m4_f32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m8_f32m8( @@ -473,7 +473,7 @@ vfloat32m4_t test_vreinterpret_v_i32m4_f32m4(vint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vreinterpret_v_i32m8_f32m8(vint32m8_t src) { - return vreinterpret_v_i32m8_f32m8(src); + return __riscv_vreinterpret_v_i32m8_f32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32mf2_f32mf2( @@ -482,7 +482,7 @@ vfloat32m8_t test_vreinterpret_v_i32m8_f32m8(vint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vreinterpret_v_u32mf2_f32mf2(vuint32mf2_t src) { - return vreinterpret_v_u32mf2_f32mf2(src); + return __riscv_vreinterpret_v_u32mf2_f32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m1_f32m1( @@ -491,7 +491,7 @@ vfloat32mf2_t test_vreinterpret_v_u32mf2_f32mf2(vuint32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vreinterpret_v_u32m1_f32m1(vuint32m1_t src) { - return vreinterpret_v_u32m1_f32m1(src); + return __riscv_vreinterpret_v_u32m1_f32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m2_f32m2( @@ -500,7 +500,7 @@ vfloat32m1_t test_vreinterpret_v_u32m1_f32m1(vuint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vreinterpret_v_u32m2_f32m2(vuint32m2_t src) { - return vreinterpret_v_u32m2_f32m2(src); + return __riscv_vreinterpret_v_u32m2_f32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m4_f32m4( @@ -509,7 +509,7 @@ vfloat32m2_t test_vreinterpret_v_u32m2_f32m2(vuint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vreinterpret_v_u32m4_f32m4(vuint32m4_t src) { - return vreinterpret_v_u32m4_f32m4(src); + return __riscv_vreinterpret_v_u32m4_f32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m8_f32m8( @@ -518,7 +518,7 @@ vfloat32m4_t test_vreinterpret_v_u32m4_f32m4(vuint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vreinterpret_v_u32m8_f32m8(vuint32m8_t src) { - return vreinterpret_v_u32m8_f32m8(src); + return __riscv_vreinterpret_v_u32m8_f32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32mf2_u32mf2( @@ -526,7 +526,7 @@ vfloat32m8_t test_vreinterpret_v_u32m8_f32m8(vuint32m8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint32mf2_t test_vreinterpret_v_i32mf2_u32mf2(vint32mf2_t src) { - return vreinterpret_v_i32mf2_u32mf2(src); + return __riscv_vreinterpret_v_i32mf2_u32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m1_u32m1( @@ -534,7 +534,7 @@ vuint32mf2_t test_vreinterpret_v_i32mf2_u32mf2(vint32mf2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint32m1_t test_vreinterpret_v_i32m1_u32m1(vint32m1_t src) { - return vreinterpret_v_i32m1_u32m1(src); + return __riscv_vreinterpret_v_i32m1_u32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m2_u32m2( @@ -542,7 +542,7 @@ vuint32m1_t test_vreinterpret_v_i32m1_u32m1(vint32m1_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint32m2_t test_vreinterpret_v_i32m2_u32m2(vint32m2_t src) { - return vreinterpret_v_i32m2_u32m2(src); + return __riscv_vreinterpret_v_i32m2_u32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m4_u32m4( @@ -550,7 +550,7 @@ vuint32m2_t test_vreinterpret_v_i32m2_u32m2(vint32m2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint32m4_t test_vreinterpret_v_i32m4_u32m4(vint32m4_t src) { - return vreinterpret_v_i32m4_u32m4(src); + return __riscv_vreinterpret_v_i32m4_u32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m8_u32m8( @@ -558,7 +558,7 @@ vuint32m4_t test_vreinterpret_v_i32m4_u32m4(vint32m4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint32m8_t test_vreinterpret_v_i32m8_u32m8(vint32m8_t src) { - return vreinterpret_v_i32m8_u32m8(src); + return __riscv_vreinterpret_v_i32m8_u32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32mf2_i32mf2( @@ -566,7 +566,7 @@ vuint32m8_t test_vreinterpret_v_i32m8_u32m8(vint32m8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint32mf2_t test_vreinterpret_v_u32mf2_i32mf2(vuint32mf2_t src) { - return vreinterpret_v_u32mf2_i32mf2(src); + return __riscv_vreinterpret_v_u32mf2_i32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m1_i32m1( @@ -574,7 +574,7 @@ vint32mf2_t test_vreinterpret_v_u32mf2_i32mf2(vuint32mf2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint32m1_t test_vreinterpret_v_u32m1_i32m1(vuint32m1_t src) { - return vreinterpret_v_u32m1_i32m1(src); + return __riscv_vreinterpret_v_u32m1_i32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m2_i32m2( @@ -582,7 +582,7 @@ vint32m1_t test_vreinterpret_v_u32m1_i32m1(vuint32m1_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint32m2_t test_vreinterpret_v_u32m2_i32m2(vuint32m2_t src) { - return vreinterpret_v_u32m2_i32m2(src); + return __riscv_vreinterpret_v_u32m2_i32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m4_i32m4( @@ -590,7 +590,7 @@ vint32m2_t test_vreinterpret_v_u32m2_i32m2(vuint32m2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint32m4_t test_vreinterpret_v_u32m4_i32m4(vuint32m4_t src) { - return vreinterpret_v_u32m4_i32m4(src); + return __riscv_vreinterpret_v_u32m4_i32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m8_i32m8( @@ -598,7 +598,7 @@ vint32m4_t test_vreinterpret_v_u32m4_i32m4(vuint32m4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint32m8_t test_vreinterpret_v_u32m8_i32m8(vuint32m8_t src) { - return vreinterpret_v_u32m8_i32m8(src); + return __riscv_vreinterpret_v_u32m8_i32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32mf2_i32mf2( @@ -607,7 +607,7 @@ vint32m8_t test_vreinterpret_v_u32m8_i32m8(vuint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vreinterpret_v_f32mf2_i32mf2(vfloat32mf2_t src) { - return vreinterpret_v_f32mf2_i32mf2(src); + return __riscv_vreinterpret_v_f32mf2_i32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32m1_i32m1( @@ -616,7 +616,7 @@ vint32mf2_t test_vreinterpret_v_f32mf2_i32mf2(vfloat32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vreinterpret_v_f32m1_i32m1(vfloat32m1_t src) { - return vreinterpret_v_f32m1_i32m1(src); + return __riscv_vreinterpret_v_f32m1_i32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32m2_i32m2( @@ -625,7 +625,7 @@ vint32m1_t test_vreinterpret_v_f32m1_i32m1(vfloat32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vreinterpret_v_f32m2_i32m2(vfloat32m2_t src) { - return vreinterpret_v_f32m2_i32m2(src); + return __riscv_vreinterpret_v_f32m2_i32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32m4_i32m4( @@ -634,7 +634,7 @@ vint32m2_t test_vreinterpret_v_f32m2_i32m2(vfloat32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vreinterpret_v_f32m4_i32m4(vfloat32m4_t src) { - return vreinterpret_v_f32m4_i32m4(src); + return __riscv_vreinterpret_v_f32m4_i32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32m8_i32m8( @@ -643,7 +643,7 @@ vint32m4_t test_vreinterpret_v_f32m4_i32m4(vfloat32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vreinterpret_v_f32m8_i32m8(vfloat32m8_t src) { - return vreinterpret_v_f32m8_i32m8(src); + return __riscv_vreinterpret_v_f32m8_i32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32mf2_u32mf2( @@ -652,7 +652,7 @@ vint32m8_t test_vreinterpret_v_f32m8_i32m8(vfloat32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vreinterpret_v_f32mf2_u32mf2(vfloat32mf2_t src) { - return vreinterpret_v_f32mf2_u32mf2(src); + return __riscv_vreinterpret_v_f32mf2_u32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32m1_u32m1( @@ -661,7 +661,7 @@ vuint32mf2_t test_vreinterpret_v_f32mf2_u32mf2(vfloat32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vreinterpret_v_f32m1_u32m1(vfloat32m1_t src) { - return vreinterpret_v_f32m1_u32m1(src); + return __riscv_vreinterpret_v_f32m1_u32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32m2_u32m2( @@ -670,7 +670,7 @@ vuint32m1_t test_vreinterpret_v_f32m1_u32m1(vfloat32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vreinterpret_v_f32m2_u32m2(vfloat32m2_t src) { - return vreinterpret_v_f32m2_u32m2(src); + return __riscv_vreinterpret_v_f32m2_u32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32m4_u32m4( @@ -679,7 +679,7 @@ vuint32m2_t test_vreinterpret_v_f32m2_u32m2(vfloat32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vreinterpret_v_f32m4_u32m4(vfloat32m4_t src) { - return vreinterpret_v_f32m4_u32m4(src); + return __riscv_vreinterpret_v_f32m4_u32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f32m8_u32m8( @@ -688,7 +688,7 @@ vuint32m4_t test_vreinterpret_v_f32m4_u32m4(vfloat32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vreinterpret_v_f32m8_u32m8(vfloat32m8_t src) { - return vreinterpret_v_f32m8_u32m8(src); + return __riscv_vreinterpret_v_f32m8_u32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m1_f64m1( @@ -697,7 +697,7 @@ vuint32m8_t test_vreinterpret_v_f32m8_u32m8(vfloat32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vreinterpret_v_i64m1_f64m1(vint64m1_t src) { - return vreinterpret_v_i64m1_f64m1(src); + return __riscv_vreinterpret_v_i64m1_f64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m2_f64m2( @@ -706,7 +706,7 @@ vfloat64m1_t test_vreinterpret_v_i64m1_f64m1(vint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vreinterpret_v_i64m2_f64m2(vint64m2_t src) { - return vreinterpret_v_i64m2_f64m2(src); + return __riscv_vreinterpret_v_i64m2_f64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m4_f64m4( @@ -715,7 +715,7 @@ vfloat64m2_t test_vreinterpret_v_i64m2_f64m2(vint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vreinterpret_v_i64m4_f64m4(vint64m4_t src) { - return vreinterpret_v_i64m4_f64m4(src); + return __riscv_vreinterpret_v_i64m4_f64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m8_f64m8( @@ -724,7 +724,7 @@ vfloat64m4_t test_vreinterpret_v_i64m4_f64m4(vint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vreinterpret_v_i64m8_f64m8(vint64m8_t src) { - return vreinterpret_v_i64m8_f64m8(src); + return __riscv_vreinterpret_v_i64m8_f64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m1_f64m1( @@ -733,7 +733,7 @@ vfloat64m8_t test_vreinterpret_v_i64m8_f64m8(vint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vreinterpret_v_u64m1_f64m1(vuint64m1_t src) { - return vreinterpret_v_u64m1_f64m1(src); + return __riscv_vreinterpret_v_u64m1_f64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m2_f64m2( @@ -742,7 +742,7 @@ vfloat64m1_t test_vreinterpret_v_u64m1_f64m1(vuint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vreinterpret_v_u64m2_f64m2(vuint64m2_t src) { - return vreinterpret_v_u64m2_f64m2(src); + return __riscv_vreinterpret_v_u64m2_f64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m4_f64m4( @@ -751,7 +751,7 @@ vfloat64m2_t test_vreinterpret_v_u64m2_f64m2(vuint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vreinterpret_v_u64m4_f64m4(vuint64m4_t src) { - return vreinterpret_v_u64m4_f64m4(src); + return __riscv_vreinterpret_v_u64m4_f64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m8_f64m8( @@ -760,7 +760,7 @@ vfloat64m4_t test_vreinterpret_v_u64m4_f64m4(vuint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vreinterpret_v_u64m8_f64m8(vuint64m8_t src) { - return vreinterpret_v_u64m8_f64m8(src); + return __riscv_vreinterpret_v_u64m8_f64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m1_u64m1( @@ -768,7 +768,7 @@ vfloat64m8_t test_vreinterpret_v_u64m8_f64m8(vuint64m8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint64m1_t test_vreinterpret_v_i64m1_u64m1(vint64m1_t src) { - return vreinterpret_v_i64m1_u64m1(src); + return __riscv_vreinterpret_v_i64m1_u64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m2_u64m2( @@ -776,7 +776,7 @@ vuint64m1_t test_vreinterpret_v_i64m1_u64m1(vint64m1_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint64m2_t test_vreinterpret_v_i64m2_u64m2(vint64m2_t src) { - return vreinterpret_v_i64m2_u64m2(src); + return __riscv_vreinterpret_v_i64m2_u64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m4_u64m4( @@ -784,7 +784,7 @@ vuint64m2_t test_vreinterpret_v_i64m2_u64m2(vint64m2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint64m4_t test_vreinterpret_v_i64m4_u64m4(vint64m4_t src) { - return vreinterpret_v_i64m4_u64m4(src); + return __riscv_vreinterpret_v_i64m4_u64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m8_u64m8( @@ -792,7 +792,7 @@ vuint64m4_t test_vreinterpret_v_i64m4_u64m4(vint64m4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vuint64m8_t test_vreinterpret_v_i64m8_u64m8(vint64m8_t src) { - return vreinterpret_v_i64m8_u64m8(src); + return __riscv_vreinterpret_v_i64m8_u64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m1_i64m1( @@ -800,7 +800,7 @@ vuint64m8_t test_vreinterpret_v_i64m8_u64m8(vint64m8_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint64m1_t test_vreinterpret_v_u64m1_i64m1(vuint64m1_t src) { - return vreinterpret_v_u64m1_i64m1(src); + return __riscv_vreinterpret_v_u64m1_i64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m2_i64m2( @@ -808,7 +808,7 @@ vint64m1_t test_vreinterpret_v_u64m1_i64m1(vuint64m1_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint64m2_t test_vreinterpret_v_u64m2_i64m2(vuint64m2_t src) { - return vreinterpret_v_u64m2_i64m2(src); + return __riscv_vreinterpret_v_u64m2_i64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m4_i64m4( @@ -816,7 +816,7 @@ vint64m2_t test_vreinterpret_v_u64m2_i64m2(vuint64m2_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint64m4_t test_vreinterpret_v_u64m4_i64m4(vuint64m4_t src) { - return vreinterpret_v_u64m4_i64m4(src); + return __riscv_vreinterpret_v_u64m4_i64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m8_i64m8( @@ -824,7 +824,7 @@ vint64m4_t test_vreinterpret_v_u64m4_i64m4(vuint64m4_t src) { // CHECK-RV64-NEXT: ret [[SRC:%.*]] // vint64m8_t test_vreinterpret_v_u64m8_i64m8(vuint64m8_t src) { - return vreinterpret_v_u64m8_i64m8(src); + return __riscv_vreinterpret_v_u64m8_i64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f64m1_i64m1( @@ -833,7 +833,7 @@ vint64m8_t test_vreinterpret_v_u64m8_i64m8(vuint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vreinterpret_v_f64m1_i64m1(vfloat64m1_t src) { - return vreinterpret_v_f64m1_i64m1(src); + return __riscv_vreinterpret_v_f64m1_i64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f64m2_i64m2( @@ -842,7 +842,7 @@ vint64m1_t test_vreinterpret_v_f64m1_i64m1(vfloat64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vreinterpret_v_f64m2_i64m2(vfloat64m2_t src) { - return vreinterpret_v_f64m2_i64m2(src); + return __riscv_vreinterpret_v_f64m2_i64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f64m4_i64m4( @@ -851,7 +851,7 @@ vint64m2_t test_vreinterpret_v_f64m2_i64m2(vfloat64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vreinterpret_v_f64m4_i64m4(vfloat64m4_t src) { - return vreinterpret_v_f64m4_i64m4(src); + return __riscv_vreinterpret_v_f64m4_i64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f64m8_i64m8( @@ -860,7 +860,7 @@ vint64m4_t test_vreinterpret_v_f64m4_i64m4(vfloat64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vreinterpret_v_f64m8_i64m8(vfloat64m8_t src) { - return vreinterpret_v_f64m8_i64m8(src); + return __riscv_vreinterpret_v_f64m8_i64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f64m1_u64m1( @@ -869,7 +869,7 @@ vint64m8_t test_vreinterpret_v_f64m8_i64m8(vfloat64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vreinterpret_v_f64m1_u64m1(vfloat64m1_t src) { - return vreinterpret_v_f64m1_u64m1(src); + return __riscv_vreinterpret_v_f64m1_u64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f64m2_u64m2( @@ -878,7 +878,7 @@ vuint64m1_t test_vreinterpret_v_f64m1_u64m1(vfloat64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vreinterpret_v_f64m2_u64m2(vfloat64m2_t src) { - return vreinterpret_v_f64m2_u64m2(src); + return __riscv_vreinterpret_v_f64m2_u64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f64m4_u64m4( @@ -887,7 +887,7 @@ vuint64m2_t test_vreinterpret_v_f64m2_u64m2(vfloat64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vreinterpret_v_f64m4_u64m4(vfloat64m4_t src) { - return vreinterpret_v_f64m4_u64m4(src); + return __riscv_vreinterpret_v_f64m4_u64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_f64m8_u64m8( @@ -896,7 +896,7 @@ vuint64m4_t test_vreinterpret_v_f64m4_u64m4(vfloat64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vreinterpret_v_f64m8_u64m8(vfloat64m8_t src) { - return vreinterpret_v_f64m8_u64m8(src); + return __riscv_vreinterpret_v_f64m8_u64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8mf4_i16mf4( @@ -905,7 +905,7 @@ vuint64m8_t test_vreinterpret_v_f64m8_u64m8(vfloat64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vreinterpret_v_i8mf4_i16mf4(vint8mf4_t src) { - return vreinterpret_v_i8mf4_i16mf4(src); + return __riscv_vreinterpret_v_i8mf4_i16mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8mf2_i16mf2( @@ -914,7 +914,7 @@ vint16mf4_t test_vreinterpret_v_i8mf4_i16mf4(vint8mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vreinterpret_v_i8mf2_i16mf2(vint8mf2_t src) { - return vreinterpret_v_i8mf2_i16mf2(src); + return __riscv_vreinterpret_v_i8mf2_i16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m1_i16m1( @@ -923,7 +923,7 @@ vint16mf2_t test_vreinterpret_v_i8mf2_i16mf2(vint8mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vreinterpret_v_i8m1_i16m1(vint8m1_t src) { - return vreinterpret_v_i8m1_i16m1(src); + return __riscv_vreinterpret_v_i8m1_i16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m2_i16m2( @@ -932,7 +932,7 @@ vint16m1_t test_vreinterpret_v_i8m1_i16m1(vint8m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vreinterpret_v_i8m2_i16m2(vint8m2_t src) { - return vreinterpret_v_i8m2_i16m2(src); + return __riscv_vreinterpret_v_i8m2_i16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m4_i16m4( @@ -941,7 +941,7 @@ vint16m2_t test_vreinterpret_v_i8m2_i16m2(vint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vreinterpret_v_i8m4_i16m4(vint8m4_t src) { - return vreinterpret_v_i8m4_i16m4(src); + return __riscv_vreinterpret_v_i8m4_i16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m8_i16m8( @@ -950,7 +950,7 @@ vint16m4_t test_vreinterpret_v_i8m4_i16m4(vint8m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vreinterpret_v_i8m8_i16m8(vint8m8_t src) { - return vreinterpret_v_i8m8_i16m8(src); + return __riscv_vreinterpret_v_i8m8_i16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8mf4_u16mf4( @@ -959,7 +959,7 @@ vint16m8_t test_vreinterpret_v_i8m8_i16m8(vint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vreinterpret_v_u8mf4_u16mf4(vuint8mf4_t src) { - return vreinterpret_v_u8mf4_u16mf4(src); + return __riscv_vreinterpret_v_u8mf4_u16mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8mf2_u16mf2( @@ -968,7 +968,7 @@ vuint16mf4_t test_vreinterpret_v_u8mf4_u16mf4(vuint8mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vreinterpret_v_u8mf2_u16mf2(vuint8mf2_t src) { - return vreinterpret_v_u8mf2_u16mf2(src); + return __riscv_vreinterpret_v_u8mf2_u16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m1_u16m1( @@ -977,7 +977,7 @@ vuint16mf2_t test_vreinterpret_v_u8mf2_u16mf2(vuint8mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vreinterpret_v_u8m1_u16m1(vuint8m1_t src) { - return vreinterpret_v_u8m1_u16m1(src); + return __riscv_vreinterpret_v_u8m1_u16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m2_u16m2( @@ -986,7 +986,7 @@ vuint16m1_t test_vreinterpret_v_u8m1_u16m1(vuint8m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vreinterpret_v_u8m2_u16m2(vuint8m2_t src) { - return vreinterpret_v_u8m2_u16m2(src); + return __riscv_vreinterpret_v_u8m2_u16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m4_u16m4( @@ -995,7 +995,7 @@ vuint16m2_t test_vreinterpret_v_u8m2_u16m2(vuint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vreinterpret_v_u8m4_u16m4(vuint8m4_t src) { - return vreinterpret_v_u8m4_u16m4(src); + return __riscv_vreinterpret_v_u8m4_u16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m8_u16m8( @@ -1004,7 +1004,7 @@ vuint16m4_t test_vreinterpret_v_u8m4_u16m4(vuint8m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vreinterpret_v_u8m8_u16m8(vuint8m8_t src) { - return vreinterpret_v_u8m8_u16m8(src); + return __riscv_vreinterpret_v_u8m8_u16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8mf2_i32mf2( @@ -1013,7 +1013,7 @@ vuint16m8_t test_vreinterpret_v_u8m8_u16m8(vuint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vreinterpret_v_i8mf2_i32mf2(vint8mf2_t src) { - return vreinterpret_v_i8mf2_i32mf2(src); + return __riscv_vreinterpret_v_i8mf2_i32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m1_i32m1( @@ -1022,7 +1022,7 @@ vint32mf2_t test_vreinterpret_v_i8mf2_i32mf2(vint8mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vreinterpret_v_i8m1_i32m1(vint8m1_t src) { - return vreinterpret_v_i8m1_i32m1(src); + return __riscv_vreinterpret_v_i8m1_i32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m2_i32m2( @@ -1031,7 +1031,7 @@ vint32m1_t test_vreinterpret_v_i8m1_i32m1(vint8m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vreinterpret_v_i8m2_i32m2(vint8m2_t src) { - return vreinterpret_v_i8m2_i32m2(src); + return __riscv_vreinterpret_v_i8m2_i32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m4_i32m4( @@ -1040,7 +1040,7 @@ vint32m2_t test_vreinterpret_v_i8m2_i32m2(vint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vreinterpret_v_i8m4_i32m4(vint8m4_t src) { - return vreinterpret_v_i8m4_i32m4(src); + return __riscv_vreinterpret_v_i8m4_i32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m8_i32m8( @@ -1049,7 +1049,7 @@ vint32m4_t test_vreinterpret_v_i8m4_i32m4(vint8m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vreinterpret_v_i8m8_i32m8(vint8m8_t src) { - return vreinterpret_v_i8m8_i32m8(src); + return __riscv_vreinterpret_v_i8m8_i32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8mf2_u32mf2( @@ -1058,7 +1058,7 @@ vint32m8_t test_vreinterpret_v_i8m8_i32m8(vint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vreinterpret_v_u8mf2_u32mf2(vuint8mf2_t src) { - return vreinterpret_v_u8mf2_u32mf2(src); + return __riscv_vreinterpret_v_u8mf2_u32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m1_u32m1( @@ -1067,7 +1067,7 @@ vuint32mf2_t test_vreinterpret_v_u8mf2_u32mf2(vuint8mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vreinterpret_v_u8m1_u32m1(vuint8m1_t src) { - return vreinterpret_v_u8m1_u32m1(src); + return __riscv_vreinterpret_v_u8m1_u32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m2_u32m2( @@ -1076,7 +1076,7 @@ vuint32m1_t test_vreinterpret_v_u8m1_u32m1(vuint8m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vreinterpret_v_u8m2_u32m2(vuint8m2_t src) { - return vreinterpret_v_u8m2_u32m2(src); + return __riscv_vreinterpret_v_u8m2_u32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m4_u32m4( @@ -1085,7 +1085,7 @@ vuint32m2_t test_vreinterpret_v_u8m2_u32m2(vuint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vreinterpret_v_u8m4_u32m4(vuint8m4_t src) { - return vreinterpret_v_u8m4_u32m4(src); + return __riscv_vreinterpret_v_u8m4_u32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m8_u32m8( @@ -1094,7 +1094,7 @@ vuint32m4_t test_vreinterpret_v_u8m4_u32m4(vuint8m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vreinterpret_v_u8m8_u32m8(vuint8m8_t src) { - return vreinterpret_v_u8m8_u32m8(src); + return __riscv_vreinterpret_v_u8m8_u32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m1_i64m1( @@ -1103,7 +1103,7 @@ vuint32m8_t test_vreinterpret_v_u8m8_u32m8(vuint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vreinterpret_v_i8m1_i64m1(vint8m1_t src) { - return vreinterpret_v_i8m1_i64m1(src); + return __riscv_vreinterpret_v_i8m1_i64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m2_i64m2( @@ -1112,7 +1112,7 @@ vint64m1_t test_vreinterpret_v_i8m1_i64m1(vint8m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vreinterpret_v_i8m2_i64m2(vint8m2_t src) { - return vreinterpret_v_i8m2_i64m2(src); + return __riscv_vreinterpret_v_i8m2_i64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m4_i64m4( @@ -1121,7 +1121,7 @@ vint64m2_t test_vreinterpret_v_i8m2_i64m2(vint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vreinterpret_v_i8m4_i64m4(vint8m4_t src) { - return vreinterpret_v_i8m4_i64m4(src); + return __riscv_vreinterpret_v_i8m4_i64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i8m8_i64m8( @@ -1130,7 +1130,7 @@ vint64m4_t test_vreinterpret_v_i8m4_i64m4(vint8m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vreinterpret_v_i8m8_i64m8(vint8m8_t src) { - return vreinterpret_v_i8m8_i64m8(src); + return __riscv_vreinterpret_v_i8m8_i64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m1_u64m1( @@ -1139,7 +1139,7 @@ vint64m8_t test_vreinterpret_v_i8m8_i64m8(vint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vreinterpret_v_u8m1_u64m1(vuint8m1_t src) { - return vreinterpret_v_u8m1_u64m1(src); + return __riscv_vreinterpret_v_u8m1_u64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m2_u64m2( @@ -1148,7 +1148,7 @@ vuint64m1_t test_vreinterpret_v_u8m1_u64m1(vuint8m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vreinterpret_v_u8m2_u64m2(vuint8m2_t src) { - return vreinterpret_v_u8m2_u64m2(src); + return __riscv_vreinterpret_v_u8m2_u64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m4_u64m4( @@ -1157,7 +1157,7 @@ vuint64m2_t test_vreinterpret_v_u8m2_u64m2(vuint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vreinterpret_v_u8m4_u64m4(vuint8m4_t src) { - return vreinterpret_v_u8m4_u64m4(src); + return __riscv_vreinterpret_v_u8m4_u64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u8m8_u64m8( @@ -1166,7 +1166,7 @@ vuint64m4_t test_vreinterpret_v_u8m4_u64m4(vuint8m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vreinterpret_v_u8m8_u64m8(vuint8m8_t src) { - return vreinterpret_v_u8m8_u64m8(src); + return __riscv_vreinterpret_v_u8m8_u64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16mf4_i8mf4( @@ -1175,7 +1175,7 @@ vuint64m8_t test_vreinterpret_v_u8m8_u64m8(vuint8m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vreinterpret_v_i16mf4_i8mf4(vint16mf4_t src) { - return vreinterpret_v_i16mf4_i8mf4(src); + return __riscv_vreinterpret_v_i16mf4_i8mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16mf2_i8mf2( @@ -1184,7 +1184,7 @@ vint8mf4_t test_vreinterpret_v_i16mf4_i8mf4(vint16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vreinterpret_v_i16mf2_i8mf2(vint16mf2_t src) { - return vreinterpret_v_i16mf2_i8mf2(src); + return __riscv_vreinterpret_v_i16mf2_i8mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m1_i8m1( @@ -1193,7 +1193,7 @@ vint8mf2_t test_vreinterpret_v_i16mf2_i8mf2(vint16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vreinterpret_v_i16m1_i8m1(vint16m1_t src) { - return vreinterpret_v_i16m1_i8m1(src); + return __riscv_vreinterpret_v_i16m1_i8m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m2_i8m2( @@ -1202,7 +1202,7 @@ vint8m1_t test_vreinterpret_v_i16m1_i8m1(vint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vreinterpret_v_i16m2_i8m2(vint16m2_t src) { - return vreinterpret_v_i16m2_i8m2(src); + return __riscv_vreinterpret_v_i16m2_i8m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m4_i8m4( @@ -1211,7 +1211,7 @@ vint8m2_t test_vreinterpret_v_i16m2_i8m2(vint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vreinterpret_v_i16m4_i8m4(vint16m4_t src) { - return vreinterpret_v_i16m4_i8m4(src); + return __riscv_vreinterpret_v_i16m4_i8m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m8_i8m8( @@ -1220,7 +1220,7 @@ vint8m4_t test_vreinterpret_v_i16m4_i8m4(vint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vreinterpret_v_i16m8_i8m8(vint16m8_t src) { - return vreinterpret_v_i16m8_i8m8(src); + return __riscv_vreinterpret_v_i16m8_i8m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16mf4_u8mf4( @@ -1229,7 +1229,7 @@ vint8m8_t test_vreinterpret_v_i16m8_i8m8(vint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vreinterpret_v_u16mf4_u8mf4(vuint16mf4_t src) { - return vreinterpret_v_u16mf4_u8mf4(src); + return __riscv_vreinterpret_v_u16mf4_u8mf4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16mf2_u8mf2( @@ -1238,7 +1238,7 @@ vuint8mf4_t test_vreinterpret_v_u16mf4_u8mf4(vuint16mf4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vreinterpret_v_u16mf2_u8mf2(vuint16mf2_t src) { - return vreinterpret_v_u16mf2_u8mf2(src); + return __riscv_vreinterpret_v_u16mf2_u8mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m1_u8m1( @@ -1247,7 +1247,7 @@ vuint8mf2_t test_vreinterpret_v_u16mf2_u8mf2(vuint16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vreinterpret_v_u16m1_u8m1(vuint16m1_t src) { - return vreinterpret_v_u16m1_u8m1(src); + return __riscv_vreinterpret_v_u16m1_u8m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m2_u8m2( @@ -1256,7 +1256,7 @@ vuint8m1_t test_vreinterpret_v_u16m1_u8m1(vuint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vreinterpret_v_u16m2_u8m2(vuint16m2_t src) { - return vreinterpret_v_u16m2_u8m2(src); + return __riscv_vreinterpret_v_u16m2_u8m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m4_u8m4( @@ -1265,7 +1265,7 @@ vuint8m2_t test_vreinterpret_v_u16m2_u8m2(vuint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vreinterpret_v_u16m4_u8m4(vuint16m4_t src) { - return vreinterpret_v_u16m4_u8m4(src); + return __riscv_vreinterpret_v_u16m4_u8m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m8_u8m8( @@ -1274,7 +1274,7 @@ vuint8m4_t test_vreinterpret_v_u16m4_u8m4(vuint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vreinterpret_v_u16m8_u8m8(vuint16m8_t src) { - return vreinterpret_v_u16m8_u8m8(src); + return __riscv_vreinterpret_v_u16m8_u8m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16mf2_i32mf2( @@ -1283,7 +1283,7 @@ vuint8m8_t test_vreinterpret_v_u16m8_u8m8(vuint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vreinterpret_v_i16mf2_i32mf2(vint16mf2_t src) { - return vreinterpret_v_i16mf2_i32mf2(src); + return __riscv_vreinterpret_v_i16mf2_i32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m1_i32m1( @@ -1292,7 +1292,7 @@ vint32mf2_t test_vreinterpret_v_i16mf2_i32mf2(vint16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vreinterpret_v_i16m1_i32m1(vint16m1_t src) { - return vreinterpret_v_i16m1_i32m1(src); + return __riscv_vreinterpret_v_i16m1_i32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m2_i32m2( @@ -1301,7 +1301,7 @@ vint32m1_t test_vreinterpret_v_i16m1_i32m1(vint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vreinterpret_v_i16m2_i32m2(vint16m2_t src) { - return vreinterpret_v_i16m2_i32m2(src); + return __riscv_vreinterpret_v_i16m2_i32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m4_i32m4( @@ -1310,7 +1310,7 @@ vint32m2_t test_vreinterpret_v_i16m2_i32m2(vint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vreinterpret_v_i16m4_i32m4(vint16m4_t src) { - return vreinterpret_v_i16m4_i32m4(src); + return __riscv_vreinterpret_v_i16m4_i32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m8_i32m8( @@ -1319,7 +1319,7 @@ vint32m4_t test_vreinterpret_v_i16m4_i32m4(vint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vreinterpret_v_i16m8_i32m8(vint16m8_t src) { - return vreinterpret_v_i16m8_i32m8(src); + return __riscv_vreinterpret_v_i16m8_i32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16mf2_u32mf2( @@ -1328,7 +1328,7 @@ vint32m8_t test_vreinterpret_v_i16m8_i32m8(vint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vreinterpret_v_u16mf2_u32mf2(vuint16mf2_t src) { - return vreinterpret_v_u16mf2_u32mf2(src); + return __riscv_vreinterpret_v_u16mf2_u32mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m1_u32m1( @@ -1337,7 +1337,7 @@ vuint32mf2_t test_vreinterpret_v_u16mf2_u32mf2(vuint16mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vreinterpret_v_u16m1_u32m1(vuint16m1_t src) { - return vreinterpret_v_u16m1_u32m1(src); + return __riscv_vreinterpret_v_u16m1_u32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m2_u32m2( @@ -1346,7 +1346,7 @@ vuint32m1_t test_vreinterpret_v_u16m1_u32m1(vuint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vreinterpret_v_u16m2_u32m2(vuint16m2_t src) { - return vreinterpret_v_u16m2_u32m2(src); + return __riscv_vreinterpret_v_u16m2_u32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m4_u32m4( @@ -1355,7 +1355,7 @@ vuint32m2_t test_vreinterpret_v_u16m2_u32m2(vuint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vreinterpret_v_u16m4_u32m4(vuint16m4_t src) { - return vreinterpret_v_u16m4_u32m4(src); + return __riscv_vreinterpret_v_u16m4_u32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m8_u32m8( @@ -1364,7 +1364,7 @@ vuint32m4_t test_vreinterpret_v_u16m4_u32m4(vuint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vreinterpret_v_u16m8_u32m8(vuint16m8_t src) { - return vreinterpret_v_u16m8_u32m8(src); + return __riscv_vreinterpret_v_u16m8_u32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m1_i64m1( @@ -1373,7 +1373,7 @@ vuint32m8_t test_vreinterpret_v_u16m8_u32m8(vuint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vreinterpret_v_i16m1_i64m1(vint16m1_t src) { - return vreinterpret_v_i16m1_i64m1(src); + return __riscv_vreinterpret_v_i16m1_i64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m2_i64m2( @@ -1382,7 +1382,7 @@ vint64m1_t test_vreinterpret_v_i16m1_i64m1(vint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vreinterpret_v_i16m2_i64m2(vint16m2_t src) { - return vreinterpret_v_i16m2_i64m2(src); + return __riscv_vreinterpret_v_i16m2_i64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m4_i64m4( @@ -1391,7 +1391,7 @@ vint64m2_t test_vreinterpret_v_i16m2_i64m2(vint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vreinterpret_v_i16m4_i64m4(vint16m4_t src) { - return vreinterpret_v_i16m4_i64m4(src); + return __riscv_vreinterpret_v_i16m4_i64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i16m8_i64m8( @@ -1400,7 +1400,7 @@ vint64m4_t test_vreinterpret_v_i16m4_i64m4(vint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vreinterpret_v_i16m8_i64m8(vint16m8_t src) { - return vreinterpret_v_i16m8_i64m8(src); + return __riscv_vreinterpret_v_i16m8_i64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m1_u64m1( @@ -1409,7 +1409,7 @@ vint64m8_t test_vreinterpret_v_i16m8_i64m8(vint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vreinterpret_v_u16m1_u64m1(vuint16m1_t src) { - return vreinterpret_v_u16m1_u64m1(src); + return __riscv_vreinterpret_v_u16m1_u64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m2_u64m2( @@ -1418,7 +1418,7 @@ vuint64m1_t test_vreinterpret_v_u16m1_u64m1(vuint16m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vreinterpret_v_u16m2_u64m2(vuint16m2_t src) { - return vreinterpret_v_u16m2_u64m2(src); + return __riscv_vreinterpret_v_u16m2_u64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m4_u64m4( @@ -1427,7 +1427,7 @@ vuint64m2_t test_vreinterpret_v_u16m2_u64m2(vuint16m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vreinterpret_v_u16m4_u64m4(vuint16m4_t src) { - return vreinterpret_v_u16m4_u64m4(src); + return __riscv_vreinterpret_v_u16m4_u64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u16m8_u64m8( @@ -1436,7 +1436,7 @@ vuint64m4_t test_vreinterpret_v_u16m4_u64m4(vuint16m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vreinterpret_v_u16m8_u64m8(vuint16m8_t src) { - return vreinterpret_v_u16m8_u64m8(src); + return __riscv_vreinterpret_v_u16m8_u64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32mf2_i8mf2( @@ -1445,7 +1445,7 @@ vuint64m8_t test_vreinterpret_v_u16m8_u64m8(vuint16m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vreinterpret_v_i32mf2_i8mf2(vint32mf2_t src) { - return vreinterpret_v_i32mf2_i8mf2(src); + return __riscv_vreinterpret_v_i32mf2_i8mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m1_i8m1( @@ -1454,7 +1454,7 @@ vint8mf2_t test_vreinterpret_v_i32mf2_i8mf2(vint32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vreinterpret_v_i32m1_i8m1(vint32m1_t src) { - return vreinterpret_v_i32m1_i8m1(src); + return __riscv_vreinterpret_v_i32m1_i8m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m2_i8m2( @@ -1463,7 +1463,7 @@ vint8m1_t test_vreinterpret_v_i32m1_i8m1(vint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vreinterpret_v_i32m2_i8m2(vint32m2_t src) { - return vreinterpret_v_i32m2_i8m2(src); + return __riscv_vreinterpret_v_i32m2_i8m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m4_i8m4( @@ -1472,7 +1472,7 @@ vint8m2_t test_vreinterpret_v_i32m2_i8m2(vint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vreinterpret_v_i32m4_i8m4(vint32m4_t src) { - return vreinterpret_v_i32m4_i8m4(src); + return __riscv_vreinterpret_v_i32m4_i8m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m8_i8m8( @@ -1481,7 +1481,7 @@ vint8m4_t test_vreinterpret_v_i32m4_i8m4(vint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vreinterpret_v_i32m8_i8m8(vint32m8_t src) { - return vreinterpret_v_i32m8_i8m8(src); + return __riscv_vreinterpret_v_i32m8_i8m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32mf2_u8mf2( @@ -1490,7 +1490,7 @@ vint8m8_t test_vreinterpret_v_i32m8_i8m8(vint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vreinterpret_v_u32mf2_u8mf2(vuint32mf2_t src) { - return vreinterpret_v_u32mf2_u8mf2(src); + return __riscv_vreinterpret_v_u32mf2_u8mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m1_u8m1( @@ -1499,7 +1499,7 @@ vuint8mf2_t test_vreinterpret_v_u32mf2_u8mf2(vuint32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vreinterpret_v_u32m1_u8m1(vuint32m1_t src) { - return vreinterpret_v_u32m1_u8m1(src); + return __riscv_vreinterpret_v_u32m1_u8m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m2_u8m2( @@ -1508,7 +1508,7 @@ vuint8m1_t test_vreinterpret_v_u32m1_u8m1(vuint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vreinterpret_v_u32m2_u8m2(vuint32m2_t src) { - return vreinterpret_v_u32m2_u8m2(src); + return __riscv_vreinterpret_v_u32m2_u8m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m4_u8m4( @@ -1517,7 +1517,7 @@ vuint8m2_t test_vreinterpret_v_u32m2_u8m2(vuint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vreinterpret_v_u32m4_u8m4(vuint32m4_t src) { - return vreinterpret_v_u32m4_u8m4(src); + return __riscv_vreinterpret_v_u32m4_u8m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m8_u8m8( @@ -1526,7 +1526,7 @@ vuint8m4_t test_vreinterpret_v_u32m4_u8m4(vuint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vreinterpret_v_u32m8_u8m8(vuint32m8_t src) { - return vreinterpret_v_u32m8_u8m8(src); + return __riscv_vreinterpret_v_u32m8_u8m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32mf2_i16mf2( @@ -1535,7 +1535,7 @@ vuint8m8_t test_vreinterpret_v_u32m8_u8m8(vuint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vreinterpret_v_i32mf2_i16mf2(vint32mf2_t src) { - return vreinterpret_v_i32mf2_i16mf2(src); + return __riscv_vreinterpret_v_i32mf2_i16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m1_i16m1( @@ -1544,7 +1544,7 @@ vint16mf2_t test_vreinterpret_v_i32mf2_i16mf2(vint32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vreinterpret_v_i32m1_i16m1(vint32m1_t src) { - return vreinterpret_v_i32m1_i16m1(src); + return __riscv_vreinterpret_v_i32m1_i16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m2_i16m2( @@ -1553,7 +1553,7 @@ vint16m1_t test_vreinterpret_v_i32m1_i16m1(vint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vreinterpret_v_i32m2_i16m2(vint32m2_t src) { - return vreinterpret_v_i32m2_i16m2(src); + return __riscv_vreinterpret_v_i32m2_i16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m4_i16m4( @@ -1562,7 +1562,7 @@ vint16m2_t test_vreinterpret_v_i32m2_i16m2(vint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vreinterpret_v_i32m4_i16m4(vint32m4_t src) { - return vreinterpret_v_i32m4_i16m4(src); + return __riscv_vreinterpret_v_i32m4_i16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m8_i16m8( @@ -1571,7 +1571,7 @@ vint16m4_t test_vreinterpret_v_i32m4_i16m4(vint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vreinterpret_v_i32m8_i16m8(vint32m8_t src) { - return vreinterpret_v_i32m8_i16m8(src); + return __riscv_vreinterpret_v_i32m8_i16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32mf2_u16mf2( @@ -1580,7 +1580,7 @@ vint16m8_t test_vreinterpret_v_i32m8_i16m8(vint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vreinterpret_v_u32mf2_u16mf2(vuint32mf2_t src) { - return vreinterpret_v_u32mf2_u16mf2(src); + return __riscv_vreinterpret_v_u32mf2_u16mf2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m1_u16m1( @@ -1589,7 +1589,7 @@ vuint16mf2_t test_vreinterpret_v_u32mf2_u16mf2(vuint32mf2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vreinterpret_v_u32m1_u16m1(vuint32m1_t src) { - return vreinterpret_v_u32m1_u16m1(src); + return __riscv_vreinterpret_v_u32m1_u16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m2_u16m2( @@ -1598,7 +1598,7 @@ vuint16m1_t test_vreinterpret_v_u32m1_u16m1(vuint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vreinterpret_v_u32m2_u16m2(vuint32m2_t src) { - return vreinterpret_v_u32m2_u16m2(src); + return __riscv_vreinterpret_v_u32m2_u16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m4_u16m4( @@ -1607,7 +1607,7 @@ vuint16m2_t test_vreinterpret_v_u32m2_u16m2(vuint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vreinterpret_v_u32m4_u16m4(vuint32m4_t src) { - return vreinterpret_v_u32m4_u16m4(src); + return __riscv_vreinterpret_v_u32m4_u16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m8_u16m8( @@ -1616,7 +1616,7 @@ vuint16m4_t test_vreinterpret_v_u32m4_u16m4(vuint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vreinterpret_v_u32m8_u16m8(vuint32m8_t src) { - return vreinterpret_v_u32m8_u16m8(src); + return __riscv_vreinterpret_v_u32m8_u16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m1_i64m1( @@ -1625,7 +1625,7 @@ vuint16m8_t test_vreinterpret_v_u32m8_u16m8(vuint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vreinterpret_v_i32m1_i64m1(vint32m1_t src) { - return vreinterpret_v_i32m1_i64m1(src); + return __riscv_vreinterpret_v_i32m1_i64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m2_i64m2( @@ -1634,7 +1634,7 @@ vint64m1_t test_vreinterpret_v_i32m1_i64m1(vint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vreinterpret_v_i32m2_i64m2(vint32m2_t src) { - return vreinterpret_v_i32m2_i64m2(src); + return __riscv_vreinterpret_v_i32m2_i64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m4_i64m4( @@ -1643,7 +1643,7 @@ vint64m2_t test_vreinterpret_v_i32m2_i64m2(vint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vreinterpret_v_i32m4_i64m4(vint32m4_t src) { - return vreinterpret_v_i32m4_i64m4(src); + return __riscv_vreinterpret_v_i32m4_i64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i32m8_i64m8( @@ -1652,7 +1652,7 @@ vint64m4_t test_vreinterpret_v_i32m4_i64m4(vint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vreinterpret_v_i32m8_i64m8(vint32m8_t src) { - return vreinterpret_v_i32m8_i64m8(src); + return __riscv_vreinterpret_v_i32m8_i64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m1_u64m1( @@ -1661,7 +1661,7 @@ vint64m8_t test_vreinterpret_v_i32m8_i64m8(vint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vreinterpret_v_u32m1_u64m1(vuint32m1_t src) { - return vreinterpret_v_u32m1_u64m1(src); + return __riscv_vreinterpret_v_u32m1_u64m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m2_u64m2( @@ -1670,7 +1670,7 @@ vuint64m1_t test_vreinterpret_v_u32m1_u64m1(vuint32m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vreinterpret_v_u32m2_u64m2(vuint32m2_t src) { - return vreinterpret_v_u32m2_u64m2(src); + return __riscv_vreinterpret_v_u32m2_u64m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m4_u64m4( @@ -1679,7 +1679,7 @@ vuint64m2_t test_vreinterpret_v_u32m2_u64m2(vuint32m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vreinterpret_v_u32m4_u64m4(vuint32m4_t src) { - return vreinterpret_v_u32m4_u64m4(src); + return __riscv_vreinterpret_v_u32m4_u64m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u32m8_u64m8( @@ -1688,7 +1688,7 @@ vuint64m4_t test_vreinterpret_v_u32m4_u64m4(vuint32m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vreinterpret_v_u32m8_u64m8(vuint32m8_t src) { - return vreinterpret_v_u32m8_u64m8(src); + return __riscv_vreinterpret_v_u32m8_u64m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m1_i8m1( @@ -1697,7 +1697,7 @@ vuint64m8_t test_vreinterpret_v_u32m8_u64m8(vuint32m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vreinterpret_v_i64m1_i8m1(vint64m1_t src) { - return vreinterpret_v_i64m1_i8m1(src); + return __riscv_vreinterpret_v_i64m1_i8m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m2_i8m2( @@ -1706,7 +1706,7 @@ vint8m1_t test_vreinterpret_v_i64m1_i8m1(vint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vreinterpret_v_i64m2_i8m2(vint64m2_t src) { - return vreinterpret_v_i64m2_i8m2(src); + return __riscv_vreinterpret_v_i64m2_i8m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m4_i8m4( @@ -1715,7 +1715,7 @@ vint8m2_t test_vreinterpret_v_i64m2_i8m2(vint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vreinterpret_v_i64m4_i8m4(vint64m4_t src) { - return vreinterpret_v_i64m4_i8m4(src); + return __riscv_vreinterpret_v_i64m4_i8m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m8_i8m8( @@ -1724,7 +1724,7 @@ vint8m4_t test_vreinterpret_v_i64m4_i8m4(vint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vreinterpret_v_i64m8_i8m8(vint64m8_t src) { - return vreinterpret_v_i64m8_i8m8(src); + return __riscv_vreinterpret_v_i64m8_i8m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m1_u8m1( @@ -1733,7 +1733,7 @@ vint8m8_t test_vreinterpret_v_i64m8_i8m8(vint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vreinterpret_v_u64m1_u8m1(vuint64m1_t src) { - return vreinterpret_v_u64m1_u8m1(src); + return __riscv_vreinterpret_v_u64m1_u8m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m2_u8m2( @@ -1742,7 +1742,7 @@ vuint8m1_t test_vreinterpret_v_u64m1_u8m1(vuint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vreinterpret_v_u64m2_u8m2(vuint64m2_t src) { - return vreinterpret_v_u64m2_u8m2(src); + return __riscv_vreinterpret_v_u64m2_u8m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m4_u8m4( @@ -1751,7 +1751,7 @@ vuint8m2_t test_vreinterpret_v_u64m2_u8m2(vuint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vreinterpret_v_u64m4_u8m4(vuint64m4_t src) { - return vreinterpret_v_u64m4_u8m4(src); + return __riscv_vreinterpret_v_u64m4_u8m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m8_u8m8( @@ -1760,7 +1760,7 @@ vuint8m4_t test_vreinterpret_v_u64m4_u8m4(vuint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vreinterpret_v_u64m8_u8m8(vuint64m8_t src) { - return vreinterpret_v_u64m8_u8m8(src); + return __riscv_vreinterpret_v_u64m8_u8m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m1_i16m1( @@ -1769,7 +1769,7 @@ vuint8m8_t test_vreinterpret_v_u64m8_u8m8(vuint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vreinterpret_v_i64m1_i16m1(vint64m1_t src) { - return vreinterpret_v_i64m1_i16m1(src); + return __riscv_vreinterpret_v_i64m1_i16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m2_i16m2( @@ -1778,7 +1778,7 @@ vint16m1_t test_vreinterpret_v_i64m1_i16m1(vint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vreinterpret_v_i64m2_i16m2(vint64m2_t src) { - return vreinterpret_v_i64m2_i16m2(src); + return __riscv_vreinterpret_v_i64m2_i16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m4_i16m4( @@ -1787,7 +1787,7 @@ vint16m2_t test_vreinterpret_v_i64m2_i16m2(vint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vreinterpret_v_i64m4_i16m4(vint64m4_t src) { - return vreinterpret_v_i64m4_i16m4(src); + return __riscv_vreinterpret_v_i64m4_i16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m8_i16m8( @@ -1796,7 +1796,7 @@ vint16m4_t test_vreinterpret_v_i64m4_i16m4(vint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vreinterpret_v_i64m8_i16m8(vint64m8_t src) { - return vreinterpret_v_i64m8_i16m8(src); + return __riscv_vreinterpret_v_i64m8_i16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m1_u16m1( @@ -1805,7 +1805,7 @@ vint16m8_t test_vreinterpret_v_i64m8_i16m8(vint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vreinterpret_v_u64m1_u16m1(vuint64m1_t src) { - return vreinterpret_v_u64m1_u16m1(src); + return __riscv_vreinterpret_v_u64m1_u16m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m2_u16m2( @@ -1814,7 +1814,7 @@ vuint16m1_t test_vreinterpret_v_u64m1_u16m1(vuint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vreinterpret_v_u64m2_u16m2(vuint64m2_t src) { - return vreinterpret_v_u64m2_u16m2(src); + return __riscv_vreinterpret_v_u64m2_u16m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m4_u16m4( @@ -1823,7 +1823,7 @@ vuint16m2_t test_vreinterpret_v_u64m2_u16m2(vuint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vreinterpret_v_u64m4_u16m4(vuint64m4_t src) { - return vreinterpret_v_u64m4_u16m4(src); + return __riscv_vreinterpret_v_u64m4_u16m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m8_u16m8( @@ -1832,7 +1832,7 @@ vuint16m4_t test_vreinterpret_v_u64m4_u16m4(vuint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vreinterpret_v_u64m8_u16m8(vuint64m8_t src) { - return vreinterpret_v_u64m8_u16m8(src); + return __riscv_vreinterpret_v_u64m8_u16m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m1_i32m1( @@ -1841,7 +1841,7 @@ vuint16m8_t test_vreinterpret_v_u64m8_u16m8(vuint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vreinterpret_v_i64m1_i32m1(vint64m1_t src) { - return vreinterpret_v_i64m1_i32m1(src); + return __riscv_vreinterpret_v_i64m1_i32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m2_i32m2( @@ -1850,7 +1850,7 @@ vint32m1_t test_vreinterpret_v_i64m1_i32m1(vint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vreinterpret_v_i64m2_i32m2(vint64m2_t src) { - return vreinterpret_v_i64m2_i32m2(src); + return __riscv_vreinterpret_v_i64m2_i32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m4_i32m4( @@ -1859,7 +1859,7 @@ vint32m2_t test_vreinterpret_v_i64m2_i32m2(vint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vreinterpret_v_i64m4_i32m4(vint64m4_t src) { - return vreinterpret_v_i64m4_i32m4(src); + return __riscv_vreinterpret_v_i64m4_i32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_i64m8_i32m8( @@ -1868,7 +1868,7 @@ vint32m4_t test_vreinterpret_v_i64m4_i32m4(vint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vreinterpret_v_i64m8_i32m8(vint64m8_t src) { - return vreinterpret_v_i64m8_i32m8(src); + return __riscv_vreinterpret_v_i64m8_i32m8(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m1_u32m1( @@ -1877,7 +1877,7 @@ vint32m8_t test_vreinterpret_v_i64m8_i32m8(vint64m8_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vreinterpret_v_u64m1_u32m1(vuint64m1_t src) { - return vreinterpret_v_u64m1_u32m1(src); + return __riscv_vreinterpret_v_u64m1_u32m1(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m2_u32m2( @@ -1886,7 +1886,7 @@ vuint32m1_t test_vreinterpret_v_u64m1_u32m1(vuint64m1_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vreinterpret_v_u64m2_u32m2(vuint64m2_t src) { - return vreinterpret_v_u64m2_u32m2(src); + return __riscv_vreinterpret_v_u64m2_u32m2(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m4_u32m4( @@ -1895,7 +1895,7 @@ vuint32m2_t test_vreinterpret_v_u64m2_u32m2(vuint64m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vreinterpret_v_u64m4_u32m4(vuint64m4_t src) { - return vreinterpret_v_u64m4_u32m4(src); + return __riscv_vreinterpret_v_u64m4_u32m4(src); } // CHECK-RV64-LABEL: @test_vreinterpret_v_u64m8_u32m8( @@ -1904,6 +1904,6 @@ vuint32m4_t test_vreinterpret_v_u64m4_u32m4(vuint64m4_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vreinterpret_v_u64m8_u32m8(vuint64m8_t src) { - return vreinterpret_v_u64m8_u32m8(src); + return __riscv_vreinterpret_v_u64m8_u32m8(src); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrem.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrem.c index 0be216c542f1fb62493d47544b37a0f79c201056..6456979897d3d9790575aa820e31303619271bc6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrem.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrem.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vrem_vv_i8mf8(op1, op2, vl); + return __riscv_vrem_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vrem_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf8(op1, op2, vl); + return __riscv_vrem_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vrem_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vrem_vv_i8mf4(op1, op2, vl); + return __riscv_vrem_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vrem_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf4(op1, op2, vl); + return __riscv_vrem_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vrem_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vrem_vv_i8mf2(op1, op2, vl); + return __riscv_vrem_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vrem_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf2(op1, op2, vl); + return __riscv_vrem_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vrem_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vrem_vv_i8m1(op1, op2, vl); + return __riscv_vrem_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vrem_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m1(op1, op2, vl); + return __riscv_vrem_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vrem_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vrem_vv_i8m2(op1, op2, vl); + return __riscv_vrem_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vrem_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m2(op1, op2, vl); + return __riscv_vrem_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vrem_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vrem_vv_i8m4(op1, op2, vl); + return __riscv_vrem_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vrem_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m4(op1, op2, vl); + return __riscv_vrem_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vrem_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vrem_vv_i8m8(op1, op2, vl); + return __riscv_vrem_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vrem_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m8(op1, op2, vl); + return __riscv_vrem_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vrem_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vrem_vv_i16mf4(op1, op2, vl); + return __riscv_vrem_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vrem_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf4(op1, op2, vl); + return __riscv_vrem_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vrem_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vrem_vv_i16mf2(op1, op2, vl); + return __riscv_vrem_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vrem_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf2(op1, op2, vl); + return __riscv_vrem_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vrem_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vrem_vv_i16m1(op1, op2, vl); + return __riscv_vrem_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vrem_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m1(op1, op2, vl); + return __riscv_vrem_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vrem_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vrem_vv_i16m2(op1, op2, vl); + return __riscv_vrem_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vrem_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m2(op1, op2, vl); + return __riscv_vrem_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vrem_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vrem_vv_i16m4(op1, op2, vl); + return __riscv_vrem_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vrem_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m4(op1, op2, vl); + return __riscv_vrem_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vrem_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vrem_vv_i16m8(op1, op2, vl); + return __riscv_vrem_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vrem_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m8(op1, op2, vl); + return __riscv_vrem_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vrem_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vrem_vv_i32mf2(op1, op2, vl); + return __riscv_vrem_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vrem_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32mf2(op1, op2, vl); + return __riscv_vrem_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vrem_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vrem_vv_i32m1(op1, op2, vl); + return __riscv_vrem_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vrem_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m1(op1, op2, vl); + return __riscv_vrem_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vrem_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vrem_vv_i32m2(op1, op2, vl); + return __riscv_vrem_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vrem_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m2(op1, op2, vl); + return __riscv_vrem_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vrem_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vrem_vv_i32m4(op1, op2, vl); + return __riscv_vrem_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vrem_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m4(op1, op2, vl); + return __riscv_vrem_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vrem_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vrem_vv_i32m8(op1, op2, vl); + return __riscv_vrem_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vrem_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m8(op1, op2, vl); + return __riscv_vrem_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vrem_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vrem_vv_i64m1(op1, op2, vl); + return __riscv_vrem_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vrem_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m1(op1, op2, vl); + return __riscv_vrem_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vrem_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vrem_vv_i64m2(op1, op2, vl); + return __riscv_vrem_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vrem_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m2(op1, op2, vl); + return __riscv_vrem_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vrem_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vrem_vv_i64m4(op1, op2, vl); + return __riscv_vrem_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vrem_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m4(op1, op2, vl); + return __riscv_vrem_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vrem_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vrem_vv_i64m8(op1, op2, vl); + return __riscv_vrem_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vrem_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m8(op1, op2, vl); + return __riscv_vrem_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vrem_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vrem_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vrem_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vrem_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vrem_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vrem_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vrem_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vrem_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vrem_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vrem_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vrem_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vrem_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vrem_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vrem_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vrem_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vrem_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vrem_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vrem_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vrem_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vrem_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vrem_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vrem_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vrem_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vrem_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vrem_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vrem_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vrem_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vrem_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vrem_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vrem_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vrem_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vrem_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vrem_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vrem_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vrem_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vrem_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vrem_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vrem_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vrem_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vrem_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vrem_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vrem_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vrem_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vrem_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vrem_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vrem_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vrem_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vrem_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vrem_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vrem_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vrem_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vrem_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vrem_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vrem_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vrem_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vrem_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vrem_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vrem_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vrem_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vrem_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vrem_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vrem_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vrem_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vrem_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vrem_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vrem_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vrem_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vrem_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vremu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vremu.c index 2058af63bc5c41c35d57cf35e14a6102c64f42ab..b90ecc7826a677f4cb3bb275bd00e7904ce13daf 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vremu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vremu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vremu_vv_u8mf8(op1, op2, vl); + return __riscv_vremu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vremu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf8(op1, op2, vl); + return __riscv_vremu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vremu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vremu_vv_u8mf4(op1, op2, vl); + return __riscv_vremu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vremu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf4(op1, op2, vl); + return __riscv_vremu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vremu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vremu_vv_u8mf2(op1, op2, vl); + return __riscv_vremu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vremu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf2(op1, op2, vl); + return __riscv_vremu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vremu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vremu_vv_u8m1(op1, op2, vl); + return __riscv_vremu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vremu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m1(op1, op2, vl); + return __riscv_vremu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vremu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vremu_vv_u8m2(op1, op2, vl); + return __riscv_vremu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vremu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m2(op1, op2, vl); + return __riscv_vremu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vremu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vremu_vv_u8m4(op1, op2, vl); + return __riscv_vremu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vremu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m4(op1, op2, vl); + return __riscv_vremu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vremu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vremu_vv_u8m8(op1, op2, vl); + return __riscv_vremu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vremu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m8(op1, op2, vl); + return __riscv_vremu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vremu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vremu_vv_u16mf4(op1, op2, vl); + return __riscv_vremu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vremu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf4(op1, op2, vl); + return __riscv_vremu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vremu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vremu_vv_u16mf2(op1, op2, vl); + return __riscv_vremu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vremu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf2(op1, op2, vl); + return __riscv_vremu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vremu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vremu_vv_u16m1(op1, op2, vl); + return __riscv_vremu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vremu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m1(op1, op2, vl); + return __riscv_vremu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vremu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vremu_vv_u16m2(op1, op2, vl); + return __riscv_vremu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vremu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m2(op1, op2, vl); + return __riscv_vremu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vremu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vremu_vv_u16m4(op1, op2, vl); + return __riscv_vremu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vremu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m4(op1, op2, vl); + return __riscv_vremu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vremu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vremu_vv_u16m8(op1, op2, vl); + return __riscv_vremu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vremu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m8(op1, op2, vl); + return __riscv_vremu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vremu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vremu_vv_u32mf2(op1, op2, vl); + return __riscv_vremu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vremu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32mf2(op1, op2, vl); + return __riscv_vremu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vremu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vremu_vv_u32m1(op1, op2, vl); + return __riscv_vremu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vremu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m1(op1, op2, vl); + return __riscv_vremu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vremu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vremu_vv_u32m2(op1, op2, vl); + return __riscv_vremu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vremu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m2(op1, op2, vl); + return __riscv_vremu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vremu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vremu_vv_u32m4(op1, op2, vl); + return __riscv_vremu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vremu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m4(op1, op2, vl); + return __riscv_vremu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vremu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vremu_vv_u32m8(op1, op2, vl); + return __riscv_vremu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vremu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m8(op1, op2, vl); + return __riscv_vremu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vremu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vremu_vv_u64m1(op1, op2, vl); + return __riscv_vremu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vremu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m1(op1, op2, vl); + return __riscv_vremu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vremu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vremu_vv_u64m2(op1, op2, vl); + return __riscv_vremu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vremu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m2(op1, op2, vl); + return __riscv_vremu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vremu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vremu_vv_u64m4(op1, op2, vl); + return __riscv_vremu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vremu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m4(op1, op2, vl); + return __riscv_vremu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vremu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vremu_vv_u64m8(op1, op2, vl); + return __riscv_vremu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vremu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m8(op1, op2, vl); + return __riscv_vremu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vremu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vremu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vremu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vremu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vremu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vremu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vremu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vremu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vremu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vremu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vremu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vremu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vremu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vremu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vremu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vremu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vremu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vremu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vremu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vremu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vremu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vremu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vremu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vremu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vremu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vremu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vremu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vremu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vremu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vremu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vremu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vremu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vremu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vremu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vremu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vremu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vremu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vremu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vremu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vremu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vremu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vremu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vremu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vremu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vremu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vremu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vremu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vremu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vremu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vremu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vremu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vremu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vremu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vremu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vremu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vremu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vremu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vremu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vremu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vremu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vremu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vremu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vremu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vremu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vremu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vremu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vremu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vremu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgather.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgather.c index bedd2b8cd2c3d272a67a4fefc9b6b09ee4780a98..031cd1bc40891b6c2b433d94532df33466ea5938 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgather.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgather.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vv_f16mf4(vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_f16mf4(op1, index, vl); + return __riscv_vrgather_vv_f16mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf4( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vrgather_vv_f16mf4(vfloat16mf4_t op1, vuint16mf4_t index, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vx_f16mf4(vfloat16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf4(op1, index, vl); + return __riscv_vrgather_vx_f16mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf2( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vrgather_vx_f16mf4(vfloat16mf4_t op1, size_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vv_f16mf2(vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_f16mf2(op1, index, vl); + return __riscv_vrgather_vv_f16mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf2( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vrgather_vv_f16mf2(vfloat16mf2_t op1, vuint16mf2_t index, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vx_f16mf2(vfloat16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf2(op1, index, vl); + return __riscv_vrgather_vx_f16mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m1( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vrgather_vx_f16mf2(vfloat16mf2_t op1, size_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vv_f16m1(vfloat16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_f16m1(op1, index, vl); + return __riscv_vrgather_vv_f16m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m1( @@ -58,7 +58,7 @@ vfloat16m1_t test_vrgather_vv_f16m1(vfloat16m1_t op1, vuint16m1_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vx_f16m1(vfloat16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m1(op1, index, vl); + return __riscv_vrgather_vx_f16m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m2( @@ -67,7 +67,7 @@ vfloat16m1_t test_vrgather_vx_f16m1(vfloat16m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vv_f16m2(vfloat16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_f16m2(op1, index, vl); + return __riscv_vrgather_vv_f16m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m2( @@ -76,7 +76,7 @@ vfloat16m2_t test_vrgather_vv_f16m2(vfloat16m2_t op1, vuint16m2_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vx_f16m2(vfloat16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m2(op1, index, vl); + return __riscv_vrgather_vx_f16m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m4( @@ -85,7 +85,7 @@ vfloat16m2_t test_vrgather_vx_f16m2(vfloat16m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vv_f16m4(vfloat16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_f16m4(op1, index, vl); + return __riscv_vrgather_vv_f16m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m4( @@ -94,7 +94,7 @@ vfloat16m4_t test_vrgather_vv_f16m4(vfloat16m4_t op1, vuint16m4_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vx_f16m4(vfloat16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m4(op1, index, vl); + return __riscv_vrgather_vx_f16m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m8( @@ -103,7 +103,7 @@ vfloat16m4_t test_vrgather_vx_f16m4(vfloat16m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vv_f16m8(vfloat16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_f16m8(op1, index, vl); + return __riscv_vrgather_vv_f16m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m8( @@ -112,7 +112,7 @@ vfloat16m8_t test_vrgather_vv_f16m8(vfloat16m8_t op1, vuint16m8_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vx_f16m8(vfloat16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m8(op1, index, vl); + return __riscv_vrgather_vx_f16m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32mf2( @@ -121,7 +121,7 @@ vfloat16m8_t test_vrgather_vx_f16m8(vfloat16m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vv_f32mf2(vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_f32mf2(op1, index, vl); + return __riscv_vrgather_vv_f32mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32mf2( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vrgather_vv_f32mf2(vfloat32mf2_t op1, vuint32mf2_t index, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vx_f32mf2(vfloat32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32mf2(op1, index, vl); + return __riscv_vrgather_vx_f32mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m1( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vrgather_vx_f32mf2(vfloat32mf2_t op1, size_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vv_f32m1(vfloat32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_f32m1(op1, index, vl); + return __riscv_vrgather_vv_f32m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m1( @@ -148,7 +148,7 @@ vfloat32m1_t test_vrgather_vv_f32m1(vfloat32m1_t op1, vuint32m1_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vx_f32m1(vfloat32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m1(op1, index, vl); + return __riscv_vrgather_vx_f32m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m2( @@ -157,7 +157,7 @@ vfloat32m1_t test_vrgather_vx_f32m1(vfloat32m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vv_f32m2(vfloat32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_f32m2(op1, index, vl); + return __riscv_vrgather_vv_f32m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m2( @@ -166,7 +166,7 @@ vfloat32m2_t test_vrgather_vv_f32m2(vfloat32m2_t op1, vuint32m2_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vx_f32m2(vfloat32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m2(op1, index, vl); + return __riscv_vrgather_vx_f32m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m4( @@ -175,7 +175,7 @@ vfloat32m2_t test_vrgather_vx_f32m2(vfloat32m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vv_f32m4(vfloat32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_f32m4(op1, index, vl); + return __riscv_vrgather_vv_f32m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m4( @@ -184,7 +184,7 @@ vfloat32m4_t test_vrgather_vv_f32m4(vfloat32m4_t op1, vuint32m4_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vx_f32m4(vfloat32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m4(op1, index, vl); + return __riscv_vrgather_vx_f32m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m8( @@ -193,7 +193,7 @@ vfloat32m4_t test_vrgather_vx_f32m4(vfloat32m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vv_f32m8(vfloat32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_f32m8(op1, index, vl); + return __riscv_vrgather_vv_f32m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m8( @@ -202,7 +202,7 @@ vfloat32m8_t test_vrgather_vv_f32m8(vfloat32m8_t op1, vuint32m8_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vx_f32m8(vfloat32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m8(op1, index, vl); + return __riscv_vrgather_vx_f32m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m1( @@ -211,7 +211,7 @@ vfloat32m8_t test_vrgather_vx_f32m8(vfloat32m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vv_f64m1(vfloat64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_f64m1(op1, index, vl); + return __riscv_vrgather_vv_f64m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m1( @@ -220,7 +220,7 @@ vfloat64m1_t test_vrgather_vv_f64m1(vfloat64m1_t op1, vuint64m1_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vx_f64m1(vfloat64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m1(op1, index, vl); + return __riscv_vrgather_vx_f64m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m2( @@ -229,7 +229,7 @@ vfloat64m1_t test_vrgather_vx_f64m1(vfloat64m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vv_f64m2(vfloat64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_f64m2(op1, index, vl); + return __riscv_vrgather_vv_f64m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m2( @@ -238,7 +238,7 @@ vfloat64m2_t test_vrgather_vv_f64m2(vfloat64m2_t op1, vuint64m2_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vx_f64m2(vfloat64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m2(op1, index, vl); + return __riscv_vrgather_vx_f64m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m4( @@ -247,7 +247,7 @@ vfloat64m2_t test_vrgather_vx_f64m2(vfloat64m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vv_f64m4(vfloat64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_f64m4(op1, index, vl); + return __riscv_vrgather_vv_f64m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m4( @@ -256,7 +256,7 @@ vfloat64m4_t test_vrgather_vv_f64m4(vfloat64m4_t op1, vuint64m4_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vx_f64m4(vfloat64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m4(op1, index, vl); + return __riscv_vrgather_vx_f64m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m8( @@ -265,7 +265,7 @@ vfloat64m4_t test_vrgather_vx_f64m4(vfloat64m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vv_f64m8(vfloat64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_f64m8(op1, index, vl); + return __riscv_vrgather_vv_f64m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m8( @@ -274,7 +274,7 @@ vfloat64m8_t test_vrgather_vv_f64m8(vfloat64m8_t op1, vuint64m8_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vx_f64m8(vfloat64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m8(op1, index, vl); + return __riscv_vrgather_vx_f64m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf8( @@ -283,7 +283,7 @@ vfloat64m8_t test_vrgather_vx_f64m8(vfloat64m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_i8mf8(op1, index, vl); + return __riscv_vrgather_vv_i8mf8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf8( @@ -292,7 +292,7 @@ vint8mf8_t test_vrgather_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vx_i8mf8(vint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf8(op1, index, vl); + return __riscv_vrgather_vx_i8mf8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf4( @@ -301,7 +301,7 @@ vint8mf8_t test_vrgather_vx_i8mf8(vint8mf8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_i8mf4(op1, index, vl); + return __riscv_vrgather_vv_i8mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf4( @@ -310,7 +310,7 @@ vint8mf4_t test_vrgather_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vx_i8mf4(vint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf4(op1, index, vl); + return __riscv_vrgather_vx_i8mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf2( @@ -319,7 +319,7 @@ vint8mf4_t test_vrgather_vx_i8mf4(vint8mf4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_i8mf2(op1, index, vl); + return __riscv_vrgather_vv_i8mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf2( @@ -328,7 +328,7 @@ vint8mf2_t test_vrgather_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vx_i8mf2(vint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf2(op1, index, vl); + return __riscv_vrgather_vx_i8mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m1( @@ -337,7 +337,7 @@ vint8mf2_t test_vrgather_vx_i8mf2(vint8mf2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vv_i8m1(vint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_i8m1(op1, index, vl); + return __riscv_vrgather_vv_i8m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m1( @@ -346,7 +346,7 @@ vint8m1_t test_vrgather_vv_i8m1(vint8m1_t op1, vuint8m1_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vx_i8m1(vint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m1(op1, index, vl); + return __riscv_vrgather_vx_i8m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m2( @@ -355,7 +355,7 @@ vint8m1_t test_vrgather_vx_i8m1(vint8m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vv_i8m2(vint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_i8m2(op1, index, vl); + return __riscv_vrgather_vv_i8m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m2( @@ -364,7 +364,7 @@ vint8m2_t test_vrgather_vv_i8m2(vint8m2_t op1, vuint8m2_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vx_i8m2(vint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m2(op1, index, vl); + return __riscv_vrgather_vx_i8m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m4( @@ -373,7 +373,7 @@ vint8m2_t test_vrgather_vx_i8m2(vint8m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vv_i8m4(vint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_i8m4(op1, index, vl); + return __riscv_vrgather_vv_i8m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m4( @@ -382,7 +382,7 @@ vint8m4_t test_vrgather_vv_i8m4(vint8m4_t op1, vuint8m4_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vx_i8m4(vint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m4(op1, index, vl); + return __riscv_vrgather_vx_i8m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m8( @@ -391,7 +391,7 @@ vint8m4_t test_vrgather_vx_i8m4(vint8m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vv_i8m8(vint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_i8m8(op1, index, vl); + return __riscv_vrgather_vv_i8m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m8( @@ -400,7 +400,7 @@ vint8m8_t test_vrgather_vv_i8m8(vint8m8_t op1, vuint8m8_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vx_i8m8(vint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m8(op1, index, vl); + return __riscv_vrgather_vx_i8m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf4( @@ -409,7 +409,7 @@ vint8m8_t test_vrgather_vx_i8m8(vint8m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_i16mf4(op1, index, vl); + return __riscv_vrgather_vv_i16mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf4( @@ -418,7 +418,7 @@ vint16mf4_t test_vrgather_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vx_i16mf4(vint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf4(op1, index, vl); + return __riscv_vrgather_vx_i16mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf2( @@ -427,7 +427,7 @@ vint16mf4_t test_vrgather_vx_i16mf4(vint16mf4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_i16mf2(op1, index, vl); + return __riscv_vrgather_vv_i16mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf2( @@ -436,7 +436,7 @@ vint16mf2_t test_vrgather_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vx_i16mf2(vint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf2(op1, index, vl); + return __riscv_vrgather_vx_i16mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m1( @@ -445,7 +445,7 @@ vint16mf2_t test_vrgather_vx_i16mf2(vint16mf2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vv_i16m1(vint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_i16m1(op1, index, vl); + return __riscv_vrgather_vv_i16m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m1( @@ -454,7 +454,7 @@ vint16m1_t test_vrgather_vv_i16m1(vint16m1_t op1, vuint16m1_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vx_i16m1(vint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m1(op1, index, vl); + return __riscv_vrgather_vx_i16m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m2( @@ -463,7 +463,7 @@ vint16m1_t test_vrgather_vx_i16m1(vint16m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vv_i16m2(vint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_i16m2(op1, index, vl); + return __riscv_vrgather_vv_i16m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m2( @@ -472,7 +472,7 @@ vint16m2_t test_vrgather_vv_i16m2(vint16m2_t op1, vuint16m2_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vx_i16m2(vint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m2(op1, index, vl); + return __riscv_vrgather_vx_i16m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m4( @@ -481,7 +481,7 @@ vint16m2_t test_vrgather_vx_i16m2(vint16m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vv_i16m4(vint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_i16m4(op1, index, vl); + return __riscv_vrgather_vv_i16m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m4( @@ -490,7 +490,7 @@ vint16m4_t test_vrgather_vv_i16m4(vint16m4_t op1, vuint16m4_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vx_i16m4(vint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m4(op1, index, vl); + return __riscv_vrgather_vx_i16m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m8( @@ -499,7 +499,7 @@ vint16m4_t test_vrgather_vx_i16m4(vint16m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vv_i16m8(vint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_i16m8(op1, index, vl); + return __riscv_vrgather_vv_i16m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m8( @@ -508,7 +508,7 @@ vint16m8_t test_vrgather_vv_i16m8(vint16m8_t op1, vuint16m8_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vx_i16m8(vint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m8(op1, index, vl); + return __riscv_vrgather_vx_i16m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32mf2( @@ -517,7 +517,7 @@ vint16m8_t test_vrgather_vx_i16m8(vint16m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_i32mf2(op1, index, vl); + return __riscv_vrgather_vv_i32mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32mf2( @@ -526,7 +526,7 @@ vint32mf2_t test_vrgather_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t index, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vx_i32mf2(vint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32mf2(op1, index, vl); + return __riscv_vrgather_vx_i32mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m1( @@ -535,7 +535,7 @@ vint32mf2_t test_vrgather_vx_i32mf2(vint32mf2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vv_i32m1(vint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_i32m1(op1, index, vl); + return __riscv_vrgather_vv_i32m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m1( @@ -544,7 +544,7 @@ vint32m1_t test_vrgather_vv_i32m1(vint32m1_t op1, vuint32m1_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vx_i32m1(vint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m1(op1, index, vl); + return __riscv_vrgather_vx_i32m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m2( @@ -553,7 +553,7 @@ vint32m1_t test_vrgather_vx_i32m1(vint32m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vv_i32m2(vint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_i32m2(op1, index, vl); + return __riscv_vrgather_vv_i32m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m2( @@ -562,7 +562,7 @@ vint32m2_t test_vrgather_vv_i32m2(vint32m2_t op1, vuint32m2_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vx_i32m2(vint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m2(op1, index, vl); + return __riscv_vrgather_vx_i32m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m4( @@ -571,7 +571,7 @@ vint32m2_t test_vrgather_vx_i32m2(vint32m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vv_i32m4(vint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_i32m4(op1, index, vl); + return __riscv_vrgather_vv_i32m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m4( @@ -580,7 +580,7 @@ vint32m4_t test_vrgather_vv_i32m4(vint32m4_t op1, vuint32m4_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vx_i32m4(vint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m4(op1, index, vl); + return __riscv_vrgather_vx_i32m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m8( @@ -589,7 +589,7 @@ vint32m4_t test_vrgather_vx_i32m4(vint32m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vv_i32m8(vint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_i32m8(op1, index, vl); + return __riscv_vrgather_vv_i32m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m8( @@ -598,7 +598,7 @@ vint32m8_t test_vrgather_vv_i32m8(vint32m8_t op1, vuint32m8_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vx_i32m8(vint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m8(op1, index, vl); + return __riscv_vrgather_vx_i32m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m1( @@ -607,7 +607,7 @@ vint32m8_t test_vrgather_vx_i32m8(vint32m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vv_i64m1(vint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_i64m1(op1, index, vl); + return __riscv_vrgather_vv_i64m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m1( @@ -616,7 +616,7 @@ vint64m1_t test_vrgather_vv_i64m1(vint64m1_t op1, vuint64m1_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vx_i64m1(vint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m1(op1, index, vl); + return __riscv_vrgather_vx_i64m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m2( @@ -625,7 +625,7 @@ vint64m1_t test_vrgather_vx_i64m1(vint64m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vv_i64m2(vint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_i64m2(op1, index, vl); + return __riscv_vrgather_vv_i64m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m2( @@ -634,7 +634,7 @@ vint64m2_t test_vrgather_vv_i64m2(vint64m2_t op1, vuint64m2_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vx_i64m2(vint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m2(op1, index, vl); + return __riscv_vrgather_vx_i64m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m4( @@ -643,7 +643,7 @@ vint64m2_t test_vrgather_vx_i64m2(vint64m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vv_i64m4(vint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_i64m4(op1, index, vl); + return __riscv_vrgather_vv_i64m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m4( @@ -652,7 +652,7 @@ vint64m4_t test_vrgather_vv_i64m4(vint64m4_t op1, vuint64m4_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vx_i64m4(vint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m4(op1, index, vl); + return __riscv_vrgather_vx_i64m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m8( @@ -661,7 +661,7 @@ vint64m4_t test_vrgather_vx_i64m4(vint64m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vv_i64m8(vint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_i64m8(op1, index, vl); + return __riscv_vrgather_vv_i64m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m8( @@ -670,7 +670,7 @@ vint64m8_t test_vrgather_vv_i64m8(vint64m8_t op1, vuint64m8_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vx_i64m8(vint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m8(op1, index, vl); + return __riscv_vrgather_vx_i64m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf8( @@ -679,7 +679,7 @@ vint64m8_t test_vrgather_vx_i64m8(vint64m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_u8mf8(op1, index, vl); + return __riscv_vrgather_vv_u8mf8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf8( @@ -688,7 +688,7 @@ vuint8mf8_t test_vrgather_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vx_u8mf8(vuint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf8(op1, index, vl); + return __riscv_vrgather_vx_u8mf8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf4( @@ -697,7 +697,7 @@ vuint8mf8_t test_vrgather_vx_u8mf8(vuint8mf8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_u8mf4(op1, index, vl); + return __riscv_vrgather_vv_u8mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf4( @@ -706,7 +706,7 @@ vuint8mf4_t test_vrgather_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vx_u8mf4(vuint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf4(op1, index, vl); + return __riscv_vrgather_vx_u8mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf2( @@ -715,7 +715,7 @@ vuint8mf4_t test_vrgather_vx_u8mf4(vuint8mf4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_u8mf2(op1, index, vl); + return __riscv_vrgather_vv_u8mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf2( @@ -724,7 +724,7 @@ vuint8mf2_t test_vrgather_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vx_u8mf2(vuint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf2(op1, index, vl); + return __riscv_vrgather_vx_u8mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m1( @@ -733,7 +733,7 @@ vuint8mf2_t test_vrgather_vx_u8mf2(vuint8mf2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vv_u8m1(vuint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_u8m1(op1, index, vl); + return __riscv_vrgather_vv_u8m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m1( @@ -742,7 +742,7 @@ vuint8m1_t test_vrgather_vv_u8m1(vuint8m1_t op1, vuint8m1_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vx_u8m1(vuint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m1(op1, index, vl); + return __riscv_vrgather_vx_u8m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m2( @@ -751,7 +751,7 @@ vuint8m1_t test_vrgather_vx_u8m1(vuint8m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vv_u8m2(vuint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_u8m2(op1, index, vl); + return __riscv_vrgather_vv_u8m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m2( @@ -760,7 +760,7 @@ vuint8m2_t test_vrgather_vv_u8m2(vuint8m2_t op1, vuint8m2_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vx_u8m2(vuint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m2(op1, index, vl); + return __riscv_vrgather_vx_u8m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m4( @@ -769,7 +769,7 @@ vuint8m2_t test_vrgather_vx_u8m2(vuint8m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vv_u8m4(vuint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_u8m4(op1, index, vl); + return __riscv_vrgather_vv_u8m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m4( @@ -778,7 +778,7 @@ vuint8m4_t test_vrgather_vv_u8m4(vuint8m4_t op1, vuint8m4_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vx_u8m4(vuint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m4(op1, index, vl); + return __riscv_vrgather_vx_u8m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m8( @@ -787,7 +787,7 @@ vuint8m4_t test_vrgather_vx_u8m4(vuint8m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vv_u8m8(vuint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_u8m8(op1, index, vl); + return __riscv_vrgather_vv_u8m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m8( @@ -796,7 +796,7 @@ vuint8m8_t test_vrgather_vv_u8m8(vuint8m8_t op1, vuint8m8_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vx_u8m8(vuint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m8(op1, index, vl); + return __riscv_vrgather_vx_u8m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf4( @@ -805,7 +805,7 @@ vuint8m8_t test_vrgather_vx_u8m8(vuint8m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_u16mf4(op1, index, vl); + return __riscv_vrgather_vv_u16mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf4( @@ -814,7 +814,7 @@ vuint16mf4_t test_vrgather_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t index, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vx_u16mf4(vuint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf4(op1, index, vl); + return __riscv_vrgather_vx_u16mf4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf2( @@ -823,7 +823,7 @@ vuint16mf4_t test_vrgather_vx_u16mf4(vuint16mf4_t op1, size_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_u16mf2(op1, index, vl); + return __riscv_vrgather_vv_u16mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf2( @@ -832,7 +832,7 @@ vuint16mf2_t test_vrgather_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t index, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vx_u16mf2(vuint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf2(op1, index, vl); + return __riscv_vrgather_vx_u16mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m1( @@ -841,7 +841,7 @@ vuint16mf2_t test_vrgather_vx_u16mf2(vuint16mf2_t op1, size_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vv_u16m1(vuint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_u16m1(op1, index, vl); + return __riscv_vrgather_vv_u16m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m1( @@ -850,7 +850,7 @@ vuint16m1_t test_vrgather_vv_u16m1(vuint16m1_t op1, vuint16m1_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vx_u16m1(vuint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m1(op1, index, vl); + return __riscv_vrgather_vx_u16m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m2( @@ -859,7 +859,7 @@ vuint16m1_t test_vrgather_vx_u16m1(vuint16m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vv_u16m2(vuint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_u16m2(op1, index, vl); + return __riscv_vrgather_vv_u16m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m2( @@ -868,7 +868,7 @@ vuint16m2_t test_vrgather_vv_u16m2(vuint16m2_t op1, vuint16m2_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vx_u16m2(vuint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m2(op1, index, vl); + return __riscv_vrgather_vx_u16m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m4( @@ -877,7 +877,7 @@ vuint16m2_t test_vrgather_vx_u16m2(vuint16m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vv_u16m4(vuint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_u16m4(op1, index, vl); + return __riscv_vrgather_vv_u16m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m4( @@ -886,7 +886,7 @@ vuint16m4_t test_vrgather_vv_u16m4(vuint16m4_t op1, vuint16m4_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vx_u16m4(vuint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m4(op1, index, vl); + return __riscv_vrgather_vx_u16m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m8( @@ -895,7 +895,7 @@ vuint16m4_t test_vrgather_vx_u16m4(vuint16m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vv_u16m8(vuint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_u16m8(op1, index, vl); + return __riscv_vrgather_vv_u16m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m8( @@ -904,7 +904,7 @@ vuint16m8_t test_vrgather_vv_u16m8(vuint16m8_t op1, vuint16m8_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vx_u16m8(vuint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m8(op1, index, vl); + return __riscv_vrgather_vx_u16m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32mf2( @@ -913,7 +913,7 @@ vuint16m8_t test_vrgather_vx_u16m8(vuint16m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_u32mf2(op1, index, vl); + return __riscv_vrgather_vv_u32mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32mf2( @@ -922,7 +922,7 @@ vuint32mf2_t test_vrgather_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t index, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vx_u32mf2(vuint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32mf2(op1, index, vl); + return __riscv_vrgather_vx_u32mf2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m1( @@ -931,7 +931,7 @@ vuint32mf2_t test_vrgather_vx_u32mf2(vuint32mf2_t op1, size_t index, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vv_u32m1(vuint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_u32m1(op1, index, vl); + return __riscv_vrgather_vv_u32m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m1( @@ -940,7 +940,7 @@ vuint32m1_t test_vrgather_vv_u32m1(vuint32m1_t op1, vuint32m1_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vx_u32m1(vuint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m1(op1, index, vl); + return __riscv_vrgather_vx_u32m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m2( @@ -949,7 +949,7 @@ vuint32m1_t test_vrgather_vx_u32m1(vuint32m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vv_u32m2(vuint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_u32m2(op1, index, vl); + return __riscv_vrgather_vv_u32m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m2( @@ -958,7 +958,7 @@ vuint32m2_t test_vrgather_vv_u32m2(vuint32m2_t op1, vuint32m2_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vx_u32m2(vuint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m2(op1, index, vl); + return __riscv_vrgather_vx_u32m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m4( @@ -967,7 +967,7 @@ vuint32m2_t test_vrgather_vx_u32m2(vuint32m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vv_u32m4(vuint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_u32m4(op1, index, vl); + return __riscv_vrgather_vv_u32m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m4( @@ -976,7 +976,7 @@ vuint32m4_t test_vrgather_vv_u32m4(vuint32m4_t op1, vuint32m4_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vx_u32m4(vuint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m4(op1, index, vl); + return __riscv_vrgather_vx_u32m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m8( @@ -985,7 +985,7 @@ vuint32m4_t test_vrgather_vx_u32m4(vuint32m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vv_u32m8(vuint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_u32m8(op1, index, vl); + return __riscv_vrgather_vv_u32m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m8( @@ -994,7 +994,7 @@ vuint32m8_t test_vrgather_vv_u32m8(vuint32m8_t op1, vuint32m8_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vx_u32m8(vuint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m8(op1, index, vl); + return __riscv_vrgather_vx_u32m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m1( @@ -1003,7 +1003,7 @@ vuint32m8_t test_vrgather_vx_u32m8(vuint32m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vv_u64m1(vuint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_u64m1(op1, index, vl); + return __riscv_vrgather_vv_u64m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m1( @@ -1012,7 +1012,7 @@ vuint64m1_t test_vrgather_vv_u64m1(vuint64m1_t op1, vuint64m1_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vx_u64m1(vuint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m1(op1, index, vl); + return __riscv_vrgather_vx_u64m1(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m2( @@ -1021,7 +1021,7 @@ vuint64m1_t test_vrgather_vx_u64m1(vuint64m1_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vv_u64m2(vuint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_u64m2(op1, index, vl); + return __riscv_vrgather_vv_u64m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m2( @@ -1030,7 +1030,7 @@ vuint64m2_t test_vrgather_vv_u64m2(vuint64m2_t op1, vuint64m2_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vx_u64m2(vuint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m2(op1, index, vl); + return __riscv_vrgather_vx_u64m2(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m4( @@ -1039,7 +1039,7 @@ vuint64m2_t test_vrgather_vx_u64m2(vuint64m2_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vv_u64m4(vuint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_u64m4(op1, index, vl); + return __riscv_vrgather_vv_u64m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m4( @@ -1048,7 +1048,7 @@ vuint64m4_t test_vrgather_vv_u64m4(vuint64m4_t op1, vuint64m4_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vx_u64m4(vuint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m4(op1, index, vl); + return __riscv_vrgather_vx_u64m4(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m8( @@ -1057,7 +1057,7 @@ vuint64m4_t test_vrgather_vx_u64m4(vuint64m4_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vv_u64m8(vuint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_u64m8(op1, index, vl); + return __riscv_vrgather_vv_u64m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m8( @@ -1066,7 +1066,7 @@ vuint64m8_t test_vrgather_vv_u64m8(vuint64m8_t op1, vuint64m8_t index, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vx_u64m8(vuint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m8(op1, index, vl); + return __riscv_vrgather_vx_u64m8(op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf4_m( @@ -1075,7 +1075,7 @@ vuint64m8_t test_vrgather_vx_u64m8(vuint64m8_t op1, size_t index, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_f16mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f16mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf4_m( @@ -1084,7 +1084,7 @@ vfloat16mf4_t test_vrgather_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vx_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f16mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf2_m( @@ -1093,7 +1093,7 @@ vfloat16mf4_t test_vrgather_vx_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_f16mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f16mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf2_m( @@ -1102,7 +1102,7 @@ vfloat16mf2_t test_vrgather_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vx_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f16mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m1_m( @@ -1111,7 +1111,7 @@ vfloat16mf2_t test_vrgather_vx_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_f16m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f16m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m1_m( @@ -1120,7 +1120,7 @@ vfloat16m1_t test_vrgather_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vx_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f16m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m2_m( @@ -1129,7 +1129,7 @@ vfloat16m1_t test_vrgather_vx_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_f16m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f16m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m2_m( @@ -1138,7 +1138,7 @@ vfloat16m2_t test_vrgather_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vx_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f16m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m4_m( @@ -1147,7 +1147,7 @@ vfloat16m2_t test_vrgather_vx_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_f16m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f16m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m4_m( @@ -1156,7 +1156,7 @@ vfloat16m4_t test_vrgather_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vx_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f16m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m8_m( @@ -1165,7 +1165,7 @@ vfloat16m4_t test_vrgather_vx_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_f16m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f16m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m8_m( @@ -1174,7 +1174,7 @@ vfloat16m8_t test_vrgather_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vx_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f16m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32mf2_m( @@ -1183,7 +1183,7 @@ vfloat16m8_t test_vrgather_vx_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_f32mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f32mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32mf2_m( @@ -1192,7 +1192,7 @@ vfloat32mf2_t test_vrgather_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vx_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f32mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m1_m( @@ -1201,7 +1201,7 @@ vfloat32mf2_t test_vrgather_vx_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_f32m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f32m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m1_m( @@ -1210,7 +1210,7 @@ vfloat32m1_t test_vrgather_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vx_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f32m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m2_m( @@ -1219,7 +1219,7 @@ vfloat32m1_t test_vrgather_vx_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_f32m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f32m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m2_m( @@ -1228,7 +1228,7 @@ vfloat32m2_t test_vrgather_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vx_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f32m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m4_m( @@ -1237,7 +1237,7 @@ vfloat32m2_t test_vrgather_vx_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_f32m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f32m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m4_m( @@ -1246,7 +1246,7 @@ vfloat32m4_t test_vrgather_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vx_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f32m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m8_m( @@ -1255,7 +1255,7 @@ vfloat32m4_t test_vrgather_vx_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_f32m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f32m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m8_m( @@ -1264,7 +1264,7 @@ vfloat32m8_t test_vrgather_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vx_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f32m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m1_m( @@ -1273,7 +1273,7 @@ vfloat32m8_t test_vrgather_vx_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_f64m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f64m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m1_m( @@ -1282,7 +1282,7 @@ vfloat64m1_t test_vrgather_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vx_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f64m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m2_m( @@ -1291,7 +1291,7 @@ vfloat64m1_t test_vrgather_vx_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_f64m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f64m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m2_m( @@ -1300,7 +1300,7 @@ vfloat64m2_t test_vrgather_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vx_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f64m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m4_m( @@ -1309,7 +1309,7 @@ vfloat64m2_t test_vrgather_vx_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_f64m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f64m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m4_m( @@ -1318,7 +1318,7 @@ vfloat64m4_t test_vrgather_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vx_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f64m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m8_m( @@ -1327,7 +1327,7 @@ vfloat64m4_t test_vrgather_vx_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_f64m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_f64m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m8_m( @@ -1336,7 +1336,7 @@ vfloat64m8_t test_vrgather_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vx_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_f64m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf8_m( @@ -1345,7 +1345,7 @@ vfloat64m8_t test_vrgather_vx_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_i8mf8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i8mf8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf8_m( @@ -1354,7 +1354,7 @@ vint8mf8_t test_vrgather_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i8mf8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf4_m( @@ -1363,7 +1363,7 @@ vint8mf8_t test_vrgather_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_i8mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i8mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf4_m( @@ -1372,7 +1372,7 @@ vint8mf4_t test_vrgather_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i8mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf2_m( @@ -1381,7 +1381,7 @@ vint8mf4_t test_vrgather_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_i8mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i8mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf2_m( @@ -1390,7 +1390,7 @@ vint8mf2_t test_vrgather_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i8mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m1_m( @@ -1399,7 +1399,7 @@ vint8mf2_t test_vrgather_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_i8m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i8m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m1_m( @@ -1408,7 +1408,7 @@ vint8m1_t test_vrgather_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i8m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m2_m( @@ -1417,7 +1417,7 @@ vint8m1_t test_vrgather_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t index, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_i8m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i8m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m2_m( @@ -1426,7 +1426,7 @@ vint8m2_t test_vrgather_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i8m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m4_m( @@ -1435,7 +1435,7 @@ vint8m2_t test_vrgather_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t index, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_i8m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i8m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m4_m( @@ -1444,7 +1444,7 @@ vint8m4_t test_vrgather_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i8m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m8_m( @@ -1453,7 +1453,7 @@ vint8m4_t test_vrgather_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t index, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_i8m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i8m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m8_m( @@ -1462,7 +1462,7 @@ vint8m8_t test_vrgather_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i8m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf4_m( @@ -1471,7 +1471,7 @@ vint8m8_t test_vrgather_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t index, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_i16mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i16mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf4_m( @@ -1480,7 +1480,7 @@ vint16mf4_t test_vrgather_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i16mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf2_m( @@ -1489,7 +1489,7 @@ vint16mf4_t test_vrgather_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_i16mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i16mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf2_m( @@ -1498,7 +1498,7 @@ vint16mf2_t test_vrgather_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i16mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m1_m( @@ -1507,7 +1507,7 @@ vint16mf2_t test_vrgather_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_i16m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i16m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m1_m( @@ -1516,7 +1516,7 @@ vint16m1_t test_vrgather_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i16m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m2_m( @@ -1525,7 +1525,7 @@ vint16m1_t test_vrgather_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_i16m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i16m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m2_m( @@ -1534,7 +1534,7 @@ vint16m2_t test_vrgather_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i16m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m4_m( @@ -1543,7 +1543,7 @@ vint16m2_t test_vrgather_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_i16m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i16m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m4_m( @@ -1552,7 +1552,7 @@ vint16m4_t test_vrgather_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i16m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m8_m( @@ -1561,7 +1561,7 @@ vint16m4_t test_vrgather_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_i16m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i16m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m8_m( @@ -1570,7 +1570,7 @@ vint16m8_t test_vrgather_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i16m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32mf2_m( @@ -1579,7 +1579,7 @@ vint16m8_t test_vrgather_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_i32mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i32mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32mf2_m( @@ -1588,7 +1588,7 @@ vint32mf2_t test_vrgather_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i32mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m1_m( @@ -1597,7 +1597,7 @@ vint32mf2_t test_vrgather_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_i32m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i32m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m1_m( @@ -1606,7 +1606,7 @@ vint32m1_t test_vrgather_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i32m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m2_m( @@ -1615,7 +1615,7 @@ vint32m1_t test_vrgather_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_i32m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i32m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m2_m( @@ -1624,7 +1624,7 @@ vint32m2_t test_vrgather_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i32m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m4_m( @@ -1633,7 +1633,7 @@ vint32m2_t test_vrgather_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_i32m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i32m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m4_m( @@ -1642,7 +1642,7 @@ vint32m4_t test_vrgather_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i32m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m8_m( @@ -1651,7 +1651,7 @@ vint32m4_t test_vrgather_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_i32m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i32m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m8_m( @@ -1660,7 +1660,7 @@ vint32m8_t test_vrgather_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i32m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m1_m( @@ -1669,7 +1669,7 @@ vint32m8_t test_vrgather_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_i64m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i64m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m1_m( @@ -1678,7 +1678,7 @@ vint64m1_t test_vrgather_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i64m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m2_m( @@ -1687,7 +1687,7 @@ vint64m1_t test_vrgather_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_i64m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i64m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m2_m( @@ -1696,7 +1696,7 @@ vint64m2_t test_vrgather_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i64m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m4_m( @@ -1705,7 +1705,7 @@ vint64m2_t test_vrgather_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_i64m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i64m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m4_m( @@ -1714,7 +1714,7 @@ vint64m4_t test_vrgather_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i64m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m8_m( @@ -1723,7 +1723,7 @@ vint64m4_t test_vrgather_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t index // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_i64m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_i64m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m8_m( @@ -1732,7 +1732,7 @@ vint64m8_t test_vrgather_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_i64m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf8_m( @@ -1741,7 +1741,7 @@ vint64m8_t test_vrgather_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_u8mf8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u8mf8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf8_m( @@ -1750,7 +1750,7 @@ vuint8mf8_t test_vrgather_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u8mf8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf4_m( @@ -1759,7 +1759,7 @@ vuint8mf8_t test_vrgather_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_u8mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u8mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf4_m( @@ -1768,7 +1768,7 @@ vuint8mf4_t test_vrgather_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u8mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf2_m( @@ -1777,7 +1777,7 @@ vuint8mf4_t test_vrgather_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_u8mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u8mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf2_m( @@ -1786,7 +1786,7 @@ vuint8mf2_t test_vrgather_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u8mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m1_m( @@ -1795,7 +1795,7 @@ vuint8mf2_t test_vrgather_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_u8m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u8m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m1_m( @@ -1804,7 +1804,7 @@ vuint8m1_t test_vrgather_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u8m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m2_m( @@ -1813,7 +1813,7 @@ vuint8m1_t test_vrgather_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_u8m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u8m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m2_m( @@ -1822,7 +1822,7 @@ vuint8m2_t test_vrgather_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u8m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m4_m( @@ -1831,7 +1831,7 @@ vuint8m2_t test_vrgather_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_u8m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u8m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m4_m( @@ -1840,7 +1840,7 @@ vuint8m4_t test_vrgather_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u8m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m8_m( @@ -1849,7 +1849,7 @@ vuint8m4_t test_vrgather_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_u8m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u8m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m8_m( @@ -1858,7 +1858,7 @@ vuint8m8_t test_vrgather_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u8m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf4_m( @@ -1867,7 +1867,7 @@ vuint8m8_t test_vrgather_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t index, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_u16mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u16mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf4_m( @@ -1876,7 +1876,7 @@ vuint16mf4_t test_vrgather_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u16mf4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf2_m( @@ -1885,7 +1885,7 @@ vuint16mf4_t test_vrgather_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_u16mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u16mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf2_m( @@ -1894,7 +1894,7 @@ vuint16mf2_t test_vrgather_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u16mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m1_m( @@ -1903,7 +1903,7 @@ vuint16mf2_t test_vrgather_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_u16m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u16m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m1_m( @@ -1912,7 +1912,7 @@ vuint16m1_t test_vrgather_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u16m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m2_m( @@ -1921,7 +1921,7 @@ vuint16m1_t test_vrgather_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_u16m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u16m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m2_m( @@ -1930,7 +1930,7 @@ vuint16m2_t test_vrgather_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u16m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m4_m( @@ -1939,7 +1939,7 @@ vuint16m2_t test_vrgather_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t inde // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_u16m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u16m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m4_m( @@ -1948,7 +1948,7 @@ vuint16m4_t test_vrgather_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u16m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m8_m( @@ -1957,7 +1957,7 @@ vuint16m4_t test_vrgather_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t inde // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_u16m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u16m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m8_m( @@ -1966,7 +1966,7 @@ vuint16m8_t test_vrgather_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u16m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32mf2_m( @@ -1975,7 +1975,7 @@ vuint16m8_t test_vrgather_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t inde // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_u32mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u32mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32mf2_m( @@ -1984,7 +1984,7 @@ vuint32mf2_t test_vrgather_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32mf2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u32mf2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m1_m( @@ -1993,7 +1993,7 @@ vuint32mf2_t test_vrgather_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_u32m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u32m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m1_m( @@ -2002,7 +2002,7 @@ vuint32m1_t test_vrgather_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u32m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m2_m( @@ -2011,7 +2011,7 @@ vuint32m1_t test_vrgather_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_u32m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u32m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m2_m( @@ -2020,7 +2020,7 @@ vuint32m2_t test_vrgather_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u32m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m4_m( @@ -2029,7 +2029,7 @@ vuint32m2_t test_vrgather_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_u32m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u32m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m4_m( @@ -2038,7 +2038,7 @@ vuint32m4_t test_vrgather_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u32m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m8_m( @@ -2047,7 +2047,7 @@ vuint32m4_t test_vrgather_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t inde // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_u32m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u32m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m8_m( @@ -2056,7 +2056,7 @@ vuint32m8_t test_vrgather_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u32m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m1_m( @@ -2065,7 +2065,7 @@ vuint32m8_t test_vrgather_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t inde // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_u64m1_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u64m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m1_m( @@ -2074,7 +2074,7 @@ vuint64m1_t test_vrgather_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m1_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u64m1_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m2_m( @@ -2083,7 +2083,7 @@ vuint64m1_t test_vrgather_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_u64m2_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u64m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m2_m( @@ -2092,7 +2092,7 @@ vuint64m2_t test_vrgather_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m2_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u64m2_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m4_m( @@ -2101,7 +2101,7 @@ vuint64m2_t test_vrgather_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_u64m4_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u64m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m4_m( @@ -2110,7 +2110,7 @@ vuint64m4_t test_vrgather_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m4_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u64m4_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m8_m( @@ -2119,7 +2119,7 @@ vuint64m4_t test_vrgather_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t ind // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_u64m8_m(mask, op1, index, vl); + return __riscv_vrgather_vv_u64m8_m(mask, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m8_m( @@ -2128,6 +2128,6 @@ vuint64m8_t test_vrgather_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m8_m(mask, op1, index, vl); + return __riscv_vrgather_vx_u64m8_m(mask, op1, index, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c index 4ff4c3b18d32d2171aa0dc117e3f1290e7b879ff..0bee3bbea871e55c7ff80c54666d6ceb183c0167 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrgatherei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgatherei16_vv_f16mf4(vfloat16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f16mf4(op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vrgatherei16_vv_f16mf4(vfloat16mf4_t op1, vuint16mf4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgatherei16_vv_f16mf2(vfloat16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f16mf2(op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vrgatherei16_vv_f16mf2(vfloat16mf2_t op1, vuint16mf2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgatherei16_vv_f16m1(vfloat16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f16m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vrgatherei16_vv_f16m1(vfloat16m1_t op1, vuint16m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgatherei16_vv_f16m2(vfloat16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f16m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vrgatherei16_vv_f16m2(vfloat16m2_t op1, vuint16m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgatherei16_vv_f16m4(vfloat16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f16m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vrgatherei16_vv_f16m4(vfloat16m4_t op1, vuint16m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgatherei16_vv_f16m8(vfloat16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_f16m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vrgatherei16_vv_f16m8(vfloat16m8_t op1, vuint16m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgatherei16_vv_f32mf2(vfloat32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f32mf2(op1, op2, vl); + return __riscv_vrgatherei16_vv_f32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vrgatherei16_vv_f32mf2(vfloat32mf2_t op1, vuint16mf4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgatherei16_vv_f32m1(vfloat32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f32m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vrgatherei16_vv_f32m1(vfloat32m1_t op1, vuint16mf2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgatherei16_vv_f32m2(vfloat32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f32m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vrgatherei16_vv_f32m2(vfloat32m2_t op1, vuint16m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgatherei16_vv_f32m4(vfloat32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f32m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vrgatherei16_vv_f32m4(vfloat32m4_t op1, vuint16m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgatherei16_vv_f32m8(vfloat32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f32m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vrgatherei16_vv_f32m8(vfloat32m8_t op1, vuint16m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgatherei16_vv_f64m1(vfloat64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f64m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vrgatherei16_vv_f64m1(vfloat64m1_t op1, vuint16mf4_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgatherei16_vv_f64m2(vfloat64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f64m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vrgatherei16_vv_f64m2(vfloat64m2_t op1, vuint16mf2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgatherei16_vv_f64m4(vfloat64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f64m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vrgatherei16_vv_f64m4(vfloat64m4_t op1, vuint16m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgatherei16_vv_f64m8(vfloat64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f64m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf8( @@ -148,7 +148,7 @@ vfloat64m8_t test_vrgatherei16_vv_f64m8(vfloat64m8_t op1, vuint16m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgatherei16_vv_i8mf8(vint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i8mf8(op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf4( @@ -157,7 +157,7 @@ vint8mf8_t test_vrgatherei16_vv_i8mf8(vint8mf8_t op1, vuint16mf4_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgatherei16_vv_i8mf4(vint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i8mf4(op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf2( @@ -166,7 +166,7 @@ vint8mf4_t test_vrgatherei16_vv_i8mf4(vint8mf4_t op1, vuint16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgatherei16_vv_i8mf2(vint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i8mf2(op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m1( @@ -175,7 +175,7 @@ vint8mf2_t test_vrgatherei16_vv_i8mf2(vint8mf2_t op1, vuint16m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgatherei16_vv_i8m1(vint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i8m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m2( @@ -184,7 +184,7 @@ vint8m1_t test_vrgatherei16_vv_i8m1(vint8m1_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgatherei16_vv_i8m2(vint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i8m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m4( @@ -193,7 +193,7 @@ vint8m2_t test_vrgatherei16_vv_i8m2(vint8m2_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgatherei16_vv_i8m4(vint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i8m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf4( @@ -202,7 +202,7 @@ vint8m4_t test_vrgatherei16_vv_i8m4(vint8m4_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgatherei16_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i16mf4(op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf2( @@ -211,7 +211,7 @@ vint16mf4_t test_vrgatherei16_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgatherei16_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i16mf2(op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m1( @@ -220,7 +220,7 @@ vint16mf2_t test_vrgatherei16_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgatherei16_vv_i16m1(vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i16m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m2( @@ -229,7 +229,7 @@ vint16m1_t test_vrgatherei16_vv_i16m1(vint16m1_t op1, vuint16m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgatherei16_vv_i16m2(vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i16m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m4( @@ -238,7 +238,7 @@ vint16m2_t test_vrgatherei16_vv_i16m2(vint16m2_t op1, vuint16m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgatherei16_vv_i16m4(vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i16m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m8( @@ -247,7 +247,7 @@ vint16m4_t test_vrgatherei16_vv_i16m4(vint16m4_t op1, vuint16m4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgatherei16_vv_i16m8(vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i16m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32mf2( @@ -256,7 +256,7 @@ vint16m8_t test_vrgatherei16_vv_i16m8(vint16m8_t op1, vuint16m8_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgatherei16_vv_i32mf2(vint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i32mf2(op1, op2, vl); + return __riscv_vrgatherei16_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m1( @@ -265,7 +265,7 @@ vint32mf2_t test_vrgatherei16_vv_i32mf2(vint32mf2_t op1, vuint16mf4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgatherei16_vv_i32m1(vint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i32m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m2( @@ -274,7 +274,7 @@ vint32m1_t test_vrgatherei16_vv_i32m1(vint32m1_t op1, vuint16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgatherei16_vv_i32m2(vint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i32m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m4( @@ -283,7 +283,7 @@ vint32m2_t test_vrgatherei16_vv_i32m2(vint32m2_t op1, vuint16m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgatherei16_vv_i32m4(vint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i32m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m8( @@ -292,7 +292,7 @@ vint32m4_t test_vrgatherei16_vv_i32m4(vint32m4_t op1, vuint16m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgatherei16_vv_i32m8(vint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i32m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m1( @@ -301,7 +301,7 @@ vint32m8_t test_vrgatherei16_vv_i32m8(vint32m8_t op1, vuint16m4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgatherei16_vv_i64m1(vint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i64m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m2( @@ -310,7 +310,7 @@ vint64m1_t test_vrgatherei16_vv_i64m1(vint64m1_t op1, vuint16mf4_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgatherei16_vv_i64m2(vint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i64m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m4( @@ -319,7 +319,7 @@ vint64m2_t test_vrgatherei16_vv_i64m2(vint64m2_t op1, vuint16mf2_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgatherei16_vv_i64m4(vint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i64m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m8( @@ -328,7 +328,7 @@ vint64m4_t test_vrgatherei16_vv_i64m4(vint64m4_t op1, vuint16m1_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgatherei16_vv_i64m8(vint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i64m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf8( @@ -337,7 +337,7 @@ vint64m8_t test_vrgatherei16_vv_i64m8(vint64m8_t op1, vuint16m2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgatherei16_vv_u8mf8(vuint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u8mf8(op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf4( @@ -346,7 +346,7 @@ vuint8mf8_t test_vrgatherei16_vv_u8mf8(vuint8mf8_t op1, vuint16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgatherei16_vv_u8mf4(vuint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u8mf4(op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf2( @@ -355,7 +355,7 @@ vuint8mf4_t test_vrgatherei16_vv_u8mf4(vuint8mf4_t op1, vuint16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgatherei16_vv_u8mf2(vuint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u8mf2(op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m1( @@ -364,7 +364,7 @@ vuint8mf2_t test_vrgatherei16_vv_u8mf2(vuint8mf2_t op1, vuint16m1_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgatherei16_vv_u8m1(vuint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u8m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m2( @@ -373,7 +373,7 @@ vuint8m1_t test_vrgatherei16_vv_u8m1(vuint8m1_t op1, vuint16m2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgatherei16_vv_u8m2(vuint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u8m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m4( @@ -382,7 +382,7 @@ vuint8m2_t test_vrgatherei16_vv_u8m2(vuint8m2_t op1, vuint16m4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgatherei16_vv_u8m4(vuint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u8m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf4( @@ -391,7 +391,7 @@ vuint8m4_t test_vrgatherei16_vv_u8m4(vuint8m4_t op1, vuint16m8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgatherei16_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u16mf4(op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf2( @@ -400,7 +400,7 @@ vuint16mf4_t test_vrgatherei16_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgatherei16_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u16mf2(op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m1( @@ -409,7 +409,7 @@ vuint16mf2_t test_vrgatherei16_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgatherei16_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u16m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m2( @@ -418,7 +418,7 @@ vuint16m1_t test_vrgatherei16_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgatherei16_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u16m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m4( @@ -427,7 +427,7 @@ vuint16m2_t test_vrgatherei16_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgatherei16_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u16m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m8( @@ -436,7 +436,7 @@ vuint16m4_t test_vrgatherei16_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgatherei16_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u16m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32mf2( @@ -445,7 +445,7 @@ vuint16m8_t test_vrgatherei16_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgatherei16_vv_u32mf2(vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u32mf2(op1, op2, vl); + return __riscv_vrgatherei16_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m1( @@ -454,7 +454,7 @@ vuint32mf2_t test_vrgatherei16_vv_u32mf2(vuint32mf2_t op1, vuint16mf4_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgatherei16_vv_u32m1(vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u32m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m2( @@ -463,7 +463,7 @@ vuint32m1_t test_vrgatherei16_vv_u32m1(vuint32m1_t op1, vuint16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgatherei16_vv_u32m2(vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u32m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m4( @@ -472,7 +472,7 @@ vuint32m2_t test_vrgatherei16_vv_u32m2(vuint32m2_t op1, vuint16m1_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgatherei16_vv_u32m4(vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u32m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m8( @@ -481,7 +481,7 @@ vuint32m4_t test_vrgatherei16_vv_u32m4(vuint32m4_t op1, vuint16m2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgatherei16_vv_u32m8(vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u32m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m1( @@ -490,7 +490,7 @@ vuint32m8_t test_vrgatherei16_vv_u32m8(vuint32m8_t op1, vuint16m4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgatherei16_vv_u64m1(vuint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u64m1(op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m2( @@ -499,7 +499,7 @@ vuint64m1_t test_vrgatherei16_vv_u64m1(vuint64m1_t op1, vuint16mf4_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgatherei16_vv_u64m2(vuint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u64m2(op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m4( @@ -508,7 +508,7 @@ vuint64m2_t test_vrgatherei16_vv_u64m2(vuint64m2_t op1, vuint16mf2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgatherei16_vv_u64m4(vuint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u64m4(op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m8( @@ -517,7 +517,7 @@ vuint64m4_t test_vrgatherei16_vv_u64m4(vuint64m4_t op1, vuint16m1_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgatherei16_vv_u64m8(vuint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u64m8(op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf4_m( @@ -526,7 +526,7 @@ vuint64m8_t test_vrgatherei16_vv_u64m8(vuint64m8_t op1, vuint16m2_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgatherei16_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f16mf4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf2_m( @@ -535,7 +535,7 @@ vfloat16mf4_t test_vrgatherei16_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgatherei16_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f16mf2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m1_m( @@ -544,7 +544,7 @@ vfloat16mf2_t test_vrgatherei16_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgatherei16_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f16m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m2_m( @@ -553,7 +553,7 @@ vfloat16m1_t test_vrgatherei16_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgatherei16_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f16m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m4_m( @@ -562,7 +562,7 @@ vfloat16m2_t test_vrgatherei16_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgatherei16_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f16m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m8_m( @@ -571,7 +571,7 @@ vfloat16m4_t test_vrgatherei16_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgatherei16_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_f16m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32mf2_m( @@ -580,7 +580,7 @@ vfloat16m8_t test_vrgatherei16_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgatherei16_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f32mf2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m1_m( @@ -589,7 +589,7 @@ vfloat32mf2_t test_vrgatherei16_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgatherei16_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f32m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m2_m( @@ -598,7 +598,7 @@ vfloat32m1_t test_vrgatherei16_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgatherei16_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f32m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m4_m( @@ -607,7 +607,7 @@ vfloat32m2_t test_vrgatherei16_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgatherei16_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f32m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m8_m( @@ -616,7 +616,7 @@ vfloat32m4_t test_vrgatherei16_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgatherei16_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f32m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m1_m( @@ -625,7 +625,7 @@ vfloat32m8_t test_vrgatherei16_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgatherei16_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f64m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m2_m( @@ -634,7 +634,7 @@ vfloat64m1_t test_vrgatherei16_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgatherei16_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f64m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m4_m( @@ -643,7 +643,7 @@ vfloat64m2_t test_vrgatherei16_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgatherei16_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f64m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m8_m( @@ -652,7 +652,7 @@ vfloat64m4_t test_vrgatherei16_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgatherei16_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f64m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf8_m( @@ -661,7 +661,7 @@ vfloat64m8_t test_vrgatherei16_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgatherei16_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf4_m( @@ -670,7 +670,7 @@ vint8mf8_t test_vrgatherei16_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgatherei16_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf2_m( @@ -679,7 +679,7 @@ vint8mf4_t test_vrgatherei16_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgatherei16_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m1_m( @@ -688,7 +688,7 @@ vint8mf2_t test_vrgatherei16_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgatherei16_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m2_m( @@ -697,7 +697,7 @@ vint8m1_t test_vrgatherei16_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgatherei16_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m4_m( @@ -706,7 +706,7 @@ vint8m2_t test_vrgatherei16_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgatherei16_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf4_m( @@ -715,7 +715,7 @@ vint8m4_t test_vrgatherei16_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgatherei16_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf2_m( @@ -724,7 +724,7 @@ vint16mf4_t test_vrgatherei16_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgatherei16_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m1_m( @@ -733,7 +733,7 @@ vint16mf2_t test_vrgatherei16_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgatherei16_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m2_m( @@ -742,7 +742,7 @@ vint16m1_t test_vrgatherei16_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgatherei16_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m4_m( @@ -751,7 +751,7 @@ vint16m2_t test_vrgatherei16_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgatherei16_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m8_m( @@ -760,7 +760,7 @@ vint16m4_t test_vrgatherei16_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgatherei16_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32mf2_m( @@ -769,7 +769,7 @@ vint16m8_t test_vrgatherei16_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgatherei16_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m1_m( @@ -778,7 +778,7 @@ vint32mf2_t test_vrgatherei16_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgatherei16_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m2_m( @@ -787,7 +787,7 @@ vint32m1_t test_vrgatherei16_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgatherei16_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m4_m( @@ -796,7 +796,7 @@ vint32m2_t test_vrgatherei16_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgatherei16_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m8_m( @@ -805,7 +805,7 @@ vint32m4_t test_vrgatherei16_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgatherei16_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m1_m( @@ -814,7 +814,7 @@ vint32m8_t test_vrgatherei16_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgatherei16_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m2_m( @@ -823,7 +823,7 @@ vint64m1_t test_vrgatherei16_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgatherei16_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m4_m( @@ -832,7 +832,7 @@ vint64m2_t test_vrgatherei16_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgatherei16_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m8_m( @@ -841,7 +841,7 @@ vint64m4_t test_vrgatherei16_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgatherei16_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf8_m( @@ -850,7 +850,7 @@ vint64m8_t test_vrgatherei16_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgatherei16_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf4_m( @@ -859,7 +859,7 @@ vuint8mf8_t test_vrgatherei16_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgatherei16_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf2_m( @@ -868,7 +868,7 @@ vuint8mf4_t test_vrgatherei16_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgatherei16_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m1_m( @@ -877,7 +877,7 @@ vuint8mf2_t test_vrgatherei16_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgatherei16_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m2_m( @@ -886,7 +886,7 @@ vuint8m1_t test_vrgatherei16_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgatherei16_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m4_m( @@ -895,7 +895,7 @@ vuint8m2_t test_vrgatherei16_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgatherei16_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf4_m( @@ -904,7 +904,7 @@ vuint8m4_t test_vrgatherei16_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgatherei16_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf2_m( @@ -913,7 +913,7 @@ vuint16mf4_t test_vrgatherei16_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgatherei16_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m1_m( @@ -922,7 +922,7 @@ vuint16mf2_t test_vrgatherei16_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgatherei16_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m2_m( @@ -931,7 +931,7 @@ vuint16m1_t test_vrgatherei16_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgatherei16_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m4_m( @@ -940,7 +940,7 @@ vuint16m2_t test_vrgatherei16_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgatherei16_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m8_m( @@ -949,7 +949,7 @@ vuint16m4_t test_vrgatherei16_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgatherei16_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32mf2_m( @@ -958,7 +958,7 @@ vuint16m8_t test_vrgatherei16_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgatherei16_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m1_m( @@ -967,7 +967,7 @@ vuint32mf2_t test_vrgatherei16_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgatherei16_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m2_m( @@ -976,7 +976,7 @@ vuint32m1_t test_vrgatherei16_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgatherei16_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m4_m( @@ -985,7 +985,7 @@ vuint32m2_t test_vrgatherei16_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgatherei16_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m8_m( @@ -994,7 +994,7 @@ vuint32m4_t test_vrgatherei16_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgatherei16_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m1_m( @@ -1003,7 +1003,7 @@ vuint32m8_t test_vrgatherei16_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgatherei16_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m2_m( @@ -1012,7 +1012,7 @@ vuint64m1_t test_vrgatherei16_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgatherei16_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m4_m( @@ -1021,7 +1021,7 @@ vuint64m2_t test_vrgatherei16_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgatherei16_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m8_m( @@ -1030,6 +1030,6 @@ vuint64m4_t test_vrgatherei16_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgatherei16_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrsub.c index b807a5163b11d4b055c779c2f0d1b7bc9e53d146..494ac7a30218fe2793eabc3b28ebb3b989162ba6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vrsub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrsub_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf8(op1, op2, vl); + return __riscv_vrsub_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf4( @@ -21,7 +21,7 @@ vint8mf8_t test_vrsub_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrsub_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf4(op1, op2, vl); + return __riscv_vrsub_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf2( @@ -30,7 +30,7 @@ vint8mf4_t test_vrsub_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrsub_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf2(op1, op2, vl); + return __riscv_vrsub_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m1( @@ -39,7 +39,7 @@ vint8mf2_t test_vrsub_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrsub_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m1(op1, op2, vl); + return __riscv_vrsub_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m2( @@ -48,7 +48,7 @@ vint8m1_t test_vrsub_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrsub_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m2(op1, op2, vl); + return __riscv_vrsub_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m4( @@ -57,7 +57,7 @@ vint8m2_t test_vrsub_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrsub_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m4(op1, op2, vl); + return __riscv_vrsub_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m8( @@ -66,7 +66,7 @@ vint8m4_t test_vrsub_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrsub_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m8(op1, op2, vl); + return __riscv_vrsub_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf4( @@ -75,7 +75,7 @@ vint8m8_t test_vrsub_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrsub_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf4(op1, op2, vl); + return __riscv_vrsub_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf2( @@ -84,7 +84,7 @@ vint16mf4_t test_vrsub_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrsub_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf2(op1, op2, vl); + return __riscv_vrsub_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m1( @@ -93,7 +93,7 @@ vint16mf2_t test_vrsub_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrsub_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m1(op1, op2, vl); + return __riscv_vrsub_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m2( @@ -102,7 +102,7 @@ vint16m1_t test_vrsub_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrsub_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m2(op1, op2, vl); + return __riscv_vrsub_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m4( @@ -111,7 +111,7 @@ vint16m2_t test_vrsub_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrsub_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m4(op1, op2, vl); + return __riscv_vrsub_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m8( @@ -120,7 +120,7 @@ vint16m4_t test_vrsub_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrsub_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m8(op1, op2, vl); + return __riscv_vrsub_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32mf2( @@ -129,7 +129,7 @@ vint16m8_t test_vrsub_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrsub_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32mf2(op1, op2, vl); + return __riscv_vrsub_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m1( @@ -138,7 +138,7 @@ vint32mf2_t test_vrsub_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrsub_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m1(op1, op2, vl); + return __riscv_vrsub_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m2( @@ -147,7 +147,7 @@ vint32m1_t test_vrsub_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrsub_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m2(op1, op2, vl); + return __riscv_vrsub_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m4( @@ -156,7 +156,7 @@ vint32m2_t test_vrsub_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrsub_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m4(op1, op2, vl); + return __riscv_vrsub_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m8( @@ -165,7 +165,7 @@ vint32m4_t test_vrsub_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrsub_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m8(op1, op2, vl); + return __riscv_vrsub_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m1( @@ -174,7 +174,7 @@ vint32m8_t test_vrsub_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrsub_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m1(op1, op2, vl); + return __riscv_vrsub_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m2( @@ -183,7 +183,7 @@ vint64m1_t test_vrsub_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrsub_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m2(op1, op2, vl); + return __riscv_vrsub_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m4( @@ -192,7 +192,7 @@ vint64m2_t test_vrsub_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrsub_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m4(op1, op2, vl); + return __riscv_vrsub_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m8( @@ -201,7 +201,7 @@ vint64m4_t test_vrsub_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrsub_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m8(op1, op2, vl); + return __riscv_vrsub_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf8( @@ -210,7 +210,7 @@ vint64m8_t test_vrsub_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrsub_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf8(op1, op2, vl); + return __riscv_vrsub_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf4( @@ -219,7 +219,7 @@ vuint8mf8_t test_vrsub_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrsub_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf4(op1, op2, vl); + return __riscv_vrsub_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf2( @@ -228,7 +228,7 @@ vuint8mf4_t test_vrsub_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrsub_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf2(op1, op2, vl); + return __riscv_vrsub_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m1( @@ -237,7 +237,7 @@ vuint8mf2_t test_vrsub_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrsub_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m1(op1, op2, vl); + return __riscv_vrsub_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m2( @@ -246,7 +246,7 @@ vuint8m1_t test_vrsub_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrsub_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m2(op1, op2, vl); + return __riscv_vrsub_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m4( @@ -255,7 +255,7 @@ vuint8m2_t test_vrsub_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrsub_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m4(op1, op2, vl); + return __riscv_vrsub_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m8( @@ -264,7 +264,7 @@ vuint8m4_t test_vrsub_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrsub_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m8(op1, op2, vl); + return __riscv_vrsub_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf4( @@ -273,7 +273,7 @@ vuint8m8_t test_vrsub_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrsub_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf4(op1, op2, vl); + return __riscv_vrsub_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf2( @@ -282,7 +282,7 @@ vuint16mf4_t test_vrsub_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrsub_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf2(op1, op2, vl); + return __riscv_vrsub_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m1( @@ -291,7 +291,7 @@ vuint16mf2_t test_vrsub_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrsub_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m1(op1, op2, vl); + return __riscv_vrsub_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m2( @@ -300,7 +300,7 @@ vuint16m1_t test_vrsub_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrsub_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m2(op1, op2, vl); + return __riscv_vrsub_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m4( @@ -309,7 +309,7 @@ vuint16m2_t test_vrsub_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrsub_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m4(op1, op2, vl); + return __riscv_vrsub_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m8( @@ -318,7 +318,7 @@ vuint16m4_t test_vrsub_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrsub_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m8(op1, op2, vl); + return __riscv_vrsub_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32mf2( @@ -327,7 +327,7 @@ vuint16m8_t test_vrsub_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrsub_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32mf2(op1, op2, vl); + return __riscv_vrsub_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m1( @@ -336,7 +336,7 @@ vuint32mf2_t test_vrsub_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrsub_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m1(op1, op2, vl); + return __riscv_vrsub_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m2( @@ -345,7 +345,7 @@ vuint32m1_t test_vrsub_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrsub_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m2(op1, op2, vl); + return __riscv_vrsub_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m4( @@ -354,7 +354,7 @@ vuint32m2_t test_vrsub_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrsub_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m4(op1, op2, vl); + return __riscv_vrsub_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m8( @@ -363,7 +363,7 @@ vuint32m4_t test_vrsub_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrsub_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m8(op1, op2, vl); + return __riscv_vrsub_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m1( @@ -372,7 +372,7 @@ vuint32m8_t test_vrsub_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrsub_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m1(op1, op2, vl); + return __riscv_vrsub_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m2( @@ -381,7 +381,7 @@ vuint64m1_t test_vrsub_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrsub_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m2(op1, op2, vl); + return __riscv_vrsub_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m4( @@ -390,7 +390,7 @@ vuint64m2_t test_vrsub_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrsub_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m4(op1, op2, vl); + return __riscv_vrsub_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m4_t test_vrsub_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrsub_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m8(op1, op2, vl); + return __riscv_vrsub_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vrsub_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrsub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf4_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vrsub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrsub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf2_m( @@ -426,7 +426,7 @@ vint8mf4_t test_vrsub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrsub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m1_m( @@ -435,7 +435,7 @@ vint8mf2_t test_vrsub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrsub_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m2_m( @@ -444,7 +444,7 @@ vint8m1_t test_vrsub_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrsub_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m4_m( @@ -453,7 +453,7 @@ vint8m2_t test_vrsub_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrsub_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m8_m( @@ -462,7 +462,7 @@ vint8m4_t test_vrsub_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrsub_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf4_m( @@ -471,7 +471,7 @@ vint8m8_t test_vrsub_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrsub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf2_m( @@ -480,7 +480,7 @@ vint16mf4_t test_vrsub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrsub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m1_m( @@ -489,7 +489,7 @@ vint16mf2_t test_vrsub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrsub_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m2_m( @@ -498,7 +498,7 @@ vint16m1_t test_vrsub_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrsub_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m4_m( @@ -507,7 +507,7 @@ vint16m2_t test_vrsub_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrsub_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m8_m( @@ -516,7 +516,7 @@ vint16m4_t test_vrsub_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrsub_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32mf2_m( @@ -525,7 +525,7 @@ vint16m8_t test_vrsub_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrsub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m1_m( @@ -534,7 +534,7 @@ vint32mf2_t test_vrsub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrsub_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m2_m( @@ -543,7 +543,7 @@ vint32m1_t test_vrsub_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrsub_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m4_m( @@ -552,7 +552,7 @@ vint32m2_t test_vrsub_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrsub_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m8_m( @@ -561,7 +561,7 @@ vint32m4_t test_vrsub_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrsub_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m1_m( @@ -570,7 +570,7 @@ vint32m8_t test_vrsub_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrsub_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m2_m( @@ -579,7 +579,7 @@ vint64m1_t test_vrsub_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrsub_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m4_m( @@ -588,7 +588,7 @@ vint64m2_t test_vrsub_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrsub_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m8_m( @@ -597,7 +597,7 @@ vint64m4_t test_vrsub_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrsub_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf8_m( @@ -606,7 +606,7 @@ vint64m8_t test_vrsub_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrsub_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf4_m( @@ -615,7 +615,7 @@ vuint8mf8_t test_vrsub_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrsub_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf2_m( @@ -624,7 +624,7 @@ vuint8mf4_t test_vrsub_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrsub_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m1_m( @@ -633,7 +633,7 @@ vuint8mf2_t test_vrsub_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrsub_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m2_m( @@ -642,7 +642,7 @@ vuint8m1_t test_vrsub_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrsub_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m4_m( @@ -651,7 +651,7 @@ vuint8m2_t test_vrsub_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrsub_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m8_m( @@ -660,7 +660,7 @@ vuint8m4_t test_vrsub_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrsub_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf4_m( @@ -669,7 +669,7 @@ vuint8m8_t test_vrsub_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrsub_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf2_m( @@ -678,7 +678,7 @@ vuint16mf4_t test_vrsub_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrsub_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m1_m( @@ -687,7 +687,7 @@ vuint16mf2_t test_vrsub_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrsub_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m2_m( @@ -696,7 +696,7 @@ vuint16m1_t test_vrsub_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrsub_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m4_m( @@ -705,7 +705,7 @@ vuint16m2_t test_vrsub_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrsub_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m8_m( @@ -714,7 +714,7 @@ vuint16m4_t test_vrsub_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrsub_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32mf2_m( @@ -723,7 +723,7 @@ vuint16m8_t test_vrsub_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrsub_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m1_m( @@ -732,7 +732,7 @@ vuint32mf2_t test_vrsub_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrsub_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m2_m( @@ -741,7 +741,7 @@ vuint32m1_t test_vrsub_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrsub_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m4_m( @@ -750,7 +750,7 @@ vuint32m2_t test_vrsub_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrsub_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m8_m( @@ -759,7 +759,7 @@ vuint32m4_t test_vrsub_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrsub_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m1_m( @@ -768,7 +768,7 @@ vuint32m8_t test_vrsub_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrsub_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m2_m( @@ -777,7 +777,7 @@ vuint64m1_t test_vrsub_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrsub_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m4_m( @@ -786,7 +786,7 @@ vuint64m2_t test_vrsub_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrsub_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m4_t test_vrsub_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrsub_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vrsub_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsadd.c index 616c91f4c045563aad8893d4104544fe63c91d07..9c34e4d9e55369ad05bd63491a0579b64b66f205 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsadd.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsadd_vv_i8mf8(op1, op2, vl); + return __riscv_vsadd_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vsadd_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf8(op1, op2, vl); + return __riscv_vsadd_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vsadd_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsadd_vv_i8mf4(op1, op2, vl); + return __riscv_vsadd_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vsadd_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf4(op1, op2, vl); + return __riscv_vsadd_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vsadd_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsadd_vv_i8mf2(op1, op2, vl); + return __riscv_vsadd_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vsadd_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf2(op1, op2, vl); + return __riscv_vsadd_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vsadd_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsadd_vv_i8m1(op1, op2, vl); + return __riscv_vsadd_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vsadd_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m1(op1, op2, vl); + return __riscv_vsadd_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vsadd_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsadd_vv_i8m2(op1, op2, vl); + return __riscv_vsadd_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vsadd_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m2(op1, op2, vl); + return __riscv_vsadd_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vsadd_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsadd_vv_i8m4(op1, op2, vl); + return __riscv_vsadd_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vsadd_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m4(op1, op2, vl); + return __riscv_vsadd_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vsadd_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsadd_vv_i8m8(op1, op2, vl); + return __riscv_vsadd_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vsadd_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m8(op1, op2, vl); + return __riscv_vsadd_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vsadd_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsadd_vv_i16mf4(op1, op2, vl); + return __riscv_vsadd_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vsadd_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf4(op1, op2, vl); + return __riscv_vsadd_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vsadd_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsadd_vv_i16mf2(op1, op2, vl); + return __riscv_vsadd_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vsadd_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf2(op1, op2, vl); + return __riscv_vsadd_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vsadd_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsadd_vv_i16m1(op1, op2, vl); + return __riscv_vsadd_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vsadd_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m1(op1, op2, vl); + return __riscv_vsadd_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vsadd_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsadd_vv_i16m2(op1, op2, vl); + return __riscv_vsadd_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vsadd_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m2(op1, op2, vl); + return __riscv_vsadd_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vsadd_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsadd_vv_i16m4(op1, op2, vl); + return __riscv_vsadd_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vsadd_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m4(op1, op2, vl); + return __riscv_vsadd_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vsadd_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsadd_vv_i16m8(op1, op2, vl); + return __riscv_vsadd_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vsadd_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m8(op1, op2, vl); + return __riscv_vsadd_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vsadd_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsadd_vv_i32mf2(op1, op2, vl); + return __riscv_vsadd_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vsadd_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32mf2(op1, op2, vl); + return __riscv_vsadd_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vsadd_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsadd_vv_i32m1(op1, op2, vl); + return __riscv_vsadd_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vsadd_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m1(op1, op2, vl); + return __riscv_vsadd_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vsadd_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsadd_vv_i32m2(op1, op2, vl); + return __riscv_vsadd_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vsadd_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m2(op1, op2, vl); + return __riscv_vsadd_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vsadd_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsadd_vv_i32m4(op1, op2, vl); + return __riscv_vsadd_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vsadd_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m4(op1, op2, vl); + return __riscv_vsadd_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vsadd_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsadd_vv_i32m8(op1, op2, vl); + return __riscv_vsadd_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vsadd_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m8(op1, op2, vl); + return __riscv_vsadd_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vsadd_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsadd_vv_i64m1(op1, op2, vl); + return __riscv_vsadd_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vsadd_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m1(op1, op2, vl); + return __riscv_vsadd_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vsadd_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsadd_vv_i64m2(op1, op2, vl); + return __riscv_vsadd_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vsadd_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m2(op1, op2, vl); + return __riscv_vsadd_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vsadd_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsadd_vv_i64m4(op1, op2, vl); + return __riscv_vsadd_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vsadd_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m4(op1, op2, vl); + return __riscv_vsadd_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vsadd_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsadd_vv_i64m8(op1, op2, vl); + return __riscv_vsadd_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vsadd_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m8(op1, op2, vl); + return __riscv_vsadd_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vsadd_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsadd_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vsadd_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vsadd_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsadd_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vsadd_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vsadd_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsadd_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vsadd_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vsadd_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsadd_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vsadd_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vsadd_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsadd_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vsadd_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vsadd_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsadd_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vsadd_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vsadd_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsadd_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vsadd_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vsadd_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsadd_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vsadd_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vsadd_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsadd_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vsadd_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vsadd_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsadd_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vsadd_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vsadd_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsadd_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vsadd_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vsadd_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsadd_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vsadd_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vsadd_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsadd_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vsadd_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vsadd_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsadd_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vsadd_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vsadd_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsadd_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vsadd_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vsadd_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsadd_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vsadd_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vsadd_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsadd_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vsadd_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vsadd_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsadd_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vsadd_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vsadd_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsadd_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vsadd_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vsadd_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsadd_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vsadd_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vsadd_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsadd_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vsadd_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vsadd_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsadd_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vsadd_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vsadd_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vsadd_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsaddu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsaddu.c index 5e548d5ca7d0b2f1ac873e80c9ae27f815d33ec3..f16db7d62e5e5e0310b2011651ac42c1a4a0246e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsaddu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsaddu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsaddu_vv_u8mf8(op1, op2, vl); + return __riscv_vsaddu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vsaddu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf8(op1, op2, vl); + return __riscv_vsaddu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vsaddu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsaddu_vv_u8mf4(op1, op2, vl); + return __riscv_vsaddu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vsaddu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf4(op1, op2, vl); + return __riscv_vsaddu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vsaddu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsaddu_vv_u8mf2(op1, op2, vl); + return __riscv_vsaddu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vsaddu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf2(op1, op2, vl); + return __riscv_vsaddu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vsaddu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsaddu_vv_u8m1(op1, op2, vl); + return __riscv_vsaddu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vsaddu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m1(op1, op2, vl); + return __riscv_vsaddu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vsaddu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsaddu_vv_u8m2(op1, op2, vl); + return __riscv_vsaddu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vsaddu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m2(op1, op2, vl); + return __riscv_vsaddu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vsaddu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsaddu_vv_u8m4(op1, op2, vl); + return __riscv_vsaddu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vsaddu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m4(op1, op2, vl); + return __riscv_vsaddu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vsaddu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsaddu_vv_u8m8(op1, op2, vl); + return __riscv_vsaddu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vsaddu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m8(op1, op2, vl); + return __riscv_vsaddu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vsaddu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsaddu_vv_u16mf4(op1, op2, vl); + return __riscv_vsaddu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vsaddu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf4(op1, op2, vl); + return __riscv_vsaddu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vsaddu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsaddu_vv_u16mf2(op1, op2, vl); + return __riscv_vsaddu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vsaddu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf2(op1, op2, vl); + return __riscv_vsaddu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vsaddu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsaddu_vv_u16m1(op1, op2, vl); + return __riscv_vsaddu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vsaddu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m1(op1, op2, vl); + return __riscv_vsaddu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vsaddu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsaddu_vv_u16m2(op1, op2, vl); + return __riscv_vsaddu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vsaddu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m2(op1, op2, vl); + return __riscv_vsaddu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vsaddu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsaddu_vv_u16m4(op1, op2, vl); + return __riscv_vsaddu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vsaddu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m4(op1, op2, vl); + return __riscv_vsaddu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vsaddu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsaddu_vv_u16m8(op1, op2, vl); + return __riscv_vsaddu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vsaddu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m8(op1, op2, vl); + return __riscv_vsaddu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vsaddu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsaddu_vv_u32mf2(op1, op2, vl); + return __riscv_vsaddu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vsaddu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32mf2(op1, op2, vl); + return __riscv_vsaddu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vsaddu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsaddu_vv_u32m1(op1, op2, vl); + return __riscv_vsaddu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vsaddu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m1(op1, op2, vl); + return __riscv_vsaddu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vsaddu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsaddu_vv_u32m2(op1, op2, vl); + return __riscv_vsaddu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vsaddu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m2(op1, op2, vl); + return __riscv_vsaddu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vsaddu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsaddu_vv_u32m4(op1, op2, vl); + return __riscv_vsaddu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vsaddu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m4(op1, op2, vl); + return __riscv_vsaddu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vsaddu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsaddu_vv_u32m8(op1, op2, vl); + return __riscv_vsaddu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vsaddu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m8(op1, op2, vl); + return __riscv_vsaddu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vsaddu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsaddu_vv_u64m1(op1, op2, vl); + return __riscv_vsaddu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vsaddu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m1(op1, op2, vl); + return __riscv_vsaddu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vsaddu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsaddu_vv_u64m2(op1, op2, vl); + return __riscv_vsaddu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vsaddu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m2(op1, op2, vl); + return __riscv_vsaddu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vsaddu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsaddu_vv_u64m4(op1, op2, vl); + return __riscv_vsaddu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vsaddu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m4(op1, op2, vl); + return __riscv_vsaddu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vsaddu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsaddu_vv_u64m8(op1, op2, vl); + return __riscv_vsaddu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vsaddu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m8(op1, op2, vl); + return __riscv_vsaddu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vsaddu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsaddu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsaddu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsaddu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsaddu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsaddu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsaddu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsaddu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsaddu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsaddu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsaddu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vsaddu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vsaddu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsaddu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vsaddu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vsaddu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsaddu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vsaddu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vsaddu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsaddu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vsaddu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vsaddu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsaddu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsaddu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsaddu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsaddu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsaddu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsaddu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsaddu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vsaddu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vsaddu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsaddu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vsaddu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vsaddu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsaddu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vsaddu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vsaddu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsaddu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vsaddu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vsaddu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsaddu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsaddu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsaddu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsaddu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vsaddu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vsaddu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsaddu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vsaddu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vsaddu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsaddu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vsaddu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vsaddu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsaddu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vsaddu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vsaddu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsaddu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vsaddu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vsaddu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsaddu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vsaddu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vsaddu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsaddu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vsaddu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vsaddu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsaddu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vsaddu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vsaddu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsbc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsbc.c index 36321d178f5bb6e12414b9ad747450b1dbee25a2..bd94a109e0574faf531e81aea31b9504af4741ab 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsbc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsbc.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsbc_vvm_i8mf8(vint8mf8_t op1, vint8mf8_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_i8mf8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8mf8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vsbc_vvm_i8mf8(vint8mf8_t op1, vint8mf8_t op2, vbool64_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsbc_vxm_i8mf8(vint8mf8_t op1, int8_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_i8mf8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8mf8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vsbc_vxm_i8mf8(vint8mf8_t op1, int8_t op2, vbool64_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsbc_vvm_i8mf4(vint8mf4_t op1, vint8mf4_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_i8mf4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8mf4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vsbc_vvm_i8mf4(vint8mf4_t op1, vint8mf4_t op2, vbool32_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsbc_vxm_i8mf4(vint8mf4_t op1, int8_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_i8mf4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8mf4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vsbc_vxm_i8mf4(vint8mf4_t op1, int8_t op2, vbool32_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsbc_vvm_i8mf2(vint8mf2_t op1, vint8mf2_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_i8mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vsbc_vvm_i8mf2(vint8mf2_t op1, vint8mf2_t op2, vbool16_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsbc_vxm_i8mf2(vint8mf2_t op1, int8_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_i8mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vsbc_vxm_i8mf2(vint8mf2_t op1, int8_t op2, vbool16_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsbc_vvm_i8m1(vint8m1_t op1, vint8m1_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_i8m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vsbc_vvm_i8m1(vint8m1_t op1, vint8m1_t op2, vbool8_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsbc_vxm_i8m1(vint8m1_t op1, int8_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_i8m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vsbc_vxm_i8m1(vint8m1_t op1, int8_t op2, vbool8_t borrowin, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsbc_vvm_i8m2(vint8m2_t op1, vint8m2_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_i8m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vsbc_vvm_i8m2(vint8m2_t op1, vint8m2_t op2, vbool4_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsbc_vxm_i8m2(vint8m2_t op1, int8_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_i8m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vsbc_vxm_i8m2(vint8m2_t op1, int8_t op2, vbool4_t borrowin, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsbc_vvm_i8m4(vint8m4_t op1, vint8m4_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vvm_i8m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vsbc_vvm_i8m4(vint8m4_t op1, vint8m4_t op2, vbool2_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsbc_vxm_i8m4(vint8m4_t op1, int8_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vxm_i8m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vsbc_vxm_i8m4(vint8m4_t op1, int8_t op2, vbool2_t borrowin, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsbc_vvm_i8m8(vint8m8_t op1, vint8m8_t op2, vbool1_t borrowin, size_t vl) { - return vsbc_vvm_i8m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vsbc_vvm_i8m8(vint8m8_t op1, vint8m8_t op2, vbool1_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsbc_vxm_i8m8(vint8m8_t op1, int8_t op2, vbool1_t borrowin, size_t vl) { - return vsbc_vxm_i8m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vsbc_vxm_i8m8(vint8m8_t op1, int8_t op2, vbool1_t borrowin, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsbc_vvm_i16mf4(vint16mf4_t op1, vint16mf4_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_i16mf4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16mf4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vsbc_vvm_i16mf4(vint16mf4_t op1, vint16mf4_t op2, vbool64_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsbc_vxm_i16mf4(vint16mf4_t op1, int16_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_i16mf4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16mf4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vsbc_vxm_i16mf4(vint16mf4_t op1, int16_t op2, vbool64_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsbc_vvm_i16mf2(vint16mf2_t op1, vint16mf2_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_i16mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vsbc_vvm_i16mf2(vint16mf2_t op1, vint16mf2_t op2, vbool32_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsbc_vxm_i16mf2(vint16mf2_t op1, int16_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_i16mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vsbc_vxm_i16mf2(vint16mf2_t op1, int16_t op2, vbool32_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsbc_vvm_i16m1(vint16m1_t op1, vint16m1_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_i16m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vsbc_vvm_i16m1(vint16m1_t op1, vint16m1_t op2, vbool16_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsbc_vxm_i16m1(vint16m1_t op1, int16_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_i16m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vsbc_vxm_i16m1(vint16m1_t op1, int16_t op2, vbool16_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsbc_vvm_i16m2(vint16m2_t op1, vint16m2_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_i16m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vsbc_vvm_i16m2(vint16m2_t op1, vint16m2_t op2, vbool8_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsbc_vxm_i16m2(vint16m2_t op1, int16_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_i16m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vsbc_vxm_i16m2(vint16m2_t op1, int16_t op2, vbool8_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsbc_vvm_i16m4(vint16m4_t op1, vint16m4_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_i16m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vsbc_vvm_i16m4(vint16m4_t op1, vint16m4_t op2, vbool4_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsbc_vxm_i16m4(vint16m4_t op1, int16_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_i16m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vsbc_vxm_i16m4(vint16m4_t op1, int16_t op2, vbool4_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsbc_vvm_i16m8(vint16m8_t op1, vint16m8_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vvm_i16m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vsbc_vvm_i16m8(vint16m8_t op1, vint16m8_t op2, vbool2_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsbc_vxm_i16m8(vint16m8_t op1, int16_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vxm_i16m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vsbc_vxm_i16m8(vint16m8_t op1, int16_t op2, vbool2_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsbc_vvm_i32mf2(vint32mf2_t op1, vint32mf2_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_i32mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vsbc_vvm_i32mf2(vint32mf2_t op1, vint32mf2_t op2, vbool64_t bor // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsbc_vxm_i32mf2(vint32mf2_t op1, int32_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_i32mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vsbc_vxm_i32mf2(vint32mf2_t op1, int32_t op2, vbool64_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsbc_vvm_i32m1(vint32m1_t op1, vint32m1_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_i32m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vsbc_vvm_i32m1(vint32m1_t op1, vint32m1_t op2, vbool32_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsbc_vxm_i32m1(vint32m1_t op1, int32_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_i32m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vsbc_vxm_i32m1(vint32m1_t op1, int32_t op2, vbool32_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsbc_vvm_i32m2(vint32m2_t op1, vint32m2_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_i32m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vsbc_vvm_i32m2(vint32m2_t op1, vint32m2_t op2, vbool16_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsbc_vxm_i32m2(vint32m2_t op1, int32_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_i32m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vsbc_vxm_i32m2(vint32m2_t op1, int32_t op2, vbool16_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsbc_vvm_i32m4(vint32m4_t op1, vint32m4_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_i32m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vsbc_vvm_i32m4(vint32m4_t op1, vint32m4_t op2, vbool8_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsbc_vxm_i32m4(vint32m4_t op1, int32_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_i32m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vsbc_vxm_i32m4(vint32m4_t op1, int32_t op2, vbool8_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsbc_vvm_i32m8(vint32m8_t op1, vint32m8_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_i32m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vsbc_vvm_i32m8(vint32m8_t op1, vint32m8_t op2, vbool4_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsbc_vxm_i32m8(vint32m8_t op1, int32_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_i32m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vsbc_vxm_i32m8(vint32m8_t op1, int32_t op2, vbool4_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsbc_vvm_i64m1(vint64m1_t op1, vint64m1_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_i64m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i64m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vsbc_vvm_i64m1(vint64m1_t op1, vint64m1_t op2, vbool64_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsbc_vxm_i64m1(vint64m1_t op1, int64_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_i64m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i64m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vsbc_vxm_i64m1(vint64m1_t op1, int64_t op2, vbool64_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsbc_vvm_i64m2(vint64m2_t op1, vint64m2_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_i64m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i64m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vsbc_vvm_i64m2(vint64m2_t op1, vint64m2_t op2, vbool32_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsbc_vxm_i64m2(vint64m2_t op1, int64_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_i64m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i64m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vsbc_vxm_i64m2(vint64m2_t op1, int64_t op2, vbool32_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsbc_vvm_i64m4(vint64m4_t op1, vint64m4_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_i64m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i64m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vsbc_vvm_i64m4(vint64m4_t op1, vint64m4_t op2, vbool16_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsbc_vxm_i64m4(vint64m4_t op1, int64_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_i64m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i64m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vsbc_vxm_i64m4(vint64m4_t op1, int64_t op2, vbool16_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsbc_vvm_i64m8(vint64m8_t op1, vint64m8_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_i64m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i64m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vsbc_vvm_i64m8(vint64m8_t op1, vint64m8_t op2, vbool8_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsbc_vxm_i64m8(vint64m8_t op1, int64_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_i64m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i64m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vsbc_vxm_i64m8(vint64m8_t op1, int64_t op2, vbool8_t borrowin, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsbc_vvm_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_u8mf8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8mf8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsbc_vvm_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsbc_vxm_u8mf8(vuint8mf8_t op1, uint8_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_u8mf8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8mf8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsbc_vxm_u8mf8(vuint8mf8_t op1, uint8_t op2, vbool64_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsbc_vvm_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_u8mf4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8mf4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsbc_vvm_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsbc_vxm_u8mf4(vuint8mf4_t op1, uint8_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_u8mf4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8mf4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsbc_vxm_u8mf4(vuint8mf4_t op1, uint8_t op2, vbool32_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsbc_vvm_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_u8mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsbc_vvm_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsbc_vxm_u8mf2(vuint8mf2_t op1, uint8_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_u8mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsbc_vxm_u8mf2(vuint8mf2_t op1, uint8_t op2, vbool16_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsbc_vvm_u8m1(vuint8m1_t op1, vuint8m1_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_u8m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vsbc_vvm_u8m1(vuint8m1_t op1, vuint8m1_t op2, vbool8_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsbc_vxm_u8m1(vuint8m1_t op1, uint8_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_u8m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vsbc_vxm_u8m1(vuint8m1_t op1, uint8_t op2, vbool8_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsbc_vvm_u8m2(vuint8m2_t op1, vuint8m2_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_u8m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vsbc_vvm_u8m2(vuint8m2_t op1, vuint8m2_t op2, vbool4_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsbc_vxm_u8m2(vuint8m2_t op1, uint8_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_u8m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vsbc_vxm_u8m2(vuint8m2_t op1, uint8_t op2, vbool4_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsbc_vvm_u8m4(vuint8m4_t op1, vuint8m4_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vvm_u8m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vsbc_vvm_u8m4(vuint8m4_t op1, vuint8m4_t op2, vbool2_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsbc_vxm_u8m4(vuint8m4_t op1, uint8_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vxm_u8m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vsbc_vxm_u8m4(vuint8m4_t op1, uint8_t op2, vbool2_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsbc_vvm_u8m8(vuint8m8_t op1, vuint8m8_t op2, vbool1_t borrowin, size_t vl) { - return vsbc_vvm_u8m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vsbc_vvm_u8m8(vuint8m8_t op1, vuint8m8_t op2, vbool1_t borrowin, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsbc_vxm_u8m8(vuint8m8_t op1, uint8_t op2, vbool1_t borrowin, size_t vl) { - return vsbc_vxm_u8m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vsbc_vxm_u8m8(vuint8m8_t op1, uint8_t op2, vbool1_t borrowin, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsbc_vvm_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_u16mf4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16mf4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsbc_vvm_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsbc_vxm_u16mf4(vuint16mf4_t op1, uint16_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_u16mf4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16mf4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsbc_vxm_u16mf4(vuint16mf4_t op1, uint16_t op2, vbool64_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsbc_vvm_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_u16mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsbc_vvm_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsbc_vxm_u16mf2(vuint16mf2_t op1, uint16_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_u16mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsbc_vxm_u16mf2(vuint16mf2_t op1, uint16_t op2, vbool32_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsbc_vvm_u16m1(vuint16m1_t op1, vuint16m1_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_u16m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vsbc_vvm_u16m1(vuint16m1_t op1, vuint16m1_t op2, vbool16_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsbc_vxm_u16m1(vuint16m1_t op1, uint16_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_u16m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vsbc_vxm_u16m1(vuint16m1_t op1, uint16_t op2, vbool16_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsbc_vvm_u16m2(vuint16m2_t op1, vuint16m2_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_u16m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vsbc_vvm_u16m2(vuint16m2_t op1, vuint16m2_t op2, vbool8_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsbc_vxm_u16m2(vuint16m2_t op1, uint16_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_u16m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vsbc_vxm_u16m2(vuint16m2_t op1, uint16_t op2, vbool8_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsbc_vvm_u16m4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_u16m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vsbc_vvm_u16m4(vuint16m4_t op1, vuint16m4_t op2, vbool4_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsbc_vxm_u16m4(vuint16m4_t op1, uint16_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_u16m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vsbc_vxm_u16m4(vuint16m4_t op1, uint16_t op2, vbool4_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsbc_vvm_u16m8(vuint16m8_t op1, vuint16m8_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vvm_u16m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vsbc_vvm_u16m8(vuint16m8_t op1, vuint16m8_t op2, vbool2_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsbc_vxm_u16m8(vuint16m8_t op1, uint16_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vxm_u16m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vsbc_vxm_u16m8(vuint16m8_t op1, uint16_t op2, vbool2_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsbc_vvm_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_u32mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsbc_vvm_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsbc_vxm_u32mf2(vuint32mf2_t op1, uint32_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_u32mf2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32mf2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsbc_vxm_u32mf2(vuint32mf2_t op1, uint32_t op2, vbool64_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsbc_vvm_u32m1(vuint32m1_t op1, vuint32m1_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_u32m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vsbc_vvm_u32m1(vuint32m1_t op1, vuint32m1_t op2, vbool32_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsbc_vxm_u32m1(vuint32m1_t op1, uint32_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_u32m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vsbc_vxm_u32m1(vuint32m1_t op1, uint32_t op2, vbool32_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsbc_vvm_u32m2(vuint32m2_t op1, vuint32m2_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_u32m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vsbc_vvm_u32m2(vuint32m2_t op1, vuint32m2_t op2, vbool16_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsbc_vxm_u32m2(vuint32m2_t op1, uint32_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_u32m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vsbc_vxm_u32m2(vuint32m2_t op1, uint32_t op2, vbool16_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsbc_vvm_u32m4(vuint32m4_t op1, vuint32m4_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_u32m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vsbc_vvm_u32m4(vuint32m4_t op1, vuint32m4_t op2, vbool8_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsbc_vxm_u32m4(vuint32m4_t op1, uint32_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_u32m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vsbc_vxm_u32m4(vuint32m4_t op1, uint32_t op2, vbool8_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsbc_vvm_u32m8(vuint32m8_t op1, vuint32m8_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_u32m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vsbc_vvm_u32m8(vuint32m8_t op1, vuint32m8_t op2, vbool4_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsbc_vxm_u32m8(vuint32m8_t op1, uint32_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_u32m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vsbc_vxm_u32m8(vuint32m8_t op1, uint32_t op2, vbool4_t borrowin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsbc_vvm_u64m1(vuint64m1_t op1, vuint64m1_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_u64m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u64m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vsbc_vvm_u64m1(vuint64m1_t op1, vuint64m1_t op2, vbool64_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsbc_vxm_u64m1(vuint64m1_t op1, uint64_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_u64m1(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u64m1(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vsbc_vxm_u64m1(vuint64m1_t op1, uint64_t op2, vbool64_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsbc_vvm_u64m2(vuint64m2_t op1, vuint64m2_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_u64m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u64m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vsbc_vvm_u64m2(vuint64m2_t op1, vuint64m2_t op2, vbool32_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsbc_vxm_u64m2(vuint64m2_t op1, uint64_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_u64m2(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u64m2(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vsbc_vxm_u64m2(vuint64m2_t op1, uint64_t op2, vbool32_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsbc_vvm_u64m4(vuint64m4_t op1, vuint64m4_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_u64m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u64m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vsbc_vvm_u64m4(vuint64m4_t op1, vuint64m4_t op2, vbool16_t borr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsbc_vxm_u64m4(vuint64m4_t op1, uint64_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_u64m4(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u64m4(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vsbc_vxm_u64m4(vuint64m4_t op1, uint64_t op2, vbool16_t borrowi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsbc_vvm_u64m8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_u64m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u64m8(op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u64m8( @@ -795,6 +795,6 @@ vuint64m8_t test_vsbc_vvm_u64m8(vuint64m8_t op1, vuint64m8_t op2, vbool8_t borro // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsbc_vxm_u64m8(vuint64m8_t op1, uint64_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_u64m8(op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u64m8(op1, op2, borrowin, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse16.c index 6b299f829a6b031eeab8a40f01a8b310d6992801..502e44037f4d2f8b7095d94dfbbaca9fb2de527c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16mf4(_Float16 *base, vfloat16mf4_t value, size_t vl) { - return vse16_v_f16mf4(base, value, vl); + return __riscv_vse16_v_f16mf4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vse16_v_f16mf4(_Float16 *base, vfloat16mf4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16mf2(_Float16 *base, vfloat16mf2_t value, size_t vl) { - return vse16_v_f16mf2(base, value, vl); + return __riscv_vse16_v_f16mf2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16m1( @@ -31,7 +31,7 @@ void test_vse16_v_f16mf2(_Float16 *base, vfloat16mf2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16m1(_Float16 *base, vfloat16m1_t value, size_t vl) { - return vse16_v_f16m1(base, value, vl); + return __riscv_vse16_v_f16m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16m2( @@ -40,7 +40,7 @@ void test_vse16_v_f16m1(_Float16 *base, vfloat16m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16m2(_Float16 *base, vfloat16m2_t value, size_t vl) { - return vse16_v_f16m2(base, value, vl); + return __riscv_vse16_v_f16m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16m4( @@ -49,7 +49,7 @@ void test_vse16_v_f16m2(_Float16 *base, vfloat16m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16m4(_Float16 *base, vfloat16m4_t value, size_t vl) { - return vse16_v_f16m4(base, value, vl); + return __riscv_vse16_v_f16m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16m8( @@ -58,7 +58,7 @@ void test_vse16_v_f16m4(_Float16 *base, vfloat16m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16m8(_Float16 *base, vfloat16m8_t value, size_t vl) { - return vse16_v_f16m8(base, value, vl); + return __riscv_vse16_v_f16m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16mf4( @@ -67,7 +67,7 @@ void test_vse16_v_f16m8(_Float16 *base, vfloat16m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16mf4(int16_t *base, vint16mf4_t value, size_t vl) { - return vse16_v_i16mf4(base, value, vl); + return __riscv_vse16_v_i16mf4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16mf2( @@ -76,7 +76,7 @@ void test_vse16_v_i16mf4(int16_t *base, vint16mf4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16mf2(int16_t *base, vint16mf2_t value, size_t vl) { - return vse16_v_i16mf2(base, value, vl); + return __riscv_vse16_v_i16mf2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16m1( @@ -85,7 +85,7 @@ void test_vse16_v_i16mf2(int16_t *base, vint16mf2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16m1(int16_t *base, vint16m1_t value, size_t vl) { - return vse16_v_i16m1(base, value, vl); + return __riscv_vse16_v_i16m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16m2( @@ -94,7 +94,7 @@ void test_vse16_v_i16m1(int16_t *base, vint16m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16m2(int16_t *base, vint16m2_t value, size_t vl) { - return vse16_v_i16m2(base, value, vl); + return __riscv_vse16_v_i16m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16m4( @@ -103,7 +103,7 @@ void test_vse16_v_i16m2(int16_t *base, vint16m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16m4(int16_t *base, vint16m4_t value, size_t vl) { - return vse16_v_i16m4(base, value, vl); + return __riscv_vse16_v_i16m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16m8( @@ -112,7 +112,7 @@ void test_vse16_v_i16m4(int16_t *base, vint16m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16m8(int16_t *base, vint16m8_t value, size_t vl) { - return vse16_v_i16m8(base, value, vl); + return __riscv_vse16_v_i16m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16mf4( @@ -121,7 +121,7 @@ void test_vse16_v_i16m8(int16_t *base, vint16m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16mf4(uint16_t *base, vuint16mf4_t value, size_t vl) { - return vse16_v_u16mf4(base, value, vl); + return __riscv_vse16_v_u16mf4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16mf2( @@ -130,7 +130,7 @@ void test_vse16_v_u16mf4(uint16_t *base, vuint16mf4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16mf2(uint16_t *base, vuint16mf2_t value, size_t vl) { - return vse16_v_u16mf2(base, value, vl); + return __riscv_vse16_v_u16mf2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16m1( @@ -139,7 +139,7 @@ void test_vse16_v_u16mf2(uint16_t *base, vuint16mf2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16m1(uint16_t *base, vuint16m1_t value, size_t vl) { - return vse16_v_u16m1(base, value, vl); + return __riscv_vse16_v_u16m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16m2( @@ -148,7 +148,7 @@ void test_vse16_v_u16m1(uint16_t *base, vuint16m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16m2(uint16_t *base, vuint16m2_t value, size_t vl) { - return vse16_v_u16m2(base, value, vl); + return __riscv_vse16_v_u16m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16m4( @@ -157,7 +157,7 @@ void test_vse16_v_u16m2(uint16_t *base, vuint16m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16m4(uint16_t *base, vuint16m4_t value, size_t vl) { - return vse16_v_u16m4(base, value, vl); + return __riscv_vse16_v_u16m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16m8( @@ -166,7 +166,7 @@ void test_vse16_v_u16m4(uint16_t *base, vuint16m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16m8(uint16_t *base, vuint16m8_t value, size_t vl) { - return vse16_v_u16m8(base, value, vl); + return __riscv_vse16_v_u16m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16mf4_m( @@ -175,7 +175,7 @@ void test_vse16_v_u16m8(uint16_t *base, vuint16m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t value, size_t vl) { - return vse16_v_f16mf4_m(mask, base, value, vl); + return __riscv_vse16_v_f16mf4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16mf2_m( @@ -184,7 +184,7 @@ void test_vse16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t value, size_t vl) { - return vse16_v_f16mf2_m(mask, base, value, vl); + return __riscv_vse16_v_f16mf2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16m1_m( @@ -193,7 +193,7 @@ void test_vse16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t value, size_t vl) { - return vse16_v_f16m1_m(mask, base, value, vl); + return __riscv_vse16_v_f16m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16m2_m( @@ -202,7 +202,7 @@ void test_vse16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t value, si // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16m2_m(vbool8_t mask, _Float16 *base, vfloat16m2_t value, size_t vl) { - return vse16_v_f16m2_m(mask, base, value, vl); + return __riscv_vse16_v_f16m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16m4_m( @@ -211,7 +211,7 @@ void test_vse16_v_f16m2_m(vbool8_t mask, _Float16 *base, vfloat16m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16m4_m(vbool4_t mask, _Float16 *base, vfloat16m4_t value, size_t vl) { - return vse16_v_f16m4_m(mask, base, value, vl); + return __riscv_vse16_v_f16m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_f16m8_m( @@ -220,7 +220,7 @@ void test_vse16_v_f16m4_m(vbool4_t mask, _Float16 *base, vfloat16m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse16_v_f16m8_m(vbool2_t mask, _Float16 *base, vfloat16m8_t value, size_t vl) { - return vse16_v_f16m8_m(mask, base, value, vl); + return __riscv_vse16_v_f16m8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16mf4_m( @@ -229,7 +229,7 @@ void test_vse16_v_f16m8_m(vbool2_t mask, _Float16 *base, vfloat16m8_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t value, size_t vl) { - return vse16_v_i16mf4_m(mask, base, value, vl); + return __riscv_vse16_v_i16mf4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16mf2_m( @@ -238,7 +238,7 @@ void test_vse16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t value, size_t vl) { - return vse16_v_i16mf2_m(mask, base, value, vl); + return __riscv_vse16_v_i16mf2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16m1_m( @@ -247,7 +247,7 @@ void test_vse16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t value, size_t vl) { - return vse16_v_i16m1_m(mask, base, value, vl); + return __riscv_vse16_v_i16m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16m2_m( @@ -256,7 +256,7 @@ void test_vse16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t value, size_t vl) { - return vse16_v_i16m2_m(mask, base, value, vl); + return __riscv_vse16_v_i16m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16m4_m( @@ -265,7 +265,7 @@ void test_vse16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16m4_m(vbool4_t mask, int16_t *base, vint16m4_t value, size_t vl) { - return vse16_v_i16m4_m(mask, base, value, vl); + return __riscv_vse16_v_i16m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_i16m8_m( @@ -274,7 +274,7 @@ void test_vse16_v_i16m4_m(vbool4_t mask, int16_t *base, vint16m4_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse16_v_i16m8_m(vbool2_t mask, int16_t *base, vint16m8_t value, size_t vl) { - return vse16_v_i16m8_m(mask, base, value, vl); + return __riscv_vse16_v_i16m8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16mf4_m( @@ -283,7 +283,7 @@ void test_vse16_v_i16m8_m(vbool2_t mask, int16_t *base, vint16m8_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t value, size_t vl) { - return vse16_v_u16mf4_m(mask, base, value, vl); + return __riscv_vse16_v_u16mf4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16mf2_m( @@ -292,7 +292,7 @@ void test_vse16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t value, s // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t value, size_t vl) { - return vse16_v_u16mf2_m(mask, base, value, vl); + return __riscv_vse16_v_u16mf2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16m1_m( @@ -301,7 +301,7 @@ void test_vse16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t value, size_t vl) { - return vse16_v_u16m1_m(mask, base, value, vl); + return __riscv_vse16_v_u16m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16m2_m( @@ -310,7 +310,7 @@ void test_vse16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t value, size_t vl) { - return vse16_v_u16m2_m(mask, base, value, vl); + return __riscv_vse16_v_u16m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16m4_m( @@ -319,7 +319,7 @@ void test_vse16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t value, size // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t value, size_t vl) { - return vse16_v_u16m4_m(mask, base, value, vl); + return __riscv_vse16_v_u16m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse16_v_u16m8_m( @@ -328,6 +328,6 @@ void test_vse16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t value, size // CHECK-RV64-NEXT: ret void // void test_vse16_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint16m8_t value, size_t vl) { - return vse16_v_u16m8_m(mask, base, value, vl); + return __riscv_vse16_v_u16m8_m(mask, base, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse32.c index 1af53830a96c98ec4b91a6d68672c66e439047ba..2f25b4da5c159823385bd6117dd0245d99e616b9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32mf2(float *base, vfloat32mf2_t value, size_t vl) { - return vse32_v_f32mf2(base, value, vl); + return __riscv_vse32_v_f32mf2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32m1( @@ -22,7 +22,7 @@ void test_vse32_v_f32mf2(float *base, vfloat32mf2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32m1(float *base, vfloat32m1_t value, size_t vl) { - return vse32_v_f32m1(base, value, vl); + return __riscv_vse32_v_f32m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32m2( @@ -31,7 +31,7 @@ void test_vse32_v_f32m1(float *base, vfloat32m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32m2(float *base, vfloat32m2_t value, size_t vl) { - return vse32_v_f32m2(base, value, vl); + return __riscv_vse32_v_f32m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32m4( @@ -40,7 +40,7 @@ void test_vse32_v_f32m2(float *base, vfloat32m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32m4(float *base, vfloat32m4_t value, size_t vl) { - return vse32_v_f32m4(base, value, vl); + return __riscv_vse32_v_f32m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32m8( @@ -49,7 +49,7 @@ void test_vse32_v_f32m4(float *base, vfloat32m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32m8(float *base, vfloat32m8_t value, size_t vl) { - return vse32_v_f32m8(base, value, vl); + return __riscv_vse32_v_f32m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32mf2( @@ -58,7 +58,7 @@ void test_vse32_v_f32m8(float *base, vfloat32m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32mf2(int32_t *base, vint32mf2_t value, size_t vl) { - return vse32_v_i32mf2(base, value, vl); + return __riscv_vse32_v_i32mf2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32m1( @@ -67,7 +67,7 @@ void test_vse32_v_i32mf2(int32_t *base, vint32mf2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32m1(int32_t *base, vint32m1_t value, size_t vl) { - return vse32_v_i32m1(base, value, vl); + return __riscv_vse32_v_i32m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32m2( @@ -76,7 +76,7 @@ void test_vse32_v_i32m1(int32_t *base, vint32m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32m2(int32_t *base, vint32m2_t value, size_t vl) { - return vse32_v_i32m2(base, value, vl); + return __riscv_vse32_v_i32m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32m4( @@ -85,7 +85,7 @@ void test_vse32_v_i32m2(int32_t *base, vint32m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32m4(int32_t *base, vint32m4_t value, size_t vl) { - return vse32_v_i32m4(base, value, vl); + return __riscv_vse32_v_i32m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32m8( @@ -94,7 +94,7 @@ void test_vse32_v_i32m4(int32_t *base, vint32m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32m8(int32_t *base, vint32m8_t value, size_t vl) { - return vse32_v_i32m8(base, value, vl); + return __riscv_vse32_v_i32m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32mf2( @@ -103,7 +103,7 @@ void test_vse32_v_i32m8(int32_t *base, vint32m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32mf2(uint32_t *base, vuint32mf2_t value, size_t vl) { - return vse32_v_u32mf2(base, value, vl); + return __riscv_vse32_v_u32mf2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32m1( @@ -112,7 +112,7 @@ void test_vse32_v_u32mf2(uint32_t *base, vuint32mf2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32m1(uint32_t *base, vuint32m1_t value, size_t vl) { - return vse32_v_u32m1(base, value, vl); + return __riscv_vse32_v_u32m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32m2( @@ -121,7 +121,7 @@ void test_vse32_v_u32m1(uint32_t *base, vuint32m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32m2(uint32_t *base, vuint32m2_t value, size_t vl) { - return vse32_v_u32m2(base, value, vl); + return __riscv_vse32_v_u32m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32m4( @@ -130,7 +130,7 @@ void test_vse32_v_u32m2(uint32_t *base, vuint32m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32m4(uint32_t *base, vuint32m4_t value, size_t vl) { - return vse32_v_u32m4(base, value, vl); + return __riscv_vse32_v_u32m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32m8( @@ -139,7 +139,7 @@ void test_vse32_v_u32m4(uint32_t *base, vuint32m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32m8(uint32_t *base, vuint32m8_t value, size_t vl) { - return vse32_v_u32m8(base, value, vl); + return __riscv_vse32_v_u32m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32mf2_m( @@ -148,7 +148,7 @@ void test_vse32_v_u32m8(uint32_t *base, vuint32m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t value, size_t vl) { - return vse32_v_f32mf2_m(mask, base, value, vl); + return __riscv_vse32_v_f32mf2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32m1_m( @@ -157,7 +157,7 @@ void test_vse32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t value, size_t vl) { - return vse32_v_f32m1_m(mask, base, value, vl); + return __riscv_vse32_v_f32m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32m2_m( @@ -166,7 +166,7 @@ void test_vse32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t value, size_t vl) { - return vse32_v_f32m2_m(mask, base, value, vl); + return __riscv_vse32_v_f32m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32m4_m( @@ -175,7 +175,7 @@ void test_vse32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32m4_m(vbool8_t mask, float *base, vfloat32m4_t value, size_t vl) { - return vse32_v_f32m4_m(mask, base, value, vl); + return __riscv_vse32_v_f32m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_f32m8_m( @@ -184,7 +184,7 @@ void test_vse32_v_f32m4_m(vbool8_t mask, float *base, vfloat32m4_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse32_v_f32m8_m(vbool4_t mask, float *base, vfloat32m8_t value, size_t vl) { - return vse32_v_f32m8_m(mask, base, value, vl); + return __riscv_vse32_v_f32m8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32mf2_m( @@ -193,7 +193,7 @@ void test_vse32_v_f32m8_m(vbool4_t mask, float *base, vfloat32m8_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t value, size_t vl) { - return vse32_v_i32mf2_m(mask, base, value, vl); + return __riscv_vse32_v_i32mf2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32m1_m( @@ -202,7 +202,7 @@ void test_vse32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t value, size_t vl) { - return vse32_v_i32m1_m(mask, base, value, vl); + return __riscv_vse32_v_i32m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32m2_m( @@ -211,7 +211,7 @@ void test_vse32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t value, size_t vl) { - return vse32_v_i32m2_m(mask, base, value, vl); + return __riscv_vse32_v_i32m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32m4_m( @@ -220,7 +220,7 @@ void test_vse32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32m4_m(vbool8_t mask, int32_t *base, vint32m4_t value, size_t vl) { - return vse32_v_i32m4_m(mask, base, value, vl); + return __riscv_vse32_v_i32m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_i32m8_m( @@ -229,7 +229,7 @@ void test_vse32_v_i32m4_m(vbool8_t mask, int32_t *base, vint32m4_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse32_v_i32m8_m(vbool4_t mask, int32_t *base, vint32m8_t value, size_t vl) { - return vse32_v_i32m8_m(mask, base, value, vl); + return __riscv_vse32_v_i32m8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32mf2_m( @@ -238,7 +238,7 @@ void test_vse32_v_i32m8_m(vbool4_t mask, int32_t *base, vint32m8_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t value, size_t vl) { - return vse32_v_u32mf2_m(mask, base, value, vl); + return __riscv_vse32_v_u32mf2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32m1_m( @@ -247,7 +247,7 @@ void test_vse32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t value, size_t vl) { - return vse32_v_u32m1_m(mask, base, value, vl); + return __riscv_vse32_v_u32m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32m2_m( @@ -256,7 +256,7 @@ void test_vse32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t value, size_t vl) { - return vse32_v_u32m2_m(mask, base, value, vl); + return __riscv_vse32_v_u32m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32m4_m( @@ -265,7 +265,7 @@ void test_vse32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t value, size_t vl) { - return vse32_v_u32m4_m(mask, base, value, vl); + return __riscv_vse32_v_u32m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse32_v_u32m8_m( @@ -274,6 +274,6 @@ void test_vse32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t value, size // CHECK-RV64-NEXT: ret void // void test_vse32_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint32m8_t value, size_t vl) { - return vse32_v_u32m8_m(mask, base, value, vl); + return __riscv_vse32_v_u32m8_m(mask, base, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse64.c index 46901a90560057a9a713675e228c4aa6f23bc29b..f84322d6730d41559bc48c8077e3a03c76bf8d99 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vse64_v_f64m1(double *base, vfloat64m1_t value, size_t vl) { - return vse64_v_f64m1(base, value, vl); + return __riscv_vse64_v_f64m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_f64m2( @@ -22,7 +22,7 @@ void test_vse64_v_f64m1(double *base, vfloat64m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_f64m2(double *base, vfloat64m2_t value, size_t vl) { - return vse64_v_f64m2(base, value, vl); + return __riscv_vse64_v_f64m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_f64m4( @@ -31,7 +31,7 @@ void test_vse64_v_f64m2(double *base, vfloat64m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_f64m4(double *base, vfloat64m4_t value, size_t vl) { - return vse64_v_f64m4(base, value, vl); + return __riscv_vse64_v_f64m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_f64m8( @@ -40,7 +40,7 @@ void test_vse64_v_f64m4(double *base, vfloat64m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_f64m8(double *base, vfloat64m8_t value, size_t vl) { - return vse64_v_f64m8(base, value, vl); + return __riscv_vse64_v_f64m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_i64m1( @@ -49,7 +49,7 @@ void test_vse64_v_f64m8(double *base, vfloat64m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_i64m1(int64_t *base, vint64m1_t value, size_t vl) { - return vse64_v_i64m1(base, value, vl); + return __riscv_vse64_v_i64m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_i64m2( @@ -58,7 +58,7 @@ void test_vse64_v_i64m1(int64_t *base, vint64m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_i64m2(int64_t *base, vint64m2_t value, size_t vl) { - return vse64_v_i64m2(base, value, vl); + return __riscv_vse64_v_i64m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_i64m4( @@ -67,7 +67,7 @@ void test_vse64_v_i64m2(int64_t *base, vint64m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_i64m4(int64_t *base, vint64m4_t value, size_t vl) { - return vse64_v_i64m4(base, value, vl); + return __riscv_vse64_v_i64m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_i64m8( @@ -76,7 +76,7 @@ void test_vse64_v_i64m4(int64_t *base, vint64m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_i64m8(int64_t *base, vint64m8_t value, size_t vl) { - return vse64_v_i64m8(base, value, vl); + return __riscv_vse64_v_i64m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_u64m1( @@ -85,7 +85,7 @@ void test_vse64_v_i64m8(int64_t *base, vint64m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_u64m1(uint64_t *base, vuint64m1_t value, size_t vl) { - return vse64_v_u64m1(base, value, vl); + return __riscv_vse64_v_u64m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_u64m2( @@ -94,7 +94,7 @@ void test_vse64_v_u64m1(uint64_t *base, vuint64m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_u64m2(uint64_t *base, vuint64m2_t value, size_t vl) { - return vse64_v_u64m2(base, value, vl); + return __riscv_vse64_v_u64m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_u64m4( @@ -103,7 +103,7 @@ void test_vse64_v_u64m2(uint64_t *base, vuint64m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_u64m4(uint64_t *base, vuint64m4_t value, size_t vl) { - return vse64_v_u64m4(base, value, vl); + return __riscv_vse64_v_u64m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_u64m8( @@ -112,7 +112,7 @@ void test_vse64_v_u64m4(uint64_t *base, vuint64m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_u64m8(uint64_t *base, vuint64m8_t value, size_t vl) { - return vse64_v_u64m8(base, value, vl); + return __riscv_vse64_v_u64m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_f64m1_m( @@ -121,7 +121,7 @@ void test_vse64_v_u64m8(uint64_t *base, vuint64m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t value, size_t vl) { - return vse64_v_f64m1_m(mask, base, value, vl); + return __riscv_vse64_v_f64m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_f64m2_m( @@ -130,7 +130,7 @@ void test_vse64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t value, size // CHECK-RV64-NEXT: ret void // void test_vse64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t value, size_t vl) { - return vse64_v_f64m2_m(mask, base, value, vl); + return __riscv_vse64_v_f64m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_f64m4_m( @@ -139,7 +139,7 @@ void test_vse64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t value, size // CHECK-RV64-NEXT: ret void // void test_vse64_v_f64m4_m(vbool16_t mask, double *base, vfloat64m4_t value, size_t vl) { - return vse64_v_f64m4_m(mask, base, value, vl); + return __riscv_vse64_v_f64m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_f64m8_m( @@ -148,7 +148,7 @@ void test_vse64_v_f64m4_m(vbool16_t mask, double *base, vfloat64m4_t value, size // CHECK-RV64-NEXT: ret void // void test_vse64_v_f64m8_m(vbool8_t mask, double *base, vfloat64m8_t value, size_t vl) { - return vse64_v_f64m8_m(mask, base, value, vl); + return __riscv_vse64_v_f64m8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_i64m1_m( @@ -157,7 +157,7 @@ void test_vse64_v_f64m8_m(vbool8_t mask, double *base, vfloat64m8_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t value, size_t vl) { - return vse64_v_i64m1_m(mask, base, value, vl); + return __riscv_vse64_v_i64m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_i64m2_m( @@ -166,7 +166,7 @@ void test_vse64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t value, size_t vl) { - return vse64_v_i64m2_m(mask, base, value, vl); + return __riscv_vse64_v_i64m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_i64m4_m( @@ -175,7 +175,7 @@ void test_vse64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse64_v_i64m4_m(vbool16_t mask, int64_t *base, vint64m4_t value, size_t vl) { - return vse64_v_i64m4_m(mask, base, value, vl); + return __riscv_vse64_v_i64m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_i64m8_m( @@ -184,7 +184,7 @@ void test_vse64_v_i64m4_m(vbool16_t mask, int64_t *base, vint64m4_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse64_v_i64m8_m(vbool8_t mask, int64_t *base, vint64m8_t value, size_t vl) { - return vse64_v_i64m8_m(mask, base, value, vl); + return __riscv_vse64_v_i64m8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_u64m1_m( @@ -193,7 +193,7 @@ void test_vse64_v_i64m8_m(vbool8_t mask, int64_t *base, vint64m8_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t value, size_t vl) { - return vse64_v_u64m1_m(mask, base, value, vl); + return __riscv_vse64_v_u64m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_u64m2_m( @@ -202,7 +202,7 @@ void test_vse64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t value, size_t vl) { - return vse64_v_u64m2_m(mask, base, value, vl); + return __riscv_vse64_v_u64m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_u64m4_m( @@ -211,7 +211,7 @@ void test_vse64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t value, size_t vl) { - return vse64_v_u64m4_m(mask, base, value, vl); + return __riscv_vse64_v_u64m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse64_v_u64m8_m( @@ -220,6 +220,6 @@ void test_vse64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vse64_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint64m8_t value, size_t vl) { - return vse64_v_u64m8_m(mask, base, value, vl); + return __riscv_vse64_v_u64m8_m(mask, base, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse8.c index c5a1a24e490a533b94ab3f09827b2ed954e28bdf..78de75bfb2f251387365c61cc19457c9ff8844ee 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vse8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8mf8(int8_t *base, vint8mf8_t value, size_t vl) { - return vse8_v_i8mf8(base, value, vl); + return __riscv_vse8_v_i8mf8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vse8_v_i8mf8(int8_t *base, vint8mf8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8mf4(int8_t *base, vint8mf4_t value, size_t vl) { - return vse8_v_i8mf4(base, value, vl); + return __riscv_vse8_v_i8mf4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vse8_v_i8mf4(int8_t *base, vint8mf4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8mf2(int8_t *base, vint8mf2_t value, size_t vl) { - return vse8_v_i8mf2(base, value, vl); + return __riscv_vse8_v_i8mf2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8m1( @@ -39,7 +39,7 @@ void test_vse8_v_i8mf2(int8_t *base, vint8mf2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8m1(int8_t *base, vint8m1_t value, size_t vl) { - return vse8_v_i8m1(base, value, vl); + return __riscv_vse8_v_i8m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8m2( @@ -48,7 +48,7 @@ void test_vse8_v_i8m1(int8_t *base, vint8m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8m2(int8_t *base, vint8m2_t value, size_t vl) { - return vse8_v_i8m2(base, value, vl); + return __riscv_vse8_v_i8m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8m4( @@ -57,7 +57,7 @@ void test_vse8_v_i8m2(int8_t *base, vint8m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8m4(int8_t *base, vint8m4_t value, size_t vl) { - return vse8_v_i8m4(base, value, vl); + return __riscv_vse8_v_i8m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8m8( @@ -66,7 +66,7 @@ void test_vse8_v_i8m4(int8_t *base, vint8m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8m8(int8_t *base, vint8m8_t value, size_t vl) { - return vse8_v_i8m8(base, value, vl); + return __riscv_vse8_v_i8m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8mf8( @@ -75,7 +75,7 @@ void test_vse8_v_i8m8(int8_t *base, vint8m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8mf8(uint8_t *base, vuint8mf8_t value, size_t vl) { - return vse8_v_u8mf8(base, value, vl); + return __riscv_vse8_v_u8mf8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8mf4( @@ -84,7 +84,7 @@ void test_vse8_v_u8mf8(uint8_t *base, vuint8mf8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8mf4(uint8_t *base, vuint8mf4_t value, size_t vl) { - return vse8_v_u8mf4(base, value, vl); + return __riscv_vse8_v_u8mf4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8mf2( @@ -93,7 +93,7 @@ void test_vse8_v_u8mf4(uint8_t *base, vuint8mf4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8mf2(uint8_t *base, vuint8mf2_t value, size_t vl) { - return vse8_v_u8mf2(base, value, vl); + return __riscv_vse8_v_u8mf2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8m1( @@ -102,7 +102,7 @@ void test_vse8_v_u8mf2(uint8_t *base, vuint8mf2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8m1(uint8_t *base, vuint8m1_t value, size_t vl) { - return vse8_v_u8m1(base, value, vl); + return __riscv_vse8_v_u8m1(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8m2( @@ -111,7 +111,7 @@ void test_vse8_v_u8m1(uint8_t *base, vuint8m1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8m2(uint8_t *base, vuint8m2_t value, size_t vl) { - return vse8_v_u8m2(base, value, vl); + return __riscv_vse8_v_u8m2(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8m4( @@ -120,7 +120,7 @@ void test_vse8_v_u8m2(uint8_t *base, vuint8m2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8m4(uint8_t *base, vuint8m4_t value, size_t vl) { - return vse8_v_u8m4(base, value, vl); + return __riscv_vse8_v_u8m4(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8m8( @@ -129,7 +129,7 @@ void test_vse8_v_u8m4(uint8_t *base, vuint8m4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8m8(uint8_t *base, vuint8m8_t value, size_t vl) { - return vse8_v_u8m8(base, value, vl); + return __riscv_vse8_v_u8m8(base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8mf8_m( @@ -138,7 +138,7 @@ void test_vse8_v_u8m8(uint8_t *base, vuint8m8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t value, size_t vl) { - return vse8_v_i8mf8_m(mask, base, value, vl); + return __riscv_vse8_v_i8mf8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8mf4_m( @@ -147,7 +147,7 @@ void test_vse8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t value, size_t vl) { - return vse8_v_i8mf4_m(mask, base, value, vl); + return __riscv_vse8_v_i8mf4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8mf2_m( @@ -156,7 +156,7 @@ void test_vse8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t value, size_t vl) { - return vse8_v_i8mf2_m(mask, base, value, vl); + return __riscv_vse8_v_i8mf2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8m1_m( @@ -165,7 +165,7 @@ void test_vse8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t value, size_t vl) { - return vse8_v_i8m1_m(mask, base, value, vl); + return __riscv_vse8_v_i8m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8m2_m( @@ -174,7 +174,7 @@ void test_vse8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t value, size_t vl) // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t value, size_t vl) { - return vse8_v_i8m2_m(mask, base, value, vl); + return __riscv_vse8_v_i8m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8m4_m( @@ -183,7 +183,7 @@ void test_vse8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t value, size_t vl) // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8m4_m(vbool2_t mask, int8_t *base, vint8m4_t value, size_t vl) { - return vse8_v_i8m4_m(mask, base, value, vl); + return __riscv_vse8_v_i8m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_i8m8_m( @@ -192,7 +192,7 @@ void test_vse8_v_i8m4_m(vbool2_t mask, int8_t *base, vint8m4_t value, size_t vl) // CHECK-RV64-NEXT: ret void // void test_vse8_v_i8m8_m(vbool1_t mask, int8_t *base, vint8m8_t value, size_t vl) { - return vse8_v_i8m8_m(mask, base, value, vl); + return __riscv_vse8_v_i8m8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8mf8_m( @@ -201,7 +201,7 @@ void test_vse8_v_i8m8_m(vbool1_t mask, int8_t *base, vint8m8_t value, size_t vl) // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t value, size_t vl) { - return vse8_v_u8mf8_m(mask, base, value, vl); + return __riscv_vse8_v_u8mf8_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8mf4_m( @@ -210,7 +210,7 @@ void test_vse8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t value, size_t vl) { - return vse8_v_u8mf4_m(mask, base, value, vl); + return __riscv_vse8_v_u8mf4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8mf2_m( @@ -219,7 +219,7 @@ void test_vse8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t value, size_t vl) { - return vse8_v_u8mf2_m(mask, base, value, vl); + return __riscv_vse8_v_u8mf2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8m1_m( @@ -228,7 +228,7 @@ void test_vse8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t value, size_t vl) { - return vse8_v_u8m1_m(mask, base, value, vl); + return __riscv_vse8_v_u8m1_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8m2_m( @@ -237,7 +237,7 @@ void test_vse8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t value, size_t v // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t value, size_t vl) { - return vse8_v_u8m2_m(mask, base, value, vl); + return __riscv_vse8_v_u8m2_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8m4_m( @@ -246,7 +246,7 @@ void test_vse8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t value, size_t v // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t value, size_t vl) { - return vse8_v_u8m4_m(mask, base, value, vl); + return __riscv_vse8_v_u8m4_m(mask, base, value, vl); } // CHECK-RV64-LABEL: @test_vse8_v_u8m8_m( @@ -255,6 +255,6 @@ void test_vse8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t value, size_t v // CHECK-RV64-NEXT: ret void // void test_vse8_v_u8m8_m(vbool1_t mask, uint8_t *base, vuint8m8_t value, size_t vl) { - return vse8_v_u8m8_m(mask, base, value, vl); + return __riscv_vse8_v_u8m8_m(mask, base, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c index e3837d3efccf833eca373a2b9eb7339398459b37..f9cae45caea5a4e819a54b515f35c03b77954745 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vset.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vset_v_f16m1_f16m2(vfloat16m2_t dest, size_t index, vfloat16m1_t val) { - return vset_v_f16m1_f16m2(dest, 0, val); + return __riscv_vset_v_f16m1_f16m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f16m1_f16m4( @@ -22,7 +22,7 @@ vfloat16m2_t test_vset_v_f16m1_f16m2(vfloat16m2_t dest, size_t index, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vset_v_f16m1_f16m4(vfloat16m4_t dest, size_t index, vfloat16m1_t val) { - return vset_v_f16m1_f16m4(dest, 0, val); + return __riscv_vset_v_f16m1_f16m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f16m2_f16m4( @@ -31,7 +31,7 @@ vfloat16m4_t test_vset_v_f16m1_f16m4(vfloat16m4_t dest, size_t index, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vset_v_f16m2_f16m4(vfloat16m4_t dest, size_t index, vfloat16m2_t val) { - return vset_v_f16m2_f16m4(dest, 0, val); + return __riscv_vset_v_f16m2_f16m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f16m1_f16m8( @@ -40,7 +40,7 @@ vfloat16m4_t test_vset_v_f16m2_f16m4(vfloat16m4_t dest, size_t index, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vset_v_f16m1_f16m8(vfloat16m8_t dest, size_t index, vfloat16m1_t val) { - return vset_v_f16m1_f16m8(dest, 0, val); + return __riscv_vset_v_f16m1_f16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f16m2_f16m8( @@ -49,7 +49,7 @@ vfloat16m8_t test_vset_v_f16m1_f16m8(vfloat16m8_t dest, size_t index, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vset_v_f16m2_f16m8(vfloat16m8_t dest, size_t index, vfloat16m2_t val) { - return vset_v_f16m2_f16m8(dest, 0, val); + return __riscv_vset_v_f16m2_f16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f16m4_f16m8( @@ -58,7 +58,7 @@ vfloat16m8_t test_vset_v_f16m2_f16m8(vfloat16m8_t dest, size_t index, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vset_v_f16m4_f16m8(vfloat16m8_t dest, size_t index, vfloat16m4_t val) { - return vset_v_f16m4_f16m8(dest, 0, val); + return __riscv_vset_v_f16m4_f16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f32m1_f32m2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vset_v_f16m4_f16m8(vfloat16m8_t dest, size_t index, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vset_v_f32m1_f32m2(vfloat32m2_t dest, size_t index, vfloat32m1_t val) { - return vset_v_f32m1_f32m2(dest, 0, val); + return __riscv_vset_v_f32m1_f32m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f32m1_f32m4( @@ -76,7 +76,7 @@ vfloat32m2_t test_vset_v_f32m1_f32m2(vfloat32m2_t dest, size_t index, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vset_v_f32m1_f32m4(vfloat32m4_t dest, size_t index, vfloat32m1_t val) { - return vset_v_f32m1_f32m4(dest, 0, val); + return __riscv_vset_v_f32m1_f32m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f32m2_f32m4( @@ -85,7 +85,7 @@ vfloat32m4_t test_vset_v_f32m1_f32m4(vfloat32m4_t dest, size_t index, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vset_v_f32m2_f32m4(vfloat32m4_t dest, size_t index, vfloat32m2_t val) { - return vset_v_f32m2_f32m4(dest, 0, val); + return __riscv_vset_v_f32m2_f32m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f32m1_f32m8( @@ -94,7 +94,7 @@ vfloat32m4_t test_vset_v_f32m2_f32m4(vfloat32m4_t dest, size_t index, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vset_v_f32m1_f32m8(vfloat32m8_t dest, size_t index, vfloat32m1_t val) { - return vset_v_f32m1_f32m8(dest, 0, val); + return __riscv_vset_v_f32m1_f32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f32m2_f32m8( @@ -103,7 +103,7 @@ vfloat32m8_t test_vset_v_f32m1_f32m8(vfloat32m8_t dest, size_t index, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vset_v_f32m2_f32m8(vfloat32m8_t dest, size_t index, vfloat32m2_t val) { - return vset_v_f32m2_f32m8(dest, 0, val); + return __riscv_vset_v_f32m2_f32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f32m4_f32m8( @@ -112,7 +112,7 @@ vfloat32m8_t test_vset_v_f32m2_f32m8(vfloat32m8_t dest, size_t index, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vset_v_f32m4_f32m8(vfloat32m8_t dest, size_t index, vfloat32m4_t val) { - return vset_v_f32m4_f32m8(dest, 0, val); + return __riscv_vset_v_f32m4_f32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f64m1_f64m2( @@ -121,7 +121,7 @@ vfloat32m8_t test_vset_v_f32m4_f32m8(vfloat32m8_t dest, size_t index, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vset_v_f64m1_f64m2(vfloat64m2_t dest, size_t index, vfloat64m1_t val) { - return vset_v_f64m1_f64m2(dest, 0, val); + return __riscv_vset_v_f64m1_f64m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f64m1_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vset_v_f64m1_f64m2(vfloat64m2_t dest, size_t index, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vset_v_f64m1_f64m4(vfloat64m4_t dest, size_t index, vfloat64m1_t val) { - return vset_v_f64m1_f64m4(dest, 0, val); + return __riscv_vset_v_f64m1_f64m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f64m2_f64m4( @@ -139,7 +139,7 @@ vfloat64m4_t test_vset_v_f64m1_f64m4(vfloat64m4_t dest, size_t index, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vset_v_f64m2_f64m4(vfloat64m4_t dest, size_t index, vfloat64m2_t val) { - return vset_v_f64m2_f64m4(dest, 0, val); + return __riscv_vset_v_f64m2_f64m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f64m1_f64m8( @@ -148,7 +148,7 @@ vfloat64m4_t test_vset_v_f64m2_f64m4(vfloat64m4_t dest, size_t index, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vset_v_f64m1_f64m8(vfloat64m8_t dest, size_t index, vfloat64m1_t val) { - return vset_v_f64m1_f64m8(dest, 0, val); + return __riscv_vset_v_f64m1_f64m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f64m2_f64m8( @@ -157,7 +157,7 @@ vfloat64m8_t test_vset_v_f64m1_f64m8(vfloat64m8_t dest, size_t index, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vset_v_f64m2_f64m8(vfloat64m8_t dest, size_t index, vfloat64m2_t val) { - return vset_v_f64m2_f64m8(dest, 0, val); + return __riscv_vset_v_f64m2_f64m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_f64m4_f64m8( @@ -166,7 +166,7 @@ vfloat64m8_t test_vset_v_f64m2_f64m8(vfloat64m8_t dest, size_t index, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vset_v_f64m4_f64m8(vfloat64m8_t dest, size_t index, vfloat64m4_t val) { - return vset_v_f64m4_f64m8(dest, 0, val); + return __riscv_vset_v_f64m4_f64m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i8m1_i8m2( @@ -175,7 +175,7 @@ vfloat64m8_t test_vset_v_f64m4_f64m8(vfloat64m8_t dest, size_t index, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vset_v_i8m1_i8m2(vint8m2_t dest, size_t index, vint8m1_t val) { - return vset_v_i8m1_i8m2(dest, 0, val); + return __riscv_vset_v_i8m1_i8m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i8m1_i8m4( @@ -184,7 +184,7 @@ vint8m2_t test_vset_v_i8m1_i8m2(vint8m2_t dest, size_t index, vint8m1_t val) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vset_v_i8m1_i8m4(vint8m4_t dest, size_t index, vint8m1_t val) { - return vset_v_i8m1_i8m4(dest, 0, val); + return __riscv_vset_v_i8m1_i8m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i8m2_i8m4( @@ -193,7 +193,7 @@ vint8m4_t test_vset_v_i8m1_i8m4(vint8m4_t dest, size_t index, vint8m1_t val) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vset_v_i8m2_i8m4(vint8m4_t dest, size_t index, vint8m2_t val) { - return vset_v_i8m2_i8m4(dest, 0, val); + return __riscv_vset_v_i8m2_i8m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i8m1_i8m8( @@ -202,7 +202,7 @@ vint8m4_t test_vset_v_i8m2_i8m4(vint8m4_t dest, size_t index, vint8m2_t val) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vset_v_i8m1_i8m8(vint8m8_t dest, size_t index, vint8m1_t val) { - return vset_v_i8m1_i8m8(dest, 0, val); + return __riscv_vset_v_i8m1_i8m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i8m2_i8m8( @@ -211,7 +211,7 @@ vint8m8_t test_vset_v_i8m1_i8m8(vint8m8_t dest, size_t index, vint8m1_t val) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vset_v_i8m2_i8m8(vint8m8_t dest, size_t index, vint8m2_t val) { - return vset_v_i8m2_i8m8(dest, 0, val); + return __riscv_vset_v_i8m2_i8m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i8m4_i8m8( @@ -220,7 +220,7 @@ vint8m8_t test_vset_v_i8m2_i8m8(vint8m8_t dest, size_t index, vint8m2_t val) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vset_v_i8m4_i8m8(vint8m8_t dest, size_t index, vint8m4_t val) { - return vset_v_i8m4_i8m8(dest, 0, val); + return __riscv_vset_v_i8m4_i8m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i16m1_i16m2( @@ -229,7 +229,7 @@ vint8m8_t test_vset_v_i8m4_i8m8(vint8m8_t dest, size_t index, vint8m4_t val) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vset_v_i16m1_i16m2(vint16m2_t dest, size_t index, vint16m1_t val) { - return vset_v_i16m1_i16m2(dest, 0, val); + return __riscv_vset_v_i16m1_i16m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i16m1_i16m4( @@ -238,7 +238,7 @@ vint16m2_t test_vset_v_i16m1_i16m2(vint16m2_t dest, size_t index, vint16m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vset_v_i16m1_i16m4(vint16m4_t dest, size_t index, vint16m1_t val) { - return vset_v_i16m1_i16m4(dest, 0, val); + return __riscv_vset_v_i16m1_i16m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i16m2_i16m4( @@ -247,7 +247,7 @@ vint16m4_t test_vset_v_i16m1_i16m4(vint16m4_t dest, size_t index, vint16m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vset_v_i16m2_i16m4(vint16m4_t dest, size_t index, vint16m2_t val) { - return vset_v_i16m2_i16m4(dest, 0, val); + return __riscv_vset_v_i16m2_i16m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i16m1_i16m8( @@ -256,7 +256,7 @@ vint16m4_t test_vset_v_i16m2_i16m4(vint16m4_t dest, size_t index, vint16m2_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vset_v_i16m1_i16m8(vint16m8_t dest, size_t index, vint16m1_t val) { - return vset_v_i16m1_i16m8(dest, 0, val); + return __riscv_vset_v_i16m1_i16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i16m2_i16m8( @@ -265,7 +265,7 @@ vint16m8_t test_vset_v_i16m1_i16m8(vint16m8_t dest, size_t index, vint16m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vset_v_i16m2_i16m8(vint16m8_t dest, size_t index, vint16m2_t val) { - return vset_v_i16m2_i16m8(dest, 0, val); + return __riscv_vset_v_i16m2_i16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i16m4_i16m8( @@ -274,7 +274,7 @@ vint16m8_t test_vset_v_i16m2_i16m8(vint16m8_t dest, size_t index, vint16m2_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vset_v_i16m4_i16m8(vint16m8_t dest, size_t index, vint16m4_t val) { - return vset_v_i16m4_i16m8(dest, 0, val); + return __riscv_vset_v_i16m4_i16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i32m1_i32m2( @@ -283,7 +283,7 @@ vint16m8_t test_vset_v_i16m4_i16m8(vint16m8_t dest, size_t index, vint16m4_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vset_v_i32m1_i32m2(vint32m2_t dest, size_t index, vint32m1_t val) { - return vset_v_i32m1_i32m2(dest, 0, val); + return __riscv_vset_v_i32m1_i32m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i32m1_i32m4( @@ -292,7 +292,7 @@ vint32m2_t test_vset_v_i32m1_i32m2(vint32m2_t dest, size_t index, vint32m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vset_v_i32m1_i32m4(vint32m4_t dest, size_t index, vint32m1_t val) { - return vset_v_i32m1_i32m4(dest, 0, val); + return __riscv_vset_v_i32m1_i32m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i32m2_i32m4( @@ -301,7 +301,7 @@ vint32m4_t test_vset_v_i32m1_i32m4(vint32m4_t dest, size_t index, vint32m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vset_v_i32m2_i32m4(vint32m4_t dest, size_t index, vint32m2_t val) { - return vset_v_i32m2_i32m4(dest, 0, val); + return __riscv_vset_v_i32m2_i32m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i32m1_i32m8( @@ -310,7 +310,7 @@ vint32m4_t test_vset_v_i32m2_i32m4(vint32m4_t dest, size_t index, vint32m2_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vset_v_i32m1_i32m8(vint32m8_t dest, size_t index, vint32m1_t val) { - return vset_v_i32m1_i32m8(dest, 0, val); + return __riscv_vset_v_i32m1_i32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i32m2_i32m8( @@ -319,7 +319,7 @@ vint32m8_t test_vset_v_i32m1_i32m8(vint32m8_t dest, size_t index, vint32m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vset_v_i32m2_i32m8(vint32m8_t dest, size_t index, vint32m2_t val) { - return vset_v_i32m2_i32m8(dest, 0, val); + return __riscv_vset_v_i32m2_i32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i32m4_i32m8( @@ -328,7 +328,7 @@ vint32m8_t test_vset_v_i32m2_i32m8(vint32m8_t dest, size_t index, vint32m2_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vset_v_i32m4_i32m8(vint32m8_t dest, size_t index, vint32m4_t val) { - return vset_v_i32m4_i32m8(dest, 0, val); + return __riscv_vset_v_i32m4_i32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i64m1_i64m2( @@ -337,7 +337,7 @@ vint32m8_t test_vset_v_i32m4_i32m8(vint32m8_t dest, size_t index, vint32m4_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vset_v_i64m1_i64m2(vint64m2_t dest, size_t index, vint64m1_t val) { - return vset_v_i64m1_i64m2(dest, 0, val); + return __riscv_vset_v_i64m1_i64m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i64m1_i64m4( @@ -346,7 +346,7 @@ vint64m2_t test_vset_v_i64m1_i64m2(vint64m2_t dest, size_t index, vint64m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vset_v_i64m1_i64m4(vint64m4_t dest, size_t index, vint64m1_t val) { - return vset_v_i64m1_i64m4(dest, 0, val); + return __riscv_vset_v_i64m1_i64m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i64m2_i64m4( @@ -355,7 +355,7 @@ vint64m4_t test_vset_v_i64m1_i64m4(vint64m4_t dest, size_t index, vint64m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vset_v_i64m2_i64m4(vint64m4_t dest, size_t index, vint64m2_t val) { - return vset_v_i64m2_i64m4(dest, 0, val); + return __riscv_vset_v_i64m2_i64m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i64m1_i64m8( @@ -364,7 +364,7 @@ vint64m4_t test_vset_v_i64m2_i64m4(vint64m4_t dest, size_t index, vint64m2_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vset_v_i64m1_i64m8(vint64m8_t dest, size_t index, vint64m1_t val) { - return vset_v_i64m1_i64m8(dest, 0, val); + return __riscv_vset_v_i64m1_i64m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i64m2_i64m8( @@ -373,7 +373,7 @@ vint64m8_t test_vset_v_i64m1_i64m8(vint64m8_t dest, size_t index, vint64m1_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vset_v_i64m2_i64m8(vint64m8_t dest, size_t index, vint64m2_t val) { - return vset_v_i64m2_i64m8(dest, 0, val); + return __riscv_vset_v_i64m2_i64m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_i64m4_i64m8( @@ -382,7 +382,7 @@ vint64m8_t test_vset_v_i64m2_i64m8(vint64m8_t dest, size_t index, vint64m2_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vset_v_i64m4_i64m8(vint64m8_t dest, size_t index, vint64m4_t val) { - return vset_v_i64m4_i64m8(dest, 0, val); + return __riscv_vset_v_i64m4_i64m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u8m1_u8m2( @@ -391,7 +391,7 @@ vint64m8_t test_vset_v_i64m4_i64m8(vint64m8_t dest, size_t index, vint64m4_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vset_v_u8m1_u8m2(vuint8m2_t dest, size_t index, vuint8m1_t val) { - return vset_v_u8m1_u8m2(dest, 0, val); + return __riscv_vset_v_u8m1_u8m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u8m1_u8m4( @@ -400,7 +400,7 @@ vuint8m2_t test_vset_v_u8m1_u8m2(vuint8m2_t dest, size_t index, vuint8m1_t val) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vset_v_u8m1_u8m4(vuint8m4_t dest, size_t index, vuint8m1_t val) { - return vset_v_u8m1_u8m4(dest, 0, val); + return __riscv_vset_v_u8m1_u8m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u8m2_u8m4( @@ -409,7 +409,7 @@ vuint8m4_t test_vset_v_u8m1_u8m4(vuint8m4_t dest, size_t index, vuint8m1_t val) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vset_v_u8m2_u8m4(vuint8m4_t dest, size_t index, vuint8m2_t val) { - return vset_v_u8m2_u8m4(dest, 0, val); + return __riscv_vset_v_u8m2_u8m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u8m1_u8m8( @@ -418,7 +418,7 @@ vuint8m4_t test_vset_v_u8m2_u8m4(vuint8m4_t dest, size_t index, vuint8m2_t val) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vset_v_u8m1_u8m8(vuint8m8_t dest, size_t index, vuint8m1_t val) { - return vset_v_u8m1_u8m8(dest, 0, val); + return __riscv_vset_v_u8m1_u8m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u8m2_u8m8( @@ -427,7 +427,7 @@ vuint8m8_t test_vset_v_u8m1_u8m8(vuint8m8_t dest, size_t index, vuint8m1_t val) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vset_v_u8m2_u8m8(vuint8m8_t dest, size_t index, vuint8m2_t val) { - return vset_v_u8m2_u8m8(dest, 0, val); + return __riscv_vset_v_u8m2_u8m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u8m4_u8m8( @@ -436,7 +436,7 @@ vuint8m8_t test_vset_v_u8m2_u8m8(vuint8m8_t dest, size_t index, vuint8m2_t val) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vset_v_u8m4_u8m8(vuint8m8_t dest, size_t index, vuint8m4_t val) { - return vset_v_u8m4_u8m8(dest, 0, val); + return __riscv_vset_v_u8m4_u8m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u16m1_u16m2( @@ -445,7 +445,7 @@ vuint8m8_t test_vset_v_u8m4_u8m8(vuint8m8_t dest, size_t index, vuint8m4_t val) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vset_v_u16m1_u16m2(vuint16m2_t dest, size_t index, vuint16m1_t val) { - return vset_v_u16m1_u16m2(dest, 0, val); + return __riscv_vset_v_u16m1_u16m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u16m1_u16m4( @@ -454,7 +454,7 @@ vuint16m2_t test_vset_v_u16m1_u16m2(vuint16m2_t dest, size_t index, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vset_v_u16m1_u16m4(vuint16m4_t dest, size_t index, vuint16m1_t val) { - return vset_v_u16m1_u16m4(dest, 0, val); + return __riscv_vset_v_u16m1_u16m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u16m2_u16m4( @@ -463,7 +463,7 @@ vuint16m4_t test_vset_v_u16m1_u16m4(vuint16m4_t dest, size_t index, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vset_v_u16m2_u16m4(vuint16m4_t dest, size_t index, vuint16m2_t val) { - return vset_v_u16m2_u16m4(dest, 0, val); + return __riscv_vset_v_u16m2_u16m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u16m1_u16m8( @@ -472,7 +472,7 @@ vuint16m4_t test_vset_v_u16m2_u16m4(vuint16m4_t dest, size_t index, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vset_v_u16m1_u16m8(vuint16m8_t dest, size_t index, vuint16m1_t val) { - return vset_v_u16m1_u16m8(dest, 0, val); + return __riscv_vset_v_u16m1_u16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u16m2_u16m8( @@ -481,7 +481,7 @@ vuint16m8_t test_vset_v_u16m1_u16m8(vuint16m8_t dest, size_t index, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vset_v_u16m2_u16m8(vuint16m8_t dest, size_t index, vuint16m2_t val) { - return vset_v_u16m2_u16m8(dest, 0, val); + return __riscv_vset_v_u16m2_u16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u16m4_u16m8( @@ -490,7 +490,7 @@ vuint16m8_t test_vset_v_u16m2_u16m8(vuint16m8_t dest, size_t index, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vset_v_u16m4_u16m8(vuint16m8_t dest, size_t index, vuint16m4_t val) { - return vset_v_u16m4_u16m8(dest, 0, val); + return __riscv_vset_v_u16m4_u16m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u32m1_u32m2( @@ -499,7 +499,7 @@ vuint16m8_t test_vset_v_u16m4_u16m8(vuint16m8_t dest, size_t index, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vset_v_u32m1_u32m2(vuint32m2_t dest, size_t index, vuint32m1_t val) { - return vset_v_u32m1_u32m2(dest, 0, val); + return __riscv_vset_v_u32m1_u32m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u32m1_u32m4( @@ -508,7 +508,7 @@ vuint32m2_t test_vset_v_u32m1_u32m2(vuint32m2_t dest, size_t index, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vset_v_u32m1_u32m4(vuint32m4_t dest, size_t index, vuint32m1_t val) { - return vset_v_u32m1_u32m4(dest, 0, val); + return __riscv_vset_v_u32m1_u32m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u32m2_u32m4( @@ -517,7 +517,7 @@ vuint32m4_t test_vset_v_u32m1_u32m4(vuint32m4_t dest, size_t index, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vset_v_u32m2_u32m4(vuint32m4_t dest, size_t index, vuint32m2_t val) { - return vset_v_u32m2_u32m4(dest, 0, val); + return __riscv_vset_v_u32m2_u32m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u32m1_u32m8( @@ -526,7 +526,7 @@ vuint32m4_t test_vset_v_u32m2_u32m4(vuint32m4_t dest, size_t index, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vset_v_u32m1_u32m8(vuint32m8_t dest, size_t index, vuint32m1_t val) { - return vset_v_u32m1_u32m8(dest, 0, val); + return __riscv_vset_v_u32m1_u32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u32m2_u32m8( @@ -535,7 +535,7 @@ vuint32m8_t test_vset_v_u32m1_u32m8(vuint32m8_t dest, size_t index, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vset_v_u32m2_u32m8(vuint32m8_t dest, size_t index, vuint32m2_t val) { - return vset_v_u32m2_u32m8(dest, 0, val); + return __riscv_vset_v_u32m2_u32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u32m4_u32m8( @@ -544,7 +544,7 @@ vuint32m8_t test_vset_v_u32m2_u32m8(vuint32m8_t dest, size_t index, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vset_v_u32m4_u32m8(vuint32m8_t dest, size_t index, vuint32m4_t val) { - return vset_v_u32m4_u32m8(dest, 0, val); + return __riscv_vset_v_u32m4_u32m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u64m1_u64m2( @@ -553,7 +553,7 @@ vuint32m8_t test_vset_v_u32m4_u32m8(vuint32m8_t dest, size_t index, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vset_v_u64m1_u64m2(vuint64m2_t dest, size_t index, vuint64m1_t val) { - return vset_v_u64m1_u64m2(dest, 0, val); + return __riscv_vset_v_u64m1_u64m2(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u64m1_u64m4( @@ -562,7 +562,7 @@ vuint64m2_t test_vset_v_u64m1_u64m2(vuint64m2_t dest, size_t index, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vset_v_u64m1_u64m4(vuint64m4_t dest, size_t index, vuint64m1_t val) { - return vset_v_u64m1_u64m4(dest, 0, val); + return __riscv_vset_v_u64m1_u64m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u64m2_u64m4( @@ -571,7 +571,7 @@ vuint64m4_t test_vset_v_u64m1_u64m4(vuint64m4_t dest, size_t index, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vset_v_u64m2_u64m4(vuint64m4_t dest, size_t index, vuint64m2_t val) { - return vset_v_u64m2_u64m4(dest, 0, val); + return __riscv_vset_v_u64m2_u64m4(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u64m1_u64m8( @@ -580,7 +580,7 @@ vuint64m4_t test_vset_v_u64m2_u64m4(vuint64m4_t dest, size_t index, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vset_v_u64m1_u64m8(vuint64m8_t dest, size_t index, vuint64m1_t val) { - return vset_v_u64m1_u64m8(dest, 0, val); + return __riscv_vset_v_u64m1_u64m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u64m2_u64m8( @@ -589,7 +589,7 @@ vuint64m8_t test_vset_v_u64m1_u64m8(vuint64m8_t dest, size_t index, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vset_v_u64m2_u64m8(vuint64m8_t dest, size_t index, vuint64m2_t val) { - return vset_v_u64m2_u64m8(dest, 0, val); + return __riscv_vset_v_u64m2_u64m8(dest, 0, val); } // CHECK-RV64-LABEL: @test_vset_v_u64m4_u64m8( @@ -598,6 +598,6 @@ vuint64m8_t test_vset_v_u64m2_u64m8(vuint64m8_t dest, size_t index, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vset_v_u64m4_u64m8(vuint64m8_t dest, size_t index, vuint64m4_t val) { - return vset_v_u64m4_u64m8(dest, 0, val); + return __riscv_vset_v_u64m4_u64m8(dest, 0, val); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsext.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsext.c index f833f1f145e6952dcd4e1900af2c8bc8022ab352..d57ede5900f9779d672b7c020f06df63c04da4d6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsext.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsext.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsext_vf2_i16mf4(vint8mf8_t op1, size_t vl) { - return vsext_vf2_i16mf4(op1, vl); + return __riscv_vsext_vf2_i16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf2( @@ -21,7 +21,7 @@ vint16mf4_t test_vsext_vf2_i16mf4(vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsext_vf2_i16mf2(vint8mf4_t op1, size_t vl) { - return vsext_vf2_i16mf2(op1, vl); + return __riscv_vsext_vf2_i16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m1( @@ -30,7 +30,7 @@ vint16mf2_t test_vsext_vf2_i16mf2(vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsext_vf2_i16m1(vint8mf2_t op1, size_t vl) { - return vsext_vf2_i16m1(op1, vl); + return __riscv_vsext_vf2_i16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m2( @@ -39,7 +39,7 @@ vint16m1_t test_vsext_vf2_i16m1(vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsext_vf2_i16m2(vint8m1_t op1, size_t vl) { - return vsext_vf2_i16m2(op1, vl); + return __riscv_vsext_vf2_i16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m4( @@ -48,7 +48,7 @@ vint16m2_t test_vsext_vf2_i16m2(vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsext_vf2_i16m4(vint8m2_t op1, size_t vl) { - return vsext_vf2_i16m4(op1, vl); + return __riscv_vsext_vf2_i16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m8( @@ -57,7 +57,7 @@ vint16m4_t test_vsext_vf2_i16m4(vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsext_vf2_i16m8(vint8m4_t op1, size_t vl) { - return vsext_vf2_i16m8(op1, vl); + return __riscv_vsext_vf2_i16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32mf2( @@ -66,7 +66,7 @@ vint16m8_t test_vsext_vf2_i16m8(vint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf4_i32mf2(vint8mf8_t op1, size_t vl) { - return vsext_vf4_i32mf2(op1, vl); + return __riscv_vsext_vf4_i32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m1( @@ -75,7 +75,7 @@ vint32mf2_t test_vsext_vf4_i32mf2(vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf4_i32m1(vint8mf4_t op1, size_t vl) { - return vsext_vf4_i32m1(op1, vl); + return __riscv_vsext_vf4_i32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m2( @@ -84,7 +84,7 @@ vint32m1_t test_vsext_vf4_i32m1(vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf4_i32m2(vint8mf2_t op1, size_t vl) { - return vsext_vf4_i32m2(op1, vl); + return __riscv_vsext_vf4_i32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m4( @@ -93,7 +93,7 @@ vint32m2_t test_vsext_vf4_i32m2(vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf4_i32m4(vint8m1_t op1, size_t vl) { - return vsext_vf4_i32m4(op1, vl); + return __riscv_vsext_vf4_i32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m8( @@ -102,7 +102,7 @@ vint32m4_t test_vsext_vf4_i32m4(vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf4_i32m8(vint8m2_t op1, size_t vl) { - return vsext_vf4_i32m8(op1, vl); + return __riscv_vsext_vf4_i32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m1( @@ -111,7 +111,7 @@ vint32m8_t test_vsext_vf4_i32m8(vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf8_i64m1(vint8mf8_t op1, size_t vl) { - return vsext_vf8_i64m1(op1, vl); + return __riscv_vsext_vf8_i64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m2( @@ -120,7 +120,7 @@ vint64m1_t test_vsext_vf8_i64m1(vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf8_i64m2(vint8mf4_t op1, size_t vl) { - return vsext_vf8_i64m2(op1, vl); + return __riscv_vsext_vf8_i64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m4( @@ -129,7 +129,7 @@ vint64m2_t test_vsext_vf8_i64m2(vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf8_i64m4(vint8mf2_t op1, size_t vl) { - return vsext_vf8_i64m4(op1, vl); + return __riscv_vsext_vf8_i64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m8( @@ -138,7 +138,7 @@ vint64m4_t test_vsext_vf8_i64m4(vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf8_i64m8(vint8m1_t op1, size_t vl) { - return vsext_vf8_i64m8(op1, vl); + return __riscv_vsext_vf8_i64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32mf2( @@ -147,7 +147,7 @@ vint64m8_t test_vsext_vf8_i64m8(vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf2_i32mf2(vint16mf4_t op1, size_t vl) { - return vsext_vf2_i32mf2(op1, vl); + return __riscv_vsext_vf2_i32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m1( @@ -156,7 +156,7 @@ vint32mf2_t test_vsext_vf2_i32mf2(vint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf2_i32m1(vint16mf2_t op1, size_t vl) { - return vsext_vf2_i32m1(op1, vl); + return __riscv_vsext_vf2_i32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m2( @@ -165,7 +165,7 @@ vint32m1_t test_vsext_vf2_i32m1(vint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf2_i32m2(vint16m1_t op1, size_t vl) { - return vsext_vf2_i32m2(op1, vl); + return __riscv_vsext_vf2_i32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m4( @@ -174,7 +174,7 @@ vint32m2_t test_vsext_vf2_i32m2(vint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf2_i32m4(vint16m2_t op1, size_t vl) { - return vsext_vf2_i32m4(op1, vl); + return __riscv_vsext_vf2_i32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m8( @@ -183,7 +183,7 @@ vint32m4_t test_vsext_vf2_i32m4(vint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf2_i32m8(vint16m4_t op1, size_t vl) { - return vsext_vf2_i32m8(op1, vl); + return __riscv_vsext_vf2_i32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m1( @@ -192,7 +192,7 @@ vint32m8_t test_vsext_vf2_i32m8(vint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf4_i64m1(vint16mf4_t op1, size_t vl) { - return vsext_vf4_i64m1(op1, vl); + return __riscv_vsext_vf4_i64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m2( @@ -201,7 +201,7 @@ vint64m1_t test_vsext_vf4_i64m1(vint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf4_i64m2(vint16mf2_t op1, size_t vl) { - return vsext_vf4_i64m2(op1, vl); + return __riscv_vsext_vf4_i64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m4( @@ -210,7 +210,7 @@ vint64m2_t test_vsext_vf4_i64m2(vint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf4_i64m4(vint16m1_t op1, size_t vl) { - return vsext_vf4_i64m4(op1, vl); + return __riscv_vsext_vf4_i64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m8( @@ -219,7 +219,7 @@ vint64m4_t test_vsext_vf4_i64m4(vint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf4_i64m8(vint16m2_t op1, size_t vl) { - return vsext_vf4_i64m8(op1, vl); + return __riscv_vsext_vf4_i64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m1( @@ -228,7 +228,7 @@ vint64m8_t test_vsext_vf4_i64m8(vint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf2_i64m1(vint32mf2_t op1, size_t vl) { - return vsext_vf2_i64m1(op1, vl); + return __riscv_vsext_vf2_i64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m2( @@ -237,7 +237,7 @@ vint64m1_t test_vsext_vf2_i64m1(vint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf2_i64m2(vint32m1_t op1, size_t vl) { - return vsext_vf2_i64m2(op1, vl); + return __riscv_vsext_vf2_i64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m4( @@ -246,7 +246,7 @@ vint64m2_t test_vsext_vf2_i64m2(vint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf2_i64m4(vint32m2_t op1, size_t vl) { - return vsext_vf2_i64m4(op1, vl); + return __riscv_vsext_vf2_i64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m8( @@ -255,7 +255,7 @@ vint64m4_t test_vsext_vf2_i64m4(vint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf2_i64m8(vint32m4_t op1, size_t vl) { - return vsext_vf2_i64m8(op1, vl); + return __riscv_vsext_vf2_i64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf4_m( @@ -264,7 +264,7 @@ vint64m8_t test_vsext_vf2_i64m8(vint32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsext_vf2_i16mf4_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { - return vsext_vf2_i16mf4_m(mask, op1, vl); + return __riscv_vsext_vf2_i16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf2_m( @@ -273,7 +273,7 @@ vint16mf4_t test_vsext_vf2_i16mf4_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsext_vf2_i16mf2_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { - return vsext_vf2_i16mf2_m(mask, op1, vl); + return __riscv_vsext_vf2_i16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m1_m( @@ -282,7 +282,7 @@ vint16mf2_t test_vsext_vf2_i16mf2_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsext_vf2_i16m1_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { - return vsext_vf2_i16m1_m(mask, op1, vl); + return __riscv_vsext_vf2_i16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m2_m( @@ -291,7 +291,7 @@ vint16m1_t test_vsext_vf2_i16m1_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsext_vf2_i16m2_m(vbool8_t mask, vint8m1_t op1, size_t vl) { - return vsext_vf2_i16m2_m(mask, op1, vl); + return __riscv_vsext_vf2_i16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m4_m( @@ -300,7 +300,7 @@ vint16m2_t test_vsext_vf2_i16m2_m(vbool8_t mask, vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsext_vf2_i16m4_m(vbool4_t mask, vint8m2_t op1, size_t vl) { - return vsext_vf2_i16m4_m(mask, op1, vl); + return __riscv_vsext_vf2_i16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m8_m( @@ -309,7 +309,7 @@ vint16m4_t test_vsext_vf2_i16m4_m(vbool4_t mask, vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsext_vf2_i16m8_m(vbool2_t mask, vint8m4_t op1, size_t vl) { - return vsext_vf2_i16m8_m(mask, op1, vl); + return __riscv_vsext_vf2_i16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32mf2_m( @@ -318,7 +318,7 @@ vint16m8_t test_vsext_vf2_i16m8_m(vbool2_t mask, vint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf4_i32mf2_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { - return vsext_vf4_i32mf2_m(mask, op1, vl); + return __riscv_vsext_vf4_i32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m1_m( @@ -327,7 +327,7 @@ vint32mf2_t test_vsext_vf4_i32mf2_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf4_i32m1_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { - return vsext_vf4_i32m1_m(mask, op1, vl); + return __riscv_vsext_vf4_i32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m2_m( @@ -336,7 +336,7 @@ vint32m1_t test_vsext_vf4_i32m1_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf4_i32m2_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { - return vsext_vf4_i32m2_m(mask, op1, vl); + return __riscv_vsext_vf4_i32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m4_m( @@ -345,7 +345,7 @@ vint32m2_t test_vsext_vf4_i32m2_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf4_i32m4_m(vbool8_t mask, vint8m1_t op1, size_t vl) { - return vsext_vf4_i32m4_m(mask, op1, vl); + return __riscv_vsext_vf4_i32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m8_m( @@ -354,7 +354,7 @@ vint32m4_t test_vsext_vf4_i32m4_m(vbool8_t mask, vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf4_i32m8_m(vbool4_t mask, vint8m2_t op1, size_t vl) { - return vsext_vf4_i32m8_m(mask, op1, vl); + return __riscv_vsext_vf4_i32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m1_m( @@ -363,7 +363,7 @@ vint32m8_t test_vsext_vf4_i32m8_m(vbool4_t mask, vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf8_i64m1_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { - return vsext_vf8_i64m1_m(mask, op1, vl); + return __riscv_vsext_vf8_i64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m2_m( @@ -372,7 +372,7 @@ vint64m1_t test_vsext_vf8_i64m1_m(vbool64_t mask, vint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf8_i64m2_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { - return vsext_vf8_i64m2_m(mask, op1, vl); + return __riscv_vsext_vf8_i64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m4_m( @@ -381,7 +381,7 @@ vint64m2_t test_vsext_vf8_i64m2_m(vbool32_t mask, vint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf8_i64m4_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { - return vsext_vf8_i64m4_m(mask, op1, vl); + return __riscv_vsext_vf8_i64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m8_m( @@ -390,7 +390,7 @@ vint64m4_t test_vsext_vf8_i64m4_m(vbool16_t mask, vint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf8_i64m8_m(vbool8_t mask, vint8m1_t op1, size_t vl) { - return vsext_vf8_i64m8_m(mask, op1, vl); + return __riscv_vsext_vf8_i64m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32mf2_m( @@ -399,7 +399,7 @@ vint64m8_t test_vsext_vf8_i64m8_m(vbool8_t mask, vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf2_i32mf2_m(vbool64_t mask, vint16mf4_t op1, size_t vl) { - return vsext_vf2_i32mf2_m(mask, op1, vl); + return __riscv_vsext_vf2_i32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m1_m( @@ -408,7 +408,7 @@ vint32mf2_t test_vsext_vf2_i32mf2_m(vbool64_t mask, vint16mf4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf2_i32m1_m(vbool32_t mask, vint16mf2_t op1, size_t vl) { - return vsext_vf2_i32m1_m(mask, op1, vl); + return __riscv_vsext_vf2_i32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m2_m( @@ -417,7 +417,7 @@ vint32m1_t test_vsext_vf2_i32m1_m(vbool32_t mask, vint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf2_i32m2_m(vbool16_t mask, vint16m1_t op1, size_t vl) { - return vsext_vf2_i32m2_m(mask, op1, vl); + return __riscv_vsext_vf2_i32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m4_m( @@ -426,7 +426,7 @@ vint32m2_t test_vsext_vf2_i32m2_m(vbool16_t mask, vint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf2_i32m4_m(vbool8_t mask, vint16m2_t op1, size_t vl) { - return vsext_vf2_i32m4_m(mask, op1, vl); + return __riscv_vsext_vf2_i32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m8_m( @@ -435,7 +435,7 @@ vint32m4_t test_vsext_vf2_i32m4_m(vbool8_t mask, vint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf2_i32m8_m(vbool4_t mask, vint16m4_t op1, size_t vl) { - return vsext_vf2_i32m8_m(mask, op1, vl); + return __riscv_vsext_vf2_i32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m1_m( @@ -444,7 +444,7 @@ vint32m8_t test_vsext_vf2_i32m8_m(vbool4_t mask, vint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf4_i64m1_m(vbool64_t mask, vint16mf4_t op1, size_t vl) { - return vsext_vf4_i64m1_m(mask, op1, vl); + return __riscv_vsext_vf4_i64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m2_m( @@ -453,7 +453,7 @@ vint64m1_t test_vsext_vf4_i64m1_m(vbool64_t mask, vint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf4_i64m2_m(vbool32_t mask, vint16mf2_t op1, size_t vl) { - return vsext_vf4_i64m2_m(mask, op1, vl); + return __riscv_vsext_vf4_i64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m4_m( @@ -462,7 +462,7 @@ vint64m2_t test_vsext_vf4_i64m2_m(vbool32_t mask, vint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf4_i64m4_m(vbool16_t mask, vint16m1_t op1, size_t vl) { - return vsext_vf4_i64m4_m(mask, op1, vl); + return __riscv_vsext_vf4_i64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m8_m( @@ -471,7 +471,7 @@ vint64m4_t test_vsext_vf4_i64m4_m(vbool16_t mask, vint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf4_i64m8_m(vbool8_t mask, vint16m2_t op1, size_t vl) { - return vsext_vf4_i64m8_m(mask, op1, vl); + return __riscv_vsext_vf4_i64m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m1_m( @@ -480,7 +480,7 @@ vint64m8_t test_vsext_vf4_i64m8_m(vbool8_t mask, vint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf2_i64m1_m(vbool64_t mask, vint32mf2_t op1, size_t vl) { - return vsext_vf2_i64m1_m(mask, op1, vl); + return __riscv_vsext_vf2_i64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m2_m( @@ -489,7 +489,7 @@ vint64m1_t test_vsext_vf2_i64m1_m(vbool64_t mask, vint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf2_i64m2_m(vbool32_t mask, vint32m1_t op1, size_t vl) { - return vsext_vf2_i64m2_m(mask, op1, vl); + return __riscv_vsext_vf2_i64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m4_m( @@ -498,7 +498,7 @@ vint64m2_t test_vsext_vf2_i64m2_m(vbool32_t mask, vint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf2_i64m4_m(vbool16_t mask, vint32m2_t op1, size_t vl) { - return vsext_vf2_i64m4_m(mask, op1, vl); + return __riscv_vsext_vf2_i64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m8_m( @@ -507,6 +507,6 @@ vint64m4_t test_vsext_vf2_i64m4_m(vbool16_t mask, vint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf2_i64m8_m(vbool8_t mask, vint32m4_t op1, size_t vl) { - return vsext_vf2_i64m8_m(mask, op1, vl); + return __riscv_vsext_vf2_i64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslide1down.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslide1down.c index f6c97d6b09fea4c10114b60696259959c5fa584c..6d1c8552537aa352147a9cfae4642f9fa99eecd8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslide1down.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslide1down.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1down_vx_i8mf8(vint8mf8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf8(src, value, vl); + return __riscv_vslide1down_vx_i8mf8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf4( @@ -21,7 +21,7 @@ vint8mf8_t test_vslide1down_vx_i8mf8(vint8mf8_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1down_vx_i8mf4(vint8mf4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf4(src, value, vl); + return __riscv_vslide1down_vx_i8mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf2( @@ -30,7 +30,7 @@ vint8mf4_t test_vslide1down_vx_i8mf4(vint8mf4_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1down_vx_i8mf2(vint8mf2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf2(src, value, vl); + return __riscv_vslide1down_vx_i8mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m1( @@ -39,7 +39,7 @@ vint8mf2_t test_vslide1down_vx_i8mf2(vint8mf2_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1down_vx_i8m1(vint8m1_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m1(src, value, vl); + return __riscv_vslide1down_vx_i8m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m2( @@ -48,7 +48,7 @@ vint8m1_t test_vslide1down_vx_i8m1(vint8m1_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1down_vx_i8m2(vint8m2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m2(src, value, vl); + return __riscv_vslide1down_vx_i8m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m4( @@ -57,7 +57,7 @@ vint8m2_t test_vslide1down_vx_i8m2(vint8m2_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1down_vx_i8m4(vint8m4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m4(src, value, vl); + return __riscv_vslide1down_vx_i8m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m8( @@ -66,7 +66,7 @@ vint8m4_t test_vslide1down_vx_i8m4(vint8m4_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1down_vx_i8m8(vint8m8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m8(src, value, vl); + return __riscv_vslide1down_vx_i8m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf4( @@ -75,7 +75,7 @@ vint8m8_t test_vslide1down_vx_i8m8(vint8m8_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1down_vx_i16mf4(vint16mf4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf4(src, value, vl); + return __riscv_vslide1down_vx_i16mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf2( @@ -84,7 +84,7 @@ vint16mf4_t test_vslide1down_vx_i16mf4(vint16mf4_t src, int16_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1down_vx_i16mf2(vint16mf2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf2(src, value, vl); + return __riscv_vslide1down_vx_i16mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m1( @@ -93,7 +93,7 @@ vint16mf2_t test_vslide1down_vx_i16mf2(vint16mf2_t src, int16_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1down_vx_i16m1(vint16m1_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m1(src, value, vl); + return __riscv_vslide1down_vx_i16m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m2( @@ -102,7 +102,7 @@ vint16m1_t test_vslide1down_vx_i16m1(vint16m1_t src, int16_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1down_vx_i16m2(vint16m2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m2(src, value, vl); + return __riscv_vslide1down_vx_i16m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m4( @@ -111,7 +111,7 @@ vint16m2_t test_vslide1down_vx_i16m2(vint16m2_t src, int16_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1down_vx_i16m4(vint16m4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m4(src, value, vl); + return __riscv_vslide1down_vx_i16m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m8( @@ -120,7 +120,7 @@ vint16m4_t test_vslide1down_vx_i16m4(vint16m4_t src, int16_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1down_vx_i16m8(vint16m8_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m8(src, value, vl); + return __riscv_vslide1down_vx_i16m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32mf2( @@ -129,7 +129,7 @@ vint16m8_t test_vslide1down_vx_i16m8(vint16m8_t src, int16_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1down_vx_i32mf2(vint32mf2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32mf2(src, value, vl); + return __riscv_vslide1down_vx_i32mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m1( @@ -138,7 +138,7 @@ vint32mf2_t test_vslide1down_vx_i32mf2(vint32mf2_t src, int32_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1down_vx_i32m1(vint32m1_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m1(src, value, vl); + return __riscv_vslide1down_vx_i32m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m2( @@ -147,7 +147,7 @@ vint32m1_t test_vslide1down_vx_i32m1(vint32m1_t src, int32_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1down_vx_i32m2(vint32m2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m2(src, value, vl); + return __riscv_vslide1down_vx_i32m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m4( @@ -156,7 +156,7 @@ vint32m2_t test_vslide1down_vx_i32m2(vint32m2_t src, int32_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1down_vx_i32m4(vint32m4_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m4(src, value, vl); + return __riscv_vslide1down_vx_i32m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m8( @@ -165,7 +165,7 @@ vint32m4_t test_vslide1down_vx_i32m4(vint32m4_t src, int32_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1down_vx_i32m8(vint32m8_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m8(src, value, vl); + return __riscv_vslide1down_vx_i32m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m1( @@ -174,7 +174,7 @@ vint32m8_t test_vslide1down_vx_i32m8(vint32m8_t src, int32_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1down_vx_i64m1(vint64m1_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m1(src, value, vl); + return __riscv_vslide1down_vx_i64m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m2( @@ -183,7 +183,7 @@ vint64m1_t test_vslide1down_vx_i64m1(vint64m1_t src, int64_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1down_vx_i64m2(vint64m2_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m2(src, value, vl); + return __riscv_vslide1down_vx_i64m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m4( @@ -192,7 +192,7 @@ vint64m2_t test_vslide1down_vx_i64m2(vint64m2_t src, int64_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1down_vx_i64m4(vint64m4_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m4(src, value, vl); + return __riscv_vslide1down_vx_i64m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m8( @@ -201,7 +201,7 @@ vint64m4_t test_vslide1down_vx_i64m4(vint64m4_t src, int64_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1down_vx_i64m8(vint64m8_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m8(src, value, vl); + return __riscv_vslide1down_vx_i64m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf8( @@ -210,7 +210,7 @@ vint64m8_t test_vslide1down_vx_i64m8(vint64m8_t src, int64_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1down_vx_u8mf8(vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf8(src, value, vl); + return __riscv_vslide1down_vx_u8mf8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf4( @@ -219,7 +219,7 @@ vuint8mf8_t test_vslide1down_vx_u8mf8(vuint8mf8_t src, uint8_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1down_vx_u8mf4(vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf4(src, value, vl); + return __riscv_vslide1down_vx_u8mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf2( @@ -228,7 +228,7 @@ vuint8mf4_t test_vslide1down_vx_u8mf4(vuint8mf4_t src, uint8_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1down_vx_u8mf2(vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf2(src, value, vl); + return __riscv_vslide1down_vx_u8mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m1( @@ -237,7 +237,7 @@ vuint8mf2_t test_vslide1down_vx_u8mf2(vuint8mf2_t src, uint8_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1down_vx_u8m1(vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m1(src, value, vl); + return __riscv_vslide1down_vx_u8m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m2( @@ -246,7 +246,7 @@ vuint8m1_t test_vslide1down_vx_u8m1(vuint8m1_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1down_vx_u8m2(vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m2(src, value, vl); + return __riscv_vslide1down_vx_u8m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m4( @@ -255,7 +255,7 @@ vuint8m2_t test_vslide1down_vx_u8m2(vuint8m2_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1down_vx_u8m4(vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m4(src, value, vl); + return __riscv_vslide1down_vx_u8m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m8( @@ -264,7 +264,7 @@ vuint8m4_t test_vslide1down_vx_u8m4(vuint8m4_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1down_vx_u8m8(vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m8(src, value, vl); + return __riscv_vslide1down_vx_u8m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf4( @@ -273,7 +273,7 @@ vuint8m8_t test_vslide1down_vx_u8m8(vuint8m8_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1down_vx_u16mf4(vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf4(src, value, vl); + return __riscv_vslide1down_vx_u16mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf2( @@ -282,7 +282,7 @@ vuint16mf4_t test_vslide1down_vx_u16mf4(vuint16mf4_t src, uint16_t value, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1down_vx_u16mf2(vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf2(src, value, vl); + return __riscv_vslide1down_vx_u16mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m1( @@ -291,7 +291,7 @@ vuint16mf2_t test_vslide1down_vx_u16mf2(vuint16mf2_t src, uint16_t value, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1down_vx_u16m1(vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m1(src, value, vl); + return __riscv_vslide1down_vx_u16m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m2( @@ -300,7 +300,7 @@ vuint16m1_t test_vslide1down_vx_u16m1(vuint16m1_t src, uint16_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1down_vx_u16m2(vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m2(src, value, vl); + return __riscv_vslide1down_vx_u16m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m4( @@ -309,7 +309,7 @@ vuint16m2_t test_vslide1down_vx_u16m2(vuint16m2_t src, uint16_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1down_vx_u16m4(vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m4(src, value, vl); + return __riscv_vslide1down_vx_u16m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m8( @@ -318,7 +318,7 @@ vuint16m4_t test_vslide1down_vx_u16m4(vuint16m4_t src, uint16_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1down_vx_u16m8(vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m8(src, value, vl); + return __riscv_vslide1down_vx_u16m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32mf2( @@ -327,7 +327,7 @@ vuint16m8_t test_vslide1down_vx_u16m8(vuint16m8_t src, uint16_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1down_vx_u32mf2(vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32mf2(src, value, vl); + return __riscv_vslide1down_vx_u32mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m1( @@ -336,7 +336,7 @@ vuint32mf2_t test_vslide1down_vx_u32mf2(vuint32mf2_t src, uint32_t value, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1down_vx_u32m1(vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m1(src, value, vl); + return __riscv_vslide1down_vx_u32m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m2( @@ -345,7 +345,7 @@ vuint32m1_t test_vslide1down_vx_u32m1(vuint32m1_t src, uint32_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1down_vx_u32m2(vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m2(src, value, vl); + return __riscv_vslide1down_vx_u32m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m4( @@ -354,7 +354,7 @@ vuint32m2_t test_vslide1down_vx_u32m2(vuint32m2_t src, uint32_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1down_vx_u32m4(vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m4(src, value, vl); + return __riscv_vslide1down_vx_u32m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m8( @@ -363,7 +363,7 @@ vuint32m4_t test_vslide1down_vx_u32m4(vuint32m4_t src, uint32_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1down_vx_u32m8(vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m8(src, value, vl); + return __riscv_vslide1down_vx_u32m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m1( @@ -372,7 +372,7 @@ vuint32m8_t test_vslide1down_vx_u32m8(vuint32m8_t src, uint32_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1down_vx_u64m1(vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m1(src, value, vl); + return __riscv_vslide1down_vx_u64m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m2( @@ -381,7 +381,7 @@ vuint64m1_t test_vslide1down_vx_u64m1(vuint64m1_t src, uint64_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1down_vx_u64m2(vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m2(src, value, vl); + return __riscv_vslide1down_vx_u64m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m4( @@ -390,7 +390,7 @@ vuint64m2_t test_vslide1down_vx_u64m2(vuint64m2_t src, uint64_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1down_vx_u64m4(vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m4(src, value, vl); + return __riscv_vslide1down_vx_u64m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m4_t test_vslide1down_vx_u64m4(vuint64m4_t src, uint64_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1down_vx_u64m8(vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m8(src, value, vl); + return __riscv_vslide1down_vx_u64m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vslide1down_vx_u64m8(vuint64m8_t src, uint64_t value, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1down_vx_i8mf8_m(vbool64_t mask, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i8mf8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf4_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vslide1down_vx_i8mf8_m(vbool64_t mask, vint8mf8_t src, int8_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1down_vx_i8mf4_m(vbool32_t mask, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i8mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf2_m( @@ -426,7 +426,7 @@ vint8mf4_t test_vslide1down_vx_i8mf4_m(vbool32_t mask, vint8mf4_t src, int8_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1down_vx_i8mf2_m(vbool16_t mask, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i8mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m1_m( @@ -435,7 +435,7 @@ vint8mf2_t test_vslide1down_vx_i8mf2_m(vbool16_t mask, vint8mf2_t src, int8_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1down_vx_i8m1_m(vbool8_t mask, vint8m1_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m1_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i8m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m2_m( @@ -444,7 +444,7 @@ vint8m1_t test_vslide1down_vx_i8m1_m(vbool8_t mask, vint8m1_t src, int8_t value, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1down_vx_i8m2_m(vbool4_t mask, vint8m2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i8m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m4_m( @@ -453,7 +453,7 @@ vint8m2_t test_vslide1down_vx_i8m2_m(vbool4_t mask, vint8m2_t src, int8_t value, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1down_vx_i8m4_m(vbool2_t mask, vint8m4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i8m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m8_m( @@ -462,7 +462,7 @@ vint8m4_t test_vslide1down_vx_i8m4_m(vbool2_t mask, vint8m4_t src, int8_t value, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1down_vx_i8m8_m(vbool1_t mask, vint8m8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i8m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf4_m( @@ -471,7 +471,7 @@ vint8m8_t test_vslide1down_vx_i8m8_m(vbool1_t mask, vint8m8_t src, int8_t value, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1down_vx_i16mf4_m(vbool64_t mask, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i16mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf2_m( @@ -480,7 +480,7 @@ vint16mf4_t test_vslide1down_vx_i16mf4_m(vbool64_t mask, vint16mf4_t src, int16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1down_vx_i16mf2_m(vbool32_t mask, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i16mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m1_m( @@ -489,7 +489,7 @@ vint16mf2_t test_vslide1down_vx_i16mf2_m(vbool32_t mask, vint16mf2_t src, int16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1down_vx_i16m1_m(vbool16_t mask, vint16m1_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m1_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i16m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m2_m( @@ -498,7 +498,7 @@ vint16m1_t test_vslide1down_vx_i16m1_m(vbool16_t mask, vint16m1_t src, int16_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1down_vx_i16m2_m(vbool8_t mask, vint16m2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i16m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m4_m( @@ -507,7 +507,7 @@ vint16m2_t test_vslide1down_vx_i16m2_m(vbool8_t mask, vint16m2_t src, int16_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1down_vx_i16m4_m(vbool4_t mask, vint16m4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i16m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m8_m( @@ -516,7 +516,7 @@ vint16m4_t test_vslide1down_vx_i16m4_m(vbool4_t mask, vint16m4_t src, int16_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1down_vx_i16m8_m(vbool2_t mask, vint16m8_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i16m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32mf2_m( @@ -525,7 +525,7 @@ vint16m8_t test_vslide1down_vx_i16m8_m(vbool2_t mask, vint16m8_t src, int16_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1down_vx_i32mf2_m(vbool64_t mask, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32mf2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i32mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m1_m( @@ -534,7 +534,7 @@ vint32mf2_t test_vslide1down_vx_i32mf2_m(vbool64_t mask, vint32mf2_t src, int32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1down_vx_i32m1_m(vbool32_t mask, vint32m1_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m1_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i32m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m2_m( @@ -543,7 +543,7 @@ vint32m1_t test_vslide1down_vx_i32m1_m(vbool32_t mask, vint32m1_t src, int32_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1down_vx_i32m2_m(vbool16_t mask, vint32m2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i32m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m4_m( @@ -552,7 +552,7 @@ vint32m2_t test_vslide1down_vx_i32m2_m(vbool16_t mask, vint32m2_t src, int32_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1down_vx_i32m4_m(vbool8_t mask, vint32m4_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i32m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m8_m( @@ -561,7 +561,7 @@ vint32m4_t test_vslide1down_vx_i32m4_m(vbool8_t mask, vint32m4_t src, int32_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1down_vx_i32m8_m(vbool4_t mask, vint32m8_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i32m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m1_m( @@ -570,7 +570,7 @@ vint32m8_t test_vslide1down_vx_i32m8_m(vbool4_t mask, vint32m8_t src, int32_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1down_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m1_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i64m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m2_m( @@ -579,7 +579,7 @@ vint64m1_t test_vslide1down_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1down_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i64m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m4_m( @@ -588,7 +588,7 @@ vint64m2_t test_vslide1down_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1down_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i64m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m8_m( @@ -597,7 +597,7 @@ vint64m4_t test_vslide1down_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1down_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_i64m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf8_m( @@ -606,7 +606,7 @@ vint64m8_t test_vslide1down_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t va // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1down_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u8mf8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf4_m( @@ -615,7 +615,7 @@ vuint8mf8_t test_vslide1down_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t src, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1down_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u8mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf2_m( @@ -624,7 +624,7 @@ vuint8mf4_t test_vslide1down_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t src, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1down_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u8mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m1_m( @@ -633,7 +633,7 @@ vuint8mf2_t test_vslide1down_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t src, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1down_vx_u8m1_m(vbool8_t mask, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m1_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u8m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m2_m( @@ -642,7 +642,7 @@ vuint8m1_t test_vslide1down_vx_u8m1_m(vbool8_t mask, vuint8m1_t src, uint8_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1down_vx_u8m2_m(vbool4_t mask, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u8m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m4_m( @@ -651,7 +651,7 @@ vuint8m2_t test_vslide1down_vx_u8m2_m(vbool4_t mask, vuint8m2_t src, uint8_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1down_vx_u8m4_m(vbool2_t mask, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u8m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m8_m( @@ -660,7 +660,7 @@ vuint8m4_t test_vslide1down_vx_u8m4_m(vbool2_t mask, vuint8m4_t src, uint8_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1down_vx_u8m8_m(vbool1_t mask, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u8m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf4_m( @@ -669,7 +669,7 @@ vuint8m8_t test_vslide1down_vx_u8m8_m(vbool1_t mask, vuint8m8_t src, uint8_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1down_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u16mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf2_m( @@ -678,7 +678,7 @@ vuint16mf4_t test_vslide1down_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t src, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1down_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u16mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m1_m( @@ -687,7 +687,7 @@ vuint16mf2_t test_vslide1down_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t src, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1down_vx_u16m1_m(vbool16_t mask, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m1_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u16m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m2_m( @@ -696,7 +696,7 @@ vuint16m1_t test_vslide1down_vx_u16m1_m(vbool16_t mask, vuint16m1_t src, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1down_vx_u16m2_m(vbool8_t mask, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u16m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m4_m( @@ -705,7 +705,7 @@ vuint16m2_t test_vslide1down_vx_u16m2_m(vbool8_t mask, vuint16m2_t src, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1down_vx_u16m4_m(vbool4_t mask, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u16m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m8_m( @@ -714,7 +714,7 @@ vuint16m4_t test_vslide1down_vx_u16m4_m(vbool4_t mask, vuint16m4_t src, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1down_vx_u16m8_m(vbool2_t mask, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u16m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32mf2_m( @@ -723,7 +723,7 @@ vuint16m8_t test_vslide1down_vx_u16m8_m(vbool2_t mask, vuint16m8_t src, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1down_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32mf2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u32mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m1_m( @@ -732,7 +732,7 @@ vuint32mf2_t test_vslide1down_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t src, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1down_vx_u32m1_m(vbool32_t mask, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m1_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u32m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m2_m( @@ -741,7 +741,7 @@ vuint32m1_t test_vslide1down_vx_u32m1_m(vbool32_t mask, vuint32m1_t src, uint32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1down_vx_u32m2_m(vbool16_t mask, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u32m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m4_m( @@ -750,7 +750,7 @@ vuint32m2_t test_vslide1down_vx_u32m2_m(vbool16_t mask, vuint32m2_t src, uint32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1down_vx_u32m4_m(vbool8_t mask, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u32m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m8_m( @@ -759,7 +759,7 @@ vuint32m4_t test_vslide1down_vx_u32m4_m(vbool8_t mask, vuint32m4_t src, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1down_vx_u32m8_m(vbool4_t mask, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u32m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m1_m( @@ -768,7 +768,7 @@ vuint32m8_t test_vslide1down_vx_u32m8_m(vbool4_t mask, vuint32m8_t src, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1down_vx_u64m1_m(vbool64_t mask, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m1_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u64m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m2_m( @@ -777,7 +777,7 @@ vuint64m1_t test_vslide1down_vx_u64m1_m(vbool64_t mask, vuint64m1_t src, uint64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1down_vx_u64m2_m(vbool32_t mask, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m2_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u64m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m4_m( @@ -786,7 +786,7 @@ vuint64m2_t test_vslide1down_vx_u64m2_m(vbool32_t mask, vuint64m2_t src, uint64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1down_vx_u64m4_m(vbool16_t mask, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m4_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u64m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m4_t test_vslide1down_vx_u64m4_m(vbool16_t mask, vuint64m4_t src, uint64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1down_vx_u64m8_m(vbool8_t mask, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m8_m(mask, src, value, vl); + return __riscv_vslide1down_vx_u64m8_m(mask, src, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslide1up.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslide1up.c index 2ed0ed20ab3c8bcad437ba23010c8aff720490ee..d11684f25ff7cc89adc2ff3ff33d0fc5e7d3984d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslide1up.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslide1up.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1up_vx_i8mf8(vint8mf8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf8(src, value, vl); + return __riscv_vslide1up_vx_i8mf8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf4( @@ -21,7 +21,7 @@ vint8mf8_t test_vslide1up_vx_i8mf8(vint8mf8_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1up_vx_i8mf4(vint8mf4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf4(src, value, vl); + return __riscv_vslide1up_vx_i8mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf2( @@ -30,7 +30,7 @@ vint8mf4_t test_vslide1up_vx_i8mf4(vint8mf4_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1up_vx_i8mf2(vint8mf2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf2(src, value, vl); + return __riscv_vslide1up_vx_i8mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m1( @@ -39,7 +39,7 @@ vint8mf2_t test_vslide1up_vx_i8mf2(vint8mf2_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1up_vx_i8m1(vint8m1_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m1(src, value, vl); + return __riscv_vslide1up_vx_i8m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m2( @@ -48,7 +48,7 @@ vint8m1_t test_vslide1up_vx_i8m1(vint8m1_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1up_vx_i8m2(vint8m2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m2(src, value, vl); + return __riscv_vslide1up_vx_i8m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m4( @@ -57,7 +57,7 @@ vint8m2_t test_vslide1up_vx_i8m2(vint8m2_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1up_vx_i8m4(vint8m4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m4(src, value, vl); + return __riscv_vslide1up_vx_i8m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m8( @@ -66,7 +66,7 @@ vint8m4_t test_vslide1up_vx_i8m4(vint8m4_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1up_vx_i8m8(vint8m8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m8(src, value, vl); + return __riscv_vslide1up_vx_i8m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf4( @@ -75,7 +75,7 @@ vint8m8_t test_vslide1up_vx_i8m8(vint8m8_t src, int8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1up_vx_i16mf4(vint16mf4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf4(src, value, vl); + return __riscv_vslide1up_vx_i16mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf2( @@ -84,7 +84,7 @@ vint16mf4_t test_vslide1up_vx_i16mf4(vint16mf4_t src, int16_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1up_vx_i16mf2(vint16mf2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf2(src, value, vl); + return __riscv_vslide1up_vx_i16mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m1( @@ -93,7 +93,7 @@ vint16mf2_t test_vslide1up_vx_i16mf2(vint16mf2_t src, int16_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1up_vx_i16m1(vint16m1_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m1(src, value, vl); + return __riscv_vslide1up_vx_i16m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m2( @@ -102,7 +102,7 @@ vint16m1_t test_vslide1up_vx_i16m1(vint16m1_t src, int16_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1up_vx_i16m2(vint16m2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m2(src, value, vl); + return __riscv_vslide1up_vx_i16m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m4( @@ -111,7 +111,7 @@ vint16m2_t test_vslide1up_vx_i16m2(vint16m2_t src, int16_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1up_vx_i16m4(vint16m4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m4(src, value, vl); + return __riscv_vslide1up_vx_i16m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m8( @@ -120,7 +120,7 @@ vint16m4_t test_vslide1up_vx_i16m4(vint16m4_t src, int16_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1up_vx_i16m8(vint16m8_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m8(src, value, vl); + return __riscv_vslide1up_vx_i16m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32mf2( @@ -129,7 +129,7 @@ vint16m8_t test_vslide1up_vx_i16m8(vint16m8_t src, int16_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1up_vx_i32mf2(vint32mf2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32mf2(src, value, vl); + return __riscv_vslide1up_vx_i32mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m1( @@ -138,7 +138,7 @@ vint32mf2_t test_vslide1up_vx_i32mf2(vint32mf2_t src, int32_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1up_vx_i32m1(vint32m1_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m1(src, value, vl); + return __riscv_vslide1up_vx_i32m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m2( @@ -147,7 +147,7 @@ vint32m1_t test_vslide1up_vx_i32m1(vint32m1_t src, int32_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1up_vx_i32m2(vint32m2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m2(src, value, vl); + return __riscv_vslide1up_vx_i32m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m4( @@ -156,7 +156,7 @@ vint32m2_t test_vslide1up_vx_i32m2(vint32m2_t src, int32_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1up_vx_i32m4(vint32m4_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m4(src, value, vl); + return __riscv_vslide1up_vx_i32m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m8( @@ -165,7 +165,7 @@ vint32m4_t test_vslide1up_vx_i32m4(vint32m4_t src, int32_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1up_vx_i32m8(vint32m8_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m8(src, value, vl); + return __riscv_vslide1up_vx_i32m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m1( @@ -174,7 +174,7 @@ vint32m8_t test_vslide1up_vx_i32m8(vint32m8_t src, int32_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1up_vx_i64m1(vint64m1_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m1(src, value, vl); + return __riscv_vslide1up_vx_i64m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m2( @@ -183,7 +183,7 @@ vint64m1_t test_vslide1up_vx_i64m1(vint64m1_t src, int64_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1up_vx_i64m2(vint64m2_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m2(src, value, vl); + return __riscv_vslide1up_vx_i64m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m4( @@ -192,7 +192,7 @@ vint64m2_t test_vslide1up_vx_i64m2(vint64m2_t src, int64_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1up_vx_i64m4(vint64m4_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m4(src, value, vl); + return __riscv_vslide1up_vx_i64m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m8( @@ -201,7 +201,7 @@ vint64m4_t test_vslide1up_vx_i64m4(vint64m4_t src, int64_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1up_vx_i64m8(vint64m8_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m8(src, value, vl); + return __riscv_vslide1up_vx_i64m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf8( @@ -210,7 +210,7 @@ vint64m8_t test_vslide1up_vx_i64m8(vint64m8_t src, int64_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1up_vx_u8mf8(vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf8(src, value, vl); + return __riscv_vslide1up_vx_u8mf8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf4( @@ -219,7 +219,7 @@ vuint8mf8_t test_vslide1up_vx_u8mf8(vuint8mf8_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1up_vx_u8mf4(vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf4(src, value, vl); + return __riscv_vslide1up_vx_u8mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf2( @@ -228,7 +228,7 @@ vuint8mf4_t test_vslide1up_vx_u8mf4(vuint8mf4_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1up_vx_u8mf2(vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf2(src, value, vl); + return __riscv_vslide1up_vx_u8mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m1( @@ -237,7 +237,7 @@ vuint8mf2_t test_vslide1up_vx_u8mf2(vuint8mf2_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1up_vx_u8m1(vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m1(src, value, vl); + return __riscv_vslide1up_vx_u8m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m2( @@ -246,7 +246,7 @@ vuint8m1_t test_vslide1up_vx_u8m1(vuint8m1_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1up_vx_u8m2(vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m2(src, value, vl); + return __riscv_vslide1up_vx_u8m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m4( @@ -255,7 +255,7 @@ vuint8m2_t test_vslide1up_vx_u8m2(vuint8m2_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1up_vx_u8m4(vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m4(src, value, vl); + return __riscv_vslide1up_vx_u8m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m8( @@ -264,7 +264,7 @@ vuint8m4_t test_vslide1up_vx_u8m4(vuint8m4_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1up_vx_u8m8(vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m8(src, value, vl); + return __riscv_vslide1up_vx_u8m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf4( @@ -273,7 +273,7 @@ vuint8m8_t test_vslide1up_vx_u8m8(vuint8m8_t src, uint8_t value, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1up_vx_u16mf4(vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf4(src, value, vl); + return __riscv_vslide1up_vx_u16mf4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf2( @@ -282,7 +282,7 @@ vuint16mf4_t test_vslide1up_vx_u16mf4(vuint16mf4_t src, uint16_t value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1up_vx_u16mf2(vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf2(src, value, vl); + return __riscv_vslide1up_vx_u16mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m1( @@ -291,7 +291,7 @@ vuint16mf2_t test_vslide1up_vx_u16mf2(vuint16mf2_t src, uint16_t value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1up_vx_u16m1(vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m1(src, value, vl); + return __riscv_vslide1up_vx_u16m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m2( @@ -300,7 +300,7 @@ vuint16m1_t test_vslide1up_vx_u16m1(vuint16m1_t src, uint16_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1up_vx_u16m2(vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m2(src, value, vl); + return __riscv_vslide1up_vx_u16m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m4( @@ -309,7 +309,7 @@ vuint16m2_t test_vslide1up_vx_u16m2(vuint16m2_t src, uint16_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1up_vx_u16m4(vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m4(src, value, vl); + return __riscv_vslide1up_vx_u16m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m8( @@ -318,7 +318,7 @@ vuint16m4_t test_vslide1up_vx_u16m4(vuint16m4_t src, uint16_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1up_vx_u16m8(vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m8(src, value, vl); + return __riscv_vslide1up_vx_u16m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32mf2( @@ -327,7 +327,7 @@ vuint16m8_t test_vslide1up_vx_u16m8(vuint16m8_t src, uint16_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1up_vx_u32mf2(vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32mf2(src, value, vl); + return __riscv_vslide1up_vx_u32mf2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m1( @@ -336,7 +336,7 @@ vuint32mf2_t test_vslide1up_vx_u32mf2(vuint32mf2_t src, uint32_t value, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1up_vx_u32m1(vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m1(src, value, vl); + return __riscv_vslide1up_vx_u32m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m2( @@ -345,7 +345,7 @@ vuint32m1_t test_vslide1up_vx_u32m1(vuint32m1_t src, uint32_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1up_vx_u32m2(vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m2(src, value, vl); + return __riscv_vslide1up_vx_u32m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m4( @@ -354,7 +354,7 @@ vuint32m2_t test_vslide1up_vx_u32m2(vuint32m2_t src, uint32_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1up_vx_u32m4(vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m4(src, value, vl); + return __riscv_vslide1up_vx_u32m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m8( @@ -363,7 +363,7 @@ vuint32m4_t test_vslide1up_vx_u32m4(vuint32m4_t src, uint32_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1up_vx_u32m8(vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m8(src, value, vl); + return __riscv_vslide1up_vx_u32m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m1( @@ -372,7 +372,7 @@ vuint32m8_t test_vslide1up_vx_u32m8(vuint32m8_t src, uint32_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1up_vx_u64m1(vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m1(src, value, vl); + return __riscv_vslide1up_vx_u64m1(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m2( @@ -381,7 +381,7 @@ vuint64m1_t test_vslide1up_vx_u64m1(vuint64m1_t src, uint64_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1up_vx_u64m2(vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m2(src, value, vl); + return __riscv_vslide1up_vx_u64m2(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m4( @@ -390,7 +390,7 @@ vuint64m2_t test_vslide1up_vx_u64m2(vuint64m2_t src, uint64_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1up_vx_u64m4(vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m4(src, value, vl); + return __riscv_vslide1up_vx_u64m4(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m4_t test_vslide1up_vx_u64m4(vuint64m4_t src, uint64_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1up_vx_u64m8(vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m8(src, value, vl); + return __riscv_vslide1up_vx_u64m8(src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vslide1up_vx_u64m8(vuint64m8_t src, uint64_t value, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1up_vx_i8mf8_m(vbool64_t mask, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i8mf8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf4_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vslide1up_vx_i8mf8_m(vbool64_t mask, vint8mf8_t src, int8_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1up_vx_i8mf4_m(vbool32_t mask, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i8mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf2_m( @@ -426,7 +426,7 @@ vint8mf4_t test_vslide1up_vx_i8mf4_m(vbool32_t mask, vint8mf4_t src, int8_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1up_vx_i8mf2_m(vbool16_t mask, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i8mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m1_m( @@ -435,7 +435,7 @@ vint8mf2_t test_vslide1up_vx_i8mf2_m(vbool16_t mask, vint8mf2_t src, int8_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1up_vx_i8m1_m(vbool8_t mask, vint8m1_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m1_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i8m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m2_m( @@ -444,7 +444,7 @@ vint8m1_t test_vslide1up_vx_i8m1_m(vbool8_t mask, vint8m1_t src, int8_t value, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1up_vx_i8m2_m(vbool4_t mask, vint8m2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i8m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m4_m( @@ -453,7 +453,7 @@ vint8m2_t test_vslide1up_vx_i8m2_m(vbool4_t mask, vint8m2_t src, int8_t value, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1up_vx_i8m4_m(vbool2_t mask, vint8m4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i8m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m8_m( @@ -462,7 +462,7 @@ vint8m4_t test_vslide1up_vx_i8m4_m(vbool2_t mask, vint8m4_t src, int8_t value, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1up_vx_i8m8_m(vbool1_t mask, vint8m8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i8m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf4_m( @@ -471,7 +471,7 @@ vint8m8_t test_vslide1up_vx_i8m8_m(vbool1_t mask, vint8m8_t src, int8_t value, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1up_vx_i16mf4_m(vbool64_t mask, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i16mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf2_m( @@ -480,7 +480,7 @@ vint16mf4_t test_vslide1up_vx_i16mf4_m(vbool64_t mask, vint16mf4_t src, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1up_vx_i16mf2_m(vbool32_t mask, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i16mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m1_m( @@ -489,7 +489,7 @@ vint16mf2_t test_vslide1up_vx_i16mf2_m(vbool32_t mask, vint16mf2_t src, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1up_vx_i16m1_m(vbool16_t mask, vint16m1_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m1_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i16m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m2_m( @@ -498,7 +498,7 @@ vint16m1_t test_vslide1up_vx_i16m1_m(vbool16_t mask, vint16m1_t src, int16_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1up_vx_i16m2_m(vbool8_t mask, vint16m2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i16m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m4_m( @@ -507,7 +507,7 @@ vint16m2_t test_vslide1up_vx_i16m2_m(vbool8_t mask, vint16m2_t src, int16_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1up_vx_i16m4_m(vbool4_t mask, vint16m4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i16m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m8_m( @@ -516,7 +516,7 @@ vint16m4_t test_vslide1up_vx_i16m4_m(vbool4_t mask, vint16m4_t src, int16_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1up_vx_i16m8_m(vbool2_t mask, vint16m8_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i16m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32mf2_m( @@ -525,7 +525,7 @@ vint16m8_t test_vslide1up_vx_i16m8_m(vbool2_t mask, vint16m8_t src, int16_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1up_vx_i32mf2_m(vbool64_t mask, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32mf2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i32mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m1_m( @@ -534,7 +534,7 @@ vint32mf2_t test_vslide1up_vx_i32mf2_m(vbool64_t mask, vint32mf2_t src, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1up_vx_i32m1_m(vbool32_t mask, vint32m1_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m1_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i32m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m2_m( @@ -543,7 +543,7 @@ vint32m1_t test_vslide1up_vx_i32m1_m(vbool32_t mask, vint32m1_t src, int32_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1up_vx_i32m2_m(vbool16_t mask, vint32m2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i32m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m4_m( @@ -552,7 +552,7 @@ vint32m2_t test_vslide1up_vx_i32m2_m(vbool16_t mask, vint32m2_t src, int32_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1up_vx_i32m4_m(vbool8_t mask, vint32m4_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i32m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m8_m( @@ -561,7 +561,7 @@ vint32m4_t test_vslide1up_vx_i32m4_m(vbool8_t mask, vint32m4_t src, int32_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1up_vx_i32m8_m(vbool4_t mask, vint32m8_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i32m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m1_m( @@ -570,7 +570,7 @@ vint32m8_t test_vslide1up_vx_i32m8_m(vbool4_t mask, vint32m8_t src, int32_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m1_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i64m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m2_m( @@ -579,7 +579,7 @@ vint64m1_t test_vslide1up_vx_i64m1_m(vbool64_t mask, vint64m1_t src, int64_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1up_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i64m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m4_m( @@ -588,7 +588,7 @@ vint64m2_t test_vslide1up_vx_i64m2_m(vbool32_t mask, vint64m2_t src, int64_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1up_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i64m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m8_m( @@ -597,7 +597,7 @@ vint64m4_t test_vslide1up_vx_i64m4_m(vbool16_t mask, vint64m4_t src, int64_t val // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1up_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_i64m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf8_m( @@ -606,7 +606,7 @@ vint64m8_t test_vslide1up_vx_i64m8_m(vbool8_t mask, vint64m8_t src, int64_t valu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1up_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u8mf8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf4_m( @@ -615,7 +615,7 @@ vuint8mf8_t test_vslide1up_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t src, uint8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1up_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u8mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf2_m( @@ -624,7 +624,7 @@ vuint8mf4_t test_vslide1up_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t src, uint8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1up_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u8mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m1_m( @@ -633,7 +633,7 @@ vuint8mf2_t test_vslide1up_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t src, uint8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1up_vx_u8m1_m(vbool8_t mask, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m1_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u8m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m2_m( @@ -642,7 +642,7 @@ vuint8m1_t test_vslide1up_vx_u8m1_m(vbool8_t mask, vuint8m1_t src, uint8_t value // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1up_vx_u8m2_m(vbool4_t mask, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u8m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m4_m( @@ -651,7 +651,7 @@ vuint8m2_t test_vslide1up_vx_u8m2_m(vbool4_t mask, vuint8m2_t src, uint8_t value // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1up_vx_u8m4_m(vbool2_t mask, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u8m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m8_m( @@ -660,7 +660,7 @@ vuint8m4_t test_vslide1up_vx_u8m4_m(vbool2_t mask, vuint8m4_t src, uint8_t value // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1up_vx_u8m8_m(vbool1_t mask, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u8m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf4_m( @@ -669,7 +669,7 @@ vuint8m8_t test_vslide1up_vx_u8m8_m(vbool1_t mask, vuint8m8_t src, uint8_t value // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1up_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u16mf4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf2_m( @@ -678,7 +678,7 @@ vuint16mf4_t test_vslide1up_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t src, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1up_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u16mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m1_m( @@ -687,7 +687,7 @@ vuint16mf2_t test_vslide1up_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t src, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1up_vx_u16m1_m(vbool16_t mask, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m1_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u16m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m2_m( @@ -696,7 +696,7 @@ vuint16m1_t test_vslide1up_vx_u16m1_m(vbool16_t mask, vuint16m1_t src, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1up_vx_u16m2_m(vbool8_t mask, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u16m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m4_m( @@ -705,7 +705,7 @@ vuint16m2_t test_vslide1up_vx_u16m2_m(vbool8_t mask, vuint16m2_t src, uint16_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1up_vx_u16m4_m(vbool4_t mask, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u16m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m8_m( @@ -714,7 +714,7 @@ vuint16m4_t test_vslide1up_vx_u16m4_m(vbool4_t mask, vuint16m4_t src, uint16_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1up_vx_u16m8_m(vbool2_t mask, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u16m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32mf2_m( @@ -723,7 +723,7 @@ vuint16m8_t test_vslide1up_vx_u16m8_m(vbool2_t mask, vuint16m8_t src, uint16_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1up_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32mf2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u32mf2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m1_m( @@ -732,7 +732,7 @@ vuint32mf2_t test_vslide1up_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t src, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1up_vx_u32m1_m(vbool32_t mask, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m1_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u32m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m2_m( @@ -741,7 +741,7 @@ vuint32m1_t test_vslide1up_vx_u32m1_m(vbool32_t mask, vuint32m1_t src, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1up_vx_u32m2_m(vbool16_t mask, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u32m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m4_m( @@ -750,7 +750,7 @@ vuint32m2_t test_vslide1up_vx_u32m2_m(vbool16_t mask, vuint32m2_t src, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1up_vx_u32m4_m(vbool8_t mask, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u32m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m8_m( @@ -759,7 +759,7 @@ vuint32m4_t test_vslide1up_vx_u32m4_m(vbool8_t mask, vuint32m4_t src, uint32_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1up_vx_u32m8_m(vbool4_t mask, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u32m8_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m1_m( @@ -768,7 +768,7 @@ vuint32m8_t test_vslide1up_vx_u32m8_m(vbool4_t mask, vuint32m8_t src, uint32_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1up_vx_u64m1_m(vbool64_t mask, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m1_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u64m1_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m2_m( @@ -777,7 +777,7 @@ vuint64m1_t test_vslide1up_vx_u64m1_m(vbool64_t mask, vuint64m1_t src, uint64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1up_vx_u64m2_m(vbool32_t mask, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m2_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u64m2_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m4_m( @@ -786,7 +786,7 @@ vuint64m2_t test_vslide1up_vx_u64m2_m(vbool32_t mask, vuint64m2_t src, uint64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1up_vx_u64m4_m(vbool16_t mask, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m4_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u64m4_m(mask, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m4_t test_vslide1up_vx_u64m4_m(vbool16_t mask, vuint64m4_t src, uint64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1up_vx_u64m8_m(vbool8_t mask, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m8_m(mask, src, value, vl); + return __riscv_vslide1up_vx_u64m8_m(mask, src, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c index b3ccddd5246b4aaecdf089790ae038d10b20208d..c3ac7605e94a1e33e03cc3c3d40692a9c6e088b6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslidedown.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslidedown_vx_f16mf4(vfloat16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf4(src, offset, vl); + return __riscv_vslidedown_vx_f16mf4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vslidedown_vx_f16mf4(vfloat16mf4_t src, size_t offset, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslidedown_vx_f16mf2(vfloat16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf2(src, offset, vl); + return __riscv_vslidedown_vx_f16mf2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vslidedown_vx_f16mf2(vfloat16mf2_t src, size_t offset, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslidedown_vx_f16m1(vfloat16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m1(src, offset, vl); + return __riscv_vslidedown_vx_f16m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vslidedown_vx_f16m1(vfloat16m1_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslidedown_vx_f16m2(vfloat16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m2(src, offset, vl); + return __riscv_vslidedown_vx_f16m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vslidedown_vx_f16m2(vfloat16m2_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslidedown_vx_f16m4(vfloat16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m4(src, offset, vl); + return __riscv_vslidedown_vx_f16m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vslidedown_vx_f16m4(vfloat16m4_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslidedown_vx_f16m8(vfloat16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m8(src, offset, vl); + return __riscv_vslidedown_vx_f16m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vslidedown_vx_f16m8(vfloat16m8_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslidedown_vx_f32mf2(vfloat32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32mf2(src, offset, vl); + return __riscv_vslidedown_vx_f32mf2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vslidedown_vx_f32mf2(vfloat32mf2_t src, size_t offset, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslidedown_vx_f32m1(vfloat32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m1(src, offset, vl); + return __riscv_vslidedown_vx_f32m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vslidedown_vx_f32m1(vfloat32m1_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslidedown_vx_f32m2(vfloat32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m2(src, offset, vl); + return __riscv_vslidedown_vx_f32m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vslidedown_vx_f32m2(vfloat32m2_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslidedown_vx_f32m4(vfloat32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m4(src, offset, vl); + return __riscv_vslidedown_vx_f32m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vslidedown_vx_f32m4(vfloat32m4_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslidedown_vx_f32m8(vfloat32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m8(src, offset, vl); + return __riscv_vslidedown_vx_f32m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vslidedown_vx_f32m8(vfloat32m8_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslidedown_vx_f64m1(vfloat64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m1(src, offset, vl); + return __riscv_vslidedown_vx_f64m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vslidedown_vx_f64m1(vfloat64m1_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslidedown_vx_f64m2(vfloat64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m2(src, offset, vl); + return __riscv_vslidedown_vx_f64m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vslidedown_vx_f64m2(vfloat64m2_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslidedown_vx_f64m4(vfloat64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m4(src, offset, vl); + return __riscv_vslidedown_vx_f64m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vslidedown_vx_f64m4(vfloat64m4_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslidedown_vx_f64m8(vfloat64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m8(src, offset, vl); + return __riscv_vslidedown_vx_f64m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf8( @@ -148,7 +148,7 @@ vfloat64m8_t test_vslidedown_vx_f64m8(vfloat64m8_t src, size_t offset, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslidedown_vx_i8mf8(vint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf8(src, offset, vl); + return __riscv_vslidedown_vx_i8mf8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf4( @@ -157,7 +157,7 @@ vint8mf8_t test_vslidedown_vx_i8mf8(vint8mf8_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslidedown_vx_i8mf4(vint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf4(src, offset, vl); + return __riscv_vslidedown_vx_i8mf4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf2( @@ -166,7 +166,7 @@ vint8mf4_t test_vslidedown_vx_i8mf4(vint8mf4_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslidedown_vx_i8mf2(vint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf2(src, offset, vl); + return __riscv_vslidedown_vx_i8mf2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m1( @@ -175,7 +175,7 @@ vint8mf2_t test_vslidedown_vx_i8mf2(vint8mf2_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslidedown_vx_i8m1(vint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m1(src, offset, vl); + return __riscv_vslidedown_vx_i8m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m2( @@ -184,7 +184,7 @@ vint8m1_t test_vslidedown_vx_i8m1(vint8m1_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslidedown_vx_i8m2(vint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m2(src, offset, vl); + return __riscv_vslidedown_vx_i8m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m4( @@ -193,7 +193,7 @@ vint8m2_t test_vslidedown_vx_i8m2(vint8m2_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslidedown_vx_i8m4(vint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m4(src, offset, vl); + return __riscv_vslidedown_vx_i8m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m8( @@ -202,7 +202,7 @@ vint8m4_t test_vslidedown_vx_i8m4(vint8m4_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslidedown_vx_i8m8(vint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m8(src, offset, vl); + return __riscv_vslidedown_vx_i8m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf4( @@ -211,7 +211,7 @@ vint8m8_t test_vslidedown_vx_i8m8(vint8m8_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslidedown_vx_i16mf4(vint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf4(src, offset, vl); + return __riscv_vslidedown_vx_i16mf4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf2( @@ -220,7 +220,7 @@ vint16mf4_t test_vslidedown_vx_i16mf4(vint16mf4_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslidedown_vx_i16mf2(vint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf2(src, offset, vl); + return __riscv_vslidedown_vx_i16mf2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m1( @@ -229,7 +229,7 @@ vint16mf2_t test_vslidedown_vx_i16mf2(vint16mf2_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslidedown_vx_i16m1(vint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m1(src, offset, vl); + return __riscv_vslidedown_vx_i16m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m2( @@ -238,7 +238,7 @@ vint16m1_t test_vslidedown_vx_i16m1(vint16m1_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslidedown_vx_i16m2(vint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m2(src, offset, vl); + return __riscv_vslidedown_vx_i16m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m4( @@ -247,7 +247,7 @@ vint16m2_t test_vslidedown_vx_i16m2(vint16m2_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslidedown_vx_i16m4(vint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m4(src, offset, vl); + return __riscv_vslidedown_vx_i16m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m8( @@ -256,7 +256,7 @@ vint16m4_t test_vslidedown_vx_i16m4(vint16m4_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslidedown_vx_i16m8(vint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m8(src, offset, vl); + return __riscv_vslidedown_vx_i16m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32mf2( @@ -265,7 +265,7 @@ vint16m8_t test_vslidedown_vx_i16m8(vint16m8_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslidedown_vx_i32mf2(vint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32mf2(src, offset, vl); + return __riscv_vslidedown_vx_i32mf2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m1( @@ -274,7 +274,7 @@ vint32mf2_t test_vslidedown_vx_i32mf2(vint32mf2_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslidedown_vx_i32m1(vint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m1(src, offset, vl); + return __riscv_vslidedown_vx_i32m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vslidedown_vx_i32m1(vint32m1_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslidedown_vx_i32m2(vint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m2(src, offset, vl); + return __riscv_vslidedown_vx_i32m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m4( @@ -292,7 +292,7 @@ vint32m2_t test_vslidedown_vx_i32m2(vint32m2_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslidedown_vx_i32m4(vint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m4(src, offset, vl); + return __riscv_vslidedown_vx_i32m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m8( @@ -301,7 +301,7 @@ vint32m4_t test_vslidedown_vx_i32m4(vint32m4_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslidedown_vx_i32m8(vint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m8(src, offset, vl); + return __riscv_vslidedown_vx_i32m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m1( @@ -310,7 +310,7 @@ vint32m8_t test_vslidedown_vx_i32m8(vint32m8_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslidedown_vx_i64m1(vint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m1(src, offset, vl); + return __riscv_vslidedown_vx_i64m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m2( @@ -319,7 +319,7 @@ vint64m1_t test_vslidedown_vx_i64m1(vint64m1_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslidedown_vx_i64m2(vint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m2(src, offset, vl); + return __riscv_vslidedown_vx_i64m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m4( @@ -328,7 +328,7 @@ vint64m2_t test_vslidedown_vx_i64m2(vint64m2_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslidedown_vx_i64m4(vint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m4(src, offset, vl); + return __riscv_vslidedown_vx_i64m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m8( @@ -337,7 +337,7 @@ vint64m4_t test_vslidedown_vx_i64m4(vint64m4_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslidedown_vx_i64m8(vint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m8(src, offset, vl); + return __riscv_vslidedown_vx_i64m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf8( @@ -346,7 +346,7 @@ vint64m8_t test_vslidedown_vx_i64m8(vint64m8_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslidedown_vx_u8mf8(vuint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf8(src, offset, vl); + return __riscv_vslidedown_vx_u8mf8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf4( @@ -355,7 +355,7 @@ vuint8mf8_t test_vslidedown_vx_u8mf8(vuint8mf8_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslidedown_vx_u8mf4(vuint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf4(src, offset, vl); + return __riscv_vslidedown_vx_u8mf4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf2( @@ -364,7 +364,7 @@ vuint8mf4_t test_vslidedown_vx_u8mf4(vuint8mf4_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslidedown_vx_u8mf2(vuint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf2(src, offset, vl); + return __riscv_vslidedown_vx_u8mf2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m1( @@ -373,7 +373,7 @@ vuint8mf2_t test_vslidedown_vx_u8mf2(vuint8mf2_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslidedown_vx_u8m1(vuint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m1(src, offset, vl); + return __riscv_vslidedown_vx_u8m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m2( @@ -382,7 +382,7 @@ vuint8m1_t test_vslidedown_vx_u8m1(vuint8m1_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslidedown_vx_u8m2(vuint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m2(src, offset, vl); + return __riscv_vslidedown_vx_u8m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m4( @@ -391,7 +391,7 @@ vuint8m2_t test_vslidedown_vx_u8m2(vuint8m2_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslidedown_vx_u8m4(vuint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m4(src, offset, vl); + return __riscv_vslidedown_vx_u8m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m8( @@ -400,7 +400,7 @@ vuint8m4_t test_vslidedown_vx_u8m4(vuint8m4_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslidedown_vx_u8m8(vuint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m8(src, offset, vl); + return __riscv_vslidedown_vx_u8m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf4( @@ -409,7 +409,7 @@ vuint8m8_t test_vslidedown_vx_u8m8(vuint8m8_t src, size_t offset, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslidedown_vx_u16mf4(vuint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf4(src, offset, vl); + return __riscv_vslidedown_vx_u16mf4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf2( @@ -418,7 +418,7 @@ vuint16mf4_t test_vslidedown_vx_u16mf4(vuint16mf4_t src, size_t offset, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslidedown_vx_u16mf2(vuint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf2(src, offset, vl); + return __riscv_vslidedown_vx_u16mf2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m1( @@ -427,7 +427,7 @@ vuint16mf2_t test_vslidedown_vx_u16mf2(vuint16mf2_t src, size_t offset, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslidedown_vx_u16m1(vuint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m1(src, offset, vl); + return __riscv_vslidedown_vx_u16m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m2( @@ -436,7 +436,7 @@ vuint16m1_t test_vslidedown_vx_u16m1(vuint16m1_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslidedown_vx_u16m2(vuint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m2(src, offset, vl); + return __riscv_vslidedown_vx_u16m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m4( @@ -445,7 +445,7 @@ vuint16m2_t test_vslidedown_vx_u16m2(vuint16m2_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslidedown_vx_u16m4(vuint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m4(src, offset, vl); + return __riscv_vslidedown_vx_u16m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m8( @@ -454,7 +454,7 @@ vuint16m4_t test_vslidedown_vx_u16m4(vuint16m4_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslidedown_vx_u16m8(vuint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m8(src, offset, vl); + return __riscv_vslidedown_vx_u16m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32mf2( @@ -463,7 +463,7 @@ vuint16m8_t test_vslidedown_vx_u16m8(vuint16m8_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslidedown_vx_u32mf2(vuint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32mf2(src, offset, vl); + return __riscv_vslidedown_vx_u32mf2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m1( @@ -472,7 +472,7 @@ vuint32mf2_t test_vslidedown_vx_u32mf2(vuint32mf2_t src, size_t offset, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslidedown_vx_u32m1(vuint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m1(src, offset, vl); + return __riscv_vslidedown_vx_u32m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m2( @@ -481,7 +481,7 @@ vuint32m1_t test_vslidedown_vx_u32m1(vuint32m1_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslidedown_vx_u32m2(vuint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m2(src, offset, vl); + return __riscv_vslidedown_vx_u32m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m4( @@ -490,7 +490,7 @@ vuint32m2_t test_vslidedown_vx_u32m2(vuint32m2_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslidedown_vx_u32m4(vuint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m4(src, offset, vl); + return __riscv_vslidedown_vx_u32m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m8( @@ -499,7 +499,7 @@ vuint32m4_t test_vslidedown_vx_u32m4(vuint32m4_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslidedown_vx_u32m8(vuint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m8(src, offset, vl); + return __riscv_vslidedown_vx_u32m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m1( @@ -508,7 +508,7 @@ vuint32m8_t test_vslidedown_vx_u32m8(vuint32m8_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslidedown_vx_u64m1(vuint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m1(src, offset, vl); + return __riscv_vslidedown_vx_u64m1(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m2( @@ -517,7 +517,7 @@ vuint64m1_t test_vslidedown_vx_u64m1(vuint64m1_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslidedown_vx_u64m2(vuint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m2(src, offset, vl); + return __riscv_vslidedown_vx_u64m2(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m4( @@ -526,7 +526,7 @@ vuint64m2_t test_vslidedown_vx_u64m2(vuint64m2_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslidedown_vx_u64m4(vuint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m4(src, offset, vl); + return __riscv_vslidedown_vx_u64m4(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m8( @@ -535,7 +535,7 @@ vuint64m4_t test_vslidedown_vx_u64m4(vuint64m4_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslidedown_vx_u64m8(vuint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m8(src, offset, vl); + return __riscv_vslidedown_vx_u64m8(src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf4_m( @@ -544,7 +544,7 @@ vuint64m8_t test_vslidedown_vx_u64m8(vuint64m8_t src, size_t offset, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslidedown_vx_f16mf4_m(vbool64_t mask, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f16mf4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf2_m( @@ -553,7 +553,7 @@ vfloat16mf4_t test_vslidedown_vx_f16mf4_m(vbool64_t mask, vfloat16mf4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslidedown_vx_f16mf2_m(vbool32_t mask, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f16mf2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m1_m( @@ -562,7 +562,7 @@ vfloat16mf2_t test_vslidedown_vx_f16mf2_m(vbool32_t mask, vfloat16mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslidedown_vx_f16m1_m(vbool16_t mask, vfloat16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f16m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m2_m( @@ -571,7 +571,7 @@ vfloat16m1_t test_vslidedown_vx_f16m1_m(vbool16_t mask, vfloat16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslidedown_vx_f16m2_m(vbool8_t mask, vfloat16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f16m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m4_m( @@ -580,7 +580,7 @@ vfloat16m2_t test_vslidedown_vx_f16m2_m(vbool8_t mask, vfloat16m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslidedown_vx_f16m4_m(vbool4_t mask, vfloat16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f16m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m8_m( @@ -589,7 +589,7 @@ vfloat16m4_t test_vslidedown_vx_f16m4_m(vbool4_t mask, vfloat16m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslidedown_vx_f16m8_m(vbool2_t mask, vfloat16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f16m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32mf2_m( @@ -598,7 +598,7 @@ vfloat16m8_t test_vslidedown_vx_f16m8_m(vbool2_t mask, vfloat16m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslidedown_vx_f32mf2_m(vbool64_t mask, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32mf2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f32mf2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m1_m( @@ -607,7 +607,7 @@ vfloat32mf2_t test_vslidedown_vx_f32mf2_m(vbool64_t mask, vfloat32mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslidedown_vx_f32m1_m(vbool32_t mask, vfloat32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f32m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m2_m( @@ -616,7 +616,7 @@ vfloat32m1_t test_vslidedown_vx_f32m1_m(vbool32_t mask, vfloat32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslidedown_vx_f32m2_m(vbool16_t mask, vfloat32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f32m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m4_m( @@ -625,7 +625,7 @@ vfloat32m2_t test_vslidedown_vx_f32m2_m(vbool16_t mask, vfloat32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslidedown_vx_f32m4_m(vbool8_t mask, vfloat32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f32m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m8_m( @@ -634,7 +634,7 @@ vfloat32m4_t test_vslidedown_vx_f32m4_m(vbool8_t mask, vfloat32m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslidedown_vx_f32m8_m(vbool4_t mask, vfloat32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f32m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m1_m( @@ -643,7 +643,7 @@ vfloat32m8_t test_vslidedown_vx_f32m8_m(vbool4_t mask, vfloat32m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslidedown_vx_f64m1_m(vbool64_t mask, vfloat64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f64m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m2_m( @@ -652,7 +652,7 @@ vfloat64m1_t test_vslidedown_vx_f64m1_m(vbool64_t mask, vfloat64m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslidedown_vx_f64m2_m(vbool32_t mask, vfloat64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f64m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m4_m( @@ -661,7 +661,7 @@ vfloat64m2_t test_vslidedown_vx_f64m2_m(vbool32_t mask, vfloat64m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslidedown_vx_f64m4_m(vbool16_t mask, vfloat64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f64m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m8_m( @@ -670,7 +670,7 @@ vfloat64m4_t test_vslidedown_vx_f64m4_m(vbool16_t mask, vfloat64m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslidedown_vx_f64m8_m(vbool8_t mask, vfloat64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_f64m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf8_m( @@ -679,7 +679,7 @@ vfloat64m8_t test_vslidedown_vx_f64m8_m(vbool8_t mask, vfloat64m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslidedown_vx_i8mf8_m(vbool64_t mask, vint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i8mf8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf4_m( @@ -688,7 +688,7 @@ vint8mf8_t test_vslidedown_vx_i8mf8_m(vbool64_t mask, vint8mf8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslidedown_vx_i8mf4_m(vbool32_t mask, vint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i8mf4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf2_m( @@ -697,7 +697,7 @@ vint8mf4_t test_vslidedown_vx_i8mf4_m(vbool32_t mask, vint8mf4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslidedown_vx_i8mf2_m(vbool16_t mask, vint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i8mf2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m1_m( @@ -706,7 +706,7 @@ vint8mf2_t test_vslidedown_vx_i8mf2_m(vbool16_t mask, vint8mf2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslidedown_vx_i8m1_m(vbool8_t mask, vint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i8m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m2_m( @@ -715,7 +715,7 @@ vint8m1_t test_vslidedown_vx_i8m1_m(vbool8_t mask, vint8m1_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslidedown_vx_i8m2_m(vbool4_t mask, vint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i8m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m4_m( @@ -724,7 +724,7 @@ vint8m2_t test_vslidedown_vx_i8m2_m(vbool4_t mask, vint8m2_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslidedown_vx_i8m4_m(vbool2_t mask, vint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i8m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m8_m( @@ -733,7 +733,7 @@ vint8m4_t test_vslidedown_vx_i8m4_m(vbool2_t mask, vint8m4_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslidedown_vx_i8m8_m(vbool1_t mask, vint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i8m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf4_m( @@ -742,7 +742,7 @@ vint8m8_t test_vslidedown_vx_i8m8_m(vbool1_t mask, vint8m8_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslidedown_vx_i16mf4_m(vbool64_t mask, vint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i16mf4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf2_m( @@ -751,7 +751,7 @@ vint16mf4_t test_vslidedown_vx_i16mf4_m(vbool64_t mask, vint16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslidedown_vx_i16mf2_m(vbool32_t mask, vint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i16mf2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m1_m( @@ -760,7 +760,7 @@ vint16mf2_t test_vslidedown_vx_i16mf2_m(vbool32_t mask, vint16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslidedown_vx_i16m1_m(vbool16_t mask, vint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i16m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m2_m( @@ -769,7 +769,7 @@ vint16m1_t test_vslidedown_vx_i16m1_m(vbool16_t mask, vint16m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslidedown_vx_i16m2_m(vbool8_t mask, vint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i16m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m4_m( @@ -778,7 +778,7 @@ vint16m2_t test_vslidedown_vx_i16m2_m(vbool8_t mask, vint16m2_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslidedown_vx_i16m4_m(vbool4_t mask, vint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i16m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m8_m( @@ -787,7 +787,7 @@ vint16m4_t test_vslidedown_vx_i16m4_m(vbool4_t mask, vint16m4_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslidedown_vx_i16m8_m(vbool2_t mask, vint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i16m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32mf2_m( @@ -796,7 +796,7 @@ vint16m8_t test_vslidedown_vx_i16m8_m(vbool2_t mask, vint16m8_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslidedown_vx_i32mf2_m(vbool64_t mask, vint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32mf2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i32mf2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m1_m( @@ -805,7 +805,7 @@ vint32mf2_t test_vslidedown_vx_i32mf2_m(vbool64_t mask, vint32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslidedown_vx_i32m1_m(vbool32_t mask, vint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i32m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m2_m( @@ -814,7 +814,7 @@ vint32m1_t test_vslidedown_vx_i32m1_m(vbool32_t mask, vint32m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslidedown_vx_i32m2_m(vbool16_t mask, vint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i32m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m4_m( @@ -823,7 +823,7 @@ vint32m2_t test_vslidedown_vx_i32m2_m(vbool16_t mask, vint32m2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslidedown_vx_i32m4_m(vbool8_t mask, vint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i32m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m8_m( @@ -832,7 +832,7 @@ vint32m4_t test_vslidedown_vx_i32m4_m(vbool8_t mask, vint32m4_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslidedown_vx_i32m8_m(vbool4_t mask, vint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i32m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m1_m( @@ -841,7 +841,7 @@ vint32m8_t test_vslidedown_vx_i32m8_m(vbool4_t mask, vint32m8_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslidedown_vx_i64m1_m(vbool64_t mask, vint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i64m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m2_m( @@ -850,7 +850,7 @@ vint64m1_t test_vslidedown_vx_i64m1_m(vbool64_t mask, vint64m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslidedown_vx_i64m2_m(vbool32_t mask, vint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i64m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m4_m( @@ -859,7 +859,7 @@ vint64m2_t test_vslidedown_vx_i64m2_m(vbool32_t mask, vint64m2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslidedown_vx_i64m4_m(vbool16_t mask, vint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i64m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m8_m( @@ -868,7 +868,7 @@ vint64m4_t test_vslidedown_vx_i64m4_m(vbool16_t mask, vint64m4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslidedown_vx_i64m8_m(vbool8_t mask, vint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_i64m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf8_m( @@ -877,7 +877,7 @@ vint64m8_t test_vslidedown_vx_i64m8_m(vbool8_t mask, vint64m8_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslidedown_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u8mf8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf4_m( @@ -886,7 +886,7 @@ vuint8mf8_t test_vslidedown_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslidedown_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u8mf4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf2_m( @@ -895,7 +895,7 @@ vuint8mf4_t test_vslidedown_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslidedown_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u8mf2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m1_m( @@ -904,7 +904,7 @@ vuint8mf2_t test_vslidedown_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslidedown_vx_u8m1_m(vbool8_t mask, vuint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u8m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m2_m( @@ -913,7 +913,7 @@ vuint8m1_t test_vslidedown_vx_u8m1_m(vbool8_t mask, vuint8m1_t src, size_t offse // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslidedown_vx_u8m2_m(vbool4_t mask, vuint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u8m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m4_m( @@ -922,7 +922,7 @@ vuint8m2_t test_vslidedown_vx_u8m2_m(vbool4_t mask, vuint8m2_t src, size_t offse // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslidedown_vx_u8m4_m(vbool2_t mask, vuint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u8m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m8_m( @@ -931,7 +931,7 @@ vuint8m4_t test_vslidedown_vx_u8m4_m(vbool2_t mask, vuint8m4_t src, size_t offse // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslidedown_vx_u8m8_m(vbool1_t mask, vuint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u8m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf4_m( @@ -940,7 +940,7 @@ vuint8m8_t test_vslidedown_vx_u8m8_m(vbool1_t mask, vuint8m8_t src, size_t offse // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslidedown_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u16mf4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf2_m( @@ -949,7 +949,7 @@ vuint16mf4_t test_vslidedown_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslidedown_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u16mf2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m1_m( @@ -958,7 +958,7 @@ vuint16mf2_t test_vslidedown_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslidedown_vx_u16m1_m(vbool16_t mask, vuint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u16m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m2_m( @@ -967,7 +967,7 @@ vuint16m1_t test_vslidedown_vx_u16m1_m(vbool16_t mask, vuint16m1_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslidedown_vx_u16m2_m(vbool8_t mask, vuint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u16m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m4_m( @@ -976,7 +976,7 @@ vuint16m2_t test_vslidedown_vx_u16m2_m(vbool8_t mask, vuint16m2_t src, size_t of // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslidedown_vx_u16m4_m(vbool4_t mask, vuint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u16m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m8_m( @@ -985,7 +985,7 @@ vuint16m4_t test_vslidedown_vx_u16m4_m(vbool4_t mask, vuint16m4_t src, size_t of // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslidedown_vx_u16m8_m(vbool2_t mask, vuint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u16m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32mf2_m( @@ -994,7 +994,7 @@ vuint16m8_t test_vslidedown_vx_u16m8_m(vbool2_t mask, vuint16m8_t src, size_t of // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslidedown_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32mf2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u32mf2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m1_m( @@ -1003,7 +1003,7 @@ vuint32mf2_t test_vslidedown_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslidedown_vx_u32m1_m(vbool32_t mask, vuint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u32m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m2_m( @@ -1012,7 +1012,7 @@ vuint32m1_t test_vslidedown_vx_u32m1_m(vbool32_t mask, vuint32m1_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslidedown_vx_u32m2_m(vbool16_t mask, vuint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u32m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m4_m( @@ -1021,7 +1021,7 @@ vuint32m2_t test_vslidedown_vx_u32m2_m(vbool16_t mask, vuint32m2_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslidedown_vx_u32m4_m(vbool8_t mask, vuint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u32m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m8_m( @@ -1030,7 +1030,7 @@ vuint32m4_t test_vslidedown_vx_u32m4_m(vbool8_t mask, vuint32m4_t src, size_t of // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslidedown_vx_u32m8_m(vbool4_t mask, vuint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u32m8_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m1_m( @@ -1039,7 +1039,7 @@ vuint32m8_t test_vslidedown_vx_u32m8_m(vbool4_t mask, vuint32m8_t src, size_t of // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslidedown_vx_u64m1_m(vbool64_t mask, vuint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m1_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u64m1_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m2_m( @@ -1048,7 +1048,7 @@ vuint64m1_t test_vslidedown_vx_u64m1_m(vbool64_t mask, vuint64m1_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslidedown_vx_u64m2_m(vbool32_t mask, vuint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m2_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u64m2_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m4_m( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vslidedown_vx_u64m2_m(vbool32_t mask, vuint64m2_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslidedown_vx_u64m4_m(vbool16_t mask, vuint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m4_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u64m4_m(mask, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m8_m( @@ -1066,6 +1066,6 @@ vuint64m4_t test_vslidedown_vx_u64m4_m(vbool16_t mask, vuint64m4_t src, size_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslidedown_vx_u64m8_m(vbool8_t mask, vuint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m8_m(mask, src, offset, vl); + return __riscv_vslidedown_vx_u64m8_m(mask, src, offset, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c index 1530fe2b61a671de39d8a1438cdee167e32316b1..efcb1cf8abf25356922a159f285b83d7c4d46d27 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vslideup.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslideup_vx_f16mf4(vfloat16mf4_t dest, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf4(dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf2( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vslideup_vx_f16mf4(vfloat16mf4_t dest, vfloat16mf4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslideup_vx_f16mf2(vfloat16mf2_t dest, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf2(dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m1( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vslideup_vx_f16mf2(vfloat16mf2_t dest, vfloat16mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslideup_vx_f16m1(vfloat16m1_t dest, vfloat16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m1(dest, src, offset, vl); + return __riscv_vslideup_vx_f16m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m2( @@ -40,7 +40,7 @@ vfloat16m1_t test_vslideup_vx_f16m1(vfloat16m1_t dest, vfloat16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslideup_vx_f16m2(vfloat16m2_t dest, vfloat16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m2(dest, src, offset, vl); + return __riscv_vslideup_vx_f16m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m4( @@ -49,7 +49,7 @@ vfloat16m2_t test_vslideup_vx_f16m2(vfloat16m2_t dest, vfloat16m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslideup_vx_f16m4(vfloat16m4_t dest, vfloat16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m4(dest, src, offset, vl); + return __riscv_vslideup_vx_f16m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m8( @@ -58,7 +58,7 @@ vfloat16m4_t test_vslideup_vx_f16m4(vfloat16m4_t dest, vfloat16m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslideup_vx_f16m8(vfloat16m8_t dest, vfloat16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m8(dest, src, offset, vl); + return __riscv_vslideup_vx_f16m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32mf2( @@ -67,7 +67,7 @@ vfloat16m8_t test_vslideup_vx_f16m8(vfloat16m8_t dest, vfloat16m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslideup_vx_f32mf2(vfloat32mf2_t dest, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32mf2(dest, src, offset, vl); + return __riscv_vslideup_vx_f32mf2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m1( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vslideup_vx_f32mf2(vfloat32mf2_t dest, vfloat32mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslideup_vx_f32m1(vfloat32m1_t dest, vfloat32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m1(dest, src, offset, vl); + return __riscv_vslideup_vx_f32m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m2( @@ -85,7 +85,7 @@ vfloat32m1_t test_vslideup_vx_f32m1(vfloat32m1_t dest, vfloat32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslideup_vx_f32m2(vfloat32m2_t dest, vfloat32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m2(dest, src, offset, vl); + return __riscv_vslideup_vx_f32m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m4( @@ -94,7 +94,7 @@ vfloat32m2_t test_vslideup_vx_f32m2(vfloat32m2_t dest, vfloat32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslideup_vx_f32m4(vfloat32m4_t dest, vfloat32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m4(dest, src, offset, vl); + return __riscv_vslideup_vx_f32m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m8( @@ -103,7 +103,7 @@ vfloat32m4_t test_vslideup_vx_f32m4(vfloat32m4_t dest, vfloat32m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslideup_vx_f32m8(vfloat32m8_t dest, vfloat32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m8(dest, src, offset, vl); + return __riscv_vslideup_vx_f32m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m1( @@ -112,7 +112,7 @@ vfloat32m8_t test_vslideup_vx_f32m8(vfloat32m8_t dest, vfloat32m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslideup_vx_f64m1(vfloat64m1_t dest, vfloat64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m1(dest, src, offset, vl); + return __riscv_vslideup_vx_f64m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m2( @@ -121,7 +121,7 @@ vfloat64m1_t test_vslideup_vx_f64m1(vfloat64m1_t dest, vfloat64m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslideup_vx_f64m2(vfloat64m2_t dest, vfloat64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m2(dest, src, offset, vl); + return __riscv_vslideup_vx_f64m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m4( @@ -130,7 +130,7 @@ vfloat64m2_t test_vslideup_vx_f64m2(vfloat64m2_t dest, vfloat64m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslideup_vx_f64m4(vfloat64m4_t dest, vfloat64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m4(dest, src, offset, vl); + return __riscv_vslideup_vx_f64m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m8( @@ -139,7 +139,7 @@ vfloat64m4_t test_vslideup_vx_f64m4(vfloat64m4_t dest, vfloat64m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslideup_vx_f64m8(vfloat64m8_t dest, vfloat64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m8(dest, src, offset, vl); + return __riscv_vslideup_vx_f64m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf8( @@ -148,7 +148,7 @@ vfloat64m8_t test_vslideup_vx_f64m8(vfloat64m8_t dest, vfloat64m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslideup_vx_i8mf8(vint8mf8_t dest, vint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf8(dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf4( @@ -157,7 +157,7 @@ vint8mf8_t test_vslideup_vx_i8mf8(vint8mf8_t dest, vint8mf8_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslideup_vx_i8mf4(vint8mf4_t dest, vint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf4(dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf2( @@ -166,7 +166,7 @@ vint8mf4_t test_vslideup_vx_i8mf4(vint8mf4_t dest, vint8mf4_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslideup_vx_i8mf2(vint8mf2_t dest, vint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf2(dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m1( @@ -175,7 +175,7 @@ vint8mf2_t test_vslideup_vx_i8mf2(vint8mf2_t dest, vint8mf2_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslideup_vx_i8m1(vint8m1_t dest, vint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m1(dest, src, offset, vl); + return __riscv_vslideup_vx_i8m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m2( @@ -184,7 +184,7 @@ vint8m1_t test_vslideup_vx_i8m1(vint8m1_t dest, vint8m1_t src, size_t offset, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslideup_vx_i8m2(vint8m2_t dest, vint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m2(dest, src, offset, vl); + return __riscv_vslideup_vx_i8m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m4( @@ -193,7 +193,7 @@ vint8m2_t test_vslideup_vx_i8m2(vint8m2_t dest, vint8m2_t src, size_t offset, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslideup_vx_i8m4(vint8m4_t dest, vint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m4(dest, src, offset, vl); + return __riscv_vslideup_vx_i8m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m8( @@ -202,7 +202,7 @@ vint8m4_t test_vslideup_vx_i8m4(vint8m4_t dest, vint8m4_t src, size_t offset, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslideup_vx_i8m8(vint8m8_t dest, vint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m8(dest, src, offset, vl); + return __riscv_vslideup_vx_i8m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf4( @@ -211,7 +211,7 @@ vint8m8_t test_vslideup_vx_i8m8(vint8m8_t dest, vint8m8_t src, size_t offset, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslideup_vx_i16mf4(vint16mf4_t dest, vint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf4(dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf2( @@ -220,7 +220,7 @@ vint16mf4_t test_vslideup_vx_i16mf4(vint16mf4_t dest, vint16mf4_t src, size_t of // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslideup_vx_i16mf2(vint16mf2_t dest, vint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf2(dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m1( @@ -229,7 +229,7 @@ vint16mf2_t test_vslideup_vx_i16mf2(vint16mf2_t dest, vint16mf2_t src, size_t of // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslideup_vx_i16m1(vint16m1_t dest, vint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m1(dest, src, offset, vl); + return __riscv_vslideup_vx_i16m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m2( @@ -238,7 +238,7 @@ vint16m1_t test_vslideup_vx_i16m1(vint16m1_t dest, vint16m1_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslideup_vx_i16m2(vint16m2_t dest, vint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m2(dest, src, offset, vl); + return __riscv_vslideup_vx_i16m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m4( @@ -247,7 +247,7 @@ vint16m2_t test_vslideup_vx_i16m2(vint16m2_t dest, vint16m2_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslideup_vx_i16m4(vint16m4_t dest, vint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m4(dest, src, offset, vl); + return __riscv_vslideup_vx_i16m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m8( @@ -256,7 +256,7 @@ vint16m4_t test_vslideup_vx_i16m4(vint16m4_t dest, vint16m4_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslideup_vx_i16m8(vint16m8_t dest, vint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m8(dest, src, offset, vl); + return __riscv_vslideup_vx_i16m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32mf2( @@ -265,7 +265,7 @@ vint16m8_t test_vslideup_vx_i16m8(vint16m8_t dest, vint16m8_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslideup_vx_i32mf2(vint32mf2_t dest, vint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32mf2(dest, src, offset, vl); + return __riscv_vslideup_vx_i32mf2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m1( @@ -274,7 +274,7 @@ vint32mf2_t test_vslideup_vx_i32mf2(vint32mf2_t dest, vint32mf2_t src, size_t of // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslideup_vx_i32m1(vint32m1_t dest, vint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m1(dest, src, offset, vl); + return __riscv_vslideup_vx_i32m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m2( @@ -283,7 +283,7 @@ vint32m1_t test_vslideup_vx_i32m1(vint32m1_t dest, vint32m1_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslideup_vx_i32m2(vint32m2_t dest, vint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m2(dest, src, offset, vl); + return __riscv_vslideup_vx_i32m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m4( @@ -292,7 +292,7 @@ vint32m2_t test_vslideup_vx_i32m2(vint32m2_t dest, vint32m2_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslideup_vx_i32m4(vint32m4_t dest, vint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m4(dest, src, offset, vl); + return __riscv_vslideup_vx_i32m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m8( @@ -301,7 +301,7 @@ vint32m4_t test_vslideup_vx_i32m4(vint32m4_t dest, vint32m4_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslideup_vx_i32m8(vint32m8_t dest, vint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m8(dest, src, offset, vl); + return __riscv_vslideup_vx_i32m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m1( @@ -310,7 +310,7 @@ vint32m8_t test_vslideup_vx_i32m8(vint32m8_t dest, vint32m8_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslideup_vx_i64m1(vint64m1_t dest, vint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m1(dest, src, offset, vl); + return __riscv_vslideup_vx_i64m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m2( @@ -319,7 +319,7 @@ vint64m1_t test_vslideup_vx_i64m1(vint64m1_t dest, vint64m1_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslideup_vx_i64m2(vint64m2_t dest, vint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m2(dest, src, offset, vl); + return __riscv_vslideup_vx_i64m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m4( @@ -328,7 +328,7 @@ vint64m2_t test_vslideup_vx_i64m2(vint64m2_t dest, vint64m2_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslideup_vx_i64m4(vint64m4_t dest, vint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m4(dest, src, offset, vl); + return __riscv_vslideup_vx_i64m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m8( @@ -337,7 +337,7 @@ vint64m4_t test_vslideup_vx_i64m4(vint64m4_t dest, vint64m4_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslideup_vx_i64m8(vint64m8_t dest, vint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m8(dest, src, offset, vl); + return __riscv_vslideup_vx_i64m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf8( @@ -346,7 +346,7 @@ vint64m8_t test_vslideup_vx_i64m8(vint64m8_t dest, vint64m8_t src, size_t offset // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslideup_vx_u8mf8(vuint8mf8_t dest, vuint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf8(dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf4( @@ -355,7 +355,7 @@ vuint8mf8_t test_vslideup_vx_u8mf8(vuint8mf8_t dest, vuint8mf8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslideup_vx_u8mf4(vuint8mf4_t dest, vuint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf4(dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf2( @@ -364,7 +364,7 @@ vuint8mf4_t test_vslideup_vx_u8mf4(vuint8mf4_t dest, vuint8mf4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslideup_vx_u8mf2(vuint8mf2_t dest, vuint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf2(dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m1( @@ -373,7 +373,7 @@ vuint8mf2_t test_vslideup_vx_u8mf2(vuint8mf2_t dest, vuint8mf2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslideup_vx_u8m1(vuint8m1_t dest, vuint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m1(dest, src, offset, vl); + return __riscv_vslideup_vx_u8m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m2( @@ -382,7 +382,7 @@ vuint8m1_t test_vslideup_vx_u8m1(vuint8m1_t dest, vuint8m1_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslideup_vx_u8m2(vuint8m2_t dest, vuint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m2(dest, src, offset, vl); + return __riscv_vslideup_vx_u8m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m4( @@ -391,7 +391,7 @@ vuint8m2_t test_vslideup_vx_u8m2(vuint8m2_t dest, vuint8m2_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslideup_vx_u8m4(vuint8m4_t dest, vuint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m4(dest, src, offset, vl); + return __riscv_vslideup_vx_u8m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m8( @@ -400,7 +400,7 @@ vuint8m4_t test_vslideup_vx_u8m4(vuint8m4_t dest, vuint8m4_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslideup_vx_u8m8(vuint8m8_t dest, vuint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m8(dest, src, offset, vl); + return __riscv_vslideup_vx_u8m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf4( @@ -409,7 +409,7 @@ vuint8m8_t test_vslideup_vx_u8m8(vuint8m8_t dest, vuint8m8_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslideup_vx_u16mf4(vuint16mf4_t dest, vuint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf4(dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf2( @@ -418,7 +418,7 @@ vuint16mf4_t test_vslideup_vx_u16mf4(vuint16mf4_t dest, vuint16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslideup_vx_u16mf2(vuint16mf2_t dest, vuint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf2(dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m1( @@ -427,7 +427,7 @@ vuint16mf2_t test_vslideup_vx_u16mf2(vuint16mf2_t dest, vuint16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslideup_vx_u16m1(vuint16m1_t dest, vuint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m1(dest, src, offset, vl); + return __riscv_vslideup_vx_u16m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m2( @@ -436,7 +436,7 @@ vuint16m1_t test_vslideup_vx_u16m1(vuint16m1_t dest, vuint16m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslideup_vx_u16m2(vuint16m2_t dest, vuint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m2(dest, src, offset, vl); + return __riscv_vslideup_vx_u16m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m4( @@ -445,7 +445,7 @@ vuint16m2_t test_vslideup_vx_u16m2(vuint16m2_t dest, vuint16m2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslideup_vx_u16m4(vuint16m4_t dest, vuint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m4(dest, src, offset, vl); + return __riscv_vslideup_vx_u16m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m8( @@ -454,7 +454,7 @@ vuint16m4_t test_vslideup_vx_u16m4(vuint16m4_t dest, vuint16m4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslideup_vx_u16m8(vuint16m8_t dest, vuint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m8(dest, src, offset, vl); + return __riscv_vslideup_vx_u16m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32mf2( @@ -463,7 +463,7 @@ vuint16m8_t test_vslideup_vx_u16m8(vuint16m8_t dest, vuint16m8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslideup_vx_u32mf2(vuint32mf2_t dest, vuint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32mf2(dest, src, offset, vl); + return __riscv_vslideup_vx_u32mf2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m1( @@ -472,7 +472,7 @@ vuint32mf2_t test_vslideup_vx_u32mf2(vuint32mf2_t dest, vuint32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslideup_vx_u32m1(vuint32m1_t dest, vuint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m1(dest, src, offset, vl); + return __riscv_vslideup_vx_u32m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m2( @@ -481,7 +481,7 @@ vuint32m1_t test_vslideup_vx_u32m1(vuint32m1_t dest, vuint32m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslideup_vx_u32m2(vuint32m2_t dest, vuint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m2(dest, src, offset, vl); + return __riscv_vslideup_vx_u32m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m4( @@ -490,7 +490,7 @@ vuint32m2_t test_vslideup_vx_u32m2(vuint32m2_t dest, vuint32m2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslideup_vx_u32m4(vuint32m4_t dest, vuint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m4(dest, src, offset, vl); + return __riscv_vslideup_vx_u32m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m8( @@ -499,7 +499,7 @@ vuint32m4_t test_vslideup_vx_u32m4(vuint32m4_t dest, vuint32m4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslideup_vx_u32m8(vuint32m8_t dest, vuint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m8(dest, src, offset, vl); + return __riscv_vslideup_vx_u32m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m1( @@ -508,7 +508,7 @@ vuint32m8_t test_vslideup_vx_u32m8(vuint32m8_t dest, vuint32m8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslideup_vx_u64m1(vuint64m1_t dest, vuint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m1(dest, src, offset, vl); + return __riscv_vslideup_vx_u64m1(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m2( @@ -517,7 +517,7 @@ vuint64m1_t test_vslideup_vx_u64m1(vuint64m1_t dest, vuint64m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslideup_vx_u64m2(vuint64m2_t dest, vuint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m2(dest, src, offset, vl); + return __riscv_vslideup_vx_u64m2(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m4( @@ -526,7 +526,7 @@ vuint64m2_t test_vslideup_vx_u64m2(vuint64m2_t dest, vuint64m2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslideup_vx_u64m4(vuint64m4_t dest, vuint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m4(dest, src, offset, vl); + return __riscv_vslideup_vx_u64m4(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m8( @@ -535,7 +535,7 @@ vuint64m4_t test_vslideup_vx_u64m4(vuint64m4_t dest, vuint64m4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslideup_vx_u64m8(vuint64m8_t dest, vuint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m8(dest, src, offset, vl); + return __riscv_vslideup_vx_u64m8(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf4_m( @@ -544,7 +544,7 @@ vuint64m8_t test_vslideup_vx_u64m8(vuint64m8_t dest, vuint64m8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslideup_vx_f16mf4_m(vbool64_t mask, vfloat16mf4_t dest, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf2_m( @@ -553,7 +553,7 @@ vfloat16mf4_t test_vslideup_vx_f16mf4_m(vbool64_t mask, vfloat16mf4_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslideup_vx_f16mf2_m(vbool32_t mask, vfloat16mf2_t dest, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m1_m( @@ -562,7 +562,7 @@ vfloat16mf2_t test_vslideup_vx_f16mf2_m(vbool32_t mask, vfloat16mf2_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslideup_vx_f16m1_m(vbool16_t mask, vfloat16m1_t dest, vfloat16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m2_m( @@ -571,7 +571,7 @@ vfloat16m1_t test_vslideup_vx_f16m1_m(vbool16_t mask, vfloat16m1_t dest, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslideup_vx_f16m2_m(vbool8_t mask, vfloat16m2_t dest, vfloat16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m4_m( @@ -580,7 +580,7 @@ vfloat16m2_t test_vslideup_vx_f16m2_m(vbool8_t mask, vfloat16m2_t dest, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslideup_vx_f16m4_m(vbool4_t mask, vfloat16m4_t dest, vfloat16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m8_m( @@ -589,7 +589,7 @@ vfloat16m4_t test_vslideup_vx_f16m4_m(vbool4_t mask, vfloat16m4_t dest, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslideup_vx_f16m8_m(vbool2_t mask, vfloat16m8_t dest, vfloat16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32mf2_m( @@ -598,7 +598,7 @@ vfloat16m8_t test_vslideup_vx_f16m8_m(vbool2_t mask, vfloat16m8_t dest, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslideup_vx_f32mf2_m(vbool64_t mask, vfloat32mf2_t dest, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32mf2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32mf2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m1_m( @@ -607,7 +607,7 @@ vfloat32mf2_t test_vslideup_vx_f32mf2_m(vbool64_t mask, vfloat32mf2_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslideup_vx_f32m1_m(vbool32_t mask, vfloat32m1_t dest, vfloat32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m2_m( @@ -616,7 +616,7 @@ vfloat32m1_t test_vslideup_vx_f32m1_m(vbool32_t mask, vfloat32m1_t dest, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslideup_vx_f32m2_m(vbool16_t mask, vfloat32m2_t dest, vfloat32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m4_m( @@ -625,7 +625,7 @@ vfloat32m2_t test_vslideup_vx_f32m2_m(vbool16_t mask, vfloat32m2_t dest, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslideup_vx_f32m4_m(vbool8_t mask, vfloat32m4_t dest, vfloat32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m8_m( @@ -634,7 +634,7 @@ vfloat32m4_t test_vslideup_vx_f32m4_m(vbool8_t mask, vfloat32m4_t dest, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslideup_vx_f32m8_m(vbool4_t mask, vfloat32m8_t dest, vfloat32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m1_m( @@ -643,7 +643,7 @@ vfloat32m8_t test_vslideup_vx_f32m8_m(vbool4_t mask, vfloat32m8_t dest, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslideup_vx_f64m1_m(vbool64_t mask, vfloat64m1_t dest, vfloat64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m2_m( @@ -652,7 +652,7 @@ vfloat64m1_t test_vslideup_vx_f64m1_m(vbool64_t mask, vfloat64m1_t dest, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslideup_vx_f64m2_m(vbool32_t mask, vfloat64m2_t dest, vfloat64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m4_m( @@ -661,7 +661,7 @@ vfloat64m2_t test_vslideup_vx_f64m2_m(vbool32_t mask, vfloat64m2_t dest, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslideup_vx_f64m4_m(vbool16_t mask, vfloat64m4_t dest, vfloat64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m8_m( @@ -670,7 +670,7 @@ vfloat64m4_t test_vslideup_vx_f64m4_m(vbool16_t mask, vfloat64m4_t dest, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslideup_vx_f64m8_m(vbool8_t mask, vfloat64m8_t dest, vfloat64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf8_m( @@ -679,7 +679,7 @@ vfloat64m8_t test_vslideup_vx_f64m8_m(vbool8_t mask, vfloat64m8_t dest, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslideup_vx_i8mf8_m(vbool64_t mask, vint8mf8_t dest, vint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf4_m( @@ -688,7 +688,7 @@ vint8mf8_t test_vslideup_vx_i8mf8_m(vbool64_t mask, vint8mf8_t dest, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslideup_vx_i8mf4_m(vbool32_t mask, vint8mf4_t dest, vint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf2_m( @@ -697,7 +697,7 @@ vint8mf4_t test_vslideup_vx_i8mf4_m(vbool32_t mask, vint8mf4_t dest, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslideup_vx_i8mf2_m(vbool16_t mask, vint8mf2_t dest, vint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m1_m( @@ -706,7 +706,7 @@ vint8mf2_t test_vslideup_vx_i8mf2_m(vbool16_t mask, vint8mf2_t dest, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslideup_vx_i8m1_m(vbool8_t mask, vint8m1_t dest, vint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m2_m( @@ -715,7 +715,7 @@ vint8m1_t test_vslideup_vx_i8m1_m(vbool8_t mask, vint8m1_t dest, vint8m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslideup_vx_i8m2_m(vbool4_t mask, vint8m2_t dest, vint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m4_m( @@ -724,7 +724,7 @@ vint8m2_t test_vslideup_vx_i8m2_m(vbool4_t mask, vint8m2_t dest, vint8m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslideup_vx_i8m4_m(vbool2_t mask, vint8m4_t dest, vint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m8_m( @@ -733,7 +733,7 @@ vint8m4_t test_vslideup_vx_i8m4_m(vbool2_t mask, vint8m4_t dest, vint8m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslideup_vx_i8m8_m(vbool1_t mask, vint8m8_t dest, vint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf4_m( @@ -742,7 +742,7 @@ vint8m8_t test_vslideup_vx_i8m8_m(vbool1_t mask, vint8m8_t dest, vint8m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslideup_vx_i16mf4_m(vbool64_t mask, vint16mf4_t dest, vint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf2_m( @@ -751,7 +751,7 @@ vint16mf4_t test_vslideup_vx_i16mf4_m(vbool64_t mask, vint16mf4_t dest, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslideup_vx_i16mf2_m(vbool32_t mask, vint16mf2_t dest, vint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m1_m( @@ -760,7 +760,7 @@ vint16mf2_t test_vslideup_vx_i16mf2_m(vbool32_t mask, vint16mf2_t dest, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslideup_vx_i16m1_m(vbool16_t mask, vint16m1_t dest, vint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m2_m( @@ -769,7 +769,7 @@ vint16m1_t test_vslideup_vx_i16m1_m(vbool16_t mask, vint16m1_t dest, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslideup_vx_i16m2_m(vbool8_t mask, vint16m2_t dest, vint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m4_m( @@ -778,7 +778,7 @@ vint16m2_t test_vslideup_vx_i16m2_m(vbool8_t mask, vint16m2_t dest, vint16m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslideup_vx_i16m4_m(vbool4_t mask, vint16m4_t dest, vint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m8_m( @@ -787,7 +787,7 @@ vint16m4_t test_vslideup_vx_i16m4_m(vbool4_t mask, vint16m4_t dest, vint16m4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslideup_vx_i16m8_m(vbool2_t mask, vint16m8_t dest, vint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32mf2_m( @@ -796,7 +796,7 @@ vint16m8_t test_vslideup_vx_i16m8_m(vbool2_t mask, vint16m8_t dest, vint16m8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslideup_vx_i32mf2_m(vbool64_t mask, vint32mf2_t dest, vint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32mf2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32mf2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m1_m( @@ -805,7 +805,7 @@ vint32mf2_t test_vslideup_vx_i32mf2_m(vbool64_t mask, vint32mf2_t dest, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslideup_vx_i32m1_m(vbool32_t mask, vint32m1_t dest, vint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m2_m( @@ -814,7 +814,7 @@ vint32m1_t test_vslideup_vx_i32m1_m(vbool32_t mask, vint32m1_t dest, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslideup_vx_i32m2_m(vbool16_t mask, vint32m2_t dest, vint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m4_m( @@ -823,7 +823,7 @@ vint32m2_t test_vslideup_vx_i32m2_m(vbool16_t mask, vint32m2_t dest, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslideup_vx_i32m4_m(vbool8_t mask, vint32m4_t dest, vint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m8_m( @@ -832,7 +832,7 @@ vint32m4_t test_vslideup_vx_i32m4_m(vbool8_t mask, vint32m4_t dest, vint32m4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslideup_vx_i32m8_m(vbool4_t mask, vint32m8_t dest, vint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m1_m( @@ -841,7 +841,7 @@ vint32m8_t test_vslideup_vx_i32m8_m(vbool4_t mask, vint32m8_t dest, vint32m8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslideup_vx_i64m1_m(vbool64_t mask, vint64m1_t dest, vint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m2_m( @@ -850,7 +850,7 @@ vint64m1_t test_vslideup_vx_i64m1_m(vbool64_t mask, vint64m1_t dest, vint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslideup_vx_i64m2_m(vbool32_t mask, vint64m2_t dest, vint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m4_m( @@ -859,7 +859,7 @@ vint64m2_t test_vslideup_vx_i64m2_m(vbool32_t mask, vint64m2_t dest, vint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslideup_vx_i64m4_m(vbool16_t mask, vint64m4_t dest, vint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m8_m( @@ -868,7 +868,7 @@ vint64m4_t test_vslideup_vx_i64m4_m(vbool16_t mask, vint64m4_t dest, vint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslideup_vx_i64m8_m(vbool8_t mask, vint64m8_t dest, vint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf8_m( @@ -877,7 +877,7 @@ vint64m8_t test_vslideup_vx_i64m8_m(vbool8_t mask, vint64m8_t dest, vint64m8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslideup_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t dest, vuint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf4_m( @@ -886,7 +886,7 @@ vuint8mf8_t test_vslideup_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t dest, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslideup_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t dest, vuint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf2_m( @@ -895,7 +895,7 @@ vuint8mf4_t test_vslideup_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t dest, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslideup_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t dest, vuint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m1_m( @@ -904,7 +904,7 @@ vuint8mf2_t test_vslideup_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t dest, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslideup_vx_u8m1_m(vbool8_t mask, vuint8m1_t dest, vuint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m2_m( @@ -913,7 +913,7 @@ vuint8m1_t test_vslideup_vx_u8m1_m(vbool8_t mask, vuint8m1_t dest, vuint8m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslideup_vx_u8m2_m(vbool4_t mask, vuint8m2_t dest, vuint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m4_m( @@ -922,7 +922,7 @@ vuint8m2_t test_vslideup_vx_u8m2_m(vbool4_t mask, vuint8m2_t dest, vuint8m2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslideup_vx_u8m4_m(vbool2_t mask, vuint8m4_t dest, vuint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m8_m( @@ -931,7 +931,7 @@ vuint8m4_t test_vslideup_vx_u8m4_m(vbool2_t mask, vuint8m4_t dest, vuint8m4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslideup_vx_u8m8_m(vbool1_t mask, vuint8m8_t dest, vuint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf4_m( @@ -940,7 +940,7 @@ vuint8m8_t test_vslideup_vx_u8m8_m(vbool1_t mask, vuint8m8_t dest, vuint8m8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslideup_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t dest, vuint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf2_m( @@ -949,7 +949,7 @@ vuint16mf4_t test_vslideup_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t dest, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslideup_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t dest, vuint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m1_m( @@ -958,7 +958,7 @@ vuint16mf2_t test_vslideup_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t dest, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslideup_vx_u16m1_m(vbool16_t mask, vuint16m1_t dest, vuint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m2_m( @@ -967,7 +967,7 @@ vuint16m1_t test_vslideup_vx_u16m1_m(vbool16_t mask, vuint16m1_t dest, vuint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslideup_vx_u16m2_m(vbool8_t mask, vuint16m2_t dest, vuint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m4_m( @@ -976,7 +976,7 @@ vuint16m2_t test_vslideup_vx_u16m2_m(vbool8_t mask, vuint16m2_t dest, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslideup_vx_u16m4_m(vbool4_t mask, vuint16m4_t dest, vuint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m8_m( @@ -985,7 +985,7 @@ vuint16m4_t test_vslideup_vx_u16m4_m(vbool4_t mask, vuint16m4_t dest, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslideup_vx_u16m8_m(vbool2_t mask, vuint16m8_t dest, vuint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32mf2_m( @@ -994,7 +994,7 @@ vuint16m8_t test_vslideup_vx_u16m8_m(vbool2_t mask, vuint16m8_t dest, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslideup_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t dest, vuint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32mf2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32mf2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m1_m( @@ -1003,7 +1003,7 @@ vuint32mf2_t test_vslideup_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t dest, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslideup_vx_u32m1_m(vbool32_t mask, vuint32m1_t dest, vuint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m2_m( @@ -1012,7 +1012,7 @@ vuint32m1_t test_vslideup_vx_u32m1_m(vbool32_t mask, vuint32m1_t dest, vuint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslideup_vx_u32m2_m(vbool16_t mask, vuint32m2_t dest, vuint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m4_m( @@ -1021,7 +1021,7 @@ vuint32m2_t test_vslideup_vx_u32m2_m(vbool16_t mask, vuint32m2_t dest, vuint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslideup_vx_u32m4_m(vbool8_t mask, vuint32m4_t dest, vuint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m8_m( @@ -1030,7 +1030,7 @@ vuint32m4_t test_vslideup_vx_u32m4_m(vbool8_t mask, vuint32m4_t dest, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslideup_vx_u32m8_m(vbool4_t mask, vuint32m8_t dest, vuint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m8_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m1_m( @@ -1039,7 +1039,7 @@ vuint32m8_t test_vslideup_vx_u32m8_m(vbool4_t mask, vuint32m8_t dest, vuint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslideup_vx_u64m1_m(vbool64_t mask, vuint64m1_t dest, vuint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m1_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m1_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m2_m( @@ -1048,7 +1048,7 @@ vuint64m1_t test_vslideup_vx_u64m1_m(vbool64_t mask, vuint64m1_t dest, vuint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslideup_vx_u64m2_m(vbool32_t mask, vuint64m2_t dest, vuint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m2_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m2_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m4_m( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vslideup_vx_u64m2_m(vbool32_t mask, vuint64m2_t dest, vuint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslideup_vx_u64m4_m(vbool16_t mask, vuint64m4_t dest, vuint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m4_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m4_m(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m8_m( @@ -1066,6 +1066,6 @@ vuint64m4_t test_vslideup_vx_u64m4_m(vbool16_t mask, vuint64m4_t dest, vuint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslideup_vx_u64m8_m(vbool8_t mask, vuint64m8_t dest, vuint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m8_m(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m8_m(mask, dest, src, offset, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsll.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsll.c index 82c790121887011e6aa7932632de1ab2bdebd005..c15b7532007d438bebb4c9354d8c0683545b4667 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsll.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsll.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_i8mf8(op1, shift, vl); + return __riscv_vsll_vv_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vsll_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf8(op1, shift, vl); + return __riscv_vsll_vx_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vsll_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_i8mf4(op1, shift, vl); + return __riscv_vsll_vv_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vsll_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf4(op1, shift, vl); + return __riscv_vsll_vx_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vsll_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_i8mf2(op1, shift, vl); + return __riscv_vsll_vv_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vsll_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf2(op1, shift, vl); + return __riscv_vsll_vx_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vsll_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_i8m1(op1, shift, vl); + return __riscv_vsll_vv_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vsll_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m1(op1, shift, vl); + return __riscv_vsll_vx_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vsll_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_i8m2(op1, shift, vl); + return __riscv_vsll_vv_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vsll_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m2(op1, shift, vl); + return __riscv_vsll_vx_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vsll_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_i8m4(op1, shift, vl); + return __riscv_vsll_vv_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vsll_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m4(op1, shift, vl); + return __riscv_vsll_vx_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vsll_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vv_i8m8(vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_i8m8(op1, shift, vl); + return __riscv_vsll_vv_i8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vsll_vv_i8m8(vint8m8_t op1, vuint8m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vx_i8m8(vint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m8(op1, shift, vl); + return __riscv_vsll_vx_i8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vsll_vx_i8m8(vint8m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_i16mf4(op1, shift, vl); + return __riscv_vsll_vv_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vsll_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vx_i16mf4(vint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf4(op1, shift, vl); + return __riscv_vsll_vx_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vsll_vx_i16mf4(vint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_i16mf2(op1, shift, vl); + return __riscv_vsll_vv_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vsll_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vx_i16mf2(vint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf2(op1, shift, vl); + return __riscv_vsll_vx_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vsll_vx_i16mf2(vint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vv_i16m1(vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_i16m1(op1, shift, vl); + return __riscv_vsll_vv_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vsll_vv_i16m1(vint16m1_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vx_i16m1(vint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m1(op1, shift, vl); + return __riscv_vsll_vx_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vsll_vx_i16m1(vint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vv_i16m2(vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_i16m2(op1, shift, vl); + return __riscv_vsll_vv_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vsll_vv_i16m2(vint16m2_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vx_i16m2(vint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m2(op1, shift, vl); + return __riscv_vsll_vx_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vsll_vx_i16m2(vint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vv_i16m4(vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_i16m4(op1, shift, vl); + return __riscv_vsll_vv_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vsll_vv_i16m4(vint16m4_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vx_i16m4(vint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m4(op1, shift, vl); + return __riscv_vsll_vx_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vsll_vx_i16m4(vint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vv_i16m8(vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_i16m8(op1, shift, vl); + return __riscv_vsll_vv_i16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vsll_vv_i16m8(vint16m8_t op1, vuint16m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vx_i16m8(vint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m8(op1, shift, vl); + return __riscv_vsll_vx_i16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vsll_vx_i16m8(vint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_i32mf2(op1, shift, vl); + return __riscv_vsll_vv_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vsll_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vx_i32mf2(vint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32mf2(op1, shift, vl); + return __riscv_vsll_vx_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vsll_vx_i32mf2(vint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vv_i32m1(vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_i32m1(op1, shift, vl); + return __riscv_vsll_vv_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vsll_vv_i32m1(vint32m1_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vx_i32m1(vint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m1(op1, shift, vl); + return __riscv_vsll_vx_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vsll_vx_i32m1(vint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vv_i32m2(vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_i32m2(op1, shift, vl); + return __riscv_vsll_vv_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vsll_vv_i32m2(vint32m2_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vx_i32m2(vint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m2(op1, shift, vl); + return __riscv_vsll_vx_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vsll_vx_i32m2(vint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vv_i32m4(vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_i32m4(op1, shift, vl); + return __riscv_vsll_vv_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vsll_vv_i32m4(vint32m4_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vx_i32m4(vint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m4(op1, shift, vl); + return __riscv_vsll_vx_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vsll_vx_i32m4(vint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vv_i32m8(vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_i32m8(op1, shift, vl); + return __riscv_vsll_vv_i32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vsll_vv_i32m8(vint32m8_t op1, vuint32m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vx_i32m8(vint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m8(op1, shift, vl); + return __riscv_vsll_vx_i32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vsll_vx_i32m8(vint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vv_i64m1(vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_i64m1(op1, shift, vl); + return __riscv_vsll_vv_i64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vsll_vv_i64m1(vint64m1_t op1, vuint64m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vx_i64m1(vint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m1(op1, shift, vl); + return __riscv_vsll_vx_i64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vsll_vx_i64m1(vint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vv_i64m2(vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_i64m2(op1, shift, vl); + return __riscv_vsll_vv_i64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vsll_vv_i64m2(vint64m2_t op1, vuint64m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vx_i64m2(vint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m2(op1, shift, vl); + return __riscv_vsll_vx_i64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vsll_vx_i64m2(vint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vv_i64m4(vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_i64m4(op1, shift, vl); + return __riscv_vsll_vv_i64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vsll_vv_i64m4(vint64m4_t op1, vuint64m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vx_i64m4(vint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m4(op1, shift, vl); + return __riscv_vsll_vx_i64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vsll_vx_i64m4(vint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vv_i64m8(vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_i64m8(op1, shift, vl); + return __riscv_vsll_vv_i64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vsll_vv_i64m8(vint64m8_t op1, vuint64m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vx_i64m8(vint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m8(op1, shift, vl); + return __riscv_vsll_vx_i64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vsll_vx_i64m8(vint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_u8mf8(op1, shift, vl); + return __riscv_vsll_vv_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsll_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf8(op1, shift, vl); + return __riscv_vsll_vx_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsll_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_u8mf4(op1, shift, vl); + return __riscv_vsll_vv_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsll_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf4(op1, shift, vl); + return __riscv_vsll_vx_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsll_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_u8mf2(op1, shift, vl); + return __riscv_vsll_vv_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsll_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf2(op1, shift, vl); + return __riscv_vsll_vx_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsll_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_u8m1(op1, shift, vl); + return __riscv_vsll_vv_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vsll_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m1(op1, shift, vl); + return __riscv_vsll_vx_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vsll_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_u8m2(op1, shift, vl); + return __riscv_vsll_vv_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vsll_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m2(op1, shift, vl); + return __riscv_vsll_vx_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vsll_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vv_u8m4(vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_u8m4(op1, shift, vl); + return __riscv_vsll_vv_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vsll_vv_u8m4(vuint8m4_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m4(op1, shift, vl); + return __riscv_vsll_vx_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vsll_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vv_u8m8(vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_u8m8(op1, shift, vl); + return __riscv_vsll_vv_u8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vsll_vv_u8m8(vuint8m8_t op1, vuint8m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vx_u8m8(vuint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m8(op1, shift, vl); + return __riscv_vsll_vx_u8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vsll_vx_u8m8(vuint8m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_u16mf4(op1, shift, vl); + return __riscv_vsll_vv_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsll_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vx_u16mf4(vuint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf4(op1, shift, vl); + return __riscv_vsll_vx_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsll_vx_u16mf4(vuint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_u16mf2(op1, shift, vl); + return __riscv_vsll_vv_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsll_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vx_u16mf2(vuint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf2(op1, shift, vl); + return __riscv_vsll_vx_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsll_vx_u16mf2(vuint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vv_u16m1(vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_u16m1(op1, shift, vl); + return __riscv_vsll_vv_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vsll_vv_u16m1(vuint16m1_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vx_u16m1(vuint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m1(op1, shift, vl); + return __riscv_vsll_vx_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vsll_vx_u16m1(vuint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vv_u16m2(vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_u16m2(op1, shift, vl); + return __riscv_vsll_vv_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vsll_vv_u16m2(vuint16m2_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vx_u16m2(vuint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m2(op1, shift, vl); + return __riscv_vsll_vx_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vsll_vx_u16m2(vuint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vv_u16m4(vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_u16m4(op1, shift, vl); + return __riscv_vsll_vv_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vsll_vv_u16m4(vuint16m4_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vx_u16m4(vuint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m4(op1, shift, vl); + return __riscv_vsll_vx_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vsll_vx_u16m4(vuint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vv_u16m8(vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_u16m8(op1, shift, vl); + return __riscv_vsll_vv_u16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vsll_vv_u16m8(vuint16m8_t op1, vuint16m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vx_u16m8(vuint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m8(op1, shift, vl); + return __riscv_vsll_vx_u16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vsll_vx_u16m8(vuint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_u32mf2(op1, shift, vl); + return __riscv_vsll_vv_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsll_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vx_u32mf2(vuint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32mf2(op1, shift, vl); + return __riscv_vsll_vx_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsll_vx_u32mf2(vuint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vv_u32m1(vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_u32m1(op1, shift, vl); + return __riscv_vsll_vv_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vsll_vv_u32m1(vuint32m1_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vx_u32m1(vuint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m1(op1, shift, vl); + return __riscv_vsll_vx_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vsll_vx_u32m1(vuint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vv_u32m2(vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_u32m2(op1, shift, vl); + return __riscv_vsll_vv_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vsll_vv_u32m2(vuint32m2_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vx_u32m2(vuint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m2(op1, shift, vl); + return __riscv_vsll_vx_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vsll_vx_u32m2(vuint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vv_u32m4(vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_u32m4(op1, shift, vl); + return __riscv_vsll_vv_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vsll_vv_u32m4(vuint32m4_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vx_u32m4(vuint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m4(op1, shift, vl); + return __riscv_vsll_vx_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vsll_vx_u32m4(vuint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vv_u32m8(vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_u32m8(op1, shift, vl); + return __riscv_vsll_vv_u32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vsll_vv_u32m8(vuint32m8_t op1, vuint32m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vx_u32m8(vuint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m8(op1, shift, vl); + return __riscv_vsll_vx_u32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vsll_vx_u32m8(vuint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vv_u64m1(vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_u64m1(op1, shift, vl); + return __riscv_vsll_vv_u64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vsll_vv_u64m1(vuint64m1_t op1, vuint64m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vx_u64m1(vuint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m1(op1, shift, vl); + return __riscv_vsll_vx_u64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vsll_vx_u64m1(vuint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vv_u64m2(vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_u64m2(op1, shift, vl); + return __riscv_vsll_vv_u64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vsll_vv_u64m2(vuint64m2_t op1, vuint64m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vx_u64m2(vuint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m2(op1, shift, vl); + return __riscv_vsll_vx_u64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vsll_vx_u64m2(vuint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vv_u64m4(vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_u64m4(op1, shift, vl); + return __riscv_vsll_vv_u64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vsll_vv_u64m4(vuint64m4_t op1, vuint64m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vx_u64m4(vuint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m4(op1, shift, vl); + return __riscv_vsll_vx_u64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vsll_vx_u64m4(vuint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vv_u64m8(vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_u64m8(op1, shift, vl); + return __riscv_vsll_vv_u64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m8( @@ -795,7 +795,7 @@ vuint64m8_t test_vsll_vv_u64m8(vuint64m8_t op1, vuint64m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vx_u64m8(vuint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m8(op1, shift, vl); + return __riscv_vsll_vx_u64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf8_m( @@ -804,7 +804,7 @@ vuint64m8_t test_vsll_vx_u64m8(vuint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_i8mf8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf8_m( @@ -813,7 +813,7 @@ vint8mf8_t test_vsll_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf4_m( @@ -822,7 +822,7 @@ vint8mf8_t test_vsll_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_i8mf4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf4_m( @@ -831,7 +831,7 @@ vint8mf4_t test_vsll_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf2_m( @@ -840,7 +840,7 @@ vint8mf4_t test_vsll_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_i8mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf2_m( @@ -849,7 +849,7 @@ vint8mf2_t test_vsll_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m1_m( @@ -858,7 +858,7 @@ vint8mf2_t test_vsll_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_i8m1_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m1_m( @@ -867,7 +867,7 @@ vint8m1_t test_vsll_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m1_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m2_m( @@ -876,7 +876,7 @@ vint8m1_t test_vsll_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_i8m2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m2_m( @@ -885,7 +885,7 @@ vint8m2_t test_vsll_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m4_m( @@ -894,7 +894,7 @@ vint8m2_t test_vsll_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_i8m4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m4_m( @@ -903,7 +903,7 @@ vint8m4_t test_vsll_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m8_m( @@ -912,7 +912,7 @@ vint8m4_t test_vsll_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_i8m8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m8_m( @@ -921,7 +921,7 @@ vint8m8_t test_vsll_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf4_m( @@ -930,7 +930,7 @@ vint8m8_t test_vsll_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_i16mf4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf4_m( @@ -939,7 +939,7 @@ vint16mf4_t test_vsll_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf2_m( @@ -948,7 +948,7 @@ vint16mf4_t test_vsll_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_i16mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf2_m( @@ -957,7 +957,7 @@ vint16mf2_t test_vsll_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m1_m( @@ -966,7 +966,7 @@ vint16mf2_t test_vsll_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_i16m1_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m1_m( @@ -975,7 +975,7 @@ vint16m1_t test_vsll_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m1_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m2_m( @@ -984,7 +984,7 @@ vint16m1_t test_vsll_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_i16m2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m2_m( @@ -993,7 +993,7 @@ vint16m2_t test_vsll_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m4_m( @@ -1002,7 +1002,7 @@ vint16m2_t test_vsll_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_i16m4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m4_m( @@ -1011,7 +1011,7 @@ vint16m4_t test_vsll_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m8_m( @@ -1020,7 +1020,7 @@ vint16m4_t test_vsll_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_i16m8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m8_m( @@ -1029,7 +1029,7 @@ vint16m8_t test_vsll_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32mf2_m( @@ -1038,7 +1038,7 @@ vint16m8_t test_vsll_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_i32mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32mf2_m( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vsll_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m1_m( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vsll_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_i32m1_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m1_m( @@ -1065,7 +1065,7 @@ vint32m1_t test_vsll_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m1_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m2_m( @@ -1074,7 +1074,7 @@ vint32m1_t test_vsll_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_i32m2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m2_m( @@ -1083,7 +1083,7 @@ vint32m2_t test_vsll_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m4_m( @@ -1092,7 +1092,7 @@ vint32m2_t test_vsll_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_i32m4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m4_m( @@ -1101,7 +1101,7 @@ vint32m4_t test_vsll_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m8_m( @@ -1110,7 +1110,7 @@ vint32m4_t test_vsll_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_i32m8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m8_m( @@ -1119,7 +1119,7 @@ vint32m8_t test_vsll_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m1_m( @@ -1128,7 +1128,7 @@ vint32m8_t test_vsll_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_i64m1_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m1_m( @@ -1137,7 +1137,7 @@ vint64m1_t test_vsll_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m1_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m2_m( @@ -1146,7 +1146,7 @@ vint64m1_t test_vsll_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_i64m2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m2_m( @@ -1155,7 +1155,7 @@ vint64m2_t test_vsll_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m4_m( @@ -1164,7 +1164,7 @@ vint64m2_t test_vsll_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_i64m4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m4_m( @@ -1173,7 +1173,7 @@ vint64m4_t test_vsll_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m8_m( @@ -1182,7 +1182,7 @@ vint64m4_t test_vsll_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_i64m8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_i64m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m8_m( @@ -1191,7 +1191,7 @@ vint64m8_t test_vsll_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_i64m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf8_m( @@ -1200,7 +1200,7 @@ vint64m8_t test_vsll_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_u8mf8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf8_m( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vsll_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf4_m( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vsll_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_u8mf4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf4_m( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vsll_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf2_m( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vsll_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_u8mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf2_m( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vsll_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m1_m( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vsll_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_u8m1_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m1_m( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vsll_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m1_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m2_m( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vsll_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_u8m2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m2_m( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vsll_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m4_m( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vsll_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_u8m4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m4_m( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vsll_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m8_m( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vsll_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_u8m8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m8_m( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vsll_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf4_m( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vsll_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_u16mf4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf4_m( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vsll_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf2_m( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vsll_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_u16mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf2_m( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vsll_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m1_m( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vsll_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_u16m1_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m1_m( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vsll_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m1_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m2_m( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vsll_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_u16m2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m2_m( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vsll_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m4_m( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vsll_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_u16m4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m4_m( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vsll_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m8_m( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vsll_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_u16m8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m8_m( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vsll_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32mf2_m( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vsll_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_u32mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32mf2_m( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vsll_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32mf2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m1_m( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vsll_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_u32m1_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m1_m( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vsll_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m1_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m2_m( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vsll_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_u32m2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m2_m( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vsll_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m4_m( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vsll_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_u32m4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m4_m( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vsll_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m8_m( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vsll_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_u32m8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m8_m( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vsll_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m1_m( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vsll_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_u64m1_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m1_m( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vsll_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m1_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m2_m( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vsll_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_u64m2_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m2_m( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vsll_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m2_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m4_m( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vsll_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_u64m4_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m4_m( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vsll_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m4_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m8_m( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vsll_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_u64m8_m(mask, op1, shift, vl); + return __riscv_vsll_vv_u64m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m8_m( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vsll_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m8_m(mask, op1, shift, vl); + return __riscv_vsll_vx_u64m8_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm.c index ba1627dc716e2b9d7aaa56d26d2e8a3995c901b4..a18b4a96b13554a275d9e64e57c5ecb1db72fb61 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsm.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsm_v_b1(uint8_t *base, vbool1_t value, size_t vl) { - return vsm_v_b1(base, value, vl); + return __riscv_vsm_v_b1(base, value, vl); } // CHECK-RV64-LABEL: @test_vsm_v_b2( @@ -21,7 +21,7 @@ void test_vsm_v_b1(uint8_t *base, vbool1_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsm_v_b2(uint8_t *base, vbool2_t value, size_t vl) { - return vsm_v_b2(base, value, vl); + return __riscv_vsm_v_b2(base, value, vl); } // CHECK-RV64-LABEL: @test_vsm_v_b4( @@ -30,7 +30,7 @@ void test_vsm_v_b2(uint8_t *base, vbool2_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsm_v_b4(uint8_t *base, vbool4_t value, size_t vl) { - return vsm_v_b4(base, value, vl); + return __riscv_vsm_v_b4(base, value, vl); } // CHECK-RV64-LABEL: @test_vsm_v_b8( @@ -39,7 +39,7 @@ void test_vsm_v_b4(uint8_t *base, vbool4_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsm_v_b8(uint8_t *base, vbool8_t value, size_t vl) { - return vsm_v_b8(base, value, vl); + return __riscv_vsm_v_b8(base, value, vl); } // CHECK-RV64-LABEL: @test_vsm_v_b16( @@ -48,7 +48,7 @@ void test_vsm_v_b8(uint8_t *base, vbool8_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsm_v_b16(uint8_t *base, vbool16_t value, size_t vl) { - return vsm_v_b16(base, value, vl); + return __riscv_vsm_v_b16(base, value, vl); } // CHECK-RV64-LABEL: @test_vsm_v_b32( @@ -57,7 +57,7 @@ void test_vsm_v_b16(uint8_t *base, vbool16_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsm_v_b32(uint8_t *base, vbool32_t value, size_t vl) { - return vsm_v_b32(base, value, vl); + return __riscv_vsm_v_b32(base, value, vl); } // CHECK-RV64-LABEL: @test_vsm_v_b64( @@ -66,6 +66,6 @@ void test_vsm_v_b32(uint8_t *base, vbool32_t value, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsm_v_b64(uint8_t *base, vbool64_t value, size_t vl) { - return vsm_v_b64(base, value, vl); + return __riscv_vsm_v_b64(base, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsmul.c index 22b9bfb5166ceab8e628df13e825dbdebcc86cde..7285134c672382b0abcbe1993303e0393b98617a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsmul.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsmul_vv_i8mf8(op1, op2, vl); + return __riscv_vsmul_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vsmul_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf8(op1, op2, vl); + return __riscv_vsmul_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vsmul_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsmul_vv_i8mf4(op1, op2, vl); + return __riscv_vsmul_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vsmul_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf4(op1, op2, vl); + return __riscv_vsmul_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vsmul_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsmul_vv_i8mf2(op1, op2, vl); + return __riscv_vsmul_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vsmul_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf2(op1, op2, vl); + return __riscv_vsmul_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vsmul_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsmul_vv_i8m1(op1, op2, vl); + return __riscv_vsmul_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vsmul_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m1(op1, op2, vl); + return __riscv_vsmul_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vsmul_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsmul_vv_i8m2(op1, op2, vl); + return __riscv_vsmul_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vsmul_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m2(op1, op2, vl); + return __riscv_vsmul_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vsmul_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsmul_vv_i8m4(op1, op2, vl); + return __riscv_vsmul_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vsmul_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m4(op1, op2, vl); + return __riscv_vsmul_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vsmul_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsmul_vv_i8m8(op1, op2, vl); + return __riscv_vsmul_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vsmul_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m8(op1, op2, vl); + return __riscv_vsmul_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vsmul_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsmul_vv_i16mf4(op1, op2, vl); + return __riscv_vsmul_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vsmul_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf4(op1, op2, vl); + return __riscv_vsmul_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vsmul_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsmul_vv_i16mf2(op1, op2, vl); + return __riscv_vsmul_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vsmul_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf2(op1, op2, vl); + return __riscv_vsmul_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vsmul_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsmul_vv_i16m1(op1, op2, vl); + return __riscv_vsmul_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vsmul_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m1(op1, op2, vl); + return __riscv_vsmul_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vsmul_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsmul_vv_i16m2(op1, op2, vl); + return __riscv_vsmul_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vsmul_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m2(op1, op2, vl); + return __riscv_vsmul_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vsmul_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsmul_vv_i16m4(op1, op2, vl); + return __riscv_vsmul_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vsmul_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m4(op1, op2, vl); + return __riscv_vsmul_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vsmul_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsmul_vv_i16m8(op1, op2, vl); + return __riscv_vsmul_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vsmul_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m8(op1, op2, vl); + return __riscv_vsmul_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vsmul_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsmul_vv_i32mf2(op1, op2, vl); + return __riscv_vsmul_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vsmul_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32mf2(op1, op2, vl); + return __riscv_vsmul_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vsmul_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsmul_vv_i32m1(op1, op2, vl); + return __riscv_vsmul_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vsmul_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m1(op1, op2, vl); + return __riscv_vsmul_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vsmul_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsmul_vv_i32m2(op1, op2, vl); + return __riscv_vsmul_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vsmul_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m2(op1, op2, vl); + return __riscv_vsmul_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vsmul_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsmul_vv_i32m4(op1, op2, vl); + return __riscv_vsmul_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vsmul_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m4(op1, op2, vl); + return __riscv_vsmul_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vsmul_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsmul_vv_i32m8(op1, op2, vl); + return __riscv_vsmul_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vsmul_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m8(op1, op2, vl); + return __riscv_vsmul_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vsmul_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsmul_vv_i64m1(op1, op2, vl); + return __riscv_vsmul_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vsmul_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m1(op1, op2, vl); + return __riscv_vsmul_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vsmul_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsmul_vv_i64m2(op1, op2, vl); + return __riscv_vsmul_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vsmul_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m2(op1, op2, vl); + return __riscv_vsmul_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vsmul_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsmul_vv_i64m4(op1, op2, vl); + return __riscv_vsmul_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vsmul_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m4(op1, op2, vl); + return __riscv_vsmul_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vsmul_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsmul_vv_i64m8(op1, op2, vl); + return __riscv_vsmul_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vsmul_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m8(op1, op2, vl); + return __riscv_vsmul_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vsmul_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsmul_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vsmul_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vsmul_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsmul_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vsmul_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vsmul_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsmul_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vsmul_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vsmul_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsmul_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vsmul_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vsmul_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsmul_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vsmul_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vsmul_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsmul_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vsmul_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vsmul_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsmul_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vsmul_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vsmul_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsmul_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vsmul_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vsmul_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsmul_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vsmul_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vsmul_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsmul_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vsmul_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vsmul_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsmul_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vsmul_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vsmul_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsmul_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vsmul_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vsmul_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsmul_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vsmul_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vsmul_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsmul_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vsmul_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vsmul_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsmul_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vsmul_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vsmul_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsmul_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vsmul_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vsmul_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsmul_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vsmul_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vsmul_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsmul_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vsmul_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vsmul_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsmul_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vsmul_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vsmul_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsmul_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vsmul_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vsmul_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsmul_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vsmul_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vsmul_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsmul_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vsmul_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei16.c index 2117e238506758ab4612dce41fa432daa49dd37a..455ca3401c13bc1c26d150e2373fe8880c6e84c9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t value, size_t vl) { - return vsoxei16_v_f16mf4(base, bindex, value, vl); + return __riscv_vsoxei16_v_f16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t value, size_t vl) { - return vsoxei16_v_f16mf2(base, bindex, value, vl); + return __riscv_vsoxei16_v_f16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t value, size_t vl) { - return vsoxei16_v_f16m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_f16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t value, size_t vl) { - return vsoxei16_v_f16m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_f16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16m4( @@ -49,7 +49,7 @@ void test_vsoxei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16m4(_Float16 *base, vuint16m4_t bindex, vfloat16m4_t value, size_t vl) { - return vsoxei16_v_f16m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_f16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16m8( @@ -58,7 +58,7 @@ void test_vsoxei16_v_f16m4(_Float16 *base, vuint16m4_t bindex, vfloat16m4_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16m8(_Float16 *base, vuint16m8_t bindex, vfloat16m8_t value, size_t vl) { - return vsoxei16_v_f16m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_f16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32mf2( @@ -67,7 +67,7 @@ void test_vsoxei16_v_f16m8(_Float16 *base, vuint16m8_t bindex, vfloat16m8_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t value, size_t vl) { - return vsoxei16_v_f32mf2(base, bindex, value, vl); + return __riscv_vsoxei16_v_f32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32m1( @@ -76,7 +76,7 @@ void test_vsoxei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t value, size_t vl) { - return vsoxei16_v_f32m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_f32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32m2( @@ -85,7 +85,7 @@ void test_vsoxei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t value, size_t vl) { - return vsoxei16_v_f32m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_f32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32m4( @@ -94,7 +94,7 @@ void test_vsoxei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32m4(float *base, vuint16m2_t bindex, vfloat32m4_t value, size_t vl) { - return vsoxei16_v_f32m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_f32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32m8( @@ -103,7 +103,7 @@ void test_vsoxei16_v_f32m4(float *base, vuint16m2_t bindex, vfloat32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32m8(float *base, vuint16m4_t bindex, vfloat32m8_t value, size_t vl) { - return vsoxei16_v_f32m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_f32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f64m1( @@ -112,7 +112,7 @@ void test_vsoxei16_v_f32m8(float *base, vuint16m4_t bindex, vfloat32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t value, size_t vl) { - return vsoxei16_v_f64m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_f64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f64m2( @@ -121,7 +121,7 @@ void test_vsoxei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t value, size_t vl) { - return vsoxei16_v_f64m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_f64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f64m4( @@ -130,7 +130,7 @@ void test_vsoxei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f64m4(double *base, vuint16m1_t bindex, vfloat64m4_t value, size_t vl) { - return vsoxei16_v_f64m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_f64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f64m8( @@ -139,7 +139,7 @@ void test_vsoxei16_v_f64m4(double *base, vuint16m1_t bindex, vfloat64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f64m8(double *base, vuint16m2_t bindex, vfloat64m8_t value, size_t vl) { - return vsoxei16_v_f64m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_f64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8mf8( @@ -148,7 +148,7 @@ void test_vsoxei16_v_f64m8(double *base, vuint16m2_t bindex, vfloat64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t value, size_t vl) { - return vsoxei16_v_i8mf8(base, bindex, value, vl); + return __riscv_vsoxei16_v_i8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8mf4( @@ -157,7 +157,7 @@ void test_vsoxei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t value, size_t vl) { - return vsoxei16_v_i8mf4(base, bindex, value, vl); + return __riscv_vsoxei16_v_i8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8mf2( @@ -166,7 +166,7 @@ void test_vsoxei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t value, size_t vl) { - return vsoxei16_v_i8mf2(base, bindex, value, vl); + return __riscv_vsoxei16_v_i8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8m1( @@ -175,7 +175,7 @@ void test_vsoxei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t value, size_t vl) { - return vsoxei16_v_i8m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_i8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8m2( @@ -184,7 +184,7 @@ void test_vsoxei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t value, size_t vl) { - return vsoxei16_v_i8m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_i8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8m4( @@ -193,7 +193,7 @@ void test_vsoxei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8m4(int8_t *base, vuint16m8_t bindex, vint8m4_t value, size_t vl) { - return vsoxei16_v_i8m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_i8m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16mf4( @@ -202,7 +202,7 @@ void test_vsoxei16_v_i8m4(int8_t *base, vuint16m8_t bindex, vint8m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t value, size_t vl) { - return vsoxei16_v_i16mf4(base, bindex, value, vl); + return __riscv_vsoxei16_v_i16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16mf2( @@ -211,7 +211,7 @@ void test_vsoxei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t value, size_t vl) { - return vsoxei16_v_i16mf2(base, bindex, value, vl); + return __riscv_vsoxei16_v_i16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16m1( @@ -220,7 +220,7 @@ void test_vsoxei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t value, size_t vl) { - return vsoxei16_v_i16m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_i16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16m2( @@ -229,7 +229,7 @@ void test_vsoxei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t value, size_t vl) { - return vsoxei16_v_i16m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_i16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16m4( @@ -238,7 +238,7 @@ void test_vsoxei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16m4(int16_t *base, vuint16m4_t bindex, vint16m4_t value, size_t vl) { - return vsoxei16_v_i16m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_i16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16m8( @@ -247,7 +247,7 @@ void test_vsoxei16_v_i16m4(int16_t *base, vuint16m4_t bindex, vint16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16m8(int16_t *base, vuint16m8_t bindex, vint16m8_t value, size_t vl) { - return vsoxei16_v_i16m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_i16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32mf2( @@ -256,7 +256,7 @@ void test_vsoxei16_v_i16m8(int16_t *base, vuint16m8_t bindex, vint16m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) { - return vsoxei16_v_i32mf2(base, bindex, value, vl); + return __riscv_vsoxei16_v_i32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32m1( @@ -265,7 +265,7 @@ void test_vsoxei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) { - return vsoxei16_v_i32m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_i32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32m2( @@ -274,7 +274,7 @@ void test_vsoxei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) { - return vsoxei16_v_i32m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_i32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32m4( @@ -283,7 +283,7 @@ void test_vsoxei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32m4(int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) { - return vsoxei16_v_i32m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_i32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32m8( @@ -292,7 +292,7 @@ void test_vsoxei16_v_i32m4(int32_t *base, vuint16m2_t bindex, vint32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32m8(int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) { - return vsoxei16_v_i32m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_i32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i64m1( @@ -301,7 +301,7 @@ void test_vsoxei16_v_i32m8(int32_t *base, vuint16m4_t bindex, vint32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) { - return vsoxei16_v_i64m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_i64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i64m2( @@ -310,7 +310,7 @@ void test_vsoxei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) { - return vsoxei16_v_i64m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_i64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i64m4( @@ -319,7 +319,7 @@ void test_vsoxei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i64m4(int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) { - return vsoxei16_v_i64m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_i64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i64m8( @@ -328,7 +328,7 @@ void test_vsoxei16_v_i64m4(int64_t *base, vuint16m1_t bindex, vint64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i64m8(int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) { - return vsoxei16_v_i64m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_i64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8mf8( @@ -337,7 +337,7 @@ void test_vsoxei16_v_i64m8(int64_t *base, vuint16m2_t bindex, vint64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t value, size_t vl) { - return vsoxei16_v_u8mf8(base, bindex, value, vl); + return __riscv_vsoxei16_v_u8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8mf4( @@ -346,7 +346,7 @@ void test_vsoxei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t value, size_t vl) { - return vsoxei16_v_u8mf4(base, bindex, value, vl); + return __riscv_vsoxei16_v_u8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8mf2( @@ -355,7 +355,7 @@ void test_vsoxei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t value, size_t vl) { - return vsoxei16_v_u8mf2(base, bindex, value, vl); + return __riscv_vsoxei16_v_u8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8m1( @@ -364,7 +364,7 @@ void test_vsoxei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t value, size_t vl) { - return vsoxei16_v_u8m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_u8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8m2( @@ -373,7 +373,7 @@ void test_vsoxei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t value, size_t vl) { - return vsoxei16_v_u8m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_u8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8m4( @@ -382,7 +382,7 @@ void test_vsoxei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8m4(uint8_t *base, vuint16m8_t bindex, vuint8m4_t value, size_t vl) { - return vsoxei16_v_u8m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_u8m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16mf4( @@ -391,7 +391,7 @@ void test_vsoxei16_v_u8m4(uint8_t *base, vuint16m8_t bindex, vuint8m4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t value, size_t vl) { - return vsoxei16_v_u16mf4(base, bindex, value, vl); + return __riscv_vsoxei16_v_u16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16mf2( @@ -400,7 +400,7 @@ void test_vsoxei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t va // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t value, size_t vl) { - return vsoxei16_v_u16mf2(base, bindex, value, vl); + return __riscv_vsoxei16_v_u16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16m1( @@ -409,7 +409,7 @@ void test_vsoxei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t value, size_t vl) { - return vsoxei16_v_u16m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_u16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16m2( @@ -418,7 +418,7 @@ void test_vsoxei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t value, size_t vl) { - return vsoxei16_v_u16m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_u16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16m4( @@ -427,7 +427,7 @@ void test_vsoxei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16m4(uint16_t *base, vuint16m4_t bindex, vuint16m4_t value, size_t vl) { - return vsoxei16_v_u16m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_u16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16m8( @@ -436,7 +436,7 @@ void test_vsoxei16_v_u16m4(uint16_t *base, vuint16m4_t bindex, vuint16m4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16m8(uint16_t *base, vuint16m8_t bindex, vuint16m8_t value, size_t vl) { - return vsoxei16_v_u16m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_u16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32mf2( @@ -445,7 +445,7 @@ void test_vsoxei16_v_u16m8(uint16_t *base, vuint16m8_t bindex, vuint16m8_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) { - return vsoxei16_v_u32mf2(base, bindex, value, vl); + return __riscv_vsoxei16_v_u32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32m1( @@ -454,7 +454,7 @@ void test_vsoxei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) { - return vsoxei16_v_u32m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_u32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32m2( @@ -463,7 +463,7 @@ void test_vsoxei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) { - return vsoxei16_v_u32m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_u32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32m4( @@ -472,7 +472,7 @@ void test_vsoxei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32m4(uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) { - return vsoxei16_v_u32m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_u32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32m8( @@ -481,7 +481,7 @@ void test_vsoxei16_v_u32m4(uint32_t *base, vuint16m2_t bindex, vuint32m4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32m8(uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) { - return vsoxei16_v_u32m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_u32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u64m1( @@ -490,7 +490,7 @@ void test_vsoxei16_v_u32m8(uint32_t *base, vuint16m4_t bindex, vuint32m8_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) { - return vsoxei16_v_u64m1(base, bindex, value, vl); + return __riscv_vsoxei16_v_u64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u64m2( @@ -499,7 +499,7 @@ void test_vsoxei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) { - return vsoxei16_v_u64m2(base, bindex, value, vl); + return __riscv_vsoxei16_v_u64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u64m4( @@ -508,7 +508,7 @@ void test_vsoxei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u64m4(uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) { - return vsoxei16_v_u64m4(base, bindex, value, vl); + return __riscv_vsoxei16_v_u64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u64m8( @@ -517,7 +517,7 @@ void test_vsoxei16_v_u64m4(uint64_t *base, vuint16m1_t bindex, vuint64m4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u64m8(uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) { - return vsoxei16_v_u64m8(base, bindex, value, vl); + return __riscv_vsoxei16_v_u64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16mf4_m( @@ -526,7 +526,7 @@ void test_vsoxei16_v_u64m8(uint64_t *base, vuint16m2_t bindex, vuint64m8_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t value, size_t vl) { - return vsoxei16_v_f16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16mf2_m( @@ -535,7 +535,7 @@ void test_vsoxei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t value, size_t vl) { - return vsoxei16_v_f16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16m1_m( @@ -544,7 +544,7 @@ void test_vsoxei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t value, size_t vl) { - return vsoxei16_v_f16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16m2_m( @@ -553,7 +553,7 @@ void test_vsoxei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, vfloat16m2_t value, size_t vl) { - return vsoxei16_v_f16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16m4_m( @@ -562,7 +562,7 @@ void test_vsoxei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint16m4_t bindex, vfloat16m4_t value, size_t vl) { - return vsoxei16_v_f16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f16m8_m( @@ -571,7 +571,7 @@ void test_vsoxei16_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint16m8_t bindex, vfloat16m8_t value, size_t vl) { - return vsoxei16_v_f16m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32mf2_m( @@ -580,7 +580,7 @@ void test_vsoxei16_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint16m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t value, size_t vl) { - return vsoxei16_v_f32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32m1_m( @@ -589,7 +589,7 @@ void test_vsoxei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t value, size_t vl) { - return vsoxei16_v_f32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32m2_m( @@ -598,7 +598,7 @@ void test_vsoxei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vfloat32m2_t value, size_t vl) { - return vsoxei16_v_f32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32m4_m( @@ -607,7 +607,7 @@ void test_vsoxei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32m4_m(vbool8_t mask, float *base, vuint16m2_t bindex, vfloat32m4_t value, size_t vl) { - return vsoxei16_v_f32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f32m8_m( @@ -616,7 +616,7 @@ void test_vsoxei16_v_f32m4_m(vbool8_t mask, float *base, vuint16m2_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f32m8_m(vbool4_t mask, float *base, vuint16m4_t bindex, vfloat32m8_t value, size_t vl) { - return vsoxei16_v_f32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f64m1_m( @@ -625,7 +625,7 @@ void test_vsoxei16_v_f32m8_m(vbool4_t mask, float *base, vuint16m4_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t value, size_t vl) { - return vsoxei16_v_f64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f64m2_m( @@ -634,7 +634,7 @@ void test_vsoxei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, vfloat64m2_t value, size_t vl) { - return vsoxei16_v_f64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f64m4_m( @@ -643,7 +643,7 @@ void test_vsoxei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f64m4_m(vbool16_t mask, double *base, vuint16m1_t bindex, vfloat64m4_t value, size_t vl) { - return vsoxei16_v_f64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_f64m8_m( @@ -652,7 +652,7 @@ void test_vsoxei16_v_f64m4_m(vbool16_t mask, double *base, vuint16m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_f64m8_m(vbool8_t mask, double *base, vuint16m2_t bindex, vfloat64m8_t value, size_t vl) { - return vsoxei16_v_f64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_f64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8mf8_m( @@ -661,7 +661,7 @@ void test_vsoxei16_v_f64m8_m(vbool8_t mask, double *base, vuint16m2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t value, size_t vl) { - return vsoxei16_v_i8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8mf4_m( @@ -670,7 +670,7 @@ void test_vsoxei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t value, size_t vl) { - return vsoxei16_v_i8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8mf2_m( @@ -679,7 +679,7 @@ void test_vsoxei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t value, size_t vl) { - return vsoxei16_v_i8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vsoxei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t value, size_t vl) { - return vsoxei16_v_i8m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8m2_m( @@ -697,7 +697,7 @@ void test_vsoxei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vint8m2_t value, size_t vl) { - return vsoxei16_v_i8m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i8m4_m( @@ -706,7 +706,7 @@ void test_vsoxei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i8m4_m(vbool2_t mask, int8_t *base, vuint16m8_t bindex, vint8m4_t value, size_t vl) { - return vsoxei16_v_i8m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i8m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16mf4_m( @@ -715,7 +715,7 @@ void test_vsoxei16_v_i8m4_m(vbool2_t mask, int8_t *base, vuint16m8_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t value, size_t vl) { - return vsoxei16_v_i16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16mf2_m( @@ -724,7 +724,7 @@ void test_vsoxei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t value, size_t vl) { - return vsoxei16_v_i16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16m1_m( @@ -733,7 +733,7 @@ void test_vsoxei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t value, size_t vl) { - return vsoxei16_v_i16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16m2_m( @@ -742,7 +742,7 @@ void test_vsoxei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, vint16m2_t value, size_t vl) { - return vsoxei16_v_i16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16m4_m( @@ -751,7 +751,7 @@ void test_vsoxei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16m4_m(vbool4_t mask, int16_t *base, vuint16m4_t bindex, vint16m4_t value, size_t vl) { - return vsoxei16_v_i16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i16m8_m( @@ -760,7 +760,7 @@ void test_vsoxei16_v_i16m4_m(vbool4_t mask, int16_t *base, vuint16m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i16m8_m(vbool2_t mask, int16_t *base, vuint16m8_t bindex, vint16m8_t value, size_t vl) { - return vsoxei16_v_i16m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32mf2_m( @@ -769,7 +769,7 @@ void test_vsoxei16_v_i16m8_m(vbool2_t mask, int16_t *base, vuint16m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) { - return vsoxei16_v_i32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32m1_m( @@ -778,7 +778,7 @@ void test_vsoxei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) { - return vsoxei16_v_i32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32m2_m( @@ -787,7 +787,7 @@ void test_vsoxei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) { - return vsoxei16_v_i32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32m4_m( @@ -796,7 +796,7 @@ void test_vsoxei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32m4_m(vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) { - return vsoxei16_v_i32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i32m8_m( @@ -805,7 +805,7 @@ void test_vsoxei16_v_i32m4_m(vbool8_t mask, int32_t *base, vuint16m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i32m8_m(vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) { - return vsoxei16_v_i32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i64m1_m( @@ -814,7 +814,7 @@ void test_vsoxei16_v_i32m8_m(vbool4_t mask, int32_t *base, vuint16m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) { - return vsoxei16_v_i64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i64m2_m( @@ -823,7 +823,7 @@ void test_vsoxei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) { - return vsoxei16_v_i64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i64m4_m( @@ -832,7 +832,7 @@ void test_vsoxei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i64m4_m(vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) { - return vsoxei16_v_i64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_i64m8_m( @@ -841,7 +841,7 @@ void test_vsoxei16_v_i64m4_m(vbool16_t mask, int64_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_i64m8_m(vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) { - return vsoxei16_v_i64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_i64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8mf8_m( @@ -850,7 +850,7 @@ void test_vsoxei16_v_i64m8_m(vbool8_t mask, int64_t *base, vuint16m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t value, size_t vl) { - return vsoxei16_v_u8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8mf4_m( @@ -859,7 +859,7 @@ void test_vsoxei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t value, size_t vl) { - return vsoxei16_v_u8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8mf2_m( @@ -868,7 +868,7 @@ void test_vsoxei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t value, size_t vl) { - return vsoxei16_v_u8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8m1_m( @@ -877,7 +877,7 @@ void test_vsoxei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t value, size_t vl) { - return vsoxei16_v_u8m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8m2_m( @@ -886,7 +886,7 @@ void test_vsoxei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vuint8m2_t value, size_t vl) { - return vsoxei16_v_u8m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u8m4_m( @@ -895,7 +895,7 @@ void test_vsoxei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint16m8_t bindex, vuint8m4_t value, size_t vl) { - return vsoxei16_v_u8m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u8m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16mf4_m( @@ -904,7 +904,7 @@ void test_vsoxei16_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint16m8_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t value, size_t vl) { - return vsoxei16_v_u16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16mf2_m( @@ -913,7 +913,7 @@ void test_vsoxei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t value, size_t vl) { - return vsoxei16_v_u16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16m1_m( @@ -922,7 +922,7 @@ void test_vsoxei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t value, size_t vl) { - return vsoxei16_v_u16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16m2_m( @@ -931,7 +931,7 @@ void test_vsoxei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, vuint16m2_t value, size_t vl) { - return vsoxei16_v_u16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16m4_m( @@ -940,7 +940,7 @@ void test_vsoxei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t bindex, vuint16m4_t value, size_t vl) { - return vsoxei16_v_u16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u16m8_m( @@ -949,7 +949,7 @@ void test_vsoxei16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint16m8_t bindex, vuint16m8_t value, size_t vl) { - return vsoxei16_v_u16m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32mf2_m( @@ -958,7 +958,7 @@ void test_vsoxei16_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint16m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) { - return vsoxei16_v_u32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32m1_m( @@ -967,7 +967,7 @@ void test_vsoxei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) { - return vsoxei16_v_u32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32m2_m( @@ -976,7 +976,7 @@ void test_vsoxei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) { - return vsoxei16_v_u32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32m4_m( @@ -985,7 +985,7 @@ void test_vsoxei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) { - return vsoxei16_v_u32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u32m8_m( @@ -994,7 +994,7 @@ void test_vsoxei16_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) { - return vsoxei16_v_u32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u64m1_m( @@ -1003,7 +1003,7 @@ void test_vsoxei16_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) { - return vsoxei16_v_u64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u64m2_m( @@ -1012,7 +1012,7 @@ void test_vsoxei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) { - return vsoxei16_v_u64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u64m4_m( @@ -1021,7 +1021,7 @@ void test_vsoxei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) { - return vsoxei16_v_u64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei16_v_u64m8_m( @@ -1030,6 +1030,6 @@ void test_vsoxei16_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei16_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) { - return vsoxei16_v_u64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei16_v_u64m8_m(mask, base, bindex, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei32.c index 6fb0df06240bd5299dd15bdba6643cb59755dbed..33a605334a535b271d013e336568dbede202be33 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t value, size_t vl) { - return vsoxei32_v_f16mf4(base, bindex, value, vl); + return __riscv_vsoxei32_v_f16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t value, size_t vl) { - return vsoxei32_v_f16mf2(base, bindex, value, vl); + return __riscv_vsoxei32_v_f16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t value, size_t vl) { - return vsoxei32_v_f16m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_f16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t value, size_t vl) { - return vsoxei32_v_f16m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_f16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16m4( @@ -49,7 +49,7 @@ void test_vsoxei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16m4(_Float16 *base, vuint32m8_t bindex, vfloat16m4_t value, size_t vl) { - return vsoxei32_v_f16m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_f16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32mf2( @@ -58,7 +58,7 @@ void test_vsoxei32_v_f16m4(_Float16 *base, vuint32m8_t bindex, vfloat16m4_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t value, size_t vl) { - return vsoxei32_v_f32mf2(base, bindex, value, vl); + return __riscv_vsoxei32_v_f32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32m1( @@ -67,7 +67,7 @@ void test_vsoxei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t value, size_t vl) { - return vsoxei32_v_f32m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_f32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32m2( @@ -76,7 +76,7 @@ void test_vsoxei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t value, size_t vl) { - return vsoxei32_v_f32m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_f32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32m4( @@ -85,7 +85,7 @@ void test_vsoxei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32m4(float *base, vuint32m4_t bindex, vfloat32m4_t value, size_t vl) { - return vsoxei32_v_f32m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_f32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32m8( @@ -94,7 +94,7 @@ void test_vsoxei32_v_f32m4(float *base, vuint32m4_t bindex, vfloat32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32m8(float *base, vuint32m8_t bindex, vfloat32m8_t value, size_t vl) { - return vsoxei32_v_f32m8(base, bindex, value, vl); + return __riscv_vsoxei32_v_f32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f64m1( @@ -103,7 +103,7 @@ void test_vsoxei32_v_f32m8(float *base, vuint32m8_t bindex, vfloat32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t value, size_t vl) { - return vsoxei32_v_f64m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_f64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f64m2( @@ -112,7 +112,7 @@ void test_vsoxei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t value, size_t vl) { - return vsoxei32_v_f64m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_f64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f64m4( @@ -121,7 +121,7 @@ void test_vsoxei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f64m4(double *base, vuint32m2_t bindex, vfloat64m4_t value, size_t vl) { - return vsoxei32_v_f64m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_f64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f64m8( @@ -130,7 +130,7 @@ void test_vsoxei32_v_f64m4(double *base, vuint32m2_t bindex, vfloat64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f64m8(double *base, vuint32m4_t bindex, vfloat64m8_t value, size_t vl) { - return vsoxei32_v_f64m8(base, bindex, value, vl); + return __riscv_vsoxei32_v_f64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8mf8( @@ -139,7 +139,7 @@ void test_vsoxei32_v_f64m8(double *base, vuint32m4_t bindex, vfloat64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t value, size_t vl) { - return vsoxei32_v_i8mf8(base, bindex, value, vl); + return __riscv_vsoxei32_v_i8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8mf4( @@ -148,7 +148,7 @@ void test_vsoxei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t value, size_t vl) { - return vsoxei32_v_i8mf4(base, bindex, value, vl); + return __riscv_vsoxei32_v_i8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8mf2( @@ -157,7 +157,7 @@ void test_vsoxei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t value, size_t vl) { - return vsoxei32_v_i8mf2(base, bindex, value, vl); + return __riscv_vsoxei32_v_i8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8m1( @@ -166,7 +166,7 @@ void test_vsoxei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t value, size_t vl) { - return vsoxei32_v_i8m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_i8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8m2( @@ -175,7 +175,7 @@ void test_vsoxei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t value, size_t vl) { - return vsoxei32_v_i8m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_i8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16mf4( @@ -184,7 +184,7 @@ void test_vsoxei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t value, size_t vl) { - return vsoxei32_v_i16mf4(base, bindex, value, vl); + return __riscv_vsoxei32_v_i16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16mf2( @@ -193,7 +193,7 @@ void test_vsoxei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t value, size_t vl) { - return vsoxei32_v_i16mf2(base, bindex, value, vl); + return __riscv_vsoxei32_v_i16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16m1( @@ -202,7 +202,7 @@ void test_vsoxei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t value, size_t vl) { - return vsoxei32_v_i16m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_i16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16m2( @@ -211,7 +211,7 @@ void test_vsoxei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t value, size_t vl) { - return vsoxei32_v_i16m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_i16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16m4( @@ -220,7 +220,7 @@ void test_vsoxei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16m4(int16_t *base, vuint32m8_t bindex, vint16m4_t value, size_t vl) { - return vsoxei32_v_i16m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_i16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32mf2( @@ -229,7 +229,7 @@ void test_vsoxei32_v_i16m4(int16_t *base, vuint32m8_t bindex, vint16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) { - return vsoxei32_v_i32mf2(base, bindex, value, vl); + return __riscv_vsoxei32_v_i32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32m1( @@ -238,7 +238,7 @@ void test_vsoxei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) { - return vsoxei32_v_i32m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_i32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32m2( @@ -247,7 +247,7 @@ void test_vsoxei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) { - return vsoxei32_v_i32m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_i32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32m4( @@ -256,7 +256,7 @@ void test_vsoxei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32m4(int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) { - return vsoxei32_v_i32m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_i32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32m8( @@ -265,7 +265,7 @@ void test_vsoxei32_v_i32m4(int32_t *base, vuint32m4_t bindex, vint32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32m8(int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) { - return vsoxei32_v_i32m8(base, bindex, value, vl); + return __riscv_vsoxei32_v_i32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i64m1( @@ -274,7 +274,7 @@ void test_vsoxei32_v_i32m8(int32_t *base, vuint32m8_t bindex, vint32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) { - return vsoxei32_v_i64m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_i64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i64m2( @@ -283,7 +283,7 @@ void test_vsoxei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) { - return vsoxei32_v_i64m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_i64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i64m4( @@ -292,7 +292,7 @@ void test_vsoxei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i64m4(int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) { - return vsoxei32_v_i64m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_i64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i64m8( @@ -301,7 +301,7 @@ void test_vsoxei32_v_i64m4(int64_t *base, vuint32m2_t bindex, vint64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i64m8(int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) { - return vsoxei32_v_i64m8(base, bindex, value, vl); + return __riscv_vsoxei32_v_i64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8mf8( @@ -310,7 +310,7 @@ void test_vsoxei32_v_i64m8(int64_t *base, vuint32m4_t bindex, vint64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t value, size_t vl) { - return vsoxei32_v_u8mf8(base, bindex, value, vl); + return __riscv_vsoxei32_v_u8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8mf4( @@ -319,7 +319,7 @@ void test_vsoxei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t value, size_t vl) { - return vsoxei32_v_u8mf4(base, bindex, value, vl); + return __riscv_vsoxei32_v_u8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8mf2( @@ -328,7 +328,7 @@ void test_vsoxei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t value, size_t vl) { - return vsoxei32_v_u8mf2(base, bindex, value, vl); + return __riscv_vsoxei32_v_u8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8m1( @@ -337,7 +337,7 @@ void test_vsoxei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t value, size_t vl) { - return vsoxei32_v_u8m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_u8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8m2( @@ -346,7 +346,7 @@ void test_vsoxei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t value, size_t vl) { - return vsoxei32_v_u8m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_u8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16mf4( @@ -355,7 +355,7 @@ void test_vsoxei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t value, size_t vl) { - return vsoxei32_v_u16mf4(base, bindex, value, vl); + return __riscv_vsoxei32_v_u16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16mf2( @@ -364,7 +364,7 @@ void test_vsoxei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t va // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t value, size_t vl) { - return vsoxei32_v_u16mf2(base, bindex, value, vl); + return __riscv_vsoxei32_v_u16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16m1( @@ -373,7 +373,7 @@ void test_vsoxei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t val // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t value, size_t vl) { - return vsoxei32_v_u16m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_u16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16m2( @@ -382,7 +382,7 @@ void test_vsoxei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t value, size_t vl) { - return vsoxei32_v_u16m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_u16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16m4( @@ -391,7 +391,7 @@ void test_vsoxei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16m4(uint16_t *base, vuint32m8_t bindex, vuint16m4_t value, size_t vl) { - return vsoxei32_v_u16m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_u16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32mf2( @@ -400,7 +400,7 @@ void test_vsoxei32_v_u16m4(uint16_t *base, vuint32m8_t bindex, vuint16m4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) { - return vsoxei32_v_u32mf2(base, bindex, value, vl); + return __riscv_vsoxei32_v_u32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32m1( @@ -409,7 +409,7 @@ void test_vsoxei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) { - return vsoxei32_v_u32m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_u32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32m2( @@ -418,7 +418,7 @@ void test_vsoxei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) { - return vsoxei32_v_u32m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_u32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32m4( @@ -427,7 +427,7 @@ void test_vsoxei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32m4(uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) { - return vsoxei32_v_u32m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_u32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32m8( @@ -436,7 +436,7 @@ void test_vsoxei32_v_u32m4(uint32_t *base, vuint32m4_t bindex, vuint32m4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32m8(uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) { - return vsoxei32_v_u32m8(base, bindex, value, vl); + return __riscv_vsoxei32_v_u32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u64m1( @@ -445,7 +445,7 @@ void test_vsoxei32_v_u32m8(uint32_t *base, vuint32m8_t bindex, vuint32m8_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) { - return vsoxei32_v_u64m1(base, bindex, value, vl); + return __riscv_vsoxei32_v_u64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u64m2( @@ -454,7 +454,7 @@ void test_vsoxei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) { - return vsoxei32_v_u64m2(base, bindex, value, vl); + return __riscv_vsoxei32_v_u64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u64m4( @@ -463,7 +463,7 @@ void test_vsoxei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u64m4(uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) { - return vsoxei32_v_u64m4(base, bindex, value, vl); + return __riscv_vsoxei32_v_u64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u64m8( @@ -472,7 +472,7 @@ void test_vsoxei32_v_u64m4(uint64_t *base, vuint32m2_t bindex, vuint64m4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u64m8(uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) { - return vsoxei32_v_u64m8(base, bindex, value, vl); + return __riscv_vsoxei32_v_u64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16mf4_m( @@ -481,7 +481,7 @@ void test_vsoxei32_v_u64m8(uint64_t *base, vuint32m4_t bindex, vuint64m8_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t value, size_t vl) { - return vsoxei32_v_f16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16mf2_m( @@ -490,7 +490,7 @@ void test_vsoxei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t value, size_t vl) { - return vsoxei32_v_f16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16m1_m( @@ -499,7 +499,7 @@ void test_vsoxei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t value, size_t vl) { - return vsoxei32_v_f16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16m2_m( @@ -508,7 +508,7 @@ void test_vsoxei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, vfloat16m2_t value, size_t vl) { - return vsoxei32_v_f16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f16m4_m( @@ -517,7 +517,7 @@ void test_vsoxei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint32m8_t bindex, vfloat16m4_t value, size_t vl) { - return vsoxei32_v_f16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32mf2_m( @@ -526,7 +526,7 @@ void test_vsoxei32_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t value, size_t vl) { - return vsoxei32_v_f32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32m1_m( @@ -535,7 +535,7 @@ void test_vsoxei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t value, size_t vl) { - return vsoxei32_v_f32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32m2_m( @@ -544,7 +544,7 @@ void test_vsoxei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vfloat32m2_t value, size_t vl) { - return vsoxei32_v_f32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32m4_m( @@ -553,7 +553,7 @@ void test_vsoxei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32m4_m(vbool8_t mask, float *base, vuint32m4_t bindex, vfloat32m4_t value, size_t vl) { - return vsoxei32_v_f32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f32m8_m( @@ -562,7 +562,7 @@ void test_vsoxei32_v_f32m4_m(vbool8_t mask, float *base, vuint32m4_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f32m8_m(vbool4_t mask, float *base, vuint32m8_t bindex, vfloat32m8_t value, size_t vl) { - return vsoxei32_v_f32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f64m1_m( @@ -571,7 +571,7 @@ void test_vsoxei32_v_f32m8_m(vbool4_t mask, float *base, vuint32m8_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t value, size_t vl) { - return vsoxei32_v_f64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f64m2_m( @@ -580,7 +580,7 @@ void test_vsoxei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, vfloat64m2_t value, size_t vl) { - return vsoxei32_v_f64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f64m4_m( @@ -589,7 +589,7 @@ void test_vsoxei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f64m4_m(vbool16_t mask, double *base, vuint32m2_t bindex, vfloat64m4_t value, size_t vl) { - return vsoxei32_v_f64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_f64m8_m( @@ -598,7 +598,7 @@ void test_vsoxei32_v_f64m4_m(vbool16_t mask, double *base, vuint32m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_f64m8_m(vbool8_t mask, double *base, vuint32m4_t bindex, vfloat64m8_t value, size_t vl) { - return vsoxei32_v_f64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_f64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8mf8_m( @@ -607,7 +607,7 @@ void test_vsoxei32_v_f64m8_m(vbool8_t mask, double *base, vuint32m4_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t value, size_t vl) { - return vsoxei32_v_i8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8mf4_m( @@ -616,7 +616,7 @@ void test_vsoxei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t value, size_t vl) { - return vsoxei32_v_i8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8mf2_m( @@ -625,7 +625,7 @@ void test_vsoxei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t value, size_t vl) { - return vsoxei32_v_i8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8m1_m( @@ -634,7 +634,7 @@ void test_vsoxei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t value, size_t vl) { - return vsoxei32_v_i8m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i8m2_m( @@ -643,7 +643,7 @@ void test_vsoxei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vint8m2_t value, size_t vl) { - return vsoxei32_v_i8m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16mf4_m( @@ -652,7 +652,7 @@ void test_vsoxei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t value, size_t vl) { - return vsoxei32_v_i16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16mf2_m( @@ -661,7 +661,7 @@ void test_vsoxei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t value, size_t vl) { - return vsoxei32_v_i16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16m1_m( @@ -670,7 +670,7 @@ void test_vsoxei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t value, size_t vl) { - return vsoxei32_v_i16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16m2_m( @@ -679,7 +679,7 @@ void test_vsoxei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, vint16m2_t value, size_t vl) { - return vsoxei32_v_i16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i16m4_m( @@ -688,7 +688,7 @@ void test_vsoxei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i16m4_m(vbool4_t mask, int16_t *base, vuint32m8_t bindex, vint16m4_t value, size_t vl) { - return vsoxei32_v_i16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32mf2_m( @@ -697,7 +697,7 @@ void test_vsoxei32_v_i16m4_m(vbool4_t mask, int16_t *base, vuint32m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) { - return vsoxei32_v_i32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32m1_m( @@ -706,7 +706,7 @@ void test_vsoxei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) { - return vsoxei32_v_i32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32m2_m( @@ -715,7 +715,7 @@ void test_vsoxei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) { - return vsoxei32_v_i32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32m4_m( @@ -724,7 +724,7 @@ void test_vsoxei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32m4_m(vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) { - return vsoxei32_v_i32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i32m8_m( @@ -733,7 +733,7 @@ void test_vsoxei32_v_i32m4_m(vbool8_t mask, int32_t *base, vuint32m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i32m8_m(vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) { - return vsoxei32_v_i32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i64m1_m( @@ -742,7 +742,7 @@ void test_vsoxei32_v_i32m8_m(vbool4_t mask, int32_t *base, vuint32m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) { - return vsoxei32_v_i64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i64m2_m( @@ -751,7 +751,7 @@ void test_vsoxei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) { - return vsoxei32_v_i64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i64m4_m( @@ -760,7 +760,7 @@ void test_vsoxei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i64m4_m(vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) { - return vsoxei32_v_i64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_i64m8_m( @@ -769,7 +769,7 @@ void test_vsoxei32_v_i64m4_m(vbool16_t mask, int64_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_i64m8_m(vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) { - return vsoxei32_v_i64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_i64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8mf8_m( @@ -778,7 +778,7 @@ void test_vsoxei32_v_i64m8_m(vbool8_t mask, int64_t *base, vuint32m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t value, size_t vl) { - return vsoxei32_v_u8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8mf4_m( @@ -787,7 +787,7 @@ void test_vsoxei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t value, size_t vl) { - return vsoxei32_v_u8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8mf2_m( @@ -796,7 +796,7 @@ void test_vsoxei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t value, size_t vl) { - return vsoxei32_v_u8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8m1_m( @@ -805,7 +805,7 @@ void test_vsoxei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t value, size_t vl) { - return vsoxei32_v_u8m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u8m2_m( @@ -814,7 +814,7 @@ void test_vsoxei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vuint8m2_t value, size_t vl) { - return vsoxei32_v_u8m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16mf4_m( @@ -823,7 +823,7 @@ void test_vsoxei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t value, size_t vl) { - return vsoxei32_v_u16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16mf2_m( @@ -832,7 +832,7 @@ void test_vsoxei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t value, size_t vl) { - return vsoxei32_v_u16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16m1_m( @@ -841,7 +841,7 @@ void test_vsoxei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t value, size_t vl) { - return vsoxei32_v_u16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16m2_m( @@ -850,7 +850,7 @@ void test_vsoxei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, vuint16m2_t value, size_t vl) { - return vsoxei32_v_u16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u16m4_m( @@ -859,7 +859,7 @@ void test_vsoxei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint32m8_t bindex, vuint16m4_t value, size_t vl) { - return vsoxei32_v_u16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32mf2_m( @@ -868,7 +868,7 @@ void test_vsoxei32_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) { - return vsoxei32_v_u32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32m1_m( @@ -877,7 +877,7 @@ void test_vsoxei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) { - return vsoxei32_v_u32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32m2_m( @@ -886,7 +886,7 @@ void test_vsoxei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) { - return vsoxei32_v_u32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32m4_m( @@ -895,7 +895,7 @@ void test_vsoxei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) { - return vsoxei32_v_u32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u32m8_m( @@ -904,7 +904,7 @@ void test_vsoxei32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) { - return vsoxei32_v_u32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u64m1_m( @@ -913,7 +913,7 @@ void test_vsoxei32_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) { - return vsoxei32_v_u64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u64m2_m( @@ -922,7 +922,7 @@ void test_vsoxei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) { - return vsoxei32_v_u64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u64m4_m( @@ -931,7 +931,7 @@ void test_vsoxei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) { - return vsoxei32_v_u64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei32_v_u64m8_m( @@ -940,6 +940,6 @@ void test_vsoxei32_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei32_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) { - return vsoxei32_v_u64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei32_v_u64m8_m(mask, base, bindex, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei64.c index d02e71218fcafd4cf8e1e31d2eb8204de2e5ef1d..d0b9e2294c42de700070d36abdabf7b6f4d376d1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t value, size_t vl) { - return vsoxei64_v_f16mf4(base, bindex, value, vl); + return __riscv_vsoxei64_v_f16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t va // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t value, size_t vl) { - return vsoxei64_v_f16mf2(base, bindex, value, vl); + return __riscv_vsoxei64_v_f16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t value, size_t vl) { - return vsoxei64_v_f16m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_f16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t value, size_t vl) { - return vsoxei64_v_f16m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_f16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t value, size_t vl) { - return vsoxei64_v_f32mf2(base, bindex, value, vl); + return __riscv_vsoxei64_v_f32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t value, size_t vl) { - return vsoxei64_v_f32m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_f32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t value, size_t vl) { - return vsoxei64_v_f32m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_f32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f32m4( @@ -76,7 +76,7 @@ void test_vsoxei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f32m4(float *base, vuint64m8_t bindex, vfloat32m4_t value, size_t vl) { - return vsoxei64_v_f32m4(base, bindex, value, vl); + return __riscv_vsoxei64_v_f32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f64m1( @@ -85,7 +85,7 @@ void test_vsoxei64_v_f32m4(float *base, vuint64m8_t bindex, vfloat32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t value, size_t vl) { - return vsoxei64_v_f64m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_f64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f64m2( @@ -94,7 +94,7 @@ void test_vsoxei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t value, size_t vl) { - return vsoxei64_v_f64m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_f64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f64m4( @@ -103,7 +103,7 @@ void test_vsoxei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f64m4(double *base, vuint64m4_t bindex, vfloat64m4_t value, size_t vl) { - return vsoxei64_v_f64m4(base, bindex, value, vl); + return __riscv_vsoxei64_v_f64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f64m8( @@ -112,7 +112,7 @@ void test_vsoxei64_v_f64m4(double *base, vuint64m4_t bindex, vfloat64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f64m8(double *base, vuint64m8_t bindex, vfloat64m8_t value, size_t vl) { - return vsoxei64_v_f64m8(base, bindex, value, vl); + return __riscv_vsoxei64_v_f64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i8mf8( @@ -121,7 +121,7 @@ void test_vsoxei64_v_f64m8(double *base, vuint64m8_t bindex, vfloat64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t value, size_t vl) { - return vsoxei64_v_i8mf8(base, bindex, value, vl); + return __riscv_vsoxei64_v_i8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i8mf4( @@ -130,7 +130,7 @@ void test_vsoxei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t value, size_t vl) { - return vsoxei64_v_i8mf4(base, bindex, value, vl); + return __riscv_vsoxei64_v_i8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i8mf2( @@ -139,7 +139,7 @@ void test_vsoxei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t value, size_t vl) { - return vsoxei64_v_i8mf2(base, bindex, value, vl); + return __riscv_vsoxei64_v_i8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i8m1( @@ -148,7 +148,7 @@ void test_vsoxei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t value, size_t vl) { - return vsoxei64_v_i8m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_i8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i16mf4( @@ -157,7 +157,7 @@ void test_vsoxei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t value, size_t vl) { - return vsoxei64_v_i16mf4(base, bindex, value, vl); + return __riscv_vsoxei64_v_i16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i16mf2( @@ -166,7 +166,7 @@ void test_vsoxei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t value, size_t vl) { - return vsoxei64_v_i16mf2(base, bindex, value, vl); + return __riscv_vsoxei64_v_i16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i16m1( @@ -175,7 +175,7 @@ void test_vsoxei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t value, size_t vl) { - return vsoxei64_v_i16m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_i16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i16m2( @@ -184,7 +184,7 @@ void test_vsoxei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t value, size_t vl) { - return vsoxei64_v_i16m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_i16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i32mf2( @@ -193,7 +193,7 @@ void test_vsoxei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) { - return vsoxei64_v_i32mf2(base, bindex, value, vl); + return __riscv_vsoxei64_v_i32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i32m1( @@ -202,7 +202,7 @@ void test_vsoxei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) { - return vsoxei64_v_i32m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_i32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i32m2( @@ -211,7 +211,7 @@ void test_vsoxei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) { - return vsoxei64_v_i32m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_i32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i32m4( @@ -220,7 +220,7 @@ void test_vsoxei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i32m4(int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) { - return vsoxei64_v_i32m4(base, bindex, value, vl); + return __riscv_vsoxei64_v_i32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i64m1( @@ -229,7 +229,7 @@ void test_vsoxei64_v_i32m4(int32_t *base, vuint64m8_t bindex, vint32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) { - return vsoxei64_v_i64m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_i64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i64m2( @@ -238,7 +238,7 @@ void test_vsoxei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) { - return vsoxei64_v_i64m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_i64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i64m4( @@ -247,7 +247,7 @@ void test_vsoxei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i64m4(int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) { - return vsoxei64_v_i64m4(base, bindex, value, vl); + return __riscv_vsoxei64_v_i64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i64m8( @@ -256,7 +256,7 @@ void test_vsoxei64_v_i64m4(int64_t *base, vuint64m4_t bindex, vint64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i64m8(int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) { - return vsoxei64_v_i64m8(base, bindex, value, vl); + return __riscv_vsoxei64_v_i64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u8mf8( @@ -265,7 +265,7 @@ void test_vsoxei64_v_i64m8(int64_t *base, vuint64m8_t bindex, vint64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t value, size_t vl) { - return vsoxei64_v_u8mf8(base, bindex, value, vl); + return __riscv_vsoxei64_v_u8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u8mf4( @@ -274,7 +274,7 @@ void test_vsoxei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t value, size_t vl) { - return vsoxei64_v_u8mf4(base, bindex, value, vl); + return __riscv_vsoxei64_v_u8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u8mf2( @@ -283,7 +283,7 @@ void test_vsoxei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t value, size_t vl) { - return vsoxei64_v_u8mf2(base, bindex, value, vl); + return __riscv_vsoxei64_v_u8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u8m1( @@ -292,7 +292,7 @@ void test_vsoxei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t value, size_t vl) { - return vsoxei64_v_u8m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_u8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u16mf4( @@ -301,7 +301,7 @@ void test_vsoxei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t value, size_t vl) { - return vsoxei64_v_u16mf4(base, bindex, value, vl); + return __riscv_vsoxei64_v_u16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u16mf2( @@ -310,7 +310,7 @@ void test_vsoxei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t val // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t value, size_t vl) { - return vsoxei64_v_u16mf2(base, bindex, value, vl); + return __riscv_vsoxei64_v_u16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u16m1( @@ -319,7 +319,7 @@ void test_vsoxei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t val // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t value, size_t vl) { - return vsoxei64_v_u16m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_u16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u16m2( @@ -328,7 +328,7 @@ void test_vsoxei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t value, size_t vl) { - return vsoxei64_v_u16m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_u16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u32mf2( @@ -337,7 +337,7 @@ void test_vsoxei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) { - return vsoxei64_v_u32mf2(base, bindex, value, vl); + return __riscv_vsoxei64_v_u32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u32m1( @@ -346,7 +346,7 @@ void test_vsoxei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t val // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) { - return vsoxei64_v_u32m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_u32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u32m2( @@ -355,7 +355,7 @@ void test_vsoxei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) { - return vsoxei64_v_u32m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_u32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u32m4( @@ -364,7 +364,7 @@ void test_vsoxei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u32m4(uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) { - return vsoxei64_v_u32m4(base, bindex, value, vl); + return __riscv_vsoxei64_v_u32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u64m1( @@ -373,7 +373,7 @@ void test_vsoxei64_v_u32m4(uint32_t *base, vuint64m8_t bindex, vuint32m4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) { - return vsoxei64_v_u64m1(base, bindex, value, vl); + return __riscv_vsoxei64_v_u64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u64m2( @@ -382,7 +382,7 @@ void test_vsoxei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) { - return vsoxei64_v_u64m2(base, bindex, value, vl); + return __riscv_vsoxei64_v_u64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u64m4( @@ -391,7 +391,7 @@ void test_vsoxei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u64m4(uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) { - return vsoxei64_v_u64m4(base, bindex, value, vl); + return __riscv_vsoxei64_v_u64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u64m8( @@ -400,7 +400,7 @@ void test_vsoxei64_v_u64m4(uint64_t *base, vuint64m4_t bindex, vuint64m4_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u64m8(uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) { - return vsoxei64_v_u64m8(base, bindex, value, vl); + return __riscv_vsoxei64_v_u64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f16mf4_m( @@ -409,7 +409,7 @@ void test_vsoxei64_v_u64m8(uint64_t *base, vuint64m8_t bindex, vuint64m8_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t value, size_t vl) { - return vsoxei64_v_f16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f16mf2_m( @@ -418,7 +418,7 @@ void test_vsoxei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t value, size_t vl) { - return vsoxei64_v_f16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f16m1_m( @@ -427,7 +427,7 @@ void test_vsoxei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t value, size_t vl) { - return vsoxei64_v_f16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f16m2_m( @@ -436,7 +436,7 @@ void test_vsoxei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, vfloat16m2_t value, size_t vl) { - return vsoxei64_v_f16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f32mf2_m( @@ -445,7 +445,7 @@ void test_vsoxei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t value, size_t vl) { - return vsoxei64_v_f32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f32m1_m( @@ -454,7 +454,7 @@ void test_vsoxei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t value, size_t vl) { - return vsoxei64_v_f32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f32m2_m( @@ -463,7 +463,7 @@ void test_vsoxei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vfloat32m2_t value, size_t vl) { - return vsoxei64_v_f32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f32m4_m( @@ -472,7 +472,7 @@ void test_vsoxei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f32m4_m(vbool8_t mask, float *base, vuint64m8_t bindex, vfloat32m4_t value, size_t vl) { - return vsoxei64_v_f32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f64m1_m( @@ -481,7 +481,7 @@ void test_vsoxei64_v_f32m4_m(vbool8_t mask, float *base, vuint64m8_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t value, size_t vl) { - return vsoxei64_v_f64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f64m2_m( @@ -490,7 +490,7 @@ void test_vsoxei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, vfloat64m2_t value, size_t vl) { - return vsoxei64_v_f64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f64m4_m( @@ -499,7 +499,7 @@ void test_vsoxei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f64m4_m(vbool16_t mask, double *base, vuint64m4_t bindex, vfloat64m4_t value, size_t vl) { - return vsoxei64_v_f64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_f64m8_m( @@ -508,7 +508,7 @@ void test_vsoxei64_v_f64m4_m(vbool16_t mask, double *base, vuint64m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_f64m8_m(vbool8_t mask, double *base, vuint64m8_t bindex, vfloat64m8_t value, size_t vl) { - return vsoxei64_v_f64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_f64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i8mf8_m( @@ -517,7 +517,7 @@ void test_vsoxei64_v_f64m8_m(vbool8_t mask, double *base, vuint64m8_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t value, size_t vl) { - return vsoxei64_v_i8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i8mf4_m( @@ -526,7 +526,7 @@ void test_vsoxei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t value, size_t vl) { - return vsoxei64_v_i8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i8mf2_m( @@ -535,7 +535,7 @@ void test_vsoxei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t value, size_t vl) { - return vsoxei64_v_i8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i8m1_m( @@ -544,7 +544,7 @@ void test_vsoxei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t value, size_t vl) { - return vsoxei64_v_i8m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i16mf4_m( @@ -553,7 +553,7 @@ void test_vsoxei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t value, size_t vl) { - return vsoxei64_v_i16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i16mf2_m( @@ -562,7 +562,7 @@ void test_vsoxei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t value, size_t vl) { - return vsoxei64_v_i16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i16m1_m( @@ -571,7 +571,7 @@ void test_vsoxei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t value, size_t vl) { - return vsoxei64_v_i16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i16m2_m( @@ -580,7 +580,7 @@ void test_vsoxei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, vint16m2_t value, size_t vl) { - return vsoxei64_v_i16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i32mf2_m( @@ -589,7 +589,7 @@ void test_vsoxei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) { - return vsoxei64_v_i32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i32m1_m( @@ -598,7 +598,7 @@ void test_vsoxei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) { - return vsoxei64_v_i32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i32m2_m( @@ -607,7 +607,7 @@ void test_vsoxei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) { - return vsoxei64_v_i32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i32m4_m( @@ -616,7 +616,7 @@ void test_vsoxei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i32m4_m(vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) { - return vsoxei64_v_i32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i64m1_m( @@ -625,7 +625,7 @@ void test_vsoxei64_v_i32m4_m(vbool8_t mask, int32_t *base, vuint64m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) { - return vsoxei64_v_i64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i64m2_m( @@ -634,7 +634,7 @@ void test_vsoxei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) { - return vsoxei64_v_i64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i64m4_m( @@ -643,7 +643,7 @@ void test_vsoxei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i64m4_m(vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) { - return vsoxei64_v_i64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_i64m8_m( @@ -652,7 +652,7 @@ void test_vsoxei64_v_i64m4_m(vbool16_t mask, int64_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_i64m8_m(vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) { - return vsoxei64_v_i64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_i64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u8mf8_m( @@ -661,7 +661,7 @@ void test_vsoxei64_v_i64m8_m(vbool8_t mask, int64_t *base, vuint64m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t value, size_t vl) { - return vsoxei64_v_u8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u8mf4_m( @@ -670,7 +670,7 @@ void test_vsoxei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t value, size_t vl) { - return vsoxei64_v_u8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u8mf2_m( @@ -679,7 +679,7 @@ void test_vsoxei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t value, size_t vl) { - return vsoxei64_v_u8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u8m1_m( @@ -688,7 +688,7 @@ void test_vsoxei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t value, size_t vl) { - return vsoxei64_v_u8m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u16mf4_m( @@ -697,7 +697,7 @@ void test_vsoxei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t value, size_t vl) { - return vsoxei64_v_u16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u16mf2_m( @@ -706,7 +706,7 @@ void test_vsoxei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t value, size_t vl) { - return vsoxei64_v_u16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u16m1_m( @@ -715,7 +715,7 @@ void test_vsoxei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t value, size_t vl) { - return vsoxei64_v_u16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u16m2_m( @@ -724,7 +724,7 @@ void test_vsoxei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, vuint16m2_t value, size_t vl) { - return vsoxei64_v_u16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u32mf2_m( @@ -733,7 +733,7 @@ void test_vsoxei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) { - return vsoxei64_v_u32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u32m1_m( @@ -742,7 +742,7 @@ void test_vsoxei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) { - return vsoxei64_v_u32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u32m2_m( @@ -751,7 +751,7 @@ void test_vsoxei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) { - return vsoxei64_v_u32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u32m4_m( @@ -760,7 +760,7 @@ void test_vsoxei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) { - return vsoxei64_v_u32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u64m1_m( @@ -769,7 +769,7 @@ void test_vsoxei64_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) { - return vsoxei64_v_u64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u64m2_m( @@ -778,7 +778,7 @@ void test_vsoxei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) { - return vsoxei64_v_u64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u64m4_m( @@ -787,7 +787,7 @@ void test_vsoxei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) { - return vsoxei64_v_u64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei64_v_u64m8_m( @@ -796,6 +796,6 @@ void test_vsoxei64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei64_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) { - return vsoxei64_v_u64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei64_v_u64m8_m(mask, base, bindex, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei8.c index 7ad530831a5fd6ab2e2ad4065aa01bf014c29034..2a7423bc369241f881bbee2ad069afdf73933e96 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t value, size_t vl) { - return vsoxei8_v_f16mf4(base, bindex, value, vl); + return __riscv_vsoxei8_v_f16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t val // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t value, size_t vl) { - return vsoxei8_v_f16mf2(base, bindex, value, vl); + return __riscv_vsoxei8_v_f16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t val // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t value, size_t vl) { - return vsoxei8_v_f16m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_f16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t value // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t value, size_t vl) { - return vsoxei8_v_f16m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_f16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16m4( @@ -49,7 +49,7 @@ void test_vsoxei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t value, size_t vl) { - return vsoxei8_v_f16m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_f16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16m8( @@ -58,7 +58,7 @@ void test_vsoxei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16m8(_Float16 *base, vuint8m4_t bindex, vfloat16m8_t value, size_t vl) { - return vsoxei8_v_f16m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_f16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32mf2( @@ -67,7 +67,7 @@ void test_vsoxei8_v_f16m8(_Float16 *base, vuint8m4_t bindex, vfloat16m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t value, size_t vl) { - return vsoxei8_v_f32mf2(base, bindex, value, vl); + return __riscv_vsoxei8_v_f32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32m1( @@ -76,7 +76,7 @@ void test_vsoxei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t value, size_t vl) { - return vsoxei8_v_f32m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_f32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32m2( @@ -85,7 +85,7 @@ void test_vsoxei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t value, size_t vl) { - return vsoxei8_v_f32m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_f32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32m4( @@ -94,7 +94,7 @@ void test_vsoxei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t value, size_t vl) { - return vsoxei8_v_f32m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_f32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32m8( @@ -103,7 +103,7 @@ void test_vsoxei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32m8(float *base, vuint8m2_t bindex, vfloat32m8_t value, size_t vl) { - return vsoxei8_v_f32m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_f32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f64m1( @@ -112,7 +112,7 @@ void test_vsoxei8_v_f32m8(float *base, vuint8m2_t bindex, vfloat32m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t value, size_t vl) { - return vsoxei8_v_f64m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_f64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f64m2( @@ -121,7 +121,7 @@ void test_vsoxei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t value, size_t vl) { - return vsoxei8_v_f64m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_f64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f64m4( @@ -130,7 +130,7 @@ void test_vsoxei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t value, size_t vl) { - return vsoxei8_v_f64m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_f64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f64m8( @@ -139,7 +139,7 @@ void test_vsoxei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f64m8(double *base, vuint8m1_t bindex, vfloat64m8_t value, size_t vl) { - return vsoxei8_v_f64m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_f64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8mf8( @@ -148,7 +148,7 @@ void test_vsoxei8_v_f64m8(double *base, vuint8m1_t bindex, vfloat64m8_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t value, size_t vl) { - return vsoxei8_v_i8mf8(base, bindex, value, vl); + return __riscv_vsoxei8_v_i8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8mf4( @@ -157,7 +157,7 @@ void test_vsoxei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t value, size_t vl) { - return vsoxei8_v_i8mf4(base, bindex, value, vl); + return __riscv_vsoxei8_v_i8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8mf2( @@ -166,7 +166,7 @@ void test_vsoxei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t value, size_t vl) { - return vsoxei8_v_i8mf2(base, bindex, value, vl); + return __riscv_vsoxei8_v_i8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8m1( @@ -175,7 +175,7 @@ void test_vsoxei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t value, size_t vl) { - return vsoxei8_v_i8m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_i8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8m2( @@ -184,7 +184,7 @@ void test_vsoxei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t value, size_t vl) { - return vsoxei8_v_i8m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_i8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8m4( @@ -193,7 +193,7 @@ void test_vsoxei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t value, size_t vl) { - return vsoxei8_v_i8m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_i8m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8m8( @@ -202,7 +202,7 @@ void test_vsoxei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8m8(int8_t *base, vuint8m8_t bindex, vint8m8_t value, size_t vl) { - return vsoxei8_v_i8m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_i8m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16mf4( @@ -211,7 +211,7 @@ void test_vsoxei8_v_i8m8(int8_t *base, vuint8m8_t bindex, vint8m8_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t value, size_t vl) { - return vsoxei8_v_i16mf4(base, bindex, value, vl); + return __riscv_vsoxei8_v_i16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16mf2( @@ -220,7 +220,7 @@ void test_vsoxei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t value, size_t vl) { - return vsoxei8_v_i16mf2(base, bindex, value, vl); + return __riscv_vsoxei8_v_i16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16m1( @@ -229,7 +229,7 @@ void test_vsoxei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t value, size_t vl) { - return vsoxei8_v_i16m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_i16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16m2( @@ -238,7 +238,7 @@ void test_vsoxei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t value, size_t vl) { - return vsoxei8_v_i16m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_i16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16m4( @@ -247,7 +247,7 @@ void test_vsoxei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t value, size_t vl) { - return vsoxei8_v_i16m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_i16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16m8( @@ -256,7 +256,7 @@ void test_vsoxei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16m8(int16_t *base, vuint8m4_t bindex, vint16m8_t value, size_t vl) { - return vsoxei8_v_i16m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_i16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32mf2( @@ -265,7 +265,7 @@ void test_vsoxei8_v_i16m8(int16_t *base, vuint8m4_t bindex, vint16m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) { - return vsoxei8_v_i32mf2(base, bindex, value, vl); + return __riscv_vsoxei8_v_i32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32m1( @@ -274,7 +274,7 @@ void test_vsoxei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) { - return vsoxei8_v_i32m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_i32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32m2( @@ -283,7 +283,7 @@ void test_vsoxei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) { - return vsoxei8_v_i32m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_i32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32m4( @@ -292,7 +292,7 @@ void test_vsoxei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) { - return vsoxei8_v_i32m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_i32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32m8( @@ -301,7 +301,7 @@ void test_vsoxei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32m8(int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) { - return vsoxei8_v_i32m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_i32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i64m1( @@ -310,7 +310,7 @@ void test_vsoxei8_v_i32m8(int32_t *base, vuint8m2_t bindex, vint32m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) { - return vsoxei8_v_i64m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_i64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i64m2( @@ -319,7 +319,7 @@ void test_vsoxei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) { - return vsoxei8_v_i64m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_i64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i64m4( @@ -328,7 +328,7 @@ void test_vsoxei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) { - return vsoxei8_v_i64m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_i64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i64m8( @@ -337,7 +337,7 @@ void test_vsoxei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i64m8(int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) { - return vsoxei8_v_i64m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_i64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8mf8( @@ -346,7 +346,7 @@ void test_vsoxei8_v_i64m8(int64_t *base, vuint8m1_t bindex, vint64m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t value, size_t vl) { - return vsoxei8_v_u8mf8(base, bindex, value, vl); + return __riscv_vsoxei8_v_u8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8mf4( @@ -355,7 +355,7 @@ void test_vsoxei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t value, size_t vl) { - return vsoxei8_v_u8mf4(base, bindex, value, vl); + return __riscv_vsoxei8_v_u8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8mf2( @@ -364,7 +364,7 @@ void test_vsoxei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t value, size_t vl) { - return vsoxei8_v_u8mf2(base, bindex, value, vl); + return __riscv_vsoxei8_v_u8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8m1( @@ -373,7 +373,7 @@ void test_vsoxei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t value, size_t vl) { - return vsoxei8_v_u8m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_u8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8m2( @@ -382,7 +382,7 @@ void test_vsoxei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t value, size_t vl) { - return vsoxei8_v_u8m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_u8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8m4( @@ -391,7 +391,7 @@ void test_vsoxei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t value, size_t vl) { - return vsoxei8_v_u8m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_u8m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8m8( @@ -400,7 +400,7 @@ void test_vsoxei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8m8(uint8_t *base, vuint8m8_t bindex, vuint8m8_t value, size_t vl) { - return vsoxei8_v_u8m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_u8m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16mf4( @@ -409,7 +409,7 @@ void test_vsoxei8_v_u8m8(uint8_t *base, vuint8m8_t bindex, vuint8m8_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t value, size_t vl) { - return vsoxei8_v_u16mf4(base, bindex, value, vl); + return __riscv_vsoxei8_v_u16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16mf2( @@ -418,7 +418,7 @@ void test_vsoxei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t value, size_t vl) { - return vsoxei8_v_u16mf2(base, bindex, value, vl); + return __riscv_vsoxei8_v_u16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16m1( @@ -427,7 +427,7 @@ void test_vsoxei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t value, size_t vl) { - return vsoxei8_v_u16m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_u16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16m2( @@ -436,7 +436,7 @@ void test_vsoxei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t value, size_t vl) { - return vsoxei8_v_u16m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_u16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16m4( @@ -445,7 +445,7 @@ void test_vsoxei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t value, size_t vl) { - return vsoxei8_v_u16m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_u16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16m8( @@ -454,7 +454,7 @@ void test_vsoxei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16m8(uint16_t *base, vuint8m4_t bindex, vuint16m8_t value, size_t vl) { - return vsoxei8_v_u16m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_u16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32mf2( @@ -463,7 +463,7 @@ void test_vsoxei8_v_u16m8(uint16_t *base, vuint8m4_t bindex, vuint16m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) { - return vsoxei8_v_u32mf2(base, bindex, value, vl); + return __riscv_vsoxei8_v_u32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32m1( @@ -472,7 +472,7 @@ void test_vsoxei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) { - return vsoxei8_v_u32m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_u32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32m2( @@ -481,7 +481,7 @@ void test_vsoxei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) { - return vsoxei8_v_u32m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_u32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32m4( @@ -490,7 +490,7 @@ void test_vsoxei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) { - return vsoxei8_v_u32m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_u32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32m8( @@ -499,7 +499,7 @@ void test_vsoxei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32m8(uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) { - return vsoxei8_v_u32m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_u32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u64m1( @@ -508,7 +508,7 @@ void test_vsoxei8_v_u32m8(uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) { - return vsoxei8_v_u64m1(base, bindex, value, vl); + return __riscv_vsoxei8_v_u64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u64m2( @@ -517,7 +517,7 @@ void test_vsoxei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) { - return vsoxei8_v_u64m2(base, bindex, value, vl); + return __riscv_vsoxei8_v_u64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u64m4( @@ -526,7 +526,7 @@ void test_vsoxei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) { - return vsoxei8_v_u64m4(base, bindex, value, vl); + return __riscv_vsoxei8_v_u64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u64m8( @@ -535,7 +535,7 @@ void test_vsoxei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u64m8(uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) { - return vsoxei8_v_u64m8(base, bindex, value, vl); + return __riscv_vsoxei8_v_u64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16mf4_m( @@ -544,7 +544,7 @@ void test_vsoxei8_v_u64m8(uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t value, size_t vl) { - return vsoxei8_v_f16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16mf2_m( @@ -553,7 +553,7 @@ void test_vsoxei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t value, size_t vl) { - return vsoxei8_v_f16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16m1_m( @@ -562,7 +562,7 @@ void test_vsoxei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t value, size_t vl) { - return vsoxei8_v_f16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16m2_m( @@ -571,7 +571,7 @@ void test_vsoxei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t value, size_t vl) { - return vsoxei8_v_f16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16m4_m( @@ -580,7 +580,7 @@ void test_vsoxei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex, vfloat16m4_t value, size_t vl) { - return vsoxei8_v_f16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f16m8_m( @@ -589,7 +589,7 @@ void test_vsoxei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint8m4_t bindex, vfloat16m8_t value, size_t vl) { - return vsoxei8_v_f16m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32mf2_m( @@ -598,7 +598,7 @@ void test_vsoxei8_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint8m4_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t value, size_t vl) { - return vsoxei8_v_f32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32m1_m( @@ -607,7 +607,7 @@ void test_vsoxei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t value, size_t vl) { - return vsoxei8_v_f32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32m2_m( @@ -616,7 +616,7 @@ void test_vsoxei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t value, size_t vl) { - return vsoxei8_v_f32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32m4_m( @@ -625,7 +625,7 @@ void test_vsoxei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, vfloat32m4_t value, size_t vl) { - return vsoxei8_v_f32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f32m8_m( @@ -634,7 +634,7 @@ void test_vsoxei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, vfloa // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f32m8_m(vbool4_t mask, float *base, vuint8m2_t bindex, vfloat32m8_t value, size_t vl) { - return vsoxei8_v_f32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f64m1_m( @@ -643,7 +643,7 @@ void test_vsoxei8_v_f32m8_m(vbool4_t mask, float *base, vuint8m2_t bindex, vfloa // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t value, size_t vl) { - return vsoxei8_v_f64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f64m2_m( @@ -652,7 +652,7 @@ void test_vsoxei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t value, size_t vl) { - return vsoxei8_v_f64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f64m4_m( @@ -661,7 +661,7 @@ void test_vsoxei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex, vfloat64m4_t value, size_t vl) { - return vsoxei8_v_f64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_f64m8_m( @@ -670,7 +670,7 @@ void test_vsoxei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_f64m8_m(vbool8_t mask, double *base, vuint8m1_t bindex, vfloat64m8_t value, size_t vl) { - return vsoxei8_v_f64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_f64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8mf8_m( @@ -679,7 +679,7 @@ void test_vsoxei8_v_f64m8_m(vbool8_t mask, double *base, vuint8m1_t bindex, vflo // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t value, size_t vl) { - return vsoxei8_v_i8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8mf4_m( @@ -688,7 +688,7 @@ void test_vsoxei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vi // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t value, size_t vl) { - return vsoxei8_v_i8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8mf2_m( @@ -697,7 +697,7 @@ void test_vsoxei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vi // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t value, size_t vl) { - return vsoxei8_v_i8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8m1_m( @@ -706,7 +706,7 @@ void test_vsoxei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vi // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t value, size_t vl) { - return vsoxei8_v_i8m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8m2_m( @@ -715,7 +715,7 @@ void test_vsoxei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8 // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t value, size_t vl) { - return vsoxei8_v_i8m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8m4_m( @@ -724,7 +724,7 @@ void test_vsoxei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8 // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, vint8m4_t value, size_t vl) { - return vsoxei8_v_i8m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i8m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i8m8_m( @@ -733,7 +733,7 @@ void test_vsoxei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, vint8 // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i8m8_m(vbool1_t mask, int8_t *base, vuint8m8_t bindex, vint8m8_t value, size_t vl) { - return vsoxei8_v_i8m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i8m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16mf4_m( @@ -742,7 +742,7 @@ void test_vsoxei8_v_i8m8_m(vbool1_t mask, int8_t *base, vuint8m8_t bindex, vint8 // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t value, size_t vl) { - return vsoxei8_v_i16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16mf2_m( @@ -751,7 +751,7 @@ void test_vsoxei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t value, size_t vl) { - return vsoxei8_v_i16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16m1_m( @@ -760,7 +760,7 @@ void test_vsoxei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t value, size_t vl) { - return vsoxei8_v_i16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16m2_m( @@ -769,7 +769,7 @@ void test_vsoxei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t value, size_t vl) { - return vsoxei8_v_i16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16m4_m( @@ -778,7 +778,7 @@ void test_vsoxei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, vint16m4_t value, size_t vl) { - return vsoxei8_v_i16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i16m8_m( @@ -787,7 +787,7 @@ void test_vsoxei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i16m8_m(vbool2_t mask, int16_t *base, vuint8m4_t bindex, vint16m8_t value, size_t vl) { - return vsoxei8_v_i16m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32mf2_m( @@ -796,7 +796,7 @@ void test_vsoxei8_v_i16m8_m(vbool2_t mask, int16_t *base, vuint8m4_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) { - return vsoxei8_v_i32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32m1_m( @@ -805,7 +805,7 @@ void test_vsoxei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) { - return vsoxei8_v_i32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32m2_m( @@ -814,7 +814,7 @@ void test_vsoxei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) { - return vsoxei8_v_i32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32m4_m( @@ -823,7 +823,7 @@ void test_vsoxei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) { - return vsoxei8_v_i32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i32m8_m( @@ -832,7 +832,7 @@ void test_vsoxei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i32m8_m(vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) { - return vsoxei8_v_i32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i64m1_m( @@ -841,7 +841,7 @@ void test_vsoxei8_v_i32m8_m(vbool4_t mask, int32_t *base, vuint8m2_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) { - return vsoxei8_v_i64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i64m2_m( @@ -850,7 +850,7 @@ void test_vsoxei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) { - return vsoxei8_v_i64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i64m4_m( @@ -859,7 +859,7 @@ void test_vsoxei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) { - return vsoxei8_v_i64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_i64m8_m( @@ -868,7 +868,7 @@ void test_vsoxei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_i64m8_m(vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) { - return vsoxei8_v_i64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_i64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8mf8_m( @@ -877,7 +877,7 @@ void test_vsoxei8_v_i64m8_m(vbool8_t mask, int64_t *base, vuint8m1_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t value, size_t vl) { - return vsoxei8_v_u8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8mf4_m( @@ -886,7 +886,7 @@ void test_vsoxei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t value, size_t vl) { - return vsoxei8_v_u8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8mf2_m( @@ -895,7 +895,7 @@ void test_vsoxei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t value, size_t vl) { - return vsoxei8_v_u8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8m1_m( @@ -904,7 +904,7 @@ void test_vsoxei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t value, size_t vl) { - return vsoxei8_v_u8m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8m2_m( @@ -913,7 +913,7 @@ void test_vsoxei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t value, size_t vl) { - return vsoxei8_v_u8m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8m4_m( @@ -922,7 +922,7 @@ void test_vsoxei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, vuint8m4_t value, size_t vl) { - return vsoxei8_v_u8m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u8m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u8m8_m( @@ -931,7 +931,7 @@ void test_vsoxei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, vuin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u8m8_m(vbool1_t mask, uint8_t *base, vuint8m8_t bindex, vuint8m8_t value, size_t vl) { - return vsoxei8_v_u8m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u8m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16mf4_m( @@ -940,7 +940,7 @@ void test_vsoxei8_v_u8m8_m(vbool1_t mask, uint8_t *base, vuint8m8_t bindex, vuin // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t value, size_t vl) { - return vsoxei8_v_u16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16mf2_m( @@ -949,7 +949,7 @@ void test_vsoxei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t value, size_t vl) { - return vsoxei8_v_u16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16m1_m( @@ -958,7 +958,7 @@ void test_vsoxei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t value, size_t vl) { - return vsoxei8_v_u16m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16m2_m( @@ -967,7 +967,7 @@ void test_vsoxei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t value, size_t vl) { - return vsoxei8_v_u16m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16m4_m( @@ -976,7 +976,7 @@ void test_vsoxei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex, vuint16m4_t value, size_t vl) { - return vsoxei8_v_u16m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u16m8_m( @@ -985,7 +985,7 @@ void test_vsoxei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint8m4_t bindex, vuint16m8_t value, size_t vl) { - return vsoxei8_v_u16m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32mf2_m( @@ -994,7 +994,7 @@ void test_vsoxei8_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint8m4_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) { - return vsoxei8_v_u32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32m1_m( @@ -1003,7 +1003,7 @@ void test_vsoxei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) { - return vsoxei8_v_u32m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32m2_m( @@ -1012,7 +1012,7 @@ void test_vsoxei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) { - return vsoxei8_v_u32m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32m4_m( @@ -1021,7 +1021,7 @@ void test_vsoxei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) { - return vsoxei8_v_u32m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u32m8_m( @@ -1030,7 +1030,7 @@ void test_vsoxei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) { - return vsoxei8_v_u32m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u64m1_m( @@ -1039,7 +1039,7 @@ void test_vsoxei8_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) { - return vsoxei8_v_u64m1_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u64m2_m( @@ -1048,7 +1048,7 @@ void test_vsoxei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) { - return vsoxei8_v_u64m2_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u64m4_m( @@ -1057,7 +1057,7 @@ void test_vsoxei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) { - return vsoxei8_v_u64m4_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsoxei8_v_u64m8_m( @@ -1066,6 +1066,6 @@ void test_vsoxei8_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxei8_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) { - return vsoxei8_v_u64m8_m(mask, base, bindex, value, vl); + return __riscv_vsoxei8_v_u64m8_m(mask, base, bindex, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c index cabd4777f7938cc02fcbf6fd8451b7c6aae6bc8b..4e74f8760b9aa42b7129357db3d38de91ac84152 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_f16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg2ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_f16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg2ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsoxseg2ei16_v_f16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg2ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsoxseg2ei16_v_f16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16m4( @@ -49,7 +49,7 @@ void test_vsoxseg2ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16m4(_Float16 *base, vuint16m4_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsoxseg2ei16_v_f16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f32mf2( @@ -58,7 +58,7 @@ void test_vsoxseg2ei16_v_f16m4(_Float16 *base, vuint16m4_t bindex, vfloat16m4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_f32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f32m1( @@ -67,7 +67,7 @@ void test_vsoxseg2ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsoxseg2ei16_v_f32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f32m2( @@ -76,7 +76,7 @@ void test_vsoxseg2ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsoxseg2ei16_v_f32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f32m4( @@ -85,7 +85,7 @@ void test_vsoxseg2ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f32m4(float *base, vuint16m2_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsoxseg2ei16_v_f32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f64m1( @@ -94,7 +94,7 @@ void test_vsoxseg2ei16_v_f32m4(float *base, vuint16m2_t bindex, vfloat32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsoxseg2ei16_v_f64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f64m2( @@ -103,7 +103,7 @@ void test_vsoxseg2ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsoxseg2ei16_v_f64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f64m4( @@ -112,7 +112,7 @@ void test_vsoxseg2ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f64m4(double *base, vuint16m1_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsoxseg2ei16_v_f64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8mf8( @@ -121,7 +121,7 @@ void test_vsoxseg2ei16_v_f64m4(double *base, vuint16m1_t bindex, vfloat64m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsoxseg2ei16_v_i8mf8(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8mf4( @@ -130,7 +130,7 @@ void test_vsoxseg2ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_i8mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8mf2( @@ -139,7 +139,7 @@ void test_vsoxseg2ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_i8mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8m1( @@ -148,7 +148,7 @@ void test_vsoxseg2ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsoxseg2ei16_v_i8m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8m2( @@ -157,7 +157,7 @@ void test_vsoxseg2ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsoxseg2ei16_v_i8m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8m4( @@ -166,7 +166,7 @@ void test_vsoxseg2ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8m4(int8_t *base, vuint16m8_t bindex, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsoxseg2ei16_v_i8m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16mf4( @@ -175,7 +175,7 @@ void test_vsoxseg2ei16_v_i8m4(int8_t *base, vuint16m8_t bindex, vint8m4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_i16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16mf2( @@ -184,7 +184,7 @@ void test_vsoxseg2ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_i16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16m1( @@ -193,7 +193,7 @@ void test_vsoxseg2ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsoxseg2ei16_v_i16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16m2( @@ -202,7 +202,7 @@ void test_vsoxseg2ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsoxseg2ei16_v_i16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16m4( @@ -211,7 +211,7 @@ void test_vsoxseg2ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16m4(int16_t *base, vuint16m4_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsoxseg2ei16_v_i16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg2ei16_v_i16m4(int16_t *base, vuint16m4_t bindex, vint16m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_i32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i32m1( @@ -229,7 +229,7 @@ void test_vsoxseg2ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsoxseg2ei16_v_i32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i32m2( @@ -238,7 +238,7 @@ void test_vsoxseg2ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsoxseg2ei16_v_i32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i32m4( @@ -247,7 +247,7 @@ void test_vsoxseg2ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i32m4(int32_t *base, vuint16m2_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsoxseg2ei16_v_i32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i64m1( @@ -256,7 +256,7 @@ void test_vsoxseg2ei16_v_i32m4(int32_t *base, vuint16m2_t bindex, vint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsoxseg2ei16_v_i64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i64m2( @@ -265,7 +265,7 @@ void test_vsoxseg2ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsoxseg2ei16_v_i64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i64m4( @@ -274,7 +274,7 @@ void test_vsoxseg2ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i64m4(int64_t *base, vuint16m1_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsoxseg2ei16_v_i64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8mf8( @@ -283,7 +283,7 @@ void test_vsoxseg2ei16_v_i64m4(int64_t *base, vuint16m1_t bindex, vint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsoxseg2ei16_v_u8mf8(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8mf4( @@ -292,7 +292,7 @@ void test_vsoxseg2ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_u8mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8mf2( @@ -301,7 +301,7 @@ void test_vsoxseg2ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_u8mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8m1( @@ -310,7 +310,7 @@ void test_vsoxseg2ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsoxseg2ei16_v_u8m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8m2( @@ -319,7 +319,7 @@ void test_vsoxseg2ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsoxseg2ei16_v_u8m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8m4( @@ -328,7 +328,7 @@ void test_vsoxseg2ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8m4(uint8_t *base, vuint16m8_t bindex, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsoxseg2ei16_v_u8m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16mf4( @@ -337,7 +337,7 @@ void test_vsoxseg2ei16_v_u8m4(uint8_t *base, vuint16m8_t bindex, vuint8m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_u16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16mf2( @@ -346,7 +346,7 @@ void test_vsoxseg2ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_u16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16m1( @@ -355,7 +355,7 @@ void test_vsoxseg2ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsoxseg2ei16_v_u16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16m2( @@ -364,7 +364,7 @@ void test_vsoxseg2ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsoxseg2ei16_v_u16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16m4( @@ -373,7 +373,7 @@ void test_vsoxseg2ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16m4(uint16_t *base, vuint16m4_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsoxseg2ei16_v_u16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u32mf2( @@ -382,7 +382,7 @@ void test_vsoxseg2ei16_v_u16m4(uint16_t *base, vuint16m4_t bindex, vuint16m4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_u32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u32m1( @@ -391,7 +391,7 @@ void test_vsoxseg2ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsoxseg2ei16_v_u32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u32m2( @@ -400,7 +400,7 @@ void test_vsoxseg2ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsoxseg2ei16_v_u32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u32m4( @@ -409,7 +409,7 @@ void test_vsoxseg2ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u32m4(uint32_t *base, vuint16m2_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsoxseg2ei16_v_u32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u64m1( @@ -418,7 +418,7 @@ void test_vsoxseg2ei16_v_u32m4(uint32_t *base, vuint16m2_t bindex, vuint32m4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsoxseg2ei16_v_u64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u64m2( @@ -427,7 +427,7 @@ void test_vsoxseg2ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsoxseg2ei16_v_u64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u64m4( @@ -436,7 +436,7 @@ void test_vsoxseg2ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u64m4(uint64_t *base, vuint16m1_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsoxseg2ei16_v_u64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16mf4_m( @@ -445,7 +445,7 @@ void test_vsoxseg2ei16_v_u64m4(uint64_t *base, vuint16m1_t bindex, vuint64m4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_f16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg2ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_f16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg2ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsoxseg2ei16_v_f16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16m2_m( @@ -472,7 +472,7 @@ void test_vsoxseg2ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsoxseg2ei16_v_f16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f16m4_m( @@ -481,7 +481,7 @@ void test_vsoxseg2ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint16m4_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsoxseg2ei16_v_f16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f32mf2_m( @@ -490,7 +490,7 @@ void test_vsoxseg2ei16_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint16m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_f32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f32m1_m( @@ -499,7 +499,7 @@ void test_vsoxseg2ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsoxseg2ei16_v_f32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f32m2_m( @@ -508,7 +508,7 @@ void test_vsoxseg2ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsoxseg2ei16_v_f32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f32m4_m( @@ -517,7 +517,7 @@ void test_vsoxseg2ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f32m4_m(vbool8_t mask, float *base, vuint16m2_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsoxseg2ei16_v_f32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f64m1_m( @@ -526,7 +526,7 @@ void test_vsoxseg2ei16_v_f32m4_m(vbool8_t mask, float *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsoxseg2ei16_v_f64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f64m2_m( @@ -535,7 +535,7 @@ void test_vsoxseg2ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsoxseg2ei16_v_f64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_f64m4_m( @@ -544,7 +544,7 @@ void test_vsoxseg2ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_f64m4_m(vbool16_t mask, double *base, vuint16m1_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsoxseg2ei16_v_f64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_f64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8mf8_m( @@ -553,7 +553,7 @@ void test_vsoxseg2ei16_v_f64m4_m(vbool16_t mask, double *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsoxseg2ei16_v_i8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg2ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_i8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg2ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_i8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg2ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsoxseg2ei16_v_i8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg2ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsoxseg2ei16_v_i8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i8m4_m( @@ -598,7 +598,7 @@ void test_vsoxseg2ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i8m4_m(vbool2_t mask, int8_t *base, vuint16m8_t bindex, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsoxseg2ei16_v_i8m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i8m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16mf4_m( @@ -607,7 +607,7 @@ void test_vsoxseg2ei16_v_i8m4_m(vbool2_t mask, int8_t *base, vuint16m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_i16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16mf2_m( @@ -616,7 +616,7 @@ void test_vsoxseg2ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_i16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16m1_m( @@ -625,7 +625,7 @@ void test_vsoxseg2ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsoxseg2ei16_v_i16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16m2_m( @@ -634,7 +634,7 @@ void test_vsoxseg2ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsoxseg2ei16_v_i16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i16m4_m( @@ -643,7 +643,7 @@ void test_vsoxseg2ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i16m4_m(vbool4_t mask, int16_t *base, vuint16m4_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsoxseg2ei16_v_i16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i32mf2_m( @@ -652,7 +652,7 @@ void test_vsoxseg2ei16_v_i16m4_m(vbool4_t mask, int16_t *base, vuint16m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_i32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i32m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg2ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsoxseg2ei16_v_i32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i32m2_m( @@ -670,7 +670,7 @@ void test_vsoxseg2ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsoxseg2ei16_v_i32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i32m4_m( @@ -679,7 +679,7 @@ void test_vsoxseg2ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i32m4_m(vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsoxseg2ei16_v_i32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i64m1_m( @@ -688,7 +688,7 @@ void test_vsoxseg2ei16_v_i32m4_m(vbool8_t mask, int32_t *base, vuint16m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsoxseg2ei16_v_i64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i64m2_m( @@ -697,7 +697,7 @@ void test_vsoxseg2ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsoxseg2ei16_v_i64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_i64m4_m( @@ -706,7 +706,7 @@ void test_vsoxseg2ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_i64m4_m(vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsoxseg2ei16_v_i64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_i64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8mf8_m( @@ -715,7 +715,7 @@ void test_vsoxseg2ei16_v_i64m4_m(vbool16_t mask, int64_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsoxseg2ei16_v_u8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8mf4_m( @@ -724,7 +724,7 @@ void test_vsoxseg2ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_u8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8mf2_m( @@ -733,7 +733,7 @@ void test_vsoxseg2ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_u8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8m1_m( @@ -742,7 +742,7 @@ void test_vsoxseg2ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsoxseg2ei16_v_u8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8m2_m( @@ -751,7 +751,7 @@ void test_vsoxseg2ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsoxseg2ei16_v_u8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u8m4_m( @@ -760,7 +760,7 @@ void test_vsoxseg2ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint16m8_t bindex, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsoxseg2ei16_v_u8m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u8m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16mf4_m( @@ -769,7 +769,7 @@ void test_vsoxseg2ei16_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint16m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsoxseg2ei16_v_u16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16mf2_m( @@ -778,7 +778,7 @@ void test_vsoxseg2ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_u16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16m1_m( @@ -787,7 +787,7 @@ void test_vsoxseg2ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsoxseg2ei16_v_u16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16m2_m( @@ -796,7 +796,7 @@ void test_vsoxseg2ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsoxseg2ei16_v_u16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u16m4_m( @@ -805,7 +805,7 @@ void test_vsoxseg2ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsoxseg2ei16_v_u16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u32mf2_m( @@ -814,7 +814,7 @@ void test_vsoxseg2ei16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsoxseg2ei16_v_u32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u32m1_m( @@ -823,7 +823,7 @@ void test_vsoxseg2ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsoxseg2ei16_v_u32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u32m2_m( @@ -832,7 +832,7 @@ void test_vsoxseg2ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsoxseg2ei16_v_u32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u32m4_m( @@ -841,7 +841,7 @@ void test_vsoxseg2ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsoxseg2ei16_v_u32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u64m1_m( @@ -850,7 +850,7 @@ void test_vsoxseg2ei16_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsoxseg2ei16_v_u64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u64m2_m( @@ -859,7 +859,7 @@ void test_vsoxseg2ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsoxseg2ei16_v_u64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei16_v_u64m4_m( @@ -868,6 +868,6 @@ void test_vsoxseg2ei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei16_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsoxseg2ei16_v_u64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei16_v_u64m4_m(mask, base, bindex, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c index 5011efaadb6be807a5810dd022d6c46f38ea4095..a463a3d2d71e6e8346fb192b77cd4d2c21ec1180 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_f16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg2ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_f16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg2ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsoxseg2ei32_v_f16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg2ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsoxseg2ei32_v_f16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16m4( @@ -49,7 +49,7 @@ void test_vsoxseg2ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16m4(_Float16 *base, vuint32m8_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsoxseg2ei32_v_f16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f32mf2( @@ -58,7 +58,7 @@ void test_vsoxseg2ei32_v_f16m4(_Float16 *base, vuint32m8_t bindex, vfloat16m4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_f32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f32m1( @@ -67,7 +67,7 @@ void test_vsoxseg2ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsoxseg2ei32_v_f32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f32m2( @@ -76,7 +76,7 @@ void test_vsoxseg2ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsoxseg2ei32_v_f32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f32m4( @@ -85,7 +85,7 @@ void test_vsoxseg2ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f32m4(float *base, vuint32m4_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsoxseg2ei32_v_f32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f64m1( @@ -94,7 +94,7 @@ void test_vsoxseg2ei32_v_f32m4(float *base, vuint32m4_t bindex, vfloat32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsoxseg2ei32_v_f64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f64m2( @@ -103,7 +103,7 @@ void test_vsoxseg2ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsoxseg2ei32_v_f64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f64m4( @@ -112,7 +112,7 @@ void test_vsoxseg2ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f64m4(double *base, vuint32m2_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsoxseg2ei32_v_f64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8mf8( @@ -121,7 +121,7 @@ void test_vsoxseg2ei32_v_f64m4(double *base, vuint32m2_t bindex, vfloat64m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsoxseg2ei32_v_i8mf8(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8mf4( @@ -130,7 +130,7 @@ void test_vsoxseg2ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_i8mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8mf2( @@ -139,7 +139,7 @@ void test_vsoxseg2ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_i8mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8m1( @@ -148,7 +148,7 @@ void test_vsoxseg2ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsoxseg2ei32_v_i8m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8m2( @@ -157,7 +157,7 @@ void test_vsoxseg2ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsoxseg2ei32_v_i8m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16mf4( @@ -166,7 +166,7 @@ void test_vsoxseg2ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_i16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16mf2( @@ -175,7 +175,7 @@ void test_vsoxseg2ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_i16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16m1( @@ -184,7 +184,7 @@ void test_vsoxseg2ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsoxseg2ei32_v_i16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16m2( @@ -193,7 +193,7 @@ void test_vsoxseg2ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsoxseg2ei32_v_i16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16m4( @@ -202,7 +202,7 @@ void test_vsoxseg2ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16m4(int16_t *base, vuint32m8_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsoxseg2ei32_v_i16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i32mf2( @@ -211,7 +211,7 @@ void test_vsoxseg2ei32_v_i16m4(int16_t *base, vuint32m8_t bindex, vint16m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_i32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i32m1( @@ -220,7 +220,7 @@ void test_vsoxseg2ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsoxseg2ei32_v_i32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i32m2( @@ -229,7 +229,7 @@ void test_vsoxseg2ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsoxseg2ei32_v_i32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i32m4( @@ -238,7 +238,7 @@ void test_vsoxseg2ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i32m4(int32_t *base, vuint32m4_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsoxseg2ei32_v_i32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i64m1( @@ -247,7 +247,7 @@ void test_vsoxseg2ei32_v_i32m4(int32_t *base, vuint32m4_t bindex, vint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsoxseg2ei32_v_i64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i64m2( @@ -256,7 +256,7 @@ void test_vsoxseg2ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsoxseg2ei32_v_i64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i64m4( @@ -265,7 +265,7 @@ void test_vsoxseg2ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i64m4(int64_t *base, vuint32m2_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsoxseg2ei32_v_i64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8mf8( @@ -274,7 +274,7 @@ void test_vsoxseg2ei32_v_i64m4(int64_t *base, vuint32m2_t bindex, vint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsoxseg2ei32_v_u8mf8(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8mf4( @@ -283,7 +283,7 @@ void test_vsoxseg2ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_u8mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8mf2( @@ -292,7 +292,7 @@ void test_vsoxseg2ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_u8mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8m1( @@ -301,7 +301,7 @@ void test_vsoxseg2ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsoxseg2ei32_v_u8m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8m2( @@ -310,7 +310,7 @@ void test_vsoxseg2ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsoxseg2ei32_v_u8m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16mf4( @@ -319,7 +319,7 @@ void test_vsoxseg2ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_u16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16mf2( @@ -328,7 +328,7 @@ void test_vsoxseg2ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_u16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16m1( @@ -337,7 +337,7 @@ void test_vsoxseg2ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsoxseg2ei32_v_u16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16m2( @@ -346,7 +346,7 @@ void test_vsoxseg2ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsoxseg2ei32_v_u16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16m4( @@ -355,7 +355,7 @@ void test_vsoxseg2ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16m4(uint16_t *base, vuint32m8_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsoxseg2ei32_v_u16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u32mf2( @@ -364,7 +364,7 @@ void test_vsoxseg2ei32_v_u16m4(uint16_t *base, vuint32m8_t bindex, vuint16m4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_u32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u32m1( @@ -373,7 +373,7 @@ void test_vsoxseg2ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsoxseg2ei32_v_u32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u32m2( @@ -382,7 +382,7 @@ void test_vsoxseg2ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsoxseg2ei32_v_u32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u32m4( @@ -391,7 +391,7 @@ void test_vsoxseg2ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u32m4(uint32_t *base, vuint32m4_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsoxseg2ei32_v_u32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u64m1( @@ -400,7 +400,7 @@ void test_vsoxseg2ei32_v_u32m4(uint32_t *base, vuint32m4_t bindex, vuint32m4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsoxseg2ei32_v_u64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u64m2( @@ -409,7 +409,7 @@ void test_vsoxseg2ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsoxseg2ei32_v_u64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u64m4( @@ -418,7 +418,7 @@ void test_vsoxseg2ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u64m4(uint64_t *base, vuint32m2_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsoxseg2ei32_v_u64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg2ei32_v_u64m4(uint64_t *base, vuint32m2_t bindex, vuint64m4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_f16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg2ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_f16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg2ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsoxseg2ei32_v_f16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16m2_m( @@ -454,7 +454,7 @@ void test_vsoxseg2ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsoxseg2ei32_v_f16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f16m4_m( @@ -463,7 +463,7 @@ void test_vsoxseg2ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint32m8_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsoxseg2ei32_v_f16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f32mf2_m( @@ -472,7 +472,7 @@ void test_vsoxseg2ei32_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint32m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_f32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f32m1_m( @@ -481,7 +481,7 @@ void test_vsoxseg2ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsoxseg2ei32_v_f32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f32m2_m( @@ -490,7 +490,7 @@ void test_vsoxseg2ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsoxseg2ei32_v_f32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f32m4_m( @@ -499,7 +499,7 @@ void test_vsoxseg2ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f32m4_m(vbool8_t mask, float *base, vuint32m4_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsoxseg2ei32_v_f32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f64m1_m( @@ -508,7 +508,7 @@ void test_vsoxseg2ei32_v_f32m4_m(vbool8_t mask, float *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsoxseg2ei32_v_f64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f64m2_m( @@ -517,7 +517,7 @@ void test_vsoxseg2ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsoxseg2ei32_v_f64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_f64m4_m( @@ -526,7 +526,7 @@ void test_vsoxseg2ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_f64m4_m(vbool16_t mask, double *base, vuint32m2_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsoxseg2ei32_v_f64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_f64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8mf8_m( @@ -535,7 +535,7 @@ void test_vsoxseg2ei32_v_f64m4_m(vbool16_t mask, double *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsoxseg2ei32_v_i8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8mf4_m( @@ -544,7 +544,7 @@ void test_vsoxseg2ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_i8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8mf2_m( @@ -553,7 +553,7 @@ void test_vsoxseg2ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_i8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8m1_m( @@ -562,7 +562,7 @@ void test_vsoxseg2ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsoxseg2ei32_v_i8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i8m2_m( @@ -571,7 +571,7 @@ void test_vsoxseg2ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsoxseg2ei32_v_i8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16mf4_m( @@ -580,7 +580,7 @@ void test_vsoxseg2ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_i16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16mf2_m( @@ -589,7 +589,7 @@ void test_vsoxseg2ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_i16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16m1_m( @@ -598,7 +598,7 @@ void test_vsoxseg2ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsoxseg2ei32_v_i16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16m2_m( @@ -607,7 +607,7 @@ void test_vsoxseg2ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsoxseg2ei32_v_i16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i16m4_m( @@ -616,7 +616,7 @@ void test_vsoxseg2ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i16m4_m(vbool4_t mask, int16_t *base, vuint32m8_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsoxseg2ei32_v_i16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i32mf2_m( @@ -625,7 +625,7 @@ void test_vsoxseg2ei32_v_i16m4_m(vbool4_t mask, int16_t *base, vuint32m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_i32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i32m1_m( @@ -634,7 +634,7 @@ void test_vsoxseg2ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsoxseg2ei32_v_i32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i32m2_m( @@ -643,7 +643,7 @@ void test_vsoxseg2ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsoxseg2ei32_v_i32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i32m4_m( @@ -652,7 +652,7 @@ void test_vsoxseg2ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i32m4_m(vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsoxseg2ei32_v_i32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i64m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg2ei32_v_i32m4_m(vbool8_t mask, int32_t *base, vuint32m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsoxseg2ei32_v_i64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i64m2_m( @@ -670,7 +670,7 @@ void test_vsoxseg2ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsoxseg2ei32_v_i64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_i64m4_m( @@ -679,7 +679,7 @@ void test_vsoxseg2ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_i64m4_m(vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsoxseg2ei32_v_i64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_i64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8mf8_m( @@ -688,7 +688,7 @@ void test_vsoxseg2ei32_v_i64m4_m(vbool16_t mask, int64_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsoxseg2ei32_v_u8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8mf4_m( @@ -697,7 +697,7 @@ void test_vsoxseg2ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_u8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8mf2_m( @@ -706,7 +706,7 @@ void test_vsoxseg2ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_u8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8m1_m( @@ -715,7 +715,7 @@ void test_vsoxseg2ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsoxseg2ei32_v_u8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u8m2_m( @@ -724,7 +724,7 @@ void test_vsoxseg2ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsoxseg2ei32_v_u8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16mf4_m( @@ -733,7 +733,7 @@ void test_vsoxseg2ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsoxseg2ei32_v_u16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16mf2_m( @@ -742,7 +742,7 @@ void test_vsoxseg2ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_u16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16m1_m( @@ -751,7 +751,7 @@ void test_vsoxseg2ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsoxseg2ei32_v_u16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16m2_m( @@ -760,7 +760,7 @@ void test_vsoxseg2ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsoxseg2ei32_v_u16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u16m4_m( @@ -769,7 +769,7 @@ void test_vsoxseg2ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint32m8_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsoxseg2ei32_v_u16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u32mf2_m( @@ -778,7 +778,7 @@ void test_vsoxseg2ei32_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint32m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsoxseg2ei32_v_u32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u32m1_m( @@ -787,7 +787,7 @@ void test_vsoxseg2ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsoxseg2ei32_v_u32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u32m2_m( @@ -796,7 +796,7 @@ void test_vsoxseg2ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsoxseg2ei32_v_u32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u32m4_m( @@ -805,7 +805,7 @@ void test_vsoxseg2ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsoxseg2ei32_v_u32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u64m1_m( @@ -814,7 +814,7 @@ void test_vsoxseg2ei32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsoxseg2ei32_v_u64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u64m2_m( @@ -823,7 +823,7 @@ void test_vsoxseg2ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsoxseg2ei32_v_u64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei32_v_u64m4_m( @@ -832,6 +832,6 @@ void test_vsoxseg2ei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei32_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsoxseg2ei32_v_u64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei32_v_u64m4_m(mask, base, bindex, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c index 1d9809c1ffed98ce13f631ee539575eb65fe04ed..3991ba7a1a8789c2a0774a6fb3a26e02d985dd57 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_f16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg2ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_f16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg2ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsoxseg2ei64_v_f16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg2ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsoxseg2ei64_v_f16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg2ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_f32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg2ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsoxseg2ei64_v_f32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg2ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsoxseg2ei64_v_f32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f32m4( @@ -76,7 +76,7 @@ void test_vsoxseg2ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f32m4(float *base, vuint64m8_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsoxseg2ei64_v_f32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f64m1( @@ -85,7 +85,7 @@ void test_vsoxseg2ei64_v_f32m4(float *base, vuint64m8_t bindex, vfloat32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsoxseg2ei64_v_f64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f64m2( @@ -94,7 +94,7 @@ void test_vsoxseg2ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsoxseg2ei64_v_f64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f64m4( @@ -103,7 +103,7 @@ void test_vsoxseg2ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f64m4(double *base, vuint64m4_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsoxseg2ei64_v_f64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i8mf8( @@ -112,7 +112,7 @@ void test_vsoxseg2ei64_v_f64m4(double *base, vuint64m4_t bindex, vfloat64m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsoxseg2ei64_v_i8mf8(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i8mf4( @@ -121,7 +121,7 @@ void test_vsoxseg2ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_i8mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i8mf2( @@ -130,7 +130,7 @@ void test_vsoxseg2ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_i8mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i8m1( @@ -139,7 +139,7 @@ void test_vsoxseg2ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsoxseg2ei64_v_i8m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i16mf4( @@ -148,7 +148,7 @@ void test_vsoxseg2ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_i16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i16mf2( @@ -157,7 +157,7 @@ void test_vsoxseg2ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_i16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i16m1( @@ -166,7 +166,7 @@ void test_vsoxseg2ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsoxseg2ei64_v_i16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i16m2( @@ -175,7 +175,7 @@ void test_vsoxseg2ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsoxseg2ei64_v_i16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i32mf2( @@ -184,7 +184,7 @@ void test_vsoxseg2ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_i32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i32m1( @@ -193,7 +193,7 @@ void test_vsoxseg2ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsoxseg2ei64_v_i32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i32m2( @@ -202,7 +202,7 @@ void test_vsoxseg2ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsoxseg2ei64_v_i32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i32m4( @@ -211,7 +211,7 @@ void test_vsoxseg2ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i32m4(int32_t *base, vuint64m8_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsoxseg2ei64_v_i32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i64m1( @@ -220,7 +220,7 @@ void test_vsoxseg2ei64_v_i32m4(int32_t *base, vuint64m8_t bindex, vint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsoxseg2ei64_v_i64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i64m2( @@ -229,7 +229,7 @@ void test_vsoxseg2ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsoxseg2ei64_v_i64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i64m4( @@ -238,7 +238,7 @@ void test_vsoxseg2ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i64m4(int64_t *base, vuint64m4_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsoxseg2ei64_v_i64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u8mf8( @@ -247,7 +247,7 @@ void test_vsoxseg2ei64_v_i64m4(int64_t *base, vuint64m4_t bindex, vint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsoxseg2ei64_v_u8mf8(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u8mf4( @@ -256,7 +256,7 @@ void test_vsoxseg2ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_u8mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u8mf2( @@ -265,7 +265,7 @@ void test_vsoxseg2ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_u8mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u8m1( @@ -274,7 +274,7 @@ void test_vsoxseg2ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsoxseg2ei64_v_u8m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u16mf4( @@ -283,7 +283,7 @@ void test_vsoxseg2ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_u16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u16mf2( @@ -292,7 +292,7 @@ void test_vsoxseg2ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_u16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u16m1( @@ -301,7 +301,7 @@ void test_vsoxseg2ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsoxseg2ei64_v_u16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u16m2( @@ -310,7 +310,7 @@ void test_vsoxseg2ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsoxseg2ei64_v_u16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u32mf2( @@ -319,7 +319,7 @@ void test_vsoxseg2ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_u32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u32m1( @@ -328,7 +328,7 @@ void test_vsoxseg2ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsoxseg2ei64_v_u32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u32m2( @@ -337,7 +337,7 @@ void test_vsoxseg2ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsoxseg2ei64_v_u32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u32m4( @@ -346,7 +346,7 @@ void test_vsoxseg2ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u32m4(uint32_t *base, vuint64m8_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsoxseg2ei64_v_u32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u64m1( @@ -355,7 +355,7 @@ void test_vsoxseg2ei64_v_u32m4(uint32_t *base, vuint64m8_t bindex, vuint32m4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsoxseg2ei64_v_u64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u64m2( @@ -364,7 +364,7 @@ void test_vsoxseg2ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsoxseg2ei64_v_u64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u64m4( @@ -373,7 +373,7 @@ void test_vsoxseg2ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u64m4(uint64_t *base, vuint64m4_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsoxseg2ei64_v_u64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f16mf4_m( @@ -382,7 +382,7 @@ void test_vsoxseg2ei64_v_u64m4(uint64_t *base, vuint64m4_t bindex, vuint64m4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_f16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f16mf2_m( @@ -391,7 +391,7 @@ void test_vsoxseg2ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_f16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f16m1_m( @@ -400,7 +400,7 @@ void test_vsoxseg2ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsoxseg2ei64_v_f16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f16m2_m( @@ -409,7 +409,7 @@ void test_vsoxseg2ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsoxseg2ei64_v_f16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f32mf2_m( @@ -418,7 +418,7 @@ void test_vsoxseg2ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_f32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f32m1_m( @@ -427,7 +427,7 @@ void test_vsoxseg2ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsoxseg2ei64_v_f32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f32m2_m( @@ -436,7 +436,7 @@ void test_vsoxseg2ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsoxseg2ei64_v_f32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f32m4_m( @@ -445,7 +445,7 @@ void test_vsoxseg2ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f32m4_m(vbool8_t mask, float *base, vuint64m8_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsoxseg2ei64_v_f32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f64m1_m( @@ -454,7 +454,7 @@ void test_vsoxseg2ei64_v_f32m4_m(vbool8_t mask, float *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsoxseg2ei64_v_f64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f64m2_m( @@ -463,7 +463,7 @@ void test_vsoxseg2ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsoxseg2ei64_v_f64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_f64m4_m( @@ -472,7 +472,7 @@ void test_vsoxseg2ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_f64m4_m(vbool16_t mask, double *base, vuint64m4_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsoxseg2ei64_v_f64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_f64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i8mf8_m( @@ -481,7 +481,7 @@ void test_vsoxseg2ei64_v_f64m4_m(vbool16_t mask, double *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsoxseg2ei64_v_i8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i8mf4_m( @@ -490,7 +490,7 @@ void test_vsoxseg2ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_i8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i8mf2_m( @@ -499,7 +499,7 @@ void test_vsoxseg2ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_i8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i8m1_m( @@ -508,7 +508,7 @@ void test_vsoxseg2ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsoxseg2ei64_v_i8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i16mf4_m( @@ -517,7 +517,7 @@ void test_vsoxseg2ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_i16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i16mf2_m( @@ -526,7 +526,7 @@ void test_vsoxseg2ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_i16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i16m1_m( @@ -535,7 +535,7 @@ void test_vsoxseg2ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsoxseg2ei64_v_i16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i16m2_m( @@ -544,7 +544,7 @@ void test_vsoxseg2ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsoxseg2ei64_v_i16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i32mf2_m( @@ -553,7 +553,7 @@ void test_vsoxseg2ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_i32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i32m1_m( @@ -562,7 +562,7 @@ void test_vsoxseg2ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsoxseg2ei64_v_i32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i32m2_m( @@ -571,7 +571,7 @@ void test_vsoxseg2ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsoxseg2ei64_v_i32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i32m4_m( @@ -580,7 +580,7 @@ void test_vsoxseg2ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i32m4_m(vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsoxseg2ei64_v_i32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i64m1_m( @@ -589,7 +589,7 @@ void test_vsoxseg2ei64_v_i32m4_m(vbool8_t mask, int32_t *base, vuint64m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsoxseg2ei64_v_i64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i64m2_m( @@ -598,7 +598,7 @@ void test_vsoxseg2ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsoxseg2ei64_v_i64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_i64m4_m( @@ -607,7 +607,7 @@ void test_vsoxseg2ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_i64m4_m(vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsoxseg2ei64_v_i64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_i64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u8mf8_m( @@ -616,7 +616,7 @@ void test_vsoxseg2ei64_v_i64m4_m(vbool16_t mask, int64_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsoxseg2ei64_v_u8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u8mf4_m( @@ -625,7 +625,7 @@ void test_vsoxseg2ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_u8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u8mf2_m( @@ -634,7 +634,7 @@ void test_vsoxseg2ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_u8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u8m1_m( @@ -643,7 +643,7 @@ void test_vsoxseg2ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsoxseg2ei64_v_u8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u16mf4_m( @@ -652,7 +652,7 @@ void test_vsoxseg2ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsoxseg2ei64_v_u16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u16mf2_m( @@ -661,7 +661,7 @@ void test_vsoxseg2ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_u16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u16m1_m( @@ -670,7 +670,7 @@ void test_vsoxseg2ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsoxseg2ei64_v_u16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u16m2_m( @@ -679,7 +679,7 @@ void test_vsoxseg2ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsoxseg2ei64_v_u16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u32mf2_m( @@ -688,7 +688,7 @@ void test_vsoxseg2ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsoxseg2ei64_v_u32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u32m1_m( @@ -697,7 +697,7 @@ void test_vsoxseg2ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsoxseg2ei64_v_u32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u32m2_m( @@ -706,7 +706,7 @@ void test_vsoxseg2ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsoxseg2ei64_v_u32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u32m4_m( @@ -715,7 +715,7 @@ void test_vsoxseg2ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsoxseg2ei64_v_u32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u64m1_m( @@ -724,7 +724,7 @@ void test_vsoxseg2ei64_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsoxseg2ei64_v_u64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u64m2_m( @@ -733,7 +733,7 @@ void test_vsoxseg2ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsoxseg2ei64_v_u64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei64_v_u64m4_m( @@ -742,6 +742,6 @@ void test_vsoxseg2ei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsoxseg2ei64_v_u64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei64_v_u64m4_m(mask, base, bindex, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c index ec279c6ee3ed77cff7464d13c076c3d2f686c5fe..97d77fc18ad9d063e0af57abb39e44017ab3d8b0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg2ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_f16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg2ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_f16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg2ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsoxseg2ei8_v_f16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg2ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsoxseg2ei8_v_f16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16m4( @@ -49,7 +49,7 @@ void test_vsoxseg2ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsoxseg2ei8_v_f16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f32mf2( @@ -58,7 +58,7 @@ void test_vsoxseg2ei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_f32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f32m1( @@ -67,7 +67,7 @@ void test_vsoxseg2ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsoxseg2ei8_v_f32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f32m2( @@ -76,7 +76,7 @@ void test_vsoxseg2ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsoxseg2ei8_v_f32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f32m4( @@ -85,7 +85,7 @@ void test_vsoxseg2ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsoxseg2ei8_v_f32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f64m1( @@ -94,7 +94,7 @@ void test_vsoxseg2ei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsoxseg2ei8_v_f64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f64m2( @@ -103,7 +103,7 @@ void test_vsoxseg2ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsoxseg2ei8_v_f64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f64m4( @@ -112,7 +112,7 @@ void test_vsoxseg2ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsoxseg2ei8_v_f64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8mf8( @@ -121,7 +121,7 @@ void test_vsoxseg2ei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsoxseg2ei8_v_i8mf8(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8mf4( @@ -130,7 +130,7 @@ void test_vsoxseg2ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_i8mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8mf2( @@ -139,7 +139,7 @@ void test_vsoxseg2ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_i8mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8m1( @@ -148,7 +148,7 @@ void test_vsoxseg2ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsoxseg2ei8_v_i8m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8m2( @@ -157,7 +157,7 @@ void test_vsoxseg2ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsoxseg2ei8_v_i8m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8m4( @@ -166,7 +166,7 @@ void test_vsoxseg2ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsoxseg2ei8_v_i8m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16mf4( @@ -175,7 +175,7 @@ void test_vsoxseg2ei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_i16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16mf2( @@ -184,7 +184,7 @@ void test_vsoxseg2ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_i16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16m1( @@ -193,7 +193,7 @@ void test_vsoxseg2ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsoxseg2ei8_v_i16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16m2( @@ -202,7 +202,7 @@ void test_vsoxseg2ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsoxseg2ei8_v_i16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16m4( @@ -211,7 +211,7 @@ void test_vsoxseg2ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsoxseg2ei8_v_i16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg2ei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_i32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i32m1( @@ -229,7 +229,7 @@ void test_vsoxseg2ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsoxseg2ei8_v_i32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i32m2( @@ -238,7 +238,7 @@ void test_vsoxseg2ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsoxseg2ei8_v_i32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i32m4( @@ -247,7 +247,7 @@ void test_vsoxseg2ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsoxseg2ei8_v_i32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i64m1( @@ -256,7 +256,7 @@ void test_vsoxseg2ei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsoxseg2ei8_v_i64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i64m2( @@ -265,7 +265,7 @@ void test_vsoxseg2ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsoxseg2ei8_v_i64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i64m4( @@ -274,7 +274,7 @@ void test_vsoxseg2ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsoxseg2ei8_v_i64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8mf8( @@ -283,7 +283,7 @@ void test_vsoxseg2ei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsoxseg2ei8_v_u8mf8(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8mf4( @@ -292,7 +292,7 @@ void test_vsoxseg2ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_u8mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8mf2( @@ -301,7 +301,7 @@ void test_vsoxseg2ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_u8mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8m1( @@ -310,7 +310,7 @@ void test_vsoxseg2ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsoxseg2ei8_v_u8m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8m2( @@ -319,7 +319,7 @@ void test_vsoxseg2ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsoxseg2ei8_v_u8m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8m4( @@ -328,7 +328,7 @@ void test_vsoxseg2ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsoxseg2ei8_v_u8m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16mf4( @@ -337,7 +337,7 @@ void test_vsoxseg2ei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_u16mf4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16mf2( @@ -346,7 +346,7 @@ void test_vsoxseg2ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_u16mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16m1( @@ -355,7 +355,7 @@ void test_vsoxseg2ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsoxseg2ei8_v_u16m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16m2( @@ -364,7 +364,7 @@ void test_vsoxseg2ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsoxseg2ei8_v_u16m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16m4( @@ -373,7 +373,7 @@ void test_vsoxseg2ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsoxseg2ei8_v_u16m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u32mf2( @@ -382,7 +382,7 @@ void test_vsoxseg2ei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_u32mf2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u32m1( @@ -391,7 +391,7 @@ void test_vsoxseg2ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsoxseg2ei8_v_u32m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u32m2( @@ -400,7 +400,7 @@ void test_vsoxseg2ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsoxseg2ei8_v_u32m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u32m4( @@ -409,7 +409,7 @@ void test_vsoxseg2ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsoxseg2ei8_v_u32m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u64m1( @@ -418,7 +418,7 @@ void test_vsoxseg2ei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsoxseg2ei8_v_u64m1(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u64m2( @@ -427,7 +427,7 @@ void test_vsoxseg2ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsoxseg2ei8_v_u64m2(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u64m4( @@ -436,7 +436,7 @@ void test_vsoxseg2ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsoxseg2ei8_v_u64m4(base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16mf4_m( @@ -445,7 +445,7 @@ void test_vsoxseg2ei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_f16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg2ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_f16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg2ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsoxseg2ei8_v_f16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16m2_m( @@ -472,7 +472,7 @@ void test_vsoxseg2ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsoxseg2ei8_v_f16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f16m4_m( @@ -481,7 +481,7 @@ void test_vsoxseg2ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsoxseg2ei8_v_f16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f32mf2_m( @@ -490,7 +490,7 @@ void test_vsoxseg2ei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_f32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f32m1_m( @@ -499,7 +499,7 @@ void test_vsoxseg2ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsoxseg2ei8_v_f32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f32m2_m( @@ -508,7 +508,7 @@ void test_vsoxseg2ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsoxseg2ei8_v_f32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f32m4_m( @@ -517,7 +517,7 @@ void test_vsoxseg2ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsoxseg2ei8_v_f32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f64m1_m( @@ -526,7 +526,7 @@ void test_vsoxseg2ei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsoxseg2ei8_v_f64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f64m2_m( @@ -535,7 +535,7 @@ void test_vsoxseg2ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsoxseg2ei8_v_f64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_f64m4_m( @@ -544,7 +544,7 @@ void test_vsoxseg2ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsoxseg2ei8_v_f64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_f64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8mf8_m( @@ -553,7 +553,7 @@ void test_vsoxseg2ei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsoxseg2ei8_v_i8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg2ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_i8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg2ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_i8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg2ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsoxseg2ei8_v_i8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg2ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsoxseg2ei8_v_i8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i8m4_m( @@ -598,7 +598,7 @@ void test_vsoxseg2ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsoxseg2ei8_v_i8m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i8m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16mf4_m( @@ -607,7 +607,7 @@ void test_vsoxseg2ei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_i16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16mf2_m( @@ -616,7 +616,7 @@ void test_vsoxseg2ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_i16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16m1_m( @@ -625,7 +625,7 @@ void test_vsoxseg2ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsoxseg2ei8_v_i16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16m2_m( @@ -634,7 +634,7 @@ void test_vsoxseg2ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsoxseg2ei8_v_i16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i16m4_m( @@ -643,7 +643,7 @@ void test_vsoxseg2ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsoxseg2ei8_v_i16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i32mf2_m( @@ -652,7 +652,7 @@ void test_vsoxseg2ei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_i32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i32m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg2ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsoxseg2ei8_v_i32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i32m2_m( @@ -670,7 +670,7 @@ void test_vsoxseg2ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsoxseg2ei8_v_i32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i32m4_m( @@ -679,7 +679,7 @@ void test_vsoxseg2ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsoxseg2ei8_v_i32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i64m1_m( @@ -688,7 +688,7 @@ void test_vsoxseg2ei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsoxseg2ei8_v_i64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i64m2_m( @@ -697,7 +697,7 @@ void test_vsoxseg2ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsoxseg2ei8_v_i64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_i64m4_m( @@ -706,7 +706,7 @@ void test_vsoxseg2ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsoxseg2ei8_v_i64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_i64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8mf8_m( @@ -715,7 +715,7 @@ void test_vsoxseg2ei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsoxseg2ei8_v_u8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8mf4_m( @@ -724,7 +724,7 @@ void test_vsoxseg2ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_u8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8mf2_m( @@ -733,7 +733,7 @@ void test_vsoxseg2ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_u8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8m1_m( @@ -742,7 +742,7 @@ void test_vsoxseg2ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsoxseg2ei8_v_u8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8m2_m( @@ -751,7 +751,7 @@ void test_vsoxseg2ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsoxseg2ei8_v_u8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u8m4_m( @@ -760,7 +760,7 @@ void test_vsoxseg2ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsoxseg2ei8_v_u8m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u8m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16mf4_m( @@ -769,7 +769,7 @@ void test_vsoxseg2ei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsoxseg2ei8_v_u16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16mf2_m( @@ -778,7 +778,7 @@ void test_vsoxseg2ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_u16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16m1_m( @@ -787,7 +787,7 @@ void test_vsoxseg2ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsoxseg2ei8_v_u16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16m2_m( @@ -796,7 +796,7 @@ void test_vsoxseg2ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsoxseg2ei8_v_u16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u16m4_m( @@ -805,7 +805,7 @@ void test_vsoxseg2ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsoxseg2ei8_v_u16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u32mf2_m( @@ -814,7 +814,7 @@ void test_vsoxseg2ei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsoxseg2ei8_v_u32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u32m1_m( @@ -823,7 +823,7 @@ void test_vsoxseg2ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsoxseg2ei8_v_u32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u32m2_m( @@ -832,7 +832,7 @@ void test_vsoxseg2ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsoxseg2ei8_v_u32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u32m4_m( @@ -841,7 +841,7 @@ void test_vsoxseg2ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsoxseg2ei8_v_u32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u64m1_m( @@ -850,7 +850,7 @@ void test_vsoxseg2ei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsoxseg2ei8_v_u64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u64m2_m( @@ -859,7 +859,7 @@ void test_vsoxseg2ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsoxseg2ei8_v_u64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsoxseg2ei8_v_u64m4_m( @@ -868,6 +868,6 @@ void test_vsoxseg2ei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg2ei8_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsoxseg2ei8_v_u64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsoxseg2ei8_v_u64m4_m(mask, base, bindex, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c index 8fb0b2eea66a2d553da82906d8db32337dff2b81..81a58ebc15ef947741f3d4b9a0d545624eeca056 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_f16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg3ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_f16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg3ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsoxseg3ei16_v_f16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg3ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsoxseg3ei16_v_f16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg3ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_f32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg3ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsoxseg3ei16_v_f32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg3ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsoxseg3ei16_v_f32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f64m1( @@ -76,7 +76,7 @@ void test_vsoxseg3ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsoxseg3ei16_v_f64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f64m2( @@ -85,7 +85,7 @@ void test_vsoxseg3ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsoxseg3ei16_v_f64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsoxseg3ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsoxseg3ei16_v_i8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsoxseg3ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_i8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsoxseg3ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_i8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8m1( @@ -121,7 +121,7 @@ void test_vsoxseg3ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsoxseg3ei16_v_i8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8m2( @@ -130,7 +130,7 @@ void test_vsoxseg3ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsoxseg3ei16_v_i8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsoxseg3ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_i16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsoxseg3ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_i16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i16m1( @@ -157,7 +157,7 @@ void test_vsoxseg3ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsoxseg3ei16_v_i16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i16m2( @@ -166,7 +166,7 @@ void test_vsoxseg3ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsoxseg3ei16_v_i16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsoxseg3ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_i32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i32m1( @@ -184,7 +184,7 @@ void test_vsoxseg3ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsoxseg3ei16_v_i32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i32m2( @@ -193,7 +193,7 @@ void test_vsoxseg3ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsoxseg3ei16_v_i32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i64m1( @@ -202,7 +202,7 @@ void test_vsoxseg3ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsoxseg3ei16_v_i64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i64m2( @@ -211,7 +211,7 @@ void test_vsoxseg3ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsoxseg3ei16_v_i64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsoxseg3ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsoxseg3ei16_v_u8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsoxseg3ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_u8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsoxseg3ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_u8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8m1( @@ -247,7 +247,7 @@ void test_vsoxseg3ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsoxseg3ei16_v_u8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8m2( @@ -256,7 +256,7 @@ void test_vsoxseg3ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsoxseg3ei16_v_u8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsoxseg3ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_u16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsoxseg3ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_u16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u16m1( @@ -283,7 +283,7 @@ void test_vsoxseg3ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsoxseg3ei16_v_u16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u16m2( @@ -292,7 +292,7 @@ void test_vsoxseg3ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsoxseg3ei16_v_u16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsoxseg3ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_u32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u32m1( @@ -310,7 +310,7 @@ void test_vsoxseg3ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsoxseg3ei16_v_u32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u32m2( @@ -319,7 +319,7 @@ void test_vsoxseg3ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsoxseg3ei16_v_u32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u64m1( @@ -328,7 +328,7 @@ void test_vsoxseg3ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsoxseg3ei16_v_u64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u64m2( @@ -337,7 +337,7 @@ void test_vsoxseg3ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsoxseg3ei16_v_u64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsoxseg3ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsoxseg3ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsoxseg3ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsoxseg3ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsoxseg3ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsoxseg3ei16_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsoxseg3ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsoxseg3ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsoxseg3ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsoxseg3ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsoxseg3ei16_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsoxseg3ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsoxseg3ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsoxseg3ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsoxseg3ei16_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsoxseg3ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsoxseg3ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsoxseg3ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsoxseg3ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsoxseg3ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsoxseg3ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsoxseg3ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsoxseg3ei16_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsoxseg3ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsoxseg3ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsoxseg3ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsoxseg3ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsoxseg3ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsoxseg3ei16_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsoxseg3ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsoxseg3ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsoxseg3ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsoxseg3ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsoxseg3ei16_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsoxseg3ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsoxseg3ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsoxseg3ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsoxseg3ei16_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsoxseg3ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsoxseg3ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg3ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg3ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg3ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsoxseg3ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg3ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsoxseg3ei16_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsoxseg3ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsoxseg3ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsoxseg3ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsoxseg3ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsoxseg3ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsoxseg3ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsoxseg3ei16_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsoxseg3ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsoxseg3ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsoxseg3ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsoxseg3ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsoxseg3ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsoxseg3ei16_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg3ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsoxseg3ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei16_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsoxseg3ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsoxseg3ei16_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei16_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c index ad3b83c3fccc709b63885ff9f6df6b2f86bc41eb..5240cd16ada00969ac977335a09376079464d843 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_f16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg3ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_f16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg3ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsoxseg3ei32_v_f16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg3ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsoxseg3ei32_v_f16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg3ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_f32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg3ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsoxseg3ei32_v_f32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg3ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsoxseg3ei32_v_f32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f64m1( @@ -76,7 +76,7 @@ void test_vsoxseg3ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsoxseg3ei32_v_f64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f64m2( @@ -85,7 +85,7 @@ void test_vsoxseg3ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsoxseg3ei32_v_f64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsoxseg3ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsoxseg3ei32_v_i8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsoxseg3ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_i8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsoxseg3ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_i8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8m1( @@ -121,7 +121,7 @@ void test_vsoxseg3ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsoxseg3ei32_v_i8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8m2( @@ -130,7 +130,7 @@ void test_vsoxseg3ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsoxseg3ei32_v_i8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsoxseg3ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_i16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsoxseg3ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_i16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i16m1( @@ -157,7 +157,7 @@ void test_vsoxseg3ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsoxseg3ei32_v_i16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i16m2( @@ -166,7 +166,7 @@ void test_vsoxseg3ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsoxseg3ei32_v_i16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsoxseg3ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_i32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i32m1( @@ -184,7 +184,7 @@ void test_vsoxseg3ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsoxseg3ei32_v_i32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i32m2( @@ -193,7 +193,7 @@ void test_vsoxseg3ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsoxseg3ei32_v_i32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i64m1( @@ -202,7 +202,7 @@ void test_vsoxseg3ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsoxseg3ei32_v_i64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i64m2( @@ -211,7 +211,7 @@ void test_vsoxseg3ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsoxseg3ei32_v_i64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsoxseg3ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsoxseg3ei32_v_u8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsoxseg3ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_u8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsoxseg3ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_u8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8m1( @@ -247,7 +247,7 @@ void test_vsoxseg3ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsoxseg3ei32_v_u8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8m2( @@ -256,7 +256,7 @@ void test_vsoxseg3ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsoxseg3ei32_v_u8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsoxseg3ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_u16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsoxseg3ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_u16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u16m1( @@ -283,7 +283,7 @@ void test_vsoxseg3ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsoxseg3ei32_v_u16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u16m2( @@ -292,7 +292,7 @@ void test_vsoxseg3ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsoxseg3ei32_v_u16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsoxseg3ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_u32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u32m1( @@ -310,7 +310,7 @@ void test_vsoxseg3ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsoxseg3ei32_v_u32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u32m2( @@ -319,7 +319,7 @@ void test_vsoxseg3ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsoxseg3ei32_v_u32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u64m1( @@ -328,7 +328,7 @@ void test_vsoxseg3ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsoxseg3ei32_v_u64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u64m2( @@ -337,7 +337,7 @@ void test_vsoxseg3ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsoxseg3ei32_v_u64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsoxseg3ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsoxseg3ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsoxseg3ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsoxseg3ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsoxseg3ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsoxseg3ei32_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsoxseg3ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsoxseg3ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsoxseg3ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsoxseg3ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsoxseg3ei32_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsoxseg3ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsoxseg3ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsoxseg3ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsoxseg3ei32_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsoxseg3ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsoxseg3ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsoxseg3ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsoxseg3ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsoxseg3ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsoxseg3ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsoxseg3ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsoxseg3ei32_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsoxseg3ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsoxseg3ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsoxseg3ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsoxseg3ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsoxseg3ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsoxseg3ei32_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsoxseg3ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsoxseg3ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsoxseg3ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsoxseg3ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsoxseg3ei32_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsoxseg3ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsoxseg3ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsoxseg3ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsoxseg3ei32_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsoxseg3ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsoxseg3ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg3ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg3ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg3ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsoxseg3ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg3ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsoxseg3ei32_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsoxseg3ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsoxseg3ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsoxseg3ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsoxseg3ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsoxseg3ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsoxseg3ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsoxseg3ei32_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsoxseg3ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsoxseg3ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsoxseg3ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsoxseg3ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsoxseg3ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsoxseg3ei32_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg3ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsoxseg3ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei32_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsoxseg3ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsoxseg3ei32_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei32_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c index 33525da434f7033f359aa45fbeb242bdc6c453ed..c33354f3f30f2667e2fd078b5f79b55b697478fd 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_f16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg3ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_f16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg3ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsoxseg3ei64_v_f16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg3ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsoxseg3ei64_v_f16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg3ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_f32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg3ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsoxseg3ei64_v_f32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg3ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsoxseg3ei64_v_f32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f64m1( @@ -76,7 +76,7 @@ void test_vsoxseg3ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsoxseg3ei64_v_f64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f64m2( @@ -85,7 +85,7 @@ void test_vsoxseg3ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsoxseg3ei64_v_f64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsoxseg3ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsoxseg3ei64_v_i8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsoxseg3ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_i8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsoxseg3ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_i8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i8m1( @@ -121,7 +121,7 @@ void test_vsoxseg3ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsoxseg3ei64_v_i8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i16mf4( @@ -130,7 +130,7 @@ void test_vsoxseg3ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_i16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i16mf2( @@ -139,7 +139,7 @@ void test_vsoxseg3ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_i16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i16m1( @@ -148,7 +148,7 @@ void test_vsoxseg3ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsoxseg3ei64_v_i16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i16m2( @@ -157,7 +157,7 @@ void test_vsoxseg3ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsoxseg3ei64_v_i16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i32mf2( @@ -166,7 +166,7 @@ void test_vsoxseg3ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_i32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i32m1( @@ -175,7 +175,7 @@ void test_vsoxseg3ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsoxseg3ei64_v_i32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i32m2( @@ -184,7 +184,7 @@ void test_vsoxseg3ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsoxseg3ei64_v_i32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i64m1( @@ -193,7 +193,7 @@ void test_vsoxseg3ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsoxseg3ei64_v_i64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i64m2( @@ -202,7 +202,7 @@ void test_vsoxseg3ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsoxseg3ei64_v_i64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u8mf8( @@ -211,7 +211,7 @@ void test_vsoxseg3ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsoxseg3ei64_v_u8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u8mf4( @@ -220,7 +220,7 @@ void test_vsoxseg3ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_u8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u8mf2( @@ -229,7 +229,7 @@ void test_vsoxseg3ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_u8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u8m1( @@ -238,7 +238,7 @@ void test_vsoxseg3ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsoxseg3ei64_v_u8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u16mf4( @@ -247,7 +247,7 @@ void test_vsoxseg3ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_u16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u16mf2( @@ -256,7 +256,7 @@ void test_vsoxseg3ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_u16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u16m1( @@ -265,7 +265,7 @@ void test_vsoxseg3ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsoxseg3ei64_v_u16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u16m2( @@ -274,7 +274,7 @@ void test_vsoxseg3ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsoxseg3ei64_v_u16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u32mf2( @@ -283,7 +283,7 @@ void test_vsoxseg3ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_u32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u32m1( @@ -292,7 +292,7 @@ void test_vsoxseg3ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsoxseg3ei64_v_u32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u32m2( @@ -301,7 +301,7 @@ void test_vsoxseg3ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsoxseg3ei64_v_u32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u64m1( @@ -310,7 +310,7 @@ void test_vsoxseg3ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsoxseg3ei64_v_u64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u64m2( @@ -319,7 +319,7 @@ void test_vsoxseg3ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsoxseg3ei64_v_u64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f16mf4_m( @@ -328,7 +328,7 @@ void test_vsoxseg3ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f16mf2_m( @@ -337,7 +337,7 @@ void test_vsoxseg3ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f16m1_m( @@ -346,7 +346,7 @@ void test_vsoxseg3ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsoxseg3ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f16m2_m( @@ -355,7 +355,7 @@ void test_vsoxseg3ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsoxseg3ei64_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg3ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg3ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsoxseg3ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f32m2_m( @@ -382,7 +382,7 @@ void test_vsoxseg3ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsoxseg3ei64_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f64m1_m( @@ -391,7 +391,7 @@ void test_vsoxseg3ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsoxseg3ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_f64m2_m( @@ -400,7 +400,7 @@ void test_vsoxseg3ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsoxseg3ei64_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i8mf8_m( @@ -409,7 +409,7 @@ void test_vsoxseg3ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsoxseg3ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i8mf4_m( @@ -418,7 +418,7 @@ void test_vsoxseg3ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i8mf2_m( @@ -427,7 +427,7 @@ void test_vsoxseg3ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i8m1_m( @@ -436,7 +436,7 @@ void test_vsoxseg3ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsoxseg3ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i16mf4_m( @@ -445,7 +445,7 @@ void test_vsoxseg3ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i16mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg3ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i16m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg3ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsoxseg3ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i16m2_m( @@ -472,7 +472,7 @@ void test_vsoxseg3ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsoxseg3ei64_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i32mf2_m( @@ -481,7 +481,7 @@ void test_vsoxseg3ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i32m1_m( @@ -490,7 +490,7 @@ void test_vsoxseg3ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsoxseg3ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i32m2_m( @@ -499,7 +499,7 @@ void test_vsoxseg3ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsoxseg3ei64_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i64m1_m( @@ -508,7 +508,7 @@ void test_vsoxseg3ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsoxseg3ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_i64m2_m( @@ -517,7 +517,7 @@ void test_vsoxseg3ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsoxseg3ei64_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u8mf8_m( @@ -526,7 +526,7 @@ void test_vsoxseg3ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsoxseg3ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u8mf4_m( @@ -535,7 +535,7 @@ void test_vsoxseg3ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u8mf2_m( @@ -544,7 +544,7 @@ void test_vsoxseg3ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u8m1_m( @@ -553,7 +553,7 @@ void test_vsoxseg3ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsoxseg3ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u16mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg3ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsoxseg3ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u16mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg3ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u16m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg3ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsoxseg3ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u16m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg3ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsoxseg3ei64_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u32mf2_m( @@ -598,7 +598,7 @@ void test_vsoxseg3ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsoxseg3ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u32m1_m( @@ -607,7 +607,7 @@ void test_vsoxseg3ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsoxseg3ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u32m2_m( @@ -616,7 +616,7 @@ void test_vsoxseg3ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsoxseg3ei64_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u64m1_m( @@ -625,7 +625,7 @@ void test_vsoxseg3ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsoxseg3ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei64_v_u64m2_m( @@ -634,6 +634,6 @@ void test_vsoxseg3ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsoxseg3ei64_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei64_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c index 31f1a26152618649de37eb1c5ffa26779739e6ea..148c76692b0f4c2ab670b15d7fbf1d5d5da33539 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg3ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_f16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg3ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_f16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg3ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsoxseg3ei8_v_f16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg3ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsoxseg3ei8_v_f16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg3ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_f32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg3ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsoxseg3ei8_v_f32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg3ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsoxseg3ei8_v_f32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f64m1( @@ -76,7 +76,7 @@ void test_vsoxseg3ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsoxseg3ei8_v_f64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f64m2( @@ -85,7 +85,7 @@ void test_vsoxseg3ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsoxseg3ei8_v_f64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsoxseg3ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsoxseg3ei8_v_i8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsoxseg3ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_i8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsoxseg3ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_i8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8m1( @@ -121,7 +121,7 @@ void test_vsoxseg3ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsoxseg3ei8_v_i8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8m2( @@ -130,7 +130,7 @@ void test_vsoxseg3ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsoxseg3ei8_v_i8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsoxseg3ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_i16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsoxseg3ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_i16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i16m1( @@ -157,7 +157,7 @@ void test_vsoxseg3ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsoxseg3ei8_v_i16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i16m2( @@ -166,7 +166,7 @@ void test_vsoxseg3ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsoxseg3ei8_v_i16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsoxseg3ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_i32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i32m1( @@ -184,7 +184,7 @@ void test_vsoxseg3ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsoxseg3ei8_v_i32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i32m2( @@ -193,7 +193,7 @@ void test_vsoxseg3ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsoxseg3ei8_v_i32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i64m1( @@ -202,7 +202,7 @@ void test_vsoxseg3ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsoxseg3ei8_v_i64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i64m2( @@ -211,7 +211,7 @@ void test_vsoxseg3ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsoxseg3ei8_v_i64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsoxseg3ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsoxseg3ei8_v_u8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsoxseg3ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_u8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsoxseg3ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_u8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8m1( @@ -247,7 +247,7 @@ void test_vsoxseg3ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsoxseg3ei8_v_u8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8m2( @@ -256,7 +256,7 @@ void test_vsoxseg3ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsoxseg3ei8_v_u8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsoxseg3ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_u16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsoxseg3ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_u16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u16m1( @@ -283,7 +283,7 @@ void test_vsoxseg3ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsoxseg3ei8_v_u16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u16m2( @@ -292,7 +292,7 @@ void test_vsoxseg3ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsoxseg3ei8_v_u16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsoxseg3ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_u32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u32m1( @@ -310,7 +310,7 @@ void test_vsoxseg3ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsoxseg3ei8_v_u32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u32m2( @@ -319,7 +319,7 @@ void test_vsoxseg3ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsoxseg3ei8_v_u32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u64m1( @@ -328,7 +328,7 @@ void test_vsoxseg3ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsoxseg3ei8_v_u64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u64m2( @@ -337,7 +337,7 @@ void test_vsoxseg3ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsoxseg3ei8_v_u64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsoxseg3ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsoxseg3ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsoxseg3ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsoxseg3ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsoxseg3ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsoxseg3ei8_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsoxseg3ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsoxseg3ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsoxseg3ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsoxseg3ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsoxseg3ei8_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsoxseg3ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsoxseg3ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsoxseg3ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsoxseg3ei8_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsoxseg3ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsoxseg3ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsoxseg3ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsoxseg3ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsoxseg3ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsoxseg3ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsoxseg3ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsoxseg3ei8_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsoxseg3ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsoxseg3ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsoxseg3ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsoxseg3ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsoxseg3ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsoxseg3ei8_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsoxseg3ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsoxseg3ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsoxseg3ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsoxseg3ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsoxseg3ei8_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsoxseg3ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsoxseg3ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsoxseg3ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsoxseg3ei8_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsoxseg3ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsoxseg3ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg3ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg3ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg3ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsoxseg3ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg3ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsoxseg3ei8_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsoxseg3ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsoxseg3ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsoxseg3ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsoxseg3ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsoxseg3ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsoxseg3ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsoxseg3ei8_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsoxseg3ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsoxseg3ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsoxseg3ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsoxseg3ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsoxseg3ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsoxseg3ei8_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg3ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsoxseg3ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsoxseg3ei8_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsoxseg3ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg3ei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsoxseg3ei8_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsoxseg3ei8_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c index e33ec24cd6f200ac870ae6a2ce572cc03cbed08c..214eeb21a0338e63da743bd02e0058a767cbd21f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg4ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg4ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsoxseg4ei16_v_f16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg4ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsoxseg4ei16_v_f16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg4ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg4ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsoxseg4ei16_v_f32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg4ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsoxseg4ei16_v_f32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f64m1( @@ -76,7 +76,7 @@ void test_vsoxseg4ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsoxseg4ei16_v_f64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f64m2( @@ -85,7 +85,7 @@ void test_vsoxseg4ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsoxseg4ei16_v_f64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsoxseg4ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsoxseg4ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsoxseg4ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsoxseg4ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8m1( @@ -121,7 +121,7 @@ void test_vsoxseg4ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsoxseg4ei16_v_i8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8m2( @@ -130,7 +130,7 @@ void test_vsoxseg4ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsoxseg4ei16_v_i8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsoxseg4ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsoxseg4ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i16m1( @@ -157,7 +157,7 @@ void test_vsoxseg4ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsoxseg4ei16_v_i16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i16m2( @@ -166,7 +166,7 @@ void test_vsoxseg4ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsoxseg4ei16_v_i16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsoxseg4ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i32m1( @@ -184,7 +184,7 @@ void test_vsoxseg4ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsoxseg4ei16_v_i32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i32m2( @@ -193,7 +193,7 @@ void test_vsoxseg4ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsoxseg4ei16_v_i32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i64m1( @@ -202,7 +202,7 @@ void test_vsoxseg4ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsoxseg4ei16_v_i64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i64m2( @@ -211,7 +211,7 @@ void test_vsoxseg4ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsoxseg4ei16_v_i64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsoxseg4ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsoxseg4ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsoxseg4ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsoxseg4ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8m1( @@ -247,7 +247,7 @@ void test_vsoxseg4ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsoxseg4ei16_v_u8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8m2( @@ -256,7 +256,7 @@ void test_vsoxseg4ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsoxseg4ei16_v_u8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsoxseg4ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsoxseg4ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u16m1( @@ -283,7 +283,7 @@ void test_vsoxseg4ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsoxseg4ei16_v_u16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u16m2( @@ -292,7 +292,7 @@ void test_vsoxseg4ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsoxseg4ei16_v_u16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsoxseg4ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u32m1( @@ -310,7 +310,7 @@ void test_vsoxseg4ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsoxseg4ei16_v_u32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u32m2( @@ -319,7 +319,7 @@ void test_vsoxseg4ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsoxseg4ei16_v_u32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u64m1( @@ -328,7 +328,7 @@ void test_vsoxseg4ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsoxseg4ei16_v_u64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u64m2( @@ -337,7 +337,7 @@ void test_vsoxseg4ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsoxseg4ei16_v_u64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsoxseg4ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsoxseg4ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsoxseg4ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsoxseg4ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsoxseg4ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsoxseg4ei16_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsoxseg4ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsoxseg4ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsoxseg4ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsoxseg4ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsoxseg4ei16_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsoxseg4ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsoxseg4ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsoxseg4ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsoxseg4ei16_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsoxseg4ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsoxseg4ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsoxseg4ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsoxseg4ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsoxseg4ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsoxseg4ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsoxseg4ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsoxseg4ei16_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsoxseg4ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsoxseg4ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsoxseg4ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsoxseg4ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsoxseg4ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsoxseg4ei16_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsoxseg4ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsoxseg4ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsoxseg4ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsoxseg4ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsoxseg4ei16_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsoxseg4ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsoxseg4ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsoxseg4ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsoxseg4ei16_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsoxseg4ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsoxseg4ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg4ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg4ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg4ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsoxseg4ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg4ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsoxseg4ei16_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsoxseg4ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsoxseg4ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsoxseg4ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsoxseg4ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsoxseg4ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsoxseg4ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsoxseg4ei16_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsoxseg4ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsoxseg4ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsoxseg4ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsoxseg4ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsoxseg4ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsoxseg4ei16_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg4ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsoxseg4ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei16_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsoxseg4ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsoxseg4ei16_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei16_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c index 4cb123eb7907bb1ad44ea0fea0a4430b93c5c2b1..c09daf717bef7ebbf7fd2facfc3202536bd30417 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg4ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg4ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsoxseg4ei32_v_f16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg4ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsoxseg4ei32_v_f16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg4ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg4ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsoxseg4ei32_v_f32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg4ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsoxseg4ei32_v_f32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f64m1( @@ -76,7 +76,7 @@ void test_vsoxseg4ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsoxseg4ei32_v_f64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f64m2( @@ -85,7 +85,7 @@ void test_vsoxseg4ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsoxseg4ei32_v_f64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsoxseg4ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsoxseg4ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsoxseg4ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsoxseg4ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8m1( @@ -121,7 +121,7 @@ void test_vsoxseg4ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsoxseg4ei32_v_i8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8m2( @@ -130,7 +130,7 @@ void test_vsoxseg4ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsoxseg4ei32_v_i8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsoxseg4ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsoxseg4ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i16m1( @@ -157,7 +157,7 @@ void test_vsoxseg4ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsoxseg4ei32_v_i16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i16m2( @@ -166,7 +166,7 @@ void test_vsoxseg4ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsoxseg4ei32_v_i16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsoxseg4ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i32m1( @@ -184,7 +184,7 @@ void test_vsoxseg4ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsoxseg4ei32_v_i32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i32m2( @@ -193,7 +193,7 @@ void test_vsoxseg4ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsoxseg4ei32_v_i32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i64m1( @@ -202,7 +202,7 @@ void test_vsoxseg4ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsoxseg4ei32_v_i64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i64m2( @@ -211,7 +211,7 @@ void test_vsoxseg4ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsoxseg4ei32_v_i64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsoxseg4ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsoxseg4ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsoxseg4ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsoxseg4ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8m1( @@ -247,7 +247,7 @@ void test_vsoxseg4ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsoxseg4ei32_v_u8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8m2( @@ -256,7 +256,7 @@ void test_vsoxseg4ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsoxseg4ei32_v_u8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsoxseg4ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsoxseg4ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u16m1( @@ -283,7 +283,7 @@ void test_vsoxseg4ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsoxseg4ei32_v_u16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u16m2( @@ -292,7 +292,7 @@ void test_vsoxseg4ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsoxseg4ei32_v_u16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsoxseg4ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u32m1( @@ -310,7 +310,7 @@ void test_vsoxseg4ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsoxseg4ei32_v_u32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u32m2( @@ -319,7 +319,7 @@ void test_vsoxseg4ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsoxseg4ei32_v_u32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u64m1( @@ -328,7 +328,7 @@ void test_vsoxseg4ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsoxseg4ei32_v_u64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u64m2( @@ -337,7 +337,7 @@ void test_vsoxseg4ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsoxseg4ei32_v_u64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsoxseg4ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsoxseg4ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsoxseg4ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsoxseg4ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsoxseg4ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsoxseg4ei32_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsoxseg4ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsoxseg4ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsoxseg4ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsoxseg4ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsoxseg4ei32_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsoxseg4ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsoxseg4ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsoxseg4ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsoxseg4ei32_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsoxseg4ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsoxseg4ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsoxseg4ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsoxseg4ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsoxseg4ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsoxseg4ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsoxseg4ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsoxseg4ei32_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsoxseg4ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsoxseg4ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsoxseg4ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsoxseg4ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsoxseg4ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsoxseg4ei32_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsoxseg4ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsoxseg4ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsoxseg4ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsoxseg4ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsoxseg4ei32_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsoxseg4ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsoxseg4ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsoxseg4ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsoxseg4ei32_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsoxseg4ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsoxseg4ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg4ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg4ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg4ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsoxseg4ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg4ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsoxseg4ei32_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsoxseg4ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsoxseg4ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsoxseg4ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsoxseg4ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsoxseg4ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsoxseg4ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsoxseg4ei32_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsoxseg4ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsoxseg4ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsoxseg4ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsoxseg4ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsoxseg4ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsoxseg4ei32_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg4ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsoxseg4ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei32_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsoxseg4ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsoxseg4ei32_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei32_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c index 51c81ab43f459d7d962cb677cca88394cc43ced6..598c8b93184b0fe8071c7b66411432c8b3af9bd6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg4ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg4ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsoxseg4ei64_v_f16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg4ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsoxseg4ei64_v_f16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg4ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg4ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsoxseg4ei64_v_f32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg4ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsoxseg4ei64_v_f32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f64m1( @@ -76,7 +76,7 @@ void test_vsoxseg4ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsoxseg4ei64_v_f64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f64m2( @@ -85,7 +85,7 @@ void test_vsoxseg4ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsoxseg4ei64_v_f64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsoxseg4ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsoxseg4ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsoxseg4ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsoxseg4ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i8m1( @@ -121,7 +121,7 @@ void test_vsoxseg4ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsoxseg4ei64_v_i8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i16mf4( @@ -130,7 +130,7 @@ void test_vsoxseg4ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i16mf2( @@ -139,7 +139,7 @@ void test_vsoxseg4ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i16m1( @@ -148,7 +148,7 @@ void test_vsoxseg4ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsoxseg4ei64_v_i16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i16m2( @@ -157,7 +157,7 @@ void test_vsoxseg4ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsoxseg4ei64_v_i16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i32mf2( @@ -166,7 +166,7 @@ void test_vsoxseg4ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i32m1( @@ -175,7 +175,7 @@ void test_vsoxseg4ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsoxseg4ei64_v_i32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i32m2( @@ -184,7 +184,7 @@ void test_vsoxseg4ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsoxseg4ei64_v_i32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i64m1( @@ -193,7 +193,7 @@ void test_vsoxseg4ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsoxseg4ei64_v_i64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i64m2( @@ -202,7 +202,7 @@ void test_vsoxseg4ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsoxseg4ei64_v_i64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u8mf8( @@ -211,7 +211,7 @@ void test_vsoxseg4ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsoxseg4ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u8mf4( @@ -220,7 +220,7 @@ void test_vsoxseg4ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u8mf2( @@ -229,7 +229,7 @@ void test_vsoxseg4ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u8m1( @@ -238,7 +238,7 @@ void test_vsoxseg4ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsoxseg4ei64_v_u8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u16mf4( @@ -247,7 +247,7 @@ void test_vsoxseg4ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u16mf2( @@ -256,7 +256,7 @@ void test_vsoxseg4ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u16m1( @@ -265,7 +265,7 @@ void test_vsoxseg4ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsoxseg4ei64_v_u16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u16m2( @@ -274,7 +274,7 @@ void test_vsoxseg4ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsoxseg4ei64_v_u16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u32mf2( @@ -283,7 +283,7 @@ void test_vsoxseg4ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u32m1( @@ -292,7 +292,7 @@ void test_vsoxseg4ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsoxseg4ei64_v_u32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u32m2( @@ -301,7 +301,7 @@ void test_vsoxseg4ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsoxseg4ei64_v_u32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u64m1( @@ -310,7 +310,7 @@ void test_vsoxseg4ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsoxseg4ei64_v_u64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u64m2( @@ -319,7 +319,7 @@ void test_vsoxseg4ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsoxseg4ei64_v_u64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f16mf4_m( @@ -328,7 +328,7 @@ void test_vsoxseg4ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f16mf2_m( @@ -337,7 +337,7 @@ void test_vsoxseg4ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f16m1_m( @@ -346,7 +346,7 @@ void test_vsoxseg4ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsoxseg4ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f16m2_m( @@ -355,7 +355,7 @@ void test_vsoxseg4ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsoxseg4ei64_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg4ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg4ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsoxseg4ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f32m2_m( @@ -382,7 +382,7 @@ void test_vsoxseg4ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsoxseg4ei64_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f64m1_m( @@ -391,7 +391,7 @@ void test_vsoxseg4ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsoxseg4ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_f64m2_m( @@ -400,7 +400,7 @@ void test_vsoxseg4ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsoxseg4ei64_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i8mf8_m( @@ -409,7 +409,7 @@ void test_vsoxseg4ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsoxseg4ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i8mf4_m( @@ -418,7 +418,7 @@ void test_vsoxseg4ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i8mf2_m( @@ -427,7 +427,7 @@ void test_vsoxseg4ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i8m1_m( @@ -436,7 +436,7 @@ void test_vsoxseg4ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsoxseg4ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i16mf4_m( @@ -445,7 +445,7 @@ void test_vsoxseg4ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i16mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg4ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i16m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg4ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsoxseg4ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i16m2_m( @@ -472,7 +472,7 @@ void test_vsoxseg4ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsoxseg4ei64_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i32mf2_m( @@ -481,7 +481,7 @@ void test_vsoxseg4ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i32m1_m( @@ -490,7 +490,7 @@ void test_vsoxseg4ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsoxseg4ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i32m2_m( @@ -499,7 +499,7 @@ void test_vsoxseg4ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsoxseg4ei64_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i64m1_m( @@ -508,7 +508,7 @@ void test_vsoxseg4ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsoxseg4ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_i64m2_m( @@ -517,7 +517,7 @@ void test_vsoxseg4ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsoxseg4ei64_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u8mf8_m( @@ -526,7 +526,7 @@ void test_vsoxseg4ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsoxseg4ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u8mf4_m( @@ -535,7 +535,7 @@ void test_vsoxseg4ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u8mf2_m( @@ -544,7 +544,7 @@ void test_vsoxseg4ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u8m1_m( @@ -553,7 +553,7 @@ void test_vsoxseg4ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsoxseg4ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u16mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg4ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsoxseg4ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u16mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg4ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u16m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg4ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsoxseg4ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u16m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg4ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsoxseg4ei64_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u32mf2_m( @@ -598,7 +598,7 @@ void test_vsoxseg4ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsoxseg4ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u32m1_m( @@ -607,7 +607,7 @@ void test_vsoxseg4ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsoxseg4ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u32m2_m( @@ -616,7 +616,7 @@ void test_vsoxseg4ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsoxseg4ei64_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u64m1_m( @@ -625,7 +625,7 @@ void test_vsoxseg4ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsoxseg4ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei64_v_u64m2_m( @@ -634,6 +634,6 @@ void test_vsoxseg4ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsoxseg4ei64_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei64_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c index ed5a32881bd82016762c38e2d9272c8f8648511a..f7c77ba59a7c45cd863e801d9a4fd9ee2b926dd6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg4ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg4ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg4ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsoxseg4ei8_v_f16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f16m2( @@ -40,7 +40,7 @@ void test_vsoxseg4ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsoxseg4ei8_v_f16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsoxseg4ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f32m1( @@ -58,7 +58,7 @@ void test_vsoxseg4ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsoxseg4ei8_v_f32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f32m2( @@ -67,7 +67,7 @@ void test_vsoxseg4ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsoxseg4ei8_v_f32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f64m1( @@ -76,7 +76,7 @@ void test_vsoxseg4ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsoxseg4ei8_v_f64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f64m2( @@ -85,7 +85,7 @@ void test_vsoxseg4ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsoxseg4ei8_v_f64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsoxseg4ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsoxseg4ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsoxseg4ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsoxseg4ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8m1( @@ -121,7 +121,7 @@ void test_vsoxseg4ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsoxseg4ei8_v_i8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8m2( @@ -130,7 +130,7 @@ void test_vsoxseg4ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsoxseg4ei8_v_i8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsoxseg4ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsoxseg4ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i16m1( @@ -157,7 +157,7 @@ void test_vsoxseg4ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsoxseg4ei8_v_i16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i16m2( @@ -166,7 +166,7 @@ void test_vsoxseg4ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsoxseg4ei8_v_i16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsoxseg4ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i32m1( @@ -184,7 +184,7 @@ void test_vsoxseg4ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsoxseg4ei8_v_i32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i32m2( @@ -193,7 +193,7 @@ void test_vsoxseg4ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsoxseg4ei8_v_i32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i64m1( @@ -202,7 +202,7 @@ void test_vsoxseg4ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsoxseg4ei8_v_i64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i64m2( @@ -211,7 +211,7 @@ void test_vsoxseg4ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsoxseg4ei8_v_i64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsoxseg4ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsoxseg4ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsoxseg4ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsoxseg4ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8m1( @@ -247,7 +247,7 @@ void test_vsoxseg4ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsoxseg4ei8_v_u8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8m2( @@ -256,7 +256,7 @@ void test_vsoxseg4ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsoxseg4ei8_v_u8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsoxseg4ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsoxseg4ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u16m1( @@ -283,7 +283,7 @@ void test_vsoxseg4ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsoxseg4ei8_v_u16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u16m2( @@ -292,7 +292,7 @@ void test_vsoxseg4ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsoxseg4ei8_v_u16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsoxseg4ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u32m1( @@ -310,7 +310,7 @@ void test_vsoxseg4ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsoxseg4ei8_v_u32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u32m2( @@ -319,7 +319,7 @@ void test_vsoxseg4ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsoxseg4ei8_v_u32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u64m1( @@ -328,7 +328,7 @@ void test_vsoxseg4ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsoxseg4ei8_v_u64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u64m2( @@ -337,7 +337,7 @@ void test_vsoxseg4ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsoxseg4ei8_v_u64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsoxseg4ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsoxseg4ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsoxseg4ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsoxseg4ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsoxseg4ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsoxseg4ei8_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsoxseg4ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsoxseg4ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsoxseg4ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsoxseg4ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsoxseg4ei8_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsoxseg4ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsoxseg4ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsoxseg4ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsoxseg4ei8_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsoxseg4ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsoxseg4ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsoxseg4ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsoxseg4ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsoxseg4ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsoxseg4ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsoxseg4ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsoxseg4ei8_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsoxseg4ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsoxseg4ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsoxseg4ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsoxseg4ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsoxseg4ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsoxseg4ei8_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsoxseg4ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsoxseg4ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsoxseg4ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsoxseg4ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsoxseg4ei8_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsoxseg4ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsoxseg4ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsoxseg4ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsoxseg4ei8_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsoxseg4ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsoxseg4ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsoxseg4ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsoxseg4ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsoxseg4ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsoxseg4ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsoxseg4ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsoxseg4ei8_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsoxseg4ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsoxseg4ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsoxseg4ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsoxseg4ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsoxseg4ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsoxseg4ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsoxseg4ei8_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsoxseg4ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsoxseg4ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsoxseg4ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsoxseg4ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsoxseg4ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsoxseg4ei8_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsoxseg4ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsoxseg4ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsoxseg4ei8_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsoxseg4ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg4ei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsoxseg4ei8_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsoxseg4ei8_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c index 2121fde0481f9910c5cf8a2b56dc5d4b6055b407..fb394120b013eb820b7d99aac6ee8176bc5ce51c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg5ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg5ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsoxseg5ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg5ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg5ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsoxseg5ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg5ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsoxseg5ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg5ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsoxseg5ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg5ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg5ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg5ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsoxseg5ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg5ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg5ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg5ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsoxseg5ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg5ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg5ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsoxseg5ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg5ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsoxseg5ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg5ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsoxseg5ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg5ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg5ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg5ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsoxseg5ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg5ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg5ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg5ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsoxseg5ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg5ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg5ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsoxseg5ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg5ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsoxseg5ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg5ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg5ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg5ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsoxseg5ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg5ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg5ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsoxseg5ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg5ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsoxseg5ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg5ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsoxseg5ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg5ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg5ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg5ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsoxseg5ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg5ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg5ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg5ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsoxseg5ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg5ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg5ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsoxseg5ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg5ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsoxseg5ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg5ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsoxseg5ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg5ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg5ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg5ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsoxseg5ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg5ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsoxseg5ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg5ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg5ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsoxseg5ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg5ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsoxseg5ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg5ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsoxseg5ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei16_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg5ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsoxseg5ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c index 66fcdede626d459a03f35800cd9bc5fe263e3360..ed370aee8e5ea1dda488f27b17130ecbe544cfcd 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg5ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg5ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsoxseg5ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg5ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg5ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsoxseg5ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg5ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsoxseg5ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg5ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsoxseg5ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg5ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg5ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg5ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsoxseg5ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg5ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg5ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg5ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsoxseg5ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg5ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg5ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsoxseg5ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg5ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsoxseg5ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg5ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsoxseg5ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg5ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg5ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg5ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsoxseg5ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg5ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg5ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg5ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsoxseg5ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg5ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg5ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsoxseg5ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg5ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsoxseg5ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg5ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg5ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg5ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsoxseg5ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg5ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg5ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsoxseg5ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg5ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsoxseg5ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg5ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsoxseg5ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg5ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg5ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg5ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsoxseg5ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg5ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg5ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg5ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsoxseg5ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg5ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg5ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsoxseg5ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg5ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsoxseg5ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg5ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsoxseg5ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg5ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg5ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg5ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsoxseg5ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg5ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsoxseg5ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg5ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg5ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsoxseg5ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg5ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsoxseg5ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg5ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsoxseg5ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei32_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg5ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsoxseg5ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c index 0751492e60ed750f12fc1121b9773e0e4a90f6e1..fa513529b769b3ac7b39df9c4722557254cc17bb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg5ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg5ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsoxseg5ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg5ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg5ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsoxseg5ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg5ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsoxseg5ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg5ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsoxseg5ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg5ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg5ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg5ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsoxseg5ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg5ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg5ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg5ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsoxseg5ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg5ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg5ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsoxseg5ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg5ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsoxseg5ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg5ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsoxseg5ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg5ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg5ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg5ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsoxseg5ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg5ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg5ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg5ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsoxseg5ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg5ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg5ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsoxseg5ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg5ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsoxseg5ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg5ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg5ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg5ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsoxseg5ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg5ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg5ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsoxseg5ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg5ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsoxseg5ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg5ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsoxseg5ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg5ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg5ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg5ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsoxseg5ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg5ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg5ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg5ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsoxseg5ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg5ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg5ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsoxseg5ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg5ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsoxseg5ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg5ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsoxseg5ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg5ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg5ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg5ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsoxseg5ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg5ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsoxseg5ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg5ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg5ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsoxseg5ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg5ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsoxseg5ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg5ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsoxseg5ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei64_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg5ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsoxseg5ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c index 797b524a788cb358a83b2d32ba97681818a56c45..85caabc462b2b287fc2c4180eaf9c13262da509d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg5ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg5ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg5ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsoxseg5ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg5ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg5ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsoxseg5ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg5ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsoxseg5ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg5ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsoxseg5ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg5ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg5ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg5ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsoxseg5ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg5ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg5ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg5ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsoxseg5ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg5ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg5ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsoxseg5ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg5ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsoxseg5ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg5ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsoxseg5ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg5ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg5ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg5ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsoxseg5ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg5ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg5ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg5ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsoxseg5ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg5ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg5ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsoxseg5ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg5ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsoxseg5ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg5ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg5ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg5ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsoxseg5ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg5ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg5ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsoxseg5ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg5ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsoxseg5ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg5ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsoxseg5ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg5ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg5ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg5ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsoxseg5ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg5ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg5ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg5ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsoxseg5ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg5ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg5ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsoxseg5ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg5ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsoxseg5ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg5ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsoxseg5ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg5ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg5ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg5ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsoxseg5ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg5ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsoxseg5ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg5ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg5ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsoxseg5ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg5ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsoxseg5ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg5ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsoxseg5ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsoxseg5ei8_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg5ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg5ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsoxseg5ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsoxseg5ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c index e0ffcfba301ef9e6e4b6871aa434f1f741a9fc83..1d390469bc9df7396a450d297219ab0b6c29f673 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg6ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg6ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsoxseg6ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg6ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg6ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsoxseg6ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg6ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsoxseg6ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg6ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsoxseg6ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg6ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg6ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg6ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsoxseg6ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg6ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg6ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg6ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsoxseg6ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg6ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg6ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsoxseg6ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg6ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsoxseg6ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg6ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsoxseg6ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg6ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg6ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg6ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsoxseg6ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg6ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg6ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg6ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsoxseg6ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg6ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg6ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsoxseg6ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg6ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsoxseg6ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg6ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg6ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg6ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsoxseg6ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg6ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg6ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsoxseg6ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg6ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsoxseg6ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg6ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsoxseg6ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg6ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg6ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg6ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsoxseg6ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg6ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg6ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg6ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsoxseg6ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg6ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg6ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsoxseg6ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg6ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsoxseg6ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg6ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsoxseg6ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg6ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg6ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg6ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsoxseg6ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg6ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsoxseg6ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg6ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg6ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsoxseg6ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg6ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsoxseg6ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg6ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsoxseg6ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei16_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg6ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsoxseg6ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c index a84087112d8478c42eee97618cadf647fa54db86..dd0505a0dec9c79d2b2e8ede17ea8a762c6b2662 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg6ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg6ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsoxseg6ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg6ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg6ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsoxseg6ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg6ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsoxseg6ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg6ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsoxseg6ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg6ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg6ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg6ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsoxseg6ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg6ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg6ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg6ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsoxseg6ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg6ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg6ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsoxseg6ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg6ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsoxseg6ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg6ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsoxseg6ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg6ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg6ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg6ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsoxseg6ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg6ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg6ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg6ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsoxseg6ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg6ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg6ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsoxseg6ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg6ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsoxseg6ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg6ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg6ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg6ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsoxseg6ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg6ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg6ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsoxseg6ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg6ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsoxseg6ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg6ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsoxseg6ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg6ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg6ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg6ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsoxseg6ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg6ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg6ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg6ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsoxseg6ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg6ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg6ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsoxseg6ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg6ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsoxseg6ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg6ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsoxseg6ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg6ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg6ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg6ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsoxseg6ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg6ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsoxseg6ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg6ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg6ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsoxseg6ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg6ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsoxseg6ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg6ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsoxseg6ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei32_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg6ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsoxseg6ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c index c539bfe74f02ef7ad5b90922ffec078201031234..4d59dcfe6e1e949e9c9fdb8dce00d6e255a6fa24 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg6ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg6ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsoxseg6ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg6ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg6ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsoxseg6ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg6ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsoxseg6ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg6ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsoxseg6ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg6ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg6ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg6ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsoxseg6ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg6ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg6ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg6ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsoxseg6ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg6ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg6ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsoxseg6ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg6ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsoxseg6ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg6ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsoxseg6ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg6ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg6ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg6ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsoxseg6ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg6ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg6ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg6ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsoxseg6ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg6ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg6ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsoxseg6ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg6ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsoxseg6ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg6ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg6ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg6ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsoxseg6ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg6ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg6ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsoxseg6ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg6ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsoxseg6ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg6ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsoxseg6ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg6ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg6ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg6ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsoxseg6ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg6ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg6ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg6ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsoxseg6ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg6ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg6ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsoxseg6ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg6ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsoxseg6ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg6ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsoxseg6ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg6ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg6ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg6ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsoxseg6ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg6ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsoxseg6ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg6ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg6ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsoxseg6ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg6ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsoxseg6ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg6ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsoxseg6ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei64_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg6ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsoxseg6ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c index 34856d7b4b15a4381cb530718e5b491e23bdfaef..08c8b53a46ba39badf940bcdb3b3cf039c718615 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg6ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg6ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg6ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsoxseg6ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg6ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg6ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsoxseg6ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg6ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsoxseg6ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg6ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsoxseg6ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg6ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg6ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg6ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsoxseg6ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg6ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg6ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg6ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsoxseg6ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg6ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg6ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsoxseg6ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg6ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsoxseg6ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg6ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsoxseg6ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg6ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg6ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg6ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsoxseg6ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg6ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg6ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg6ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsoxseg6ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg6ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg6ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsoxseg6ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg6ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsoxseg6ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg6ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg6ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg6ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsoxseg6ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg6ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg6ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsoxseg6ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg6ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsoxseg6ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg6ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsoxseg6ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg6ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg6ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg6ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsoxseg6ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg6ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg6ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg6ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsoxseg6ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg6ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg6ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsoxseg6ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg6ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsoxseg6ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg6ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsoxseg6ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg6ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg6ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg6ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsoxseg6ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg6ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsoxseg6ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg6ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg6ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsoxseg6ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg6ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsoxseg6ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg6ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsoxseg6ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsoxseg6ei8_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg6ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg6ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsoxseg6ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsoxseg6ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c index cb0ea35911712f7d995488a85b2fe2d141fe915b..cf599d715f301c61e9eed83debdbcb98c7dc3a51 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg7ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg7ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsoxseg7ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg7ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg7ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsoxseg7ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg7ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsoxseg7ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg7ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsoxseg7ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg7ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg7ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg7ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsoxseg7ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg7ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg7ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg7ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsoxseg7ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg7ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg7ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsoxseg7ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg7ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsoxseg7ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg7ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsoxseg7ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg7ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg7ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg7ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsoxseg7ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg7ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg7ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg7ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsoxseg7ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg7ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg7ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsoxseg7ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg7ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsoxseg7ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg7ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg7ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg7ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsoxseg7ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg7ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg7ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsoxseg7ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg7ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsoxseg7ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg7ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsoxseg7ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg7ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg7ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg7ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsoxseg7ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg7ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg7ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg7ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsoxseg7ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg7ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg7ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsoxseg7ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg7ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsoxseg7ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg7ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsoxseg7ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg7ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg7ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg7ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsoxseg7ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg7ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsoxseg7ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg7ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg7ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsoxseg7ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg7ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsoxseg7ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg7ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsoxseg7ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei16_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg7ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsoxseg7ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c index 6286ed64d73f4914e60deb369eab80a54a8edf04..55059c24e30433179a99b02cee61b149036a39e2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg7ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg7ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsoxseg7ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg7ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg7ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsoxseg7ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg7ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsoxseg7ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg7ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsoxseg7ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg7ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg7ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg7ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsoxseg7ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg7ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg7ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg7ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsoxseg7ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg7ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg7ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsoxseg7ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg7ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsoxseg7ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg7ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsoxseg7ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg7ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg7ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg7ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsoxseg7ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg7ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg7ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg7ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsoxseg7ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg7ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg7ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsoxseg7ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg7ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsoxseg7ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg7ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg7ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg7ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsoxseg7ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg7ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg7ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsoxseg7ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg7ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsoxseg7ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg7ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsoxseg7ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg7ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg7ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg7ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsoxseg7ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg7ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg7ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg7ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsoxseg7ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg7ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg7ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsoxseg7ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg7ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsoxseg7ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg7ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsoxseg7ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg7ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg7ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg7ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsoxseg7ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg7ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsoxseg7ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg7ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg7ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsoxseg7ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg7ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsoxseg7ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg7ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsoxseg7ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei32_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg7ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsoxseg7ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c index 5179dddab0e522c776b97c93fb88086583073089..82e996e2232502e5068837b1f6088fb8a7991e9b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg7ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg7ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsoxseg7ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg7ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg7ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsoxseg7ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg7ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsoxseg7ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg7ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsoxseg7ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg7ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg7ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg7ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsoxseg7ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg7ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg7ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg7ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsoxseg7ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg7ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg7ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsoxseg7ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg7ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsoxseg7ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg7ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsoxseg7ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg7ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg7ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg7ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsoxseg7ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg7ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg7ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg7ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsoxseg7ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg7ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg7ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsoxseg7ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg7ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsoxseg7ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg7ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg7ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg7ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsoxseg7ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg7ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg7ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsoxseg7ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg7ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsoxseg7ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg7ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsoxseg7ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg7ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg7ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg7ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsoxseg7ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg7ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg7ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg7ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsoxseg7ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg7ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg7ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsoxseg7ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg7ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsoxseg7ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg7ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsoxseg7ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg7ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg7ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg7ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsoxseg7ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg7ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsoxseg7ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg7ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg7ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsoxseg7ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg7ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsoxseg7ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg7ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsoxseg7ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei64_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg7ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsoxseg7ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c index 44d4238ff6fdb8dde3579c4bb207a2596796c121..a05e1659b643c7452120f69b902aef2fcc25ecd4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg7ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg7ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg7ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsoxseg7ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg7ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg7ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsoxseg7ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg7ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsoxseg7ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg7ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsoxseg7ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg7ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg7ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg7ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsoxseg7ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg7ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg7ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg7ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsoxseg7ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg7ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg7ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsoxseg7ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg7ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsoxseg7ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg7ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsoxseg7ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg7ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg7ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg7ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsoxseg7ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg7ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg7ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg7ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsoxseg7ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg7ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg7ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsoxseg7ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg7ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsoxseg7ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg7ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg7ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg7ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsoxseg7ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg7ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg7ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsoxseg7ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg7ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsoxseg7ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg7ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsoxseg7ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg7ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg7ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg7ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsoxseg7ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg7ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg7ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg7ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsoxseg7ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg7ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg7ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsoxseg7ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg7ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsoxseg7ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg7ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsoxseg7ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg7ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg7ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg7ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsoxseg7ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg7ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsoxseg7ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg7ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg7ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsoxseg7ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg7ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsoxseg7ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg7ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsoxseg7ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsoxseg7ei8_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg7ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg7ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsoxseg7ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsoxseg7ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c index c32cba59bc59d2960d75cf35529b13f0d3627293..5cf439f86e365e2b9b8a271c76484ab99527ef65 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg8ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg8ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsoxseg8ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg8ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg8ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsoxseg8ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg8ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsoxseg8ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg8ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsoxseg8ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg8ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg8ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg8ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsoxseg8ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg8ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg8ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg8ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsoxseg8ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg8ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg8ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsoxseg8ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg8ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsoxseg8ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg8ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsoxseg8ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg8ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg8ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg8ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsoxseg8ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg8ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg8ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg8ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsoxseg8ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg8ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg8ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsoxseg8ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg8ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsoxseg8ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg8ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg8ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg8ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsoxseg8ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg8ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg8ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsoxseg8ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg8ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsoxseg8ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg8ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsoxseg8ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg8ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg8ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg8ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsoxseg8ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg8ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg8ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg8ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsoxseg8ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg8ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg8ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsoxseg8ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg8ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsoxseg8ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg8ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsoxseg8ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg8ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg8ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg8ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsoxseg8ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg8ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsoxseg8ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg8ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg8ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsoxseg8ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg8ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsoxseg8ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg8ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsoxseg8ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei16_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg8ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsoxseg8ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c index 704b9ee2f881ec892d73bf20c309d8ec13c952d6..0af1b55e720e9d8b1f1600c30c6f09ce5222861a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg8ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg8ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsoxseg8ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg8ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg8ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsoxseg8ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg8ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsoxseg8ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg8ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsoxseg8ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg8ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg8ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg8ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsoxseg8ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg8ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg8ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg8ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsoxseg8ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg8ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg8ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsoxseg8ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg8ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsoxseg8ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg8ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsoxseg8ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg8ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg8ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg8ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsoxseg8ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg8ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg8ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg8ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsoxseg8ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg8ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg8ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsoxseg8ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg8ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsoxseg8ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg8ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg8ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg8ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsoxseg8ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg8ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg8ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsoxseg8ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg8ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsoxseg8ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg8ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsoxseg8ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg8ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg8ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg8ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsoxseg8ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg8ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg8ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg8ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsoxseg8ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg8ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg8ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsoxseg8ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg8ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsoxseg8ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg8ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsoxseg8ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg8ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg8ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg8ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsoxseg8ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg8ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsoxseg8ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg8ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg8ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsoxseg8ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg8ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsoxseg8ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg8ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsoxseg8ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei32_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg8ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsoxseg8ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c index 80a2e49c0c2e5887fcbb17ecb1879b61c37ece20..b9698b6abdf929b75878c58698ab4158fd8db663 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg8ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg8ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsoxseg8ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg8ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg8ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsoxseg8ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg8ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsoxseg8ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg8ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsoxseg8ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg8ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg8ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg8ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsoxseg8ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg8ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg8ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg8ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsoxseg8ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg8ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg8ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsoxseg8ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg8ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsoxseg8ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg8ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsoxseg8ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg8ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg8ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg8ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsoxseg8ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg8ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg8ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg8ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsoxseg8ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg8ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg8ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsoxseg8ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg8ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsoxseg8ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg8ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg8ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg8ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsoxseg8ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg8ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg8ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsoxseg8ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg8ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsoxseg8ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg8ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsoxseg8ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg8ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg8ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg8ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsoxseg8ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg8ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg8ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg8ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsoxseg8ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg8ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg8ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsoxseg8ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg8ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsoxseg8ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg8ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsoxseg8ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg8ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg8ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg8ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsoxseg8ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg8ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsoxseg8ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg8ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg8ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsoxseg8ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg8ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsoxseg8ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg8ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsoxseg8ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei64_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg8ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsoxseg8ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c index 8199d2a21c7bbaae810c215310bf1a649d740c7d..8ffd9d69617b093a3b535a4b1aae268715ee2760 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsoxseg8ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsoxseg8ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsoxseg8ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsoxseg8ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsoxseg8ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f32m1( @@ -49,7 +49,7 @@ void test_vsoxseg8ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsoxseg8ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f64m1( @@ -58,7 +58,7 @@ void test_vsoxseg8ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsoxseg8ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsoxseg8ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsoxseg8ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsoxseg8ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsoxseg8ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i8m1( @@ -94,7 +94,7 @@ void test_vsoxseg8ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsoxseg8ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsoxseg8ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsoxseg8ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i16m1( @@ -121,7 +121,7 @@ void test_vsoxseg8ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsoxseg8ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsoxseg8ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i32m1( @@ -139,7 +139,7 @@ void test_vsoxseg8ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsoxseg8ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i64m1( @@ -148,7 +148,7 @@ void test_vsoxseg8ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsoxseg8ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsoxseg8ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsoxseg8ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsoxseg8ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsoxseg8ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u8m1( @@ -184,7 +184,7 @@ void test_vsoxseg8ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsoxseg8ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsoxseg8ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsoxseg8ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u16m1( @@ -211,7 +211,7 @@ void test_vsoxseg8ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsoxseg8ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsoxseg8ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u32m1( @@ -229,7 +229,7 @@ void test_vsoxseg8ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsoxseg8ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u64m1( @@ -238,7 +238,7 @@ void test_vsoxseg8ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsoxseg8ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsoxseg8ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsoxseg8ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsoxseg8ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsoxseg8ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsoxseg8ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsoxseg8ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsoxseg8ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsoxseg8ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsoxseg8ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsoxseg8ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsoxseg8ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsoxseg8ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsoxseg8ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsoxseg8ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsoxseg8ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsoxseg8ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsoxseg8ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsoxseg8ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsoxseg8ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsoxseg8ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsoxseg8ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsoxseg8ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsoxseg8ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsoxseg8ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsoxseg8ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsoxseg8ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsoxseg8ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsoxseg8ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsoxseg8ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsoxseg8ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsoxseg8ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsoxseg8ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsoxseg8ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsoxseg8ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsoxseg8ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsoxseg8ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsoxseg8ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsoxseg8ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsoxseg8ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsoxseg8ei8_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsoxseg8ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsoxseg8ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsoxseg8ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsoxseg8ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsra.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsra.c index d46852ff36dab782bf03a83283d34c4217d2cc96..ecc99aba3754e895704398d38b08d1ac623842f3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsra.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsra.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsra_vv_i8mf8(op1, shift, vl); + return __riscv_vsra_vv_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vsra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf8(op1, shift, vl); + return __riscv_vsra_vx_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vsra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsra_vv_i8mf4(op1, shift, vl); + return __riscv_vsra_vv_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vsra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf4(op1, shift, vl); + return __riscv_vsra_vx_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vsra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsra_vv_i8mf2(op1, shift, vl); + return __riscv_vsra_vv_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vsra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf2(op1, shift, vl); + return __riscv_vsra_vx_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vsra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsra_vv_i8m1(op1, shift, vl); + return __riscv_vsra_vv_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vsra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m1(op1, shift, vl); + return __riscv_vsra_vx_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vsra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsra_vv_i8m2(op1, shift, vl); + return __riscv_vsra_vv_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vsra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m2(op1, shift, vl); + return __riscv_vsra_vx_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vsra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsra_vv_i8m4(op1, shift, vl); + return __riscv_vsra_vv_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vsra_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m4(op1, shift, vl); + return __riscv_vsra_vx_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vsra_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vv_i8m8(vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsra_vv_i8m8(op1, shift, vl); + return __riscv_vsra_vv_i8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vsra_vv_i8m8(vint8m8_t op1, vuint8m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vx_i8m8(vint8m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m8(op1, shift, vl); + return __riscv_vsra_vx_i8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vsra_vx_i8m8(vint8m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsra_vv_i16mf4(op1, shift, vl); + return __riscv_vsra_vv_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vsra_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vx_i16mf4(vint16mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf4(op1, shift, vl); + return __riscv_vsra_vx_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vsra_vx_i16mf4(vint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsra_vv_i16mf2(op1, shift, vl); + return __riscv_vsra_vv_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vsra_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vx_i16mf2(vint16mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf2(op1, shift, vl); + return __riscv_vsra_vx_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vsra_vx_i16mf2(vint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vv_i16m1(vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsra_vv_i16m1(op1, shift, vl); + return __riscv_vsra_vv_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vsra_vv_i16m1(vint16m1_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vx_i16m1(vint16m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m1(op1, shift, vl); + return __riscv_vsra_vx_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vsra_vx_i16m1(vint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vv_i16m2(vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsra_vv_i16m2(op1, shift, vl); + return __riscv_vsra_vv_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vsra_vv_i16m2(vint16m2_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vx_i16m2(vint16m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m2(op1, shift, vl); + return __riscv_vsra_vx_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vsra_vx_i16m2(vint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vv_i16m4(vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsra_vv_i16m4(op1, shift, vl); + return __riscv_vsra_vv_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vsra_vv_i16m4(vint16m4_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vx_i16m4(vint16m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m4(op1, shift, vl); + return __riscv_vsra_vx_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vsra_vx_i16m4(vint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vv_i16m8(vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsra_vv_i16m8(op1, shift, vl); + return __riscv_vsra_vv_i16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vsra_vv_i16m8(vint16m8_t op1, vuint16m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vx_i16m8(vint16m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m8(op1, shift, vl); + return __riscv_vsra_vx_i16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vsra_vx_i16m8(vint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsra_vv_i32mf2(op1, shift, vl); + return __riscv_vsra_vv_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vsra_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vx_i32mf2(vint32mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32mf2(op1, shift, vl); + return __riscv_vsra_vx_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vsra_vx_i32mf2(vint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vv_i32m1(vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsra_vv_i32m1(op1, shift, vl); + return __riscv_vsra_vv_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vsra_vv_i32m1(vint32m1_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vx_i32m1(vint32m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m1(op1, shift, vl); + return __riscv_vsra_vx_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vsra_vx_i32m1(vint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vv_i32m2(vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsra_vv_i32m2(op1, shift, vl); + return __riscv_vsra_vv_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vsra_vv_i32m2(vint32m2_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vx_i32m2(vint32m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m2(op1, shift, vl); + return __riscv_vsra_vx_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vsra_vx_i32m2(vint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vv_i32m4(vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsra_vv_i32m4(op1, shift, vl); + return __riscv_vsra_vv_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vsra_vv_i32m4(vint32m4_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vx_i32m4(vint32m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m4(op1, shift, vl); + return __riscv_vsra_vx_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vsra_vx_i32m4(vint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vv_i32m8(vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsra_vv_i32m8(op1, shift, vl); + return __riscv_vsra_vv_i32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vsra_vv_i32m8(vint32m8_t op1, vuint32m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vx_i32m8(vint32m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m8(op1, shift, vl); + return __riscv_vsra_vx_i32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vsra_vx_i32m8(vint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vv_i64m1(vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsra_vv_i64m1(op1, shift, vl); + return __riscv_vsra_vv_i64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vsra_vv_i64m1(vint64m1_t op1, vuint64m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vx_i64m1(vint64m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m1(op1, shift, vl); + return __riscv_vsra_vx_i64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vsra_vx_i64m1(vint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vv_i64m2(vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsra_vv_i64m2(op1, shift, vl); + return __riscv_vsra_vv_i64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vsra_vv_i64m2(vint64m2_t op1, vuint64m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vx_i64m2(vint64m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m2(op1, shift, vl); + return __riscv_vsra_vx_i64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vsra_vx_i64m2(vint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vv_i64m4(vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsra_vv_i64m4(op1, shift, vl); + return __riscv_vsra_vv_i64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vsra_vv_i64m4(vint64m4_t op1, vuint64m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vx_i64m4(vint64m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m4(op1, shift, vl); + return __riscv_vsra_vx_i64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vsra_vx_i64m4(vint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vv_i64m8(vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsra_vv_i64m8(op1, shift, vl); + return __riscv_vsra_vv_i64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vsra_vv_i64m8(vint64m8_t op1, vuint64m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vx_i64m8(vint64m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m8(op1, shift, vl); + return __riscv_vsra_vx_i64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vsra_vx_i64m8(vint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsra_vv_i8mf8_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vsra_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf8_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vsra_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsra_vv_i8mf4_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vsra_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf4_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vsra_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsra_vv_i8mf2_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vsra_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf2_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vsra_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsra_vv_i8m1_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vsra_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m1_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vsra_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsra_vv_i8m2_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vsra_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m2_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vsra_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsra_vv_i8m4_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vsra_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m4_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vsra_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsra_vv_i8m8_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vsra_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m8_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vsra_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t shift, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsra_vv_i16mf4_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vsra_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf4_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vsra_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsra_vv_i16mf2_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vsra_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf2_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vsra_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsra_vv_i16m1_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vsra_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m1_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vsra_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsra_vv_i16m2_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vsra_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m2_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vsra_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsra_vv_i16m4_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vsra_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m4_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vsra_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsra_vv_i16m8_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vsra_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m8_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vsra_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsra_vv_i32mf2_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vsra_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32mf2_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vsra_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsra_vv_i32m1_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vsra_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m1_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vsra_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsra_vv_i32m2_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vsra_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m2_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vsra_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsra_vv_i32m4_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vsra_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m4_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vsra_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsra_vv_i32m8_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vsra_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m8_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vsra_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsra_vv_i64m1_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vsra_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m1_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vsra_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsra_vv_i64m2_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vsra_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m2_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vsra_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsra_vv_i64m4_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vsra_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m4_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vsra_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsra_vv_i64m8_m(mask, op1, shift, vl); + return __riscv_vsra_vv_i64m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vsra_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m8_m(mask, op1, shift, vl); + return __riscv_vsra_vx_i64m8_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsrl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsrl.c index b81e16dd7b84cb1a718614bd95669ff9ae9deeac..b5f62a0bc1688bf5e27c0cf07794eb503737b892 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsrl.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsrl.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsrl_vv_u8mf8(op1, shift, vl); + return __riscv_vsrl_vv_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vsrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf8(op1, shift, vl); + return __riscv_vsrl_vx_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vsrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsrl_vv_u8mf4(op1, shift, vl); + return __riscv_vsrl_vv_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vsrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf4(op1, shift, vl); + return __riscv_vsrl_vx_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vsrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsrl_vv_u8mf2(op1, shift, vl); + return __riscv_vsrl_vv_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vsrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf2(op1, shift, vl); + return __riscv_vsrl_vx_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vsrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsrl_vv_u8m1(op1, shift, vl); + return __riscv_vsrl_vv_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vsrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m1(op1, shift, vl); + return __riscv_vsrl_vx_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vsrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsrl_vv_u8m2(op1, shift, vl); + return __riscv_vsrl_vv_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vsrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m2(op1, shift, vl); + return __riscv_vsrl_vx_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vsrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vv_u8m4(vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsrl_vv_u8m4(op1, shift, vl); + return __riscv_vsrl_vv_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vsrl_vv_u8m4(vuint8m4_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m4(op1, shift, vl); + return __riscv_vsrl_vx_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vsrl_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vv_u8m8(vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsrl_vv_u8m8(op1, shift, vl); + return __riscv_vsrl_vv_u8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vsrl_vv_u8m8(vuint8m8_t op1, vuint8m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vx_u8m8(vuint8m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m8(op1, shift, vl); + return __riscv_vsrl_vx_u8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vsrl_vx_u8m8(vuint8m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsrl_vv_u16mf4(op1, shift, vl); + return __riscv_vsrl_vv_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vsrl_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vx_u16mf4(vuint16mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf4(op1, shift, vl); + return __riscv_vsrl_vx_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vsrl_vx_u16mf4(vuint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsrl_vv_u16mf2(op1, shift, vl); + return __riscv_vsrl_vv_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vsrl_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vx_u16mf2(vuint16mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf2(op1, shift, vl); + return __riscv_vsrl_vx_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vsrl_vx_u16mf2(vuint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vv_u16m1(vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsrl_vv_u16m1(op1, shift, vl); + return __riscv_vsrl_vv_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vsrl_vv_u16m1(vuint16m1_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vx_u16m1(vuint16m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m1(op1, shift, vl); + return __riscv_vsrl_vx_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vsrl_vx_u16m1(vuint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vv_u16m2(vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsrl_vv_u16m2(op1, shift, vl); + return __riscv_vsrl_vv_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vsrl_vv_u16m2(vuint16m2_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vx_u16m2(vuint16m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m2(op1, shift, vl); + return __riscv_vsrl_vx_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vsrl_vx_u16m2(vuint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vv_u16m4(vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsrl_vv_u16m4(op1, shift, vl); + return __riscv_vsrl_vv_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vsrl_vv_u16m4(vuint16m4_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vx_u16m4(vuint16m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m4(op1, shift, vl); + return __riscv_vsrl_vx_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vsrl_vx_u16m4(vuint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vv_u16m8(vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsrl_vv_u16m8(op1, shift, vl); + return __riscv_vsrl_vv_u16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vsrl_vv_u16m8(vuint16m8_t op1, vuint16m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vx_u16m8(vuint16m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m8(op1, shift, vl); + return __riscv_vsrl_vx_u16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vsrl_vx_u16m8(vuint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsrl_vv_u32mf2(op1, shift, vl); + return __riscv_vsrl_vv_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vsrl_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t shift, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vx_u32mf2(vuint32mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32mf2(op1, shift, vl); + return __riscv_vsrl_vx_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vsrl_vx_u32mf2(vuint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vv_u32m1(vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsrl_vv_u32m1(op1, shift, vl); + return __riscv_vsrl_vv_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vsrl_vv_u32m1(vuint32m1_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vx_u32m1(vuint32m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m1(op1, shift, vl); + return __riscv_vsrl_vx_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vsrl_vx_u32m1(vuint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vv_u32m2(vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsrl_vv_u32m2(op1, shift, vl); + return __riscv_vsrl_vv_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vsrl_vv_u32m2(vuint32m2_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vx_u32m2(vuint32m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m2(op1, shift, vl); + return __riscv_vsrl_vx_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vsrl_vx_u32m2(vuint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vv_u32m4(vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsrl_vv_u32m4(op1, shift, vl); + return __riscv_vsrl_vv_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vsrl_vv_u32m4(vuint32m4_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vx_u32m4(vuint32m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m4(op1, shift, vl); + return __riscv_vsrl_vx_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vsrl_vx_u32m4(vuint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vv_u32m8(vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsrl_vv_u32m8(op1, shift, vl); + return __riscv_vsrl_vv_u32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vsrl_vv_u32m8(vuint32m8_t op1, vuint32m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vx_u32m8(vuint32m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m8(op1, shift, vl); + return __riscv_vsrl_vx_u32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vsrl_vx_u32m8(vuint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vv_u64m1(vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsrl_vv_u64m1(op1, shift, vl); + return __riscv_vsrl_vv_u64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vsrl_vv_u64m1(vuint64m1_t op1, vuint64m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vx_u64m1(vuint64m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m1(op1, shift, vl); + return __riscv_vsrl_vx_u64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vsrl_vx_u64m1(vuint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vv_u64m2(vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsrl_vv_u64m2(op1, shift, vl); + return __riscv_vsrl_vv_u64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vsrl_vv_u64m2(vuint64m2_t op1, vuint64m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vx_u64m2(vuint64m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m2(op1, shift, vl); + return __riscv_vsrl_vx_u64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vsrl_vx_u64m2(vuint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vv_u64m4(vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsrl_vv_u64m4(op1, shift, vl); + return __riscv_vsrl_vv_u64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vsrl_vv_u64m4(vuint64m4_t op1, vuint64m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vx_u64m4(vuint64m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m4(op1, shift, vl); + return __riscv_vsrl_vx_u64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vsrl_vx_u64m4(vuint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vv_u64m8(vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsrl_vv_u64m8(op1, shift, vl); + return __riscv_vsrl_vv_u64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vsrl_vv_u64m8(vuint64m8_t op1, vuint64m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vx_u64m8(vuint64m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m8(op1, shift, vl); + return __riscv_vsrl_vx_u64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vsrl_vx_u64m8(vuint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsrl_vv_u8mf8_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsrl_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf8_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsrl_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsrl_vv_u8mf4_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsrl_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf4_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsrl_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsrl_vv_u8mf2_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsrl_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf2_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsrl_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsrl_vv_u8m1_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vsrl_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m1_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vsrl_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsrl_vv_u8m2_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vsrl_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m2_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vsrl_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsrl_vv_u8m4_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vsrl_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m4_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vsrl_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsrl_vv_u8m8_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vsrl_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m8_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vsrl_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t shift, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsrl_vv_u16mf4_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsrl_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf4_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsrl_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsrl_vv_u16mf2_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsrl_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf2_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsrl_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsrl_vv_u16m1_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vsrl_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m1_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vsrl_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsrl_vv_u16m2_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vsrl_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m2_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vsrl_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsrl_vv_u16m4_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vsrl_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m4_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vsrl_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsrl_vv_u16m8_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vsrl_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m8_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vsrl_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsrl_vv_u32mf2_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsrl_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32mf2_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsrl_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsrl_vv_u32m1_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vsrl_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m1_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vsrl_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsrl_vv_u32m2_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vsrl_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m2_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vsrl_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsrl_vv_u32m4_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vsrl_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m4_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vsrl_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsrl_vv_u32m8_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vsrl_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m8_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vsrl_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsrl_vv_u64m1_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vsrl_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m1_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vsrl_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsrl_vv_u64m2_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vsrl_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m2_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vsrl_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsrl_vv_u64m4_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vsrl_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m4_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vsrl_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsrl_vv_u64m8_m(mask, op1, shift, vl); + return __riscv_vsrl_vv_u64m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vsrl_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m8_m(mask, op1, shift, vl); + return __riscv_vsrl_vx_u64m8_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse16.c index 9c02316c8622748c94c445dad9fb35c2c0e7782d..9388c91253be19db56ac493bb8938c6e32286d06 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t value, size_t vl) { - return vsse16_v_f16mf4(base, bstride, value, vl); + return __riscv_vsse16_v_f16mf4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsse16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t value // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t value, size_t vl) { - return vsse16_v_f16mf2(base, bstride, value, vl); + return __riscv_vsse16_v_f16mf2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsse16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t value, size_t vl) { - return vsse16_v_f16m1(base, bstride, value, vl); + return __riscv_vsse16_v_f16m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsse16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16m2(_Float16 *base, ptrdiff_t bstride, vfloat16m2_t value, size_t vl) { - return vsse16_v_f16m2(base, bstride, value, vl); + return __riscv_vsse16_v_f16m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16m4( @@ -49,7 +49,7 @@ void test_vsse16_v_f16m2(_Float16 *base, ptrdiff_t bstride, vfloat16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16m4(_Float16 *base, ptrdiff_t bstride, vfloat16m4_t value, size_t vl) { - return vsse16_v_f16m4(base, bstride, value, vl); + return __riscv_vsse16_v_f16m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16m8( @@ -58,7 +58,7 @@ void test_vsse16_v_f16m4(_Float16 *base, ptrdiff_t bstride, vfloat16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16m8(_Float16 *base, ptrdiff_t bstride, vfloat16m8_t value, size_t vl) { - return vsse16_v_f16m8(base, bstride, value, vl); + return __riscv_vsse16_v_f16m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16mf4( @@ -67,7 +67,7 @@ void test_vsse16_v_f16m8(_Float16 *base, ptrdiff_t bstride, vfloat16m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t value, size_t vl) { - return vsse16_v_i16mf4(base, bstride, value, vl); + return __riscv_vsse16_v_i16mf4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16mf2( @@ -76,7 +76,7 @@ void test_vsse16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t value, size_t vl) { - return vsse16_v_i16mf2(base, bstride, value, vl); + return __riscv_vsse16_v_i16mf2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16m1( @@ -85,7 +85,7 @@ void test_vsse16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t value, size_t vl) { - return vsse16_v_i16m1(base, bstride, value, vl); + return __riscv_vsse16_v_i16m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16m2( @@ -94,7 +94,7 @@ void test_vsse16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16m2(int16_t *base, ptrdiff_t bstride, vint16m2_t value, size_t vl) { - return vsse16_v_i16m2(base, bstride, value, vl); + return __riscv_vsse16_v_i16m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16m4( @@ -103,7 +103,7 @@ void test_vsse16_v_i16m2(int16_t *base, ptrdiff_t bstride, vint16m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16m4(int16_t *base, ptrdiff_t bstride, vint16m4_t value, size_t vl) { - return vsse16_v_i16m4(base, bstride, value, vl); + return __riscv_vsse16_v_i16m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16m8( @@ -112,7 +112,7 @@ void test_vsse16_v_i16m4(int16_t *base, ptrdiff_t bstride, vint16m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16m8(int16_t *base, ptrdiff_t bstride, vint16m8_t value, size_t vl) { - return vsse16_v_i16m8(base, bstride, value, vl); + return __riscv_vsse16_v_i16m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16mf4( @@ -121,7 +121,7 @@ void test_vsse16_v_i16m8(int16_t *base, ptrdiff_t bstride, vint16m8_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t value, size_t vl) { - return vsse16_v_u16mf4(base, bstride, value, vl); + return __riscv_vsse16_v_u16mf4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16mf2( @@ -130,7 +130,7 @@ void test_vsse16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t value, size_t vl) { - return vsse16_v_u16mf2(base, bstride, value, vl); + return __riscv_vsse16_v_u16mf2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16m1( @@ -139,7 +139,7 @@ void test_vsse16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t value, size_t vl) { - return vsse16_v_u16m1(base, bstride, value, vl); + return __riscv_vsse16_v_u16m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16m2( @@ -148,7 +148,7 @@ void test_vsse16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16m2(uint16_t *base, ptrdiff_t bstride, vuint16m2_t value, size_t vl) { - return vsse16_v_u16m2(base, bstride, value, vl); + return __riscv_vsse16_v_u16m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16m4( @@ -157,7 +157,7 @@ void test_vsse16_v_u16m2(uint16_t *base, ptrdiff_t bstride, vuint16m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16m4(uint16_t *base, ptrdiff_t bstride, vuint16m4_t value, size_t vl) { - return vsse16_v_u16m4(base, bstride, value, vl); + return __riscv_vsse16_v_u16m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16m8( @@ -166,7 +166,7 @@ void test_vsse16_v_u16m4(uint16_t *base, ptrdiff_t bstride, vuint16m4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16m8(uint16_t *base, ptrdiff_t bstride, vuint16m8_t value, size_t vl) { - return vsse16_v_u16m8(base, bstride, value, vl); + return __riscv_vsse16_v_u16m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16mf4_m( @@ -175,7 +175,7 @@ void test_vsse16_v_u16m8(uint16_t *base, ptrdiff_t bstride, vuint16m8_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf4_t value, size_t vl) { - return vsse16_v_f16mf4_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_f16mf4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16mf2_m( @@ -184,7 +184,7 @@ void test_vsse16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf2_t value, size_t vl) { - return vsse16_v_f16mf2_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_f16mf2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16m1_m( @@ -193,7 +193,7 @@ void test_vsse16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m1_t value, size_t vl) { - return vsse16_v_f16m1_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_f16m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16m2_m( @@ -202,7 +202,7 @@ void test_vsse16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vf // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16m2_m(vbool8_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m2_t value, size_t vl) { - return vsse16_v_f16m2_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_f16m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16m4_m( @@ -211,7 +211,7 @@ void test_vsse16_v_f16m2_m(vbool8_t mask, _Float16 *base, ptrdiff_t bstride, vfl // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16m4_m(vbool4_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m4_t value, size_t vl) { - return vsse16_v_f16m4_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_f16m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_f16m8_m( @@ -220,7 +220,7 @@ void test_vsse16_v_f16m4_m(vbool4_t mask, _Float16 *base, ptrdiff_t bstride, vfl // CHECK-RV64-NEXT: ret void // void test_vsse16_v_f16m8_m(vbool2_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m8_t value, size_t vl) { - return vsse16_v_f16m8_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_f16m8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16mf4_m( @@ -229,7 +229,7 @@ void test_vsse16_v_f16m8_m(vbool2_t mask, _Float16 *base, ptrdiff_t bstride, vfl // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vint16mf4_t value, size_t vl) { - return vsse16_v_i16mf4_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_i16mf4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16mf2_m( @@ -238,7 +238,7 @@ void test_vsse16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vi // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vint16mf2_t value, size_t vl) { - return vsse16_v_i16mf2_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_i16mf2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16m1_m( @@ -247,7 +247,7 @@ void test_vsse16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vi // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vint16m1_t value, size_t vl) { - return vsse16_v_i16m1_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_i16m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16m2_m( @@ -256,7 +256,7 @@ void test_vsse16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16m2_m(vbool8_t mask, int16_t *base, ptrdiff_t bstride, vint16m2_t value, size_t vl) { - return vsse16_v_i16m2_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_i16m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16m4_m( @@ -265,7 +265,7 @@ void test_vsse16_v_i16m2_m(vbool8_t mask, int16_t *base, ptrdiff_t bstride, vint // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16m4_m(vbool4_t mask, int16_t *base, ptrdiff_t bstride, vint16m4_t value, size_t vl) { - return vsse16_v_i16m4_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_i16m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_i16m8_m( @@ -274,7 +274,7 @@ void test_vsse16_v_i16m4_m(vbool4_t mask, int16_t *base, ptrdiff_t bstride, vint // CHECK-RV64-NEXT: ret void // void test_vsse16_v_i16m8_m(vbool2_t mask, int16_t *base, ptrdiff_t bstride, vint16m8_t value, size_t vl) { - return vsse16_v_i16m8_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_i16m8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16mf4_m( @@ -283,7 +283,7 @@ void test_vsse16_v_i16m8_m(vbool2_t mask, int16_t *base, ptrdiff_t bstride, vint // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf4_t value, size_t vl) { - return vsse16_v_u16mf4_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_u16mf4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16mf2_m( @@ -292,7 +292,7 @@ void test_vsse16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf2_t value, size_t vl) { - return vsse16_v_u16mf2_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_u16mf2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16m1_m( @@ -301,7 +301,7 @@ void test_vsse16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m1_t value, size_t vl) { - return vsse16_v_u16m1_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_u16m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16m2_m( @@ -310,7 +310,7 @@ void test_vsse16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16m2_m(vbool8_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m2_t value, size_t vl) { - return vsse16_v_u16m2_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_u16m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16m4_m( @@ -319,7 +319,7 @@ void test_vsse16_v_u16m2_m(vbool8_t mask, uint16_t *base, ptrdiff_t bstride, vui // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16m4_m(vbool4_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m4_t value, size_t vl) { - return vsse16_v_u16m4_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_u16m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse16_v_u16m8_m( @@ -328,6 +328,6 @@ void test_vsse16_v_u16m4_m(vbool4_t mask, uint16_t *base, ptrdiff_t bstride, vui // CHECK-RV64-NEXT: ret void // void test_vsse16_v_u16m8_m(vbool2_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m8_t value, size_t vl) { - return vsse16_v_u16m8_m(mask, base, bstride, value, vl); + return __riscv_vsse16_v_u16m8_m(mask, base, bstride, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse32.c index 6d86b7598020cb6035161f2e5424c44b4d023ddc..9f9e9245ff89e4519a0a4767e346b6317c570922 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t value, size_t vl) { - return vsse32_v_f32mf2(base, bstride, value, vl); + return __riscv_vsse32_v_f32mf2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32m1( @@ -22,7 +22,7 @@ void test_vsse32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t value, size_t vl) { - return vsse32_v_f32m1(base, bstride, value, vl); + return __riscv_vsse32_v_f32m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32m2( @@ -31,7 +31,7 @@ void test_vsse32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32m2(float *base, ptrdiff_t bstride, vfloat32m2_t value, size_t vl) { - return vsse32_v_f32m2(base, bstride, value, vl); + return __riscv_vsse32_v_f32m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32m4( @@ -40,7 +40,7 @@ void test_vsse32_v_f32m2(float *base, ptrdiff_t bstride, vfloat32m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32m4(float *base, ptrdiff_t bstride, vfloat32m4_t value, size_t vl) { - return vsse32_v_f32m4(base, bstride, value, vl); + return __riscv_vsse32_v_f32m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32m8( @@ -49,7 +49,7 @@ void test_vsse32_v_f32m4(float *base, ptrdiff_t bstride, vfloat32m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32m8(float *base, ptrdiff_t bstride, vfloat32m8_t value, size_t vl) { - return vsse32_v_f32m8(base, bstride, value, vl); + return __riscv_vsse32_v_f32m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32mf2( @@ -58,7 +58,7 @@ void test_vsse32_v_f32m8(float *base, ptrdiff_t bstride, vfloat32m8_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t value, size_t vl) { - return vsse32_v_i32mf2(base, bstride, value, vl); + return __riscv_vsse32_v_i32mf2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32m1( @@ -67,7 +67,7 @@ void test_vsse32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t value, size_t vl) { - return vsse32_v_i32m1(base, bstride, value, vl); + return __riscv_vsse32_v_i32m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32m2( @@ -76,7 +76,7 @@ void test_vsse32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32m2(int32_t *base, ptrdiff_t bstride, vint32m2_t value, size_t vl) { - return vsse32_v_i32m2(base, bstride, value, vl); + return __riscv_vsse32_v_i32m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32m4( @@ -85,7 +85,7 @@ void test_vsse32_v_i32m2(int32_t *base, ptrdiff_t bstride, vint32m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32m4(int32_t *base, ptrdiff_t bstride, vint32m4_t value, size_t vl) { - return vsse32_v_i32m4(base, bstride, value, vl); + return __riscv_vsse32_v_i32m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32m8( @@ -94,7 +94,7 @@ void test_vsse32_v_i32m4(int32_t *base, ptrdiff_t bstride, vint32m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32m8(int32_t *base, ptrdiff_t bstride, vint32m8_t value, size_t vl) { - return vsse32_v_i32m8(base, bstride, value, vl); + return __riscv_vsse32_v_i32m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32mf2( @@ -103,7 +103,7 @@ void test_vsse32_v_i32m8(int32_t *base, ptrdiff_t bstride, vint32m8_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t value, size_t vl) { - return vsse32_v_u32mf2(base, bstride, value, vl); + return __riscv_vsse32_v_u32mf2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32m1( @@ -112,7 +112,7 @@ void test_vsse32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t value, size_t vl) { - return vsse32_v_u32m1(base, bstride, value, vl); + return __riscv_vsse32_v_u32m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32m2( @@ -121,7 +121,7 @@ void test_vsse32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32m2(uint32_t *base, ptrdiff_t bstride, vuint32m2_t value, size_t vl) { - return vsse32_v_u32m2(base, bstride, value, vl); + return __riscv_vsse32_v_u32m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32m4( @@ -130,7 +130,7 @@ void test_vsse32_v_u32m2(uint32_t *base, ptrdiff_t bstride, vuint32m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32m4(uint32_t *base, ptrdiff_t bstride, vuint32m4_t value, size_t vl) { - return vsse32_v_u32m4(base, bstride, value, vl); + return __riscv_vsse32_v_u32m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32m8( @@ -139,7 +139,7 @@ void test_vsse32_v_u32m4(uint32_t *base, ptrdiff_t bstride, vuint32m4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32m8(uint32_t *base, ptrdiff_t bstride, vuint32m8_t value, size_t vl) { - return vsse32_v_u32m8(base, bstride, value, vl); + return __riscv_vsse32_v_u32m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32mf2_m( @@ -148,7 +148,7 @@ void test_vsse32_v_u32m8(uint32_t *base, ptrdiff_t bstride, vuint32m8_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vfloat32mf2_t value, size_t vl) { - return vsse32_v_f32mf2_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_f32mf2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32m1_m( @@ -157,7 +157,7 @@ void test_vsse32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vflo // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloat32m1_t value, size_t vl) { - return vsse32_v_f32m1_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_f32m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32m2_m( @@ -166,7 +166,7 @@ void test_vsse32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloa // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32m2_m(vbool16_t mask, float *base, ptrdiff_t bstride, vfloat32m2_t value, size_t vl) { - return vsse32_v_f32m2_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_f32m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32m4_m( @@ -175,7 +175,7 @@ void test_vsse32_v_f32m2_m(vbool16_t mask, float *base, ptrdiff_t bstride, vfloa // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32m4_m(vbool8_t mask, float *base, ptrdiff_t bstride, vfloat32m4_t value, size_t vl) { - return vsse32_v_f32m4_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_f32m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_f32m8_m( @@ -184,7 +184,7 @@ void test_vsse32_v_f32m4_m(vbool8_t mask, float *base, ptrdiff_t bstride, vfloat // CHECK-RV64-NEXT: ret void // void test_vsse32_v_f32m8_m(vbool4_t mask, float *base, ptrdiff_t bstride, vfloat32m8_t value, size_t vl) { - return vsse32_v_f32m8_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_f32m8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32mf2_m( @@ -193,7 +193,7 @@ void test_vsse32_v_f32m8_m(vbool4_t mask, float *base, ptrdiff_t bstride, vfloat // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vint32mf2_t value, size_t vl) { - return vsse32_v_i32mf2_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_i32mf2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32m1_m( @@ -202,7 +202,7 @@ void test_vsse32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vi // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1_t value, size_t vl) { - return vsse32_v_i32m1_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_i32m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32m2_m( @@ -211,7 +211,7 @@ void test_vsse32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32m2_m(vbool16_t mask, int32_t *base, ptrdiff_t bstride, vint32m2_t value, size_t vl) { - return vsse32_v_i32m2_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_i32m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32m4_m( @@ -220,7 +220,7 @@ void test_vsse32_v_i32m2_m(vbool16_t mask, int32_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32m4_m(vbool8_t mask, int32_t *base, ptrdiff_t bstride, vint32m4_t value, size_t vl) { - return vsse32_v_i32m4_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_i32m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_i32m8_m( @@ -229,7 +229,7 @@ void test_vsse32_v_i32m4_m(vbool8_t mask, int32_t *base, ptrdiff_t bstride, vint // CHECK-RV64-NEXT: ret void // void test_vsse32_v_i32m8_m(vbool4_t mask, int32_t *base, ptrdiff_t bstride, vint32m8_t value, size_t vl) { - return vsse32_v_i32m8_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_i32m8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32mf2_m( @@ -238,7 +238,7 @@ void test_vsse32_v_i32m8_m(vbool4_t mask, int32_t *base, ptrdiff_t bstride, vint // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, vuint32mf2_t value, size_t vl) { - return vsse32_v_u32mf2_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_u32mf2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32m1_m( @@ -247,7 +247,7 @@ void test_vsse32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m1_t value, size_t vl) { - return vsse32_v_u32m1_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_u32m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32m2_m( @@ -256,7 +256,7 @@ void test_vsse32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32m2_m(vbool16_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m2_t value, size_t vl) { - return vsse32_v_u32m2_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_u32m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32m4_m( @@ -265,7 +265,7 @@ void test_vsse32_v_u32m2_m(vbool16_t mask, uint32_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32m4_m(vbool8_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m4_t value, size_t vl) { - return vsse32_v_u32m4_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_u32m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse32_v_u32m8_m( @@ -274,6 +274,6 @@ void test_vsse32_v_u32m4_m(vbool8_t mask, uint32_t *base, ptrdiff_t bstride, vui // CHECK-RV64-NEXT: ret void // void test_vsse32_v_u32m8_m(vbool4_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m8_t value, size_t vl) { - return vsse32_v_u32m8_m(mask, base, bstride, value, vl); + return __riscv_vsse32_v_u32m8_m(mask, base, bstride, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse64.c index 0ebfca2e10099cddf62417c3ac08e7c1d350e197..b20de1428d952aac2d624aa4fe65cb32c7bd5663 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsse64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t value, size_t vl) { - return vsse64_v_f64m1(base, bstride, value, vl); + return __riscv_vsse64_v_f64m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_f64m2( @@ -22,7 +22,7 @@ void test_vsse64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t value, si // CHECK-RV64-NEXT: ret void // void test_vsse64_v_f64m2(double *base, ptrdiff_t bstride, vfloat64m2_t value, size_t vl) { - return vsse64_v_f64m2(base, bstride, value, vl); + return __riscv_vsse64_v_f64m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_f64m4( @@ -31,7 +31,7 @@ void test_vsse64_v_f64m2(double *base, ptrdiff_t bstride, vfloat64m2_t value, si // CHECK-RV64-NEXT: ret void // void test_vsse64_v_f64m4(double *base, ptrdiff_t bstride, vfloat64m4_t value, size_t vl) { - return vsse64_v_f64m4(base, bstride, value, vl); + return __riscv_vsse64_v_f64m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_f64m8( @@ -40,7 +40,7 @@ void test_vsse64_v_f64m4(double *base, ptrdiff_t bstride, vfloat64m4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsse64_v_f64m8(double *base, ptrdiff_t bstride, vfloat64m8_t value, size_t vl) { - return vsse64_v_f64m8(base, bstride, value, vl); + return __riscv_vsse64_v_f64m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_i64m1( @@ -49,7 +49,7 @@ void test_vsse64_v_f64m8(double *base, ptrdiff_t bstride, vfloat64m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsse64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t value, size_t vl) { - return vsse64_v_i64m1(base, bstride, value, vl); + return __riscv_vsse64_v_i64m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_i64m2( @@ -58,7 +58,7 @@ void test_vsse64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse64_v_i64m2(int64_t *base, ptrdiff_t bstride, vint64m2_t value, size_t vl) { - return vsse64_v_i64m2(base, bstride, value, vl); + return __riscv_vsse64_v_i64m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_i64m4( @@ -67,7 +67,7 @@ void test_vsse64_v_i64m2(int64_t *base, ptrdiff_t bstride, vint64m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse64_v_i64m4(int64_t *base, ptrdiff_t bstride, vint64m4_t value, size_t vl) { - return vsse64_v_i64m4(base, bstride, value, vl); + return __riscv_vsse64_v_i64m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_i64m8( @@ -76,7 +76,7 @@ void test_vsse64_v_i64m4(int64_t *base, ptrdiff_t bstride, vint64m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse64_v_i64m8(int64_t *base, ptrdiff_t bstride, vint64m8_t value, size_t vl) { - return vsse64_v_i64m8(base, bstride, value, vl); + return __riscv_vsse64_v_i64m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_u64m1( @@ -85,7 +85,7 @@ void test_vsse64_v_i64m8(int64_t *base, ptrdiff_t bstride, vint64m8_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t value, size_t vl) { - return vsse64_v_u64m1(base, bstride, value, vl); + return __riscv_vsse64_v_u64m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_u64m2( @@ -94,7 +94,7 @@ void test_vsse64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse64_v_u64m2(uint64_t *base, ptrdiff_t bstride, vuint64m2_t value, size_t vl) { - return vsse64_v_u64m2(base, bstride, value, vl); + return __riscv_vsse64_v_u64m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_u64m4( @@ -103,7 +103,7 @@ void test_vsse64_v_u64m2(uint64_t *base, ptrdiff_t bstride, vuint64m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse64_v_u64m4(uint64_t *base, ptrdiff_t bstride, vuint64m4_t value, size_t vl) { - return vsse64_v_u64m4(base, bstride, value, vl); + return __riscv_vsse64_v_u64m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_u64m8( @@ -112,7 +112,7 @@ void test_vsse64_v_u64m4(uint64_t *base, ptrdiff_t bstride, vuint64m4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse64_v_u64m8(uint64_t *base, ptrdiff_t bstride, vuint64m8_t value, size_t vl) { - return vsse64_v_u64m8(base, bstride, value, vl); + return __riscv_vsse64_v_u64m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_f64m1_m( @@ -121,7 +121,7 @@ void test_vsse64_v_u64m8(uint64_t *base, ptrdiff_t bstride, vuint64m8_t value, s // CHECK-RV64-NEXT: ret void // void test_vsse64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vfloat64m1_t value, size_t vl) { - return vsse64_v_f64m1_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_f64m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_f64m2_m( @@ -130,7 +130,7 @@ void test_vsse64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vflo // CHECK-RV64-NEXT: ret void // void test_vsse64_v_f64m2_m(vbool32_t mask, double *base, ptrdiff_t bstride, vfloat64m2_t value, size_t vl) { - return vsse64_v_f64m2_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_f64m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_f64m4_m( @@ -139,7 +139,7 @@ void test_vsse64_v_f64m2_m(vbool32_t mask, double *base, ptrdiff_t bstride, vflo // CHECK-RV64-NEXT: ret void // void test_vsse64_v_f64m4_m(vbool16_t mask, double *base, ptrdiff_t bstride, vfloat64m4_t value, size_t vl) { - return vsse64_v_f64m4_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_f64m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_f64m8_m( @@ -148,7 +148,7 @@ void test_vsse64_v_f64m4_m(vbool16_t mask, double *base, ptrdiff_t bstride, vflo // CHECK-RV64-NEXT: ret void // void test_vsse64_v_f64m8_m(vbool8_t mask, double *base, ptrdiff_t bstride, vfloat64m8_t value, size_t vl) { - return vsse64_v_f64m8_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_f64m8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_i64m1_m( @@ -157,7 +157,7 @@ void test_vsse64_v_f64m8_m(vbool8_t mask, double *base, ptrdiff_t bstride, vfloa // CHECK-RV64-NEXT: ret void // void test_vsse64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vint64m1_t value, size_t vl) { - return vsse64_v_i64m1_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_i64m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_i64m2_m( @@ -166,7 +166,7 @@ void test_vsse64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vsse64_v_i64m2_m(vbool32_t mask, int64_t *base, ptrdiff_t bstride, vint64m2_t value, size_t vl) { - return vsse64_v_i64m2_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_i64m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_i64m4_m( @@ -175,7 +175,7 @@ void test_vsse64_v_i64m2_m(vbool32_t mask, int64_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vsse64_v_i64m4_m(vbool16_t mask, int64_t *base, ptrdiff_t bstride, vint64m4_t value, size_t vl) { - return vsse64_v_i64m4_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_i64m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_i64m8_m( @@ -184,7 +184,7 @@ void test_vsse64_v_i64m4_m(vbool16_t mask, int64_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vsse64_v_i64m8_m(vbool8_t mask, int64_t *base, ptrdiff_t bstride, vint64m8_t value, size_t vl) { - return vsse64_v_i64m8_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_i64m8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_u64m1_m( @@ -193,7 +193,7 @@ void test_vsse64_v_i64m8_m(vbool8_t mask, int64_t *base, ptrdiff_t bstride, vint // CHECK-RV64-NEXT: ret void // void test_vsse64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m1_t value, size_t vl) { - return vsse64_v_u64m1_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_u64m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_u64m2_m( @@ -202,7 +202,7 @@ void test_vsse64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vsse64_v_u64m2_m(vbool32_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m2_t value, size_t vl) { - return vsse64_v_u64m2_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_u64m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_u64m4_m( @@ -211,7 +211,7 @@ void test_vsse64_v_u64m2_m(vbool32_t mask, uint64_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vsse64_v_u64m4_m(vbool16_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m4_t value, size_t vl) { - return vsse64_v_u64m4_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_u64m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse64_v_u64m8_m( @@ -220,6 +220,6 @@ void test_vsse64_v_u64m4_m(vbool16_t mask, uint64_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vsse64_v_u64m8_m(vbool8_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m8_t value, size_t vl) { - return vsse64_v_u64m8_m(mask, base, bstride, value, vl); + return __riscv_vsse64_v_u64m8_m(mask, base, bstride, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse8.c index 962c313562263ac5efbb068be337ff27c6c88d99..a013de16f567b1a3f7856e4e9ebbd64b077f5323 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t value, size_t vl) { - return vsse8_v_i8mf8(base, bstride, value, vl); + return __riscv_vsse8_v_i8mf8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vsse8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t value, size_t vl) { - return vsse8_v_i8mf4(base, bstride, value, vl); + return __riscv_vsse8_v_i8mf4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vsse8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t value, size_t vl) { - return vsse8_v_i8mf2(base, bstride, value, vl); + return __riscv_vsse8_v_i8mf2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8m1( @@ -39,7 +39,7 @@ void test_vsse8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t value, size_t vl) { - return vsse8_v_i8m1(base, bstride, value, vl); + return __riscv_vsse8_v_i8m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8m2( @@ -48,7 +48,7 @@ void test_vsse8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t value, size_t vl) { - return vsse8_v_i8m2(base, bstride, value, vl); + return __riscv_vsse8_v_i8m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8m4( @@ -57,7 +57,7 @@ void test_vsse8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8m4(int8_t *base, ptrdiff_t bstride, vint8m4_t value, size_t vl) { - return vsse8_v_i8m4(base, bstride, value, vl); + return __riscv_vsse8_v_i8m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8m8( @@ -66,7 +66,7 @@ void test_vsse8_v_i8m4(int8_t *base, ptrdiff_t bstride, vint8m4_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8m8(int8_t *base, ptrdiff_t bstride, vint8m8_t value, size_t vl) { - return vsse8_v_i8m8(base, bstride, value, vl); + return __riscv_vsse8_v_i8m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8mf8( @@ -75,7 +75,7 @@ void test_vsse8_v_i8m8(int8_t *base, ptrdiff_t bstride, vint8m8_t value, size_t // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t value, size_t vl) { - return vsse8_v_u8mf8(base, bstride, value, vl); + return __riscv_vsse8_v_u8mf8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8mf4( @@ -84,7 +84,7 @@ void test_vsse8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t value, size_t vl) { - return vsse8_v_u8mf4(base, bstride, value, vl); + return __riscv_vsse8_v_u8mf4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8mf2( @@ -93,7 +93,7 @@ void test_vsse8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t value, size_t vl) { - return vsse8_v_u8mf2(base, bstride, value, vl); + return __riscv_vsse8_v_u8mf2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8m1( @@ -102,7 +102,7 @@ void test_vsse8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t value, size_t vl) { - return vsse8_v_u8m1(base, bstride, value, vl); + return __riscv_vsse8_v_u8m1(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8m2( @@ -111,7 +111,7 @@ void test_vsse8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t value, size_t vl) { - return vsse8_v_u8m2(base, bstride, value, vl); + return __riscv_vsse8_v_u8m2(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8m4( @@ -120,7 +120,7 @@ void test_vsse8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8m4(uint8_t *base, ptrdiff_t bstride, vuint8m4_t value, size_t vl) { - return vsse8_v_u8m4(base, bstride, value, vl); + return __riscv_vsse8_v_u8m4(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8m8( @@ -129,7 +129,7 @@ void test_vsse8_v_u8m4(uint8_t *base, ptrdiff_t bstride, vuint8m4_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8m8(uint8_t *base, ptrdiff_t bstride, vuint8m8_t value, size_t vl) { - return vsse8_v_u8m8(base, bstride, value, vl); + return __riscv_vsse8_v_u8m8(base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8mf8_m( @@ -138,7 +138,7 @@ void test_vsse8_v_u8m8(uint8_t *base, ptrdiff_t bstride, vuint8m8_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t value, size_t vl) { - return vsse8_v_i8mf8_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_i8mf8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8mf4_m( @@ -147,7 +147,7 @@ void test_vsse8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t value, size_t vl) { - return vsse8_v_i8mf4_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_i8mf4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8mf2_m( @@ -156,7 +156,7 @@ void test_vsse8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t value, size_t vl) { - return vsse8_v_i8mf2_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_i8mf2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8m1_m( @@ -165,7 +165,7 @@ void test_vsse8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t value, size_t vl) { - return vsse8_v_i8m1_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_i8m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8m2_m( @@ -174,7 +174,7 @@ void test_vsse8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vint8m2_t value, size_t vl) { - return vsse8_v_i8m2_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_i8m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8m4_m( @@ -183,7 +183,7 @@ void test_vsse8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vint8m2 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8m4_m(vbool2_t mask, int8_t *base, ptrdiff_t bstride, vint8m4_t value, size_t vl) { - return vsse8_v_i8m4_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_i8m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_i8m8_m( @@ -192,7 +192,7 @@ void test_vsse8_v_i8m4_m(vbool2_t mask, int8_t *base, ptrdiff_t bstride, vint8m4 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_i8m8_m(vbool1_t mask, int8_t *base, ptrdiff_t bstride, vint8m8_t value, size_t vl) { - return vsse8_v_i8m8_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_i8m8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8mf8_m( @@ -201,7 +201,7 @@ void test_vsse8_v_i8m8_m(vbool1_t mask, int8_t *base, ptrdiff_t bstride, vint8m8 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t value, size_t vl) { - return vsse8_v_u8mf8_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_u8mf8_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8mf4_m( @@ -210,7 +210,7 @@ void test_vsse8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuin // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t value, size_t vl) { - return vsse8_v_u8mf4_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_u8mf4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8mf2_m( @@ -219,7 +219,7 @@ void test_vsse8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuin // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t value, size_t vl) { - return vsse8_v_u8mf2_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_u8mf2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8m1_m( @@ -228,7 +228,7 @@ void test_vsse8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuin // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t value, size_t vl) { - return vsse8_v_u8m1_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_u8m1_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8m2_m( @@ -237,7 +237,7 @@ void test_vsse8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8m2_m(vbool4_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m2_t value, size_t vl) { - return vsse8_v_u8m2_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_u8m2_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8m4_m( @@ -246,7 +246,7 @@ void test_vsse8_v_u8m2_m(vbool4_t mask, uint8_t *base, ptrdiff_t bstride, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8m4_m(vbool2_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m4_t value, size_t vl) { - return vsse8_v_u8m4_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_u8m4_m(mask, base, bstride, value, vl); } // CHECK-RV64-LABEL: @test_vsse8_v_u8m8_m( @@ -255,6 +255,6 @@ void test_vsse8_v_u8m4_m(vbool2_t mask, uint8_t *base, ptrdiff_t bstride, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsse8_v_u8m8_m(vbool1_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m8_t value, size_t vl) { - return vsse8_v_u8m8_m(mask, base, bstride, value, vl); + return __riscv_vsse8_v_u8m8_m(mask, base, bstride, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c index 47817c48c9c89602f91fc77e4855fec8764cd23d..e3e77def9ef4003f985934b7a40997011f1386f3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsseg2e16_v_f16mf4(base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16mf4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsseg2e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsseg2e16_v_f16mf2(base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16mf2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsseg2e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsseg2e16_v_f16m1(base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsseg2e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, si // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16m2(_Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsseg2e16_v_f16m2(base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16m4( @@ -49,7 +49,7 @@ void test_vsseg2e16_v_f16m2(_Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, si // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16m4(_Float16 *base, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsseg2e16_v_f16m4(base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16mf4( @@ -58,7 +58,7 @@ void test_vsseg2e16_v_f16m4(_Float16 *base, vfloat16m4_t v0, vfloat16m4_t v1, si // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsseg2e16_v_i16mf4(base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16mf4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16mf2( @@ -67,7 +67,7 @@ void test_vsseg2e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsseg2e16_v_i16mf2(base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16mf2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16m1( @@ -76,7 +76,7 @@ void test_vsseg2e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsseg2e16_v_i16m1(base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16m2( @@ -85,7 +85,7 @@ void test_vsseg2e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16m2(int16_t *base, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsseg2e16_v_i16m2(base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16m4( @@ -94,7 +94,7 @@ void test_vsseg2e16_v_i16m2(int16_t *base, vint16m2_t v0, vint16m2_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16m4(int16_t *base, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsseg2e16_v_i16m4(base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16mf4( @@ -103,7 +103,7 @@ void test_vsseg2e16_v_i16m4(int16_t *base, vint16m4_t v0, vint16m4_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsseg2e16_v_u16mf4(base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16mf4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16mf2( @@ -112,7 +112,7 @@ void test_vsseg2e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, s // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsseg2e16_v_u16mf2(base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16mf2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16m1( @@ -121,7 +121,7 @@ void test_vsseg2e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, s // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsseg2e16_v_u16m1(base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16m2( @@ -130,7 +130,7 @@ void test_vsseg2e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16m2(uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsseg2e16_v_u16m2(base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16m4( @@ -139,7 +139,7 @@ void test_vsseg2e16_v_u16m2(uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16m4(uint16_t *base, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsseg2e16_v_u16m4(base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16mf4_m( @@ -148,7 +148,7 @@ void test_vsseg2e16_v_u16m4(uint16_t *base, vuint16m4_t v0, vuint16m4_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsseg2e16_v_f16mf4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16mf4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16mf2_m( @@ -157,7 +157,7 @@ void test_vsseg2e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsseg2e16_v_f16mf2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16mf2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16m1_m( @@ -166,7 +166,7 @@ void test_vsseg2e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsseg2e16_v_f16m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16m2_m( @@ -175,7 +175,7 @@ void test_vsseg2e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16m2_m(vbool8_t mask, _Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsseg2e16_v_f16m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_f16m4_m( @@ -184,7 +184,7 @@ void test_vsseg2e16_v_f16m2_m(vbool8_t mask, _Float16 *base, vfloat16m2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_f16m4_m(vbool4_t mask, _Float16 *base, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsseg2e16_v_f16m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_f16m4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16mf4_m( @@ -193,7 +193,7 @@ void test_vsseg2e16_v_f16m4_m(vbool4_t mask, _Float16 *base, vfloat16m4_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsseg2e16_v_i16mf4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16mf4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16mf2_m( @@ -202,7 +202,7 @@ void test_vsseg2e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsseg2e16_v_i16mf2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16mf2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16m1_m( @@ -211,7 +211,7 @@ void test_vsseg2e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsseg2e16_v_i16m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16m2_m( @@ -220,7 +220,7 @@ void test_vsseg2e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsseg2e16_v_i16m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_i16m4_m( @@ -229,7 +229,7 @@ void test_vsseg2e16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t v0, vint1 // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_i16m4_m(vbool4_t mask, int16_t *base, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsseg2e16_v_i16m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_i16m4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16mf4_m( @@ -238,7 +238,7 @@ void test_vsseg2e16_v_i16m4_m(vbool4_t mask, int16_t *base, vint16m4_t v0, vint1 // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsseg2e16_v_u16mf4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16mf4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16mf2_m( @@ -247,7 +247,7 @@ void test_vsseg2e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsseg2e16_v_u16mf2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16mf2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16m1_m( @@ -256,7 +256,7 @@ void test_vsseg2e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsseg2e16_v_u16m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16m2_m( @@ -265,7 +265,7 @@ void test_vsseg2e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsseg2e16_v_u16m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e16_v_u16m4_m( @@ -274,6 +274,6 @@ void test_vsseg2e16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t v0, vui // CHECK-RV64-NEXT: ret void // void test_vsseg2e16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsseg2e16_v_u16m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e16_v_u16m4_m(mask, base, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32.c index a1cbd551e2001f494fbbc1b3cd2eed0a008719c9..6d73df879ca7fc18cd3467519c6b888b880c9130 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsseg2e32_v_f32mf2(base, v0, v1, vl); + return __riscv_vsseg2e32_v_f32mf2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vsseg2e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, si // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsseg2e32_v_f32m1(base, v0, v1, vl); + return __riscv_vsseg2e32_v_f32m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_f32m2( @@ -31,7 +31,7 @@ void test_vsseg2e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, size_ // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_f32m2(float *base, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsseg2e32_v_f32m2(base, v0, v1, vl); + return __riscv_vsseg2e32_v_f32m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_f32m4( @@ -40,7 +40,7 @@ void test_vsseg2e32_v_f32m2(float *base, vfloat32m2_t v0, vfloat32m2_t v1, size_ // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_f32m4(float *base, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsseg2e32_v_f32m4(base, v0, v1, vl); + return __riscv_vsseg2e32_v_f32m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_i32mf2( @@ -49,7 +49,7 @@ void test_vsseg2e32_v_f32m4(float *base, vfloat32m4_t v0, vfloat32m4_t v1, size_ // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsseg2e32_v_i32mf2(base, v0, v1, vl); + return __riscv_vsseg2e32_v_i32mf2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_i32m1( @@ -58,7 +58,7 @@ void test_vsseg2e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsseg2e32_v_i32m1(base, v0, v1, vl); + return __riscv_vsseg2e32_v_i32m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_i32m2( @@ -67,7 +67,7 @@ void test_vsseg2e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_i32m2(int32_t *base, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsseg2e32_v_i32m2(base, v0, v1, vl); + return __riscv_vsseg2e32_v_i32m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_i32m4( @@ -76,7 +76,7 @@ void test_vsseg2e32_v_i32m2(int32_t *base, vint32m2_t v0, vint32m2_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_i32m4(int32_t *base, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsseg2e32_v_i32m4(base, v0, v1, vl); + return __riscv_vsseg2e32_v_i32m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_u32mf2( @@ -85,7 +85,7 @@ void test_vsseg2e32_v_i32m4(int32_t *base, vint32m4_t v0, vint32m4_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsseg2e32_v_u32mf2(base, v0, v1, vl); + return __riscv_vsseg2e32_v_u32mf2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_u32m1( @@ -94,7 +94,7 @@ void test_vsseg2e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, s // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsseg2e32_v_u32m1(base, v0, v1, vl); + return __riscv_vsseg2e32_v_u32m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_u32m2( @@ -103,7 +103,7 @@ void test_vsseg2e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_u32m2(uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsseg2e32_v_u32m2(base, v0, v1, vl); + return __riscv_vsseg2e32_v_u32m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_u32m4( @@ -112,7 +112,7 @@ void test_vsseg2e32_v_u32m2(uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_u32m4(uint32_t *base, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsseg2e32_v_u32m4(base, v0, v1, vl); + return __riscv_vsseg2e32_v_u32m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_f32mf2_m( @@ -121,7 +121,7 @@ void test_vsseg2e32_v_u32m4(uint32_t *base, vuint32m4_t v0, vuint32m4_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsseg2e32_v_f32mf2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_f32mf2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_f32m1_m( @@ -130,7 +130,7 @@ void test_vsseg2e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsseg2e32_v_f32m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_f32m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_f32m2_m( @@ -139,7 +139,7 @@ void test_vsseg2e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsseg2e32_v_f32m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_f32m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_f32m4_m( @@ -148,7 +148,7 @@ void test_vsseg2e32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_f32m4_m(vbool8_t mask, float *base, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsseg2e32_v_f32m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_f32m4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_i32mf2_m( @@ -157,7 +157,7 @@ void test_vsseg2e32_v_f32m4_m(vbool8_t mask, float *base, vfloat32m4_t v0, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsseg2e32_v_i32mf2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_i32mf2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_i32m1_m( @@ -166,7 +166,7 @@ void test_vsseg2e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsseg2e32_v_i32m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_i32m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_i32m2_m( @@ -175,7 +175,7 @@ void test_vsseg2e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsseg2e32_v_i32m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_i32m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_i32m4_m( @@ -184,7 +184,7 @@ void test_vsseg2e32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_i32m4_m(vbool8_t mask, int32_t *base, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsseg2e32_v_i32m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_i32m4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_u32mf2_m( @@ -193,7 +193,7 @@ void test_vsseg2e32_v_i32m4_m(vbool8_t mask, int32_t *base, vint32m4_t v0, vint3 // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsseg2e32_v_u32mf2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_u32mf2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_u32m1_m( @@ -202,7 +202,7 @@ void test_vsseg2e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsseg2e32_v_u32m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_u32m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_u32m2_m( @@ -211,7 +211,7 @@ void test_vsseg2e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsseg2e32_v_u32m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_u32m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e32_v_u32m4_m( @@ -220,6 +220,6 @@ void test_vsseg2e32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg2e32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsseg2e32_v_u32m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e32_v_u32m4_m(mask, base, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e64.c index bfeda3e99b8869b56e5e68e9b60301e313cd0dbc..ae8f7cf5f80e76dbfe821126a039995a97a978fa 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsseg2e64_v_f64m1(base, v0, v1, vl); + return __riscv_vsseg2e64_v_f64m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_f64m2( @@ -22,7 +22,7 @@ void test_vsseg2e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_f64m2(double *base, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsseg2e64_v_f64m2(base, v0, v1, vl); + return __riscv_vsseg2e64_v_f64m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_f64m4( @@ -31,7 +31,7 @@ void test_vsseg2e64_v_f64m2(double *base, vfloat64m2_t v0, vfloat64m2_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_f64m4(double *base, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsseg2e64_v_f64m4(base, v0, v1, vl); + return __riscv_vsseg2e64_v_f64m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_i64m1( @@ -40,7 +40,7 @@ void test_vsseg2e64_v_f64m4(double *base, vfloat64m4_t v0, vfloat64m4_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsseg2e64_v_i64m1(base, v0, v1, vl); + return __riscv_vsseg2e64_v_i64m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_i64m2( @@ -49,7 +49,7 @@ void test_vsseg2e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_i64m2(int64_t *base, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsseg2e64_v_i64m2(base, v0, v1, vl); + return __riscv_vsseg2e64_v_i64m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_i64m4( @@ -58,7 +58,7 @@ void test_vsseg2e64_v_i64m2(int64_t *base, vint64m2_t v0, vint64m2_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_i64m4(int64_t *base, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsseg2e64_v_i64m4(base, v0, v1, vl); + return __riscv_vsseg2e64_v_i64m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_u64m1( @@ -67,7 +67,7 @@ void test_vsseg2e64_v_i64m4(int64_t *base, vint64m4_t v0, vint64m4_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsseg2e64_v_u64m1(base, v0, v1, vl); + return __riscv_vsseg2e64_v_u64m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_u64m2( @@ -76,7 +76,7 @@ void test_vsseg2e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_u64m2(uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsseg2e64_v_u64m2(base, v0, v1, vl); + return __riscv_vsseg2e64_v_u64m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_u64m4( @@ -85,7 +85,7 @@ void test_vsseg2e64_v_u64m2(uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_u64m4(uint64_t *base, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsseg2e64_v_u64m4(base, v0, v1, vl); + return __riscv_vsseg2e64_v_u64m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_f64m1_m( @@ -94,7 +94,7 @@ void test_vsseg2e64_v_u64m4(uint64_t *base, vuint64m4_t v0, vuint64m4_t v1, size // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsseg2e64_v_f64m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_f64m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_f64m2_m( @@ -103,7 +103,7 @@ void test_vsseg2e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsseg2e64_v_f64m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_f64m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_f64m4_m( @@ -112,7 +112,7 @@ void test_vsseg2e64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_f64m4_m(vbool16_t mask, double *base, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsseg2e64_v_f64m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_f64m4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_i64m1_m( @@ -121,7 +121,7 @@ void test_vsseg2e64_v_f64m4_m(vbool16_t mask, double *base, vfloat64m4_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsseg2e64_v_i64m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_i64m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_i64m2_m( @@ -130,7 +130,7 @@ void test_vsseg2e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsseg2e64_v_i64m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_i64m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_i64m4_m( @@ -139,7 +139,7 @@ void test_vsseg2e64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_i64m4_m(vbool16_t mask, int64_t *base, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsseg2e64_v_i64m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_i64m4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_u64m1_m( @@ -148,7 +148,7 @@ void test_vsseg2e64_v_i64m4_m(vbool16_t mask, int64_t *base, vint64m4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsseg2e64_v_u64m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_u64m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_u64m2_m( @@ -157,7 +157,7 @@ void test_vsseg2e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsseg2e64_v_u64m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_u64m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e64_v_u64m4_m( @@ -166,6 +166,6 @@ void test_vsseg2e64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg2e64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsseg2e64_v_u64m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e64_v_u64m4_m(mask, base, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e8.c index e26d3a38dbe8dc89b9759541a5e0edf2460a3ab3..df72bd6b24993f05247eec4927b3ebd02dec7587 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg2e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsseg2e8_v_i8mf8(base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8mf8(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vsseg2e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, size_t vl // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsseg2e8_v_i8mf4(base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8mf4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vsseg2e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, size_t vl // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsseg2e8_v_i8mf2(base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8mf2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vsseg2e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, size_t vl // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsseg2e8_v_i8m1(base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8m2( @@ -48,7 +48,7 @@ void test_vsseg2e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8m2(int8_t *base, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsseg2e8_v_i8m2(base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8m4( @@ -57,7 +57,7 @@ void test_vsseg2e8_v_i8m2(int8_t *base, vint8m2_t v0, vint8m2_t v1, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8m4(int8_t *base, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsseg2e8_v_i8m4(base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8mf8( @@ -66,7 +66,7 @@ void test_vsseg2e8_v_i8m4(int8_t *base, vint8m4_t v0, vint8m4_t v1, size_t vl) { // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsseg2e8_v_u8mf8(base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8mf8(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8mf4( @@ -75,7 +75,7 @@ void test_vsseg2e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsseg2e8_v_u8mf4(base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8mf4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8mf2( @@ -84,7 +84,7 @@ void test_vsseg2e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsseg2e8_v_u8mf2(base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8mf2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8m1( @@ -93,7 +93,7 @@ void test_vsseg2e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, size_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsseg2e8_v_u8m1(base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8m1(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8m2( @@ -102,7 +102,7 @@ void test_vsseg2e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, size_t vl // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8m2(uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsseg2e8_v_u8m2(base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8m2(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8m4( @@ -111,7 +111,7 @@ void test_vsseg2e8_v_u8m2(uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, size_t vl // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8m4(uint8_t *base, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsseg2e8_v_u8m4(base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8m4(base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8mf8_m( @@ -120,7 +120,7 @@ void test_vsseg2e8_v_u8m4(uint8_t *base, vuint8m4_t v0, vuint8m4_t v1, size_t vl // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsseg2e8_v_i8mf8_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8mf8_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8mf4_m( @@ -129,7 +129,7 @@ void test_vsseg2e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsseg2e8_v_i8mf4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8mf4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8mf2_m( @@ -138,7 +138,7 @@ void test_vsseg2e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsseg2e8_v_i8mf2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8mf2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8m1_m( @@ -147,7 +147,7 @@ void test_vsseg2e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsseg2e8_v_i8m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8m2_m( @@ -156,7 +156,7 @@ void test_vsseg2e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsseg2e8_v_i8m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_i8m4_m( @@ -165,7 +165,7 @@ void test_vsseg2e8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t v0, vint8m2_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_i8m4_m(vbool2_t mask, int8_t *base, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsseg2e8_v_i8m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_i8m4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8mf8_m( @@ -174,7 +174,7 @@ void test_vsseg2e8_v_i8m4_m(vbool2_t mask, int8_t *base, vint8m4_t v0, vint8m4_t // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsseg2e8_v_u8mf8_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8mf8_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8mf4_m( @@ -183,7 +183,7 @@ void test_vsseg2e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsseg2e8_v_u8mf4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8mf4_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8mf2_m( @@ -192,7 +192,7 @@ void test_vsseg2e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsseg2e8_v_u8mf2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8mf2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8m1_m( @@ -201,7 +201,7 @@ void test_vsseg2e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsseg2e8_v_u8m1_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8m1_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8m2_m( @@ -210,7 +210,7 @@ void test_vsseg2e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsseg2e8_v_u8m2_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8m2_m(mask, base, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsseg2e8_v_u8m4_m( @@ -219,6 +219,6 @@ void test_vsseg2e8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t v0, vuint8m // CHECK-RV64-NEXT: ret void // void test_vsseg2e8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsseg2e8_v_u8m4_m(mask, base, v0, v1, vl); + return __riscv_vsseg2e8_v_u8m4_m(mask, base, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c index 35b44fd7f2a3e12c68bf1cefcac6ec09bfba8d4b..6e68760fb1fe46d7fbb27b3101631a091a9eeb9c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsseg3e16_v_f16mf4(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_f16mf4(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsseg3e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsseg3e16_v_f16mf2(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_f16mf2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsseg3e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsseg3e16_v_f16m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_f16m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsseg3e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_f16m2(_Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsseg3e16_v_f16m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_f16m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_i16mf4( @@ -49,7 +49,7 @@ void test_vsseg3e16_v_f16m2(_Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsseg3e16_v_i16mf4(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_i16mf4(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_i16mf2( @@ -58,7 +58,7 @@ void test_vsseg3e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsseg3e16_v_i16mf2(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_i16mf2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_i16m1( @@ -67,7 +67,7 @@ void test_vsseg3e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsseg3e16_v_i16m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_i16m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_i16m2( @@ -76,7 +76,7 @@ void test_vsseg3e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_i16m2(int16_t *base, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsseg3e16_v_i16m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_i16m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_u16mf4( @@ -85,7 +85,7 @@ void test_vsseg3e16_v_i16m2(int16_t *base, vint16m2_t v0, vint16m2_t v1, vint16m // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsseg3e16_v_u16mf4(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_u16mf4(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_u16mf2( @@ -94,7 +94,7 @@ void test_vsseg3e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsseg3e16_v_u16mf2(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_u16mf2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_u16m1( @@ -103,7 +103,7 @@ void test_vsseg3e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsseg3e16_v_u16m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_u16m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_u16m2( @@ -112,7 +112,7 @@ void test_vsseg3e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_u16m2(uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsseg3e16_v_u16m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_u16m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_f16mf4_m( @@ -121,7 +121,7 @@ void test_vsseg3e16_v_u16m2(uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsseg3e16_v_f16mf4_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_f16mf4_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_f16mf2_m( @@ -130,7 +130,7 @@ void test_vsseg3e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsseg3e16_v_f16mf2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_f16mf2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_f16m1_m( @@ -139,7 +139,7 @@ void test_vsseg3e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsseg3e16_v_f16m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_f16m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_f16m2_m( @@ -148,7 +148,7 @@ void test_vsseg3e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_f16m2_m(vbool8_t mask, _Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsseg3e16_v_f16m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_f16m2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_i16mf4_m( @@ -157,7 +157,7 @@ void test_vsseg3e16_v_f16m2_m(vbool8_t mask, _Float16 *base, vfloat16m2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsseg3e16_v_i16mf4_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_i16mf4_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_i16mf2_m( @@ -166,7 +166,7 @@ void test_vsseg3e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsseg3e16_v_i16mf2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_i16mf2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_i16m1_m( @@ -175,7 +175,7 @@ void test_vsseg3e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsseg3e16_v_i16m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_i16m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_i16m2_m( @@ -184,7 +184,7 @@ void test_vsseg3e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsseg3e16_v_i16m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_i16m2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_u16mf4_m( @@ -193,7 +193,7 @@ void test_vsseg3e16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t v0, vint1 // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsseg3e16_v_u16mf4_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_u16mf4_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_u16mf2_m( @@ -202,7 +202,7 @@ void test_vsseg3e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsseg3e16_v_u16mf2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_u16mf2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_u16m1_m( @@ -211,7 +211,7 @@ void test_vsseg3e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsseg3e16_v_u16m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_u16m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e16_v_u16m2_m( @@ -220,6 +220,6 @@ void test_vsseg3e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg3e16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsseg3e16_v_u16m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e16_v_u16m2_m(mask, base, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e32.c index 6800c19fef41f3b5aa78f6b6b91be0f4269d11b5..bc00c38fb9a43f8e35207eda024372110bf064e4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsseg3e32_v_f32mf2(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_f32mf2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vsseg3e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsseg3e32_v_f32m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_f32m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_f32m2( @@ -31,7 +31,7 @@ void test_vsseg3e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_f32m2(float *base, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsseg3e32_v_f32m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_f32m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_i32mf2( @@ -40,7 +40,7 @@ void test_vsseg3e32_v_f32m2(float *base, vfloat32m2_t v0, vfloat32m2_t v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsseg3e32_v_i32mf2(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_i32mf2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_i32m1( @@ -49,7 +49,7 @@ void test_vsseg3e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsseg3e32_v_i32m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_i32m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_i32m2( @@ -58,7 +58,7 @@ void test_vsseg3e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_i32m2(int32_t *base, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsseg3e32_v_i32m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_i32m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_u32mf2( @@ -67,7 +67,7 @@ void test_vsseg3e32_v_i32m2(int32_t *base, vint32m2_t v0, vint32m2_t v1, vint32m // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsseg3e32_v_u32mf2(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_u32mf2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_u32m1( @@ -76,7 +76,7 @@ void test_vsseg3e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsseg3e32_v_u32m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_u32m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_u32m2( @@ -85,7 +85,7 @@ void test_vsseg3e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_u32m2(uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsseg3e32_v_u32m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_u32m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_f32mf2_m( @@ -94,7 +94,7 @@ void test_vsseg3e32_v_u32m2(uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsseg3e32_v_f32mf2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_f32mf2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_f32m1_m( @@ -103,7 +103,7 @@ void test_vsseg3e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsseg3e32_v_f32m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_f32m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_f32m2_m( @@ -112,7 +112,7 @@ void test_vsseg3e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsseg3e32_v_f32m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_f32m2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_i32mf2_m( @@ -121,7 +121,7 @@ void test_vsseg3e32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsseg3e32_v_i32mf2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_i32mf2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_i32m1_m( @@ -130,7 +130,7 @@ void test_vsseg3e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsseg3e32_v_i32m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_i32m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_i32m2_m( @@ -139,7 +139,7 @@ void test_vsseg3e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsseg3e32_v_i32m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_i32m2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_u32mf2_m( @@ -148,7 +148,7 @@ void test_vsseg3e32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsseg3e32_v_u32mf2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_u32mf2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_u32m1_m( @@ -157,7 +157,7 @@ void test_vsseg3e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsseg3e32_v_u32m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_u32m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e32_v_u32m2_m( @@ -166,6 +166,6 @@ void test_vsseg3e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg3e32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsseg3e32_v_u32m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e32_v_u32m2_m(mask, base, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e64.c index b0ef22f68790c488e0707ccb4ca15606a57f7e96..9ea648556c93dc3f5fab66f7026d387dc617d115 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsseg3e64_v_f64m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_f64m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_f64m2( @@ -22,7 +22,7 @@ void test_vsseg3e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_f64m2(double *base, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsseg3e64_v_f64m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_f64m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_i64m1( @@ -31,7 +31,7 @@ void test_vsseg3e64_v_f64m2(double *base, vfloat64m2_t v0, vfloat64m2_t v1, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsseg3e64_v_i64m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_i64m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_i64m2( @@ -40,7 +40,7 @@ void test_vsseg3e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_i64m2(int64_t *base, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsseg3e64_v_i64m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_i64m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_u64m1( @@ -49,7 +49,7 @@ void test_vsseg3e64_v_i64m2(int64_t *base, vint64m2_t v0, vint64m2_t v1, vint64m // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsseg3e64_v_u64m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_u64m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_u64m2( @@ -58,7 +58,7 @@ void test_vsseg3e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_u64m2(uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsseg3e64_v_u64m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_u64m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_f64m1_m( @@ -67,7 +67,7 @@ void test_vsseg3e64_v_u64m2(uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsseg3e64_v_f64m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_f64m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_f64m2_m( @@ -76,7 +76,7 @@ void test_vsseg3e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsseg3e64_v_f64m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_f64m2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_i64m1_m( @@ -85,7 +85,7 @@ void test_vsseg3e64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsseg3e64_v_i64m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_i64m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_i64m2_m( @@ -94,7 +94,7 @@ void test_vsseg3e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsseg3e64_v_i64m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_i64m2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_u64m1_m( @@ -103,7 +103,7 @@ void test_vsseg3e64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsseg3e64_v_u64m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_u64m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e64_v_u64m2_m( @@ -112,6 +112,6 @@ void test_vsseg3e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg3e64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsseg3e64_v_u64m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e64_v_u64m2_m(mask, base, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e8.c index 8da5fbbc347ca59ec1702610905fce9fa1cc0846..790eea45a778a195de9ce76fa6dbb2b5ff3bd15f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg3e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsseg3e8_v_i8mf8(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8mf8(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vsseg3e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsseg3e8_v_i8mf4(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8mf4(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vsseg3e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsseg3e8_v_i8mf2(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8mf2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vsseg3e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsseg3e8_v_i8m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8m2( @@ -48,7 +48,7 @@ void test_vsseg3e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2 // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8m2(int8_t *base, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsseg3e8_v_i8m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8mf8( @@ -57,7 +57,7 @@ void test_vsseg3e8_v_i8m2(int8_t *base, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2 // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsseg3e8_v_u8mf8(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8mf8(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8mf4( @@ -66,7 +66,7 @@ void test_vsseg3e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsseg3e8_v_u8mf4(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8mf4(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8mf2( @@ -75,7 +75,7 @@ void test_vsseg3e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsseg3e8_v_u8mf2(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8mf2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8m1( @@ -84,7 +84,7 @@ void test_vsseg3e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsseg3e8_v_u8m1(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8m1(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8m2( @@ -93,7 +93,7 @@ void test_vsseg3e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_ // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8m2(uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsseg3e8_v_u8m2(base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8m2(base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8mf8_m( @@ -102,7 +102,7 @@ void test_vsseg3e8_v_u8m2(uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_ // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsseg3e8_v_i8mf8_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8mf8_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8mf4_m( @@ -111,7 +111,7 @@ void test_vsseg3e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsseg3e8_v_i8mf4_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8mf4_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8mf2_m( @@ -120,7 +120,7 @@ void test_vsseg3e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsseg3e8_v_i8mf2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8mf2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8m1_m( @@ -129,7 +129,7 @@ void test_vsseg3e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsseg3e8_v_i8m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_i8m2_m( @@ -138,7 +138,7 @@ void test_vsseg3e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsseg3e8_v_i8m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_i8m2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8mf8_m( @@ -147,7 +147,7 @@ void test_vsseg3e8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t v0, vint8m2_t // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsseg3e8_v_u8mf8_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8mf8_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8mf4_m( @@ -156,7 +156,7 @@ void test_vsseg3e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsseg3e8_v_u8mf4_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8mf4_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8mf2_m( @@ -165,7 +165,7 @@ void test_vsseg3e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsseg3e8_v_u8mf2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8mf2_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8m1_m( @@ -174,7 +174,7 @@ void test_vsseg3e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsseg3e8_v_u8m1_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8m1_m(mask, base, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsseg3e8_v_u8m2_m( @@ -183,6 +183,6 @@ void test_vsseg3e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m // CHECK-RV64-NEXT: ret void // void test_vsseg3e8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsseg3e8_v_u8m2_m(mask, base, v0, v1, v2, vl); + return __riscv_vsseg3e8_v_u8m2_m(mask, base, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c index e338b80394458ee6a644f1c22971ac68b01ba6a7..50358c71974f044348d7c6c41c9338abbd0bbbe4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsseg4e16_v_f16mf4(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_f16mf4(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsseg4e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsseg4e16_v_f16mf2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_f16mf2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsseg4e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsseg4e16_v_f16m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_f16m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsseg4e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_f16m2(_Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsseg4e16_v_f16m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_f16m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_i16mf4( @@ -49,7 +49,7 @@ void test_vsseg4e16_v_f16m2(_Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsseg4e16_v_i16mf4(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_i16mf4(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_i16mf2( @@ -58,7 +58,7 @@ void test_vsseg4e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsseg4e16_v_i16mf2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_i16mf2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_i16m1( @@ -67,7 +67,7 @@ void test_vsseg4e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsseg4e16_v_i16m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_i16m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_i16m2( @@ -76,7 +76,7 @@ void test_vsseg4e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_i16m2(int16_t *base, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsseg4e16_v_i16m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_i16m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_u16mf4( @@ -85,7 +85,7 @@ void test_vsseg4e16_v_i16m2(int16_t *base, vint16m2_t v0, vint16m2_t v1, vint16m // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsseg4e16_v_u16mf4(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_u16mf4(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_u16mf2( @@ -94,7 +94,7 @@ void test_vsseg4e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsseg4e16_v_u16mf2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_u16mf2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_u16m1( @@ -103,7 +103,7 @@ void test_vsseg4e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsseg4e16_v_u16m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_u16m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_u16m2( @@ -112,7 +112,7 @@ void test_vsseg4e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_u16m2(uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsseg4e16_v_u16m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_u16m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_f16mf4_m( @@ -121,7 +121,7 @@ void test_vsseg4e16_v_u16m2(uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsseg4e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_f16mf2_m( @@ -130,7 +130,7 @@ void test_vsseg4e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsseg4e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_f16m1_m( @@ -139,7 +139,7 @@ void test_vsseg4e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsseg4e16_v_f16m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_f16m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_f16m2_m( @@ -148,7 +148,7 @@ void test_vsseg4e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_f16m2_m(vbool8_t mask, _Float16 *base, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsseg4e16_v_f16m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_f16m2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_i16mf4_m( @@ -157,7 +157,7 @@ void test_vsseg4e16_v_f16m2_m(vbool8_t mask, _Float16 *base, vfloat16m2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsseg4e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_i16mf2_m( @@ -166,7 +166,7 @@ void test_vsseg4e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsseg4e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_i16m1_m( @@ -175,7 +175,7 @@ void test_vsseg4e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsseg4e16_v_i16m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_i16m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_i16m2_m( @@ -184,7 +184,7 @@ void test_vsseg4e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsseg4e16_v_i16m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_i16m2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_u16mf4_m( @@ -193,7 +193,7 @@ void test_vsseg4e16_v_i16m2_m(vbool8_t mask, int16_t *base, vint16m2_t v0, vint1 // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsseg4e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_u16mf2_m( @@ -202,7 +202,7 @@ void test_vsseg4e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsseg4e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_u16m1_m( @@ -211,7 +211,7 @@ void test_vsseg4e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsseg4e16_v_u16m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_u16m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e16_v_u16m2_m( @@ -220,6 +220,6 @@ void test_vsseg4e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg4e16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsseg4e16_v_u16m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e16_v_u16m2_m(mask, base, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e32.c index 1af08d387eea47343ac5cca56829267ff9ba1e42..e06169286a5b1c25b0824735c87f9108a8c762a9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsseg4e32_v_f32mf2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_f32mf2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vsseg4e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsseg4e32_v_f32m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_f32m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_f32m2( @@ -31,7 +31,7 @@ void test_vsseg4e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_f32m2(float *base, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsseg4e32_v_f32m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_f32m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_i32mf2( @@ -40,7 +40,7 @@ void test_vsseg4e32_v_f32m2(float *base, vfloat32m2_t v0, vfloat32m2_t v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsseg4e32_v_i32mf2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_i32mf2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_i32m1( @@ -49,7 +49,7 @@ void test_vsseg4e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsseg4e32_v_i32m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_i32m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_i32m2( @@ -58,7 +58,7 @@ void test_vsseg4e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_i32m2(int32_t *base, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsseg4e32_v_i32m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_i32m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_u32mf2( @@ -67,7 +67,7 @@ void test_vsseg4e32_v_i32m2(int32_t *base, vint32m2_t v0, vint32m2_t v1, vint32m // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsseg4e32_v_u32mf2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_u32mf2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_u32m1( @@ -76,7 +76,7 @@ void test_vsseg4e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsseg4e32_v_u32m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_u32m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_u32m2( @@ -85,7 +85,7 @@ void test_vsseg4e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_u32m2(uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsseg4e32_v_u32m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_u32m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_f32mf2_m( @@ -94,7 +94,7 @@ void test_vsseg4e32_v_u32m2(uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsseg4e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_f32m1_m( @@ -103,7 +103,7 @@ void test_vsseg4e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsseg4e32_v_f32m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_f32m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_f32m2_m( @@ -112,7 +112,7 @@ void test_vsseg4e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsseg4e32_v_f32m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_f32m2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_i32mf2_m( @@ -121,7 +121,7 @@ void test_vsseg4e32_v_f32m2_m(vbool16_t mask, float *base, vfloat32m2_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsseg4e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_i32m1_m( @@ -130,7 +130,7 @@ void test_vsseg4e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsseg4e32_v_i32m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_i32m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_i32m2_m( @@ -139,7 +139,7 @@ void test_vsseg4e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsseg4e32_v_i32m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_i32m2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_u32mf2_m( @@ -148,7 +148,7 @@ void test_vsseg4e32_v_i32m2_m(vbool16_t mask, int32_t *base, vint32m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsseg4e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_u32m1_m( @@ -157,7 +157,7 @@ void test_vsseg4e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsseg4e32_v_u32m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_u32m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e32_v_u32m2_m( @@ -166,6 +166,6 @@ void test_vsseg4e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg4e32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsseg4e32_v_u32m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e32_v_u32m2_m(mask, base, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e64.c index 153f2ff7c12d5d72641f71beb381c2df22721603..a904803a34d4b545addb45104e2765ce6c71e574 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsseg4e64_v_f64m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_f64m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_f64m2( @@ -22,7 +22,7 @@ void test_vsseg4e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_f64m2(double *base, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsseg4e64_v_f64m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_f64m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_i64m1( @@ -31,7 +31,7 @@ void test_vsseg4e64_v_f64m2(double *base, vfloat64m2_t v0, vfloat64m2_t v1, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsseg4e64_v_i64m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_i64m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_i64m2( @@ -40,7 +40,7 @@ void test_vsseg4e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_i64m2(int64_t *base, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsseg4e64_v_i64m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_i64m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_u64m1( @@ -49,7 +49,7 @@ void test_vsseg4e64_v_i64m2(int64_t *base, vint64m2_t v0, vint64m2_t v1, vint64m // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsseg4e64_v_u64m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_u64m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_u64m2( @@ -58,7 +58,7 @@ void test_vsseg4e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_u64m2(uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsseg4e64_v_u64m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_u64m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_f64m1_m( @@ -67,7 +67,7 @@ void test_vsseg4e64_v_u64m2(uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsseg4e64_v_f64m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_f64m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_f64m2_m( @@ -76,7 +76,7 @@ void test_vsseg4e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsseg4e64_v_f64m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_f64m2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_i64m1_m( @@ -85,7 +85,7 @@ void test_vsseg4e64_v_f64m2_m(vbool32_t mask, double *base, vfloat64m2_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsseg4e64_v_i64m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_i64m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_i64m2_m( @@ -94,7 +94,7 @@ void test_vsseg4e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsseg4e64_v_i64m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_i64m2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_u64m1_m( @@ -103,7 +103,7 @@ void test_vsseg4e64_v_i64m2_m(vbool32_t mask, int64_t *base, vint64m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsseg4e64_v_u64m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_u64m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e64_v_u64m2_m( @@ -112,6 +112,6 @@ void test_vsseg4e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsseg4e64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsseg4e64_v_u64m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e64_v_u64m2_m(mask, base, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e8.c index 4a860b14dd43190f58370417dae8d3e90550cdb2..c6906479f412f79146b7d6b686b70ff2668989b4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg4e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsseg4e8_v_i8mf8(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8mf8(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vsseg4e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsseg4e8_v_i8mf4(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8mf4(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vsseg4e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsseg4e8_v_i8mf2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8mf2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vsseg4e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsseg4e8_v_i8m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8m2( @@ -48,7 +48,7 @@ void test_vsseg4e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2 // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8m2(int8_t *base, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsseg4e8_v_i8m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8mf8( @@ -57,7 +57,7 @@ void test_vsseg4e8_v_i8m2(int8_t *base, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2 // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsseg4e8_v_u8mf8(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8mf8(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8mf4( @@ -66,7 +66,7 @@ void test_vsseg4e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsseg4e8_v_u8mf4(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8mf4(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8mf2( @@ -75,7 +75,7 @@ void test_vsseg4e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsseg4e8_v_u8mf2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8mf2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8m1( @@ -84,7 +84,7 @@ void test_vsseg4e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsseg4e8_v_u8m1(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8m1(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8m2( @@ -93,7 +93,7 @@ void test_vsseg4e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_ // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8m2(uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsseg4e8_v_u8m2(base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8m2(base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8mf8_m( @@ -102,7 +102,7 @@ void test_vsseg4e8_v_u8m2(uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_ // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsseg4e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8mf4_m( @@ -111,7 +111,7 @@ void test_vsseg4e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsseg4e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8mf2_m( @@ -120,7 +120,7 @@ void test_vsseg4e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsseg4e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8m1_m( @@ -129,7 +129,7 @@ void test_vsseg4e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsseg4e8_v_i8m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_i8m2_m( @@ -138,7 +138,7 @@ void test_vsseg4e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsseg4e8_v_i8m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_i8m2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8mf8_m( @@ -147,7 +147,7 @@ void test_vsseg4e8_v_i8m2_m(vbool4_t mask, int8_t *base, vint8m2_t v0, vint8m2_t // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsseg4e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8mf4_m( @@ -156,7 +156,7 @@ void test_vsseg4e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsseg4e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8mf2_m( @@ -165,7 +165,7 @@ void test_vsseg4e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsseg4e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8m1_m( @@ -174,7 +174,7 @@ void test_vsseg4e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsseg4e8_v_u8m1_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8m1_m(mask, base, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsseg4e8_v_u8m2_m( @@ -183,6 +183,6 @@ void test_vsseg4e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m // CHECK-RV64-NEXT: ret void // void test_vsseg4e8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsseg4e8_v_u8m2_m(mask, base, v0, v1, v2, v3, vl); + return __riscv_vsseg4e8_v_u8m2_m(mask, base, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c index 263e81372aacf0c588d00d839b2b06125090ed46..c4fe14623caa0e5f1d43749a30b1ec08f0b1f629 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsseg5e16_v_f16mf4(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_f16mf4(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsseg5e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsseg5e16_v_f16mf2(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_f16mf2(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsseg5e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsseg5e16_v_f16m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_f16m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_i16mf4( @@ -40,7 +40,7 @@ void test_vsseg5e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsseg5e16_v_i16mf4(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_i16mf4(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_i16mf2( @@ -49,7 +49,7 @@ void test_vsseg5e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsseg5e16_v_i16mf2(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_i16mf2(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_i16m1( @@ -58,7 +58,7 @@ void test_vsseg5e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsseg5e16_v_i16m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_i16m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_u16mf4( @@ -67,7 +67,7 @@ void test_vsseg5e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsseg5e16_v_u16mf4(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_u16mf4(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_u16mf2( @@ -76,7 +76,7 @@ void test_vsseg5e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsseg5e16_v_u16mf2(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_u16mf2(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_u16m1( @@ -85,7 +85,7 @@ void test_vsseg5e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsseg5e16_v_u16m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_u16m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_f16mf4_m( @@ -94,7 +94,7 @@ void test_vsseg5e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsseg5e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_f16mf2_m( @@ -103,7 +103,7 @@ void test_vsseg5e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsseg5e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_f16m1_m( @@ -112,7 +112,7 @@ void test_vsseg5e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsseg5e16_v_f16m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_f16m1_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_i16mf4_m( @@ -121,7 +121,7 @@ void test_vsseg5e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsseg5e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_i16mf2_m( @@ -130,7 +130,7 @@ void test_vsseg5e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsseg5e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_i16m1_m( @@ -139,7 +139,7 @@ void test_vsseg5e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsseg5e16_v_i16m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_i16m1_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_u16mf4_m( @@ -148,7 +148,7 @@ void test_vsseg5e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsseg5e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_u16mf2_m( @@ -157,7 +157,7 @@ void test_vsseg5e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsseg5e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e16_v_u16m1_m( @@ -166,6 +166,6 @@ void test_vsseg5e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg5e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsseg5e16_v_u16m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e16_v_u16m1_m(mask, base, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e32.c index 8f3c05fdd46c74601eee9cc5cd83656b8c3d9bb6..415efd8ce19f06cc30b3824fbb461b4abb504a94 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsseg5e32_v_f32mf2(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_f32mf2(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vsseg5e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsseg5e32_v_f32m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_f32m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_i32mf2( @@ -31,7 +31,7 @@ void test_vsseg5e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsseg5e32_v_i32mf2(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_i32mf2(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_i32m1( @@ -40,7 +40,7 @@ void test_vsseg5e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsseg5e32_v_i32m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_i32m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_u32mf2( @@ -49,7 +49,7 @@ void test_vsseg5e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsseg5e32_v_u32mf2(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_u32mf2(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_u32m1( @@ -58,7 +58,7 @@ void test_vsseg5e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsseg5e32_v_u32m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_u32m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_f32mf2_m( @@ -67,7 +67,7 @@ void test_vsseg5e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsseg5e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_f32m1_m( @@ -76,7 +76,7 @@ void test_vsseg5e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsseg5e32_v_f32m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_f32m1_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_i32mf2_m( @@ -85,7 +85,7 @@ void test_vsseg5e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsseg5e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_i32m1_m( @@ -94,7 +94,7 @@ void test_vsseg5e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsseg5e32_v_i32m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_i32m1_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_u32mf2_m( @@ -103,7 +103,7 @@ void test_vsseg5e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsseg5e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e32_v_u32m1_m( @@ -112,6 +112,6 @@ void test_vsseg5e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg5e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsseg5e32_v_u32m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e32_v_u32m1_m(mask, base, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e64.c index d9583b462bba6ca1943f624af8f0b5fcee8f85b1..757e490efdd451486972867b024adf862ca45dc7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg5e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsseg5e64_v_f64m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e64_v_f64m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e64_v_i64m1( @@ -22,7 +22,7 @@ void test_vsseg5e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg5e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsseg5e64_v_i64m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e64_v_i64m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e64_v_u64m1( @@ -31,7 +31,7 @@ void test_vsseg5e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m // CHECK-RV64-NEXT: ret void // void test_vsseg5e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsseg5e64_v_u64m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e64_v_u64m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e64_v_f64m1_m( @@ -40,7 +40,7 @@ void test_vsseg5e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg5e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsseg5e64_v_f64m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e64_v_f64m1_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e64_v_i64m1_m( @@ -49,7 +49,7 @@ void test_vsseg5e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg5e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsseg5e64_v_i64m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e64_v_i64m1_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e64_v_u64m1_m( @@ -58,6 +58,6 @@ void test_vsseg5e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg5e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsseg5e64_v_u64m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e64_v_u64m1_m(mask, base, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e8.c index fb7aa57bf4cb63efb1c40ba831aaa93536b2bc59..97dc397876d7df2b48ab3f7d3000c9845f8ff6da 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg5e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsseg5e8_v_i8mf8(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_i8mf8(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vsseg5e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsseg5e8_v_i8mf4(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_i8mf4(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vsseg5e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsseg5e8_v_i8mf2(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_i8mf2(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vsseg5e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsseg5e8_v_i8m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_i8m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_u8mf8( @@ -48,7 +48,7 @@ void test_vsseg5e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2 // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsseg5e8_v_u8mf8(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_u8mf8(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_u8mf4( @@ -57,7 +57,7 @@ void test_vsseg5e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsseg5e8_v_u8mf4(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_u8mf4(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_u8mf2( @@ -66,7 +66,7 @@ void test_vsseg5e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsseg5e8_v_u8mf2(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_u8mf2(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_u8m1( @@ -75,7 +75,7 @@ void test_vsseg5e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsseg5e8_v_u8m1(base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_u8m1(base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_i8mf8_m( @@ -84,7 +84,7 @@ void test_vsseg5e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_ // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsseg5e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_i8mf4_m( @@ -93,7 +93,7 @@ void test_vsseg5e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsseg5e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_i8mf2_m( @@ -102,7 +102,7 @@ void test_vsseg5e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsseg5e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_i8m1_m( @@ -111,7 +111,7 @@ void test_vsseg5e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsseg5e8_v_i8m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_i8m1_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_u8mf8_m( @@ -120,7 +120,7 @@ void test_vsseg5e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsseg5e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_u8mf4_m( @@ -129,7 +129,7 @@ void test_vsseg5e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsseg5e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_u8mf2_m( @@ -138,7 +138,7 @@ void test_vsseg5e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsseg5e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsseg5e8_v_u8m1_m( @@ -147,6 +147,6 @@ void test_vsseg5e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg5e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsseg5e8_v_u8m1_m(mask, base, v0, v1, v2, v3, v4, vl); + return __riscv_vsseg5e8_v_u8m1_m(mask, base, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c index 60c012cbea82db1f227bcabf0cb9842c45a0efdb..ccf9c59f88c4eac87509dd0c1faaa55d0d649ad8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsseg6e16_v_f16mf4(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_f16mf4(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsseg6e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsseg6e16_v_f16mf2(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_f16mf2(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsseg6e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsseg6e16_v_f16m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_f16m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_i16mf4( @@ -40,7 +40,7 @@ void test_vsseg6e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsseg6e16_v_i16mf4(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_i16mf4(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_i16mf2( @@ -49,7 +49,7 @@ void test_vsseg6e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsseg6e16_v_i16mf2(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_i16mf2(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_i16m1( @@ -58,7 +58,7 @@ void test_vsseg6e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsseg6e16_v_i16m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_i16m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_u16mf4( @@ -67,7 +67,7 @@ void test_vsseg6e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsseg6e16_v_u16mf4(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_u16mf4(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_u16mf2( @@ -76,7 +76,7 @@ void test_vsseg6e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsseg6e16_v_u16mf2(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_u16mf2(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_u16m1( @@ -85,7 +85,7 @@ void test_vsseg6e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsseg6e16_v_u16m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_u16m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_f16mf4_m( @@ -94,7 +94,7 @@ void test_vsseg6e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsseg6e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_f16mf2_m( @@ -103,7 +103,7 @@ void test_vsseg6e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsseg6e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_f16m1_m( @@ -112,7 +112,7 @@ void test_vsseg6e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsseg6e16_v_f16m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_f16m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_i16mf4_m( @@ -121,7 +121,7 @@ void test_vsseg6e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsseg6e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_i16mf2_m( @@ -130,7 +130,7 @@ void test_vsseg6e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsseg6e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_i16m1_m( @@ -139,7 +139,7 @@ void test_vsseg6e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsseg6e16_v_i16m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_i16m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_u16mf4_m( @@ -148,7 +148,7 @@ void test_vsseg6e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsseg6e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_u16mf2_m( @@ -157,7 +157,7 @@ void test_vsseg6e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsseg6e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e16_v_u16m1_m( @@ -166,6 +166,6 @@ void test_vsseg6e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg6e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsseg6e16_v_u16m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e16_v_u16m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e32.c index 421b3b89f363c6aad0ea38da851fb9e36b4b3a3d..57d33d2246372ab85e505cd0e462ff43eb3bf59a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsseg6e32_v_f32mf2(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_f32mf2(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vsseg6e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsseg6e32_v_f32m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_f32m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_i32mf2( @@ -31,7 +31,7 @@ void test_vsseg6e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsseg6e32_v_i32mf2(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_i32mf2(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_i32m1( @@ -40,7 +40,7 @@ void test_vsseg6e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsseg6e32_v_i32m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_i32m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_u32mf2( @@ -49,7 +49,7 @@ void test_vsseg6e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsseg6e32_v_u32mf2(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_u32mf2(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_u32m1( @@ -58,7 +58,7 @@ void test_vsseg6e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsseg6e32_v_u32m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_u32m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_f32mf2_m( @@ -67,7 +67,7 @@ void test_vsseg6e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsseg6e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_f32m1_m( @@ -76,7 +76,7 @@ void test_vsseg6e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsseg6e32_v_f32m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_f32m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_i32mf2_m( @@ -85,7 +85,7 @@ void test_vsseg6e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsseg6e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_i32m1_m( @@ -94,7 +94,7 @@ void test_vsseg6e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsseg6e32_v_i32m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_i32m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_u32mf2_m( @@ -103,7 +103,7 @@ void test_vsseg6e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsseg6e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e32_v_u32m1_m( @@ -112,6 +112,6 @@ void test_vsseg6e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg6e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsseg6e32_v_u32m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e32_v_u32m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e64.c index d6b5c15c8515a077a3842d6d58158229e422f598..a54fac861e31c62bf0882c46c90d8598013ca2f3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg6e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsseg6e64_v_f64m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e64_v_f64m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e64_v_i64m1( @@ -22,7 +22,7 @@ void test_vsseg6e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg6e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsseg6e64_v_i64m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e64_v_i64m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e64_v_u64m1( @@ -31,7 +31,7 @@ void test_vsseg6e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m // CHECK-RV64-NEXT: ret void // void test_vsseg6e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsseg6e64_v_u64m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e64_v_u64m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e64_v_f64m1_m( @@ -40,7 +40,7 @@ void test_vsseg6e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg6e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsseg6e64_v_f64m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e64_v_f64m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e64_v_i64m1_m( @@ -49,7 +49,7 @@ void test_vsseg6e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg6e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsseg6e64_v_i64m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e64_v_i64m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e64_v_u64m1_m( @@ -58,6 +58,6 @@ void test_vsseg6e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg6e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsseg6e64_v_u64m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e64_v_u64m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e8.c index ba9b3415cc9d961343e12a5a98278e34ef2c4f17..d04515da328245fe6bdd5311329087e6583be84b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg6e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsseg6e8_v_i8mf8(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_i8mf8(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vsseg6e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsseg6e8_v_i8mf4(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_i8mf4(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vsseg6e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsseg6e8_v_i8mf2(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_i8mf2(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vsseg6e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsseg6e8_v_i8m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_i8m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_u8mf8( @@ -48,7 +48,7 @@ void test_vsseg6e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2 // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsseg6e8_v_u8mf8(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_u8mf8(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_u8mf4( @@ -57,7 +57,7 @@ void test_vsseg6e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsseg6e8_v_u8mf4(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_u8mf4(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_u8mf2( @@ -66,7 +66,7 @@ void test_vsseg6e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsseg6e8_v_u8mf2(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_u8mf2(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_u8m1( @@ -75,7 +75,7 @@ void test_vsseg6e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsseg6e8_v_u8m1(base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_u8m1(base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_i8mf8_m( @@ -84,7 +84,7 @@ void test_vsseg6e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_ // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsseg6e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_i8mf4_m( @@ -93,7 +93,7 @@ void test_vsseg6e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsseg6e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_i8mf2_m( @@ -102,7 +102,7 @@ void test_vsseg6e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsseg6e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_i8m1_m( @@ -111,7 +111,7 @@ void test_vsseg6e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsseg6e8_v_i8m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_i8m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_u8mf8_m( @@ -120,7 +120,7 @@ void test_vsseg6e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsseg6e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_u8mf4_m( @@ -129,7 +129,7 @@ void test_vsseg6e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsseg6e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_u8mf2_m( @@ -138,7 +138,7 @@ void test_vsseg6e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsseg6e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsseg6e8_v_u8m1_m( @@ -147,6 +147,6 @@ void test_vsseg6e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg6e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsseg6e8_v_u8m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsseg6e8_v_u8m1_m(mask, base, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c index d2d8d1208f66c4f922e3f9d11c2d27f019f8b3c9..fd5cd805fe58f277bf1d6b684a6b8f5757e2cb29 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsseg7e16_v_f16mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_f16mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsseg7e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsseg7e16_v_f16mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_f16mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsseg7e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsseg7e16_v_f16m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_f16m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_i16mf4( @@ -40,7 +40,7 @@ void test_vsseg7e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsseg7e16_v_i16mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_i16mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_i16mf2( @@ -49,7 +49,7 @@ void test_vsseg7e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsseg7e16_v_i16mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_i16mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_i16m1( @@ -58,7 +58,7 @@ void test_vsseg7e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsseg7e16_v_i16m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_i16m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_u16mf4( @@ -67,7 +67,7 @@ void test_vsseg7e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsseg7e16_v_u16mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_u16mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_u16mf2( @@ -76,7 +76,7 @@ void test_vsseg7e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsseg7e16_v_u16mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_u16mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_u16m1( @@ -85,7 +85,7 @@ void test_vsseg7e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsseg7e16_v_u16m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_u16m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_f16mf4_m( @@ -94,7 +94,7 @@ void test_vsseg7e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsseg7e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_f16mf2_m( @@ -103,7 +103,7 @@ void test_vsseg7e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsseg7e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_f16m1_m( @@ -112,7 +112,7 @@ void test_vsseg7e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsseg7e16_v_f16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_f16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_i16mf4_m( @@ -121,7 +121,7 @@ void test_vsseg7e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsseg7e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_i16mf2_m( @@ -130,7 +130,7 @@ void test_vsseg7e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsseg7e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_i16m1_m( @@ -139,7 +139,7 @@ void test_vsseg7e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsseg7e16_v_i16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_i16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_u16mf4_m( @@ -148,7 +148,7 @@ void test_vsseg7e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsseg7e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_u16mf2_m( @@ -157,7 +157,7 @@ void test_vsseg7e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsseg7e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e16_v_u16m1_m( @@ -166,6 +166,6 @@ void test_vsseg7e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg7e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsseg7e16_v_u16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e16_v_u16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e32.c index af7943265ad2dc48adf4b738f9d6efcd561eebc6..4e6183eb2512e33259b295039268d4f44040dadb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsseg7e32_v_f32mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_f32mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vsseg7e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsseg7e32_v_f32m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_f32m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_i32mf2( @@ -31,7 +31,7 @@ void test_vsseg7e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsseg7e32_v_i32mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_i32mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_i32m1( @@ -40,7 +40,7 @@ void test_vsseg7e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsseg7e32_v_i32m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_i32m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_u32mf2( @@ -49,7 +49,7 @@ void test_vsseg7e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsseg7e32_v_u32mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_u32mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_u32m1( @@ -58,7 +58,7 @@ void test_vsseg7e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsseg7e32_v_u32m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_u32m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_f32mf2_m( @@ -67,7 +67,7 @@ void test_vsseg7e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsseg7e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_f32m1_m( @@ -76,7 +76,7 @@ void test_vsseg7e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsseg7e32_v_f32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_f32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_i32mf2_m( @@ -85,7 +85,7 @@ void test_vsseg7e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsseg7e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_i32m1_m( @@ -94,7 +94,7 @@ void test_vsseg7e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsseg7e32_v_i32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_i32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_u32mf2_m( @@ -103,7 +103,7 @@ void test_vsseg7e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsseg7e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e32_v_u32m1_m( @@ -112,6 +112,6 @@ void test_vsseg7e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg7e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsseg7e32_v_u32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e32_v_u32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e64.c index b482b7471253c5344f72459821a7159696281566..db60857eb64f27006402f7b50924083639333393 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg7e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsseg7e64_v_f64m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e64_v_f64m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e64_v_i64m1( @@ -22,7 +22,7 @@ void test_vsseg7e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg7e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsseg7e64_v_i64m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e64_v_i64m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e64_v_u64m1( @@ -31,7 +31,7 @@ void test_vsseg7e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m // CHECK-RV64-NEXT: ret void // void test_vsseg7e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsseg7e64_v_u64m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e64_v_u64m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e64_v_f64m1_m( @@ -40,7 +40,7 @@ void test_vsseg7e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg7e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsseg7e64_v_f64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e64_v_f64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e64_v_i64m1_m( @@ -49,7 +49,7 @@ void test_vsseg7e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg7e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsseg7e64_v_i64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e64_v_i64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e64_v_u64m1_m( @@ -58,6 +58,6 @@ void test_vsseg7e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg7e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsseg7e64_v_u64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e64_v_u64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e8.c index 06a9af5e21da28467090a7dc8ef2cf617b17a18d..f1f4320791dc4d7bda00d86a94423b934e2fa8d4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg7e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsseg7e8_v_i8mf8(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_i8mf8(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vsseg7e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsseg7e8_v_i8mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_i8mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vsseg7e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsseg7e8_v_i8mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_i8mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vsseg7e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsseg7e8_v_i8m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_i8m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_u8mf8( @@ -48,7 +48,7 @@ void test_vsseg7e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2 // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsseg7e8_v_u8mf8(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_u8mf8(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_u8mf4( @@ -57,7 +57,7 @@ void test_vsseg7e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsseg7e8_v_u8mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_u8mf4(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_u8mf2( @@ -66,7 +66,7 @@ void test_vsseg7e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsseg7e8_v_u8mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_u8mf2(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_u8m1( @@ -75,7 +75,7 @@ void test_vsseg7e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsseg7e8_v_u8m1(base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_u8m1(base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_i8mf8_m( @@ -84,7 +84,7 @@ void test_vsseg7e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_ // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsseg7e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_i8mf4_m( @@ -93,7 +93,7 @@ void test_vsseg7e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsseg7e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_i8mf2_m( @@ -102,7 +102,7 @@ void test_vsseg7e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsseg7e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_i8m1_m( @@ -111,7 +111,7 @@ void test_vsseg7e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsseg7e8_v_i8m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_i8m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_u8mf8_m( @@ -120,7 +120,7 @@ void test_vsseg7e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsseg7e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_u8mf4_m( @@ -129,7 +129,7 @@ void test_vsseg7e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsseg7e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_u8mf2_m( @@ -138,7 +138,7 @@ void test_vsseg7e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsseg7e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsseg7e8_v_u8m1_m( @@ -147,6 +147,6 @@ void test_vsseg7e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg7e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsseg7e8_v_u8m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsseg7e8_v_u8m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c index 006215fc42c6d87a00352cf509f318b2bde2e365..4cdf2333c79476b3c91b03a2f26cb9d816b7e42e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsseg8e16_v_f16mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_f16mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsseg8e16_v_f16mf4(_Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsseg8e16_v_f16mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_f16mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsseg8e16_v_f16mf2(_Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsseg8e16_v_f16m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_f16m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_i16mf4( @@ -40,7 +40,7 @@ void test_vsseg8e16_v_f16m1(_Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsseg8e16_v_i16mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_i16mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_i16mf2( @@ -49,7 +49,7 @@ void test_vsseg8e16_v_i16mf4(int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsseg8e16_v_i16mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_i16mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_i16m1( @@ -58,7 +58,7 @@ void test_vsseg8e16_v_i16mf2(int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsseg8e16_v_i16m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_i16m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_u16mf4( @@ -67,7 +67,7 @@ void test_vsseg8e16_v_i16m1(int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsseg8e16_v_u16mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_u16mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_u16mf2( @@ -76,7 +76,7 @@ void test_vsseg8e16_v_u16mf4(uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsseg8e16_v_u16mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_u16mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_u16m1( @@ -85,7 +85,7 @@ void test_vsseg8e16_v_u16mf2(uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsseg8e16_v_u16m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_u16m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_f16mf4_m( @@ -94,7 +94,7 @@ void test_vsseg8e16_v_u16m1(uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsseg8e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_f16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_f16mf2_m( @@ -103,7 +103,7 @@ void test_vsseg8e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vfloat16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsseg8e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_f16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_f16m1_m( @@ -112,7 +112,7 @@ void test_vsseg8e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vfloat16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsseg8e16_v_f16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_f16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_i16mf4_m( @@ -121,7 +121,7 @@ void test_vsseg8e16_v_f16m1_m(vbool16_t mask, _Float16 *base, vfloat16m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsseg8e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_i16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_i16mf2_m( @@ -130,7 +130,7 @@ void test_vsseg8e16_v_i16mf4_m(vbool64_t mask, int16_t *base, vint16mf4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsseg8e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_i16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_i16m1_m( @@ -139,7 +139,7 @@ void test_vsseg8e16_v_i16mf2_m(vbool32_t mask, int16_t *base, vint16mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsseg8e16_v_i16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_i16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_u16mf4_m( @@ -148,7 +148,7 @@ void test_vsseg8e16_v_i16m1_m(vbool16_t mask, int16_t *base, vint16m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsseg8e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_u16mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_u16mf2_m( @@ -157,7 +157,7 @@ void test_vsseg8e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsseg8e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_u16mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e16_v_u16m1_m( @@ -166,6 +166,6 @@ void test_vsseg8e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg8e16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsseg8e16_v_u16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e16_v_u16m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e32.c index 40a24bff71ac5b39de64a1573736c8a06c6c0fc0..678cf567333a6414e93c043653639e4eef197cb3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsseg8e32_v_f32mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_f32mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vsseg8e32_v_f32mf2(float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vf // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsseg8e32_v_f32m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_f32m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_i32mf2( @@ -31,7 +31,7 @@ void test_vsseg8e32_v_f32m1(float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsseg8e32_v_i32mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_i32mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_i32m1( @@ -40,7 +40,7 @@ void test_vsseg8e32_v_i32mf2(int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsseg8e32_v_i32m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_i32m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_u32mf2( @@ -49,7 +49,7 @@ void test_vsseg8e32_v_i32m1(int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsseg8e32_v_u32mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_u32mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_u32m1( @@ -58,7 +58,7 @@ void test_vsseg8e32_v_u32mf2(uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, v // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsseg8e32_v_u32m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_u32m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_f32mf2_m( @@ -67,7 +67,7 @@ void test_vsseg8e32_v_u32m1(uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsseg8e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_f32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_f32m1_m( @@ -76,7 +76,7 @@ void test_vsseg8e32_v_f32mf2_m(vbool64_t mask, float *base, vfloat32mf2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsseg8e32_v_f32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_f32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_i32mf2_m( @@ -85,7 +85,7 @@ void test_vsseg8e32_v_f32m1_m(vbool32_t mask, float *base, vfloat32m1_t v0, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsseg8e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_i32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_i32m1_m( @@ -94,7 +94,7 @@ void test_vsseg8e32_v_i32mf2_m(vbool64_t mask, int32_t *base, vint32mf2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsseg8e32_v_i32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_i32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_u32mf2_m( @@ -103,7 +103,7 @@ void test_vsseg8e32_v_i32m1_m(vbool32_t mask, int32_t *base, vint32m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsseg8e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_u32mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e32_v_u32m1_m( @@ -112,6 +112,6 @@ void test_vsseg8e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsseg8e32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsseg8e32_v_u32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e32_v_u32m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e64.c index b16d98be478911f3e6c81ca013cdb4e20cd3e2c0..85a837a0c788f46ecf428cf8846a3cd766aeccb1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg8e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsseg8e64_v_f64m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e64_v_f64m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e64_v_i64m1( @@ -22,7 +22,7 @@ void test_vsseg8e64_v_f64m1(double *base, vfloat64m1_t v0, vfloat64m1_t v1, vflo // CHECK-RV64-NEXT: ret void // void test_vsseg8e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsseg8e64_v_i64m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e64_v_i64m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e64_v_u64m1( @@ -31,7 +31,7 @@ void test_vsseg8e64_v_i64m1(int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m // CHECK-RV64-NEXT: ret void // void test_vsseg8e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsseg8e64_v_u64m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e64_v_u64m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e64_v_f64m1_m( @@ -40,7 +40,7 @@ void test_vsseg8e64_v_u64m1(uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg8e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsseg8e64_v_f64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e64_v_f64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e64_v_i64m1_m( @@ -49,7 +49,7 @@ void test_vsseg8e64_v_f64m1_m(vbool64_t mask, double *base, vfloat64m1_t v0, vfl // CHECK-RV64-NEXT: ret void // void test_vsseg8e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsseg8e64_v_i64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e64_v_i64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e64_v_u64m1_m( @@ -58,6 +58,6 @@ void test_vsseg8e64_v_i64m1_m(vbool64_t mask, int64_t *base, vint64m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsseg8e64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsseg8e64_v_u64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e64_v_u64m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e8.c index 410a49cd96f5c27db0105d189cf31557615f69b6..9887306823ec046a18e71c634102a9555561ae06 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsseg8e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsseg8e8_v_i8mf8(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_i8mf8(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vsseg8e8_v_i8mf8(int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsseg8e8_v_i8mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_i8mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vsseg8e8_v_i8mf4(int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsseg8e8_v_i8mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_i8mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vsseg8e8_v_i8mf2(int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsseg8e8_v_i8m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_i8m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_u8mf8( @@ -48,7 +48,7 @@ void test_vsseg8e8_v_i8m1(int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2 // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsseg8e8_v_u8mf8(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_u8mf8(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_u8mf4( @@ -57,7 +57,7 @@ void test_vsseg8e8_v_u8mf8(uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsseg8e8_v_u8mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_u8mf4(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_u8mf2( @@ -66,7 +66,7 @@ void test_vsseg8e8_v_u8mf4(uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsseg8e8_v_u8mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_u8mf2(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_u8m1( @@ -75,7 +75,7 @@ void test_vsseg8e8_v_u8mf2(uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8 // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsseg8e8_v_u8m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_u8m1(base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_i8mf8_m( @@ -84,7 +84,7 @@ void test_vsseg8e8_v_u8m1(uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_ // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsseg8e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_i8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_i8mf4_m( @@ -93,7 +93,7 @@ void test_vsseg8e8_v_i8mf8_m(vbool64_t mask, int8_t *base, vint8mf8_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsseg8e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_i8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_i8mf2_m( @@ -102,7 +102,7 @@ void test_vsseg8e8_v_i8mf4_m(vbool32_t mask, int8_t *base, vint8mf4_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsseg8e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_i8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_i8m1_m( @@ -111,7 +111,7 @@ void test_vsseg8e8_v_i8mf2_m(vbool16_t mask, int8_t *base, vint8mf2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsseg8e8_v_i8m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_i8m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_u8mf8_m( @@ -120,7 +120,7 @@ void test_vsseg8e8_v_i8m1_m(vbool8_t mask, int8_t *base, vint8m1_t v0, vint8m1_t // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsseg8e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_u8mf8_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_u8mf4_m( @@ -129,7 +129,7 @@ void test_vsseg8e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsseg8e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_u8mf4_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_u8mf2_m( @@ -138,7 +138,7 @@ void test_vsseg8e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsseg8e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_u8mf2_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsseg8e8_v_u8m1_m( @@ -147,6 +147,6 @@ void test_vsseg8e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vsseg8e8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsseg8e8_v_u8m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsseg8e8_v_u8m1_m(mask, base, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssra.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssra.c index 5c7724641cf7b407f36e337ef23d46aff86033e7..43e55e98793d1af73b87b2d394ccc8dae5f7d7a9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssra.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssra.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssra_vv_i8mf8(op1, shift, vl); + return __riscv_vssra_vv_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vssra_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf8(op1, shift, vl); + return __riscv_vssra_vx_i8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vssra_vx_i8mf8(vint8mf8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssra_vv_i8mf4(op1, shift, vl); + return __riscv_vssra_vv_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vssra_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf4(op1, shift, vl); + return __riscv_vssra_vx_i8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vssra_vx_i8mf4(vint8mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssra_vv_i8mf2(op1, shift, vl); + return __riscv_vssra_vv_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vssra_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf2(op1, shift, vl); + return __riscv_vssra_vx_i8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vssra_vx_i8mf2(vint8mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssra_vv_i8m1(op1, shift, vl); + return __riscv_vssra_vv_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vssra_vv_i8m1(vint8m1_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m1(op1, shift, vl); + return __riscv_vssra_vx_i8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vssra_vx_i8m1(vint8m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssra_vv_i8m2(op1, shift, vl); + return __riscv_vssra_vv_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vssra_vv_i8m2(vint8m2_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m2(op1, shift, vl); + return __riscv_vssra_vx_i8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vssra_vx_i8m2(vint8m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssra_vv_i8m4(op1, shift, vl); + return __riscv_vssra_vv_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vssra_vv_i8m4(vint8m4_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m4(op1, shift, vl); + return __riscv_vssra_vx_i8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vssra_vx_i8m4(vint8m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vv_i8m8(vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssra_vv_i8m8(op1, shift, vl); + return __riscv_vssra_vv_i8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vssra_vv_i8m8(vint8m8_t op1, vuint8m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vx_i8m8(vint8m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m8(op1, shift, vl); + return __riscv_vssra_vx_i8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vssra_vx_i8m8(vint8m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssra_vv_i16mf4(op1, shift, vl); + return __riscv_vssra_vv_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vssra_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vx_i16mf4(vint16mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf4(op1, shift, vl); + return __riscv_vssra_vx_i16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vssra_vx_i16mf4(vint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssra_vv_i16mf2(op1, shift, vl); + return __riscv_vssra_vv_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vssra_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vx_i16mf2(vint16mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf2(op1, shift, vl); + return __riscv_vssra_vx_i16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vssra_vx_i16mf2(vint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vv_i16m1(vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssra_vv_i16m1(op1, shift, vl); + return __riscv_vssra_vv_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vssra_vv_i16m1(vint16m1_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vx_i16m1(vint16m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m1(op1, shift, vl); + return __riscv_vssra_vx_i16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vssra_vx_i16m1(vint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vv_i16m2(vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssra_vv_i16m2(op1, shift, vl); + return __riscv_vssra_vv_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vssra_vv_i16m2(vint16m2_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vx_i16m2(vint16m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m2(op1, shift, vl); + return __riscv_vssra_vx_i16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vssra_vx_i16m2(vint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vv_i16m4(vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssra_vv_i16m4(op1, shift, vl); + return __riscv_vssra_vv_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vssra_vv_i16m4(vint16m4_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vx_i16m4(vint16m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m4(op1, shift, vl); + return __riscv_vssra_vx_i16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vssra_vx_i16m4(vint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vv_i16m8(vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssra_vv_i16m8(op1, shift, vl); + return __riscv_vssra_vv_i16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vssra_vv_i16m8(vint16m8_t op1, vuint16m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vx_i16m8(vint16m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m8(op1, shift, vl); + return __riscv_vssra_vx_i16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vssra_vx_i16m8(vint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssra_vv_i32mf2(op1, shift, vl); + return __riscv_vssra_vv_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vssra_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t shift, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vx_i32mf2(vint32mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32mf2(op1, shift, vl); + return __riscv_vssra_vx_i32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vssra_vx_i32mf2(vint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vv_i32m1(vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssra_vv_i32m1(op1, shift, vl); + return __riscv_vssra_vv_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vssra_vv_i32m1(vint32m1_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vx_i32m1(vint32m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m1(op1, shift, vl); + return __riscv_vssra_vx_i32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vssra_vx_i32m1(vint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vv_i32m2(vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssra_vv_i32m2(op1, shift, vl); + return __riscv_vssra_vv_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vssra_vv_i32m2(vint32m2_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vx_i32m2(vint32m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m2(op1, shift, vl); + return __riscv_vssra_vx_i32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vssra_vx_i32m2(vint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vv_i32m4(vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssra_vv_i32m4(op1, shift, vl); + return __riscv_vssra_vv_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vssra_vv_i32m4(vint32m4_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vx_i32m4(vint32m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m4(op1, shift, vl); + return __riscv_vssra_vx_i32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vssra_vx_i32m4(vint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vv_i32m8(vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssra_vv_i32m8(op1, shift, vl); + return __riscv_vssra_vv_i32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vssra_vv_i32m8(vint32m8_t op1, vuint32m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vx_i32m8(vint32m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m8(op1, shift, vl); + return __riscv_vssra_vx_i32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vssra_vx_i32m8(vint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vv_i64m1(vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssra_vv_i64m1(op1, shift, vl); + return __riscv_vssra_vv_i64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vssra_vv_i64m1(vint64m1_t op1, vuint64m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vx_i64m1(vint64m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m1(op1, shift, vl); + return __riscv_vssra_vx_i64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vssra_vx_i64m1(vint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vv_i64m2(vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssra_vv_i64m2(op1, shift, vl); + return __riscv_vssra_vv_i64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vssra_vv_i64m2(vint64m2_t op1, vuint64m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vx_i64m2(vint64m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m2(op1, shift, vl); + return __riscv_vssra_vx_i64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vssra_vx_i64m2(vint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vv_i64m4(vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssra_vv_i64m4(op1, shift, vl); + return __riscv_vssra_vv_i64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vssra_vv_i64m4(vint64m4_t op1, vuint64m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vx_i64m4(vint64m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m4(op1, shift, vl); + return __riscv_vssra_vx_i64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vssra_vx_i64m4(vint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vv_i64m8(vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssra_vv_i64m8(op1, shift, vl); + return __riscv_vssra_vv_i64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vssra_vv_i64m8(vint64m8_t op1, vuint64m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vx_i64m8(vint64m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m8(op1, shift, vl); + return __riscv_vssra_vx_i64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vssra_vx_i64m8(vint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssra_vv_i8mf8_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vssra_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf8_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vssra_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssra_vv_i8mf4_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vssra_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf4_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vssra_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssra_vv_i8mf2_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vssra_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf2_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vssra_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssra_vv_i8m1_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vssra_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m1_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vssra_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t shift, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssra_vv_i8m2_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vssra_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m2_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vssra_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t shift, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssra_vv_i8m4_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vssra_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m4_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vssra_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t shift, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssra_vv_i8m8_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vssra_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m8_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vssra_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t shift, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssra_vv_i16mf4_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vssra_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf4_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vssra_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssra_vv_i16mf2_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vssra_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf2_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vssra_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssra_vv_i16m1_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vssra_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m1_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vssra_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssra_vv_i16m2_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vssra_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m2_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vssra_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssra_vv_i16m4_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vssra_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m4_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vssra_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssra_vv_i16m8_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vssra_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m8_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vssra_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssra_vv_i32mf2_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vssra_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32mf2_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vssra_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssra_vv_i32m1_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vssra_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m1_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vssra_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssra_vv_i32m2_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vssra_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m2_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vssra_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssra_vv_i32m4_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vssra_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m4_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vssra_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssra_vv_i32m8_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vssra_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m8_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vssra_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t shift, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssra_vv_i64m1_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vssra_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m1_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vssra_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssra_vv_i64m2_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vssra_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m2_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vssra_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssra_vv_i64m4_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vssra_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m4_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vssra_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t shift, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssra_vv_i64m8_m(mask, op1, shift, vl); + return __riscv_vssra_vv_i64m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vssra_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m8_m(mask, op1, shift, vl); + return __riscv_vssra_vx_i64m8_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssrl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssrl.c index 3ea9c30c86d10b6702d6cc585c6976753119126b..9ead80d30da061314f631bcd2e680f829e60f3bf 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssrl.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssrl.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssrl_vv_u8mf8(op1, shift, vl); + return __riscv_vssrl_vv_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vssrl_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf8(op1, shift, vl); + return __riscv_vssrl_vx_u8mf8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vssrl_vx_u8mf8(vuint8mf8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssrl_vv_u8mf4(op1, shift, vl); + return __riscv_vssrl_vv_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vssrl_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf4(op1, shift, vl); + return __riscv_vssrl_vx_u8mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vssrl_vx_u8mf4(vuint8mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssrl_vv_u8mf2(op1, shift, vl); + return __riscv_vssrl_vv_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vssrl_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf2(op1, shift, vl); + return __riscv_vssrl_vx_u8mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vssrl_vx_u8mf2(vuint8mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssrl_vv_u8m1(op1, shift, vl); + return __riscv_vssrl_vv_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vssrl_vv_u8m1(vuint8m1_t op1, vuint8m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m1(op1, shift, vl); + return __riscv_vssrl_vx_u8m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vssrl_vx_u8m1(vuint8m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssrl_vv_u8m2(op1, shift, vl); + return __riscv_vssrl_vv_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vssrl_vv_u8m2(vuint8m2_t op1, vuint8m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m2(op1, shift, vl); + return __riscv_vssrl_vx_u8m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vssrl_vx_u8m2(vuint8m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vv_u8m4(vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssrl_vv_u8m4(op1, shift, vl); + return __riscv_vssrl_vv_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vssrl_vv_u8m4(vuint8m4_t op1, vuint8m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m4(op1, shift, vl); + return __riscv_vssrl_vx_u8m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vssrl_vx_u8m4(vuint8m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vv_u8m8(vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssrl_vv_u8m8(op1, shift, vl); + return __riscv_vssrl_vv_u8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vssrl_vv_u8m8(vuint8m8_t op1, vuint8m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vx_u8m8(vuint8m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m8(op1, shift, vl); + return __riscv_vssrl_vx_u8m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vssrl_vx_u8m8(vuint8m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssrl_vv_u16mf4(op1, shift, vl); + return __riscv_vssrl_vv_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vssrl_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t shift, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vx_u16mf4(vuint16mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf4(op1, shift, vl); + return __riscv_vssrl_vx_u16mf4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vssrl_vx_u16mf4(vuint16mf4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssrl_vv_u16mf2(op1, shift, vl); + return __riscv_vssrl_vv_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vssrl_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t shift, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vx_u16mf2(vuint16mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf2(op1, shift, vl); + return __riscv_vssrl_vx_u16mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vssrl_vx_u16mf2(vuint16mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vv_u16m1(vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssrl_vv_u16m1(op1, shift, vl); + return __riscv_vssrl_vv_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vssrl_vv_u16m1(vuint16m1_t op1, vuint16m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vx_u16m1(vuint16m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m1(op1, shift, vl); + return __riscv_vssrl_vx_u16m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vssrl_vx_u16m1(vuint16m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vv_u16m2(vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssrl_vv_u16m2(op1, shift, vl); + return __riscv_vssrl_vv_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vssrl_vv_u16m2(vuint16m2_t op1, vuint16m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vx_u16m2(vuint16m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m2(op1, shift, vl); + return __riscv_vssrl_vx_u16m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vssrl_vx_u16m2(vuint16m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vv_u16m4(vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssrl_vv_u16m4(op1, shift, vl); + return __riscv_vssrl_vv_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vssrl_vv_u16m4(vuint16m4_t op1, vuint16m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vx_u16m4(vuint16m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m4(op1, shift, vl); + return __riscv_vssrl_vx_u16m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vssrl_vx_u16m4(vuint16m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vv_u16m8(vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssrl_vv_u16m8(op1, shift, vl); + return __riscv_vssrl_vv_u16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vssrl_vv_u16m8(vuint16m8_t op1, vuint16m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vx_u16m8(vuint16m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m8(op1, shift, vl); + return __riscv_vssrl_vx_u16m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vssrl_vx_u16m8(vuint16m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssrl_vv_u32mf2(op1, shift, vl); + return __riscv_vssrl_vv_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vssrl_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t shift, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vx_u32mf2(vuint32mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32mf2(op1, shift, vl); + return __riscv_vssrl_vx_u32mf2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vssrl_vx_u32mf2(vuint32mf2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vv_u32m1(vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssrl_vv_u32m1(op1, shift, vl); + return __riscv_vssrl_vv_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vssrl_vv_u32m1(vuint32m1_t op1, vuint32m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vx_u32m1(vuint32m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m1(op1, shift, vl); + return __riscv_vssrl_vx_u32m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vssrl_vx_u32m1(vuint32m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vv_u32m2(vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssrl_vv_u32m2(op1, shift, vl); + return __riscv_vssrl_vv_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vssrl_vv_u32m2(vuint32m2_t op1, vuint32m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vx_u32m2(vuint32m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m2(op1, shift, vl); + return __riscv_vssrl_vx_u32m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vssrl_vx_u32m2(vuint32m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vv_u32m4(vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssrl_vv_u32m4(op1, shift, vl); + return __riscv_vssrl_vv_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vssrl_vv_u32m4(vuint32m4_t op1, vuint32m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vx_u32m4(vuint32m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m4(op1, shift, vl); + return __riscv_vssrl_vx_u32m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vssrl_vx_u32m4(vuint32m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vv_u32m8(vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssrl_vv_u32m8(op1, shift, vl); + return __riscv_vssrl_vv_u32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vssrl_vv_u32m8(vuint32m8_t op1, vuint32m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vx_u32m8(vuint32m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m8(op1, shift, vl); + return __riscv_vssrl_vx_u32m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vssrl_vx_u32m8(vuint32m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vv_u64m1(vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssrl_vv_u64m1(op1, shift, vl); + return __riscv_vssrl_vv_u64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vssrl_vv_u64m1(vuint64m1_t op1, vuint64m1_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vx_u64m1(vuint64m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m1(op1, shift, vl); + return __riscv_vssrl_vx_u64m1(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vssrl_vx_u64m1(vuint64m1_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vv_u64m2(vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssrl_vv_u64m2(op1, shift, vl); + return __riscv_vssrl_vv_u64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vssrl_vv_u64m2(vuint64m2_t op1, vuint64m2_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vx_u64m2(vuint64m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m2(op1, shift, vl); + return __riscv_vssrl_vx_u64m2(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vssrl_vx_u64m2(vuint64m2_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vv_u64m4(vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssrl_vv_u64m4(op1, shift, vl); + return __riscv_vssrl_vv_u64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vssrl_vv_u64m4(vuint64m4_t op1, vuint64m4_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vx_u64m4(vuint64m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m4(op1, shift, vl); + return __riscv_vssrl_vx_u64m4(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vssrl_vx_u64m4(vuint64m4_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vv_u64m8(vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssrl_vv_u64m8(op1, shift, vl); + return __riscv_vssrl_vv_u64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vssrl_vv_u64m8(vuint64m8_t op1, vuint64m8_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vx_u64m8(vuint64m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m8(op1, shift, vl); + return __riscv_vssrl_vx_u64m8(op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vssrl_vx_u64m8(vuint64m8_t op1, size_t shift, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssrl_vv_u8mf8_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vssrl_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf8_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u8mf8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vssrl_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssrl_vv_u8mf4_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vssrl_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf4_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u8mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vssrl_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssrl_vv_u8mf2_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vssrl_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf2_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u8mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vssrl_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssrl_vv_u8m1_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vssrl_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m1_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u8m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vssrl_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssrl_vv_u8m2_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vssrl_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m2_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u8m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vssrl_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssrl_vv_u8m4_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vssrl_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m4_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u8m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vssrl_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssrl_vv_u8m8_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vssrl_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m8_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u8m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vssrl_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t shift, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssrl_vv_u16mf4_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vssrl_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf4_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u16mf4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vssrl_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssrl_vv_u16mf2_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vssrl_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf2_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u16mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vssrl_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssrl_vv_u16m1_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vssrl_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m1_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u16m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vssrl_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssrl_vv_u16m2_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vssrl_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m2_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u16m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vssrl_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssrl_vv_u16m4_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vssrl_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m4_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u16m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vssrl_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssrl_vv_u16m8_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vssrl_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m8_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u16m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vssrl_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssrl_vv_u32mf2_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vssrl_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32mf2_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u32mf2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vssrl_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssrl_vv_u32m1_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vssrl_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m1_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u32m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vssrl_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssrl_vv_u32m2_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vssrl_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m2_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u32m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vssrl_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssrl_vv_u32m4_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vssrl_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m4_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u32m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vssrl_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssrl_vv_u32m8_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vssrl_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m8_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u32m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vssrl_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssrl_vv_u64m1_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vssrl_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m1_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u64m1_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vssrl_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssrl_vv_u64m2_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vssrl_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m2_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u64m2_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vssrl_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssrl_vv_u64m4_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vssrl_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m4_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u64m4_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vssrl_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssrl_vv_u64m8_m(mask, op1, shift, vl); + return __riscv_vssrl_vv_u64m8_m(mask, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vssrl_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m8_m(mask, op1, shift, vl); + return __riscv_vssrl_vx_u64m8_m(mask, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c index cc4637d9fcb0b179dc6e31642036624626268917..849db6cf4b63213deffbf80ab3958898c249db98 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vssseg2e16_v_f16mf4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16mf4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vssseg2e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vssseg2e16_v_f16mf2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16mf2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vssseg2e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vssseg2e16_v_f16m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16m2( @@ -40,7 +40,7 @@ void test_vssseg2e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16m2(_Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vssseg2e16_v_f16m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16m4( @@ -49,7 +49,7 @@ void test_vssseg2e16_v_f16m2(_Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16m4(_Float16 *base, ptrdiff_t bstride, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vssseg2e16_v_f16m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16mf4( @@ -58,7 +58,7 @@ void test_vssseg2e16_v_f16m4(_Float16 *base, ptrdiff_t bstride, vfloat16m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vssseg2e16_v_i16mf4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16mf4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16mf2( @@ -67,7 +67,7 @@ void test_vssseg2e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vssseg2e16_v_i16mf2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16mf2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16m1( @@ -76,7 +76,7 @@ void test_vssseg2e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vssseg2e16_v_i16m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16m2( @@ -85,7 +85,7 @@ void test_vssseg2e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16m2(int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vssseg2e16_v_i16m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16m4( @@ -94,7 +94,7 @@ void test_vssseg2e16_v_i16m2(int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16m4(int16_t *base, ptrdiff_t bstride, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vssseg2e16_v_i16m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16mf4( @@ -103,7 +103,7 @@ void test_vssseg2e16_v_i16m4(int16_t *base, ptrdiff_t bstride, vint16m4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vssseg2e16_v_u16mf4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16mf4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16mf2( @@ -112,7 +112,7 @@ void test_vssseg2e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vssseg2e16_v_u16mf2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16mf2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16m1( @@ -121,7 +121,7 @@ void test_vssseg2e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vssseg2e16_v_u16m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16m2( @@ -130,7 +130,7 @@ void test_vssseg2e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16m2(uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vssseg2e16_v_u16m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16m4( @@ -139,7 +139,7 @@ void test_vssseg2e16_v_u16m2(uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16m4(uint16_t *base, ptrdiff_t bstride, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vssseg2e16_v_u16m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16mf4_m( @@ -148,7 +148,7 @@ void test_vssseg2e16_v_u16m4(uint16_t *base, ptrdiff_t bstride, vuint16m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vssseg2e16_v_f16mf4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16mf4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16mf2_m( @@ -157,7 +157,7 @@ void test_vssseg2e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vssseg2e16_v_f16mf2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16mf2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16m1_m( @@ -166,7 +166,7 @@ void test_vssseg2e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vssseg2e16_v_f16m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16m2_m( @@ -175,7 +175,7 @@ void test_vssseg2e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16m2_m(vbool8_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vssseg2e16_v_f16m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_f16m4_m( @@ -184,7 +184,7 @@ void test_vssseg2e16_v_f16m2_m(vbool8_t mask, _Float16 *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_f16m4_m(vbool4_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vssseg2e16_v_f16m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_f16m4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16mf4_m( @@ -193,7 +193,7 @@ void test_vssseg2e16_v_f16m4_m(vbool4_t mask, _Float16 *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vssseg2e16_v_i16mf4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16mf4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16mf2_m( @@ -202,7 +202,7 @@ void test_vssseg2e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vssseg2e16_v_i16mf2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16mf2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16m1_m( @@ -211,7 +211,7 @@ void test_vssseg2e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vssseg2e16_v_i16m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16m2_m( @@ -220,7 +220,7 @@ void test_vssseg2e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16m2_m(vbool8_t mask, int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vssseg2e16_v_i16m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_i16m4_m( @@ -229,7 +229,7 @@ void test_vssseg2e16_v_i16m2_m(vbool8_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_i16m4_m(vbool4_t mask, int16_t *base, ptrdiff_t bstride, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vssseg2e16_v_i16m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_i16m4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16mf4_m( @@ -238,7 +238,7 @@ void test_vssseg2e16_v_i16m4_m(vbool4_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vssseg2e16_v_u16mf4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16mf4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16mf2_m( @@ -247,7 +247,7 @@ void test_vssseg2e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vssseg2e16_v_u16mf2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16mf2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16m1_m( @@ -256,7 +256,7 @@ void test_vssseg2e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vssseg2e16_v_u16m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16m2_m( @@ -265,7 +265,7 @@ void test_vssseg2e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16m2_m(vbool8_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vssseg2e16_v_u16m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e16_v_u16m4_m( @@ -274,6 +274,6 @@ void test_vssseg2e16_v_u16m2_m(vbool8_t mask, uint16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e16_v_u16m4_m(vbool4_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vssseg2e16_v_u16m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e16_v_u16m4_m(mask, base, bstride, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32.c index 6c021e4a82c8673ae8f480b3b37b83be5d626d40..d421bf71d6693a1bb43b031bccb0030bda05c479 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vssseg2e32_v_f32mf2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_f32mf2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vssseg2e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vssseg2e32_v_f32m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_f32m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_f32m2( @@ -31,7 +31,7 @@ void test_vssseg2e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_f32m2(float *base, ptrdiff_t bstride, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vssseg2e32_v_f32m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_f32m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_f32m4( @@ -40,7 +40,7 @@ void test_vssseg2e32_v_f32m2(float *base, ptrdiff_t bstride, vfloat32m2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_f32m4(float *base, ptrdiff_t bstride, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vssseg2e32_v_f32m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_f32m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_i32mf2( @@ -49,7 +49,7 @@ void test_vssseg2e32_v_f32m4(float *base, ptrdiff_t bstride, vfloat32m4_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vssseg2e32_v_i32mf2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_i32mf2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_i32m1( @@ -58,7 +58,7 @@ void test_vssseg2e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vssseg2e32_v_i32m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_i32m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_i32m2( @@ -67,7 +67,7 @@ void test_vssseg2e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_i32m2(int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vssseg2e32_v_i32m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_i32m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_i32m4( @@ -76,7 +76,7 @@ void test_vssseg2e32_v_i32m2(int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_i32m4(int32_t *base, ptrdiff_t bstride, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vssseg2e32_v_i32m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_i32m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_u32mf2( @@ -85,7 +85,7 @@ void test_vssseg2e32_v_i32m4(int32_t *base, ptrdiff_t bstride, vint32m4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vssseg2e32_v_u32mf2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_u32mf2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_u32m1( @@ -94,7 +94,7 @@ void test_vssseg2e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vssseg2e32_v_u32m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_u32m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_u32m2( @@ -103,7 +103,7 @@ void test_vssseg2e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_u32m2(uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vssseg2e32_v_u32m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_u32m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_u32m4( @@ -112,7 +112,7 @@ void test_vssseg2e32_v_u32m2(uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_u32m4(uint32_t *base, ptrdiff_t bstride, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vssseg2e32_v_u32m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_u32m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_f32mf2_m( @@ -121,7 +121,7 @@ void test_vssseg2e32_v_u32m4(uint32_t *base, ptrdiff_t bstride, vuint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vssseg2e32_v_f32mf2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_f32mf2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_f32m1_m( @@ -130,7 +130,7 @@ void test_vssseg2e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vssseg2e32_v_f32m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_f32m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_f32m2_m( @@ -139,7 +139,7 @@ void test_vssseg2e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_f32m2_m(vbool16_t mask, float *base, ptrdiff_t bstride, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vssseg2e32_v_f32m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_f32m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_f32m4_m( @@ -148,7 +148,7 @@ void test_vssseg2e32_v_f32m2_m(vbool16_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_f32m4_m(vbool8_t mask, float *base, ptrdiff_t bstride, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vssseg2e32_v_f32m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_f32m4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_i32mf2_m( @@ -157,7 +157,7 @@ void test_vssseg2e32_v_f32m4_m(vbool8_t mask, float *base, ptrdiff_t bstride, vf // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vssseg2e32_v_i32mf2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_i32mf2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_i32m1_m( @@ -166,7 +166,7 @@ void test_vssseg2e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vssseg2e32_v_i32m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_i32m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_i32m2_m( @@ -175,7 +175,7 @@ void test_vssseg2e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_i32m2_m(vbool16_t mask, int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vssseg2e32_v_i32m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_i32m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_i32m4_m( @@ -184,7 +184,7 @@ void test_vssseg2e32_v_i32m2_m(vbool16_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_i32m4_m(vbool8_t mask, int32_t *base, ptrdiff_t bstride, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vssseg2e32_v_i32m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_i32m4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_u32mf2_m( @@ -193,7 +193,7 @@ void test_vssseg2e32_v_i32m4_m(vbool8_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vssseg2e32_v_u32mf2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_u32mf2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_u32m1_m( @@ -202,7 +202,7 @@ void test_vssseg2e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vssseg2e32_v_u32m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_u32m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_u32m2_m( @@ -211,7 +211,7 @@ void test_vssseg2e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_u32m2_m(vbool16_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vssseg2e32_v_u32m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_u32m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e32_v_u32m4_m( @@ -220,6 +220,6 @@ void test_vssseg2e32_v_u32m2_m(vbool16_t mask, uint32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e32_v_u32m4_m(vbool8_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vssseg2e32_v_u32m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e32_v_u32m4_m(mask, base, bstride, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e64.c index a4fb9e9803bbcbba5194aa0125f58c1a36412df0..da19da319bff10908ce1c20054cdc8a7031bf0d0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vssseg2e64_v_f64m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_f64m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_f64m2( @@ -22,7 +22,7 @@ void test_vssseg2e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_f64m2(double *base, ptrdiff_t bstride, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vssseg2e64_v_f64m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_f64m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_f64m4( @@ -31,7 +31,7 @@ void test_vssseg2e64_v_f64m2(double *base, ptrdiff_t bstride, vfloat64m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_f64m4(double *base, ptrdiff_t bstride, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vssseg2e64_v_f64m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_f64m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_i64m1( @@ -40,7 +40,7 @@ void test_vssseg2e64_v_f64m4(double *base, ptrdiff_t bstride, vfloat64m4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vssseg2e64_v_i64m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_i64m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_i64m2( @@ -49,7 +49,7 @@ void test_vssseg2e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_i64m2(int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vssseg2e64_v_i64m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_i64m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_i64m4( @@ -58,7 +58,7 @@ void test_vssseg2e64_v_i64m2(int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_i64m4(int64_t *base, ptrdiff_t bstride, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vssseg2e64_v_i64m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_i64m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_u64m1( @@ -67,7 +67,7 @@ void test_vssseg2e64_v_i64m4(int64_t *base, ptrdiff_t bstride, vint64m4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vssseg2e64_v_u64m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_u64m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_u64m2( @@ -76,7 +76,7 @@ void test_vssseg2e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_u64m2(uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vssseg2e64_v_u64m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_u64m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_u64m4( @@ -85,7 +85,7 @@ void test_vssseg2e64_v_u64m2(uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_u64m4(uint64_t *base, ptrdiff_t bstride, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vssseg2e64_v_u64m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_u64m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_f64m1_m( @@ -94,7 +94,7 @@ void test_vssseg2e64_v_u64m4(uint64_t *base, ptrdiff_t bstride, vuint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vssseg2e64_v_f64m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_f64m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_f64m2_m( @@ -103,7 +103,7 @@ void test_vssseg2e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_f64m2_m(vbool32_t mask, double *base, ptrdiff_t bstride, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vssseg2e64_v_f64m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_f64m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_f64m4_m( @@ -112,7 +112,7 @@ void test_vssseg2e64_v_f64m2_m(vbool32_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_f64m4_m(vbool16_t mask, double *base, ptrdiff_t bstride, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vssseg2e64_v_f64m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_f64m4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_i64m1_m( @@ -121,7 +121,7 @@ void test_vssseg2e64_v_f64m4_m(vbool16_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vssseg2e64_v_i64m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_i64m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_i64m2_m( @@ -130,7 +130,7 @@ void test_vssseg2e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_i64m2_m(vbool32_t mask, int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vssseg2e64_v_i64m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_i64m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_i64m4_m( @@ -139,7 +139,7 @@ void test_vssseg2e64_v_i64m2_m(vbool32_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_i64m4_m(vbool16_t mask, int64_t *base, ptrdiff_t bstride, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vssseg2e64_v_i64m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_i64m4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_u64m1_m( @@ -148,7 +148,7 @@ void test_vssseg2e64_v_i64m4_m(vbool16_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vssseg2e64_v_u64m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_u64m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_u64m2_m( @@ -157,7 +157,7 @@ void test_vssseg2e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_u64m2_m(vbool32_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vssseg2e64_v_u64m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_u64m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e64_v_u64m4_m( @@ -166,6 +166,6 @@ void test_vssseg2e64_v_u64m2_m(vbool32_t mask, uint64_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg2e64_v_u64m4_m(vbool16_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vssseg2e64_v_u64m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e64_v_u64m4_m(mask, base, bstride, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e8.c index 3a5e4a2f9d009ff00e1a08540fb884c684476b51..3473fb682495cb3c7e1bc0da28389c0c6e19c2cc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg2e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vssseg2e8_v_i8mf8(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8mf8(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vssseg2e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vssseg2e8_v_i8mf4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8mf4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vssseg2e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vssseg2e8_v_i8mf2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8mf2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vssseg2e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vssseg2e8_v_i8m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8m2( @@ -48,7 +48,7 @@ void test_vssseg2e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vssseg2e8_v_i8m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8m4( @@ -57,7 +57,7 @@ void test_vssseg2e8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8m4(int8_t *base, ptrdiff_t bstride, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vssseg2e8_v_i8m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8mf8( @@ -66,7 +66,7 @@ void test_vssseg2e8_v_i8m4(int8_t *base, ptrdiff_t bstride, vint8m4_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vssseg2e8_v_u8mf8(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8mf8(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8mf4( @@ -75,7 +75,7 @@ void test_vssseg2e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vssseg2e8_v_u8mf4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8mf4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8mf2( @@ -84,7 +84,7 @@ void test_vssseg2e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vssseg2e8_v_u8mf2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8mf2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8m1( @@ -93,7 +93,7 @@ void test_vssseg2e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vssseg2e8_v_u8m1(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8m1(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8m2( @@ -102,7 +102,7 @@ void test_vssseg2e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vssseg2e8_v_u8m2(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8m2(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8m4( @@ -111,7 +111,7 @@ void test_vssseg2e8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8m4(uint8_t *base, ptrdiff_t bstride, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vssseg2e8_v_u8m4(base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8m4(base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8mf8_m( @@ -120,7 +120,7 @@ void test_vssseg2e8_v_u8m4(uint8_t *base, ptrdiff_t bstride, vuint8m4_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vssseg2e8_v_i8mf8_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8mf8_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8mf4_m( @@ -129,7 +129,7 @@ void test_vssseg2e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vssseg2e8_v_i8mf4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8mf4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8mf2_m( @@ -138,7 +138,7 @@ void test_vssseg2e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vssseg2e8_v_i8mf2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8mf2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8m1_m( @@ -147,7 +147,7 @@ void test_vssseg2e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vssseg2e8_v_i8m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8m2_m( @@ -156,7 +156,7 @@ void test_vssseg2e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vssseg2e8_v_i8m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_i8m4_m( @@ -165,7 +165,7 @@ void test_vssseg2e8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_i8m4_m(vbool2_t mask, int8_t *base, ptrdiff_t bstride, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vssseg2e8_v_i8m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_i8m4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8mf8_m( @@ -174,7 +174,7 @@ void test_vssseg2e8_v_i8m4_m(vbool2_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vssseg2e8_v_u8mf8_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8mf8_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8mf4_m( @@ -183,7 +183,7 @@ void test_vssseg2e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vssseg2e8_v_u8mf4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8mf4_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8mf2_m( @@ -192,7 +192,7 @@ void test_vssseg2e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vssseg2e8_v_u8mf2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8mf2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8m1_m( @@ -201,7 +201,7 @@ void test_vssseg2e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vssseg2e8_v_u8m1_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8m1_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8m2_m( @@ -210,7 +210,7 @@ void test_vssseg2e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8m2_m(vbool4_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vssseg2e8_v_u8m2_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8m2_m(mask, base, bstride, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vssseg2e8_v_u8m4_m( @@ -219,6 +219,6 @@ void test_vssseg2e8_v_u8m2_m(vbool4_t mask, uint8_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vssseg2e8_v_u8m4_m(vbool2_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vssseg2e8_v_u8m4_m(mask, base, bstride, v0, v1, vl); + return __riscv_vssseg2e8_v_u8m4_m(mask, base, bstride, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c index a4cb9231f71686776ea4c39565c052a5905286f8..7700a16da917f7544c51a47300e29c255738eb74 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vssseg3e16_v_f16mf4(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_f16mf4(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vssseg3e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vssseg3e16_v_f16mf2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_f16mf2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vssseg3e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vssseg3e16_v_f16m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_f16m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_f16m2( @@ -40,7 +40,7 @@ void test_vssseg3e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_f16m2(_Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vssseg3e16_v_f16m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_f16m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_i16mf4( @@ -49,7 +49,7 @@ void test_vssseg3e16_v_f16m2(_Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vssseg3e16_v_i16mf4(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_i16mf4(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_i16mf2( @@ -58,7 +58,7 @@ void test_vssseg3e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vssseg3e16_v_i16mf2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_i16mf2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_i16m1( @@ -67,7 +67,7 @@ void test_vssseg3e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vssseg3e16_v_i16m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_i16m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_i16m2( @@ -76,7 +76,7 @@ void test_vssseg3e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_i16m2(int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vssseg3e16_v_i16m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_i16m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_u16mf4( @@ -85,7 +85,7 @@ void test_vssseg3e16_v_i16m2(int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vssseg3e16_v_u16mf4(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_u16mf4(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_u16mf2( @@ -94,7 +94,7 @@ void test_vssseg3e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vssseg3e16_v_u16mf2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_u16mf2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_u16m1( @@ -103,7 +103,7 @@ void test_vssseg3e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vssseg3e16_v_u16m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_u16m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_u16m2( @@ -112,7 +112,7 @@ void test_vssseg3e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_u16m2(uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vssseg3e16_v_u16m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_u16m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_f16mf4_m( @@ -121,7 +121,7 @@ void test_vssseg3e16_v_u16m2(uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vssseg3e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_f16mf2_m( @@ -130,7 +130,7 @@ void test_vssseg3e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vssseg3e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_f16m1_m( @@ -139,7 +139,7 @@ void test_vssseg3e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vssseg3e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_f16m2_m( @@ -148,7 +148,7 @@ void test_vssseg3e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_f16m2_m(vbool8_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vssseg3e16_v_f16m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_f16m2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_i16mf4_m( @@ -157,7 +157,7 @@ void test_vssseg3e16_v_f16m2_m(vbool8_t mask, _Float16 *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vssseg3e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_i16mf2_m( @@ -166,7 +166,7 @@ void test_vssseg3e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vssseg3e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_i16m1_m( @@ -175,7 +175,7 @@ void test_vssseg3e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vssseg3e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_i16m2_m( @@ -184,7 +184,7 @@ void test_vssseg3e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_i16m2_m(vbool8_t mask, int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vssseg3e16_v_i16m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_i16m2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_u16mf4_m( @@ -193,7 +193,7 @@ void test_vssseg3e16_v_i16m2_m(vbool8_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vssseg3e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_u16mf2_m( @@ -202,7 +202,7 @@ void test_vssseg3e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vssseg3e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_u16m1_m( @@ -211,7 +211,7 @@ void test_vssseg3e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vssseg3e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e16_v_u16m2_m( @@ -220,6 +220,6 @@ void test_vssseg3e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg3e16_v_u16m2_m(vbool8_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vssseg3e16_v_u16m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e16_v_u16m2_m(mask, base, bstride, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e32.c index baeaf7371861a363610e3205005c924e97f9d14a..0318f55e1b26858e54b9b23e0f4645dfce250929 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vssseg3e32_v_f32mf2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_f32mf2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vssseg3e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vssseg3e32_v_f32m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_f32m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_f32m2( @@ -31,7 +31,7 @@ void test_vssseg3e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_f32m2(float *base, ptrdiff_t bstride, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vssseg3e32_v_f32m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_f32m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_i32mf2( @@ -40,7 +40,7 @@ void test_vssseg3e32_v_f32m2(float *base, ptrdiff_t bstride, vfloat32m2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vssseg3e32_v_i32mf2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_i32mf2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_i32m1( @@ -49,7 +49,7 @@ void test_vssseg3e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vssseg3e32_v_i32m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_i32m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_i32m2( @@ -58,7 +58,7 @@ void test_vssseg3e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_i32m2(int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vssseg3e32_v_i32m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_i32m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_u32mf2( @@ -67,7 +67,7 @@ void test_vssseg3e32_v_i32m2(int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vssseg3e32_v_u32mf2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_u32mf2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_u32m1( @@ -76,7 +76,7 @@ void test_vssseg3e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vssseg3e32_v_u32m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_u32m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_u32m2( @@ -85,7 +85,7 @@ void test_vssseg3e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_u32m2(uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vssseg3e32_v_u32m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_u32m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_f32mf2_m( @@ -94,7 +94,7 @@ void test_vssseg3e32_v_u32m2(uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vssseg3e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_f32m1_m( @@ -103,7 +103,7 @@ void test_vssseg3e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vssseg3e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_f32m2_m( @@ -112,7 +112,7 @@ void test_vssseg3e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_f32m2_m(vbool16_t mask, float *base, ptrdiff_t bstride, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vssseg3e32_v_f32m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_f32m2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_i32mf2_m( @@ -121,7 +121,7 @@ void test_vssseg3e32_v_f32m2_m(vbool16_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vssseg3e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_i32m1_m( @@ -130,7 +130,7 @@ void test_vssseg3e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vssseg3e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_i32m2_m( @@ -139,7 +139,7 @@ void test_vssseg3e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_i32m2_m(vbool16_t mask, int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vssseg3e32_v_i32m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_i32m2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_u32mf2_m( @@ -148,7 +148,7 @@ void test_vssseg3e32_v_i32m2_m(vbool16_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vssseg3e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_u32m1_m( @@ -157,7 +157,7 @@ void test_vssseg3e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vssseg3e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e32_v_u32m2_m( @@ -166,6 +166,6 @@ void test_vssseg3e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg3e32_v_u32m2_m(vbool16_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vssseg3e32_v_u32m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e32_v_u32m2_m(mask, base, bstride, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e64.c index 4910e3bce02ee849895d772437224462689f1653..66571a3013ef5d1a7009ae49a935ffd92783b428 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vssseg3e64_v_f64m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_f64m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_f64m2( @@ -22,7 +22,7 @@ void test_vssseg3e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_f64m2(double *base, ptrdiff_t bstride, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vssseg3e64_v_f64m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_f64m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_i64m1( @@ -31,7 +31,7 @@ void test_vssseg3e64_v_f64m2(double *base, ptrdiff_t bstride, vfloat64m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vssseg3e64_v_i64m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_i64m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_i64m2( @@ -40,7 +40,7 @@ void test_vssseg3e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_i64m2(int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vssseg3e64_v_i64m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_i64m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_u64m1( @@ -49,7 +49,7 @@ void test_vssseg3e64_v_i64m2(int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vssseg3e64_v_u64m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_u64m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_u64m2( @@ -58,7 +58,7 @@ void test_vssseg3e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_u64m2(uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vssseg3e64_v_u64m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_u64m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_f64m1_m( @@ -67,7 +67,7 @@ void test_vssseg3e64_v_u64m2(uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vssseg3e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_f64m2_m( @@ -76,7 +76,7 @@ void test_vssseg3e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_f64m2_m(vbool32_t mask, double *base, ptrdiff_t bstride, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vssseg3e64_v_f64m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_f64m2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_i64m1_m( @@ -85,7 +85,7 @@ void test_vssseg3e64_v_f64m2_m(vbool32_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vssseg3e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_i64m2_m( @@ -94,7 +94,7 @@ void test_vssseg3e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_i64m2_m(vbool32_t mask, int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vssseg3e64_v_i64m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_i64m2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_u64m1_m( @@ -103,7 +103,7 @@ void test_vssseg3e64_v_i64m2_m(vbool32_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vssseg3e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e64_v_u64m2_m( @@ -112,6 +112,6 @@ void test_vssseg3e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg3e64_v_u64m2_m(vbool32_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vssseg3e64_v_u64m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e64_v_u64m2_m(mask, base, bstride, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e8.c index 2ef34c68063be664dfad5c878516d64ef01c6ab9..d2dcf9c83e02fc8fa918772af9c09cf27b11245a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg3e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vssseg3e8_v_i8mf8(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8mf8(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vssseg3e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vssseg3e8_v_i8mf4(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8mf4(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vssseg3e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vssseg3e8_v_i8mf2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8mf2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vssseg3e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vssseg3e8_v_i8m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8m2( @@ -48,7 +48,7 @@ void test_vssseg3e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vssseg3e8_v_i8m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8mf8( @@ -57,7 +57,7 @@ void test_vssseg3e8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vssseg3e8_v_u8mf8(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8mf8(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8mf4( @@ -66,7 +66,7 @@ void test_vssseg3e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vssseg3e8_v_u8mf4(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8mf4(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8mf2( @@ -75,7 +75,7 @@ void test_vssseg3e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vssseg3e8_v_u8mf2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8mf2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8m1( @@ -84,7 +84,7 @@ void test_vssseg3e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vssseg3e8_v_u8m1(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8m1(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8m2( @@ -93,7 +93,7 @@ void test_vssseg3e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vssseg3e8_v_u8m2(base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8m2(base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8mf8_m( @@ -102,7 +102,7 @@ void test_vssseg3e8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vssseg3e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8mf4_m( @@ -111,7 +111,7 @@ void test_vssseg3e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vssseg3e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8mf2_m( @@ -120,7 +120,7 @@ void test_vssseg3e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vssseg3e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8m1_m( @@ -129,7 +129,7 @@ void test_vssseg3e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vssseg3e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_i8m2_m( @@ -138,7 +138,7 @@ void test_vssseg3e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vssseg3e8_v_i8m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_i8m2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8mf8_m( @@ -147,7 +147,7 @@ void test_vssseg3e8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vssseg3e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8mf4_m( @@ -156,7 +156,7 @@ void test_vssseg3e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vssseg3e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8mf2_m( @@ -165,7 +165,7 @@ void test_vssseg3e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vssseg3e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8m1_m( @@ -174,7 +174,7 @@ void test_vssseg3e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vssseg3e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vssseg3e8_v_u8m2_m( @@ -183,6 +183,6 @@ void test_vssseg3e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vssseg3e8_v_u8m2_m(vbool4_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vssseg3e8_v_u8m2_m(mask, base, bstride, v0, v1, v2, vl); + return __riscv_vssseg3e8_v_u8m2_m(mask, base, bstride, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c index 05c281227f49ad3b9dff48b410299ee9d89f657b..9fd720cae67afa961cba2e880b37ed1036831900 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vssseg4e16_v_f16mf4(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_f16mf4(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vssseg4e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vssseg4e16_v_f16mf2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_f16mf2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vssseg4e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vssseg4e16_v_f16m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_f16m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_f16m2( @@ -40,7 +40,7 @@ void test_vssseg4e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_f16m2(_Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vssseg4e16_v_f16m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_f16m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_i16mf4( @@ -49,7 +49,7 @@ void test_vssseg4e16_v_f16m2(_Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vssseg4e16_v_i16mf4(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_i16mf4(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_i16mf2( @@ -58,7 +58,7 @@ void test_vssseg4e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vssseg4e16_v_i16mf2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_i16mf2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_i16m1( @@ -67,7 +67,7 @@ void test_vssseg4e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vssseg4e16_v_i16m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_i16m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_i16m2( @@ -76,7 +76,7 @@ void test_vssseg4e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_i16m2(int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vssseg4e16_v_i16m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_i16m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_u16mf4( @@ -85,7 +85,7 @@ void test_vssseg4e16_v_i16m2(int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vssseg4e16_v_u16mf4(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_u16mf4(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_u16mf2( @@ -94,7 +94,7 @@ void test_vssseg4e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vssseg4e16_v_u16mf2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_u16mf2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_u16m1( @@ -103,7 +103,7 @@ void test_vssseg4e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vssseg4e16_v_u16m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_u16m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_u16m2( @@ -112,7 +112,7 @@ void test_vssseg4e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_u16m2(uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vssseg4e16_v_u16m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_u16m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_f16mf4_m( @@ -121,7 +121,7 @@ void test_vssseg4e16_v_u16m2(uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vssseg4e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_f16mf2_m( @@ -130,7 +130,7 @@ void test_vssseg4e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vssseg4e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_f16m1_m( @@ -139,7 +139,7 @@ void test_vssseg4e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vssseg4e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_f16m2_m( @@ -148,7 +148,7 @@ void test_vssseg4e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_f16m2_m(vbool8_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vssseg4e16_v_f16m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_f16m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_i16mf4_m( @@ -157,7 +157,7 @@ void test_vssseg4e16_v_f16m2_m(vbool8_t mask, _Float16 *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vssseg4e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_i16mf2_m( @@ -166,7 +166,7 @@ void test_vssseg4e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vssseg4e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_i16m1_m( @@ -175,7 +175,7 @@ void test_vssseg4e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vssseg4e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_i16m2_m( @@ -184,7 +184,7 @@ void test_vssseg4e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_i16m2_m(vbool8_t mask, int16_t *base, ptrdiff_t bstride, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vssseg4e16_v_i16m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_i16m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_u16mf4_m( @@ -193,7 +193,7 @@ void test_vssseg4e16_v_i16m2_m(vbool8_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vssseg4e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_u16mf2_m( @@ -202,7 +202,7 @@ void test_vssseg4e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vssseg4e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_u16m1_m( @@ -211,7 +211,7 @@ void test_vssseg4e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vssseg4e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e16_v_u16m2_m( @@ -220,6 +220,6 @@ void test_vssseg4e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg4e16_v_u16m2_m(vbool8_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vssseg4e16_v_u16m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e16_v_u16m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e32.c index 810dd8ad793243a5ecc112df665ba8e39ec81a76..9fe084ef7eff188dfcf9b3fb642bfcf319e7715a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vssseg4e32_v_f32mf2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_f32mf2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vssseg4e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vssseg4e32_v_f32m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_f32m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_f32m2( @@ -31,7 +31,7 @@ void test_vssseg4e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_f32m2(float *base, ptrdiff_t bstride, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vssseg4e32_v_f32m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_f32m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_i32mf2( @@ -40,7 +40,7 @@ void test_vssseg4e32_v_f32m2(float *base, ptrdiff_t bstride, vfloat32m2_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vssseg4e32_v_i32mf2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_i32mf2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_i32m1( @@ -49,7 +49,7 @@ void test_vssseg4e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vssseg4e32_v_i32m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_i32m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_i32m2( @@ -58,7 +58,7 @@ void test_vssseg4e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_i32m2(int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vssseg4e32_v_i32m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_i32m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_u32mf2( @@ -67,7 +67,7 @@ void test_vssseg4e32_v_i32m2(int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vssseg4e32_v_u32mf2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_u32mf2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_u32m1( @@ -76,7 +76,7 @@ void test_vssseg4e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vssseg4e32_v_u32m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_u32m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_u32m2( @@ -85,7 +85,7 @@ void test_vssseg4e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_u32m2(uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vssseg4e32_v_u32m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_u32m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_f32mf2_m( @@ -94,7 +94,7 @@ void test_vssseg4e32_v_u32m2(uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vssseg4e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_f32m1_m( @@ -103,7 +103,7 @@ void test_vssseg4e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vssseg4e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_f32m2_m( @@ -112,7 +112,7 @@ void test_vssseg4e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_f32m2_m(vbool16_t mask, float *base, ptrdiff_t bstride, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vssseg4e32_v_f32m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_f32m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_i32mf2_m( @@ -121,7 +121,7 @@ void test_vssseg4e32_v_f32m2_m(vbool16_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vssseg4e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_i32m1_m( @@ -130,7 +130,7 @@ void test_vssseg4e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vssseg4e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_i32m2_m( @@ -139,7 +139,7 @@ void test_vssseg4e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_i32m2_m(vbool16_t mask, int32_t *base, ptrdiff_t bstride, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vssseg4e32_v_i32m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_i32m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_u32mf2_m( @@ -148,7 +148,7 @@ void test_vssseg4e32_v_i32m2_m(vbool16_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vssseg4e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_u32m1_m( @@ -157,7 +157,7 @@ void test_vssseg4e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vssseg4e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e32_v_u32m2_m( @@ -166,6 +166,6 @@ void test_vssseg4e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg4e32_v_u32m2_m(vbool16_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vssseg4e32_v_u32m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e32_v_u32m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e64.c index b41b96f805c0a061f485c0ff2d3c59b6cc49b07b..1a37521e2cfd2865a8e6dff097f0170b980293a9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vssseg4e64_v_f64m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_f64m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_f64m2( @@ -22,7 +22,7 @@ void test_vssseg4e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_f64m2(double *base, ptrdiff_t bstride, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vssseg4e64_v_f64m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_f64m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_i64m1( @@ -31,7 +31,7 @@ void test_vssseg4e64_v_f64m2(double *base, ptrdiff_t bstride, vfloat64m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vssseg4e64_v_i64m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_i64m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_i64m2( @@ -40,7 +40,7 @@ void test_vssseg4e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_i64m2(int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vssseg4e64_v_i64m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_i64m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_u64m1( @@ -49,7 +49,7 @@ void test_vssseg4e64_v_i64m2(int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vssseg4e64_v_u64m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_u64m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_u64m2( @@ -58,7 +58,7 @@ void test_vssseg4e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_u64m2(uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vssseg4e64_v_u64m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_u64m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_f64m1_m( @@ -67,7 +67,7 @@ void test_vssseg4e64_v_u64m2(uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vssseg4e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_f64m2_m( @@ -76,7 +76,7 @@ void test_vssseg4e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_f64m2_m(vbool32_t mask, double *base, ptrdiff_t bstride, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vssseg4e64_v_f64m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_f64m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_i64m1_m( @@ -85,7 +85,7 @@ void test_vssseg4e64_v_f64m2_m(vbool32_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vssseg4e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_i64m2_m( @@ -94,7 +94,7 @@ void test_vssseg4e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_i64m2_m(vbool32_t mask, int64_t *base, ptrdiff_t bstride, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vssseg4e64_v_i64m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_i64m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_u64m1_m( @@ -103,7 +103,7 @@ void test_vssseg4e64_v_i64m2_m(vbool32_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vssseg4e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e64_v_u64m2_m( @@ -112,6 +112,6 @@ void test_vssseg4e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg4e64_v_u64m2_m(vbool32_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vssseg4e64_v_u64m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e64_v_u64m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e8.c index 331f11a72c6a02702ecfb402f5aa313cc6928fbc..5b0b96a95148b1589e8c0ba9f0f91cdb1fc5df9b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg4e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vssseg4e8_v_i8mf8(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8mf8(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vssseg4e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vssseg4e8_v_i8mf4(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8mf4(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vssseg4e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vssseg4e8_v_i8mf2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8mf2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vssseg4e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vssseg4e8_v_i8m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8m2( @@ -48,7 +48,7 @@ void test_vssseg4e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vssseg4e8_v_i8m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8mf8( @@ -57,7 +57,7 @@ void test_vssseg4e8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vssseg4e8_v_u8mf8(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8mf8(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8mf4( @@ -66,7 +66,7 @@ void test_vssseg4e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vssseg4e8_v_u8mf4(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8mf4(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8mf2( @@ -75,7 +75,7 @@ void test_vssseg4e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vssseg4e8_v_u8mf2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8mf2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8m1( @@ -84,7 +84,7 @@ void test_vssseg4e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vssseg4e8_v_u8m1(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8m1(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8m2( @@ -93,7 +93,7 @@ void test_vssseg4e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vssseg4e8_v_u8m2(base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8m2(base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8mf8_m( @@ -102,7 +102,7 @@ void test_vssseg4e8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vssseg4e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8mf4_m( @@ -111,7 +111,7 @@ void test_vssseg4e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vssseg4e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8mf2_m( @@ -120,7 +120,7 @@ void test_vssseg4e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vssseg4e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8m1_m( @@ -129,7 +129,7 @@ void test_vssseg4e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vssseg4e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_i8m2_m( @@ -138,7 +138,7 @@ void test_vssseg4e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vssseg4e8_v_i8m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_i8m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8mf8_m( @@ -147,7 +147,7 @@ void test_vssseg4e8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vssseg4e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8mf4_m( @@ -156,7 +156,7 @@ void test_vssseg4e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vssseg4e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8mf2_m( @@ -165,7 +165,7 @@ void test_vssseg4e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vssseg4e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8m1_m( @@ -174,7 +174,7 @@ void test_vssseg4e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vssseg4e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vssseg4e8_v_u8m2_m( @@ -183,6 +183,6 @@ void test_vssseg4e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vu // CHECK-RV64-NEXT: ret void // void test_vssseg4e8_v_u8m2_m(vbool4_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vssseg4e8_v_u8m2_m(mask, base, bstride, v0, v1, v2, v3, vl); + return __riscv_vssseg4e8_v_u8m2_m(mask, base, bstride, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c index b932b38961cd3c6cf4e3bcc5ecc20fb57c9d1711..5ed2fbe4730cd670c71afd02ef0e54545ca4829d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vssseg5e16_v_f16mf4(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_f16mf4(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vssseg5e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vssseg5e16_v_f16mf2(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_f16mf2(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vssseg5e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vssseg5e16_v_f16m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_f16m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_i16mf4( @@ -40,7 +40,7 @@ void test_vssseg5e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vssseg5e16_v_i16mf4(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_i16mf4(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_i16mf2( @@ -49,7 +49,7 @@ void test_vssseg5e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vssseg5e16_v_i16mf2(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_i16mf2(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_i16m1( @@ -58,7 +58,7 @@ void test_vssseg5e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vssseg5e16_v_i16m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_i16m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_u16mf4( @@ -67,7 +67,7 @@ void test_vssseg5e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vssseg5e16_v_u16mf4(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_u16mf4(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_u16mf2( @@ -76,7 +76,7 @@ void test_vssseg5e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vssseg5e16_v_u16mf2(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_u16mf2(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_u16m1( @@ -85,7 +85,7 @@ void test_vssseg5e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vssseg5e16_v_u16m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_u16m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_f16mf4_m( @@ -94,7 +94,7 @@ void test_vssseg5e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vssseg5e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_f16mf2_m( @@ -103,7 +103,7 @@ void test_vssseg5e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vssseg5e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_f16m1_m( @@ -112,7 +112,7 @@ void test_vssseg5e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vssseg5e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_i16mf4_m( @@ -121,7 +121,7 @@ void test_vssseg5e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vssseg5e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_i16mf2_m( @@ -130,7 +130,7 @@ void test_vssseg5e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vssseg5e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_i16m1_m( @@ -139,7 +139,7 @@ void test_vssseg5e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vssseg5e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_u16mf4_m( @@ -148,7 +148,7 @@ void test_vssseg5e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vssseg5e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_u16mf2_m( @@ -157,7 +157,7 @@ void test_vssseg5e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vssseg5e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e16_v_u16m1_m( @@ -166,6 +166,6 @@ void test_vssseg5e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg5e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vssseg5e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e32.c index bbc7ec104b7e98b664a2459d76b99d2515cd6c66..0a1b5aaa86414c97ea6d84f1fff8f56300947b88 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vssseg5e32_v_f32mf2(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_f32mf2(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vssseg5e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vssseg5e32_v_f32m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_f32m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_i32mf2( @@ -31,7 +31,7 @@ void test_vssseg5e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vssseg5e32_v_i32mf2(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_i32mf2(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_i32m1( @@ -40,7 +40,7 @@ void test_vssseg5e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vssseg5e32_v_i32m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_i32m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_u32mf2( @@ -49,7 +49,7 @@ void test_vssseg5e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vssseg5e32_v_u32mf2(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_u32mf2(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_u32m1( @@ -58,7 +58,7 @@ void test_vssseg5e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vssseg5e32_v_u32m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_u32m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_f32mf2_m( @@ -67,7 +67,7 @@ void test_vssseg5e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vssseg5e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_f32m1_m( @@ -76,7 +76,7 @@ void test_vssseg5e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vssseg5e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_i32mf2_m( @@ -85,7 +85,7 @@ void test_vssseg5e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vssseg5e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_i32m1_m( @@ -94,7 +94,7 @@ void test_vssseg5e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vssseg5e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_u32mf2_m( @@ -103,7 +103,7 @@ void test_vssseg5e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vssseg5e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e32_v_u32m1_m( @@ -112,6 +112,6 @@ void test_vssseg5e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg5e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vssseg5e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e64.c index 60e7bdc5889e048bdba463b0790c42325de09a84..95cbae1ed6b3e9089c0e71da061d7b4339cade0b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg5e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vssseg5e64_v_f64m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e64_v_f64m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e64_v_i64m1( @@ -22,7 +22,7 @@ void test_vssseg5e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg5e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vssseg5e64_v_i64m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e64_v_i64m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e64_v_u64m1( @@ -31,7 +31,7 @@ void test_vssseg5e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg5e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vssseg5e64_v_u64m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e64_v_u64m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e64_v_f64m1_m( @@ -40,7 +40,7 @@ void test_vssseg5e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg5e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vssseg5e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e64_v_i64m1_m( @@ -49,7 +49,7 @@ void test_vssseg5e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg5e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vssseg5e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e64_v_u64m1_m( @@ -58,6 +58,6 @@ void test_vssseg5e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg5e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vssseg5e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e8.c index 3cb2959a7ac691a372b3369cf0fe08409ef0d76a..37f33c4188593469dbf6086c5553dc8c1838d0fe 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg5e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vssseg5e8_v_i8mf8(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_i8mf8(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vssseg5e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vssseg5e8_v_i8mf4(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_i8mf4(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vssseg5e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vssseg5e8_v_i8mf2(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_i8mf2(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vssseg5e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vssseg5e8_v_i8m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_i8m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_u8mf8( @@ -48,7 +48,7 @@ void test_vssseg5e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vssseg5e8_v_u8mf8(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_u8mf8(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_u8mf4( @@ -57,7 +57,7 @@ void test_vssseg5e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vssseg5e8_v_u8mf4(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_u8mf4(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_u8mf2( @@ -66,7 +66,7 @@ void test_vssseg5e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vssseg5e8_v_u8mf2(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_u8mf2(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_u8m1( @@ -75,7 +75,7 @@ void test_vssseg5e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vssseg5e8_v_u8m1(base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_u8m1(base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_i8mf8_m( @@ -84,7 +84,7 @@ void test_vssseg5e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vssseg5e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_i8mf4_m( @@ -93,7 +93,7 @@ void test_vssseg5e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vssseg5e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_i8mf2_m( @@ -102,7 +102,7 @@ void test_vssseg5e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vssseg5e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_i8m1_m( @@ -111,7 +111,7 @@ void test_vssseg5e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vssseg5e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_u8mf8_m( @@ -120,7 +120,7 @@ void test_vssseg5e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vssseg5e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_u8mf4_m( @@ -129,7 +129,7 @@ void test_vssseg5e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vssseg5e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_u8mf2_m( @@ -138,7 +138,7 @@ void test_vssseg5e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vssseg5e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vssseg5e8_v_u8m1_m( @@ -147,6 +147,6 @@ void test_vssseg5e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg5e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vssseg5e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); + return __riscv_vssseg5e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c index 98462937bebfbea1f5b37fec436d7a1eb9547259..fd91eeb5eab320bf4611684cdb63876901b18833 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vssseg6e16_v_f16mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_f16mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vssseg6e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vssseg6e16_v_f16mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_f16mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vssseg6e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vssseg6e16_v_f16m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_f16m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_i16mf4( @@ -40,7 +40,7 @@ void test_vssseg6e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vssseg6e16_v_i16mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_i16mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_i16mf2( @@ -49,7 +49,7 @@ void test_vssseg6e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vssseg6e16_v_i16mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_i16mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_i16m1( @@ -58,7 +58,7 @@ void test_vssseg6e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vssseg6e16_v_i16m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_i16m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_u16mf4( @@ -67,7 +67,7 @@ void test_vssseg6e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vssseg6e16_v_u16mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_u16mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_u16mf2( @@ -76,7 +76,7 @@ void test_vssseg6e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vssseg6e16_v_u16mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_u16mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_u16m1( @@ -85,7 +85,7 @@ void test_vssseg6e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vssseg6e16_v_u16m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_u16m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_f16mf4_m( @@ -94,7 +94,7 @@ void test_vssseg6e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vssseg6e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_f16mf2_m( @@ -103,7 +103,7 @@ void test_vssseg6e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vssseg6e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_f16m1_m( @@ -112,7 +112,7 @@ void test_vssseg6e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vssseg6e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_i16mf4_m( @@ -121,7 +121,7 @@ void test_vssseg6e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vssseg6e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_i16mf2_m( @@ -130,7 +130,7 @@ void test_vssseg6e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vssseg6e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_i16m1_m( @@ -139,7 +139,7 @@ void test_vssseg6e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vssseg6e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_u16mf4_m( @@ -148,7 +148,7 @@ void test_vssseg6e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vssseg6e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_u16mf2_m( @@ -157,7 +157,7 @@ void test_vssseg6e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vssseg6e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e16_v_u16m1_m( @@ -166,6 +166,6 @@ void test_vssseg6e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg6e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vssseg6e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e32.c index 25fcd837d1d7abea3bb4b59c1a91537afc99df0a..c03ed5d397ee98b66ef585cb1307e728aec0c386 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vssseg6e32_v_f32mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_f32mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vssseg6e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vssseg6e32_v_f32m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_f32m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_i32mf2( @@ -31,7 +31,7 @@ void test_vssseg6e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vssseg6e32_v_i32mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_i32mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_i32m1( @@ -40,7 +40,7 @@ void test_vssseg6e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vssseg6e32_v_i32m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_i32m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_u32mf2( @@ -49,7 +49,7 @@ void test_vssseg6e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vssseg6e32_v_u32mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_u32mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_u32m1( @@ -58,7 +58,7 @@ void test_vssseg6e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vssseg6e32_v_u32m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_u32m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_f32mf2_m( @@ -67,7 +67,7 @@ void test_vssseg6e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vssseg6e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_f32m1_m( @@ -76,7 +76,7 @@ void test_vssseg6e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vssseg6e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_i32mf2_m( @@ -85,7 +85,7 @@ void test_vssseg6e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vssseg6e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_i32m1_m( @@ -94,7 +94,7 @@ void test_vssseg6e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vssseg6e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_u32mf2_m( @@ -103,7 +103,7 @@ void test_vssseg6e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vssseg6e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e32_v_u32m1_m( @@ -112,6 +112,6 @@ void test_vssseg6e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg6e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vssseg6e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e64.c index 712d32ada6905ae52c0bec2bb4560fd638b59d53..0dff3c21dc14cb0588c3ecd64d04a4ddbc6de7f1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg6e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vssseg6e64_v_f64m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e64_v_f64m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e64_v_i64m1( @@ -22,7 +22,7 @@ void test_vssseg6e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg6e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vssseg6e64_v_i64m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e64_v_i64m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e64_v_u64m1( @@ -31,7 +31,7 @@ void test_vssseg6e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg6e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vssseg6e64_v_u64m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e64_v_u64m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e64_v_f64m1_m( @@ -40,7 +40,7 @@ void test_vssseg6e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg6e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vssseg6e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e64_v_i64m1_m( @@ -49,7 +49,7 @@ void test_vssseg6e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg6e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vssseg6e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e64_v_u64m1_m( @@ -58,6 +58,6 @@ void test_vssseg6e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg6e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vssseg6e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e8.c index cecd6392e5ae493e442381dbbfccc10d09c5b784..a42e1f47f6d333e2b973f038a572b69f97b82ff5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg6e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vssseg6e8_v_i8mf8(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_i8mf8(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vssseg6e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vssseg6e8_v_i8mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_i8mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vssseg6e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vssseg6e8_v_i8mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_i8mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vssseg6e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vssseg6e8_v_i8m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_i8m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_u8mf8( @@ -48,7 +48,7 @@ void test_vssseg6e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vssseg6e8_v_u8mf8(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_u8mf8(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_u8mf4( @@ -57,7 +57,7 @@ void test_vssseg6e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vssseg6e8_v_u8mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_u8mf4(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_u8mf2( @@ -66,7 +66,7 @@ void test_vssseg6e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vssseg6e8_v_u8mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_u8mf2(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_u8m1( @@ -75,7 +75,7 @@ void test_vssseg6e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vssseg6e8_v_u8m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_u8m1(base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_i8mf8_m( @@ -84,7 +84,7 @@ void test_vssseg6e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vssseg6e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_i8mf4_m( @@ -93,7 +93,7 @@ void test_vssseg6e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vssseg6e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_i8mf2_m( @@ -102,7 +102,7 @@ void test_vssseg6e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vssseg6e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_i8m1_m( @@ -111,7 +111,7 @@ void test_vssseg6e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vssseg6e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_u8mf8_m( @@ -120,7 +120,7 @@ void test_vssseg6e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vssseg6e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_u8mf4_m( @@ -129,7 +129,7 @@ void test_vssseg6e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vssseg6e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_u8mf2_m( @@ -138,7 +138,7 @@ void test_vssseg6e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vssseg6e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vssseg6e8_v_u8m1_m( @@ -147,6 +147,6 @@ void test_vssseg6e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg6e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vssseg6e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vssseg6e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c index 5fbe17427a30ece6fc56edae82c6bc5d7cee1628..bba913c3fb4f7a1fe5a4f60def8ace30ef3bf889 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vssseg7e16_v_f16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_f16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vssseg7e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vssseg7e16_v_f16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_f16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vssseg7e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vssseg7e16_v_f16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_f16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_i16mf4( @@ -40,7 +40,7 @@ void test_vssseg7e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vssseg7e16_v_i16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_i16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_i16mf2( @@ -49,7 +49,7 @@ void test_vssseg7e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vssseg7e16_v_i16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_i16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_i16m1( @@ -58,7 +58,7 @@ void test_vssseg7e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vssseg7e16_v_i16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_i16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_u16mf4( @@ -67,7 +67,7 @@ void test_vssseg7e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vssseg7e16_v_u16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_u16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_u16mf2( @@ -76,7 +76,7 @@ void test_vssseg7e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vssseg7e16_v_u16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_u16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_u16m1( @@ -85,7 +85,7 @@ void test_vssseg7e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vssseg7e16_v_u16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_u16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_f16mf4_m( @@ -94,7 +94,7 @@ void test_vssseg7e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vssseg7e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_f16mf2_m( @@ -103,7 +103,7 @@ void test_vssseg7e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vssseg7e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_f16m1_m( @@ -112,7 +112,7 @@ void test_vssseg7e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vssseg7e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_i16mf4_m( @@ -121,7 +121,7 @@ void test_vssseg7e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vssseg7e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_i16mf2_m( @@ -130,7 +130,7 @@ void test_vssseg7e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vssseg7e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_i16m1_m( @@ -139,7 +139,7 @@ void test_vssseg7e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vssseg7e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_u16mf4_m( @@ -148,7 +148,7 @@ void test_vssseg7e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vssseg7e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_u16mf2_m( @@ -157,7 +157,7 @@ void test_vssseg7e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vssseg7e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e16_v_u16m1_m( @@ -166,6 +166,6 @@ void test_vssseg7e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg7e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vssseg7e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e32.c index c7a2d96097944c4b22bd04644a09e175eed1ca2d..6346b5b540f239673ba0b9718efe29a40d036722 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vssseg7e32_v_f32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_f32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vssseg7e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vssseg7e32_v_f32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_f32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_i32mf2( @@ -31,7 +31,7 @@ void test_vssseg7e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vssseg7e32_v_i32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_i32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_i32m1( @@ -40,7 +40,7 @@ void test_vssseg7e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vssseg7e32_v_i32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_i32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_u32mf2( @@ -49,7 +49,7 @@ void test_vssseg7e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vssseg7e32_v_u32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_u32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_u32m1( @@ -58,7 +58,7 @@ void test_vssseg7e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vssseg7e32_v_u32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_u32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_f32mf2_m( @@ -67,7 +67,7 @@ void test_vssseg7e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vssseg7e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_f32m1_m( @@ -76,7 +76,7 @@ void test_vssseg7e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vssseg7e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_i32mf2_m( @@ -85,7 +85,7 @@ void test_vssseg7e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vssseg7e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_i32m1_m( @@ -94,7 +94,7 @@ void test_vssseg7e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vssseg7e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_u32mf2_m( @@ -103,7 +103,7 @@ void test_vssseg7e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vssseg7e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e32_v_u32m1_m( @@ -112,6 +112,6 @@ void test_vssseg7e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg7e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vssseg7e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e64.c index 596f02cec027aa0fe86fdaba479dab113b1b7ac0..129a378e65134224efdca52d41fc7178c5642e8f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg7e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vssseg7e64_v_f64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e64_v_f64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e64_v_i64m1( @@ -22,7 +22,7 @@ void test_vssseg7e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg7e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vssseg7e64_v_i64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e64_v_i64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e64_v_u64m1( @@ -31,7 +31,7 @@ void test_vssseg7e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg7e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vssseg7e64_v_u64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e64_v_u64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e64_v_f64m1_m( @@ -40,7 +40,7 @@ void test_vssseg7e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg7e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vssseg7e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e64_v_i64m1_m( @@ -49,7 +49,7 @@ void test_vssseg7e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg7e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vssseg7e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e64_v_u64m1_m( @@ -58,6 +58,6 @@ void test_vssseg7e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg7e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vssseg7e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e8.c index 5d8eb722b2673c333aacfcdc330cae2704d1f50a..bfda5d9f0617fdd06062e2d4bb82596b9ad4c473 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg7e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vssseg7e8_v_i8mf8(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_i8mf8(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vssseg7e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vssseg7e8_v_i8mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_i8mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vssseg7e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vssseg7e8_v_i8mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_i8mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vssseg7e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vssseg7e8_v_i8m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_i8m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_u8mf8( @@ -48,7 +48,7 @@ void test_vssseg7e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vssseg7e8_v_u8mf8(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_u8mf8(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_u8mf4( @@ -57,7 +57,7 @@ void test_vssseg7e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vssseg7e8_v_u8mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_u8mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_u8mf2( @@ -66,7 +66,7 @@ void test_vssseg7e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vssseg7e8_v_u8mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_u8mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_u8m1( @@ -75,7 +75,7 @@ void test_vssseg7e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vssseg7e8_v_u8m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_u8m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_i8mf8_m( @@ -84,7 +84,7 @@ void test_vssseg7e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vssseg7e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_i8mf4_m( @@ -93,7 +93,7 @@ void test_vssseg7e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vssseg7e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_i8mf2_m( @@ -102,7 +102,7 @@ void test_vssseg7e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vssseg7e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_i8m1_m( @@ -111,7 +111,7 @@ void test_vssseg7e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vssseg7e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_u8mf8_m( @@ -120,7 +120,7 @@ void test_vssseg7e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vssseg7e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_u8mf4_m( @@ -129,7 +129,7 @@ void test_vssseg7e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vssseg7e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_u8mf2_m( @@ -138,7 +138,7 @@ void test_vssseg7e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vssseg7e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vssseg7e8_v_u8m1_m( @@ -147,6 +147,6 @@ void test_vssseg7e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg7e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vssseg7e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vssseg7e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c index 6005e040e76f656d284755760aebc1e1d752636f..3f3e13c75a586f43b1226bb45d8d95073c8a4c9e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vssseg8e16_v_f16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_f16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vssseg8e16_v_f16mf4(_Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vssseg8e16_v_f16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_f16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_f16m1( @@ -31,7 +31,7 @@ void test_vssseg8e16_v_f16mf2(_Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vssseg8e16_v_f16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_f16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_i16mf4( @@ -40,7 +40,7 @@ void test_vssseg8e16_v_f16m1(_Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vssseg8e16_v_i16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_i16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_i16mf2( @@ -49,7 +49,7 @@ void test_vssseg8e16_v_i16mf4(int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vssseg8e16_v_i16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_i16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_i16m1( @@ -58,7 +58,7 @@ void test_vssseg8e16_v_i16mf2(int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vssseg8e16_v_i16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_i16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_u16mf4( @@ -67,7 +67,7 @@ void test_vssseg8e16_v_i16m1(int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vssseg8e16_v_u16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_u16mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_u16mf2( @@ -76,7 +76,7 @@ void test_vssseg8e16_v_u16mf4(uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vssseg8e16_v_u16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_u16mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_u16m1( @@ -85,7 +85,7 @@ void test_vssseg8e16_v_u16mf2(uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vssseg8e16_v_u16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_u16m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_f16mf4_m( @@ -94,7 +94,7 @@ void test_vssseg8e16_v_u16m1(uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vssseg8e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_f16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_f16mf2_m( @@ -103,7 +103,7 @@ void test_vssseg8e16_v_f16mf4_m(vbool64_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vssseg8e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_f16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_f16m1_m( @@ -112,7 +112,7 @@ void test_vssseg8e16_v_f16mf2_m(vbool32_t mask, _Float16 *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vssseg8e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_f16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_i16mf4_m( @@ -121,7 +121,7 @@ void test_vssseg8e16_v_f16m1_m(vbool16_t mask, _Float16 *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vssseg8e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_i16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_i16mf2_m( @@ -130,7 +130,7 @@ void test_vssseg8e16_v_i16mf4_m(vbool64_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vssseg8e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_i16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_i16m1_m( @@ -139,7 +139,7 @@ void test_vssseg8e16_v_i16mf2_m(vbool32_t mask, int16_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vssseg8e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_i16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_u16mf4_m( @@ -148,7 +148,7 @@ void test_vssseg8e16_v_i16m1_m(vbool16_t mask, int16_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vssseg8e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_u16mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_u16mf2_m( @@ -157,7 +157,7 @@ void test_vssseg8e16_v_u16mf4_m(vbool64_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstride, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vssseg8e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_u16mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e16_v_u16m1_m( @@ -166,6 +166,6 @@ void test_vssseg8e16_v_u16mf2_m(vbool32_t mask, uint16_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg8e16_v_u16m1_m(vbool16_t mask, uint16_t *base, ptrdiff_t bstride, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vssseg8e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e16_v_u16m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e32.c index 56394eed2fdd29ef059eaec3bbeb64d96114c771..90cca907304750ba55a6aa19e5e82e0ca7eb2779 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vssseg8e32_v_f32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_f32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_f32m1( @@ -22,7 +22,7 @@ void test_vssseg8e32_v_f32mf2(float *base, ptrdiff_t bstride, vfloat32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vssseg8e32_v_f32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_f32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_i32mf2( @@ -31,7 +31,7 @@ void test_vssseg8e32_v_f32m1(float *base, ptrdiff_t bstride, vfloat32m1_t v0, vf // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vssseg8e32_v_i32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_i32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_i32m1( @@ -40,7 +40,7 @@ void test_vssseg8e32_v_i32mf2(int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vssseg8e32_v_i32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_i32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_u32mf2( @@ -49,7 +49,7 @@ void test_vssseg8e32_v_i32m1(int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vssseg8e32_v_u32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_u32mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_u32m1( @@ -58,7 +58,7 @@ void test_vssseg8e32_v_u32mf2(uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vssseg8e32_v_u32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_u32m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_f32mf2_m( @@ -67,7 +67,7 @@ void test_vssseg8e32_v_u32m1(uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vssseg8e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_f32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_f32m1_m( @@ -76,7 +76,7 @@ void test_vssseg8e32_v_f32mf2_m(vbool64_t mask, float *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vssseg8e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_f32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_i32mf2_m( @@ -85,7 +85,7 @@ void test_vssseg8e32_v_f32m1_m(vbool32_t mask, float *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vssseg8e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_i32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_i32m1_m( @@ -94,7 +94,7 @@ void test_vssseg8e32_v_i32mf2_m(vbool64_t mask, int32_t *base, ptrdiff_t bstride // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vssseg8e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_i32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_u32mf2_m( @@ -103,7 +103,7 @@ void test_vssseg8e32_v_i32m1_m(vbool32_t mask, int32_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstride, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vssseg8e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_u32mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e32_v_u32m1_m( @@ -112,6 +112,6 @@ void test_vssseg8e32_v_u32mf2_m(vbool64_t mask, uint32_t *base, ptrdiff_t bstrid // CHECK-RV64-NEXT: ret void // void test_vssseg8e32_v_u32m1_m(vbool32_t mask, uint32_t *base, ptrdiff_t bstride, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vssseg8e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e32_v_u32m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e64.c index bf0939fccdffe4e2dc1ab55b6d74d91f15a65f5e..5ff9b68bf55c9d27cf7ed8d57f719001f2fcc059 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg8e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vssseg8e64_v_f64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e64_v_f64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e64_v_i64m1( @@ -22,7 +22,7 @@ void test_vssseg8e64_v_f64m1(double *base, ptrdiff_t bstride, vfloat64m1_t v0, v // CHECK-RV64-NEXT: ret void // void test_vssseg8e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vssseg8e64_v_i64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e64_v_i64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e64_v_u64m1( @@ -31,7 +31,7 @@ void test_vssseg8e64_v_i64m1(int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vssseg8e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vssseg8e64_v_u64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e64_v_u64m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e64_v_f64m1_m( @@ -40,7 +40,7 @@ void test_vssseg8e64_v_u64m1(uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vssseg8e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vssseg8e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e64_v_f64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e64_v_i64m1_m( @@ -49,7 +49,7 @@ void test_vssseg8e64_v_f64m1_m(vbool64_t mask, double *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg8e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vssseg8e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e64_v_i64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e64_v_u64m1_m( @@ -58,6 +58,6 @@ void test_vssseg8e64_v_i64m1_m(vbool64_t mask, int64_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg8e64_v_u64m1_m(vbool64_t mask, uint64_t *base, ptrdiff_t bstride, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vssseg8e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e64_v_u64m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e8.c index 4f20c6becb40014a77416915bd08c9988344f626..5467abf715ab84b117c59f6ef762686506c12bab 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssseg8e8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vssseg8e8_v_i8mf8(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_i8mf8(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_i8mf4( @@ -21,7 +21,7 @@ void test_vssseg8e8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vssseg8e8_v_i8mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_i8mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_i8mf2( @@ -30,7 +30,7 @@ void test_vssseg8e8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vssseg8e8_v_i8mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_i8mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_i8m1( @@ -39,7 +39,7 @@ void test_vssseg8e8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vssseg8e8_v_i8m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_i8m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_u8mf8( @@ -48,7 +48,7 @@ void test_vssseg8e8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vssseg8e8_v_u8mf8(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_u8mf8(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_u8mf4( @@ -57,7 +57,7 @@ void test_vssseg8e8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vssseg8e8_v_u8mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_u8mf4(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_u8mf2( @@ -66,7 +66,7 @@ void test_vssseg8e8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vssseg8e8_v_u8mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_u8mf2(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_u8m1( @@ -75,7 +75,7 @@ void test_vssseg8e8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vssseg8e8_v_u8m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_u8m1(base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_i8mf8_m( @@ -84,7 +84,7 @@ void test_vssseg8e8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuin // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vssseg8e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_i8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_i8mf4_m( @@ -93,7 +93,7 @@ void test_vssseg8e8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vssseg8e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_i8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_i8mf2_m( @@ -102,7 +102,7 @@ void test_vssseg8e8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vssseg8e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_i8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_i8m1_m( @@ -111,7 +111,7 @@ void test_vssseg8e8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, v // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vssseg8e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_i8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_u8mf8_m( @@ -120,7 +120,7 @@ void test_vssseg8e8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vin // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vssseg8e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_u8mf8_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_u8mf4_m( @@ -129,7 +129,7 @@ void test_vssseg8e8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vssseg8e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_u8mf4_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_u8mf2_m( @@ -138,7 +138,7 @@ void test_vssseg8e8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vssseg8e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_u8mf2_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vssseg8e8_v_u8m1_m( @@ -147,6 +147,6 @@ void test_vssseg8e8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, // CHECK-RV64-NEXT: ret void // void test_vssseg8e8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vssseg8e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vssseg8e8_v_u8m1_m(mask, base, bstride, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssub.c index fbcfef0247eca66ed8627ba8c936de16e40c1400..874b615134fe7452e747aaf2cad8070fbc3311bf 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vssub_vv_i8mf8(op1, op2, vl); + return __riscv_vssub_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vssub_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf8(op1, op2, vl); + return __riscv_vssub_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vssub_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vssub_vv_i8mf4(op1, op2, vl); + return __riscv_vssub_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vssub_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf4(op1, op2, vl); + return __riscv_vssub_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vssub_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vssub_vv_i8mf2(op1, op2, vl); + return __riscv_vssub_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vssub_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf2(op1, op2, vl); + return __riscv_vssub_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vssub_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vssub_vv_i8m1(op1, op2, vl); + return __riscv_vssub_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vssub_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m1(op1, op2, vl); + return __riscv_vssub_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vssub_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vssub_vv_i8m2(op1, op2, vl); + return __riscv_vssub_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vssub_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m2(op1, op2, vl); + return __riscv_vssub_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vssub_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vssub_vv_i8m4(op1, op2, vl); + return __riscv_vssub_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vssub_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m4(op1, op2, vl); + return __riscv_vssub_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vssub_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vssub_vv_i8m8(op1, op2, vl); + return __riscv_vssub_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vssub_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m8(op1, op2, vl); + return __riscv_vssub_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vssub_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vssub_vv_i16mf4(op1, op2, vl); + return __riscv_vssub_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vssub_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf4(op1, op2, vl); + return __riscv_vssub_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vssub_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vssub_vv_i16mf2(op1, op2, vl); + return __riscv_vssub_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vssub_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf2(op1, op2, vl); + return __riscv_vssub_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vssub_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vssub_vv_i16m1(op1, op2, vl); + return __riscv_vssub_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vssub_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m1(op1, op2, vl); + return __riscv_vssub_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vssub_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vssub_vv_i16m2(op1, op2, vl); + return __riscv_vssub_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vssub_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m2(op1, op2, vl); + return __riscv_vssub_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vssub_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vssub_vv_i16m4(op1, op2, vl); + return __riscv_vssub_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vssub_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m4(op1, op2, vl); + return __riscv_vssub_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vssub_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vssub_vv_i16m8(op1, op2, vl); + return __riscv_vssub_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vssub_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m8(op1, op2, vl); + return __riscv_vssub_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vssub_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vssub_vv_i32mf2(op1, op2, vl); + return __riscv_vssub_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vssub_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32mf2(op1, op2, vl); + return __riscv_vssub_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vssub_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vssub_vv_i32m1(op1, op2, vl); + return __riscv_vssub_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vssub_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m1(op1, op2, vl); + return __riscv_vssub_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vssub_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vssub_vv_i32m2(op1, op2, vl); + return __riscv_vssub_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vssub_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m2(op1, op2, vl); + return __riscv_vssub_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vssub_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vssub_vv_i32m4(op1, op2, vl); + return __riscv_vssub_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vssub_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m4(op1, op2, vl); + return __riscv_vssub_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vssub_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vssub_vv_i32m8(op1, op2, vl); + return __riscv_vssub_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vssub_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m8(op1, op2, vl); + return __riscv_vssub_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vssub_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vssub_vv_i64m1(op1, op2, vl); + return __riscv_vssub_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vssub_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m1(op1, op2, vl); + return __riscv_vssub_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vssub_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vssub_vv_i64m2(op1, op2, vl); + return __riscv_vssub_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vssub_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m2(op1, op2, vl); + return __riscv_vssub_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vssub_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vssub_vv_i64m4(op1, op2, vl); + return __riscv_vssub_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vssub_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m4(op1, op2, vl); + return __riscv_vssub_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vssub_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vssub_vv_i64m8(op1, op2, vl); + return __riscv_vssub_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vssub_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m8(op1, op2, vl); + return __riscv_vssub_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf8_m( @@ -408,7 +408,7 @@ vint64m8_t test_vssub_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vssub_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf8_m( @@ -417,7 +417,7 @@ vint8mf8_t test_vssub_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf4_m( @@ -426,7 +426,7 @@ vint8mf8_t test_vssub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vssub_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf4_m( @@ -435,7 +435,7 @@ vint8mf4_t test_vssub_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf2_m( @@ -444,7 +444,7 @@ vint8mf4_t test_vssub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vssub_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf2_m( @@ -453,7 +453,7 @@ vint8mf2_t test_vssub_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m1_m( @@ -462,7 +462,7 @@ vint8mf2_t test_vssub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vssub_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m1_m( @@ -471,7 +471,7 @@ vint8m1_t test_vssub_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m2_m( @@ -480,7 +480,7 @@ vint8m1_t test_vssub_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vssub_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m2_m( @@ -489,7 +489,7 @@ vint8m2_t test_vssub_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m4_m( @@ -498,7 +498,7 @@ vint8m2_t test_vssub_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vssub_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m4_m( @@ -507,7 +507,7 @@ vint8m4_t test_vssub_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m8_m( @@ -516,7 +516,7 @@ vint8m4_t test_vssub_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vssub_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m8_m( @@ -525,7 +525,7 @@ vint8m8_t test_vssub_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf4_m( @@ -534,7 +534,7 @@ vint8m8_t test_vssub_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vssub_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf4_m( @@ -543,7 +543,7 @@ vint16mf4_t test_vssub_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf2_m( @@ -552,7 +552,7 @@ vint16mf4_t test_vssub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vssub_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf2_m( @@ -561,7 +561,7 @@ vint16mf2_t test_vssub_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m1_m( @@ -570,7 +570,7 @@ vint16mf2_t test_vssub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vssub_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m1_m( @@ -579,7 +579,7 @@ vint16m1_t test_vssub_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m2_m( @@ -588,7 +588,7 @@ vint16m1_t test_vssub_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vssub_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m2_m( @@ -597,7 +597,7 @@ vint16m2_t test_vssub_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m4_m( @@ -606,7 +606,7 @@ vint16m2_t test_vssub_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vssub_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m4_m( @@ -615,7 +615,7 @@ vint16m4_t test_vssub_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m8_m( @@ -624,7 +624,7 @@ vint16m4_t test_vssub_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vssub_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m8_m( @@ -633,7 +633,7 @@ vint16m8_t test_vssub_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32mf2_m( @@ -642,7 +642,7 @@ vint16m8_t test_vssub_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vssub_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32mf2_m( @@ -651,7 +651,7 @@ vint32mf2_t test_vssub_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m1_m( @@ -660,7 +660,7 @@ vint32mf2_t test_vssub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vssub_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m1_m( @@ -669,7 +669,7 @@ vint32m1_t test_vssub_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m2_m( @@ -678,7 +678,7 @@ vint32m1_t test_vssub_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vssub_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m2_m( @@ -687,7 +687,7 @@ vint32m2_t test_vssub_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m4_m( @@ -696,7 +696,7 @@ vint32m2_t test_vssub_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vssub_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m4_m( @@ -705,7 +705,7 @@ vint32m4_t test_vssub_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m8_m( @@ -714,7 +714,7 @@ vint32m4_t test_vssub_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vssub_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m8_m( @@ -723,7 +723,7 @@ vint32m8_t test_vssub_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m1_m( @@ -732,7 +732,7 @@ vint32m8_t test_vssub_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vssub_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m1_m( @@ -741,7 +741,7 @@ vint64m1_t test_vssub_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m2_m( @@ -750,7 +750,7 @@ vint64m1_t test_vssub_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vssub_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m2_m( @@ -759,7 +759,7 @@ vint64m2_t test_vssub_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m4_m( @@ -768,7 +768,7 @@ vint64m2_t test_vssub_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vssub_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m4_m( @@ -777,7 +777,7 @@ vint64m4_t test_vssub_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m8_m( @@ -786,7 +786,7 @@ vint64m4_t test_vssub_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vssub_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vssub_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m8_m( @@ -795,6 +795,6 @@ vint64m8_t test_vssub_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vssub_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssubu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssubu.c index 892aa65cb6e3dab11c2792ff04f900c8a081b6bb..aae05d895981056867abc1a74dd3dd9a49e198b2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssubu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssubu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vssubu_vv_u8mf8(op1, op2, vl); + return __riscv_vssubu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vssubu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf8(op1, op2, vl); + return __riscv_vssubu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vssubu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vssubu_vv_u8mf4(op1, op2, vl); + return __riscv_vssubu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vssubu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf4(op1, op2, vl); + return __riscv_vssubu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vssubu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vssubu_vv_u8mf2(op1, op2, vl); + return __riscv_vssubu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vssubu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf2(op1, op2, vl); + return __riscv_vssubu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vssubu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vssubu_vv_u8m1(op1, op2, vl); + return __riscv_vssubu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vssubu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m1(op1, op2, vl); + return __riscv_vssubu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vssubu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vssubu_vv_u8m2(op1, op2, vl); + return __riscv_vssubu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vssubu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m2(op1, op2, vl); + return __riscv_vssubu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vssubu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vssubu_vv_u8m4(op1, op2, vl); + return __riscv_vssubu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vssubu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m4(op1, op2, vl); + return __riscv_vssubu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vssubu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vssubu_vv_u8m8(op1, op2, vl); + return __riscv_vssubu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vssubu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m8(op1, op2, vl); + return __riscv_vssubu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vssubu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vssubu_vv_u16mf4(op1, op2, vl); + return __riscv_vssubu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vssubu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf4(op1, op2, vl); + return __riscv_vssubu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vssubu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vssubu_vv_u16mf2(op1, op2, vl); + return __riscv_vssubu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vssubu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf2(op1, op2, vl); + return __riscv_vssubu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vssubu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vssubu_vv_u16m1(op1, op2, vl); + return __riscv_vssubu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vssubu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m1(op1, op2, vl); + return __riscv_vssubu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vssubu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vssubu_vv_u16m2(op1, op2, vl); + return __riscv_vssubu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vssubu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m2(op1, op2, vl); + return __riscv_vssubu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vssubu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vssubu_vv_u16m4(op1, op2, vl); + return __riscv_vssubu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vssubu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m4(op1, op2, vl); + return __riscv_vssubu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vssubu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vssubu_vv_u16m8(op1, op2, vl); + return __riscv_vssubu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vssubu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m8(op1, op2, vl); + return __riscv_vssubu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vssubu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vssubu_vv_u32mf2(op1, op2, vl); + return __riscv_vssubu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vssubu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32mf2(op1, op2, vl); + return __riscv_vssubu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vssubu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vssubu_vv_u32m1(op1, op2, vl); + return __riscv_vssubu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vssubu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m1(op1, op2, vl); + return __riscv_vssubu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vssubu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vssubu_vv_u32m2(op1, op2, vl); + return __riscv_vssubu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vssubu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m2(op1, op2, vl); + return __riscv_vssubu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vssubu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vssubu_vv_u32m4(op1, op2, vl); + return __riscv_vssubu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vssubu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m4(op1, op2, vl); + return __riscv_vssubu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vssubu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vssubu_vv_u32m8(op1, op2, vl); + return __riscv_vssubu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vssubu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m8(op1, op2, vl); + return __riscv_vssubu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m1( @@ -336,7 +336,7 @@ vuint32m8_t test_vssubu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vssubu_vv_u64m1(op1, op2, vl); + return __riscv_vssubu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m1( @@ -345,7 +345,7 @@ vuint64m1_t test_vssubu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m1(op1, op2, vl); + return __riscv_vssubu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m2( @@ -354,7 +354,7 @@ vuint64m1_t test_vssubu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vssubu_vv_u64m2(op1, op2, vl); + return __riscv_vssubu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m2( @@ -363,7 +363,7 @@ vuint64m2_t test_vssubu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m2(op1, op2, vl); + return __riscv_vssubu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m4( @@ -372,7 +372,7 @@ vuint64m2_t test_vssubu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vssubu_vv_u64m4(op1, op2, vl); + return __riscv_vssubu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m4( @@ -381,7 +381,7 @@ vuint64m4_t test_vssubu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m4(op1, op2, vl); + return __riscv_vssubu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m8( @@ -390,7 +390,7 @@ vuint64m4_t test_vssubu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vssubu_vv_u64m8(op1, op2, vl); + return __riscv_vssubu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m8( @@ -399,7 +399,7 @@ vuint64m8_t test_vssubu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m8(op1, op2, vl); + return __riscv_vssubu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf8_m( @@ -408,7 +408,7 @@ vuint64m8_t test_vssubu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vssubu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf8_m( @@ -417,7 +417,7 @@ vuint8mf8_t test_vssubu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf4_m( @@ -426,7 +426,7 @@ vuint8mf8_t test_vssubu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vssubu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf4_m( @@ -435,7 +435,7 @@ vuint8mf4_t test_vssubu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf2_m( @@ -444,7 +444,7 @@ vuint8mf4_t test_vssubu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vssubu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf2_m( @@ -453,7 +453,7 @@ vuint8mf2_t test_vssubu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m1_m( @@ -462,7 +462,7 @@ vuint8mf2_t test_vssubu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vssubu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m1_m( @@ -471,7 +471,7 @@ vuint8m1_t test_vssubu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m2_m( @@ -480,7 +480,7 @@ vuint8m1_t test_vssubu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vssubu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m2_m( @@ -489,7 +489,7 @@ vuint8m2_t test_vssubu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m4_m( @@ -498,7 +498,7 @@ vuint8m2_t test_vssubu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vssubu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m4_m( @@ -507,7 +507,7 @@ vuint8m4_t test_vssubu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m8_m( @@ -516,7 +516,7 @@ vuint8m4_t test_vssubu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vssubu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m8_m( @@ -525,7 +525,7 @@ vuint8m8_t test_vssubu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf4_m( @@ -534,7 +534,7 @@ vuint8m8_t test_vssubu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vssubu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf4_m( @@ -543,7 +543,7 @@ vuint16mf4_t test_vssubu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf2_m( @@ -552,7 +552,7 @@ vuint16mf4_t test_vssubu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vssubu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf2_m( @@ -561,7 +561,7 @@ vuint16mf2_t test_vssubu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m1_m( @@ -570,7 +570,7 @@ vuint16mf2_t test_vssubu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vssubu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m1_m( @@ -579,7 +579,7 @@ vuint16m1_t test_vssubu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m2_m( @@ -588,7 +588,7 @@ vuint16m1_t test_vssubu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vssubu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m2_m( @@ -597,7 +597,7 @@ vuint16m2_t test_vssubu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m4_m( @@ -606,7 +606,7 @@ vuint16m2_t test_vssubu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vssubu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m4_m( @@ -615,7 +615,7 @@ vuint16m4_t test_vssubu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m8_m( @@ -624,7 +624,7 @@ vuint16m4_t test_vssubu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vssubu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m8_m( @@ -633,7 +633,7 @@ vuint16m8_t test_vssubu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32mf2_m( @@ -642,7 +642,7 @@ vuint16m8_t test_vssubu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vssubu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32mf2_m( @@ -651,7 +651,7 @@ vuint32mf2_t test_vssubu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m1_m( @@ -660,7 +660,7 @@ vuint32mf2_t test_vssubu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vssubu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m1_m( @@ -669,7 +669,7 @@ vuint32m1_t test_vssubu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m2_m( @@ -678,7 +678,7 @@ vuint32m1_t test_vssubu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vssubu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m2_m( @@ -687,7 +687,7 @@ vuint32m2_t test_vssubu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m4_m( @@ -696,7 +696,7 @@ vuint32m2_t test_vssubu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vssubu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m4_m( @@ -705,7 +705,7 @@ vuint32m4_t test_vssubu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m8_m( @@ -714,7 +714,7 @@ vuint32m4_t test_vssubu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vssubu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m8_m( @@ -723,7 +723,7 @@ vuint32m8_t test_vssubu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m1_m( @@ -732,7 +732,7 @@ vuint32m8_t test_vssubu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vssubu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m1_m( @@ -741,7 +741,7 @@ vuint64m1_t test_vssubu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m2_m( @@ -750,7 +750,7 @@ vuint64m1_t test_vssubu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vssubu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m2_m( @@ -759,7 +759,7 @@ vuint64m2_t test_vssubu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m4_m( @@ -768,7 +768,7 @@ vuint64m2_t test_vssubu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vssubu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m4_m( @@ -777,7 +777,7 @@ vuint64m4_t test_vssubu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m8_m( @@ -786,7 +786,7 @@ vuint64m4_t test_vssubu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vssubu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vssubu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m8_m( @@ -795,6 +795,6 @@ vuint64m8_t test_vssubu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vssubu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsub.c index 8937d867eeeac38ef9d60795ffb9de14055e9c41..8d62a25a6c109ee6c6a27e70d8d29570a8d10421 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsub_vv_i8mf8(op1, op2, vl); + return __riscv_vsub_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vsub_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf8(op1, op2, vl); + return __riscv_vsub_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vsub_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsub_vv_i8mf4(op1, op2, vl); + return __riscv_vsub_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vsub_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf4(op1, op2, vl); + return __riscv_vsub_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vsub_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsub_vv_i8mf2(op1, op2, vl); + return __riscv_vsub_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vsub_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf2(op1, op2, vl); + return __riscv_vsub_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vsub_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsub_vv_i8m1(op1, op2, vl); + return __riscv_vsub_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vsub_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m1(op1, op2, vl); + return __riscv_vsub_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vsub_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsub_vv_i8m2(op1, op2, vl); + return __riscv_vsub_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vsub_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m2(op1, op2, vl); + return __riscv_vsub_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vsub_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsub_vv_i8m4(op1, op2, vl); + return __riscv_vsub_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vsub_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m4(op1, op2, vl); + return __riscv_vsub_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vsub_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsub_vv_i8m8(op1, op2, vl); + return __riscv_vsub_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vsub_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m8(op1, op2, vl); + return __riscv_vsub_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vsub_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsub_vv_i16mf4(op1, op2, vl); + return __riscv_vsub_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vsub_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf4(op1, op2, vl); + return __riscv_vsub_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vsub_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsub_vv_i16mf2(op1, op2, vl); + return __riscv_vsub_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vsub_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf2(op1, op2, vl); + return __riscv_vsub_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vsub_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsub_vv_i16m1(op1, op2, vl); + return __riscv_vsub_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vsub_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m1(op1, op2, vl); + return __riscv_vsub_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vsub_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsub_vv_i16m2(op1, op2, vl); + return __riscv_vsub_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vsub_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m2(op1, op2, vl); + return __riscv_vsub_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vsub_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsub_vv_i16m4(op1, op2, vl); + return __riscv_vsub_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vsub_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m4(op1, op2, vl); + return __riscv_vsub_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vsub_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsub_vv_i16m8(op1, op2, vl); + return __riscv_vsub_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vsub_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m8(op1, op2, vl); + return __riscv_vsub_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vsub_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsub_vv_i32mf2(op1, op2, vl); + return __riscv_vsub_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vsub_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32mf2(op1, op2, vl); + return __riscv_vsub_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vsub_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsub_vv_i32m1(op1, op2, vl); + return __riscv_vsub_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vsub_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m1(op1, op2, vl); + return __riscv_vsub_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vsub_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsub_vv_i32m2(op1, op2, vl); + return __riscv_vsub_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vsub_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m2(op1, op2, vl); + return __riscv_vsub_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vsub_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsub_vv_i32m4(op1, op2, vl); + return __riscv_vsub_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vsub_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m4(op1, op2, vl); + return __riscv_vsub_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vsub_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsub_vv_i32m8(op1, op2, vl); + return __riscv_vsub_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vsub_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m8(op1, op2, vl); + return __riscv_vsub_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vsub_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsub_vv_i64m1(op1, op2, vl); + return __riscv_vsub_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vsub_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m1(op1, op2, vl); + return __riscv_vsub_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vsub_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsub_vv_i64m2(op1, op2, vl); + return __riscv_vsub_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vsub_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m2(op1, op2, vl); + return __riscv_vsub_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vsub_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsub_vv_i64m4(op1, op2, vl); + return __riscv_vsub_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vsub_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m4(op1, op2, vl); + return __riscv_vsub_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vsub_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsub_vv_i64m8(op1, op2, vl); + return __riscv_vsub_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vsub_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m8(op1, op2, vl); + return __riscv_vsub_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vsub_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsub_vv_u8mf8(op1, op2, vl); + return __riscv_vsub_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsub_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf8(op1, op2, vl); + return __riscv_vsub_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsub_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsub_vv_u8mf4(op1, op2, vl); + return __riscv_vsub_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsub_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf4(op1, op2, vl); + return __riscv_vsub_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsub_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsub_vv_u8mf2(op1, op2, vl); + return __riscv_vsub_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsub_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf2(op1, op2, vl); + return __riscv_vsub_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsub_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsub_vv_u8m1(op1, op2, vl); + return __riscv_vsub_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vsub_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m1(op1, op2, vl); + return __riscv_vsub_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vsub_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsub_vv_u8m2(op1, op2, vl); + return __riscv_vsub_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vsub_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m2(op1, op2, vl); + return __riscv_vsub_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vsub_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsub_vv_u8m4(op1, op2, vl); + return __riscv_vsub_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vsub_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m4(op1, op2, vl); + return __riscv_vsub_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vsub_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsub_vv_u8m8(op1, op2, vl); + return __riscv_vsub_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vsub_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m8(op1, op2, vl); + return __riscv_vsub_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vsub_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsub_vv_u16mf4(op1, op2, vl); + return __riscv_vsub_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsub_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf4(op1, op2, vl); + return __riscv_vsub_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsub_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsub_vv_u16mf2(op1, op2, vl); + return __riscv_vsub_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsub_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf2(op1, op2, vl); + return __riscv_vsub_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsub_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsub_vv_u16m1(op1, op2, vl); + return __riscv_vsub_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vsub_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m1(op1, op2, vl); + return __riscv_vsub_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vsub_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsub_vv_u16m2(op1, op2, vl); + return __riscv_vsub_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vsub_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m2(op1, op2, vl); + return __riscv_vsub_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vsub_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsub_vv_u16m4(op1, op2, vl); + return __riscv_vsub_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vsub_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m4(op1, op2, vl); + return __riscv_vsub_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vsub_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsub_vv_u16m8(op1, op2, vl); + return __riscv_vsub_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vsub_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m8(op1, op2, vl); + return __riscv_vsub_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vsub_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsub_vv_u32mf2(op1, op2, vl); + return __riscv_vsub_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsub_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32mf2(op1, op2, vl); + return __riscv_vsub_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsub_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsub_vv_u32m1(op1, op2, vl); + return __riscv_vsub_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vsub_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m1(op1, op2, vl); + return __riscv_vsub_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vsub_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsub_vv_u32m2(op1, op2, vl); + return __riscv_vsub_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vsub_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m2(op1, op2, vl); + return __riscv_vsub_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vsub_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsub_vv_u32m4(op1, op2, vl); + return __riscv_vsub_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vsub_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m4(op1, op2, vl); + return __riscv_vsub_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vsub_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsub_vv_u32m8(op1, op2, vl); + return __riscv_vsub_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vsub_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m8(op1, op2, vl); + return __riscv_vsub_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vsub_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsub_vv_u64m1(op1, op2, vl); + return __riscv_vsub_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vsub_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m1(op1, op2, vl); + return __riscv_vsub_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vsub_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsub_vv_u64m2(op1, op2, vl); + return __riscv_vsub_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vsub_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m2(op1, op2, vl); + return __riscv_vsub_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vsub_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsub_vv_u64m4(op1, op2, vl); + return __riscv_vsub_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vsub_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m4(op1, op2, vl); + return __riscv_vsub_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vsub_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsub_vv_u64m8(op1, op2, vl); + return __riscv_vsub_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m8( @@ -795,7 +795,7 @@ vuint64m8_t test_vsub_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m8(op1, op2, vl); + return __riscv_vsub_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf8_m( @@ -804,7 +804,7 @@ vuint64m8_t test_vsub_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsub_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf8_m( @@ -813,7 +813,7 @@ vint8mf8_t test_vsub_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf4_m( @@ -822,7 +822,7 @@ vint8mf8_t test_vsub_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsub_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf4_m( @@ -831,7 +831,7 @@ vint8mf4_t test_vsub_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf2_m( @@ -840,7 +840,7 @@ vint8mf4_t test_vsub_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsub_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf2_m( @@ -849,7 +849,7 @@ vint8mf2_t test_vsub_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m1_m( @@ -858,7 +858,7 @@ vint8mf2_t test_vsub_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsub_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m1_m( @@ -867,7 +867,7 @@ vint8m1_t test_vsub_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m2_m( @@ -876,7 +876,7 @@ vint8m1_t test_vsub_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsub_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m2_m( @@ -885,7 +885,7 @@ vint8m2_t test_vsub_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m4_m( @@ -894,7 +894,7 @@ vint8m2_t test_vsub_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsub_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m4_m( @@ -903,7 +903,7 @@ vint8m4_t test_vsub_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m8_m( @@ -912,7 +912,7 @@ vint8m4_t test_vsub_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsub_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m8_m( @@ -921,7 +921,7 @@ vint8m8_t test_vsub_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf4_m( @@ -930,7 +930,7 @@ vint8m8_t test_vsub_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsub_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf4_m( @@ -939,7 +939,7 @@ vint16mf4_t test_vsub_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf2_m( @@ -948,7 +948,7 @@ vint16mf4_t test_vsub_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsub_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf2_m( @@ -957,7 +957,7 @@ vint16mf2_t test_vsub_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m1_m( @@ -966,7 +966,7 @@ vint16mf2_t test_vsub_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsub_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m1_m( @@ -975,7 +975,7 @@ vint16m1_t test_vsub_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m2_m( @@ -984,7 +984,7 @@ vint16m1_t test_vsub_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsub_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m2_m( @@ -993,7 +993,7 @@ vint16m2_t test_vsub_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m4_m( @@ -1002,7 +1002,7 @@ vint16m2_t test_vsub_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsub_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m4_m( @@ -1011,7 +1011,7 @@ vint16m4_t test_vsub_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m8_m( @@ -1020,7 +1020,7 @@ vint16m4_t test_vsub_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsub_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m8_m( @@ -1029,7 +1029,7 @@ vint16m8_t test_vsub_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32mf2_m( @@ -1038,7 +1038,7 @@ vint16m8_t test_vsub_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsub_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32mf2_m( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vsub_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m1_m( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vsub_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsub_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m1_m( @@ -1065,7 +1065,7 @@ vint32m1_t test_vsub_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m2_m( @@ -1074,7 +1074,7 @@ vint32m1_t test_vsub_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsub_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m2_m( @@ -1083,7 +1083,7 @@ vint32m2_t test_vsub_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m4_m( @@ -1092,7 +1092,7 @@ vint32m2_t test_vsub_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsub_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m4_m( @@ -1101,7 +1101,7 @@ vint32m4_t test_vsub_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m8_m( @@ -1110,7 +1110,7 @@ vint32m4_t test_vsub_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsub_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m8_m( @@ -1119,7 +1119,7 @@ vint32m8_t test_vsub_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m1_m( @@ -1128,7 +1128,7 @@ vint32m8_t test_vsub_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsub_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m1_m( @@ -1137,7 +1137,7 @@ vint64m1_t test_vsub_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m2_m( @@ -1146,7 +1146,7 @@ vint64m1_t test_vsub_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsub_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m2_m( @@ -1155,7 +1155,7 @@ vint64m2_t test_vsub_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m4_m( @@ -1164,7 +1164,7 @@ vint64m2_t test_vsub_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsub_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m4_m( @@ -1173,7 +1173,7 @@ vint64m4_t test_vsub_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m8_m( @@ -1182,7 +1182,7 @@ vint64m4_t test_vsub_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsub_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m8_m( @@ -1191,7 +1191,7 @@ vint64m8_t test_vsub_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf8_m( @@ -1200,7 +1200,7 @@ vint64m8_t test_vsub_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsub_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf8_m( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vsub_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf4_m( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vsub_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsub_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf4_m( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vsub_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf2_m( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vsub_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsub_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf2_m( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vsub_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m1_m( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vsub_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsub_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m1_m( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vsub_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m2_m( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vsub_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsub_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m2_m( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vsub_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m4_m( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vsub_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsub_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m4_m( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vsub_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m8_m( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vsub_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsub_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m8_m( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vsub_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf4_m( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vsub_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsub_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf4_m( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vsub_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf2_m( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vsub_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsub_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf2_m( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vsub_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m1_m( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vsub_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsub_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m1_m( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vsub_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m2_m( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vsub_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsub_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m2_m( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vsub_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m4_m( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vsub_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsub_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m4_m( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vsub_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m8_m( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vsub_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsub_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m8_m( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vsub_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32mf2_m( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vsub_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsub_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32mf2_m( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vsub_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m1_m( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vsub_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsub_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m1_m( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vsub_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m2_m( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vsub_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsub_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m2_m( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vsub_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m4_m( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vsub_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsub_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m4_m( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vsub_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m8_m( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vsub_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsub_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m8_m( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vsub_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m1_m( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vsub_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsub_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m1_m( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vsub_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m2_m( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vsub_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsub_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m2_m( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vsub_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m4_m( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vsub_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsub_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m4_m( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vsub_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m8_m( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vsub_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsub_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vsub_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m8_m( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vsub_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vsub_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei16.c index 995702b70ab86812217824804a7729396342cd7a..56b39ca115cc30581a31783ecb65ac8552f093db 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t value, size_t vl) { - return vsuxei16_v_f16mf4(base, bindex, value, vl); + return __riscv_vsuxei16_v_f16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t value, size_t vl) { - return vsuxei16_v_f16mf2(base, bindex, value, vl); + return __riscv_vsuxei16_v_f16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t value, size_t vl) { - return vsuxei16_v_f16m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_f16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t value, size_t vl) { - return vsuxei16_v_f16m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_f16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16m4( @@ -49,7 +49,7 @@ void test_vsuxei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16m4(_Float16 *base, vuint16m4_t bindex, vfloat16m4_t value, size_t vl) { - return vsuxei16_v_f16m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_f16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16m8( @@ -58,7 +58,7 @@ void test_vsuxei16_v_f16m4(_Float16 *base, vuint16m4_t bindex, vfloat16m4_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16m8(_Float16 *base, vuint16m8_t bindex, vfloat16m8_t value, size_t vl) { - return vsuxei16_v_f16m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_f16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32mf2( @@ -67,7 +67,7 @@ void test_vsuxei16_v_f16m8(_Float16 *base, vuint16m8_t bindex, vfloat16m8_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t value, size_t vl) { - return vsuxei16_v_f32mf2(base, bindex, value, vl); + return __riscv_vsuxei16_v_f32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32m1( @@ -76,7 +76,7 @@ void test_vsuxei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t value, size_t vl) { - return vsuxei16_v_f32m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_f32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32m2( @@ -85,7 +85,7 @@ void test_vsuxei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t value, size_t vl) { - return vsuxei16_v_f32m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_f32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32m4( @@ -94,7 +94,7 @@ void test_vsuxei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32m4(float *base, vuint16m2_t bindex, vfloat32m4_t value, size_t vl) { - return vsuxei16_v_f32m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_f32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32m8( @@ -103,7 +103,7 @@ void test_vsuxei16_v_f32m4(float *base, vuint16m2_t bindex, vfloat32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32m8(float *base, vuint16m4_t bindex, vfloat32m8_t value, size_t vl) { - return vsuxei16_v_f32m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_f32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f64m1( @@ -112,7 +112,7 @@ void test_vsuxei16_v_f32m8(float *base, vuint16m4_t bindex, vfloat32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t value, size_t vl) { - return vsuxei16_v_f64m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_f64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f64m2( @@ -121,7 +121,7 @@ void test_vsuxei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t value, size_t vl) { - return vsuxei16_v_f64m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_f64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f64m4( @@ -130,7 +130,7 @@ void test_vsuxei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f64m4(double *base, vuint16m1_t bindex, vfloat64m4_t value, size_t vl) { - return vsuxei16_v_f64m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_f64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f64m8( @@ -139,7 +139,7 @@ void test_vsuxei16_v_f64m4(double *base, vuint16m1_t bindex, vfloat64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f64m8(double *base, vuint16m2_t bindex, vfloat64m8_t value, size_t vl) { - return vsuxei16_v_f64m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_f64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8mf8( @@ -148,7 +148,7 @@ void test_vsuxei16_v_f64m8(double *base, vuint16m2_t bindex, vfloat64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t value, size_t vl) { - return vsuxei16_v_i8mf8(base, bindex, value, vl); + return __riscv_vsuxei16_v_i8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8mf4( @@ -157,7 +157,7 @@ void test_vsuxei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t value, size_t vl) { - return vsuxei16_v_i8mf4(base, bindex, value, vl); + return __riscv_vsuxei16_v_i8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8mf2( @@ -166,7 +166,7 @@ void test_vsuxei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t value, size_t vl) { - return vsuxei16_v_i8mf2(base, bindex, value, vl); + return __riscv_vsuxei16_v_i8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8m1( @@ -175,7 +175,7 @@ void test_vsuxei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t value, size_t vl) { - return vsuxei16_v_i8m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_i8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8m2( @@ -184,7 +184,7 @@ void test_vsuxei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t value, size_t vl) { - return vsuxei16_v_i8m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_i8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8m4( @@ -193,7 +193,7 @@ void test_vsuxei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8m4(int8_t *base, vuint16m8_t bindex, vint8m4_t value, size_t vl) { - return vsuxei16_v_i8m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_i8m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16mf4( @@ -202,7 +202,7 @@ void test_vsuxei16_v_i8m4(int8_t *base, vuint16m8_t bindex, vint8m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t value, size_t vl) { - return vsuxei16_v_i16mf4(base, bindex, value, vl); + return __riscv_vsuxei16_v_i16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16mf2( @@ -211,7 +211,7 @@ void test_vsuxei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t value, size_t vl) { - return vsuxei16_v_i16mf2(base, bindex, value, vl); + return __riscv_vsuxei16_v_i16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16m1( @@ -220,7 +220,7 @@ void test_vsuxei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t value, size_t vl) { - return vsuxei16_v_i16m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_i16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16m2( @@ -229,7 +229,7 @@ void test_vsuxei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t value, size_t vl) { - return vsuxei16_v_i16m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_i16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16m4( @@ -238,7 +238,7 @@ void test_vsuxei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16m4(int16_t *base, vuint16m4_t bindex, vint16m4_t value, size_t vl) { - return vsuxei16_v_i16m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_i16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16m8( @@ -247,7 +247,7 @@ void test_vsuxei16_v_i16m4(int16_t *base, vuint16m4_t bindex, vint16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16m8(int16_t *base, vuint16m8_t bindex, vint16m8_t value, size_t vl) { - return vsuxei16_v_i16m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_i16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32mf2( @@ -256,7 +256,7 @@ void test_vsuxei16_v_i16m8(int16_t *base, vuint16m8_t bindex, vint16m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) { - return vsuxei16_v_i32mf2(base, bindex, value, vl); + return __riscv_vsuxei16_v_i32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32m1( @@ -265,7 +265,7 @@ void test_vsuxei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) { - return vsuxei16_v_i32m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_i32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32m2( @@ -274,7 +274,7 @@ void test_vsuxei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) { - return vsuxei16_v_i32m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_i32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32m4( @@ -283,7 +283,7 @@ void test_vsuxei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32m4(int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) { - return vsuxei16_v_i32m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_i32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32m8( @@ -292,7 +292,7 @@ void test_vsuxei16_v_i32m4(int32_t *base, vuint16m2_t bindex, vint32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32m8(int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) { - return vsuxei16_v_i32m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_i32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i64m1( @@ -301,7 +301,7 @@ void test_vsuxei16_v_i32m8(int32_t *base, vuint16m4_t bindex, vint32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) { - return vsuxei16_v_i64m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_i64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i64m2( @@ -310,7 +310,7 @@ void test_vsuxei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) { - return vsuxei16_v_i64m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_i64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i64m4( @@ -319,7 +319,7 @@ void test_vsuxei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i64m4(int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) { - return vsuxei16_v_i64m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_i64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i64m8( @@ -328,7 +328,7 @@ void test_vsuxei16_v_i64m4(int64_t *base, vuint16m1_t bindex, vint64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i64m8(int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) { - return vsuxei16_v_i64m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_i64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8mf8( @@ -337,7 +337,7 @@ void test_vsuxei16_v_i64m8(int64_t *base, vuint16m2_t bindex, vint64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t value, size_t vl) { - return vsuxei16_v_u8mf8(base, bindex, value, vl); + return __riscv_vsuxei16_v_u8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8mf4( @@ -346,7 +346,7 @@ void test_vsuxei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t value, size_t vl) { - return vsuxei16_v_u8mf4(base, bindex, value, vl); + return __riscv_vsuxei16_v_u8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8mf2( @@ -355,7 +355,7 @@ void test_vsuxei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t value, size_t vl) { - return vsuxei16_v_u8mf2(base, bindex, value, vl); + return __riscv_vsuxei16_v_u8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8m1( @@ -364,7 +364,7 @@ void test_vsuxei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t value, size_t vl) { - return vsuxei16_v_u8m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_u8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8m2( @@ -373,7 +373,7 @@ void test_vsuxei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t value, size_t vl) { - return vsuxei16_v_u8m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_u8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8m4( @@ -382,7 +382,7 @@ void test_vsuxei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8m4(uint8_t *base, vuint16m8_t bindex, vuint8m4_t value, size_t vl) { - return vsuxei16_v_u8m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_u8m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16mf4( @@ -391,7 +391,7 @@ void test_vsuxei16_v_u8m4(uint8_t *base, vuint16m8_t bindex, vuint8m4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t value, size_t vl) { - return vsuxei16_v_u16mf4(base, bindex, value, vl); + return __riscv_vsuxei16_v_u16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16mf2( @@ -400,7 +400,7 @@ void test_vsuxei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t va // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t value, size_t vl) { - return vsuxei16_v_u16mf2(base, bindex, value, vl); + return __riscv_vsuxei16_v_u16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16m1( @@ -409,7 +409,7 @@ void test_vsuxei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t value, size_t vl) { - return vsuxei16_v_u16m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_u16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16m2( @@ -418,7 +418,7 @@ void test_vsuxei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t value, size_t vl) { - return vsuxei16_v_u16m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_u16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16m4( @@ -427,7 +427,7 @@ void test_vsuxei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16m4(uint16_t *base, vuint16m4_t bindex, vuint16m4_t value, size_t vl) { - return vsuxei16_v_u16m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_u16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16m8( @@ -436,7 +436,7 @@ void test_vsuxei16_v_u16m4(uint16_t *base, vuint16m4_t bindex, vuint16m4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16m8(uint16_t *base, vuint16m8_t bindex, vuint16m8_t value, size_t vl) { - return vsuxei16_v_u16m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_u16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32mf2( @@ -445,7 +445,7 @@ void test_vsuxei16_v_u16m8(uint16_t *base, vuint16m8_t bindex, vuint16m8_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) { - return vsuxei16_v_u32mf2(base, bindex, value, vl); + return __riscv_vsuxei16_v_u32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32m1( @@ -454,7 +454,7 @@ void test_vsuxei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) { - return vsuxei16_v_u32m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_u32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32m2( @@ -463,7 +463,7 @@ void test_vsuxei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) { - return vsuxei16_v_u32m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_u32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32m4( @@ -472,7 +472,7 @@ void test_vsuxei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32m4(uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) { - return vsuxei16_v_u32m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_u32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32m8( @@ -481,7 +481,7 @@ void test_vsuxei16_v_u32m4(uint32_t *base, vuint16m2_t bindex, vuint32m4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32m8(uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) { - return vsuxei16_v_u32m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_u32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u64m1( @@ -490,7 +490,7 @@ void test_vsuxei16_v_u32m8(uint32_t *base, vuint16m4_t bindex, vuint32m8_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) { - return vsuxei16_v_u64m1(base, bindex, value, vl); + return __riscv_vsuxei16_v_u64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u64m2( @@ -499,7 +499,7 @@ void test_vsuxei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) { - return vsuxei16_v_u64m2(base, bindex, value, vl); + return __riscv_vsuxei16_v_u64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u64m4( @@ -508,7 +508,7 @@ void test_vsuxei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u64m4(uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) { - return vsuxei16_v_u64m4(base, bindex, value, vl); + return __riscv_vsuxei16_v_u64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u64m8( @@ -517,7 +517,7 @@ void test_vsuxei16_v_u64m4(uint64_t *base, vuint16m1_t bindex, vuint64m4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u64m8(uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) { - return vsuxei16_v_u64m8(base, bindex, value, vl); + return __riscv_vsuxei16_v_u64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16mf4_m( @@ -526,7 +526,7 @@ void test_vsuxei16_v_u64m8(uint64_t *base, vuint16m2_t bindex, vuint64m8_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t value, size_t vl) { - return vsuxei16_v_f16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16mf2_m( @@ -535,7 +535,7 @@ void test_vsuxei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t value, size_t vl) { - return vsuxei16_v_f16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16m1_m( @@ -544,7 +544,7 @@ void test_vsuxei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t value, size_t vl) { - return vsuxei16_v_f16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16m2_m( @@ -553,7 +553,7 @@ void test_vsuxei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, vfloat16m2_t value, size_t vl) { - return vsuxei16_v_f16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16m4_m( @@ -562,7 +562,7 @@ void test_vsuxei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint16m4_t bindex, vfloat16m4_t value, size_t vl) { - return vsuxei16_v_f16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f16m8_m( @@ -571,7 +571,7 @@ void test_vsuxei16_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint16m8_t bindex, vfloat16m8_t value, size_t vl) { - return vsuxei16_v_f16m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32mf2_m( @@ -580,7 +580,7 @@ void test_vsuxei16_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint16m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t value, size_t vl) { - return vsuxei16_v_f32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32m1_m( @@ -589,7 +589,7 @@ void test_vsuxei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t value, size_t vl) { - return vsuxei16_v_f32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32m2_m( @@ -598,7 +598,7 @@ void test_vsuxei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vfloat32m2_t value, size_t vl) { - return vsuxei16_v_f32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32m4_m( @@ -607,7 +607,7 @@ void test_vsuxei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32m4_m(vbool8_t mask, float *base, vuint16m2_t bindex, vfloat32m4_t value, size_t vl) { - return vsuxei16_v_f32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f32m8_m( @@ -616,7 +616,7 @@ void test_vsuxei16_v_f32m4_m(vbool8_t mask, float *base, vuint16m2_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f32m8_m(vbool4_t mask, float *base, vuint16m4_t bindex, vfloat32m8_t value, size_t vl) { - return vsuxei16_v_f32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f64m1_m( @@ -625,7 +625,7 @@ void test_vsuxei16_v_f32m8_m(vbool4_t mask, float *base, vuint16m4_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t value, size_t vl) { - return vsuxei16_v_f64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f64m2_m( @@ -634,7 +634,7 @@ void test_vsuxei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, vfloat64m2_t value, size_t vl) { - return vsuxei16_v_f64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f64m4_m( @@ -643,7 +643,7 @@ void test_vsuxei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f64m4_m(vbool16_t mask, double *base, vuint16m1_t bindex, vfloat64m4_t value, size_t vl) { - return vsuxei16_v_f64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_f64m8_m( @@ -652,7 +652,7 @@ void test_vsuxei16_v_f64m4_m(vbool16_t mask, double *base, vuint16m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_f64m8_m(vbool8_t mask, double *base, vuint16m2_t bindex, vfloat64m8_t value, size_t vl) { - return vsuxei16_v_f64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_f64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8mf8_m( @@ -661,7 +661,7 @@ void test_vsuxei16_v_f64m8_m(vbool8_t mask, double *base, vuint16m2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t value, size_t vl) { - return vsuxei16_v_i8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8mf4_m( @@ -670,7 +670,7 @@ void test_vsuxei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t value, size_t vl) { - return vsuxei16_v_i8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8mf2_m( @@ -679,7 +679,7 @@ void test_vsuxei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t value, size_t vl) { - return vsuxei16_v_i8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8m1_m( @@ -688,7 +688,7 @@ void test_vsuxei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t value, size_t vl) { - return vsuxei16_v_i8m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8m2_m( @@ -697,7 +697,7 @@ void test_vsuxei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vint8m2_t value, size_t vl) { - return vsuxei16_v_i8m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i8m4_m( @@ -706,7 +706,7 @@ void test_vsuxei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i8m4_m(vbool2_t mask, int8_t *base, vuint16m8_t bindex, vint8m4_t value, size_t vl) { - return vsuxei16_v_i8m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i8m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16mf4_m( @@ -715,7 +715,7 @@ void test_vsuxei16_v_i8m4_m(vbool2_t mask, int8_t *base, vuint16m8_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t value, size_t vl) { - return vsuxei16_v_i16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16mf2_m( @@ -724,7 +724,7 @@ void test_vsuxei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t value, size_t vl) { - return vsuxei16_v_i16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16m1_m( @@ -733,7 +733,7 @@ void test_vsuxei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t value, size_t vl) { - return vsuxei16_v_i16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16m2_m( @@ -742,7 +742,7 @@ void test_vsuxei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, vint16m2_t value, size_t vl) { - return vsuxei16_v_i16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16m4_m( @@ -751,7 +751,7 @@ void test_vsuxei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16m4_m(vbool4_t mask, int16_t *base, vuint16m4_t bindex, vint16m4_t value, size_t vl) { - return vsuxei16_v_i16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i16m8_m( @@ -760,7 +760,7 @@ void test_vsuxei16_v_i16m4_m(vbool4_t mask, int16_t *base, vuint16m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i16m8_m(vbool2_t mask, int16_t *base, vuint16m8_t bindex, vint16m8_t value, size_t vl) { - return vsuxei16_v_i16m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32mf2_m( @@ -769,7 +769,7 @@ void test_vsuxei16_v_i16m8_m(vbool2_t mask, int16_t *base, vuint16m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t value, size_t vl) { - return vsuxei16_v_i32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32m1_m( @@ -778,7 +778,7 @@ void test_vsuxei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t value, size_t vl) { - return vsuxei16_v_i32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32m2_m( @@ -787,7 +787,7 @@ void test_vsuxei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t value, size_t vl) { - return vsuxei16_v_i32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32m4_m( @@ -796,7 +796,7 @@ void test_vsuxei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32m4_m(vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t value, size_t vl) { - return vsuxei16_v_i32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i32m8_m( @@ -805,7 +805,7 @@ void test_vsuxei16_v_i32m4_m(vbool8_t mask, int32_t *base, vuint16m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i32m8_m(vbool4_t mask, int32_t *base, vuint16m4_t bindex, vint32m8_t value, size_t vl) { - return vsuxei16_v_i32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i64m1_m( @@ -814,7 +814,7 @@ void test_vsuxei16_v_i32m8_m(vbool4_t mask, int32_t *base, vuint16m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t value, size_t vl) { - return vsuxei16_v_i64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i64m2_m( @@ -823,7 +823,7 @@ void test_vsuxei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t value, size_t vl) { - return vsuxei16_v_i64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i64m4_m( @@ -832,7 +832,7 @@ void test_vsuxei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i64m4_m(vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t value, size_t vl) { - return vsuxei16_v_i64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_i64m8_m( @@ -841,7 +841,7 @@ void test_vsuxei16_v_i64m4_m(vbool16_t mask, int64_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_i64m8_m(vbool8_t mask, int64_t *base, vuint16m2_t bindex, vint64m8_t value, size_t vl) { - return vsuxei16_v_i64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_i64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8mf8_m( @@ -850,7 +850,7 @@ void test_vsuxei16_v_i64m8_m(vbool8_t mask, int64_t *base, vuint16m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t value, size_t vl) { - return vsuxei16_v_u8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8mf4_m( @@ -859,7 +859,7 @@ void test_vsuxei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t value, size_t vl) { - return vsuxei16_v_u8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8mf2_m( @@ -868,7 +868,7 @@ void test_vsuxei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t value, size_t vl) { - return vsuxei16_v_u8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8m1_m( @@ -877,7 +877,7 @@ void test_vsuxei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t value, size_t vl) { - return vsuxei16_v_u8m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8m2_m( @@ -886,7 +886,7 @@ void test_vsuxei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vuint8m2_t value, size_t vl) { - return vsuxei16_v_u8m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u8m4_m( @@ -895,7 +895,7 @@ void test_vsuxei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint16m8_t bindex, vuint8m4_t value, size_t vl) { - return vsuxei16_v_u8m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u8m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16mf4_m( @@ -904,7 +904,7 @@ void test_vsuxei16_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint16m8_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t value, size_t vl) { - return vsuxei16_v_u16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16mf2_m( @@ -913,7 +913,7 @@ void test_vsuxei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t value, size_t vl) { - return vsuxei16_v_u16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16m1_m( @@ -922,7 +922,7 @@ void test_vsuxei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t value, size_t vl) { - return vsuxei16_v_u16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16m2_m( @@ -931,7 +931,7 @@ void test_vsuxei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, vuint16m2_t value, size_t vl) { - return vsuxei16_v_u16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16m4_m( @@ -940,7 +940,7 @@ void test_vsuxei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t bindex, vuint16m4_t value, size_t vl) { - return vsuxei16_v_u16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u16m8_m( @@ -949,7 +949,7 @@ void test_vsuxei16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint16m8_t bindex, vuint16m8_t value, size_t vl) { - return vsuxei16_v_u16m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32mf2_m( @@ -958,7 +958,7 @@ void test_vsuxei16_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint16m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t value, size_t vl) { - return vsuxei16_v_u32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32m1_m( @@ -967,7 +967,7 @@ void test_vsuxei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t value, size_t vl) { - return vsuxei16_v_u32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32m2_m( @@ -976,7 +976,7 @@ void test_vsuxei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t value, size_t vl) { - return vsuxei16_v_u32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32m4_m( @@ -985,7 +985,7 @@ void test_vsuxei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t value, size_t vl) { - return vsuxei16_v_u32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u32m8_m( @@ -994,7 +994,7 @@ void test_vsuxei16_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint16m4_t bindex, vuint32m8_t value, size_t vl) { - return vsuxei16_v_u32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u64m1_m( @@ -1003,7 +1003,7 @@ void test_vsuxei16_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t value, size_t vl) { - return vsuxei16_v_u64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u64m2_m( @@ -1012,7 +1012,7 @@ void test_vsuxei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t value, size_t vl) { - return vsuxei16_v_u64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u64m4_m( @@ -1021,7 +1021,7 @@ void test_vsuxei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t value, size_t vl) { - return vsuxei16_v_u64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei16_v_u64m8_m( @@ -1030,6 +1030,6 @@ void test_vsuxei16_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint16m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei16_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint16m2_t bindex, vuint64m8_t value, size_t vl) { - return vsuxei16_v_u64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei16_v_u64m8_m(mask, base, bindex, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei32.c index 18a0b5e1151f1df3b3b4b62deb35cea92642d481..43df0ce5f0a3c4eafb3cf82b8c370549bf1a78af 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t value, size_t vl) { - return vsuxei32_v_f16mf4(base, bindex, value, vl); + return __riscv_vsuxei32_v_f16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t value, size_t vl) { - return vsuxei32_v_f16mf2(base, bindex, value, vl); + return __riscv_vsuxei32_v_f16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t value, size_t vl) { - return vsuxei32_v_f16m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_f16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t value, size_t vl) { - return vsuxei32_v_f16m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_f16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16m4( @@ -49,7 +49,7 @@ void test_vsuxei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16m4(_Float16 *base, vuint32m8_t bindex, vfloat16m4_t value, size_t vl) { - return vsuxei32_v_f16m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_f16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32mf2( @@ -58,7 +58,7 @@ void test_vsuxei32_v_f16m4(_Float16 *base, vuint32m8_t bindex, vfloat16m4_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t value, size_t vl) { - return vsuxei32_v_f32mf2(base, bindex, value, vl); + return __riscv_vsuxei32_v_f32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32m1( @@ -67,7 +67,7 @@ void test_vsuxei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t value, size_t vl) { - return vsuxei32_v_f32m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_f32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32m2( @@ -76,7 +76,7 @@ void test_vsuxei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t value, size_t vl) { - return vsuxei32_v_f32m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_f32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32m4( @@ -85,7 +85,7 @@ void test_vsuxei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32m4(float *base, vuint32m4_t bindex, vfloat32m4_t value, size_t vl) { - return vsuxei32_v_f32m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_f32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32m8( @@ -94,7 +94,7 @@ void test_vsuxei32_v_f32m4(float *base, vuint32m4_t bindex, vfloat32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32m8(float *base, vuint32m8_t bindex, vfloat32m8_t value, size_t vl) { - return vsuxei32_v_f32m8(base, bindex, value, vl); + return __riscv_vsuxei32_v_f32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f64m1( @@ -103,7 +103,7 @@ void test_vsuxei32_v_f32m8(float *base, vuint32m8_t bindex, vfloat32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t value, size_t vl) { - return vsuxei32_v_f64m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_f64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f64m2( @@ -112,7 +112,7 @@ void test_vsuxei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t value, size_t vl) { - return vsuxei32_v_f64m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_f64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f64m4( @@ -121,7 +121,7 @@ void test_vsuxei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f64m4(double *base, vuint32m2_t bindex, vfloat64m4_t value, size_t vl) { - return vsuxei32_v_f64m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_f64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f64m8( @@ -130,7 +130,7 @@ void test_vsuxei32_v_f64m4(double *base, vuint32m2_t bindex, vfloat64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f64m8(double *base, vuint32m4_t bindex, vfloat64m8_t value, size_t vl) { - return vsuxei32_v_f64m8(base, bindex, value, vl); + return __riscv_vsuxei32_v_f64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8mf8( @@ -139,7 +139,7 @@ void test_vsuxei32_v_f64m8(double *base, vuint32m4_t bindex, vfloat64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t value, size_t vl) { - return vsuxei32_v_i8mf8(base, bindex, value, vl); + return __riscv_vsuxei32_v_i8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8mf4( @@ -148,7 +148,7 @@ void test_vsuxei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t value, size_t vl) { - return vsuxei32_v_i8mf4(base, bindex, value, vl); + return __riscv_vsuxei32_v_i8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8mf2( @@ -157,7 +157,7 @@ void test_vsuxei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t value, size_t vl) { - return vsuxei32_v_i8mf2(base, bindex, value, vl); + return __riscv_vsuxei32_v_i8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8m1( @@ -166,7 +166,7 @@ void test_vsuxei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t value, size_t vl) { - return vsuxei32_v_i8m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_i8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8m2( @@ -175,7 +175,7 @@ void test_vsuxei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t value, size_t vl) { - return vsuxei32_v_i8m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_i8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16mf4( @@ -184,7 +184,7 @@ void test_vsuxei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t value, size_t vl) { - return vsuxei32_v_i16mf4(base, bindex, value, vl); + return __riscv_vsuxei32_v_i16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16mf2( @@ -193,7 +193,7 @@ void test_vsuxei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t value, size_t vl) { - return vsuxei32_v_i16mf2(base, bindex, value, vl); + return __riscv_vsuxei32_v_i16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16m1( @@ -202,7 +202,7 @@ void test_vsuxei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t value, size_t vl) { - return vsuxei32_v_i16m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_i16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16m2( @@ -211,7 +211,7 @@ void test_vsuxei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t value, size_t vl) { - return vsuxei32_v_i16m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_i16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16m4( @@ -220,7 +220,7 @@ void test_vsuxei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16m4(int16_t *base, vuint32m8_t bindex, vint16m4_t value, size_t vl) { - return vsuxei32_v_i16m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_i16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32mf2( @@ -229,7 +229,7 @@ void test_vsuxei32_v_i16m4(int16_t *base, vuint32m8_t bindex, vint16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) { - return vsuxei32_v_i32mf2(base, bindex, value, vl); + return __riscv_vsuxei32_v_i32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32m1( @@ -238,7 +238,7 @@ void test_vsuxei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) { - return vsuxei32_v_i32m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_i32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32m2( @@ -247,7 +247,7 @@ void test_vsuxei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) { - return vsuxei32_v_i32m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_i32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32m4( @@ -256,7 +256,7 @@ void test_vsuxei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32m4(int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) { - return vsuxei32_v_i32m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_i32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32m8( @@ -265,7 +265,7 @@ void test_vsuxei32_v_i32m4(int32_t *base, vuint32m4_t bindex, vint32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32m8(int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) { - return vsuxei32_v_i32m8(base, bindex, value, vl); + return __riscv_vsuxei32_v_i32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i64m1( @@ -274,7 +274,7 @@ void test_vsuxei32_v_i32m8(int32_t *base, vuint32m8_t bindex, vint32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) { - return vsuxei32_v_i64m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_i64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i64m2( @@ -283,7 +283,7 @@ void test_vsuxei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) { - return vsuxei32_v_i64m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_i64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i64m4( @@ -292,7 +292,7 @@ void test_vsuxei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i64m4(int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) { - return vsuxei32_v_i64m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_i64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i64m8( @@ -301,7 +301,7 @@ void test_vsuxei32_v_i64m4(int64_t *base, vuint32m2_t bindex, vint64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i64m8(int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) { - return vsuxei32_v_i64m8(base, bindex, value, vl); + return __riscv_vsuxei32_v_i64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8mf8( @@ -310,7 +310,7 @@ void test_vsuxei32_v_i64m8(int64_t *base, vuint32m4_t bindex, vint64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t value, size_t vl) { - return vsuxei32_v_u8mf8(base, bindex, value, vl); + return __riscv_vsuxei32_v_u8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8mf4( @@ -319,7 +319,7 @@ void test_vsuxei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t value, size_t vl) { - return vsuxei32_v_u8mf4(base, bindex, value, vl); + return __riscv_vsuxei32_v_u8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8mf2( @@ -328,7 +328,7 @@ void test_vsuxei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t value, size_t vl) { - return vsuxei32_v_u8mf2(base, bindex, value, vl); + return __riscv_vsuxei32_v_u8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8m1( @@ -337,7 +337,7 @@ void test_vsuxei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t value, size_t vl) { - return vsuxei32_v_u8m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_u8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8m2( @@ -346,7 +346,7 @@ void test_vsuxei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t value, size_t vl) { - return vsuxei32_v_u8m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_u8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16mf4( @@ -355,7 +355,7 @@ void test_vsuxei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t value, size_t vl) { - return vsuxei32_v_u16mf4(base, bindex, value, vl); + return __riscv_vsuxei32_v_u16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16mf2( @@ -364,7 +364,7 @@ void test_vsuxei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t va // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t value, size_t vl) { - return vsuxei32_v_u16mf2(base, bindex, value, vl); + return __riscv_vsuxei32_v_u16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16m1( @@ -373,7 +373,7 @@ void test_vsuxei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t val // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t value, size_t vl) { - return vsuxei32_v_u16m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_u16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16m2( @@ -382,7 +382,7 @@ void test_vsuxei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t value, size_t vl) { - return vsuxei32_v_u16m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_u16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16m4( @@ -391,7 +391,7 @@ void test_vsuxei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16m4(uint16_t *base, vuint32m8_t bindex, vuint16m4_t value, size_t vl) { - return vsuxei32_v_u16m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_u16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32mf2( @@ -400,7 +400,7 @@ void test_vsuxei32_v_u16m4(uint16_t *base, vuint32m8_t bindex, vuint16m4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) { - return vsuxei32_v_u32mf2(base, bindex, value, vl); + return __riscv_vsuxei32_v_u32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32m1( @@ -409,7 +409,7 @@ void test_vsuxei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) { - return vsuxei32_v_u32m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_u32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32m2( @@ -418,7 +418,7 @@ void test_vsuxei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) { - return vsuxei32_v_u32m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_u32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32m4( @@ -427,7 +427,7 @@ void test_vsuxei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32m4(uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) { - return vsuxei32_v_u32m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_u32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32m8( @@ -436,7 +436,7 @@ void test_vsuxei32_v_u32m4(uint32_t *base, vuint32m4_t bindex, vuint32m4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32m8(uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) { - return vsuxei32_v_u32m8(base, bindex, value, vl); + return __riscv_vsuxei32_v_u32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u64m1( @@ -445,7 +445,7 @@ void test_vsuxei32_v_u32m8(uint32_t *base, vuint32m8_t bindex, vuint32m8_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) { - return vsuxei32_v_u64m1(base, bindex, value, vl); + return __riscv_vsuxei32_v_u64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u64m2( @@ -454,7 +454,7 @@ void test_vsuxei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) { - return vsuxei32_v_u64m2(base, bindex, value, vl); + return __riscv_vsuxei32_v_u64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u64m4( @@ -463,7 +463,7 @@ void test_vsuxei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u64m4(uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) { - return vsuxei32_v_u64m4(base, bindex, value, vl); + return __riscv_vsuxei32_v_u64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u64m8( @@ -472,7 +472,7 @@ void test_vsuxei32_v_u64m4(uint64_t *base, vuint32m2_t bindex, vuint64m4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u64m8(uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) { - return vsuxei32_v_u64m8(base, bindex, value, vl); + return __riscv_vsuxei32_v_u64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16mf4_m( @@ -481,7 +481,7 @@ void test_vsuxei32_v_u64m8(uint64_t *base, vuint32m4_t bindex, vuint64m8_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t value, size_t vl) { - return vsuxei32_v_f16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16mf2_m( @@ -490,7 +490,7 @@ void test_vsuxei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t value, size_t vl) { - return vsuxei32_v_f16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16m1_m( @@ -499,7 +499,7 @@ void test_vsuxei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t value, size_t vl) { - return vsuxei32_v_f16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16m2_m( @@ -508,7 +508,7 @@ void test_vsuxei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, vfloat16m2_t value, size_t vl) { - return vsuxei32_v_f16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f16m4_m( @@ -517,7 +517,7 @@ void test_vsuxei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint32m8_t bindex, vfloat16m4_t value, size_t vl) { - return vsuxei32_v_f16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32mf2_m( @@ -526,7 +526,7 @@ void test_vsuxei32_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t value, size_t vl) { - return vsuxei32_v_f32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32m1_m( @@ -535,7 +535,7 @@ void test_vsuxei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t value, size_t vl) { - return vsuxei32_v_f32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32m2_m( @@ -544,7 +544,7 @@ void test_vsuxei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vfloat32m2_t value, size_t vl) { - return vsuxei32_v_f32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32m4_m( @@ -553,7 +553,7 @@ void test_vsuxei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32m4_m(vbool8_t mask, float *base, vuint32m4_t bindex, vfloat32m4_t value, size_t vl) { - return vsuxei32_v_f32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f32m8_m( @@ -562,7 +562,7 @@ void test_vsuxei32_v_f32m4_m(vbool8_t mask, float *base, vuint32m4_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f32m8_m(vbool4_t mask, float *base, vuint32m8_t bindex, vfloat32m8_t value, size_t vl) { - return vsuxei32_v_f32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f64m1_m( @@ -571,7 +571,7 @@ void test_vsuxei32_v_f32m8_m(vbool4_t mask, float *base, vuint32m8_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t value, size_t vl) { - return vsuxei32_v_f64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f64m2_m( @@ -580,7 +580,7 @@ void test_vsuxei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, vfloat64m2_t value, size_t vl) { - return vsuxei32_v_f64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f64m4_m( @@ -589,7 +589,7 @@ void test_vsuxei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f64m4_m(vbool16_t mask, double *base, vuint32m2_t bindex, vfloat64m4_t value, size_t vl) { - return vsuxei32_v_f64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_f64m8_m( @@ -598,7 +598,7 @@ void test_vsuxei32_v_f64m4_m(vbool16_t mask, double *base, vuint32m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_f64m8_m(vbool8_t mask, double *base, vuint32m4_t bindex, vfloat64m8_t value, size_t vl) { - return vsuxei32_v_f64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_f64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8mf8_m( @@ -607,7 +607,7 @@ void test_vsuxei32_v_f64m8_m(vbool8_t mask, double *base, vuint32m4_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t value, size_t vl) { - return vsuxei32_v_i8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8mf4_m( @@ -616,7 +616,7 @@ void test_vsuxei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t value, size_t vl) { - return vsuxei32_v_i8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8mf2_m( @@ -625,7 +625,7 @@ void test_vsuxei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t value, size_t vl) { - return vsuxei32_v_i8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8m1_m( @@ -634,7 +634,7 @@ void test_vsuxei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t value, size_t vl) { - return vsuxei32_v_i8m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i8m2_m( @@ -643,7 +643,7 @@ void test_vsuxei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vint8m2_t value, size_t vl) { - return vsuxei32_v_i8m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16mf4_m( @@ -652,7 +652,7 @@ void test_vsuxei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t value, size_t vl) { - return vsuxei32_v_i16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16mf2_m( @@ -661,7 +661,7 @@ void test_vsuxei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t value, size_t vl) { - return vsuxei32_v_i16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16m1_m( @@ -670,7 +670,7 @@ void test_vsuxei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t value, size_t vl) { - return vsuxei32_v_i16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16m2_m( @@ -679,7 +679,7 @@ void test_vsuxei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, vint16m2_t value, size_t vl) { - return vsuxei32_v_i16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i16m4_m( @@ -688,7 +688,7 @@ void test_vsuxei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i16m4_m(vbool4_t mask, int16_t *base, vuint32m8_t bindex, vint16m4_t value, size_t vl) { - return vsuxei32_v_i16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32mf2_m( @@ -697,7 +697,7 @@ void test_vsuxei32_v_i16m4_m(vbool4_t mask, int16_t *base, vuint32m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t value, size_t vl) { - return vsuxei32_v_i32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32m1_m( @@ -706,7 +706,7 @@ void test_vsuxei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t value, size_t vl) { - return vsuxei32_v_i32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32m2_m( @@ -715,7 +715,7 @@ void test_vsuxei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t value, size_t vl) { - return vsuxei32_v_i32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32m4_m( @@ -724,7 +724,7 @@ void test_vsuxei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32m4_m(vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t value, size_t vl) { - return vsuxei32_v_i32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i32m8_m( @@ -733,7 +733,7 @@ void test_vsuxei32_v_i32m4_m(vbool8_t mask, int32_t *base, vuint32m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i32m8_m(vbool4_t mask, int32_t *base, vuint32m8_t bindex, vint32m8_t value, size_t vl) { - return vsuxei32_v_i32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i64m1_m( @@ -742,7 +742,7 @@ void test_vsuxei32_v_i32m8_m(vbool4_t mask, int32_t *base, vuint32m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t value, size_t vl) { - return vsuxei32_v_i64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i64m2_m( @@ -751,7 +751,7 @@ void test_vsuxei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t value, size_t vl) { - return vsuxei32_v_i64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i64m4_m( @@ -760,7 +760,7 @@ void test_vsuxei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i64m4_m(vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t value, size_t vl) { - return vsuxei32_v_i64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_i64m8_m( @@ -769,7 +769,7 @@ void test_vsuxei32_v_i64m4_m(vbool16_t mask, int64_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_i64m8_m(vbool8_t mask, int64_t *base, vuint32m4_t bindex, vint64m8_t value, size_t vl) { - return vsuxei32_v_i64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_i64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8mf8_m( @@ -778,7 +778,7 @@ void test_vsuxei32_v_i64m8_m(vbool8_t mask, int64_t *base, vuint32m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t value, size_t vl) { - return vsuxei32_v_u8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8mf4_m( @@ -787,7 +787,7 @@ void test_vsuxei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t value, size_t vl) { - return vsuxei32_v_u8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8mf2_m( @@ -796,7 +796,7 @@ void test_vsuxei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t value, size_t vl) { - return vsuxei32_v_u8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8m1_m( @@ -805,7 +805,7 @@ void test_vsuxei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t value, size_t vl) { - return vsuxei32_v_u8m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u8m2_m( @@ -814,7 +814,7 @@ void test_vsuxei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vuint8m2_t value, size_t vl) { - return vsuxei32_v_u8m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16mf4_m( @@ -823,7 +823,7 @@ void test_vsuxei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t value, size_t vl) { - return vsuxei32_v_u16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16mf2_m( @@ -832,7 +832,7 @@ void test_vsuxei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t value, size_t vl) { - return vsuxei32_v_u16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16m1_m( @@ -841,7 +841,7 @@ void test_vsuxei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t value, size_t vl) { - return vsuxei32_v_u16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16m2_m( @@ -850,7 +850,7 @@ void test_vsuxei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, vuint16m2_t value, size_t vl) { - return vsuxei32_v_u16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u16m4_m( @@ -859,7 +859,7 @@ void test_vsuxei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint32m8_t bindex, vuint16m4_t value, size_t vl) { - return vsuxei32_v_u16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32mf2_m( @@ -868,7 +868,7 @@ void test_vsuxei32_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t value, size_t vl) { - return vsuxei32_v_u32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32m1_m( @@ -877,7 +877,7 @@ void test_vsuxei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t value, size_t vl) { - return vsuxei32_v_u32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32m2_m( @@ -886,7 +886,7 @@ void test_vsuxei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t value, size_t vl) { - return vsuxei32_v_u32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32m4_m( @@ -895,7 +895,7 @@ void test_vsuxei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t value, size_t vl) { - return vsuxei32_v_u32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u32m8_m( @@ -904,7 +904,7 @@ void test_vsuxei32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint32m8_t bindex, vuint32m8_t value, size_t vl) { - return vsuxei32_v_u32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u64m1_m( @@ -913,7 +913,7 @@ void test_vsuxei32_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t value, size_t vl) { - return vsuxei32_v_u64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u64m2_m( @@ -922,7 +922,7 @@ void test_vsuxei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t value, size_t vl) { - return vsuxei32_v_u64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u64m4_m( @@ -931,7 +931,7 @@ void test_vsuxei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t value, size_t vl) { - return vsuxei32_v_u64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei32_v_u64m8_m( @@ -940,6 +940,6 @@ void test_vsuxei32_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint32m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei32_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint32m4_t bindex, vuint64m8_t value, size_t vl) { - return vsuxei32_v_u64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei32_v_u64m8_m(mask, base, bindex, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei64.c index 5c371bc05686d5be6122895270325a1264fa033d..68b8c467ff4d956ff03c8e952e027aa32889e503 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t value, size_t vl) { - return vsuxei64_v_f16mf4(base, bindex, value, vl); + return __riscv_vsuxei64_v_f16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t va // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t value, size_t vl) { - return vsuxei64_v_f16mf2(base, bindex, value, vl); + return __riscv_vsuxei64_v_f16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t va // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t value, size_t vl) { - return vsuxei64_v_f16m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_f16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t value, size_t vl) { - return vsuxei64_v_f16m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_f16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t value, size_t vl) { - return vsuxei64_v_f32mf2(base, bindex, value, vl); + return __riscv_vsuxei64_v_f32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t value, size_t vl) { - return vsuxei64_v_f32m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_f32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t value, size_t vl) { - return vsuxei64_v_f32m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_f32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f32m4( @@ -76,7 +76,7 @@ void test_vsuxei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f32m4(float *base, vuint64m8_t bindex, vfloat32m4_t value, size_t vl) { - return vsuxei64_v_f32m4(base, bindex, value, vl); + return __riscv_vsuxei64_v_f32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f64m1( @@ -85,7 +85,7 @@ void test_vsuxei64_v_f32m4(float *base, vuint64m8_t bindex, vfloat32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t value, size_t vl) { - return vsuxei64_v_f64m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_f64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f64m2( @@ -94,7 +94,7 @@ void test_vsuxei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t value, size_t vl) { - return vsuxei64_v_f64m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_f64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f64m4( @@ -103,7 +103,7 @@ void test_vsuxei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f64m4(double *base, vuint64m4_t bindex, vfloat64m4_t value, size_t vl) { - return vsuxei64_v_f64m4(base, bindex, value, vl); + return __riscv_vsuxei64_v_f64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f64m8( @@ -112,7 +112,7 @@ void test_vsuxei64_v_f64m4(double *base, vuint64m4_t bindex, vfloat64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f64m8(double *base, vuint64m8_t bindex, vfloat64m8_t value, size_t vl) { - return vsuxei64_v_f64m8(base, bindex, value, vl); + return __riscv_vsuxei64_v_f64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i8mf8( @@ -121,7 +121,7 @@ void test_vsuxei64_v_f64m8(double *base, vuint64m8_t bindex, vfloat64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t value, size_t vl) { - return vsuxei64_v_i8mf8(base, bindex, value, vl); + return __riscv_vsuxei64_v_i8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i8mf4( @@ -130,7 +130,7 @@ void test_vsuxei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t value, size_t vl) { - return vsuxei64_v_i8mf4(base, bindex, value, vl); + return __riscv_vsuxei64_v_i8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i8mf2( @@ -139,7 +139,7 @@ void test_vsuxei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t value, size_t vl) { - return vsuxei64_v_i8mf2(base, bindex, value, vl); + return __riscv_vsuxei64_v_i8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i8m1( @@ -148,7 +148,7 @@ void test_vsuxei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t value, size_t vl) { - return vsuxei64_v_i8m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_i8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i16mf4( @@ -157,7 +157,7 @@ void test_vsuxei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t value, size_t vl) { - return vsuxei64_v_i16mf4(base, bindex, value, vl); + return __riscv_vsuxei64_v_i16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i16mf2( @@ -166,7 +166,7 @@ void test_vsuxei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t value, size_t vl) { - return vsuxei64_v_i16mf2(base, bindex, value, vl); + return __riscv_vsuxei64_v_i16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i16m1( @@ -175,7 +175,7 @@ void test_vsuxei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t value, size_t vl) { - return vsuxei64_v_i16m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_i16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i16m2( @@ -184,7 +184,7 @@ void test_vsuxei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t value, size_t vl) { - return vsuxei64_v_i16m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_i16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i32mf2( @@ -193,7 +193,7 @@ void test_vsuxei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) { - return vsuxei64_v_i32mf2(base, bindex, value, vl); + return __riscv_vsuxei64_v_i32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i32m1( @@ -202,7 +202,7 @@ void test_vsuxei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) { - return vsuxei64_v_i32m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_i32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i32m2( @@ -211,7 +211,7 @@ void test_vsuxei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) { - return vsuxei64_v_i32m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_i32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i32m4( @@ -220,7 +220,7 @@ void test_vsuxei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i32m4(int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) { - return vsuxei64_v_i32m4(base, bindex, value, vl); + return __riscv_vsuxei64_v_i32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i64m1( @@ -229,7 +229,7 @@ void test_vsuxei64_v_i32m4(int32_t *base, vuint64m8_t bindex, vint32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) { - return vsuxei64_v_i64m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_i64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i64m2( @@ -238,7 +238,7 @@ void test_vsuxei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) { - return vsuxei64_v_i64m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_i64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i64m4( @@ -247,7 +247,7 @@ void test_vsuxei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i64m4(int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) { - return vsuxei64_v_i64m4(base, bindex, value, vl); + return __riscv_vsuxei64_v_i64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i64m8( @@ -256,7 +256,7 @@ void test_vsuxei64_v_i64m4(int64_t *base, vuint64m4_t bindex, vint64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i64m8(int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) { - return vsuxei64_v_i64m8(base, bindex, value, vl); + return __riscv_vsuxei64_v_i64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u8mf8( @@ -265,7 +265,7 @@ void test_vsuxei64_v_i64m8(int64_t *base, vuint64m8_t bindex, vint64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t value, size_t vl) { - return vsuxei64_v_u8mf8(base, bindex, value, vl); + return __riscv_vsuxei64_v_u8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u8mf4( @@ -274,7 +274,7 @@ void test_vsuxei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t value, size_t vl) { - return vsuxei64_v_u8mf4(base, bindex, value, vl); + return __riscv_vsuxei64_v_u8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u8mf2( @@ -283,7 +283,7 @@ void test_vsuxei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t value, size_t vl) { - return vsuxei64_v_u8mf2(base, bindex, value, vl); + return __riscv_vsuxei64_v_u8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u8m1( @@ -292,7 +292,7 @@ void test_vsuxei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t value, size_t vl) { - return vsuxei64_v_u8m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_u8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u16mf4( @@ -301,7 +301,7 @@ void test_vsuxei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t value, size_t vl) { - return vsuxei64_v_u16mf4(base, bindex, value, vl); + return __riscv_vsuxei64_v_u16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u16mf2( @@ -310,7 +310,7 @@ void test_vsuxei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t val // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t value, size_t vl) { - return vsuxei64_v_u16mf2(base, bindex, value, vl); + return __riscv_vsuxei64_v_u16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u16m1( @@ -319,7 +319,7 @@ void test_vsuxei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t val // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t value, size_t vl) { - return vsuxei64_v_u16m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_u16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u16m2( @@ -328,7 +328,7 @@ void test_vsuxei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t value, size_t vl) { - return vsuxei64_v_u16m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_u16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u32mf2( @@ -337,7 +337,7 @@ void test_vsuxei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) { - return vsuxei64_v_u32mf2(base, bindex, value, vl); + return __riscv_vsuxei64_v_u32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u32m1( @@ -346,7 +346,7 @@ void test_vsuxei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t val // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) { - return vsuxei64_v_u32m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_u32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u32m2( @@ -355,7 +355,7 @@ void test_vsuxei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) { - return vsuxei64_v_u32m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_u32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u32m4( @@ -364,7 +364,7 @@ void test_vsuxei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u32m4(uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) { - return vsuxei64_v_u32m4(base, bindex, value, vl); + return __riscv_vsuxei64_v_u32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u64m1( @@ -373,7 +373,7 @@ void test_vsuxei64_v_u32m4(uint32_t *base, vuint64m8_t bindex, vuint32m4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) { - return vsuxei64_v_u64m1(base, bindex, value, vl); + return __riscv_vsuxei64_v_u64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u64m2( @@ -382,7 +382,7 @@ void test_vsuxei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) { - return vsuxei64_v_u64m2(base, bindex, value, vl); + return __riscv_vsuxei64_v_u64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u64m4( @@ -391,7 +391,7 @@ void test_vsuxei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u64m4(uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) { - return vsuxei64_v_u64m4(base, bindex, value, vl); + return __riscv_vsuxei64_v_u64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u64m8( @@ -400,7 +400,7 @@ void test_vsuxei64_v_u64m4(uint64_t *base, vuint64m4_t bindex, vuint64m4_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u64m8(uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) { - return vsuxei64_v_u64m8(base, bindex, value, vl); + return __riscv_vsuxei64_v_u64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f16mf4_m( @@ -409,7 +409,7 @@ void test_vsuxei64_v_u64m8(uint64_t *base, vuint64m8_t bindex, vuint64m8_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t value, size_t vl) { - return vsuxei64_v_f16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f16mf2_m( @@ -418,7 +418,7 @@ void test_vsuxei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t value, size_t vl) { - return vsuxei64_v_f16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f16m1_m( @@ -427,7 +427,7 @@ void test_vsuxei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t value, size_t vl) { - return vsuxei64_v_f16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f16m2_m( @@ -436,7 +436,7 @@ void test_vsuxei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, vfloat16m2_t value, size_t vl) { - return vsuxei64_v_f16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f32mf2_m( @@ -445,7 +445,7 @@ void test_vsuxei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t value, size_t vl) { - return vsuxei64_v_f32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f32m1_m( @@ -454,7 +454,7 @@ void test_vsuxei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t value, size_t vl) { - return vsuxei64_v_f32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f32m2_m( @@ -463,7 +463,7 @@ void test_vsuxei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vfloat32m2_t value, size_t vl) { - return vsuxei64_v_f32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f32m4_m( @@ -472,7 +472,7 @@ void test_vsuxei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f32m4_m(vbool8_t mask, float *base, vuint64m8_t bindex, vfloat32m4_t value, size_t vl) { - return vsuxei64_v_f32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f64m1_m( @@ -481,7 +481,7 @@ void test_vsuxei64_v_f32m4_m(vbool8_t mask, float *base, vuint64m8_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t value, size_t vl) { - return vsuxei64_v_f64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f64m2_m( @@ -490,7 +490,7 @@ void test_vsuxei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, vfloat64m2_t value, size_t vl) { - return vsuxei64_v_f64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f64m4_m( @@ -499,7 +499,7 @@ void test_vsuxei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f64m4_m(vbool16_t mask, double *base, vuint64m4_t bindex, vfloat64m4_t value, size_t vl) { - return vsuxei64_v_f64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_f64m8_m( @@ -508,7 +508,7 @@ void test_vsuxei64_v_f64m4_m(vbool16_t mask, double *base, vuint64m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_f64m8_m(vbool8_t mask, double *base, vuint64m8_t bindex, vfloat64m8_t value, size_t vl) { - return vsuxei64_v_f64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_f64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i8mf8_m( @@ -517,7 +517,7 @@ void test_vsuxei64_v_f64m8_m(vbool8_t mask, double *base, vuint64m8_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t value, size_t vl) { - return vsuxei64_v_i8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i8mf4_m( @@ -526,7 +526,7 @@ void test_vsuxei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t value, size_t vl) { - return vsuxei64_v_i8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i8mf2_m( @@ -535,7 +535,7 @@ void test_vsuxei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t value, size_t vl) { - return vsuxei64_v_i8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i8m1_m( @@ -544,7 +544,7 @@ void test_vsuxei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t value, size_t vl) { - return vsuxei64_v_i8m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i16mf4_m( @@ -553,7 +553,7 @@ void test_vsuxei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t value, size_t vl) { - return vsuxei64_v_i16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i16mf2_m( @@ -562,7 +562,7 @@ void test_vsuxei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t value, size_t vl) { - return vsuxei64_v_i16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i16m1_m( @@ -571,7 +571,7 @@ void test_vsuxei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t value, size_t vl) { - return vsuxei64_v_i16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i16m2_m( @@ -580,7 +580,7 @@ void test_vsuxei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, vint16m2_t value, size_t vl) { - return vsuxei64_v_i16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i32mf2_m( @@ -589,7 +589,7 @@ void test_vsuxei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t value, size_t vl) { - return vsuxei64_v_i32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i32m1_m( @@ -598,7 +598,7 @@ void test_vsuxei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t value, size_t vl) { - return vsuxei64_v_i32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i32m2_m( @@ -607,7 +607,7 @@ void test_vsuxei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t value, size_t vl) { - return vsuxei64_v_i32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i32m4_m( @@ -616,7 +616,7 @@ void test_vsuxei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i32m4_m(vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t value, size_t vl) { - return vsuxei64_v_i32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i64m1_m( @@ -625,7 +625,7 @@ void test_vsuxei64_v_i32m4_m(vbool8_t mask, int32_t *base, vuint64m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t value, size_t vl) { - return vsuxei64_v_i64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i64m2_m( @@ -634,7 +634,7 @@ void test_vsuxei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t value, size_t vl) { - return vsuxei64_v_i64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i64m4_m( @@ -643,7 +643,7 @@ void test_vsuxei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i64m4_m(vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t value, size_t vl) { - return vsuxei64_v_i64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_i64m8_m( @@ -652,7 +652,7 @@ void test_vsuxei64_v_i64m4_m(vbool16_t mask, int64_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_i64m8_m(vbool8_t mask, int64_t *base, vuint64m8_t bindex, vint64m8_t value, size_t vl) { - return vsuxei64_v_i64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_i64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u8mf8_m( @@ -661,7 +661,7 @@ void test_vsuxei64_v_i64m8_m(vbool8_t mask, int64_t *base, vuint64m8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t value, size_t vl) { - return vsuxei64_v_u8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u8mf4_m( @@ -670,7 +670,7 @@ void test_vsuxei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t value, size_t vl) { - return vsuxei64_v_u8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u8mf2_m( @@ -679,7 +679,7 @@ void test_vsuxei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t value, size_t vl) { - return vsuxei64_v_u8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u8m1_m( @@ -688,7 +688,7 @@ void test_vsuxei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t value, size_t vl) { - return vsuxei64_v_u8m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u16mf4_m( @@ -697,7 +697,7 @@ void test_vsuxei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t value, size_t vl) { - return vsuxei64_v_u16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u16mf2_m( @@ -706,7 +706,7 @@ void test_vsuxei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t value, size_t vl) { - return vsuxei64_v_u16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u16m1_m( @@ -715,7 +715,7 @@ void test_vsuxei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t value, size_t vl) { - return vsuxei64_v_u16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u16m2_m( @@ -724,7 +724,7 @@ void test_vsuxei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, vuint16m2_t value, size_t vl) { - return vsuxei64_v_u16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u32mf2_m( @@ -733,7 +733,7 @@ void test_vsuxei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t value, size_t vl) { - return vsuxei64_v_u32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u32m1_m( @@ -742,7 +742,7 @@ void test_vsuxei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t value, size_t vl) { - return vsuxei64_v_u32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u32m2_m( @@ -751,7 +751,7 @@ void test_vsuxei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t value, size_t vl) { - return vsuxei64_v_u32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u32m4_m( @@ -760,7 +760,7 @@ void test_vsuxei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t value, size_t vl) { - return vsuxei64_v_u32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u64m1_m( @@ -769,7 +769,7 @@ void test_vsuxei64_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t value, size_t vl) { - return vsuxei64_v_u64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u64m2_m( @@ -778,7 +778,7 @@ void test_vsuxei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t value, size_t vl) { - return vsuxei64_v_u64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u64m4_m( @@ -787,7 +787,7 @@ void test_vsuxei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t value, size_t vl) { - return vsuxei64_v_u64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei64_v_u64m8_m( @@ -796,6 +796,6 @@ void test_vsuxei64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei64_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint64m8_t bindex, vuint64m8_t value, size_t vl) { - return vsuxei64_v_u64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei64_v_u64m8_m(mask, base, bindex, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei8.c index fb551c1e127abe52ee790477affd36250bba9675..44413640bc33a96cebf4e9ac623b547d58f765da 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t value, size_t vl) { - return vsuxei8_v_f16mf4(base, bindex, value, vl); + return __riscv_vsuxei8_v_f16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t val // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t value, size_t vl) { - return vsuxei8_v_f16mf2(base, bindex, value, vl); + return __riscv_vsuxei8_v_f16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t val // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t value, size_t vl) { - return vsuxei8_v_f16m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_f16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t value // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t value, size_t vl) { - return vsuxei8_v_f16m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_f16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16m4( @@ -49,7 +49,7 @@ void test_vsuxei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t value, size_t vl) { - return vsuxei8_v_f16m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_f16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16m8( @@ -58,7 +58,7 @@ void test_vsuxei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16m8(_Float16 *base, vuint8m4_t bindex, vfloat16m8_t value, size_t vl) { - return vsuxei8_v_f16m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_f16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32mf2( @@ -67,7 +67,7 @@ void test_vsuxei8_v_f16m8(_Float16 *base, vuint8m4_t bindex, vfloat16m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t value, size_t vl) { - return vsuxei8_v_f32mf2(base, bindex, value, vl); + return __riscv_vsuxei8_v_f32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32m1( @@ -76,7 +76,7 @@ void test_vsuxei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t value, size_t vl) { - return vsuxei8_v_f32m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_f32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32m2( @@ -85,7 +85,7 @@ void test_vsuxei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t value, size_t vl) { - return vsuxei8_v_f32m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_f32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32m4( @@ -94,7 +94,7 @@ void test_vsuxei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t value, size_t vl) { - return vsuxei8_v_f32m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_f32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32m8( @@ -103,7 +103,7 @@ void test_vsuxei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32m8(float *base, vuint8m2_t bindex, vfloat32m8_t value, size_t vl) { - return vsuxei8_v_f32m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_f32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f64m1( @@ -112,7 +112,7 @@ void test_vsuxei8_v_f32m8(float *base, vuint8m2_t bindex, vfloat32m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t value, size_t vl) { - return vsuxei8_v_f64m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_f64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f64m2( @@ -121,7 +121,7 @@ void test_vsuxei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t value, size_t vl) { - return vsuxei8_v_f64m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_f64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f64m4( @@ -130,7 +130,7 @@ void test_vsuxei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t value, size_t vl) { - return vsuxei8_v_f64m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_f64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f64m8( @@ -139,7 +139,7 @@ void test_vsuxei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f64m8(double *base, vuint8m1_t bindex, vfloat64m8_t value, size_t vl) { - return vsuxei8_v_f64m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_f64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8mf8( @@ -148,7 +148,7 @@ void test_vsuxei8_v_f64m8(double *base, vuint8m1_t bindex, vfloat64m8_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t value, size_t vl) { - return vsuxei8_v_i8mf8(base, bindex, value, vl); + return __riscv_vsuxei8_v_i8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8mf4( @@ -157,7 +157,7 @@ void test_vsuxei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t value, size_t vl) { - return vsuxei8_v_i8mf4(base, bindex, value, vl); + return __riscv_vsuxei8_v_i8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8mf2( @@ -166,7 +166,7 @@ void test_vsuxei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t value, size_t vl) { - return vsuxei8_v_i8mf2(base, bindex, value, vl); + return __riscv_vsuxei8_v_i8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8m1( @@ -175,7 +175,7 @@ void test_vsuxei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t value, size_t vl) { - return vsuxei8_v_i8m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_i8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8m2( @@ -184,7 +184,7 @@ void test_vsuxei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t value, size_t vl) { - return vsuxei8_v_i8m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_i8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8m4( @@ -193,7 +193,7 @@ void test_vsuxei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t value, size_t vl) { - return vsuxei8_v_i8m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_i8m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8m8( @@ -202,7 +202,7 @@ void test_vsuxei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8m8(int8_t *base, vuint8m8_t bindex, vint8m8_t value, size_t vl) { - return vsuxei8_v_i8m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_i8m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16mf4( @@ -211,7 +211,7 @@ void test_vsuxei8_v_i8m8(int8_t *base, vuint8m8_t bindex, vint8m8_t value, size_ // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t value, size_t vl) { - return vsuxei8_v_i16mf4(base, bindex, value, vl); + return __riscv_vsuxei8_v_i16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16mf2( @@ -220,7 +220,7 @@ void test_vsuxei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t value, size_t vl) { - return vsuxei8_v_i16mf2(base, bindex, value, vl); + return __riscv_vsuxei8_v_i16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16m1( @@ -229,7 +229,7 @@ void test_vsuxei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t value, size_t vl) { - return vsuxei8_v_i16m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_i16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16m2( @@ -238,7 +238,7 @@ void test_vsuxei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t value, size_t vl) { - return vsuxei8_v_i16m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_i16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16m4( @@ -247,7 +247,7 @@ void test_vsuxei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t value, size_t vl) { - return vsuxei8_v_i16m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_i16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16m8( @@ -256,7 +256,7 @@ void test_vsuxei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16m8(int16_t *base, vuint8m4_t bindex, vint16m8_t value, size_t vl) { - return vsuxei8_v_i16m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_i16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32mf2( @@ -265,7 +265,7 @@ void test_vsuxei8_v_i16m8(int16_t *base, vuint8m4_t bindex, vint16m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) { - return vsuxei8_v_i32mf2(base, bindex, value, vl); + return __riscv_vsuxei8_v_i32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32m1( @@ -274,7 +274,7 @@ void test_vsuxei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) { - return vsuxei8_v_i32m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_i32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32m2( @@ -283,7 +283,7 @@ void test_vsuxei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) { - return vsuxei8_v_i32m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_i32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32m4( @@ -292,7 +292,7 @@ void test_vsuxei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) { - return vsuxei8_v_i32m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_i32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32m8( @@ -301,7 +301,7 @@ void test_vsuxei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32m8(int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) { - return vsuxei8_v_i32m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_i32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i64m1( @@ -310,7 +310,7 @@ void test_vsuxei8_v_i32m8(int32_t *base, vuint8m2_t bindex, vint32m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) { - return vsuxei8_v_i64m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_i64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i64m2( @@ -319,7 +319,7 @@ void test_vsuxei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) { - return vsuxei8_v_i64m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_i64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i64m4( @@ -328,7 +328,7 @@ void test_vsuxei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) { - return vsuxei8_v_i64m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_i64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i64m8( @@ -337,7 +337,7 @@ void test_vsuxei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t value, s // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i64m8(int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) { - return vsuxei8_v_i64m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_i64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8mf8( @@ -346,7 +346,7 @@ void test_vsuxei8_v_i64m8(int64_t *base, vuint8m1_t bindex, vint64m8_t value, si // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t value, size_t vl) { - return vsuxei8_v_u8mf8(base, bindex, value, vl); + return __riscv_vsuxei8_v_u8mf8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8mf4( @@ -355,7 +355,7 @@ void test_vsuxei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t value, size_t vl) { - return vsuxei8_v_u8mf4(base, bindex, value, vl); + return __riscv_vsuxei8_v_u8mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8mf2( @@ -364,7 +364,7 @@ void test_vsuxei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t value, size_t vl) { - return vsuxei8_v_u8mf2(base, bindex, value, vl); + return __riscv_vsuxei8_v_u8mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8m1( @@ -373,7 +373,7 @@ void test_vsuxei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t value, size_t vl) { - return vsuxei8_v_u8m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_u8m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8m2( @@ -382,7 +382,7 @@ void test_vsuxei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t value, size_t vl) { - return vsuxei8_v_u8m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_u8m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8m4( @@ -391,7 +391,7 @@ void test_vsuxei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t value, size_t vl) { - return vsuxei8_v_u8m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_u8m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8m8( @@ -400,7 +400,7 @@ void test_vsuxei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8m8(uint8_t *base, vuint8m8_t bindex, vuint8m8_t value, size_t vl) { - return vsuxei8_v_u8m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_u8m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16mf4( @@ -409,7 +409,7 @@ void test_vsuxei8_v_u8m8(uint8_t *base, vuint8m8_t bindex, vuint8m8_t value, siz // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t value, size_t vl) { - return vsuxei8_v_u16mf4(base, bindex, value, vl); + return __riscv_vsuxei8_v_u16mf4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16mf2( @@ -418,7 +418,7 @@ void test_vsuxei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t value, size_t vl) { - return vsuxei8_v_u16mf2(base, bindex, value, vl); + return __riscv_vsuxei8_v_u16mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16m1( @@ -427,7 +427,7 @@ void test_vsuxei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t value, size_t vl) { - return vsuxei8_v_u16m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_u16m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16m2( @@ -436,7 +436,7 @@ void test_vsuxei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t value, size_t vl) { - return vsuxei8_v_u16m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_u16m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16m4( @@ -445,7 +445,7 @@ void test_vsuxei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t value, size_t vl) { - return vsuxei8_v_u16m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_u16m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16m8( @@ -454,7 +454,7 @@ void test_vsuxei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16m8(uint16_t *base, vuint8m4_t bindex, vuint16m8_t value, size_t vl) { - return vsuxei8_v_u16m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_u16m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32mf2( @@ -463,7 +463,7 @@ void test_vsuxei8_v_u16m8(uint16_t *base, vuint8m4_t bindex, vuint16m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) { - return vsuxei8_v_u32mf2(base, bindex, value, vl); + return __riscv_vsuxei8_v_u32mf2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32m1( @@ -472,7 +472,7 @@ void test_vsuxei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t valu // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) { - return vsuxei8_v_u32m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_u32m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32m2( @@ -481,7 +481,7 @@ void test_vsuxei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) { - return vsuxei8_v_u32m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_u32m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32m4( @@ -490,7 +490,7 @@ void test_vsuxei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) { - return vsuxei8_v_u32m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_u32m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32m8( @@ -499,7 +499,7 @@ void test_vsuxei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32m8(uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) { - return vsuxei8_v_u32m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_u32m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u64m1( @@ -508,7 +508,7 @@ void test_vsuxei8_v_u32m8(uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) { - return vsuxei8_v_u64m1(base, bindex, value, vl); + return __riscv_vsuxei8_v_u64m1(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u64m2( @@ -517,7 +517,7 @@ void test_vsuxei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) { - return vsuxei8_v_u64m2(base, bindex, value, vl); + return __riscv_vsuxei8_v_u64m2(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u64m4( @@ -526,7 +526,7 @@ void test_vsuxei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) { - return vsuxei8_v_u64m4(base, bindex, value, vl); + return __riscv_vsuxei8_v_u64m4(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u64m8( @@ -535,7 +535,7 @@ void test_vsuxei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u64m8(uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) { - return vsuxei8_v_u64m8(base, bindex, value, vl); + return __riscv_vsuxei8_v_u64m8(base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16mf4_m( @@ -544,7 +544,7 @@ void test_vsuxei8_v_u64m8(uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t value, size_t vl) { - return vsuxei8_v_f16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16mf2_m( @@ -553,7 +553,7 @@ void test_vsuxei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t value, size_t vl) { - return vsuxei8_v_f16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16m1_m( @@ -562,7 +562,7 @@ void test_vsuxei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t value, size_t vl) { - return vsuxei8_v_f16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16m2_m( @@ -571,7 +571,7 @@ void test_vsuxei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t value, size_t vl) { - return vsuxei8_v_f16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16m4_m( @@ -580,7 +580,7 @@ void test_vsuxei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex, vfloat16m4_t value, size_t vl) { - return vsuxei8_v_f16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f16m8_m( @@ -589,7 +589,7 @@ void test_vsuxei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint8m4_t bindex, vfloat16m8_t value, size_t vl) { - return vsuxei8_v_f16m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32mf2_m( @@ -598,7 +598,7 @@ void test_vsuxei8_v_f16m8_m(vbool2_t mask, _Float16 *base, vuint8m4_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t value, size_t vl) { - return vsuxei8_v_f32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32m1_m( @@ -607,7 +607,7 @@ void test_vsuxei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t value, size_t vl) { - return vsuxei8_v_f32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32m2_m( @@ -616,7 +616,7 @@ void test_vsuxei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t value, size_t vl) { - return vsuxei8_v_f32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32m4_m( @@ -625,7 +625,7 @@ void test_vsuxei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfl // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, vfloat32m4_t value, size_t vl) { - return vsuxei8_v_f32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f32m8_m( @@ -634,7 +634,7 @@ void test_vsuxei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, vfloa // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f32m8_m(vbool4_t mask, float *base, vuint8m2_t bindex, vfloat32m8_t value, size_t vl) { - return vsuxei8_v_f32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f64m1_m( @@ -643,7 +643,7 @@ void test_vsuxei8_v_f32m8_m(vbool4_t mask, float *base, vuint8m2_t bindex, vfloa // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t value, size_t vl) { - return vsuxei8_v_f64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f64m2_m( @@ -652,7 +652,7 @@ void test_vsuxei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t value, size_t vl) { - return vsuxei8_v_f64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f64m4_m( @@ -661,7 +661,7 @@ void test_vsuxei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex, vfloat64m4_t value, size_t vl) { - return vsuxei8_v_f64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_f64m8_m( @@ -670,7 +670,7 @@ void test_vsuxei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex, vf // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_f64m8_m(vbool8_t mask, double *base, vuint8m1_t bindex, vfloat64m8_t value, size_t vl) { - return vsuxei8_v_f64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_f64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8mf8_m( @@ -679,7 +679,7 @@ void test_vsuxei8_v_f64m8_m(vbool8_t mask, double *base, vuint8m1_t bindex, vflo // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t value, size_t vl) { - return vsuxei8_v_i8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8mf4_m( @@ -688,7 +688,7 @@ void test_vsuxei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vi // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t value, size_t vl) { - return vsuxei8_v_i8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8mf2_m( @@ -697,7 +697,7 @@ void test_vsuxei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vi // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t value, size_t vl) { - return vsuxei8_v_i8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8m1_m( @@ -706,7 +706,7 @@ void test_vsuxei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vi // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t value, size_t vl) { - return vsuxei8_v_i8m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8m2_m( @@ -715,7 +715,7 @@ void test_vsuxei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8 // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t value, size_t vl) { - return vsuxei8_v_i8m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8m4_m( @@ -724,7 +724,7 @@ void test_vsuxei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8 // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, vint8m4_t value, size_t vl) { - return vsuxei8_v_i8m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i8m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i8m8_m( @@ -733,7 +733,7 @@ void test_vsuxei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, vint8 // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i8m8_m(vbool1_t mask, int8_t *base, vuint8m8_t bindex, vint8m8_t value, size_t vl) { - return vsuxei8_v_i8m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i8m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16mf4_m( @@ -742,7 +742,7 @@ void test_vsuxei8_v_i8m8_m(vbool1_t mask, int8_t *base, vuint8m8_t bindex, vint8 // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t value, size_t vl) { - return vsuxei8_v_i16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16mf2_m( @@ -751,7 +751,7 @@ void test_vsuxei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t value, size_t vl) { - return vsuxei8_v_i16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16m1_m( @@ -760,7 +760,7 @@ void test_vsuxei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t value, size_t vl) { - return vsuxei8_v_i16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16m2_m( @@ -769,7 +769,7 @@ void test_vsuxei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t value, size_t vl) { - return vsuxei8_v_i16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16m4_m( @@ -778,7 +778,7 @@ void test_vsuxei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, vint16m4_t value, size_t vl) { - return vsuxei8_v_i16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i16m8_m( @@ -787,7 +787,7 @@ void test_vsuxei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i16m8_m(vbool2_t mask, int16_t *base, vuint8m4_t bindex, vint16m8_t value, size_t vl) { - return vsuxei8_v_i16m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32mf2_m( @@ -796,7 +796,7 @@ void test_vsuxei8_v_i16m8_m(vbool2_t mask, int16_t *base, vuint8m4_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t value, size_t vl) { - return vsuxei8_v_i32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32m1_m( @@ -805,7 +805,7 @@ void test_vsuxei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t value, size_t vl) { - return vsuxei8_v_i32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32m2_m( @@ -814,7 +814,7 @@ void test_vsuxei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t value, size_t vl) { - return vsuxei8_v_i32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32m4_m( @@ -823,7 +823,7 @@ void test_vsuxei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t value, size_t vl) { - return vsuxei8_v_i32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i32m8_m( @@ -832,7 +832,7 @@ void test_vsuxei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i32m8_m(vbool4_t mask, int32_t *base, vuint8m2_t bindex, vint32m8_t value, size_t vl) { - return vsuxei8_v_i32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i64m1_m( @@ -841,7 +841,7 @@ void test_vsuxei8_v_i32m8_m(vbool4_t mask, int32_t *base, vuint8m2_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t value, size_t vl) { - return vsuxei8_v_i64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i64m2_m( @@ -850,7 +850,7 @@ void test_vsuxei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t value, size_t vl) { - return vsuxei8_v_i64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i64m4_m( @@ -859,7 +859,7 @@ void test_vsuxei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t value, size_t vl) { - return vsuxei8_v_i64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_i64m8_m( @@ -868,7 +868,7 @@ void test_vsuxei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_i64m8_m(vbool8_t mask, int64_t *base, vuint8m1_t bindex, vint64m8_t value, size_t vl) { - return vsuxei8_v_i64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_i64m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8mf8_m( @@ -877,7 +877,7 @@ void test_vsuxei8_v_i64m8_m(vbool8_t mask, int64_t *base, vuint8m1_t bindex, vin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t value, size_t vl) { - return vsuxei8_v_u8mf8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u8mf8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8mf4_m( @@ -886,7 +886,7 @@ void test_vsuxei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t value, size_t vl) { - return vsuxei8_v_u8mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u8mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8mf2_m( @@ -895,7 +895,7 @@ void test_vsuxei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t value, size_t vl) { - return vsuxei8_v_u8mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u8mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8m1_m( @@ -904,7 +904,7 @@ void test_vsuxei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t value, size_t vl) { - return vsuxei8_v_u8m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u8m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8m2_m( @@ -913,7 +913,7 @@ void test_vsuxei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t value, size_t vl) { - return vsuxei8_v_u8m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u8m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8m4_m( @@ -922,7 +922,7 @@ void test_vsuxei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, vuint8m4_t value, size_t vl) { - return vsuxei8_v_u8m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u8m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u8m8_m( @@ -931,7 +931,7 @@ void test_vsuxei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, vuin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u8m8_m(vbool1_t mask, uint8_t *base, vuint8m8_t bindex, vuint8m8_t value, size_t vl) { - return vsuxei8_v_u8m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u8m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16mf4_m( @@ -940,7 +940,7 @@ void test_vsuxei8_v_u8m8_m(vbool1_t mask, uint8_t *base, vuint8m8_t bindex, vuin // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t value, size_t vl) { - return vsuxei8_v_u16mf4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u16mf4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16mf2_m( @@ -949,7 +949,7 @@ void test_vsuxei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t value, size_t vl) { - return vsuxei8_v_u16mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u16mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16m1_m( @@ -958,7 +958,7 @@ void test_vsuxei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t value, size_t vl) { - return vsuxei8_v_u16m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u16m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16m2_m( @@ -967,7 +967,7 @@ void test_vsuxei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t value, size_t vl) { - return vsuxei8_v_u16m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u16m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16m4_m( @@ -976,7 +976,7 @@ void test_vsuxei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex, vuint16m4_t value, size_t vl) { - return vsuxei8_v_u16m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u16m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u16m8_m( @@ -985,7 +985,7 @@ void test_vsuxei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint8m4_t bindex, vuint16m8_t value, size_t vl) { - return vsuxei8_v_u16m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u16m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32mf2_m( @@ -994,7 +994,7 @@ void test_vsuxei8_v_u16m8_m(vbool2_t mask, uint16_t *base, vuint8m4_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t value, size_t vl) { - return vsuxei8_v_u32mf2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u32mf2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32m1_m( @@ -1003,7 +1003,7 @@ void test_vsuxei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t value, size_t vl) { - return vsuxei8_v_u32m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u32m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32m2_m( @@ -1012,7 +1012,7 @@ void test_vsuxei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t value, size_t vl) { - return vsuxei8_v_u32m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u32m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32m4_m( @@ -1021,7 +1021,7 @@ void test_vsuxei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t value, size_t vl) { - return vsuxei8_v_u32m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u32m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u32m8_m( @@ -1030,7 +1030,7 @@ void test_vsuxei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vuint32m8_t value, size_t vl) { - return vsuxei8_v_u32m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u32m8_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u64m1_m( @@ -1039,7 +1039,7 @@ void test_vsuxei8_v_u32m8_m(vbool4_t mask, uint32_t *base, vuint8m2_t bindex, vu // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t value, size_t vl) { - return vsuxei8_v_u64m1_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u64m1_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u64m2_m( @@ -1048,7 +1048,7 @@ void test_vsuxei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t value, size_t vl) { - return vsuxei8_v_u64m2_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u64m2_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u64m4_m( @@ -1057,7 +1057,7 @@ void test_vsuxei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t value, size_t vl) { - return vsuxei8_v_u64m4_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u64m4_m(mask, base, bindex, value, vl); } // CHECK-RV64-LABEL: @test_vsuxei8_v_u64m8_m( @@ -1066,6 +1066,6 @@ void test_vsuxei8_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxei8_v_u64m8_m(vbool8_t mask, uint64_t *base, vuint8m1_t bindex, vuint64m8_t value, size_t vl) { - return vsuxei8_v_u64m8_m(mask, base, bindex, value, vl); + return __riscv_vsuxei8_v_u64m8_m(mask, base, bindex, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c index 407dd569881dd4ebf71ea2ebc398018eebea27e4..b5e7fb81fe66b9ef47859de5c5a8d1d87e8c752d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_f16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg2ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_f16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg2ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsuxseg2ei16_v_f16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg2ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsuxseg2ei16_v_f16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16m4( @@ -49,7 +49,7 @@ void test_vsuxseg2ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16m4(_Float16 *base, vuint16m4_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsuxseg2ei16_v_f16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f32mf2( @@ -58,7 +58,7 @@ void test_vsuxseg2ei16_v_f16m4(_Float16 *base, vuint16m4_t bindex, vfloat16m4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_f32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f32m1( @@ -67,7 +67,7 @@ void test_vsuxseg2ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsuxseg2ei16_v_f32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f32m2( @@ -76,7 +76,7 @@ void test_vsuxseg2ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsuxseg2ei16_v_f32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f32m4( @@ -85,7 +85,7 @@ void test_vsuxseg2ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f32m4(float *base, vuint16m2_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsuxseg2ei16_v_f32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f64m1( @@ -94,7 +94,7 @@ void test_vsuxseg2ei16_v_f32m4(float *base, vuint16m2_t bindex, vfloat32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsuxseg2ei16_v_f64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f64m2( @@ -103,7 +103,7 @@ void test_vsuxseg2ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsuxseg2ei16_v_f64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f64m4( @@ -112,7 +112,7 @@ void test_vsuxseg2ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f64m4(double *base, vuint16m1_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsuxseg2ei16_v_f64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8mf8( @@ -121,7 +121,7 @@ void test_vsuxseg2ei16_v_f64m4(double *base, vuint16m1_t bindex, vfloat64m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsuxseg2ei16_v_i8mf8(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8mf4( @@ -130,7 +130,7 @@ void test_vsuxseg2ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_i8mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8mf2( @@ -139,7 +139,7 @@ void test_vsuxseg2ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_i8mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8m1( @@ -148,7 +148,7 @@ void test_vsuxseg2ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsuxseg2ei16_v_i8m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8m2( @@ -157,7 +157,7 @@ void test_vsuxseg2ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsuxseg2ei16_v_i8m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8m4( @@ -166,7 +166,7 @@ void test_vsuxseg2ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8m4(int8_t *base, vuint16m8_t bindex, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsuxseg2ei16_v_i8m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16mf4( @@ -175,7 +175,7 @@ void test_vsuxseg2ei16_v_i8m4(int8_t *base, vuint16m8_t bindex, vint8m4_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_i16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16mf2( @@ -184,7 +184,7 @@ void test_vsuxseg2ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_i16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16m1( @@ -193,7 +193,7 @@ void test_vsuxseg2ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsuxseg2ei16_v_i16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16m2( @@ -202,7 +202,7 @@ void test_vsuxseg2ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsuxseg2ei16_v_i16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16m4( @@ -211,7 +211,7 @@ void test_vsuxseg2ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16m4(int16_t *base, vuint16m4_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsuxseg2ei16_v_i16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg2ei16_v_i16m4(int16_t *base, vuint16m4_t bindex, vint16m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_i32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i32m1( @@ -229,7 +229,7 @@ void test_vsuxseg2ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsuxseg2ei16_v_i32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i32m2( @@ -238,7 +238,7 @@ void test_vsuxseg2ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsuxseg2ei16_v_i32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i32m4( @@ -247,7 +247,7 @@ void test_vsuxseg2ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i32m4(int32_t *base, vuint16m2_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsuxseg2ei16_v_i32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i64m1( @@ -256,7 +256,7 @@ void test_vsuxseg2ei16_v_i32m4(int32_t *base, vuint16m2_t bindex, vint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsuxseg2ei16_v_i64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i64m2( @@ -265,7 +265,7 @@ void test_vsuxseg2ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsuxseg2ei16_v_i64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i64m4( @@ -274,7 +274,7 @@ void test_vsuxseg2ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i64m4(int64_t *base, vuint16m1_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsuxseg2ei16_v_i64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8mf8( @@ -283,7 +283,7 @@ void test_vsuxseg2ei16_v_i64m4(int64_t *base, vuint16m1_t bindex, vint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsuxseg2ei16_v_u8mf8(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8mf4( @@ -292,7 +292,7 @@ void test_vsuxseg2ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_u8mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8mf2( @@ -301,7 +301,7 @@ void test_vsuxseg2ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_u8mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8m1( @@ -310,7 +310,7 @@ void test_vsuxseg2ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsuxseg2ei16_v_u8m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8m2( @@ -319,7 +319,7 @@ void test_vsuxseg2ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsuxseg2ei16_v_u8m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8m4( @@ -328,7 +328,7 @@ void test_vsuxseg2ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8m4(uint8_t *base, vuint16m8_t bindex, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsuxseg2ei16_v_u8m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16mf4( @@ -337,7 +337,7 @@ void test_vsuxseg2ei16_v_u8m4(uint8_t *base, vuint16m8_t bindex, vuint8m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_u16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16mf2( @@ -346,7 +346,7 @@ void test_vsuxseg2ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_u16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16m1( @@ -355,7 +355,7 @@ void test_vsuxseg2ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsuxseg2ei16_v_u16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16m2( @@ -364,7 +364,7 @@ void test_vsuxseg2ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsuxseg2ei16_v_u16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16m4( @@ -373,7 +373,7 @@ void test_vsuxseg2ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16m4(uint16_t *base, vuint16m4_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsuxseg2ei16_v_u16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u32mf2( @@ -382,7 +382,7 @@ void test_vsuxseg2ei16_v_u16m4(uint16_t *base, vuint16m4_t bindex, vuint16m4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_u32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u32m1( @@ -391,7 +391,7 @@ void test_vsuxseg2ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsuxseg2ei16_v_u32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u32m2( @@ -400,7 +400,7 @@ void test_vsuxseg2ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsuxseg2ei16_v_u32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u32m4( @@ -409,7 +409,7 @@ void test_vsuxseg2ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u32m4(uint32_t *base, vuint16m2_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsuxseg2ei16_v_u32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u64m1( @@ -418,7 +418,7 @@ void test_vsuxseg2ei16_v_u32m4(uint32_t *base, vuint16m2_t bindex, vuint32m4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsuxseg2ei16_v_u64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u64m2( @@ -427,7 +427,7 @@ void test_vsuxseg2ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsuxseg2ei16_v_u64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u64m4( @@ -436,7 +436,7 @@ void test_vsuxseg2ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u64m4(uint64_t *base, vuint16m1_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsuxseg2ei16_v_u64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16mf4_m( @@ -445,7 +445,7 @@ void test_vsuxseg2ei16_v_u64m4(uint64_t *base, vuint16m1_t bindex, vuint64m4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_f16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg2ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_f16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg2ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsuxseg2ei16_v_f16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16m2_m( @@ -472,7 +472,7 @@ void test_vsuxseg2ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsuxseg2ei16_v_f16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f16m4_m( @@ -481,7 +481,7 @@ void test_vsuxseg2ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint16m4_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsuxseg2ei16_v_f16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f32mf2_m( @@ -490,7 +490,7 @@ void test_vsuxseg2ei16_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint16m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_f32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f32m1_m( @@ -499,7 +499,7 @@ void test_vsuxseg2ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsuxseg2ei16_v_f32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f32m2_m( @@ -508,7 +508,7 @@ void test_vsuxseg2ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsuxseg2ei16_v_f32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f32m4_m( @@ -517,7 +517,7 @@ void test_vsuxseg2ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f32m4_m(vbool8_t mask, float *base, vuint16m2_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsuxseg2ei16_v_f32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f64m1_m( @@ -526,7 +526,7 @@ void test_vsuxseg2ei16_v_f32m4_m(vbool8_t mask, float *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsuxseg2ei16_v_f64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f64m2_m( @@ -535,7 +535,7 @@ void test_vsuxseg2ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsuxseg2ei16_v_f64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_f64m4_m( @@ -544,7 +544,7 @@ void test_vsuxseg2ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_f64m4_m(vbool16_t mask, double *base, vuint16m1_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsuxseg2ei16_v_f64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_f64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8mf8_m( @@ -553,7 +553,7 @@ void test_vsuxseg2ei16_v_f64m4_m(vbool16_t mask, double *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsuxseg2ei16_v_i8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg2ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_i8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg2ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_i8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg2ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsuxseg2ei16_v_i8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg2ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsuxseg2ei16_v_i8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i8m4_m( @@ -598,7 +598,7 @@ void test_vsuxseg2ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i8m4_m(vbool2_t mask, int8_t *base, vuint16m8_t bindex, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsuxseg2ei16_v_i8m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i8m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16mf4_m( @@ -607,7 +607,7 @@ void test_vsuxseg2ei16_v_i8m4_m(vbool2_t mask, int8_t *base, vuint16m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_i16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16mf2_m( @@ -616,7 +616,7 @@ void test_vsuxseg2ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_i16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16m1_m( @@ -625,7 +625,7 @@ void test_vsuxseg2ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsuxseg2ei16_v_i16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16m2_m( @@ -634,7 +634,7 @@ void test_vsuxseg2ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsuxseg2ei16_v_i16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i16m4_m( @@ -643,7 +643,7 @@ void test_vsuxseg2ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i16m4_m(vbool4_t mask, int16_t *base, vuint16m4_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsuxseg2ei16_v_i16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i32mf2_m( @@ -652,7 +652,7 @@ void test_vsuxseg2ei16_v_i16m4_m(vbool4_t mask, int16_t *base, vuint16m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_i32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i32m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg2ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsuxseg2ei16_v_i32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i32m2_m( @@ -670,7 +670,7 @@ void test_vsuxseg2ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsuxseg2ei16_v_i32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i32m4_m( @@ -679,7 +679,7 @@ void test_vsuxseg2ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i32m4_m(vbool8_t mask, int32_t *base, vuint16m2_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsuxseg2ei16_v_i32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i64m1_m( @@ -688,7 +688,7 @@ void test_vsuxseg2ei16_v_i32m4_m(vbool8_t mask, int32_t *base, vuint16m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsuxseg2ei16_v_i64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i64m2_m( @@ -697,7 +697,7 @@ void test_vsuxseg2ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsuxseg2ei16_v_i64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_i64m4_m( @@ -706,7 +706,7 @@ void test_vsuxseg2ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_i64m4_m(vbool16_t mask, int64_t *base, vuint16m1_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsuxseg2ei16_v_i64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_i64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8mf8_m( @@ -715,7 +715,7 @@ void test_vsuxseg2ei16_v_i64m4_m(vbool16_t mask, int64_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsuxseg2ei16_v_u8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8mf4_m( @@ -724,7 +724,7 @@ void test_vsuxseg2ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_u8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8mf2_m( @@ -733,7 +733,7 @@ void test_vsuxseg2ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_u8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8m1_m( @@ -742,7 +742,7 @@ void test_vsuxseg2ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsuxseg2ei16_v_u8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8m2_m( @@ -751,7 +751,7 @@ void test_vsuxseg2ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsuxseg2ei16_v_u8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u8m4_m( @@ -760,7 +760,7 @@ void test_vsuxseg2ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint16m8_t bindex, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsuxseg2ei16_v_u8m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u8m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16mf4_m( @@ -769,7 +769,7 @@ void test_vsuxseg2ei16_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint16m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsuxseg2ei16_v_u16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16mf2_m( @@ -778,7 +778,7 @@ void test_vsuxseg2ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_u16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16m1_m( @@ -787,7 +787,7 @@ void test_vsuxseg2ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsuxseg2ei16_v_u16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16m2_m( @@ -796,7 +796,7 @@ void test_vsuxseg2ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsuxseg2ei16_v_u16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u16m4_m( @@ -805,7 +805,7 @@ void test_vsuxseg2ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsuxseg2ei16_v_u16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u32mf2_m( @@ -814,7 +814,7 @@ void test_vsuxseg2ei16_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint16m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsuxseg2ei16_v_u32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u32m1_m( @@ -823,7 +823,7 @@ void test_vsuxseg2ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsuxseg2ei16_v_u32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u32m2_m( @@ -832,7 +832,7 @@ void test_vsuxseg2ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsuxseg2ei16_v_u32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u32m4_m( @@ -841,7 +841,7 @@ void test_vsuxseg2ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint16m2_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsuxseg2ei16_v_u32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u64m1_m( @@ -850,7 +850,7 @@ void test_vsuxseg2ei16_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsuxseg2ei16_v_u64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u64m2_m( @@ -859,7 +859,7 @@ void test_vsuxseg2ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsuxseg2ei16_v_u64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei16_v_u64m4_m( @@ -868,6 +868,6 @@ void test_vsuxseg2ei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei16_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint16m1_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsuxseg2ei16_v_u64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei16_v_u64m4_m(mask, base, bindex, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c index ec5a5bcb97484613602d5fc7086ba9c257cc90f8..198b919a0877894310b7f5d79c03eec2013869b5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_f16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg2ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_f16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg2ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsuxseg2ei32_v_f16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg2ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsuxseg2ei32_v_f16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16m4( @@ -49,7 +49,7 @@ void test_vsuxseg2ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16m4(_Float16 *base, vuint32m8_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsuxseg2ei32_v_f16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f32mf2( @@ -58,7 +58,7 @@ void test_vsuxseg2ei32_v_f16m4(_Float16 *base, vuint32m8_t bindex, vfloat16m4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_f32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f32m1( @@ -67,7 +67,7 @@ void test_vsuxseg2ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsuxseg2ei32_v_f32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f32m2( @@ -76,7 +76,7 @@ void test_vsuxseg2ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsuxseg2ei32_v_f32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f32m4( @@ -85,7 +85,7 @@ void test_vsuxseg2ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f32m4(float *base, vuint32m4_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsuxseg2ei32_v_f32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f64m1( @@ -94,7 +94,7 @@ void test_vsuxseg2ei32_v_f32m4(float *base, vuint32m4_t bindex, vfloat32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsuxseg2ei32_v_f64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f64m2( @@ -103,7 +103,7 @@ void test_vsuxseg2ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsuxseg2ei32_v_f64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f64m4( @@ -112,7 +112,7 @@ void test_vsuxseg2ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f64m4(double *base, vuint32m2_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsuxseg2ei32_v_f64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8mf8( @@ -121,7 +121,7 @@ void test_vsuxseg2ei32_v_f64m4(double *base, vuint32m2_t bindex, vfloat64m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsuxseg2ei32_v_i8mf8(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8mf4( @@ -130,7 +130,7 @@ void test_vsuxseg2ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_i8mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8mf2( @@ -139,7 +139,7 @@ void test_vsuxseg2ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_i8mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8m1( @@ -148,7 +148,7 @@ void test_vsuxseg2ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsuxseg2ei32_v_i8m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8m2( @@ -157,7 +157,7 @@ void test_vsuxseg2ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsuxseg2ei32_v_i8m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16mf4( @@ -166,7 +166,7 @@ void test_vsuxseg2ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_i16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16mf2( @@ -175,7 +175,7 @@ void test_vsuxseg2ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_i16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16m1( @@ -184,7 +184,7 @@ void test_vsuxseg2ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsuxseg2ei32_v_i16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16m2( @@ -193,7 +193,7 @@ void test_vsuxseg2ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsuxseg2ei32_v_i16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16m4( @@ -202,7 +202,7 @@ void test_vsuxseg2ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16m4(int16_t *base, vuint32m8_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsuxseg2ei32_v_i16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i32mf2( @@ -211,7 +211,7 @@ void test_vsuxseg2ei32_v_i16m4(int16_t *base, vuint32m8_t bindex, vint16m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_i32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i32m1( @@ -220,7 +220,7 @@ void test_vsuxseg2ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsuxseg2ei32_v_i32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i32m2( @@ -229,7 +229,7 @@ void test_vsuxseg2ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsuxseg2ei32_v_i32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i32m4( @@ -238,7 +238,7 @@ void test_vsuxseg2ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i32m4(int32_t *base, vuint32m4_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsuxseg2ei32_v_i32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i64m1( @@ -247,7 +247,7 @@ void test_vsuxseg2ei32_v_i32m4(int32_t *base, vuint32m4_t bindex, vint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsuxseg2ei32_v_i64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i64m2( @@ -256,7 +256,7 @@ void test_vsuxseg2ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsuxseg2ei32_v_i64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i64m4( @@ -265,7 +265,7 @@ void test_vsuxseg2ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i64m4(int64_t *base, vuint32m2_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsuxseg2ei32_v_i64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8mf8( @@ -274,7 +274,7 @@ void test_vsuxseg2ei32_v_i64m4(int64_t *base, vuint32m2_t bindex, vint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsuxseg2ei32_v_u8mf8(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8mf4( @@ -283,7 +283,7 @@ void test_vsuxseg2ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_u8mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8mf2( @@ -292,7 +292,7 @@ void test_vsuxseg2ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_u8mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8m1( @@ -301,7 +301,7 @@ void test_vsuxseg2ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsuxseg2ei32_v_u8m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8m2( @@ -310,7 +310,7 @@ void test_vsuxseg2ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsuxseg2ei32_v_u8m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16mf4( @@ -319,7 +319,7 @@ void test_vsuxseg2ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_u16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16mf2( @@ -328,7 +328,7 @@ void test_vsuxseg2ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_u16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16m1( @@ -337,7 +337,7 @@ void test_vsuxseg2ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsuxseg2ei32_v_u16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16m2( @@ -346,7 +346,7 @@ void test_vsuxseg2ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsuxseg2ei32_v_u16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16m4( @@ -355,7 +355,7 @@ void test_vsuxseg2ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16m4(uint16_t *base, vuint32m8_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsuxseg2ei32_v_u16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u32mf2( @@ -364,7 +364,7 @@ void test_vsuxseg2ei32_v_u16m4(uint16_t *base, vuint32m8_t bindex, vuint16m4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_u32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u32m1( @@ -373,7 +373,7 @@ void test_vsuxseg2ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsuxseg2ei32_v_u32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u32m2( @@ -382,7 +382,7 @@ void test_vsuxseg2ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsuxseg2ei32_v_u32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u32m4( @@ -391,7 +391,7 @@ void test_vsuxseg2ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u32m4(uint32_t *base, vuint32m4_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsuxseg2ei32_v_u32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u64m1( @@ -400,7 +400,7 @@ void test_vsuxseg2ei32_v_u32m4(uint32_t *base, vuint32m4_t bindex, vuint32m4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsuxseg2ei32_v_u64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u64m2( @@ -409,7 +409,7 @@ void test_vsuxseg2ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsuxseg2ei32_v_u64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u64m4( @@ -418,7 +418,7 @@ void test_vsuxseg2ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u64m4(uint64_t *base, vuint32m2_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsuxseg2ei32_v_u64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg2ei32_v_u64m4(uint64_t *base, vuint32m2_t bindex, vuint64m4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_f16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg2ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_f16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg2ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsuxseg2ei32_v_f16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16m2_m( @@ -454,7 +454,7 @@ void test_vsuxseg2ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsuxseg2ei32_v_f16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f16m4_m( @@ -463,7 +463,7 @@ void test_vsuxseg2ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint32m8_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsuxseg2ei32_v_f16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f32mf2_m( @@ -472,7 +472,7 @@ void test_vsuxseg2ei32_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint32m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_f32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f32m1_m( @@ -481,7 +481,7 @@ void test_vsuxseg2ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsuxseg2ei32_v_f32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f32m2_m( @@ -490,7 +490,7 @@ void test_vsuxseg2ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsuxseg2ei32_v_f32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f32m4_m( @@ -499,7 +499,7 @@ void test_vsuxseg2ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f32m4_m(vbool8_t mask, float *base, vuint32m4_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsuxseg2ei32_v_f32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f64m1_m( @@ -508,7 +508,7 @@ void test_vsuxseg2ei32_v_f32m4_m(vbool8_t mask, float *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsuxseg2ei32_v_f64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f64m2_m( @@ -517,7 +517,7 @@ void test_vsuxseg2ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsuxseg2ei32_v_f64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_f64m4_m( @@ -526,7 +526,7 @@ void test_vsuxseg2ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_f64m4_m(vbool16_t mask, double *base, vuint32m2_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsuxseg2ei32_v_f64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_f64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8mf8_m( @@ -535,7 +535,7 @@ void test_vsuxseg2ei32_v_f64m4_m(vbool16_t mask, double *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsuxseg2ei32_v_i8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8mf4_m( @@ -544,7 +544,7 @@ void test_vsuxseg2ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_i8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8mf2_m( @@ -553,7 +553,7 @@ void test_vsuxseg2ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_i8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8m1_m( @@ -562,7 +562,7 @@ void test_vsuxseg2ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsuxseg2ei32_v_i8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i8m2_m( @@ -571,7 +571,7 @@ void test_vsuxseg2ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsuxseg2ei32_v_i8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16mf4_m( @@ -580,7 +580,7 @@ void test_vsuxseg2ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_i16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16mf2_m( @@ -589,7 +589,7 @@ void test_vsuxseg2ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_i16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16m1_m( @@ -598,7 +598,7 @@ void test_vsuxseg2ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsuxseg2ei32_v_i16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16m2_m( @@ -607,7 +607,7 @@ void test_vsuxseg2ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsuxseg2ei32_v_i16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i16m4_m( @@ -616,7 +616,7 @@ void test_vsuxseg2ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i16m4_m(vbool4_t mask, int16_t *base, vuint32m8_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsuxseg2ei32_v_i16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i32mf2_m( @@ -625,7 +625,7 @@ void test_vsuxseg2ei32_v_i16m4_m(vbool4_t mask, int16_t *base, vuint32m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_i32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i32m1_m( @@ -634,7 +634,7 @@ void test_vsuxseg2ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsuxseg2ei32_v_i32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i32m2_m( @@ -643,7 +643,7 @@ void test_vsuxseg2ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsuxseg2ei32_v_i32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i32m4_m( @@ -652,7 +652,7 @@ void test_vsuxseg2ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i32m4_m(vbool8_t mask, int32_t *base, vuint32m4_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsuxseg2ei32_v_i32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i64m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg2ei32_v_i32m4_m(vbool8_t mask, int32_t *base, vuint32m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsuxseg2ei32_v_i64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i64m2_m( @@ -670,7 +670,7 @@ void test_vsuxseg2ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsuxseg2ei32_v_i64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_i64m4_m( @@ -679,7 +679,7 @@ void test_vsuxseg2ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_i64m4_m(vbool16_t mask, int64_t *base, vuint32m2_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsuxseg2ei32_v_i64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_i64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8mf8_m( @@ -688,7 +688,7 @@ void test_vsuxseg2ei32_v_i64m4_m(vbool16_t mask, int64_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsuxseg2ei32_v_u8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8mf4_m( @@ -697,7 +697,7 @@ void test_vsuxseg2ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_u8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8mf2_m( @@ -706,7 +706,7 @@ void test_vsuxseg2ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_u8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8m1_m( @@ -715,7 +715,7 @@ void test_vsuxseg2ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsuxseg2ei32_v_u8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u8m2_m( @@ -724,7 +724,7 @@ void test_vsuxseg2ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsuxseg2ei32_v_u8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16mf4_m( @@ -733,7 +733,7 @@ void test_vsuxseg2ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsuxseg2ei32_v_u16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16mf2_m( @@ -742,7 +742,7 @@ void test_vsuxseg2ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_u16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16m1_m( @@ -751,7 +751,7 @@ void test_vsuxseg2ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsuxseg2ei32_v_u16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16m2_m( @@ -760,7 +760,7 @@ void test_vsuxseg2ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsuxseg2ei32_v_u16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u16m4_m( @@ -769,7 +769,7 @@ void test_vsuxseg2ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint32m8_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsuxseg2ei32_v_u16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u32mf2_m( @@ -778,7 +778,7 @@ void test_vsuxseg2ei32_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint32m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsuxseg2ei32_v_u32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u32m1_m( @@ -787,7 +787,7 @@ void test_vsuxseg2ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsuxseg2ei32_v_u32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u32m2_m( @@ -796,7 +796,7 @@ void test_vsuxseg2ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsuxseg2ei32_v_u32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u32m4_m( @@ -805,7 +805,7 @@ void test_vsuxseg2ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsuxseg2ei32_v_u32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u64m1_m( @@ -814,7 +814,7 @@ void test_vsuxseg2ei32_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsuxseg2ei32_v_u64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u64m2_m( @@ -823,7 +823,7 @@ void test_vsuxseg2ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsuxseg2ei32_v_u64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei32_v_u64m4_m( @@ -832,6 +832,6 @@ void test_vsuxseg2ei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei32_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint32m2_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsuxseg2ei32_v_u64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei32_v_u64m4_m(mask, base, bindex, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c index 155ce7c6d6fb997ffb083bd2d9f797a519e819db..8e8d79254536424b952fa7a9cfebbd83c490304b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_f16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg2ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_f16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg2ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsuxseg2ei64_v_f16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg2ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsuxseg2ei64_v_f16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg2ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_f32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg2ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsuxseg2ei64_v_f32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg2ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsuxseg2ei64_v_f32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f32m4( @@ -76,7 +76,7 @@ void test_vsuxseg2ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f32m4(float *base, vuint64m8_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsuxseg2ei64_v_f32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f64m1( @@ -85,7 +85,7 @@ void test_vsuxseg2ei64_v_f32m4(float *base, vuint64m8_t bindex, vfloat32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsuxseg2ei64_v_f64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f64m2( @@ -94,7 +94,7 @@ void test_vsuxseg2ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsuxseg2ei64_v_f64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f64m4( @@ -103,7 +103,7 @@ void test_vsuxseg2ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f64m4(double *base, vuint64m4_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsuxseg2ei64_v_f64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i8mf8( @@ -112,7 +112,7 @@ void test_vsuxseg2ei64_v_f64m4(double *base, vuint64m4_t bindex, vfloat64m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsuxseg2ei64_v_i8mf8(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i8mf4( @@ -121,7 +121,7 @@ void test_vsuxseg2ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_i8mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i8mf2( @@ -130,7 +130,7 @@ void test_vsuxseg2ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_i8mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i8m1( @@ -139,7 +139,7 @@ void test_vsuxseg2ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsuxseg2ei64_v_i8m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i16mf4( @@ -148,7 +148,7 @@ void test_vsuxseg2ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_i16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i16mf2( @@ -157,7 +157,7 @@ void test_vsuxseg2ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_i16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i16m1( @@ -166,7 +166,7 @@ void test_vsuxseg2ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsuxseg2ei64_v_i16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i16m2( @@ -175,7 +175,7 @@ void test_vsuxseg2ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsuxseg2ei64_v_i16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i32mf2( @@ -184,7 +184,7 @@ void test_vsuxseg2ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_i32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i32m1( @@ -193,7 +193,7 @@ void test_vsuxseg2ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsuxseg2ei64_v_i32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i32m2( @@ -202,7 +202,7 @@ void test_vsuxseg2ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsuxseg2ei64_v_i32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i32m4( @@ -211,7 +211,7 @@ void test_vsuxseg2ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i32m4(int32_t *base, vuint64m8_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsuxseg2ei64_v_i32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i64m1( @@ -220,7 +220,7 @@ void test_vsuxseg2ei64_v_i32m4(int32_t *base, vuint64m8_t bindex, vint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsuxseg2ei64_v_i64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i64m2( @@ -229,7 +229,7 @@ void test_vsuxseg2ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsuxseg2ei64_v_i64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i64m4( @@ -238,7 +238,7 @@ void test_vsuxseg2ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i64m4(int64_t *base, vuint64m4_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsuxseg2ei64_v_i64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u8mf8( @@ -247,7 +247,7 @@ void test_vsuxseg2ei64_v_i64m4(int64_t *base, vuint64m4_t bindex, vint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsuxseg2ei64_v_u8mf8(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u8mf4( @@ -256,7 +256,7 @@ void test_vsuxseg2ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_u8mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u8mf2( @@ -265,7 +265,7 @@ void test_vsuxseg2ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_u8mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u8m1( @@ -274,7 +274,7 @@ void test_vsuxseg2ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsuxseg2ei64_v_u8m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u16mf4( @@ -283,7 +283,7 @@ void test_vsuxseg2ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_u16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u16mf2( @@ -292,7 +292,7 @@ void test_vsuxseg2ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_u16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u16m1( @@ -301,7 +301,7 @@ void test_vsuxseg2ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsuxseg2ei64_v_u16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u16m2( @@ -310,7 +310,7 @@ void test_vsuxseg2ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsuxseg2ei64_v_u16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u32mf2( @@ -319,7 +319,7 @@ void test_vsuxseg2ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_u32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u32m1( @@ -328,7 +328,7 @@ void test_vsuxseg2ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsuxseg2ei64_v_u32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u32m2( @@ -337,7 +337,7 @@ void test_vsuxseg2ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsuxseg2ei64_v_u32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u32m4( @@ -346,7 +346,7 @@ void test_vsuxseg2ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u32m4(uint32_t *base, vuint64m8_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsuxseg2ei64_v_u32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u64m1( @@ -355,7 +355,7 @@ void test_vsuxseg2ei64_v_u32m4(uint32_t *base, vuint64m8_t bindex, vuint32m4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsuxseg2ei64_v_u64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u64m2( @@ -364,7 +364,7 @@ void test_vsuxseg2ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsuxseg2ei64_v_u64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u64m4( @@ -373,7 +373,7 @@ void test_vsuxseg2ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u64m4(uint64_t *base, vuint64m4_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsuxseg2ei64_v_u64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f16mf4_m( @@ -382,7 +382,7 @@ void test_vsuxseg2ei64_v_u64m4(uint64_t *base, vuint64m4_t bindex, vuint64m4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_f16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f16mf2_m( @@ -391,7 +391,7 @@ void test_vsuxseg2ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_f16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f16m1_m( @@ -400,7 +400,7 @@ void test_vsuxseg2ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsuxseg2ei64_v_f16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f16m2_m( @@ -409,7 +409,7 @@ void test_vsuxseg2ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsuxseg2ei64_v_f16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f32mf2_m( @@ -418,7 +418,7 @@ void test_vsuxseg2ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_f32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f32m1_m( @@ -427,7 +427,7 @@ void test_vsuxseg2ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsuxseg2ei64_v_f32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f32m2_m( @@ -436,7 +436,7 @@ void test_vsuxseg2ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsuxseg2ei64_v_f32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f32m4_m( @@ -445,7 +445,7 @@ void test_vsuxseg2ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f32m4_m(vbool8_t mask, float *base, vuint64m8_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsuxseg2ei64_v_f32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f64m1_m( @@ -454,7 +454,7 @@ void test_vsuxseg2ei64_v_f32m4_m(vbool8_t mask, float *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsuxseg2ei64_v_f64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f64m2_m( @@ -463,7 +463,7 @@ void test_vsuxseg2ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsuxseg2ei64_v_f64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_f64m4_m( @@ -472,7 +472,7 @@ void test_vsuxseg2ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_f64m4_m(vbool16_t mask, double *base, vuint64m4_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsuxseg2ei64_v_f64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_f64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i8mf8_m( @@ -481,7 +481,7 @@ void test_vsuxseg2ei64_v_f64m4_m(vbool16_t mask, double *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsuxseg2ei64_v_i8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i8mf4_m( @@ -490,7 +490,7 @@ void test_vsuxseg2ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_i8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i8mf2_m( @@ -499,7 +499,7 @@ void test_vsuxseg2ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_i8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i8m1_m( @@ -508,7 +508,7 @@ void test_vsuxseg2ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsuxseg2ei64_v_i8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i16mf4_m( @@ -517,7 +517,7 @@ void test_vsuxseg2ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_i16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i16mf2_m( @@ -526,7 +526,7 @@ void test_vsuxseg2ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_i16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i16m1_m( @@ -535,7 +535,7 @@ void test_vsuxseg2ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsuxseg2ei64_v_i16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i16m2_m( @@ -544,7 +544,7 @@ void test_vsuxseg2ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsuxseg2ei64_v_i16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i32mf2_m( @@ -553,7 +553,7 @@ void test_vsuxseg2ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_i32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i32m1_m( @@ -562,7 +562,7 @@ void test_vsuxseg2ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsuxseg2ei64_v_i32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i32m2_m( @@ -571,7 +571,7 @@ void test_vsuxseg2ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsuxseg2ei64_v_i32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i32m4_m( @@ -580,7 +580,7 @@ void test_vsuxseg2ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i32m4_m(vbool8_t mask, int32_t *base, vuint64m8_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsuxseg2ei64_v_i32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i64m1_m( @@ -589,7 +589,7 @@ void test_vsuxseg2ei64_v_i32m4_m(vbool8_t mask, int32_t *base, vuint64m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsuxseg2ei64_v_i64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i64m2_m( @@ -598,7 +598,7 @@ void test_vsuxseg2ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsuxseg2ei64_v_i64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_i64m4_m( @@ -607,7 +607,7 @@ void test_vsuxseg2ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_i64m4_m(vbool16_t mask, int64_t *base, vuint64m4_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsuxseg2ei64_v_i64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_i64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u8mf8_m( @@ -616,7 +616,7 @@ void test_vsuxseg2ei64_v_i64m4_m(vbool16_t mask, int64_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsuxseg2ei64_v_u8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u8mf4_m( @@ -625,7 +625,7 @@ void test_vsuxseg2ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_u8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u8mf2_m( @@ -634,7 +634,7 @@ void test_vsuxseg2ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_u8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u8m1_m( @@ -643,7 +643,7 @@ void test_vsuxseg2ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsuxseg2ei64_v_u8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u16mf4_m( @@ -652,7 +652,7 @@ void test_vsuxseg2ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsuxseg2ei64_v_u16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u16mf2_m( @@ -661,7 +661,7 @@ void test_vsuxseg2ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_u16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u16m1_m( @@ -670,7 +670,7 @@ void test_vsuxseg2ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsuxseg2ei64_v_u16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u16m2_m( @@ -679,7 +679,7 @@ void test_vsuxseg2ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsuxseg2ei64_v_u16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u32mf2_m( @@ -688,7 +688,7 @@ void test_vsuxseg2ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsuxseg2ei64_v_u32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u32m1_m( @@ -697,7 +697,7 @@ void test_vsuxseg2ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsuxseg2ei64_v_u32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u32m2_m( @@ -706,7 +706,7 @@ void test_vsuxseg2ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsuxseg2ei64_v_u32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u32m4_m( @@ -715,7 +715,7 @@ void test_vsuxseg2ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint64m8_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsuxseg2ei64_v_u32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u64m1_m( @@ -724,7 +724,7 @@ void test_vsuxseg2ei64_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsuxseg2ei64_v_u64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u64m2_m( @@ -733,7 +733,7 @@ void test_vsuxseg2ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsuxseg2ei64_v_u64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei64_v_u64m4_m( @@ -742,6 +742,6 @@ void test_vsuxseg2ei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei64_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint64m4_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsuxseg2ei64_v_u64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei64_v_u64m4_m(mask, base, bindex, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c index 03f0889e21034f4a91e3c9cee74ee3aeabcdb9b8..bed79a7de1e43f75be58e7445ef5439da56cee49 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg2ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_f16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg2ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_f16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg2ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsuxseg2ei8_v_f16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg2ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsuxseg2ei8_v_f16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16m4( @@ -49,7 +49,7 @@ void test_vsuxseg2ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsuxseg2ei8_v_f16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f32mf2( @@ -58,7 +58,7 @@ void test_vsuxseg2ei8_v_f16m4(_Float16 *base, vuint8m2_t bindex, vfloat16m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_f32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f32m1( @@ -67,7 +67,7 @@ void test_vsuxseg2ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsuxseg2ei8_v_f32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f32m2( @@ -76,7 +76,7 @@ void test_vsuxseg2ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsuxseg2ei8_v_f32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f32m4( @@ -85,7 +85,7 @@ void test_vsuxseg2ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsuxseg2ei8_v_f32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f64m1( @@ -94,7 +94,7 @@ void test_vsuxseg2ei8_v_f32m4(float *base, vuint8m1_t bindex, vfloat32m4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsuxseg2ei8_v_f64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f64m2( @@ -103,7 +103,7 @@ void test_vsuxseg2ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsuxseg2ei8_v_f64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f64m4( @@ -112,7 +112,7 @@ void test_vsuxseg2ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsuxseg2ei8_v_f64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8mf8( @@ -121,7 +121,7 @@ void test_vsuxseg2ei8_v_f64m4(double *base, vuint8mf2_t bindex, vfloat64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsuxseg2ei8_v_i8mf8(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8mf4( @@ -130,7 +130,7 @@ void test_vsuxseg2ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_i8mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8mf2( @@ -139,7 +139,7 @@ void test_vsuxseg2ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_i8mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8m1( @@ -148,7 +148,7 @@ void test_vsuxseg2ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsuxseg2ei8_v_i8m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8m2( @@ -157,7 +157,7 @@ void test_vsuxseg2ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsuxseg2ei8_v_i8m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8m4( @@ -166,7 +166,7 @@ void test_vsuxseg2ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsuxseg2ei8_v_i8m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16mf4( @@ -175,7 +175,7 @@ void test_vsuxseg2ei8_v_i8m4(int8_t *base, vuint8m4_t bindex, vint8m4_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_i16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16mf2( @@ -184,7 +184,7 @@ void test_vsuxseg2ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_i16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16m1( @@ -193,7 +193,7 @@ void test_vsuxseg2ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsuxseg2ei8_v_i16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16m2( @@ -202,7 +202,7 @@ void test_vsuxseg2ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsuxseg2ei8_v_i16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16m4( @@ -211,7 +211,7 @@ void test_vsuxseg2ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsuxseg2ei8_v_i16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg2ei8_v_i16m4(int16_t *base, vuint8m2_t bindex, vint16m4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_i32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i32m1( @@ -229,7 +229,7 @@ void test_vsuxseg2ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsuxseg2ei8_v_i32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i32m2( @@ -238,7 +238,7 @@ void test_vsuxseg2ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsuxseg2ei8_v_i32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i32m4( @@ -247,7 +247,7 @@ void test_vsuxseg2ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsuxseg2ei8_v_i32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i64m1( @@ -256,7 +256,7 @@ void test_vsuxseg2ei8_v_i32m4(int32_t *base, vuint8m1_t bindex, vint32m4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsuxseg2ei8_v_i64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i64m2( @@ -265,7 +265,7 @@ void test_vsuxseg2ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsuxseg2ei8_v_i64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i64m4( @@ -274,7 +274,7 @@ void test_vsuxseg2ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsuxseg2ei8_v_i64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8mf8( @@ -283,7 +283,7 @@ void test_vsuxseg2ei8_v_i64m4(int64_t *base, vuint8mf2_t bindex, vint64m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsuxseg2ei8_v_u8mf8(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8mf8(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8mf4( @@ -292,7 +292,7 @@ void test_vsuxseg2ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_u8mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8mf2( @@ -301,7 +301,7 @@ void test_vsuxseg2ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_u8mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8m1( @@ -310,7 +310,7 @@ void test_vsuxseg2ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsuxseg2ei8_v_u8m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8m2( @@ -319,7 +319,7 @@ void test_vsuxseg2ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsuxseg2ei8_v_u8m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8m4( @@ -328,7 +328,7 @@ void test_vsuxseg2ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsuxseg2ei8_v_u8m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16mf4( @@ -337,7 +337,7 @@ void test_vsuxseg2ei8_v_u8m4(uint8_t *base, vuint8m4_t bindex, vuint8m4_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_u16mf4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16mf4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16mf2( @@ -346,7 +346,7 @@ void test_vsuxseg2ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_u16mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16m1( @@ -355,7 +355,7 @@ void test_vsuxseg2ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsuxseg2ei8_v_u16m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16m2( @@ -364,7 +364,7 @@ void test_vsuxseg2ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsuxseg2ei8_v_u16m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16m4( @@ -373,7 +373,7 @@ void test_vsuxseg2ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsuxseg2ei8_v_u16m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u32mf2( @@ -382,7 +382,7 @@ void test_vsuxseg2ei8_v_u16m4(uint16_t *base, vuint8m2_t bindex, vuint16m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_u32mf2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u32mf2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u32m1( @@ -391,7 +391,7 @@ void test_vsuxseg2ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsuxseg2ei8_v_u32m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u32m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u32m2( @@ -400,7 +400,7 @@ void test_vsuxseg2ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsuxseg2ei8_v_u32m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u32m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u32m4( @@ -409,7 +409,7 @@ void test_vsuxseg2ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsuxseg2ei8_v_u32m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u32m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u64m1( @@ -418,7 +418,7 @@ void test_vsuxseg2ei8_v_u32m4(uint32_t *base, vuint8m1_t bindex, vuint32m4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsuxseg2ei8_v_u64m1(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u64m1(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u64m2( @@ -427,7 +427,7 @@ void test_vsuxseg2ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsuxseg2ei8_v_u64m2(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u64m2(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u64m4( @@ -436,7 +436,7 @@ void test_vsuxseg2ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsuxseg2ei8_v_u64m4(base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u64m4(base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16mf4_m( @@ -445,7 +445,7 @@ void test_vsuxseg2ei8_v_u64m4(uint64_t *base, vuint8mf2_t bindex, vuint64m4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_f16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg2ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_f16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg2ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, size_t vl) { - return vsuxseg2ei8_v_f16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16m2_m( @@ -472,7 +472,7 @@ void test_vsuxseg2ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, size_t vl) { - return vsuxseg2ei8_v_f16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f16m4_m( @@ -481,7 +481,7 @@ void test_vsuxseg2ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex, vfloat16m4_t v0, vfloat16m4_t v1, size_t vl) { - return vsuxseg2ei8_v_f16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f32mf2_m( @@ -490,7 +490,7 @@ void test_vsuxseg2ei8_v_f16m4_m(vbool4_t mask, _Float16 *base, vuint8m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_f32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f32m1_m( @@ -499,7 +499,7 @@ void test_vsuxseg2ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, size_t vl) { - return vsuxseg2ei8_v_f32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f32m2_m( @@ -508,7 +508,7 @@ void test_vsuxseg2ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, size_t vl) { - return vsuxseg2ei8_v_f32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f32m4_m( @@ -517,7 +517,7 @@ void test_vsuxseg2ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, vfloat32m4_t v0, vfloat32m4_t v1, size_t vl) { - return vsuxseg2ei8_v_f32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f64m1_m( @@ -526,7 +526,7 @@ void test_vsuxseg2ei8_v_f32m4_m(vbool8_t mask, float *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, size_t vl) { - return vsuxseg2ei8_v_f64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f64m2_m( @@ -535,7 +535,7 @@ void test_vsuxseg2ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, size_t vl) { - return vsuxseg2ei8_v_f64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_f64m4_m( @@ -544,7 +544,7 @@ void test_vsuxseg2ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex, vfloat64m4_t v0, vfloat64m4_t v1, size_t vl) { - return vsuxseg2ei8_v_f64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_f64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8mf8_m( @@ -553,7 +553,7 @@ void test_vsuxseg2ei8_v_f64m4_m(vbool16_t mask, double *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, size_t vl) { - return vsuxseg2ei8_v_i8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg2ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_i8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg2ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_i8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg2ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, size_t vl) { - return vsuxseg2ei8_v_i8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg2ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, size_t vl) { - return vsuxseg2ei8_v_i8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i8m4_m( @@ -598,7 +598,7 @@ void test_vsuxseg2ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, vint8m4_t v0, vint8m4_t v1, size_t vl) { - return vsuxseg2ei8_v_i8m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i8m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16mf4_m( @@ -607,7 +607,7 @@ void test_vsuxseg2ei8_v_i8m4_m(vbool2_t mask, int8_t *base, vuint8m4_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_i16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16mf2_m( @@ -616,7 +616,7 @@ void test_vsuxseg2ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_i16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16m1_m( @@ -625,7 +625,7 @@ void test_vsuxseg2ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, size_t vl) { - return vsuxseg2ei8_v_i16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16m2_m( @@ -634,7 +634,7 @@ void test_vsuxseg2ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, size_t vl) { - return vsuxseg2ei8_v_i16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i16m4_m( @@ -643,7 +643,7 @@ void test_vsuxseg2ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, vint16m4_t v0, vint16m4_t v1, size_t vl) { - return vsuxseg2ei8_v_i16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i32mf2_m( @@ -652,7 +652,7 @@ void test_vsuxseg2ei8_v_i16m4_m(vbool4_t mask, int16_t *base, vuint8m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_i32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i32m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg2ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, size_t vl) { - return vsuxseg2ei8_v_i32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i32m2_m( @@ -670,7 +670,7 @@ void test_vsuxseg2ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, size_t vl) { - return vsuxseg2ei8_v_i32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i32m4_m( @@ -679,7 +679,7 @@ void test_vsuxseg2ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, vint32m4_t v0, vint32m4_t v1, size_t vl) { - return vsuxseg2ei8_v_i32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i64m1_m( @@ -688,7 +688,7 @@ void test_vsuxseg2ei8_v_i32m4_m(vbool8_t mask, int32_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, size_t vl) { - return vsuxseg2ei8_v_i64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i64m2_m( @@ -697,7 +697,7 @@ void test_vsuxseg2ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, size_t vl) { - return vsuxseg2ei8_v_i64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_i64m4_m( @@ -706,7 +706,7 @@ void test_vsuxseg2ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t bindex, vint64m4_t v0, vint64m4_t v1, size_t vl) { - return vsuxseg2ei8_v_i64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_i64m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8mf8_m( @@ -715,7 +715,7 @@ void test_vsuxseg2ei8_v_i64m4_m(vbool16_t mask, int64_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, size_t vl) { - return vsuxseg2ei8_v_u8mf8_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8mf8_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8mf4_m( @@ -724,7 +724,7 @@ void test_vsuxseg2ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_u8mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8mf2_m( @@ -733,7 +733,7 @@ void test_vsuxseg2ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_u8mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8m1_m( @@ -742,7 +742,7 @@ void test_vsuxseg2ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, size_t vl) { - return vsuxseg2ei8_v_u8m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8m2_m( @@ -751,7 +751,7 @@ void test_vsuxseg2ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, size_t vl) { - return vsuxseg2ei8_v_u8m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u8m4_m( @@ -760,7 +760,7 @@ void test_vsuxseg2ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, vuint8m4_t v0, vuint8m4_t v1, size_t vl) { - return vsuxseg2ei8_v_u8m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u8m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16mf4_m( @@ -769,7 +769,7 @@ void test_vsuxseg2ei8_v_u8m4_m(vbool2_t mask, uint8_t *base, vuint8m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, size_t vl) { - return vsuxseg2ei8_v_u16mf4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16mf4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16mf2_m( @@ -778,7 +778,7 @@ void test_vsuxseg2ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_u16mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16m1_m( @@ -787,7 +787,7 @@ void test_vsuxseg2ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, size_t vl) { - return vsuxseg2ei8_v_u16m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16m2_m( @@ -796,7 +796,7 @@ void test_vsuxseg2ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, size_t vl) { - return vsuxseg2ei8_v_u16m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u16m4_m( @@ -805,7 +805,7 @@ void test_vsuxseg2ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex, vuint16m4_t v0, vuint16m4_t v1, size_t vl) { - return vsuxseg2ei8_v_u16m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u16m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u32mf2_m( @@ -814,7 +814,7 @@ void test_vsuxseg2ei8_v_u16m4_m(vbool4_t mask, uint16_t *base, vuint8m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, size_t vl) { - return vsuxseg2ei8_v_u32mf2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u32mf2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u32m1_m( @@ -823,7 +823,7 @@ void test_vsuxseg2ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, size_t vl) { - return vsuxseg2ei8_v_u32m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u32m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u32m2_m( @@ -832,7 +832,7 @@ void test_vsuxseg2ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, size_t vl) { - return vsuxseg2ei8_v_u32m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u32m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u32m4_m( @@ -841,7 +841,7 @@ void test_vsuxseg2ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex, vuint32m4_t v0, vuint32m4_t v1, size_t vl) { - return vsuxseg2ei8_v_u32m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u32m4_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u64m1_m( @@ -850,7 +850,7 @@ void test_vsuxseg2ei8_v_u32m4_m(vbool8_t mask, uint32_t *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, size_t vl) { - return vsuxseg2ei8_v_u64m1_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u64m1_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u64m2_m( @@ -859,7 +859,7 @@ void test_vsuxseg2ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, size_t vl) { - return vsuxseg2ei8_v_u64m2_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u64m2_m(mask, base, bindex, v0, v1, vl); } // CHECK-RV64-LABEL: @test_vsuxseg2ei8_v_u64m4_m( @@ -868,6 +868,6 @@ void test_vsuxseg2ei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg2ei8_v_u64m4_m(vbool16_t mask, uint64_t *base, vuint8mf2_t bindex, vuint64m4_t v0, vuint64m4_t v1, size_t vl) { - return vsuxseg2ei8_v_u64m4_m(mask, base, bindex, v0, v1, vl); + return __riscv_vsuxseg2ei8_v_u64m4_m(mask, base, bindex, v0, v1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c index 2fb585926e4487f0c97ddb2b9b29cb44ea177247..958defab56e2270a046112e849c659cf09768ce6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_f16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg3ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_f16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg3ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsuxseg3ei16_v_f16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg3ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsuxseg3ei16_v_f16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg3ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_f32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg3ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsuxseg3ei16_v_f32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg3ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsuxseg3ei16_v_f32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f64m1( @@ -76,7 +76,7 @@ void test_vsuxseg3ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsuxseg3ei16_v_f64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f64m2( @@ -85,7 +85,7 @@ void test_vsuxseg3ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsuxseg3ei16_v_f64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsuxseg3ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsuxseg3ei16_v_i8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsuxseg3ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_i8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsuxseg3ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_i8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8m1( @@ -121,7 +121,7 @@ void test_vsuxseg3ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsuxseg3ei16_v_i8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8m2( @@ -130,7 +130,7 @@ void test_vsuxseg3ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsuxseg3ei16_v_i8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsuxseg3ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_i16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsuxseg3ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_i16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i16m1( @@ -157,7 +157,7 @@ void test_vsuxseg3ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsuxseg3ei16_v_i16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i16m2( @@ -166,7 +166,7 @@ void test_vsuxseg3ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsuxseg3ei16_v_i16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsuxseg3ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_i32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i32m1( @@ -184,7 +184,7 @@ void test_vsuxseg3ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsuxseg3ei16_v_i32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i32m2( @@ -193,7 +193,7 @@ void test_vsuxseg3ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsuxseg3ei16_v_i32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i64m1( @@ -202,7 +202,7 @@ void test_vsuxseg3ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsuxseg3ei16_v_i64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i64m2( @@ -211,7 +211,7 @@ void test_vsuxseg3ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsuxseg3ei16_v_i64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsuxseg3ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsuxseg3ei16_v_u8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsuxseg3ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_u8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsuxseg3ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_u8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8m1( @@ -247,7 +247,7 @@ void test_vsuxseg3ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsuxseg3ei16_v_u8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8m2( @@ -256,7 +256,7 @@ void test_vsuxseg3ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsuxseg3ei16_v_u8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsuxseg3ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_u16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsuxseg3ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_u16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u16m1( @@ -283,7 +283,7 @@ void test_vsuxseg3ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsuxseg3ei16_v_u16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u16m2( @@ -292,7 +292,7 @@ void test_vsuxseg3ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsuxseg3ei16_v_u16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsuxseg3ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_u32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u32m1( @@ -310,7 +310,7 @@ void test_vsuxseg3ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsuxseg3ei16_v_u32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u32m2( @@ -319,7 +319,7 @@ void test_vsuxseg3ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsuxseg3ei16_v_u32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u64m1( @@ -328,7 +328,7 @@ void test_vsuxseg3ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsuxseg3ei16_v_u64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u64m2( @@ -337,7 +337,7 @@ void test_vsuxseg3ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsuxseg3ei16_v_u64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsuxseg3ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsuxseg3ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsuxseg3ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsuxseg3ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsuxseg3ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsuxseg3ei16_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsuxseg3ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsuxseg3ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsuxseg3ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsuxseg3ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsuxseg3ei16_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsuxseg3ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsuxseg3ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsuxseg3ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsuxseg3ei16_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsuxseg3ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsuxseg3ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsuxseg3ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsuxseg3ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsuxseg3ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsuxseg3ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsuxseg3ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsuxseg3ei16_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsuxseg3ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsuxseg3ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsuxseg3ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsuxseg3ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsuxseg3ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsuxseg3ei16_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsuxseg3ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsuxseg3ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsuxseg3ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsuxseg3ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsuxseg3ei16_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsuxseg3ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsuxseg3ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsuxseg3ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsuxseg3ei16_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsuxseg3ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsuxseg3ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg3ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg3ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg3ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsuxseg3ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg3ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsuxseg3ei16_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsuxseg3ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsuxseg3ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsuxseg3ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsuxseg3ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsuxseg3ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsuxseg3ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsuxseg3ei16_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsuxseg3ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsuxseg3ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsuxseg3ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsuxseg3ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsuxseg3ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsuxseg3ei16_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg3ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsuxseg3ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei16_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsuxseg3ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsuxseg3ei16_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei16_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c index 620ffb801b0477d43e312daf03408134c8766dbb..0b7f5934c47931a2870b72ff4c14e56425e7ec0d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_f16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg3ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_f16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg3ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsuxseg3ei32_v_f16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg3ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsuxseg3ei32_v_f16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg3ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_f32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg3ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsuxseg3ei32_v_f32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg3ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsuxseg3ei32_v_f32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f64m1( @@ -76,7 +76,7 @@ void test_vsuxseg3ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsuxseg3ei32_v_f64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f64m2( @@ -85,7 +85,7 @@ void test_vsuxseg3ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsuxseg3ei32_v_f64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsuxseg3ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsuxseg3ei32_v_i8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsuxseg3ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_i8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsuxseg3ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_i8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8m1( @@ -121,7 +121,7 @@ void test_vsuxseg3ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsuxseg3ei32_v_i8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8m2( @@ -130,7 +130,7 @@ void test_vsuxseg3ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsuxseg3ei32_v_i8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsuxseg3ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_i16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsuxseg3ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_i16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i16m1( @@ -157,7 +157,7 @@ void test_vsuxseg3ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsuxseg3ei32_v_i16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i16m2( @@ -166,7 +166,7 @@ void test_vsuxseg3ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsuxseg3ei32_v_i16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsuxseg3ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_i32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i32m1( @@ -184,7 +184,7 @@ void test_vsuxseg3ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsuxseg3ei32_v_i32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i32m2( @@ -193,7 +193,7 @@ void test_vsuxseg3ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsuxseg3ei32_v_i32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i64m1( @@ -202,7 +202,7 @@ void test_vsuxseg3ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsuxseg3ei32_v_i64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i64m2( @@ -211,7 +211,7 @@ void test_vsuxseg3ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsuxseg3ei32_v_i64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsuxseg3ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsuxseg3ei32_v_u8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsuxseg3ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_u8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsuxseg3ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_u8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8m1( @@ -247,7 +247,7 @@ void test_vsuxseg3ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsuxseg3ei32_v_u8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8m2( @@ -256,7 +256,7 @@ void test_vsuxseg3ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsuxseg3ei32_v_u8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsuxseg3ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_u16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsuxseg3ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_u16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u16m1( @@ -283,7 +283,7 @@ void test_vsuxseg3ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsuxseg3ei32_v_u16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u16m2( @@ -292,7 +292,7 @@ void test_vsuxseg3ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsuxseg3ei32_v_u16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsuxseg3ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_u32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u32m1( @@ -310,7 +310,7 @@ void test_vsuxseg3ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsuxseg3ei32_v_u32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u32m2( @@ -319,7 +319,7 @@ void test_vsuxseg3ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsuxseg3ei32_v_u32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u64m1( @@ -328,7 +328,7 @@ void test_vsuxseg3ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsuxseg3ei32_v_u64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u64m2( @@ -337,7 +337,7 @@ void test_vsuxseg3ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsuxseg3ei32_v_u64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsuxseg3ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsuxseg3ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsuxseg3ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsuxseg3ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsuxseg3ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsuxseg3ei32_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsuxseg3ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsuxseg3ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsuxseg3ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsuxseg3ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsuxseg3ei32_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsuxseg3ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsuxseg3ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsuxseg3ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsuxseg3ei32_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsuxseg3ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsuxseg3ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsuxseg3ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsuxseg3ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsuxseg3ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsuxseg3ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsuxseg3ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsuxseg3ei32_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsuxseg3ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsuxseg3ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsuxseg3ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsuxseg3ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsuxseg3ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsuxseg3ei32_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsuxseg3ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsuxseg3ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsuxseg3ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsuxseg3ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsuxseg3ei32_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsuxseg3ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsuxseg3ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsuxseg3ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsuxseg3ei32_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsuxseg3ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsuxseg3ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg3ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg3ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg3ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsuxseg3ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg3ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsuxseg3ei32_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsuxseg3ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsuxseg3ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsuxseg3ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsuxseg3ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsuxseg3ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsuxseg3ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsuxseg3ei32_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsuxseg3ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsuxseg3ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsuxseg3ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsuxseg3ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsuxseg3ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsuxseg3ei32_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg3ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsuxseg3ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei32_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsuxseg3ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsuxseg3ei32_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei32_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c index 89834a953a445f0c7cbd40930a5976631552247d..1ce4435a29a00bbec6ea5308db9d55aa81e49d67 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_f16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg3ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_f16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg3ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsuxseg3ei64_v_f16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg3ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsuxseg3ei64_v_f16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg3ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_f32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg3ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsuxseg3ei64_v_f32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg3ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsuxseg3ei64_v_f32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f64m1( @@ -76,7 +76,7 @@ void test_vsuxseg3ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsuxseg3ei64_v_f64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f64m2( @@ -85,7 +85,7 @@ void test_vsuxseg3ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsuxseg3ei64_v_f64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsuxseg3ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsuxseg3ei64_v_i8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsuxseg3ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_i8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsuxseg3ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_i8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i8m1( @@ -121,7 +121,7 @@ void test_vsuxseg3ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsuxseg3ei64_v_i8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i16mf4( @@ -130,7 +130,7 @@ void test_vsuxseg3ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_i16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i16mf2( @@ -139,7 +139,7 @@ void test_vsuxseg3ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_i16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i16m1( @@ -148,7 +148,7 @@ void test_vsuxseg3ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsuxseg3ei64_v_i16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i16m2( @@ -157,7 +157,7 @@ void test_vsuxseg3ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsuxseg3ei64_v_i16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i32mf2( @@ -166,7 +166,7 @@ void test_vsuxseg3ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_i32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i32m1( @@ -175,7 +175,7 @@ void test_vsuxseg3ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsuxseg3ei64_v_i32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i32m2( @@ -184,7 +184,7 @@ void test_vsuxseg3ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsuxseg3ei64_v_i32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i64m1( @@ -193,7 +193,7 @@ void test_vsuxseg3ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsuxseg3ei64_v_i64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i64m2( @@ -202,7 +202,7 @@ void test_vsuxseg3ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsuxseg3ei64_v_i64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u8mf8( @@ -211,7 +211,7 @@ void test_vsuxseg3ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsuxseg3ei64_v_u8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u8mf4( @@ -220,7 +220,7 @@ void test_vsuxseg3ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_u8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u8mf2( @@ -229,7 +229,7 @@ void test_vsuxseg3ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_u8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u8m1( @@ -238,7 +238,7 @@ void test_vsuxseg3ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsuxseg3ei64_v_u8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u16mf4( @@ -247,7 +247,7 @@ void test_vsuxseg3ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_u16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u16mf2( @@ -256,7 +256,7 @@ void test_vsuxseg3ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_u16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u16m1( @@ -265,7 +265,7 @@ void test_vsuxseg3ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsuxseg3ei64_v_u16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u16m2( @@ -274,7 +274,7 @@ void test_vsuxseg3ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsuxseg3ei64_v_u16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u32mf2( @@ -283,7 +283,7 @@ void test_vsuxseg3ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_u32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u32m1( @@ -292,7 +292,7 @@ void test_vsuxseg3ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsuxseg3ei64_v_u32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u32m2( @@ -301,7 +301,7 @@ void test_vsuxseg3ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsuxseg3ei64_v_u32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u64m1( @@ -310,7 +310,7 @@ void test_vsuxseg3ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsuxseg3ei64_v_u64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u64m2( @@ -319,7 +319,7 @@ void test_vsuxseg3ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsuxseg3ei64_v_u64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f16mf4_m( @@ -328,7 +328,7 @@ void test_vsuxseg3ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f16mf2_m( @@ -337,7 +337,7 @@ void test_vsuxseg3ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f16m1_m( @@ -346,7 +346,7 @@ void test_vsuxseg3ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsuxseg3ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f16m2_m( @@ -355,7 +355,7 @@ void test_vsuxseg3ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsuxseg3ei64_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg3ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg3ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsuxseg3ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f32m2_m( @@ -382,7 +382,7 @@ void test_vsuxseg3ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsuxseg3ei64_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f64m1_m( @@ -391,7 +391,7 @@ void test_vsuxseg3ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsuxseg3ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_f64m2_m( @@ -400,7 +400,7 @@ void test_vsuxseg3ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsuxseg3ei64_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i8mf8_m( @@ -409,7 +409,7 @@ void test_vsuxseg3ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsuxseg3ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i8mf4_m( @@ -418,7 +418,7 @@ void test_vsuxseg3ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i8mf2_m( @@ -427,7 +427,7 @@ void test_vsuxseg3ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i8m1_m( @@ -436,7 +436,7 @@ void test_vsuxseg3ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsuxseg3ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i16mf4_m( @@ -445,7 +445,7 @@ void test_vsuxseg3ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i16mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg3ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i16m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg3ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsuxseg3ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i16m2_m( @@ -472,7 +472,7 @@ void test_vsuxseg3ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsuxseg3ei64_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i32mf2_m( @@ -481,7 +481,7 @@ void test_vsuxseg3ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i32m1_m( @@ -490,7 +490,7 @@ void test_vsuxseg3ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsuxseg3ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i32m2_m( @@ -499,7 +499,7 @@ void test_vsuxseg3ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsuxseg3ei64_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i64m1_m( @@ -508,7 +508,7 @@ void test_vsuxseg3ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsuxseg3ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_i64m2_m( @@ -517,7 +517,7 @@ void test_vsuxseg3ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsuxseg3ei64_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u8mf8_m( @@ -526,7 +526,7 @@ void test_vsuxseg3ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsuxseg3ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u8mf4_m( @@ -535,7 +535,7 @@ void test_vsuxseg3ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u8mf2_m( @@ -544,7 +544,7 @@ void test_vsuxseg3ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u8m1_m( @@ -553,7 +553,7 @@ void test_vsuxseg3ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsuxseg3ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u16mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg3ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsuxseg3ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u16mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg3ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u16m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg3ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsuxseg3ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u16m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg3ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsuxseg3ei64_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u32mf2_m( @@ -598,7 +598,7 @@ void test_vsuxseg3ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsuxseg3ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u32m1_m( @@ -607,7 +607,7 @@ void test_vsuxseg3ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsuxseg3ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u32m2_m( @@ -616,7 +616,7 @@ void test_vsuxseg3ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsuxseg3ei64_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u64m1_m( @@ -625,7 +625,7 @@ void test_vsuxseg3ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsuxseg3ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei64_v_u64m2_m( @@ -634,6 +634,6 @@ void test_vsuxseg3ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsuxseg3ei64_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei64_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c index ebf93eeca43bfd3913a8f6516eed3adc41c404f1..a421adafb91653317d5adb1f42b267f6e1499e51 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg3ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_f16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg3ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_f16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg3ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsuxseg3ei8_v_f16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg3ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsuxseg3ei8_v_f16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg3ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_f32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg3ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsuxseg3ei8_v_f32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg3ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsuxseg3ei8_v_f32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f64m1( @@ -76,7 +76,7 @@ void test_vsuxseg3ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsuxseg3ei8_v_f64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f64m2( @@ -85,7 +85,7 @@ void test_vsuxseg3ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsuxseg3ei8_v_f64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsuxseg3ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsuxseg3ei8_v_i8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsuxseg3ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_i8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsuxseg3ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_i8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8m1( @@ -121,7 +121,7 @@ void test_vsuxseg3ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsuxseg3ei8_v_i8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8m2( @@ -130,7 +130,7 @@ void test_vsuxseg3ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsuxseg3ei8_v_i8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsuxseg3ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_i16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsuxseg3ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_i16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i16m1( @@ -157,7 +157,7 @@ void test_vsuxseg3ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsuxseg3ei8_v_i16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i16m2( @@ -166,7 +166,7 @@ void test_vsuxseg3ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsuxseg3ei8_v_i16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsuxseg3ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_i32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i32m1( @@ -184,7 +184,7 @@ void test_vsuxseg3ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsuxseg3ei8_v_i32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i32m2( @@ -193,7 +193,7 @@ void test_vsuxseg3ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsuxseg3ei8_v_i32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i64m1( @@ -202,7 +202,7 @@ void test_vsuxseg3ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsuxseg3ei8_v_i64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i64m2( @@ -211,7 +211,7 @@ void test_vsuxseg3ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsuxseg3ei8_v_i64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsuxseg3ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsuxseg3ei8_v_u8mf8(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8mf8(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsuxseg3ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_u8mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsuxseg3ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_u8mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8m1( @@ -247,7 +247,7 @@ void test_vsuxseg3ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsuxseg3ei8_v_u8m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8m2( @@ -256,7 +256,7 @@ void test_vsuxseg3ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsuxseg3ei8_v_u8m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsuxseg3ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_u16mf4(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u16mf4(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsuxseg3ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_u16mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u16mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u16m1( @@ -283,7 +283,7 @@ void test_vsuxseg3ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsuxseg3ei8_v_u16m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u16m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u16m2( @@ -292,7 +292,7 @@ void test_vsuxseg3ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsuxseg3ei8_v_u16m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u16m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsuxseg3ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_u32mf2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u32mf2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u32m1( @@ -310,7 +310,7 @@ void test_vsuxseg3ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsuxseg3ei8_v_u32m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u32m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u32m2( @@ -319,7 +319,7 @@ void test_vsuxseg3ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsuxseg3ei8_v_u32m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u32m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u64m1( @@ -328,7 +328,7 @@ void test_vsuxseg3ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsuxseg3ei8_v_u64m1(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u64m1(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u64m2( @@ -337,7 +337,7 @@ void test_vsuxseg3ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsuxseg3ei8_v_u64m2(base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u64m2(base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsuxseg3ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsuxseg3ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsuxseg3ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, size_t vl) { - return vsuxseg3ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsuxseg3ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, size_t vl) { - return vsuxseg3ei8_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsuxseg3ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsuxseg3ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, size_t vl) { - return vsuxseg3ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsuxseg3ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, size_t vl) { - return vsuxseg3ei8_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsuxseg3ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, size_t vl) { - return vsuxseg3ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsuxseg3ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, size_t vl) { - return vsuxseg3ei8_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_f64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsuxseg3ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, size_t vl) { - return vsuxseg3ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsuxseg3ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsuxseg3ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsuxseg3ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, size_t vl) { - return vsuxseg3ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsuxseg3ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, size_t vl) { - return vsuxseg3ei8_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsuxseg3ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsuxseg3ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsuxseg3ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, size_t vl) { - return vsuxseg3ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsuxseg3ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, size_t vl) { - return vsuxseg3ei8_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsuxseg3ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsuxseg3ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, size_t vl) { - return vsuxseg3ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsuxseg3ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, size_t vl) { - return vsuxseg3ei8_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsuxseg3ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, size_t vl) { - return vsuxseg3ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsuxseg3ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, size_t vl) { - return vsuxseg3ei8_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_i64m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsuxseg3ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, size_t vl) { - return vsuxseg3ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg3ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg3ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg3ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, size_t vl) { - return vsuxseg3ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg3ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, size_t vl) { - return vsuxseg3ei8_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u8m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsuxseg3ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, size_t vl) { - return vsuxseg3ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsuxseg3ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsuxseg3ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, size_t vl) { - return vsuxseg3ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsuxseg3ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, size_t vl) { - return vsuxseg3ei8_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u16m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsuxseg3ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, size_t vl) { - return vsuxseg3ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsuxseg3ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, size_t vl) { - return vsuxseg3ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsuxseg3ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, size_t vl) { - return vsuxseg3ei8_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u32m2_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg3ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, size_t vl) { - return vsuxseg3ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, vl); } // CHECK-RV64-LABEL: @test_vsuxseg3ei8_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsuxseg3ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg3ei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, size_t vl) { - return vsuxseg3ei8_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); + return __riscv_vsuxseg3ei8_v_u64m2_m(mask, base, bindex, v0, v1, v2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c index 85dd45ff704a23f0a39e4edba3341e5cbbe75808..02c16469e90abcf9fb6cf90fa5f3e6acebc97469 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg4ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg4ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsuxseg4ei16_v_f16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg4ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsuxseg4ei16_v_f16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg4ei16_v_f16m2(_Float16 *base, vuint16m2_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg4ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsuxseg4ei16_v_f32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg4ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsuxseg4ei16_v_f32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f64m1( @@ -76,7 +76,7 @@ void test_vsuxseg4ei16_v_f32m2(float *base, vuint16m1_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsuxseg4ei16_v_f64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f64m2( @@ -85,7 +85,7 @@ void test_vsuxseg4ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsuxseg4ei16_v_f64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsuxseg4ei16_v_f64m2(double *base, vuint16mf2_t bindex, vfloat64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsuxseg4ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsuxseg4ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsuxseg4ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8m1( @@ -121,7 +121,7 @@ void test_vsuxseg4ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsuxseg4ei16_v_i8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8m2( @@ -130,7 +130,7 @@ void test_vsuxseg4ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsuxseg4ei16_v_i8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsuxseg4ei16_v_i8m2(int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsuxseg4ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i16m1( @@ -157,7 +157,7 @@ void test_vsuxseg4ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsuxseg4ei16_v_i16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i16m2( @@ -166,7 +166,7 @@ void test_vsuxseg4ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsuxseg4ei16_v_i16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsuxseg4ei16_v_i16m2(int16_t *base, vuint16m2_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i32m1( @@ -184,7 +184,7 @@ void test_vsuxseg4ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsuxseg4ei16_v_i32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i32m2( @@ -193,7 +193,7 @@ void test_vsuxseg4ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsuxseg4ei16_v_i32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i64m1( @@ -202,7 +202,7 @@ void test_vsuxseg4ei16_v_i32m2(int32_t *base, vuint16m1_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsuxseg4ei16_v_i64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i64m2( @@ -211,7 +211,7 @@ void test_vsuxseg4ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsuxseg4ei16_v_i64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsuxseg4ei16_v_i64m2(int64_t *base, vuint16mf2_t bindex, vint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsuxseg4ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsuxseg4ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsuxseg4ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8m1( @@ -247,7 +247,7 @@ void test_vsuxseg4ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsuxseg4ei16_v_u8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8m2( @@ -256,7 +256,7 @@ void test_vsuxseg4ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsuxseg4ei16_v_u8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsuxseg4ei16_v_u8m2(uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsuxseg4ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u16m1( @@ -283,7 +283,7 @@ void test_vsuxseg4ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsuxseg4ei16_v_u16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u16m2( @@ -292,7 +292,7 @@ void test_vsuxseg4ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsuxseg4ei16_v_u16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsuxseg4ei16_v_u16m2(uint16_t *base, vuint16m2_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u32m1( @@ -310,7 +310,7 @@ void test_vsuxseg4ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsuxseg4ei16_v_u32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u32m2( @@ -319,7 +319,7 @@ void test_vsuxseg4ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsuxseg4ei16_v_u32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u64m1( @@ -328,7 +328,7 @@ void test_vsuxseg4ei16_v_u32m2(uint32_t *base, vuint16m1_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsuxseg4ei16_v_u64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u64m2( @@ -337,7 +337,7 @@ void test_vsuxseg4ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsuxseg4ei16_v_u64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsuxseg4ei16_v_u64m2(uint64_t *base, vuint16mf2_t bindex, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsuxseg4ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsuxseg4ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsuxseg4ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsuxseg4ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsuxseg4ei16_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsuxseg4ei16_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsuxseg4ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsuxseg4ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsuxseg4ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsuxseg4ei16_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsuxseg4ei16_v_f32m2_m(vbool16_t mask, float *base, vuint16m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsuxseg4ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsuxseg4ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsuxseg4ei16_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsuxseg4ei16_v_f64m2_m(vbool32_t mask, double *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsuxseg4ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsuxseg4ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsuxseg4ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsuxseg4ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsuxseg4ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsuxseg4ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsuxseg4ei16_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsuxseg4ei16_v_i8m2_m(vbool4_t mask, int8_t *base, vuint16m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsuxseg4ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsuxseg4ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsuxseg4ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsuxseg4ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsuxseg4ei16_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsuxseg4ei16_v_i16m2_m(vbool8_t mask, int16_t *base, vuint16m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsuxseg4ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsuxseg4ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsuxseg4ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsuxseg4ei16_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsuxseg4ei16_v_i32m2_m(vbool16_t mask, int32_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsuxseg4ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsuxseg4ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsuxseg4ei16_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsuxseg4ei16_v_i64m2_m(vbool32_t mask, int64_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsuxseg4ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg4ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg4ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg4ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsuxseg4ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg4ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsuxseg4ei16_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsuxseg4ei16_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint16m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsuxseg4ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsuxseg4ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsuxseg4ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsuxseg4ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsuxseg4ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsuxseg4ei16_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsuxseg4ei16_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint16m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsuxseg4ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsuxseg4ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsuxseg4ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsuxseg4ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsuxseg4ei16_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg4ei16_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsuxseg4ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei16_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsuxseg4ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei16_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint16mf2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsuxseg4ei16_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei16_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c index 53afb84b7e03c60eac9248de0fcd848ebc419561..94a615539c7a75be1a2aa49b50c82f72b0561ea5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg4ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg4ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsuxseg4ei32_v_f16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg4ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsuxseg4ei32_v_f16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg4ei32_v_f16m2(_Float16 *base, vuint32m4_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg4ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsuxseg4ei32_v_f32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg4ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsuxseg4ei32_v_f32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f64m1( @@ -76,7 +76,7 @@ void test_vsuxseg4ei32_v_f32m2(float *base, vuint32m2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsuxseg4ei32_v_f64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f64m2( @@ -85,7 +85,7 @@ void test_vsuxseg4ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsuxseg4ei32_v_f64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsuxseg4ei32_v_f64m2(double *base, vuint32m1_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsuxseg4ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsuxseg4ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsuxseg4ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8m1( @@ -121,7 +121,7 @@ void test_vsuxseg4ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsuxseg4ei32_v_i8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8m2( @@ -130,7 +130,7 @@ void test_vsuxseg4ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsuxseg4ei32_v_i8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsuxseg4ei32_v_i8m2(int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsuxseg4ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i16m1( @@ -157,7 +157,7 @@ void test_vsuxseg4ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsuxseg4ei32_v_i16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i16m2( @@ -166,7 +166,7 @@ void test_vsuxseg4ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsuxseg4ei32_v_i16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsuxseg4ei32_v_i16m2(int16_t *base, vuint32m4_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i32m1( @@ -184,7 +184,7 @@ void test_vsuxseg4ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsuxseg4ei32_v_i32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i32m2( @@ -193,7 +193,7 @@ void test_vsuxseg4ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsuxseg4ei32_v_i32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i64m1( @@ -202,7 +202,7 @@ void test_vsuxseg4ei32_v_i32m2(int32_t *base, vuint32m2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsuxseg4ei32_v_i64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i64m2( @@ -211,7 +211,7 @@ void test_vsuxseg4ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsuxseg4ei32_v_i64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsuxseg4ei32_v_i64m2(int64_t *base, vuint32m1_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsuxseg4ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsuxseg4ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsuxseg4ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8m1( @@ -247,7 +247,7 @@ void test_vsuxseg4ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsuxseg4ei32_v_u8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8m2( @@ -256,7 +256,7 @@ void test_vsuxseg4ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsuxseg4ei32_v_u8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsuxseg4ei32_v_u8m2(uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsuxseg4ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u16m1( @@ -283,7 +283,7 @@ void test_vsuxseg4ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsuxseg4ei32_v_u16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u16m2( @@ -292,7 +292,7 @@ void test_vsuxseg4ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsuxseg4ei32_v_u16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsuxseg4ei32_v_u16m2(uint16_t *base, vuint32m4_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u32m1( @@ -310,7 +310,7 @@ void test_vsuxseg4ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsuxseg4ei32_v_u32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u32m2( @@ -319,7 +319,7 @@ void test_vsuxseg4ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsuxseg4ei32_v_u32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u64m1( @@ -328,7 +328,7 @@ void test_vsuxseg4ei32_v_u32m2(uint32_t *base, vuint32m2_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsuxseg4ei32_v_u64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u64m2( @@ -337,7 +337,7 @@ void test_vsuxseg4ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsuxseg4ei32_v_u64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsuxseg4ei32_v_u64m2(uint64_t *base, vuint32m1_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsuxseg4ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsuxseg4ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsuxseg4ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsuxseg4ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsuxseg4ei32_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsuxseg4ei32_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsuxseg4ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsuxseg4ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsuxseg4ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsuxseg4ei32_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsuxseg4ei32_v_f32m2_m(vbool16_t mask, float *base, vuint32m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsuxseg4ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsuxseg4ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsuxseg4ei32_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsuxseg4ei32_v_f64m2_m(vbool32_t mask, double *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsuxseg4ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsuxseg4ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsuxseg4ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsuxseg4ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsuxseg4ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsuxseg4ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsuxseg4ei32_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsuxseg4ei32_v_i8m2_m(vbool4_t mask, int8_t *base, vuint32m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsuxseg4ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsuxseg4ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsuxseg4ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsuxseg4ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsuxseg4ei32_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsuxseg4ei32_v_i16m2_m(vbool8_t mask, int16_t *base, vuint32m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsuxseg4ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsuxseg4ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsuxseg4ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsuxseg4ei32_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsuxseg4ei32_v_i32m2_m(vbool16_t mask, int32_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsuxseg4ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsuxseg4ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsuxseg4ei32_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsuxseg4ei32_v_i64m2_m(vbool32_t mask, int64_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsuxseg4ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg4ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg4ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg4ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsuxseg4ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg4ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsuxseg4ei32_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsuxseg4ei32_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint32m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsuxseg4ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsuxseg4ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsuxseg4ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsuxseg4ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsuxseg4ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsuxseg4ei32_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsuxseg4ei32_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint32m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsuxseg4ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsuxseg4ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsuxseg4ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsuxseg4ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsuxseg4ei32_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg4ei32_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsuxseg4ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei32_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsuxseg4ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei32_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint32m1_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsuxseg4ei32_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei32_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c index 3ed750afec6e684a26d58294f34a92e3d23b5647..75c1b6dcaeca714047eb5134316149477325cfc7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg4ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg4ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsuxseg4ei64_v_f16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg4ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsuxseg4ei64_v_f16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg4ei64_v_f16m2(_Float16 *base, vuint64m8_t bindex, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg4ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsuxseg4ei64_v_f32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg4ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsuxseg4ei64_v_f32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f64m1( @@ -76,7 +76,7 @@ void test_vsuxseg4ei64_v_f32m2(float *base, vuint64m4_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsuxseg4ei64_v_f64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f64m2( @@ -85,7 +85,7 @@ void test_vsuxseg4ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsuxseg4ei64_v_f64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsuxseg4ei64_v_f64m2(double *base, vuint64m2_t bindex, vfloat64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsuxseg4ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsuxseg4ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsuxseg4ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i8m1( @@ -121,7 +121,7 @@ void test_vsuxseg4ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsuxseg4ei64_v_i8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i16mf4( @@ -130,7 +130,7 @@ void test_vsuxseg4ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i16mf2( @@ -139,7 +139,7 @@ void test_vsuxseg4ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i16m1( @@ -148,7 +148,7 @@ void test_vsuxseg4ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsuxseg4ei64_v_i16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i16m2( @@ -157,7 +157,7 @@ void test_vsuxseg4ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsuxseg4ei64_v_i16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i32mf2( @@ -166,7 +166,7 @@ void test_vsuxseg4ei64_v_i16m2(int16_t *base, vuint64m8_t bindex, vint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i32m1( @@ -175,7 +175,7 @@ void test_vsuxseg4ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsuxseg4ei64_v_i32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i32m2( @@ -184,7 +184,7 @@ void test_vsuxseg4ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsuxseg4ei64_v_i32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i64m1( @@ -193,7 +193,7 @@ void test_vsuxseg4ei64_v_i32m2(int32_t *base, vuint64m4_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsuxseg4ei64_v_i64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i64m2( @@ -202,7 +202,7 @@ void test_vsuxseg4ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsuxseg4ei64_v_i64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u8mf8( @@ -211,7 +211,7 @@ void test_vsuxseg4ei64_v_i64m2(int64_t *base, vuint64m2_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsuxseg4ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u8mf4( @@ -220,7 +220,7 @@ void test_vsuxseg4ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u8mf2( @@ -229,7 +229,7 @@ void test_vsuxseg4ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u8m1( @@ -238,7 +238,7 @@ void test_vsuxseg4ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsuxseg4ei64_v_u8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u16mf4( @@ -247,7 +247,7 @@ void test_vsuxseg4ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u16mf2( @@ -256,7 +256,7 @@ void test_vsuxseg4ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u16m1( @@ -265,7 +265,7 @@ void test_vsuxseg4ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsuxseg4ei64_v_u16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u16m2( @@ -274,7 +274,7 @@ void test_vsuxseg4ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsuxseg4ei64_v_u16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u32mf2( @@ -283,7 +283,7 @@ void test_vsuxseg4ei64_v_u16m2(uint16_t *base, vuint64m8_t bindex, vuint16m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u32m1( @@ -292,7 +292,7 @@ void test_vsuxseg4ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsuxseg4ei64_v_u32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u32m2( @@ -301,7 +301,7 @@ void test_vsuxseg4ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsuxseg4ei64_v_u32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u64m1( @@ -310,7 +310,7 @@ void test_vsuxseg4ei64_v_u32m2(uint32_t *base, vuint64m4_t bindex, vuint32m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsuxseg4ei64_v_u64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u64m2( @@ -319,7 +319,7 @@ void test_vsuxseg4ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsuxseg4ei64_v_u64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f16mf4_m( @@ -328,7 +328,7 @@ void test_vsuxseg4ei64_v_u64m2(uint64_t *base, vuint64m2_t bindex, vuint64m2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f16mf2_m( @@ -337,7 +337,7 @@ void test_vsuxseg4ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f16m1_m( @@ -346,7 +346,7 @@ void test_vsuxseg4ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsuxseg4ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f16m2_m( @@ -355,7 +355,7 @@ void test_vsuxseg4ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsuxseg4ei64_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg4ei64_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg4ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsuxseg4ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f32m2_m( @@ -382,7 +382,7 @@ void test_vsuxseg4ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsuxseg4ei64_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f64m1_m( @@ -391,7 +391,7 @@ void test_vsuxseg4ei64_v_f32m2_m(vbool16_t mask, float *base, vuint64m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsuxseg4ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_f64m2_m( @@ -400,7 +400,7 @@ void test_vsuxseg4ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsuxseg4ei64_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i8mf8_m( @@ -409,7 +409,7 @@ void test_vsuxseg4ei64_v_f64m2_m(vbool32_t mask, double *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsuxseg4ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i8mf4_m( @@ -418,7 +418,7 @@ void test_vsuxseg4ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i8mf2_m( @@ -427,7 +427,7 @@ void test_vsuxseg4ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i8m1_m( @@ -436,7 +436,7 @@ void test_vsuxseg4ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsuxseg4ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i16mf4_m( @@ -445,7 +445,7 @@ void test_vsuxseg4ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i16mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg4ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i16m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg4ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsuxseg4ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i16m2_m( @@ -472,7 +472,7 @@ void test_vsuxseg4ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsuxseg4ei64_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i32mf2_m( @@ -481,7 +481,7 @@ void test_vsuxseg4ei64_v_i16m2_m(vbool8_t mask, int16_t *base, vuint64m8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i32m1_m( @@ -490,7 +490,7 @@ void test_vsuxseg4ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsuxseg4ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i32m2_m( @@ -499,7 +499,7 @@ void test_vsuxseg4ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsuxseg4ei64_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i64m1_m( @@ -508,7 +508,7 @@ void test_vsuxseg4ei64_v_i32m2_m(vbool16_t mask, int32_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsuxseg4ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_i64m2_m( @@ -517,7 +517,7 @@ void test_vsuxseg4ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsuxseg4ei64_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u8mf8_m( @@ -526,7 +526,7 @@ void test_vsuxseg4ei64_v_i64m2_m(vbool32_t mask, int64_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsuxseg4ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u8mf4_m( @@ -535,7 +535,7 @@ void test_vsuxseg4ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u8mf2_m( @@ -544,7 +544,7 @@ void test_vsuxseg4ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u8m1_m( @@ -553,7 +553,7 @@ void test_vsuxseg4ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsuxseg4ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u16mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg4ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsuxseg4ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u16mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg4ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u16m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg4ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsuxseg4ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u16m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg4ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsuxseg4ei64_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u32mf2_m( @@ -598,7 +598,7 @@ void test_vsuxseg4ei64_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint64m8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsuxseg4ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u32m1_m( @@ -607,7 +607,7 @@ void test_vsuxseg4ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsuxseg4ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u32m2_m( @@ -616,7 +616,7 @@ void test_vsuxseg4ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsuxseg4ei64_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u64m1_m( @@ -625,7 +625,7 @@ void test_vsuxseg4ei64_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsuxseg4ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei64_v_u64m2_m( @@ -634,6 +634,6 @@ void test_vsuxseg4ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei64_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint64m2_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsuxseg4ei64_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei64_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c index 82b4916c81f27688c12457754be5ef3e7c77bd6d..232d491b6e439451c8dbed75b32b693e25280d44 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg4ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg4ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg4ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsuxseg4ei8_v_f16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f16m2( @@ -40,7 +40,7 @@ void test_vsuxseg4ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsuxseg4ei8_v_f16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f32mf2( @@ -49,7 +49,7 @@ void test_vsuxseg4ei8_v_f16m2(_Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f32m1( @@ -58,7 +58,7 @@ void test_vsuxseg4ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsuxseg4ei8_v_f32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f32m2( @@ -67,7 +67,7 @@ void test_vsuxseg4ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsuxseg4ei8_v_f32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f64m1( @@ -76,7 +76,7 @@ void test_vsuxseg4ei8_v_f32m2(float *base, vuint8mf2_t bindex, vfloat32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsuxseg4ei8_v_f64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f64m2( @@ -85,7 +85,7 @@ void test_vsuxseg4ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsuxseg4ei8_v_f64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8mf8( @@ -94,7 +94,7 @@ void test_vsuxseg4ei8_v_f64m2(double *base, vuint8mf4_t bindex, vfloat64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsuxseg4ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8mf4( @@ -103,7 +103,7 @@ void test_vsuxseg4ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8mf2( @@ -112,7 +112,7 @@ void test_vsuxseg4ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8m1( @@ -121,7 +121,7 @@ void test_vsuxseg4ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsuxseg4ei8_v_i8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8m2( @@ -130,7 +130,7 @@ void test_vsuxseg4ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsuxseg4ei8_v_i8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i16mf4( @@ -139,7 +139,7 @@ void test_vsuxseg4ei8_v_i8m2(int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i16mf2( @@ -148,7 +148,7 @@ void test_vsuxseg4ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i16m1( @@ -157,7 +157,7 @@ void test_vsuxseg4ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsuxseg4ei8_v_i16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i16m2( @@ -166,7 +166,7 @@ void test_vsuxseg4ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsuxseg4ei8_v_i16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i32mf2( @@ -175,7 +175,7 @@ void test_vsuxseg4ei8_v_i16m2(int16_t *base, vuint8m1_t bindex, vint16m2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i32m1( @@ -184,7 +184,7 @@ void test_vsuxseg4ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsuxseg4ei8_v_i32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i32m2( @@ -193,7 +193,7 @@ void test_vsuxseg4ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsuxseg4ei8_v_i32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i64m1( @@ -202,7 +202,7 @@ void test_vsuxseg4ei8_v_i32m2(int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsuxseg4ei8_v_i64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i64m2( @@ -211,7 +211,7 @@ void test_vsuxseg4ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsuxseg4ei8_v_i64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8mf8( @@ -220,7 +220,7 @@ void test_vsuxseg4ei8_v_i64m2(int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsuxseg4ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8mf4( @@ -229,7 +229,7 @@ void test_vsuxseg4ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8mf2( @@ -238,7 +238,7 @@ void test_vsuxseg4ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8m1( @@ -247,7 +247,7 @@ void test_vsuxseg4ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsuxseg4ei8_v_u8m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8m2( @@ -256,7 +256,7 @@ void test_vsuxseg4ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsuxseg4ei8_v_u8m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u16mf4( @@ -265,7 +265,7 @@ void test_vsuxseg4ei8_v_u8m2(uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u16mf2( @@ -274,7 +274,7 @@ void test_vsuxseg4ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u16m1( @@ -283,7 +283,7 @@ void test_vsuxseg4ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsuxseg4ei8_v_u16m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u16m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u16m2( @@ -292,7 +292,7 @@ void test_vsuxseg4ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsuxseg4ei8_v_u16m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u16m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u32mf2( @@ -301,7 +301,7 @@ void test_vsuxseg4ei8_v_u16m2(uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u32m1( @@ -310,7 +310,7 @@ void test_vsuxseg4ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsuxseg4ei8_v_u32m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u32m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u32m2( @@ -319,7 +319,7 @@ void test_vsuxseg4ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsuxseg4ei8_v_u32m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u32m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u64m1( @@ -328,7 +328,7 @@ void test_vsuxseg4ei8_v_u32m2(uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsuxseg4ei8_v_u64m1(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u64m1(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u64m2( @@ -337,7 +337,7 @@ void test_vsuxseg4ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsuxseg4ei8_v_u64m2(base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u64m2(base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f16mf4_m( @@ -346,7 +346,7 @@ void test_vsuxseg4ei8_v_u64m2(uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f16mf2_m( @@ -355,7 +355,7 @@ void test_vsuxseg4ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f16m1_m( @@ -364,7 +364,7 @@ void test_vsuxseg4ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, size_t vl) { - return vsuxseg4ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f16m2_m( @@ -373,7 +373,7 @@ void test_vsuxseg4ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex, vfloat16m2_t v0, vfloat16m2_t v1, vfloat16m2_t v2, vfloat16m2_t v3, size_t vl) { - return vsuxseg4ei8_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f32mf2_m( @@ -382,7 +382,7 @@ void test_vsuxseg4ei8_v_f16m2_m(vbool8_t mask, _Float16 *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f32m1_m( @@ -391,7 +391,7 @@ void test_vsuxseg4ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, size_t vl) { - return vsuxseg4ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f32m2_m( @@ -400,7 +400,7 @@ void test_vsuxseg4ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, vfloat32m2_t v0, vfloat32m2_t v1, vfloat32m2_t v2, vfloat32m2_t v3, size_t vl) { - return vsuxseg4ei8_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f64m1_m( @@ -409,7 +409,7 @@ void test_vsuxseg4ei8_v_f32m2_m(vbool16_t mask, float *base, vuint8mf2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, size_t vl) { - return vsuxseg4ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_f64m2_m( @@ -418,7 +418,7 @@ void test_vsuxseg4ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex, vfloat64m2_t v0, vfloat64m2_t v1, vfloat64m2_t v2, vfloat64m2_t v3, size_t vl) { - return vsuxseg4ei8_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_f64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8mf8_m( @@ -427,7 +427,7 @@ void test_vsuxseg4ei8_v_f64m2_m(vbool32_t mask, double *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, size_t vl) { - return vsuxseg4ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8mf4_m( @@ -436,7 +436,7 @@ void test_vsuxseg4ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8mf2_m( @@ -445,7 +445,7 @@ void test_vsuxseg4ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8m1_m( @@ -454,7 +454,7 @@ void test_vsuxseg4ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, size_t vl) { - return vsuxseg4ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i8m2_m( @@ -463,7 +463,7 @@ void test_vsuxseg4ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, vint8m2_t v0, vint8m2_t v1, vint8m2_t v2, vint8m2_t v3, size_t vl) { - return vsuxseg4ei8_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i16mf4_m( @@ -472,7 +472,7 @@ void test_vsuxseg4ei8_v_i8m2_m(vbool4_t mask, int8_t *base, vuint8m2_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i16mf2_m( @@ -481,7 +481,7 @@ void test_vsuxseg4ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i16m1_m( @@ -490,7 +490,7 @@ void test_vsuxseg4ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, size_t vl) { - return vsuxseg4ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i16m2_m( @@ -499,7 +499,7 @@ void test_vsuxseg4ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, vint16m2_t v0, vint16m2_t v1, vint16m2_t v2, vint16m2_t v3, size_t vl) { - return vsuxseg4ei8_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i32mf2_m( @@ -508,7 +508,7 @@ void test_vsuxseg4ei8_v_i16m2_m(vbool8_t mask, int16_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i32m1_m( @@ -517,7 +517,7 @@ void test_vsuxseg4ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, size_t vl) { - return vsuxseg4ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i32m2_m( @@ -526,7 +526,7 @@ void test_vsuxseg4ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t bindex, vint32m2_t v0, vint32m2_t v1, vint32m2_t v2, vint32m2_t v3, size_t vl) { - return vsuxseg4ei8_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i64m1_m( @@ -535,7 +535,7 @@ void test_vsuxseg4ei8_v_i32m2_m(vbool16_t mask, int32_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, size_t vl) { - return vsuxseg4ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_i64m2_m( @@ -544,7 +544,7 @@ void test_vsuxseg4ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t bindex, vint64m2_t v0, vint64m2_t v1, vint64m2_t v2, vint64m2_t v3, size_t vl) { - return vsuxseg4ei8_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_i64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8mf8_m( @@ -553,7 +553,7 @@ void test_vsuxseg4ei8_v_i64m2_m(vbool32_t mask, int64_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, size_t vl) { - return vsuxseg4ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8mf4_m( @@ -562,7 +562,7 @@ void test_vsuxseg4ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8mf2_m( @@ -571,7 +571,7 @@ void test_vsuxseg4ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8m1_m( @@ -580,7 +580,7 @@ void test_vsuxseg4ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, size_t vl) { - return vsuxseg4ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u8m2_m( @@ -589,7 +589,7 @@ void test_vsuxseg4ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, vuint8m2_t v0, vuint8m2_t v1, vuint8m2_t v2, vuint8m2_t v3, size_t vl) { - return vsuxseg4ei8_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u8m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u16mf4_m( @@ -598,7 +598,7 @@ void test_vsuxseg4ei8_v_u8m2_m(vbool4_t mask, uint8_t *base, vuint8m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, size_t vl) { - return vsuxseg4ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u16mf2_m( @@ -607,7 +607,7 @@ void test_vsuxseg4ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u16m1_m( @@ -616,7 +616,7 @@ void test_vsuxseg4ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, size_t vl) { - return vsuxseg4ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u16m2_m( @@ -625,7 +625,7 @@ void test_vsuxseg4ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex, vuint16m2_t v0, vuint16m2_t v1, vuint16m2_t v2, vuint16m2_t v3, size_t vl) { - return vsuxseg4ei8_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u16m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u32mf2_m( @@ -634,7 +634,7 @@ void test_vsuxseg4ei8_v_u16m2_m(vbool8_t mask, uint16_t *base, vuint8m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, size_t vl) { - return vsuxseg4ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u32m1_m( @@ -643,7 +643,7 @@ void test_vsuxseg4ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, size_t vl) { - return vsuxseg4ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u32m2_m( @@ -652,7 +652,7 @@ void test_vsuxseg4ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bindex, vuint32m2_t v0, vuint32m2_t v1, vuint32m2_t v2, vuint32m2_t v3, size_t vl) { - return vsuxseg4ei8_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u32m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u64m1_m( @@ -661,7 +661,7 @@ void test_vsuxseg4ei8_v_u32m2_m(vbool16_t mask, uint32_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, size_t vl) { - return vsuxseg4ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, vl); } // CHECK-RV64-LABEL: @test_vsuxseg4ei8_v_u64m2_m( @@ -670,6 +670,6 @@ void test_vsuxseg4ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg4ei8_v_u64m2_m(vbool32_t mask, uint64_t *base, vuint8mf4_t bindex, vuint64m2_t v0, vuint64m2_t v1, vuint64m2_t v2, vuint64m2_t v3, size_t vl) { - return vsuxseg4ei8_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); + return __riscv_vsuxseg4ei8_v_u64m2_m(mask, base, bindex, v0, v1, v2, v3, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c index ee82aaadf594b4eb5b06c98ab6c549deb716c0a5..f19c2e282cf061e4d7b98b10e03152e937ee7da9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg5ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg5ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsuxseg5ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg5ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg5ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsuxseg5ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg5ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsuxseg5ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg5ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsuxseg5ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg5ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg5ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg5ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsuxseg5ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg5ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg5ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg5ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsuxseg5ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg5ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg5ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsuxseg5ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg5ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsuxseg5ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg5ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsuxseg5ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg5ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg5ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg5ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsuxseg5ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg5ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg5ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg5ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsuxseg5ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg5ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg5ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsuxseg5ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg5ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsuxseg5ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg5ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg5ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg5ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsuxseg5ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg5ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg5ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsuxseg5ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg5ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsuxseg5ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg5ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsuxseg5ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg5ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg5ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg5ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsuxseg5ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg5ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg5ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg5ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsuxseg5ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg5ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg5ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsuxseg5ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg5ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsuxseg5ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg5ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsuxseg5ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg5ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg5ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg5ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsuxseg5ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg5ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsuxseg5ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg5ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg5ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsuxseg5ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg5ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsuxseg5ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg5ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsuxseg5ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei16_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg5ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsuxseg5ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c index bc9e288100dce165657f8e7c2e929ea30ecdd363..618f498a73d20256536893424232ea34d8016409 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg5ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg5ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsuxseg5ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg5ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg5ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsuxseg5ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg5ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsuxseg5ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg5ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsuxseg5ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg5ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg5ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg5ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsuxseg5ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg5ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg5ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg5ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsuxseg5ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg5ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg5ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsuxseg5ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg5ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsuxseg5ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg5ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsuxseg5ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg5ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg5ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg5ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsuxseg5ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg5ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg5ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg5ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsuxseg5ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg5ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg5ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsuxseg5ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg5ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsuxseg5ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg5ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg5ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg5ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsuxseg5ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg5ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg5ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsuxseg5ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg5ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsuxseg5ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg5ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsuxseg5ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg5ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg5ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg5ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsuxseg5ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg5ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg5ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg5ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsuxseg5ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg5ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg5ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsuxseg5ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg5ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsuxseg5ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg5ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsuxseg5ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg5ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg5ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg5ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsuxseg5ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg5ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsuxseg5ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg5ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg5ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsuxseg5ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg5ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsuxseg5ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg5ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsuxseg5ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei32_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg5ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsuxseg5ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c index 4ac1491ff8121a2e8aab8c6a39a66ef7a1ed7e21..b8f7d0b94b1755afda6e18dd82dff93a28a2f04e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg5ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg5ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsuxseg5ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg5ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg5ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsuxseg5ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg5ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsuxseg5ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg5ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsuxseg5ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg5ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg5ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg5ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsuxseg5ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg5ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg5ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg5ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsuxseg5ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg5ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg5ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsuxseg5ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg5ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsuxseg5ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg5ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsuxseg5ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg5ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg5ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg5ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsuxseg5ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg5ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg5ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg5ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsuxseg5ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg5ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg5ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsuxseg5ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg5ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsuxseg5ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg5ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg5ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg5ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsuxseg5ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg5ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg5ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsuxseg5ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg5ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsuxseg5ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg5ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsuxseg5ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg5ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg5ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg5ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsuxseg5ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg5ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg5ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg5ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsuxseg5ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg5ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg5ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsuxseg5ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg5ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsuxseg5ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg5ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsuxseg5ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg5ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg5ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg5ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsuxseg5ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg5ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsuxseg5ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg5ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg5ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsuxseg5ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg5ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsuxseg5ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg5ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsuxseg5ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei64_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg5ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsuxseg5ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c index 4a9af3f6ce31ce0ee15ddd8e2a0f3d7e5ef27af6..2d38799a10fab4a9bc461199e7da3be138d0b637 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg5ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg5ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg5ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsuxseg5ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg5ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg5ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsuxseg5ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg5ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsuxseg5ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg5ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsuxseg5ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg5ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg5ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg5ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsuxseg5ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg5ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg5ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg5ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsuxseg5ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg5ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg5ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsuxseg5ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg5ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsuxseg5ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg5ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsuxseg5ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg5ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg5ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg5ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsuxseg5ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg5ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg5ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg5ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsuxseg5ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg5ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg5ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsuxseg5ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg5ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsuxseg5ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg5ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg5ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg5ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, size_t vl) { - return vsuxseg5ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg5ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg5ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, size_t vl) { - return vsuxseg5ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg5ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, size_t vl) { - return vsuxseg5ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg5ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, size_t vl) { - return vsuxseg5ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg5ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg5ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg5ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, size_t vl) { - return vsuxseg5ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg5ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg5ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg5ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, size_t vl) { - return vsuxseg5ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg5ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg5ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, size_t vl) { - return vsuxseg5ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg5ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, size_t vl) { - return vsuxseg5ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg5ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, size_t vl) { - return vsuxseg5ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg5ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg5ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg5ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, size_t vl) { - return vsuxseg5ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg5ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, size_t vl) { - return vsuxseg5ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg5ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg5ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, size_t vl) { - return vsuxseg5ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg5ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, size_t vl) { - return vsuxseg5ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg5ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, size_t vl) { - return vsuxseg5ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } // CHECK-RV64-LABEL: @test_vsuxseg5ei8_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg5ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg5ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, size_t vl) { - return vsuxseg5ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); + return __riscv_vsuxseg5ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c index 76b2d473326c3084985ae6cb2bb189b48a0bc5bd..6692a149ec79c85156a3ec84301b9a6b1b9e4824 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg6ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg6ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsuxseg6ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg6ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg6ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsuxseg6ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg6ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsuxseg6ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg6ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsuxseg6ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg6ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg6ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg6ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsuxseg6ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg6ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg6ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg6ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsuxseg6ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg6ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg6ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsuxseg6ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg6ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsuxseg6ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg6ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsuxseg6ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg6ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg6ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg6ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsuxseg6ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg6ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg6ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg6ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsuxseg6ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg6ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg6ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsuxseg6ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg6ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsuxseg6ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg6ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg6ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg6ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsuxseg6ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg6ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg6ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsuxseg6ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg6ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsuxseg6ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg6ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsuxseg6ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg6ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg6ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg6ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsuxseg6ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg6ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg6ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg6ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsuxseg6ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg6ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg6ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsuxseg6ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg6ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsuxseg6ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg6ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsuxseg6ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg6ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg6ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg6ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsuxseg6ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg6ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsuxseg6ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg6ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg6ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsuxseg6ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg6ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsuxseg6ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg6ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsuxseg6ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei16_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg6ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsuxseg6ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c index 1d1e15848cf01f3fa3e59f7f9ec3c3a1baf36a91..98a390160add9219904eb22111f90704166f5539 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg6ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg6ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsuxseg6ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg6ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg6ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsuxseg6ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg6ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsuxseg6ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg6ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsuxseg6ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg6ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg6ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg6ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsuxseg6ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg6ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg6ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg6ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsuxseg6ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg6ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg6ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsuxseg6ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg6ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsuxseg6ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg6ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsuxseg6ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg6ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg6ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg6ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsuxseg6ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg6ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg6ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg6ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsuxseg6ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg6ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg6ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsuxseg6ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg6ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsuxseg6ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg6ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg6ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg6ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsuxseg6ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg6ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg6ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsuxseg6ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg6ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsuxseg6ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg6ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsuxseg6ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg6ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg6ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg6ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsuxseg6ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg6ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg6ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg6ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsuxseg6ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg6ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg6ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsuxseg6ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg6ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsuxseg6ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg6ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsuxseg6ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg6ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg6ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg6ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsuxseg6ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg6ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsuxseg6ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg6ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg6ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsuxseg6ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg6ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsuxseg6ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg6ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsuxseg6ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei32_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg6ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsuxseg6ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c index 6bddd6bcb48b168fe637dc72f1b82aa71c68e04a..268653a348de6d364ed53ed2060f2a8760bfc245 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg6ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg6ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsuxseg6ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg6ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg6ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsuxseg6ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg6ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsuxseg6ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg6ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsuxseg6ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg6ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg6ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg6ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsuxseg6ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg6ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg6ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg6ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsuxseg6ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg6ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg6ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsuxseg6ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg6ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsuxseg6ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg6ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsuxseg6ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg6ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg6ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg6ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsuxseg6ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg6ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg6ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg6ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsuxseg6ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg6ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg6ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsuxseg6ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg6ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsuxseg6ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg6ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg6ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg6ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsuxseg6ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg6ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg6ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsuxseg6ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg6ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsuxseg6ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg6ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsuxseg6ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg6ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg6ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg6ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsuxseg6ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg6ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg6ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg6ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsuxseg6ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg6ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg6ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsuxseg6ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg6ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsuxseg6ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg6ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsuxseg6ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg6ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg6ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg6ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsuxseg6ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg6ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsuxseg6ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg6ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg6ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsuxseg6ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg6ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsuxseg6ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg6ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsuxseg6ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei64_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg6ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsuxseg6ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c index 28b524cacb670cff2f352fabe7f53e39166ec091..f431f1162175a7c3169e76144f923bdfd183039c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg6ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg6ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg6ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsuxseg6ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg6ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg6ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsuxseg6ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg6ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsuxseg6ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg6ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsuxseg6ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg6ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg6ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg6ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsuxseg6ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg6ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg6ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg6ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsuxseg6ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg6ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg6ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsuxseg6ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg6ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsuxseg6ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg6ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsuxseg6ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg6ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg6ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg6ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsuxseg6ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg6ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg6ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg6ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsuxseg6ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg6ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg6ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsuxseg6ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg6ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsuxseg6ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg6ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg6ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg6ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, size_t vl) { - return vsuxseg6ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg6ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg6ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, size_t vl) { - return vsuxseg6ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg6ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, size_t vl) { - return vsuxseg6ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg6ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, size_t vl) { - return vsuxseg6ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg6ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg6ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg6ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, size_t vl) { - return vsuxseg6ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg6ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg6ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg6ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, size_t vl) { - return vsuxseg6ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg6ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg6ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, size_t vl) { - return vsuxseg6ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg6ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, size_t vl) { - return vsuxseg6ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg6ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, size_t vl) { - return vsuxseg6ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg6ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg6ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg6ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, size_t vl) { - return vsuxseg6ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg6ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, size_t vl) { - return vsuxseg6ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg6ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg6ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, size_t vl) { - return vsuxseg6ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg6ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, size_t vl) { - return vsuxseg6ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg6ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, size_t vl) { - return vsuxseg6ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } // CHECK-RV64-LABEL: @test_vsuxseg6ei8_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg6ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg6ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, size_t vl) { - return vsuxseg6ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); + return __riscv_vsuxseg6ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c index acd2a2bfbc62a9900459a56bdee08f1860359b7f..46db813f143f40f9050acd0d203d85bbb1b7f3b0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg7ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg7ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsuxseg7ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg7ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg7ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsuxseg7ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg7ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsuxseg7ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg7ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsuxseg7ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg7ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg7ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg7ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsuxseg7ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg7ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg7ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg7ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsuxseg7ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg7ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg7ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsuxseg7ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg7ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsuxseg7ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg7ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsuxseg7ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg7ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg7ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg7ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsuxseg7ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg7ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg7ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg7ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsuxseg7ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg7ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg7ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsuxseg7ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg7ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsuxseg7ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg7ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg7ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg7ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsuxseg7ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg7ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg7ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsuxseg7ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg7ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsuxseg7ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg7ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsuxseg7ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg7ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg7ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg7ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsuxseg7ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg7ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg7ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg7ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsuxseg7ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg7ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg7ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsuxseg7ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg7ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsuxseg7ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg7ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsuxseg7ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg7ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg7ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg7ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsuxseg7ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg7ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsuxseg7ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg7ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg7ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsuxseg7ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg7ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsuxseg7ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg7ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsuxseg7ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei16_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg7ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsuxseg7ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c index 51770e933afa941b3d3d0d40dbbc1ab27a37732f..3390afbf0a0edfc41ea422ec7e3e21109297c15c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg7ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg7ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsuxseg7ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg7ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg7ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsuxseg7ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg7ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsuxseg7ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg7ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsuxseg7ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg7ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg7ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg7ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsuxseg7ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg7ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg7ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg7ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsuxseg7ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg7ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg7ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsuxseg7ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg7ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsuxseg7ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg7ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsuxseg7ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg7ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg7ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg7ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsuxseg7ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg7ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg7ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg7ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsuxseg7ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg7ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg7ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsuxseg7ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg7ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsuxseg7ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg7ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg7ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg7ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsuxseg7ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg7ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg7ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsuxseg7ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg7ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsuxseg7ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg7ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsuxseg7ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg7ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg7ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg7ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsuxseg7ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg7ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg7ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg7ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsuxseg7ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg7ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg7ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsuxseg7ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg7ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsuxseg7ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg7ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsuxseg7ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg7ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg7ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg7ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsuxseg7ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg7ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsuxseg7ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg7ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg7ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsuxseg7ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg7ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsuxseg7ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg7ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsuxseg7ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei32_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg7ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsuxseg7ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c index a7ab6e022bb17e28d9afc8e6c5e5e10687a00a2a..3b82241e6ad8801a7aebbac062773b3befa32a09 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg7ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg7ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsuxseg7ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg7ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg7ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsuxseg7ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg7ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsuxseg7ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg7ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsuxseg7ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg7ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg7ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg7ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsuxseg7ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg7ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg7ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg7ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsuxseg7ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg7ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg7ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsuxseg7ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg7ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsuxseg7ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg7ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsuxseg7ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg7ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg7ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg7ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsuxseg7ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg7ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg7ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg7ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsuxseg7ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg7ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg7ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsuxseg7ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg7ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsuxseg7ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg7ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg7ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg7ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsuxseg7ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg7ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg7ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsuxseg7ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg7ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsuxseg7ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg7ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsuxseg7ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg7ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg7ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg7ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsuxseg7ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg7ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg7ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg7ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsuxseg7ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg7ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg7ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsuxseg7ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg7ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsuxseg7ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg7ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsuxseg7ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg7ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg7ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg7ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsuxseg7ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg7ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsuxseg7ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg7ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg7ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsuxseg7ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg7ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsuxseg7ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg7ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsuxseg7ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei64_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg7ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsuxseg7ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c index 3f02ed73b5fb5e2baae3a58026e672888467c191..e37c9d513831816b5e8d0abce3d45e23240d9112 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg7ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg7ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg7ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsuxseg7ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg7ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg7ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsuxseg7ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg7ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsuxseg7ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg7ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsuxseg7ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg7ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg7ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg7ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsuxseg7ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg7ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg7ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg7ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsuxseg7ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg7ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg7ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsuxseg7ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg7ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsuxseg7ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg7ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsuxseg7ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg7ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg7ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg7ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsuxseg7ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg7ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg7ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg7ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsuxseg7ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg7ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg7ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsuxseg7ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg7ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsuxseg7ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg7ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg7ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg7ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, size_t vl) { - return vsuxseg7ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg7ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg7ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, size_t vl) { - return vsuxseg7ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg7ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, size_t vl) { - return vsuxseg7ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg7ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, size_t vl) { - return vsuxseg7ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg7ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg7ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg7ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, size_t vl) { - return vsuxseg7ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg7ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg7ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg7ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, size_t vl) { - return vsuxseg7ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg7ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg7ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, size_t vl) { - return vsuxseg7ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg7ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, size_t vl) { - return vsuxseg7ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg7ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, size_t vl) { - return vsuxseg7ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg7ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg7ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg7ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, size_t vl) { - return vsuxseg7ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg7ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, size_t vl) { - return vsuxseg7ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg7ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg7ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, size_t vl) { - return vsuxseg7ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg7ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, size_t vl) { - return vsuxseg7ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg7ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, size_t vl) { - return vsuxseg7ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } // CHECK-RV64-LABEL: @test_vsuxseg7ei8_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg7ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg7ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, size_t vl) { - return vsuxseg7ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); + return __riscv_vsuxseg7ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c index 708f031db053757de64db8378ad890387bd15ca5..c51941198df7c5574e6fe9558ef6036e0568a322 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg8ei16_v_f16mf4(_Float16 *base, vuint16mf4_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg8ei16_v_f16mf2(_Float16 *base, vuint16mf2_t bindex, vfloat16mf2 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsuxseg8ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg8ei16_v_f16m1(_Float16 *base, vuint16m1_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg8ei16_v_f32mf2(float *base, vuint16mf4_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsuxseg8ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg8ei16_v_f32m1(float *base, vuint16mf2_t bindex, vfloat32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsuxseg8ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg8ei16_v_f64m1(double *base, vuint16mf4_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsuxseg8ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg8ei16_v_i8mf8(int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg8ei16_v_i8mf4(int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg8ei16_v_i8mf2(int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsuxseg8ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg8ei16_v_i8m1(int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg8ei16_v_i16mf4(int16_t *base, vuint16mf4_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg8ei16_v_i16mf2(int16_t *base, vuint16mf2_t bindex, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsuxseg8ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg8ei16_v_i16m1(int16_t *base, vuint16m1_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg8ei16_v_i32mf2(int32_t *base, vuint16mf4_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsuxseg8ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg8ei16_v_i32m1(int32_t *base, vuint16mf2_t bindex, vint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsuxseg8ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg8ei16_v_i64m1(int64_t *base, vuint16mf4_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsuxseg8ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg8ei16_v_u8mf8(uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg8ei16_v_u8mf4(uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg8ei16_v_u8mf2(uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsuxseg8ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg8ei16_v_u8m1(uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg8ei16_v_u16mf4(uint16_t *base, vuint16mf4_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg8ei16_v_u16mf2(uint16_t *base, vuint16mf2_t bindex, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsuxseg8ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg8ei16_v_u16m1(uint16_t *base, vuint16m1_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg8ei16_v_u32mf2(uint32_t *base, vuint16mf4_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsuxseg8ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg8ei16_v_u32m1(uint32_t *base, vuint16mf2_t bindex, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsuxseg8ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg8ei16_v_u64m1(uint64_t *base, vuint16mf4_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg8ei16_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg8ei16_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsuxseg8ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg8ei16_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg8ei16_v_f32mf2_m(vbool64_t mask, float *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsuxseg8ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg8ei16_v_f32m1_m(vbool32_t mask, float *base, vuint16mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsuxseg8ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg8ei16_v_f64m1_m(vbool64_t mask, double *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsuxseg8ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg8ei16_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint16mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg8ei16_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint16mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg8ei16_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint16m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsuxseg8ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg8ei16_v_i8m1_m(vbool8_t mask, int8_t *base, vuint16m2_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg8ei16_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg8ei16_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsuxseg8ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg8ei16_v_i16m1_m(vbool16_t mask, int16_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg8ei16_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint16mf4_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsuxseg8ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg8ei16_v_i32m1_m(vbool32_t mask, int32_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsuxseg8ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg8ei16_v_i64m1_m(vbool64_t mask, int64_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsuxseg8ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg8ei16_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint16mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg8ei16_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint16mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg8ei16_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint16m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsuxseg8ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg8ei16_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint16m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsuxseg8ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg8ei16_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg8ei16_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint16mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsuxseg8ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg8ei16_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint16m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsuxseg8ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg8ei16_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint16mf4_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsuxseg8ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei16_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg8ei16_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint16mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei16_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint16mf4_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsuxseg8ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei16_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c index c477428c5fe1b44495dcd78f3a74168d1fe20c51..fa666dd76beb7271afc22c0949f420f0c889e655 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg8ei32_v_f16mf4(_Float16 *base, vuint32mf2_t bindex, vfloat16mf4 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg8ei32_v_f16mf2(_Float16 *base, vuint32m1_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsuxseg8ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg8ei32_v_f16m1(_Float16 *base, vuint32m2_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg8ei32_v_f32mf2(float *base, vuint32mf2_t bindex, vfloat32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsuxseg8ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg8ei32_v_f32m1(float *base, vuint32m1_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsuxseg8ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg8ei32_v_f64m1(double *base, vuint32mf2_t bindex, vfloat64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsuxseg8ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg8ei32_v_i8mf8(int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg8ei32_v_i8mf4(int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg8ei32_v_i8mf2(int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsuxseg8ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg8ei32_v_i8m1(int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg8ei32_v_i16mf4(int16_t *base, vuint32mf2_t bindex, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg8ei32_v_i16mf2(int16_t *base, vuint32m1_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsuxseg8ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg8ei32_v_i16m1(int16_t *base, vuint32m2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg8ei32_v_i32mf2(int32_t *base, vuint32mf2_t bindex, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsuxseg8ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg8ei32_v_i32m1(int32_t *base, vuint32m1_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsuxseg8ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg8ei32_v_i64m1(int64_t *base, vuint32mf2_t bindex, vint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsuxseg8ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg8ei32_v_u8mf8(uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg8ei32_v_u8mf4(uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg8ei32_v_u8mf2(uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsuxseg8ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg8ei32_v_u8m1(uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg8ei32_v_u16mf4(uint16_t *base, vuint32mf2_t bindex, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg8ei32_v_u16mf2(uint16_t *base, vuint32m1_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsuxseg8ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg8ei32_v_u16m1(uint16_t *base, vuint32m2_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg8ei32_v_u32mf2(uint32_t *base, vuint32mf2_t bindex, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsuxseg8ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg8ei32_v_u32m1(uint32_t *base, vuint32m1_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsuxseg8ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg8ei32_v_u64m1(uint64_t *base, vuint32mf2_t bindex, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg8ei32_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg8ei32_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsuxseg8ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg8ei32_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg8ei32_v_f32mf2_m(vbool64_t mask, float *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsuxseg8ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg8ei32_v_f32m1_m(vbool32_t mask, float *base, vuint32m1_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsuxseg8ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg8ei32_v_f64m1_m(vbool64_t mask, double *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsuxseg8ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg8ei32_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint32mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg8ei32_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint32m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg8ei32_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint32m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsuxseg8ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg8ei32_v_i8m1_m(vbool8_t mask, int8_t *base, vuint32m4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg8ei32_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg8ei32_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsuxseg8ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg8ei32_v_i16m1_m(vbool16_t mask, int16_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg8ei32_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint32mf2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsuxseg8ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg8ei32_v_i32m1_m(vbool32_t mask, int32_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsuxseg8ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg8ei32_v_i64m1_m(vbool64_t mask, int64_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsuxseg8ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg8ei32_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint32mf2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg8ei32_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint32m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg8ei32_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint32m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsuxseg8ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg8ei32_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint32m4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsuxseg8ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg8ei32_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg8ei32_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint32m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsuxseg8ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg8ei32_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint32m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsuxseg8ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg8ei32_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint32mf2_t b // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsuxseg8ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei32_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg8ei32_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint32m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei32_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint32mf2_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsuxseg8ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei32_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c index 1b88ff527989647e8f3ea8c38d4f157d4c1e7aa7..97a1d39cc3c31745de13e07055dff0965b056eda 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg8ei64_v_f16mf4(_Float16 *base, vuint64m1_t bindex, vfloat16mf4_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg8ei64_v_f16mf2(_Float16 *base, vuint64m2_t bindex, vfloat16mf2_ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsuxseg8ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg8ei64_v_f16m1(_Float16 *base, vuint64m4_t bindex, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg8ei64_v_f32mf2(float *base, vuint64m1_t bindex, vfloat32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsuxseg8ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg8ei64_v_f32m1(float *base, vuint64m2_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsuxseg8ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg8ei64_v_f64m1(double *base, vuint64m1_t bindex, vfloat64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsuxseg8ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg8ei64_v_i8mf8(int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg8ei64_v_i8mf4(int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg8ei64_v_i8mf2(int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsuxseg8ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg8ei64_v_i8m1(int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg8ei64_v_i16mf4(int16_t *base, vuint64m1_t bindex, vint16mf4_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg8ei64_v_i16mf2(int16_t *base, vuint64m2_t bindex, vint16mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsuxseg8ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg8ei64_v_i16m1(int16_t *base, vuint64m4_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg8ei64_v_i32mf2(int32_t *base, vuint64m1_t bindex, vint32mf2_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsuxseg8ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg8ei64_v_i32m1(int32_t *base, vuint64m2_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsuxseg8ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg8ei64_v_i64m1(int64_t *base, vuint64m1_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsuxseg8ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg8ei64_v_u8mf8(uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg8ei64_v_u8mf4(uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg8ei64_v_u8mf2(uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsuxseg8ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg8ei64_v_u8m1(uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg8ei64_v_u16mf4(uint16_t *base, vuint64m1_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg8ei64_v_u16mf2(uint16_t *base, vuint64m2_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsuxseg8ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg8ei64_v_u16m1(uint16_t *base, vuint64m4_t bindex, vuint16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg8ei64_v_u32mf2(uint32_t *base, vuint64m1_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsuxseg8ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg8ei64_v_u32m1(uint32_t *base, vuint64m2_t bindex, vuint32m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsuxseg8ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg8ei64_v_u64m1(uint64_t *base, vuint64m1_t bindex, vuint64m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg8ei64_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg8ei64_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsuxseg8ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg8ei64_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg8ei64_v_f32mf2_m(vbool64_t mask, float *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsuxseg8ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg8ei64_v_f32m1_m(vbool32_t mask, float *base, vuint64m2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsuxseg8ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg8ei64_v_f64m1_m(vbool64_t mask, double *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsuxseg8ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg8ei64_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint64m1_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg8ei64_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint64m2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg8ei64_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint64m4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsuxseg8ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg8ei64_v_i8m1_m(vbool8_t mask, int8_t *base, vuint64m8_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg8ei64_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg8ei64_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsuxseg8ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg8ei64_v_i16m1_m(vbool16_t mask, int16_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg8ei64_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint64m1_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsuxseg8ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg8ei64_v_i32m1_m(vbool32_t mask, int32_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsuxseg8ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg8ei64_v_i64m1_m(vbool64_t mask, int64_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsuxseg8ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg8ei64_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint64m1_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg8ei64_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint64m2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg8ei64_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint64m4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsuxseg8ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg8ei64_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint64m8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsuxseg8ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg8ei64_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg8ei64_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint64m2_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsuxseg8ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg8ei64_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint64m4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsuxseg8ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg8ei64_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint64m1_t bi // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsuxseg8ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei64_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg8ei64_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint64m2_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei64_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint64m1_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsuxseg8ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei64_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c index bfa07a1e90977636c0110a223aa9544f9508bfd1..b39d54f86363d9e6ae0c1c0b5d4567b52f817774 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsuxseg8ei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f16mf2( @@ -22,7 +22,7 @@ void test_vsuxseg8ei8_v_f16mf4(_Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f16m1( @@ -31,7 +31,7 @@ void test_vsuxseg8ei8_v_f16mf2(_Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsuxseg8ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f32mf2( @@ -40,7 +40,7 @@ void test_vsuxseg8ei8_v_f16m1(_Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f32m1( @@ -49,7 +49,7 @@ void test_vsuxseg8ei8_v_f32mf2(float *base, vuint8mf8_t bindex, vfloat32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsuxseg8ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f64m1( @@ -58,7 +58,7 @@ void test_vsuxseg8ei8_v_f32m1(float *base, vuint8mf4_t bindex, vfloat32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsuxseg8ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i8mf8( @@ -67,7 +67,7 @@ void test_vsuxseg8ei8_v_f64m1(double *base, vuint8mf8_t bindex, vfloat64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsuxseg8ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i8mf4( @@ -76,7 +76,7 @@ void test_vsuxseg8ei8_v_i8mf8(int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i8mf2( @@ -85,7 +85,7 @@ void test_vsuxseg8ei8_v_i8mf4(int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i8m1( @@ -94,7 +94,7 @@ void test_vsuxseg8ei8_v_i8mf2(int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsuxseg8ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i16mf4( @@ -103,7 +103,7 @@ void test_vsuxseg8ei8_v_i8m1(int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i16mf2( @@ -112,7 +112,7 @@ void test_vsuxseg8ei8_v_i16mf4(int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i16m1( @@ -121,7 +121,7 @@ void test_vsuxseg8ei8_v_i16mf2(int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsuxseg8ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i32mf2( @@ -130,7 +130,7 @@ void test_vsuxseg8ei8_v_i16m1(int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i32m1( @@ -139,7 +139,7 @@ void test_vsuxseg8ei8_v_i32mf2(int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsuxseg8ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i64m1( @@ -148,7 +148,7 @@ void test_vsuxseg8ei8_v_i32m1(int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsuxseg8ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u8mf8( @@ -157,7 +157,7 @@ void test_vsuxseg8ei8_v_i64m1(int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsuxseg8ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u8mf8(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u8mf4( @@ -166,7 +166,7 @@ void test_vsuxseg8ei8_v_u8mf8(uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u8mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u8mf2( @@ -175,7 +175,7 @@ void test_vsuxseg8ei8_v_u8mf4(uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u8mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u8m1( @@ -184,7 +184,7 @@ void test_vsuxseg8ei8_v_u8mf2(uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsuxseg8ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u8m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u16mf4( @@ -193,7 +193,7 @@ void test_vsuxseg8ei8_v_u8m1(uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vu // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u16mf4(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u16mf2( @@ -202,7 +202,7 @@ void test_vsuxseg8ei8_v_u16mf4(uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u16mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u16m1( @@ -211,7 +211,7 @@ void test_vsuxseg8ei8_v_u16mf2(uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsuxseg8ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u16m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u32mf2( @@ -220,7 +220,7 @@ void test_vsuxseg8ei8_v_u16m1(uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u32mf2(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u32m1( @@ -229,7 +229,7 @@ void test_vsuxseg8ei8_v_u32mf2(uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsuxseg8ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u32m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u64m1( @@ -238,7 +238,7 @@ void test_vsuxseg8ei8_v_u32m1(uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsuxseg8ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u64m1(base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f16mf4_m( @@ -247,7 +247,7 @@ void test_vsuxseg8ei8_v_u64m1(uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0 // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bindex, vfloat16mf4_t v0, vfloat16mf4_t v1, vfloat16mf4_t v2, vfloat16mf4_t v3, vfloat16mf4_t v4, vfloat16mf4_t v5, vfloat16mf4_t v6, vfloat16mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f16mf2_m( @@ -256,7 +256,7 @@ void test_vsuxseg8ei8_v_f16mf4_m(vbool64_t mask, _Float16 *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bindex, vfloat16mf2_t v0, vfloat16mf2_t v1, vfloat16mf2_t v2, vfloat16mf2_t v3, vfloat16mf2_t v4, vfloat16mf2_t v5, vfloat16mf2_t v6, vfloat16mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f16m1_m( @@ -265,7 +265,7 @@ void test_vsuxseg8ei8_v_f16mf2_m(vbool32_t mask, _Float16 *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bindex, vfloat16m1_t v0, vfloat16m1_t v1, vfloat16m1_t v2, vfloat16m1_t v3, vfloat16m1_t v4, vfloat16m1_t v5, vfloat16m1_t v6, vfloat16m1_t v7, size_t vl) { - return vsuxseg8ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f32mf2_m( @@ -274,7 +274,7 @@ void test_vsuxseg8ei8_v_f16m1_m(vbool16_t mask, _Float16 *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex, vfloat32mf2_t v0, vfloat32mf2_t v1, vfloat32mf2_t v2, vfloat32mf2_t v3, vfloat32mf2_t v4, vfloat32mf2_t v5, vfloat32mf2_t v6, vfloat32mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f32m1_m( @@ -283,7 +283,7 @@ void test_vsuxseg8ei8_v_f32mf2_m(vbool64_t mask, float *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, vfloat32m1_t v0, vfloat32m1_t v1, vfloat32m1_t v2, vfloat32m1_t v3, vfloat32m1_t v4, vfloat32m1_t v5, vfloat32m1_t v6, vfloat32m1_t v7, size_t vl) { - return vsuxseg8ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_f64m1_m( @@ -292,7 +292,7 @@ void test_vsuxseg8ei8_v_f32m1_m(vbool32_t mask, float *base, vuint8mf4_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex, vfloat64m1_t v0, vfloat64m1_t v1, vfloat64m1_t v2, vfloat64m1_t v3, vfloat64m1_t v4, vfloat64m1_t v5, vfloat64m1_t v6, vfloat64m1_t v7, size_t vl) { - return vsuxseg8ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_f64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i8mf8_m( @@ -301,7 +301,7 @@ void test_vsuxseg8ei8_v_f64m1_m(vbool64_t mask, double *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex, vint8mf8_t v0, vint8mf8_t v1, vint8mf8_t v2, vint8mf8_t v3, vint8mf8_t v4, vint8mf8_t v5, vint8mf8_t v6, vint8mf8_t v7, size_t vl) { - return vsuxseg8ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i8mf4_m( @@ -310,7 +310,7 @@ void test_vsuxseg8ei8_v_i8mf8_m(vbool64_t mask, int8_t *base, vuint8mf8_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex, vint8mf4_t v0, vint8mf4_t v1, vint8mf4_t v2, vint8mf4_t v3, vint8mf4_t v4, vint8mf4_t v5, vint8mf4_t v6, vint8mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i8mf2_m( @@ -319,7 +319,7 @@ void test_vsuxseg8ei8_v_i8mf4_m(vbool32_t mask, int8_t *base, vuint8mf4_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex, vint8mf2_t v0, vint8mf2_t v1, vint8mf2_t v2, vint8mf2_t v3, vint8mf2_t v4, vint8mf2_t v5, vint8mf2_t v6, vint8mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i8m1_m( @@ -328,7 +328,7 @@ void test_vsuxseg8ei8_v_i8mf2_m(vbool16_t mask, int8_t *base, vuint8mf2_t bindex // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, vint8m1_t v0, vint8m1_t v1, vint8m1_t v2, vint8m1_t v3, vint8m1_t v4, vint8m1_t v5, vint8m1_t v6, vint8m1_t v7, size_t vl) { - return vsuxseg8ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i16mf4_m( @@ -337,7 +337,7 @@ void test_vsuxseg8ei8_v_i8m1_m(vbool8_t mask, int8_t *base, vuint8m1_t bindex, v // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bindex, vint16mf4_t v0, vint16mf4_t v1, vint16mf4_t v2, vint16mf4_t v3, vint16mf4_t v4, vint16mf4_t v5, vint16mf4_t v6, vint16mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i16mf2_m( @@ -346,7 +346,7 @@ void test_vsuxseg8ei8_v_i16mf4_m(vbool64_t mask, int16_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bindex, vint16mf2_t v0, vint16mf2_t v1, vint16mf2_t v2, vint16mf2_t v3, vint16mf2_t v4, vint16mf2_t v5, vint16mf2_t v6, vint16mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i16m1_m( @@ -355,7 +355,7 @@ void test_vsuxseg8ei8_v_i16mf2_m(vbool32_t mask, int16_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t bindex, vint16m1_t v0, vint16m1_t v1, vint16m1_t v2, vint16m1_t v3, vint16m1_t v4, vint16m1_t v5, vint16m1_t v6, vint16m1_t v7, size_t vl) { - return vsuxseg8ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i32mf2_m( @@ -364,7 +364,7 @@ void test_vsuxseg8ei8_v_i16m1_m(vbool16_t mask, int16_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bindex, vint32mf2_t v0, vint32mf2_t v1, vint32mf2_t v2, vint32mf2_t v3, vint32mf2_t v4, vint32mf2_t v5, vint32mf2_t v6, vint32mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i32m1_m( @@ -373,7 +373,7 @@ void test_vsuxseg8ei8_v_i32mf2_m(vbool64_t mask, int32_t *base, vuint8mf8_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t bindex, vint32m1_t v0, vint32m1_t v1, vint32m1_t v2, vint32m1_t v3, vint32m1_t v4, vint32m1_t v5, vint32m1_t v6, vint32m1_t v7, size_t vl) { - return vsuxseg8ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_i64m1_m( @@ -382,7 +382,7 @@ void test_vsuxseg8ei8_v_i32m1_m(vbool32_t mask, int32_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t bindex, vint64m1_t v0, vint64m1_t v1, vint64m1_t v2, vint64m1_t v3, vint64m1_t v4, vint64m1_t v5, vint64m1_t v6, vint64m1_t v7, size_t vl) { - return vsuxseg8ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_i64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u8mf8_m( @@ -391,7 +391,7 @@ void test_vsuxseg8ei8_v_i64m1_m(vbool64_t mask, int64_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t bindex, vuint8mf8_t v0, vuint8mf8_t v1, vuint8mf8_t v2, vuint8mf8_t v3, vuint8mf8_t v4, vuint8mf8_t v5, vuint8mf8_t v6, vuint8mf8_t v7, size_t vl) { - return vsuxseg8ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u8mf8_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u8mf4_m( @@ -400,7 +400,7 @@ void test_vsuxseg8ei8_v_u8mf8_m(vbool64_t mask, uint8_t *base, vuint8mf8_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t bindex, vuint8mf4_t v0, vuint8mf4_t v1, vuint8mf4_t v2, vuint8mf4_t v3, vuint8mf4_t v4, vuint8mf4_t v5, vuint8mf4_t v6, vuint8mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u8mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u8mf2_m( @@ -409,7 +409,7 @@ void test_vsuxseg8ei8_v_u8mf4_m(vbool32_t mask, uint8_t *base, vuint8mf4_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t bindex, vuint8mf2_t v0, vuint8mf2_t v1, vuint8mf2_t v2, vuint8mf2_t v3, vuint8mf2_t v4, vuint8mf2_t v5, vuint8mf2_t v6, vuint8mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u8mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u8m1_m( @@ -418,7 +418,7 @@ void test_vsuxseg8ei8_v_u8mf2_m(vbool16_t mask, uint8_t *base, vuint8mf2_t binde // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, vuint8m1_t v0, vuint8m1_t v1, vuint8m1_t v2, vuint8m1_t v3, vuint8m1_t v4, vuint8m1_t v5, vuint8m1_t v6, vuint8m1_t v7, size_t vl) { - return vsuxseg8ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u8m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u16mf4_m( @@ -427,7 +427,7 @@ void test_vsuxseg8ei8_v_u8m1_m(vbool8_t mask, uint8_t *base, vuint8m1_t bindex, // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bindex, vuint16mf4_t v0, vuint16mf4_t v1, vuint16mf4_t v2, vuint16mf4_t v3, vuint16mf4_t v4, vuint16mf4_t v5, vuint16mf4_t v6, vuint16mf4_t v7, size_t vl) { - return vsuxseg8ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u16mf4_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u16mf2_m( @@ -436,7 +436,7 @@ void test_vsuxseg8ei8_v_u16mf4_m(vbool64_t mask, uint16_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bindex, vuint16mf2_t v0, vuint16mf2_t v1, vuint16mf2_t v2, vuint16mf2_t v3, vuint16mf2_t v4, vuint16mf2_t v5, vuint16mf2_t v6, vuint16mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u16mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u16m1_m( @@ -445,7 +445,7 @@ void test_vsuxseg8ei8_v_u16mf2_m(vbool32_t mask, uint16_t *base, vuint8mf4_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bindex, vuint16m1_t v0, vuint16m1_t v1, vuint16m1_t v2, vuint16m1_t v3, vuint16m1_t v4, vuint16m1_t v5, vuint16m1_t v6, vuint16m1_t v7, size_t vl) { - return vsuxseg8ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u16m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u32mf2_m( @@ -454,7 +454,7 @@ void test_vsuxseg8ei8_v_u16m1_m(vbool16_t mask, uint16_t *base, vuint8mf2_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bindex, vuint32mf2_t v0, vuint32mf2_t v1, vuint32mf2_t v2, vuint32mf2_t v3, vuint32mf2_t v4, vuint32mf2_t v5, vuint32mf2_t v6, vuint32mf2_t v7, size_t vl) { - return vsuxseg8ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u32mf2_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u32m1_m( @@ -463,7 +463,7 @@ void test_vsuxseg8ei8_v_u32mf2_m(vbool64_t mask, uint32_t *base, vuint8mf8_t bin // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bindex, vuint32m1_t v0, vuint32m1_t v1, vuint32m1_t v2, vuint32m1_t v3, vuint32m1_t v4, vuint32m1_t v5, vuint32m1_t v6, vuint32m1_t v7, size_t vl) { - return vsuxseg8ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u32m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } // CHECK-RV64-LABEL: @test_vsuxseg8ei8_v_u64m1_m( @@ -472,6 +472,6 @@ void test_vsuxseg8ei8_v_u32m1_m(vbool32_t mask, uint32_t *base, vuint8mf4_t bind // CHECK-RV64-NEXT: ret void // void test_vsuxseg8ei8_v_u64m1_m(vbool64_t mask, uint64_t *base, vuint8mf8_t bindex, vuint64m1_t v0, vuint64m1_t v1, vuint64m1_t v2, vuint64m1_t v3, vuint64m1_t v4, vuint64m1_t v5, vuint64m1_t v6, vuint64m1_t v7, size_t vl) { - return vsuxseg8ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); + return __riscv_vsuxseg8ei8_v_u64m1_m(mask, base, bindex, v0, v1, v2, v3, v4, v5, v6, v7, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vundefined.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vundefined.c index cfa5b93bfbff7a1f2a0406cf6f599411158a49db..d8171419f33e209a117af40a6afc54c5487c255f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vundefined.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vundefined.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret poison // vfloat16mf4_t test_vundefined_f16mf4() { - return vundefined_f16mf4(); + return __riscv_vundefined_f16mf4(); } // CHECK-RV64-LABEL: @test_vundefined_f16mf2( @@ -20,7 +20,7 @@ vfloat16mf4_t test_vundefined_f16mf4() { // CHECK-RV64-NEXT: ret poison // vfloat16mf2_t test_vundefined_f16mf2() { - return vundefined_f16mf2(); + return __riscv_vundefined_f16mf2(); } // CHECK-RV64-LABEL: @test_vundefined_f16m1( @@ -28,7 +28,7 @@ vfloat16mf2_t test_vundefined_f16mf2() { // CHECK-RV64-NEXT: ret poison // vfloat16m1_t test_vundefined_f16m1() { - return vundefined_f16m1(); + return __riscv_vundefined_f16m1(); } // CHECK-RV64-LABEL: @test_vundefined_f16m2( @@ -36,7 +36,7 @@ vfloat16m1_t test_vundefined_f16m1() { // CHECK-RV64-NEXT: ret poison // vfloat16m2_t test_vundefined_f16m2() { - return vundefined_f16m2(); + return __riscv_vundefined_f16m2(); } // CHECK-RV64-LABEL: @test_vundefined_f16m4( @@ -44,7 +44,7 @@ vfloat16m2_t test_vundefined_f16m2() { // CHECK-RV64-NEXT: ret poison // vfloat16m4_t test_vundefined_f16m4() { - return vundefined_f16m4(); + return __riscv_vundefined_f16m4(); } // CHECK-RV64-LABEL: @test_vundefined_f16m8( @@ -52,7 +52,7 @@ vfloat16m4_t test_vundefined_f16m4() { // CHECK-RV64-NEXT: ret poison // vfloat16m8_t test_vundefined_f16m8() { - return vundefined_f16m8(); + return __riscv_vundefined_f16m8(); } // CHECK-RV64-LABEL: @test_vundefined_f32mf2( @@ -60,7 +60,7 @@ vfloat16m8_t test_vundefined_f16m8() { // CHECK-RV64-NEXT: ret poison // vfloat32mf2_t test_vundefined_f32mf2() { - return vundefined_f32mf2(); + return __riscv_vundefined_f32mf2(); } // CHECK-RV64-LABEL: @test_vundefined_f32m1( @@ -68,7 +68,7 @@ vfloat32mf2_t test_vundefined_f32mf2() { // CHECK-RV64-NEXT: ret poison // vfloat32m1_t test_vundefined_f32m1() { - return vundefined_f32m1(); + return __riscv_vundefined_f32m1(); } // CHECK-RV64-LABEL: @test_vundefined_f32m2( @@ -76,7 +76,7 @@ vfloat32m1_t test_vundefined_f32m1() { // CHECK-RV64-NEXT: ret poison // vfloat32m2_t test_vundefined_f32m2() { - return vundefined_f32m2(); + return __riscv_vundefined_f32m2(); } // CHECK-RV64-LABEL: @test_vundefined_f32m4( @@ -84,7 +84,7 @@ vfloat32m2_t test_vundefined_f32m2() { // CHECK-RV64-NEXT: ret poison // vfloat32m4_t test_vundefined_f32m4() { - return vundefined_f32m4(); + return __riscv_vundefined_f32m4(); } // CHECK-RV64-LABEL: @test_vundefined_f32m8( @@ -92,7 +92,7 @@ vfloat32m4_t test_vundefined_f32m4() { // CHECK-RV64-NEXT: ret poison // vfloat32m8_t test_vundefined_f32m8() { - return vundefined_f32m8(); + return __riscv_vundefined_f32m8(); } // CHECK-RV64-LABEL: @test_vundefined_f64m1( @@ -100,7 +100,7 @@ vfloat32m8_t test_vundefined_f32m8() { // CHECK-RV64-NEXT: ret poison // vfloat64m1_t test_vundefined_f64m1() { - return vundefined_f64m1(); + return __riscv_vundefined_f64m1(); } // CHECK-RV64-LABEL: @test_vundefined_f64m2( @@ -108,7 +108,7 @@ vfloat64m1_t test_vundefined_f64m1() { // CHECK-RV64-NEXT: ret poison // vfloat64m2_t test_vundefined_f64m2() { - return vundefined_f64m2(); + return __riscv_vundefined_f64m2(); } // CHECK-RV64-LABEL: @test_vundefined_f64m4( @@ -116,7 +116,7 @@ vfloat64m2_t test_vundefined_f64m2() { // CHECK-RV64-NEXT: ret poison // vfloat64m4_t test_vundefined_f64m4() { - return vundefined_f64m4(); + return __riscv_vundefined_f64m4(); } // CHECK-RV64-LABEL: @test_vundefined_f64m8( @@ -124,7 +124,7 @@ vfloat64m4_t test_vundefined_f64m4() { // CHECK-RV64-NEXT: ret poison // vfloat64m8_t test_vundefined_f64m8() { - return vundefined_f64m8(); + return __riscv_vundefined_f64m8(); } // CHECK-RV64-LABEL: @test_vundefined_i8mf8( @@ -132,7 +132,7 @@ vfloat64m8_t test_vundefined_f64m8() { // CHECK-RV64-NEXT: ret poison // vint8mf8_t test_vundefined_i8mf8() { - return vundefined_i8mf8(); + return __riscv_vundefined_i8mf8(); } // CHECK-RV64-LABEL: @test_vundefined_i8mf4( @@ -140,7 +140,7 @@ vint8mf8_t test_vundefined_i8mf8() { // CHECK-RV64-NEXT: ret poison // vint8mf4_t test_vundefined_i8mf4() { - return vundefined_i8mf4(); + return __riscv_vundefined_i8mf4(); } // CHECK-RV64-LABEL: @test_vundefined_i8mf2( @@ -148,7 +148,7 @@ vint8mf4_t test_vundefined_i8mf4() { // CHECK-RV64-NEXT: ret poison // vint8mf2_t test_vundefined_i8mf2() { - return vundefined_i8mf2(); + return __riscv_vundefined_i8mf2(); } // CHECK-RV64-LABEL: @test_vundefined_i8m1( @@ -156,7 +156,7 @@ vint8mf2_t test_vundefined_i8mf2() { // CHECK-RV64-NEXT: ret poison // vint8m1_t test_vundefined_i8m1() { - return vundefined_i8m1(); + return __riscv_vundefined_i8m1(); } // CHECK-RV64-LABEL: @test_vundefined_i8m2( @@ -164,7 +164,7 @@ vint8m1_t test_vundefined_i8m1() { // CHECK-RV64-NEXT: ret poison // vint8m2_t test_vundefined_i8m2() { - return vundefined_i8m2(); + return __riscv_vundefined_i8m2(); } // CHECK-RV64-LABEL: @test_vundefined_i8m4( @@ -172,7 +172,7 @@ vint8m2_t test_vundefined_i8m2() { // CHECK-RV64-NEXT: ret poison // vint8m4_t test_vundefined_i8m4() { - return vundefined_i8m4(); + return __riscv_vundefined_i8m4(); } // CHECK-RV64-LABEL: @test_vundefined_i8m8( @@ -180,7 +180,7 @@ vint8m4_t test_vundefined_i8m4() { // CHECK-RV64-NEXT: ret poison // vint8m8_t test_vundefined_i8m8() { - return vundefined_i8m8(); + return __riscv_vundefined_i8m8(); } // CHECK-RV64-LABEL: @test_vundefined_i16mf4( @@ -188,7 +188,7 @@ vint8m8_t test_vundefined_i8m8() { // CHECK-RV64-NEXT: ret poison // vint16mf4_t test_vundefined_i16mf4() { - return vundefined_i16mf4(); + return __riscv_vundefined_i16mf4(); } // CHECK-RV64-LABEL: @test_vundefined_i16mf2( @@ -196,7 +196,7 @@ vint16mf4_t test_vundefined_i16mf4() { // CHECK-RV64-NEXT: ret poison // vint16mf2_t test_vundefined_i16mf2() { - return vundefined_i16mf2(); + return __riscv_vundefined_i16mf2(); } // CHECK-RV64-LABEL: @test_vundefined_i16m1( @@ -204,7 +204,7 @@ vint16mf2_t test_vundefined_i16mf2() { // CHECK-RV64-NEXT: ret poison // vint16m1_t test_vundefined_i16m1() { - return vundefined_i16m1(); + return __riscv_vundefined_i16m1(); } // CHECK-RV64-LABEL: @test_vundefined_i16m2( @@ -212,7 +212,7 @@ vint16m1_t test_vundefined_i16m1() { // CHECK-RV64-NEXT: ret poison // vint16m2_t test_vundefined_i16m2() { - return vundefined_i16m2(); + return __riscv_vundefined_i16m2(); } // CHECK-RV64-LABEL: @test_vundefined_i16m4( @@ -220,7 +220,7 @@ vint16m2_t test_vundefined_i16m2() { // CHECK-RV64-NEXT: ret poison // vint16m4_t test_vundefined_i16m4() { - return vundefined_i16m4(); + return __riscv_vundefined_i16m4(); } // CHECK-RV64-LABEL: @test_vundefined_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vundefined_i16m4() { // CHECK-RV64-NEXT: ret poison // vint16m8_t test_vundefined_i16m8() { - return vundefined_i16m8(); + return __riscv_vundefined_i16m8(); } // CHECK-RV64-LABEL: @test_vundefined_i32mf2( @@ -236,7 +236,7 @@ vint16m8_t test_vundefined_i16m8() { // CHECK-RV64-NEXT: ret poison // vint32mf2_t test_vundefined_i32mf2() { - return vundefined_i32mf2(); + return __riscv_vundefined_i32mf2(); } // CHECK-RV64-LABEL: @test_vundefined_i32m1( @@ -244,7 +244,7 @@ vint32mf2_t test_vundefined_i32mf2() { // CHECK-RV64-NEXT: ret poison // vint32m1_t test_vundefined_i32m1() { - return vundefined_i32m1(); + return __riscv_vundefined_i32m1(); } // CHECK-RV64-LABEL: @test_vundefined_i32m2( @@ -252,7 +252,7 @@ vint32m1_t test_vundefined_i32m1() { // CHECK-RV64-NEXT: ret poison // vint32m2_t test_vundefined_i32m2() { - return vundefined_i32m2(); + return __riscv_vundefined_i32m2(); } // CHECK-RV64-LABEL: @test_vundefined_i32m4( @@ -260,7 +260,7 @@ vint32m2_t test_vundefined_i32m2() { // CHECK-RV64-NEXT: ret poison // vint32m4_t test_vundefined_i32m4() { - return vundefined_i32m4(); + return __riscv_vundefined_i32m4(); } // CHECK-RV64-LABEL: @test_vundefined_i32m8( @@ -268,7 +268,7 @@ vint32m4_t test_vundefined_i32m4() { // CHECK-RV64-NEXT: ret poison // vint32m8_t test_vundefined_i32m8() { - return vundefined_i32m8(); + return __riscv_vundefined_i32m8(); } // CHECK-RV64-LABEL: @test_vundefined_i64m1( @@ -276,7 +276,7 @@ vint32m8_t test_vundefined_i32m8() { // CHECK-RV64-NEXT: ret poison // vint64m1_t test_vundefined_i64m1() { - return vundefined_i64m1(); + return __riscv_vundefined_i64m1(); } // CHECK-RV64-LABEL: @test_vundefined_i64m2( @@ -284,7 +284,7 @@ vint64m1_t test_vundefined_i64m1() { // CHECK-RV64-NEXT: ret poison // vint64m2_t test_vundefined_i64m2() { - return vundefined_i64m2(); + return __riscv_vundefined_i64m2(); } // CHECK-RV64-LABEL: @test_vundefined_i64m4( @@ -292,7 +292,7 @@ vint64m2_t test_vundefined_i64m2() { // CHECK-RV64-NEXT: ret poison // vint64m4_t test_vundefined_i64m4() { - return vundefined_i64m4(); + return __riscv_vundefined_i64m4(); } // CHECK-RV64-LABEL: @test_vundefined_i64m8( @@ -300,7 +300,7 @@ vint64m4_t test_vundefined_i64m4() { // CHECK-RV64-NEXT: ret poison // vint64m8_t test_vundefined_i64m8() { - return vundefined_i64m8(); + return __riscv_vundefined_i64m8(); } // CHECK-RV64-LABEL: @test_vundefined_u8mf8( @@ -308,7 +308,7 @@ vint64m8_t test_vundefined_i64m8() { // CHECK-RV64-NEXT: ret poison // vuint8mf8_t test_vundefined_u8mf8() { - return vundefined_u8mf8(); + return __riscv_vundefined_u8mf8(); } // CHECK-RV64-LABEL: @test_vundefined_u8mf4( @@ -316,7 +316,7 @@ vuint8mf8_t test_vundefined_u8mf8() { // CHECK-RV64-NEXT: ret poison // vuint8mf4_t test_vundefined_u8mf4() { - return vundefined_u8mf4(); + return __riscv_vundefined_u8mf4(); } // CHECK-RV64-LABEL: @test_vundefined_u8mf2( @@ -324,7 +324,7 @@ vuint8mf4_t test_vundefined_u8mf4() { // CHECK-RV64-NEXT: ret poison // vuint8mf2_t test_vundefined_u8mf2() { - return vundefined_u8mf2(); + return __riscv_vundefined_u8mf2(); } // CHECK-RV64-LABEL: @test_vundefined_u8m1( @@ -332,7 +332,7 @@ vuint8mf2_t test_vundefined_u8mf2() { // CHECK-RV64-NEXT: ret poison // vuint8m1_t test_vundefined_u8m1() { - return vundefined_u8m1(); + return __riscv_vundefined_u8m1(); } // CHECK-RV64-LABEL: @test_vundefined_u8m2( @@ -340,7 +340,7 @@ vuint8m1_t test_vundefined_u8m1() { // CHECK-RV64-NEXT: ret poison // vuint8m2_t test_vundefined_u8m2() { - return vundefined_u8m2(); + return __riscv_vundefined_u8m2(); } // CHECK-RV64-LABEL: @test_vundefined_u8m4( @@ -348,7 +348,7 @@ vuint8m2_t test_vundefined_u8m2() { // CHECK-RV64-NEXT: ret poison // vuint8m4_t test_vundefined_u8m4() { - return vundefined_u8m4(); + return __riscv_vundefined_u8m4(); } // CHECK-RV64-LABEL: @test_vundefined_u8m8( @@ -356,7 +356,7 @@ vuint8m4_t test_vundefined_u8m4() { // CHECK-RV64-NEXT: ret poison // vuint8m8_t test_vundefined_u8m8() { - return vundefined_u8m8(); + return __riscv_vundefined_u8m8(); } // CHECK-RV64-LABEL: @test_vundefined_u16mf4( @@ -364,7 +364,7 @@ vuint8m8_t test_vundefined_u8m8() { // CHECK-RV64-NEXT: ret poison // vuint16mf4_t test_vundefined_u16mf4() { - return vundefined_u16mf4(); + return __riscv_vundefined_u16mf4(); } // CHECK-RV64-LABEL: @test_vundefined_u16mf2( @@ -372,7 +372,7 @@ vuint16mf4_t test_vundefined_u16mf4() { // CHECK-RV64-NEXT: ret poison // vuint16mf2_t test_vundefined_u16mf2() { - return vundefined_u16mf2(); + return __riscv_vundefined_u16mf2(); } // CHECK-RV64-LABEL: @test_vundefined_u16m1( @@ -380,7 +380,7 @@ vuint16mf2_t test_vundefined_u16mf2() { // CHECK-RV64-NEXT: ret poison // vuint16m1_t test_vundefined_u16m1() { - return vundefined_u16m1(); + return __riscv_vundefined_u16m1(); } // CHECK-RV64-LABEL: @test_vundefined_u16m2( @@ -388,7 +388,7 @@ vuint16m1_t test_vundefined_u16m1() { // CHECK-RV64-NEXT: ret poison // vuint16m2_t test_vundefined_u16m2() { - return vundefined_u16m2(); + return __riscv_vundefined_u16m2(); } // CHECK-RV64-LABEL: @test_vundefined_u16m4( @@ -396,7 +396,7 @@ vuint16m2_t test_vundefined_u16m2() { // CHECK-RV64-NEXT: ret poison // vuint16m4_t test_vundefined_u16m4() { - return vundefined_u16m4(); + return __riscv_vundefined_u16m4(); } // CHECK-RV64-LABEL: @test_vundefined_u16m8( @@ -404,7 +404,7 @@ vuint16m4_t test_vundefined_u16m4() { // CHECK-RV64-NEXT: ret poison // vuint16m8_t test_vundefined_u16m8() { - return vundefined_u16m8(); + return __riscv_vundefined_u16m8(); } // CHECK-RV64-LABEL: @test_vundefined_u32mf2( @@ -412,7 +412,7 @@ vuint16m8_t test_vundefined_u16m8() { // CHECK-RV64-NEXT: ret poison // vuint32mf2_t test_vundefined_u32mf2() { - return vundefined_u32mf2(); + return __riscv_vundefined_u32mf2(); } // CHECK-RV64-LABEL: @test_vundefined_u32m1( @@ -420,7 +420,7 @@ vuint32mf2_t test_vundefined_u32mf2() { // CHECK-RV64-NEXT: ret poison // vuint32m1_t test_vundefined_u32m1() { - return vundefined_u32m1(); + return __riscv_vundefined_u32m1(); } // CHECK-RV64-LABEL: @test_vundefined_u32m2( @@ -428,7 +428,7 @@ vuint32m1_t test_vundefined_u32m1() { // CHECK-RV64-NEXT: ret poison // vuint32m2_t test_vundefined_u32m2() { - return vundefined_u32m2(); + return __riscv_vundefined_u32m2(); } // CHECK-RV64-LABEL: @test_vundefined_u32m4( @@ -436,7 +436,7 @@ vuint32m2_t test_vundefined_u32m2() { // CHECK-RV64-NEXT: ret poison // vuint32m4_t test_vundefined_u32m4() { - return vundefined_u32m4(); + return __riscv_vundefined_u32m4(); } // CHECK-RV64-LABEL: @test_vundefined_u32m8( @@ -444,7 +444,7 @@ vuint32m4_t test_vundefined_u32m4() { // CHECK-RV64-NEXT: ret poison // vuint32m8_t test_vundefined_u32m8() { - return vundefined_u32m8(); + return __riscv_vundefined_u32m8(); } // CHECK-RV64-LABEL: @test_vundefined_u64m1( @@ -452,7 +452,7 @@ vuint32m8_t test_vundefined_u32m8() { // CHECK-RV64-NEXT: ret poison // vuint64m1_t test_vundefined_u64m1() { - return vundefined_u64m1(); + return __riscv_vundefined_u64m1(); } // CHECK-RV64-LABEL: @test_vundefined_u64m2( @@ -460,7 +460,7 @@ vuint64m1_t test_vundefined_u64m1() { // CHECK-RV64-NEXT: ret poison // vuint64m2_t test_vundefined_u64m2() { - return vundefined_u64m2(); + return __riscv_vundefined_u64m2(); } // CHECK-RV64-LABEL: @test_vundefined_u64m4( @@ -468,7 +468,7 @@ vuint64m2_t test_vundefined_u64m2() { // CHECK-RV64-NEXT: ret poison // vuint64m4_t test_vundefined_u64m4() { - return vundefined_u64m4(); + return __riscv_vundefined_u64m4(); } // CHECK-RV64-LABEL: @test_vundefined_u64m8( @@ -476,6 +476,6 @@ vuint64m4_t test_vundefined_u64m4() { // CHECK-RV64-NEXT: ret poison // vuint64m8_t test_vundefined_u64m8() { - return vundefined_u64m8(); + return __riscv_vundefined_u64m8(); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwadd.c index 367e6e859ec296518672c6574383846523ca92e6..07593304977c902cc2b6ebfc24f86e8b6853944a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwadd.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vv_i16mf4(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_vv_i16mf4(op1, op2, vl); + return __riscv_vwadd_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf4( @@ -21,7 +21,7 @@ vint16mf4_t test_vwadd_vv_i16mf4(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vx_i16mf4(vint8mf8_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf4(op1, op2, vl); + return __riscv_vwadd_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf4( @@ -30,7 +30,7 @@ vint16mf4_t test_vwadd_vx_i16mf4(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wv_i16mf4(vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_wv_i16mf4(op1, op2, vl); + return __riscv_vwadd_wv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf4( @@ -39,7 +39,7 @@ vint16mf4_t test_vwadd_wv_i16mf4(vint16mf4_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wx_i16mf4(vint16mf4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf4(op1, op2, vl); + return __riscv_vwadd_wx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf2( @@ -48,7 +48,7 @@ vint16mf4_t test_vwadd_wx_i16mf4(vint16mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vv_i16mf2(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_vv_i16mf2(op1, op2, vl); + return __riscv_vwadd_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf2( @@ -57,7 +57,7 @@ vint16mf2_t test_vwadd_vv_i16mf2(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vx_i16mf2(vint8mf4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf2(op1, op2, vl); + return __riscv_vwadd_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf2( @@ -66,7 +66,7 @@ vint16mf2_t test_vwadd_vx_i16mf2(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wv_i16mf2(vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_wv_i16mf2(op1, op2, vl); + return __riscv_vwadd_wv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf2( @@ -75,7 +75,7 @@ vint16mf2_t test_vwadd_wv_i16mf2(vint16mf2_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wx_i16mf2(vint16mf2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf2(op1, op2, vl); + return __riscv_vwadd_wx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m1( @@ -84,7 +84,7 @@ vint16mf2_t test_vwadd_wx_i16mf2(vint16mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vv_i16m1(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_vv_i16m1(op1, op2, vl); + return __riscv_vwadd_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m1( @@ -93,7 +93,7 @@ vint16m1_t test_vwadd_vv_i16m1(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vx_i16m1(vint8mf2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m1(op1, op2, vl); + return __riscv_vwadd_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m1( @@ -102,7 +102,7 @@ vint16m1_t test_vwadd_vx_i16m1(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wv_i16m1(vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_wv_i16m1(op1, op2, vl); + return __riscv_vwadd_wv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m1( @@ -111,7 +111,7 @@ vint16m1_t test_vwadd_wv_i16m1(vint16m1_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wx_i16m1(vint16m1_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m1(op1, op2, vl); + return __riscv_vwadd_wx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m2( @@ -120,7 +120,7 @@ vint16m1_t test_vwadd_wx_i16m1(vint16m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vv_i16m2(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwadd_vv_i16m2(op1, op2, vl); + return __riscv_vwadd_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m2( @@ -129,7 +129,7 @@ vint16m2_t test_vwadd_vv_i16m2(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vx_i16m2(vint8m1_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m2(op1, op2, vl); + return __riscv_vwadd_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m2( @@ -138,7 +138,7 @@ vint16m2_t test_vwadd_vx_i16m2(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wv_i16m2(vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwadd_wv_i16m2(op1, op2, vl); + return __riscv_vwadd_wv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m2( @@ -147,7 +147,7 @@ vint16m2_t test_vwadd_wv_i16m2(vint16m2_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wx_i16m2(vint16m2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m2(op1, op2, vl); + return __riscv_vwadd_wx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m4( @@ -156,7 +156,7 @@ vint16m2_t test_vwadd_wx_i16m2(vint16m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vv_i16m4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwadd_vv_i16m4(op1, op2, vl); + return __riscv_vwadd_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m4( @@ -165,7 +165,7 @@ vint16m4_t test_vwadd_vv_i16m4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vx_i16m4(vint8m2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m4(op1, op2, vl); + return __riscv_vwadd_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m4( @@ -174,7 +174,7 @@ vint16m4_t test_vwadd_vx_i16m4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wv_i16m4(vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwadd_wv_i16m4(op1, op2, vl); + return __riscv_vwadd_wv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m4( @@ -183,7 +183,7 @@ vint16m4_t test_vwadd_wv_i16m4(vint16m4_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wx_i16m4(vint16m4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m4(op1, op2, vl); + return __riscv_vwadd_wx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m8( @@ -192,7 +192,7 @@ vint16m4_t test_vwadd_wx_i16m4(vint16m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vv_i16m8(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwadd_vv_i16m8(op1, op2, vl); + return __riscv_vwadd_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m8( @@ -201,7 +201,7 @@ vint16m8_t test_vwadd_vv_i16m8(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vx_i16m8(vint8m4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m8(op1, op2, vl); + return __riscv_vwadd_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m8( @@ -210,7 +210,7 @@ vint16m8_t test_vwadd_vx_i16m8(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wv_i16m8(vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwadd_wv_i16m8(op1, op2, vl); + return __riscv_vwadd_wv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m8( @@ -219,7 +219,7 @@ vint16m8_t test_vwadd_wv_i16m8(vint16m8_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wx_i16m8(vint16m8_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m8(op1, op2, vl); + return __riscv_vwadd_wx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32mf2( @@ -228,7 +228,7 @@ vint16m8_t test_vwadd_wx_i16m8(vint16m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vv_i32mf2(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_vv_i32mf2(op1, op2, vl); + return __riscv_vwadd_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32mf2( @@ -237,7 +237,7 @@ vint32mf2_t test_vwadd_vv_i32mf2(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vx_i32mf2(vint16mf4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32mf2(op1, op2, vl); + return __riscv_vwadd_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32mf2( @@ -246,7 +246,7 @@ vint32mf2_t test_vwadd_vx_i32mf2(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wv_i32mf2(vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_wv_i32mf2(op1, op2, vl); + return __riscv_vwadd_wv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vwadd_wv_i32mf2(vint32mf2_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wx_i32mf2(vint32mf2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32mf2(op1, op2, vl); + return __riscv_vwadd_wx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vwadd_wx_i32mf2(vint32mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vv_i32m1(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_vv_i32m1(op1, op2, vl); + return __riscv_vwadd_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vwadd_vv_i32m1(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vx_i32m1(vint16mf2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m1(op1, op2, vl); + return __riscv_vwadd_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m1( @@ -282,7 +282,7 @@ vint32m1_t test_vwadd_vx_i32m1(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wv_i32m1(vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_wv_i32m1(op1, op2, vl); + return __riscv_vwadd_wv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m1( @@ -291,7 +291,7 @@ vint32m1_t test_vwadd_wv_i32m1(vint32m1_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wx_i32m1(vint32m1_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m1(op1, op2, vl); + return __riscv_vwadd_wx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m2( @@ -300,7 +300,7 @@ vint32m1_t test_vwadd_wx_i32m1(vint32m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vv_i32m2(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwadd_vv_i32m2(op1, op2, vl); + return __riscv_vwadd_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m2( @@ -309,7 +309,7 @@ vint32m2_t test_vwadd_vv_i32m2(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vx_i32m2(vint16m1_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m2(op1, op2, vl); + return __riscv_vwadd_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m2( @@ -318,7 +318,7 @@ vint32m2_t test_vwadd_vx_i32m2(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wv_i32m2(vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwadd_wv_i32m2(op1, op2, vl); + return __riscv_vwadd_wv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m2( @@ -327,7 +327,7 @@ vint32m2_t test_vwadd_wv_i32m2(vint32m2_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wx_i32m2(vint32m2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m2(op1, op2, vl); + return __riscv_vwadd_wx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m4( @@ -336,7 +336,7 @@ vint32m2_t test_vwadd_wx_i32m2(vint32m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vv_i32m4(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwadd_vv_i32m4(op1, op2, vl); + return __riscv_vwadd_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m4( @@ -345,7 +345,7 @@ vint32m4_t test_vwadd_vv_i32m4(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vx_i32m4(vint16m2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m4(op1, op2, vl); + return __riscv_vwadd_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m4( @@ -354,7 +354,7 @@ vint32m4_t test_vwadd_vx_i32m4(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wv_i32m4(vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwadd_wv_i32m4(op1, op2, vl); + return __riscv_vwadd_wv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m4( @@ -363,7 +363,7 @@ vint32m4_t test_vwadd_wv_i32m4(vint32m4_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wx_i32m4(vint32m4_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m4(op1, op2, vl); + return __riscv_vwadd_wx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m8( @@ -372,7 +372,7 @@ vint32m4_t test_vwadd_wx_i32m4(vint32m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vv_i32m8(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwadd_vv_i32m8(op1, op2, vl); + return __riscv_vwadd_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m8( @@ -381,7 +381,7 @@ vint32m8_t test_vwadd_vv_i32m8(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vx_i32m8(vint16m4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m8(op1, op2, vl); + return __riscv_vwadd_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m8( @@ -390,7 +390,7 @@ vint32m8_t test_vwadd_vx_i32m8(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wv_i32m8(vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwadd_wv_i32m8(op1, op2, vl); + return __riscv_vwadd_wv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m8( @@ -399,7 +399,7 @@ vint32m8_t test_vwadd_wv_i32m8(vint32m8_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wx_i32m8(vint32m8_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m8(op1, op2, vl); + return __riscv_vwadd_wx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m1( @@ -408,7 +408,7 @@ vint32m8_t test_vwadd_wx_i32m8(vint32m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vv_i64m1(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_vv_i64m1(op1, op2, vl); + return __riscv_vwadd_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m1( @@ -417,7 +417,7 @@ vint64m1_t test_vwadd_vv_i64m1(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vx_i64m1(vint32mf2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m1(op1, op2, vl); + return __riscv_vwadd_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m1( @@ -426,7 +426,7 @@ vint64m1_t test_vwadd_vx_i64m1(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wv_i64m1(vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_wv_i64m1(op1, op2, vl); + return __riscv_vwadd_wv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m1( @@ -435,7 +435,7 @@ vint64m1_t test_vwadd_wv_i64m1(vint64m1_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wx_i64m1(vint64m1_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m1(op1, op2, vl); + return __riscv_vwadd_wx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m2( @@ -444,7 +444,7 @@ vint64m1_t test_vwadd_wx_i64m1(vint64m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vv_i64m2(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwadd_vv_i64m2(op1, op2, vl); + return __riscv_vwadd_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m2( @@ -453,7 +453,7 @@ vint64m2_t test_vwadd_vv_i64m2(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vx_i64m2(vint32m1_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m2(op1, op2, vl); + return __riscv_vwadd_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m2( @@ -462,7 +462,7 @@ vint64m2_t test_vwadd_vx_i64m2(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wv_i64m2(vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwadd_wv_i64m2(op1, op2, vl); + return __riscv_vwadd_wv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m2( @@ -471,7 +471,7 @@ vint64m2_t test_vwadd_wv_i64m2(vint64m2_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wx_i64m2(vint64m2_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m2(op1, op2, vl); + return __riscv_vwadd_wx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m4( @@ -480,7 +480,7 @@ vint64m2_t test_vwadd_wx_i64m2(vint64m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vv_i64m4(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwadd_vv_i64m4(op1, op2, vl); + return __riscv_vwadd_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m4( @@ -489,7 +489,7 @@ vint64m4_t test_vwadd_vv_i64m4(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vx_i64m4(vint32m2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m4(op1, op2, vl); + return __riscv_vwadd_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m4( @@ -498,7 +498,7 @@ vint64m4_t test_vwadd_vx_i64m4(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wv_i64m4(vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwadd_wv_i64m4(op1, op2, vl); + return __riscv_vwadd_wv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m4( @@ -507,7 +507,7 @@ vint64m4_t test_vwadd_wv_i64m4(vint64m4_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wx_i64m4(vint64m4_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m4(op1, op2, vl); + return __riscv_vwadd_wx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m8( @@ -516,7 +516,7 @@ vint64m4_t test_vwadd_wx_i64m4(vint64m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vv_i64m8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwadd_vv_i64m8(op1, op2, vl); + return __riscv_vwadd_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m8( @@ -525,7 +525,7 @@ vint64m8_t test_vwadd_vv_i64m8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vx_i64m8(vint32m4_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m8(op1, op2, vl); + return __riscv_vwadd_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m8( @@ -534,7 +534,7 @@ vint64m8_t test_vwadd_vx_i64m8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wv_i64m8(vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwadd_wv_i64m8(op1, op2, vl); + return __riscv_vwadd_wv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m8( @@ -543,7 +543,7 @@ vint64m8_t test_vwadd_wv_i64m8(vint64m8_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wx_i64m8(vint64m8_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m8(op1, op2, vl); + return __riscv_vwadd_wx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf4_m( @@ -552,7 +552,7 @@ vint64m8_t test_vwadd_wx_i64m8(vint64m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vv_i16mf4_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf4_m( @@ -561,7 +561,7 @@ vint16mf4_t test_vwadd_vv_i16mf4_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vx_i16mf4_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf4_m( @@ -570,7 +570,7 @@ vint16mf4_t test_vwadd_vx_i16mf4_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_wv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf4_m( @@ -579,7 +579,7 @@ vint16mf4_t test_vwadd_wv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf2_m( @@ -588,7 +588,7 @@ vint16mf4_t test_vwadd_wx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vv_i16mf2_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf2_m( @@ -597,7 +597,7 @@ vint16mf2_t test_vwadd_vv_i16mf2_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vx_i16mf2_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf2_m( @@ -606,7 +606,7 @@ vint16mf2_t test_vwadd_vx_i16mf2_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_wv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf2_m( @@ -615,7 +615,7 @@ vint16mf2_t test_vwadd_wv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m1_m( @@ -624,7 +624,7 @@ vint16mf2_t test_vwadd_wx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vv_i16m1_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m1_m( @@ -633,7 +633,7 @@ vint16m1_t test_vwadd_vv_i16m1_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vx_i16m1_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m1_m( @@ -642,7 +642,7 @@ vint16m1_t test_vwadd_vx_i16m1_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_wv_i16m1_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m1_m( @@ -651,7 +651,7 @@ vint16m1_t test_vwadd_wv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wx_i16m1_m(vbool16_t mask, vint16m1_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m1_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m2_m( @@ -660,7 +660,7 @@ vint16m1_t test_vwadd_wx_i16m1_m(vbool16_t mask, vint16m1_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vv_i16m2_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwadd_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m2_m( @@ -669,7 +669,7 @@ vint16m2_t test_vwadd_vv_i16m2_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vx_i16m2_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m2_m( @@ -678,7 +678,7 @@ vint16m2_t test_vwadd_vx_i16m2_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwadd_wv_i16m2_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m2_m( @@ -687,7 +687,7 @@ vint16m2_t test_vwadd_wv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint8m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wx_i16m2_m(vbool8_t mask, vint16m2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m2_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m4_m( @@ -696,7 +696,7 @@ vint16m2_t test_vwadd_wx_i16m2_m(vbool8_t mask, vint16m2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vv_i16m4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwadd_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m4_m( @@ -705,7 +705,7 @@ vint16m4_t test_vwadd_vv_i16m4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vx_i16m4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m4_m( @@ -714,7 +714,7 @@ vint16m4_t test_vwadd_vx_i16m4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwadd_wv_i16m4_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m4_m( @@ -723,7 +723,7 @@ vint16m4_t test_vwadd_wv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint8m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wx_i16m4_m(vbool4_t mask, vint16m4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m4_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m8_m( @@ -732,7 +732,7 @@ vint16m4_t test_vwadd_wx_i16m4_m(vbool4_t mask, vint16m4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vv_i16m8_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwadd_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m8_m( @@ -741,7 +741,7 @@ vint16m8_t test_vwadd_vv_i16m8_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vx_i16m8_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m8_m( @@ -750,7 +750,7 @@ vint16m8_t test_vwadd_vx_i16m8_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwadd_wv_i16m8_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m8_m( @@ -759,7 +759,7 @@ vint16m8_t test_vwadd_wv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint8m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wx_i16m8_m(vbool2_t mask, vint16m8_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m8_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32mf2_m( @@ -768,7 +768,7 @@ vint16m8_t test_vwadd_wx_i16m8_m(vbool2_t mask, vint16m8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vv_i32mf2_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32mf2_m( @@ -777,7 +777,7 @@ vint32mf2_t test_vwadd_vv_i32mf2_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vx_i32mf2_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32mf2_m( @@ -786,7 +786,7 @@ vint32mf2_t test_vwadd_vx_i32mf2_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_wv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32mf2_m( @@ -795,7 +795,7 @@ vint32mf2_t test_vwadd_wv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m1_m( @@ -804,7 +804,7 @@ vint32mf2_t test_vwadd_wx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vv_i32m1_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m1_m( @@ -813,7 +813,7 @@ vint32m1_t test_vwadd_vv_i32m1_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vx_i32m1_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m1_m( @@ -822,7 +822,7 @@ vint32m1_t test_vwadd_vx_i32m1_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_wv_i32m1_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m1_m( @@ -831,7 +831,7 @@ vint32m1_t test_vwadd_wv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint16mf2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wx_i32m1_m(vbool32_t mask, vint32m1_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m1_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m2_m( @@ -840,7 +840,7 @@ vint32m1_t test_vwadd_wx_i32m1_m(vbool32_t mask, vint32m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vv_i32m2_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwadd_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m2_m( @@ -849,7 +849,7 @@ vint32m2_t test_vwadd_vv_i32m2_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vx_i32m2_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m2_m( @@ -858,7 +858,7 @@ vint32m2_t test_vwadd_vx_i32m2_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwadd_wv_i32m2_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m2_m( @@ -867,7 +867,7 @@ vint32m2_t test_vwadd_wv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wx_i32m2_m(vbool16_t mask, vint32m2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m2_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m4_m( @@ -876,7 +876,7 @@ vint32m2_t test_vwadd_wx_i32m2_m(vbool16_t mask, vint32m2_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vv_i32m4_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwadd_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m4_m( @@ -885,7 +885,7 @@ vint32m4_t test_vwadd_vv_i32m4_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vx_i32m4_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m4_m( @@ -894,7 +894,7 @@ vint32m4_t test_vwadd_vx_i32m4_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwadd_wv_i32m4_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m4_m( @@ -903,7 +903,7 @@ vint32m4_t test_vwadd_wv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wx_i32m4_m(vbool8_t mask, vint32m4_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m4_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m8_m( @@ -912,7 +912,7 @@ vint32m4_t test_vwadd_wx_i32m4_m(vbool8_t mask, vint32m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vv_i32m8_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwadd_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m8_m( @@ -921,7 +921,7 @@ vint32m8_t test_vwadd_vv_i32m8_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vx_i32m8_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m8_m( @@ -930,7 +930,7 @@ vint32m8_t test_vwadd_vx_i32m8_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwadd_wv_i32m8_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m8_m( @@ -939,7 +939,7 @@ vint32m8_t test_vwadd_wv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wx_i32m8_m(vbool4_t mask, vint32m8_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m8_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m1_m( @@ -948,7 +948,7 @@ vint32m8_t test_vwadd_wx_i32m8_m(vbool4_t mask, vint32m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vv_i64m1_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m1_m( @@ -957,7 +957,7 @@ vint64m1_t test_vwadd_vv_i64m1_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vx_i64m1_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m1_m( @@ -966,7 +966,7 @@ vint64m1_t test_vwadd_vx_i64m1_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_wv_i64m1_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m1_m( @@ -975,7 +975,7 @@ vint64m1_t test_vwadd_wv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint32mf2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wx_i64m1_m(vbool64_t mask, vint64m1_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m1_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m2_m( @@ -984,7 +984,7 @@ vint64m1_t test_vwadd_wx_i64m1_m(vbool64_t mask, vint64m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vv_i64m2_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwadd_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m2_m( @@ -993,7 +993,7 @@ vint64m2_t test_vwadd_vv_i64m2_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vx_i64m2_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m2_m( @@ -1002,7 +1002,7 @@ vint64m2_t test_vwadd_vx_i64m2_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwadd_wv_i64m2_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m2_m( @@ -1011,7 +1011,7 @@ vint64m2_t test_vwadd_wv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wx_i64m2_m(vbool32_t mask, vint64m2_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m2_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m4_m( @@ -1020,7 +1020,7 @@ vint64m2_t test_vwadd_wx_i64m2_m(vbool32_t mask, vint64m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vv_i64m4_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwadd_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m4_m( @@ -1029,7 +1029,7 @@ vint64m4_t test_vwadd_vv_i64m4_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vx_i64m4_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m4_m( @@ -1038,7 +1038,7 @@ vint64m4_t test_vwadd_vx_i64m4_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwadd_wv_i64m4_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m4_m( @@ -1047,7 +1047,7 @@ vint64m4_t test_vwadd_wv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wx_i64m4_m(vbool16_t mask, vint64m4_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m4_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m8_m( @@ -1056,7 +1056,7 @@ vint64m4_t test_vwadd_wx_i64m4_m(vbool16_t mask, vint64m4_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vv_i64m8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwadd_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vwadd_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m8_m( @@ -1065,7 +1065,7 @@ vint64m8_t test_vwadd_vv_i64m8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vx_i64m8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vwadd_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m8_m( @@ -1074,7 +1074,7 @@ vint64m8_t test_vwadd_vx_i64m8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwadd_wv_i64m8_m(mask, op1, op2, vl); + return __riscv_vwadd_wv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m8_m( @@ -1083,6 +1083,6 @@ vint64m8_t test_vwadd_wv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wx_i64m8_m(vbool8_t mask, vint64m8_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m8_m(mask, op1, op2, vl); + return __riscv_vwadd_wx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwaddu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwaddu.c index 52d28dffeafb4b82024b50dd7cae5d69e5f9e52c..ddbd0390f50fe32fa374ac27e8c8097dac6551aa 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwaddu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwaddu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vv_u16mf4(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_vv_u16mf4(op1, op2, vl); + return __riscv_vwaddu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf4( @@ -21,7 +21,7 @@ vuint16mf4_t test_vwaddu_vv_u16mf4(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vx_u16mf4(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf4(op1, op2, vl); + return __riscv_vwaddu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf4( @@ -30,7 +30,7 @@ vuint16mf4_t test_vwaddu_vx_u16mf4(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wv_u16mf4(vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_wv_u16mf4(op1, op2, vl); + return __riscv_vwaddu_wv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf4( @@ -39,7 +39,7 @@ vuint16mf4_t test_vwaddu_wv_u16mf4(vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wx_u16mf4(vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf4(op1, op2, vl); + return __riscv_vwaddu_wx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf2( @@ -48,7 +48,7 @@ vuint16mf4_t test_vwaddu_wx_u16mf4(vuint16mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vv_u16mf2(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_vv_u16mf2(op1, op2, vl); + return __riscv_vwaddu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf2( @@ -57,7 +57,7 @@ vuint16mf2_t test_vwaddu_vv_u16mf2(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vx_u16mf2(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf2(op1, op2, vl); + return __riscv_vwaddu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf2( @@ -66,7 +66,7 @@ vuint16mf2_t test_vwaddu_vx_u16mf2(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wv_u16mf2(vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_wv_u16mf2(op1, op2, vl); + return __riscv_vwaddu_wv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf2( @@ -75,7 +75,7 @@ vuint16mf2_t test_vwaddu_wv_u16mf2(vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wx_u16mf2(vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf2(op1, op2, vl); + return __riscv_vwaddu_wx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m1( @@ -84,7 +84,7 @@ vuint16mf2_t test_vwaddu_wx_u16mf2(vuint16mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vv_u16m1(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_vv_u16m1(op1, op2, vl); + return __riscv_vwaddu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m1( @@ -93,7 +93,7 @@ vuint16m1_t test_vwaddu_vv_u16m1(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vx_u16m1(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m1(op1, op2, vl); + return __riscv_vwaddu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m1( @@ -102,7 +102,7 @@ vuint16m1_t test_vwaddu_vx_u16m1(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wv_u16m1(vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_wv_u16m1(op1, op2, vl); + return __riscv_vwaddu_wv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m1( @@ -111,7 +111,7 @@ vuint16m1_t test_vwaddu_wv_u16m1(vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wx_u16m1(vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m1(op1, op2, vl); + return __riscv_vwaddu_wx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m2( @@ -120,7 +120,7 @@ vuint16m1_t test_vwaddu_wx_u16m1(vuint16m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vv_u16m2(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_vv_u16m2(op1, op2, vl); + return __riscv_vwaddu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m2( @@ -129,7 +129,7 @@ vuint16m2_t test_vwaddu_vv_u16m2(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vx_u16m2(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m2(op1, op2, vl); + return __riscv_vwaddu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m2( @@ -138,7 +138,7 @@ vuint16m2_t test_vwaddu_vx_u16m2(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wv_u16m2(vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_wv_u16m2(op1, op2, vl); + return __riscv_vwaddu_wv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m2( @@ -147,7 +147,7 @@ vuint16m2_t test_vwaddu_wv_u16m2(vuint16m2_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wx_u16m2(vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m2(op1, op2, vl); + return __riscv_vwaddu_wx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m4( @@ -156,7 +156,7 @@ vuint16m2_t test_vwaddu_wx_u16m2(vuint16m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vv_u16m4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_vv_u16m4(op1, op2, vl); + return __riscv_vwaddu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m4( @@ -165,7 +165,7 @@ vuint16m4_t test_vwaddu_vv_u16m4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vx_u16m4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m4(op1, op2, vl); + return __riscv_vwaddu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m4( @@ -174,7 +174,7 @@ vuint16m4_t test_vwaddu_vx_u16m4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wv_u16m4(vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_wv_u16m4(op1, op2, vl); + return __riscv_vwaddu_wv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m4( @@ -183,7 +183,7 @@ vuint16m4_t test_vwaddu_wv_u16m4(vuint16m4_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wx_u16m4(vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m4(op1, op2, vl); + return __riscv_vwaddu_wx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m8( @@ -192,7 +192,7 @@ vuint16m4_t test_vwaddu_wx_u16m4(vuint16m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vv_u16m8(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_vv_u16m8(op1, op2, vl); + return __riscv_vwaddu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m8( @@ -201,7 +201,7 @@ vuint16m8_t test_vwaddu_vv_u16m8(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vx_u16m8(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m8(op1, op2, vl); + return __riscv_vwaddu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m8( @@ -210,7 +210,7 @@ vuint16m8_t test_vwaddu_vx_u16m8(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wv_u16m8(vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_wv_u16m8(op1, op2, vl); + return __riscv_vwaddu_wv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m8( @@ -219,7 +219,7 @@ vuint16m8_t test_vwaddu_wv_u16m8(vuint16m8_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wx_u16m8(vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m8(op1, op2, vl); + return __riscv_vwaddu_wx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32mf2( @@ -228,7 +228,7 @@ vuint16m8_t test_vwaddu_wx_u16m8(vuint16m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vv_u32mf2(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_vv_u32mf2(op1, op2, vl); + return __riscv_vwaddu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32mf2( @@ -237,7 +237,7 @@ vuint32mf2_t test_vwaddu_vv_u32mf2(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vx_u32mf2(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32mf2(op1, op2, vl); + return __riscv_vwaddu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32mf2( @@ -246,7 +246,7 @@ vuint32mf2_t test_vwaddu_vx_u32mf2(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wv_u32mf2(vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_wv_u32mf2(op1, op2, vl); + return __riscv_vwaddu_wv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vwaddu_wv_u32mf2(vuint32mf2_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wx_u32mf2(vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32mf2(op1, op2, vl); + return __riscv_vwaddu_wx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vwaddu_wx_u32mf2(vuint32mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vv_u32m1(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_vv_u32m1(op1, op2, vl); + return __riscv_vwaddu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vwaddu_vv_u32m1(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vx_u32m1(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m1(op1, op2, vl); + return __riscv_vwaddu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m1( @@ -282,7 +282,7 @@ vuint32m1_t test_vwaddu_vx_u32m1(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wv_u32m1(vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_wv_u32m1(op1, op2, vl); + return __riscv_vwaddu_wv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m1( @@ -291,7 +291,7 @@ vuint32m1_t test_vwaddu_wv_u32m1(vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wx_u32m1(vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m1(op1, op2, vl); + return __riscv_vwaddu_wx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m2( @@ -300,7 +300,7 @@ vuint32m1_t test_vwaddu_wx_u32m1(vuint32m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vv_u32m2(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_vv_u32m2(op1, op2, vl); + return __riscv_vwaddu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m2( @@ -309,7 +309,7 @@ vuint32m2_t test_vwaddu_vv_u32m2(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vx_u32m2(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m2(op1, op2, vl); + return __riscv_vwaddu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m2( @@ -318,7 +318,7 @@ vuint32m2_t test_vwaddu_vx_u32m2(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wv_u32m2(vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_wv_u32m2(op1, op2, vl); + return __riscv_vwaddu_wv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m2( @@ -327,7 +327,7 @@ vuint32m2_t test_vwaddu_wv_u32m2(vuint32m2_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wx_u32m2(vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m2(op1, op2, vl); + return __riscv_vwaddu_wx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m4( @@ -336,7 +336,7 @@ vuint32m2_t test_vwaddu_wx_u32m2(vuint32m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vv_u32m4(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_vv_u32m4(op1, op2, vl); + return __riscv_vwaddu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m4( @@ -345,7 +345,7 @@ vuint32m4_t test_vwaddu_vv_u32m4(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vx_u32m4(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m4(op1, op2, vl); + return __riscv_vwaddu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m4( @@ -354,7 +354,7 @@ vuint32m4_t test_vwaddu_vx_u32m4(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wv_u32m4(vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_wv_u32m4(op1, op2, vl); + return __riscv_vwaddu_wv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m4( @@ -363,7 +363,7 @@ vuint32m4_t test_vwaddu_wv_u32m4(vuint32m4_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wx_u32m4(vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m4(op1, op2, vl); + return __riscv_vwaddu_wx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m8( @@ -372,7 +372,7 @@ vuint32m4_t test_vwaddu_wx_u32m4(vuint32m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vv_u32m8(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_vv_u32m8(op1, op2, vl); + return __riscv_vwaddu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m8( @@ -381,7 +381,7 @@ vuint32m8_t test_vwaddu_vv_u32m8(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vx_u32m8(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m8(op1, op2, vl); + return __riscv_vwaddu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m8( @@ -390,7 +390,7 @@ vuint32m8_t test_vwaddu_vx_u32m8(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wv_u32m8(vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_wv_u32m8(op1, op2, vl); + return __riscv_vwaddu_wv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m8( @@ -399,7 +399,7 @@ vuint32m8_t test_vwaddu_wv_u32m8(vuint32m8_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wx_u32m8(vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m8(op1, op2, vl); + return __riscv_vwaddu_wx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m1( @@ -408,7 +408,7 @@ vuint32m8_t test_vwaddu_wx_u32m8(vuint32m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vv_u64m1(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_vv_u64m1(op1, op2, vl); + return __riscv_vwaddu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m1( @@ -417,7 +417,7 @@ vuint64m1_t test_vwaddu_vv_u64m1(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vx_u64m1(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m1(op1, op2, vl); + return __riscv_vwaddu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m1( @@ -426,7 +426,7 @@ vuint64m1_t test_vwaddu_vx_u64m1(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wv_u64m1(vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_wv_u64m1(op1, op2, vl); + return __riscv_vwaddu_wv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m1( @@ -435,7 +435,7 @@ vuint64m1_t test_vwaddu_wv_u64m1(vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wx_u64m1(vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m1(op1, op2, vl); + return __riscv_vwaddu_wx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m2( @@ -444,7 +444,7 @@ vuint64m1_t test_vwaddu_wx_u64m1(vuint64m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vv_u64m2(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_vv_u64m2(op1, op2, vl); + return __riscv_vwaddu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m2( @@ -453,7 +453,7 @@ vuint64m2_t test_vwaddu_vv_u64m2(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vx_u64m2(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m2(op1, op2, vl); + return __riscv_vwaddu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m2( @@ -462,7 +462,7 @@ vuint64m2_t test_vwaddu_vx_u64m2(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wv_u64m2(vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_wv_u64m2(op1, op2, vl); + return __riscv_vwaddu_wv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m2( @@ -471,7 +471,7 @@ vuint64m2_t test_vwaddu_wv_u64m2(vuint64m2_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wx_u64m2(vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m2(op1, op2, vl); + return __riscv_vwaddu_wx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m4( @@ -480,7 +480,7 @@ vuint64m2_t test_vwaddu_wx_u64m2(vuint64m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vv_u64m4(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_vv_u64m4(op1, op2, vl); + return __riscv_vwaddu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m4( @@ -489,7 +489,7 @@ vuint64m4_t test_vwaddu_vv_u64m4(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vx_u64m4(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m4(op1, op2, vl); + return __riscv_vwaddu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m4( @@ -498,7 +498,7 @@ vuint64m4_t test_vwaddu_vx_u64m4(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wv_u64m4(vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_wv_u64m4(op1, op2, vl); + return __riscv_vwaddu_wv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m4( @@ -507,7 +507,7 @@ vuint64m4_t test_vwaddu_wv_u64m4(vuint64m4_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wx_u64m4(vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m4(op1, op2, vl); + return __riscv_vwaddu_wx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m8( @@ -516,7 +516,7 @@ vuint64m4_t test_vwaddu_wx_u64m4(vuint64m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vv_u64m8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_vv_u64m8(op1, op2, vl); + return __riscv_vwaddu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m8( @@ -525,7 +525,7 @@ vuint64m8_t test_vwaddu_vv_u64m8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vx_u64m8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m8(op1, op2, vl); + return __riscv_vwaddu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m8( @@ -534,7 +534,7 @@ vuint64m8_t test_vwaddu_vx_u64m8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wv_u64m8(vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_wv_u64m8(op1, op2, vl); + return __riscv_vwaddu_wv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m8( @@ -543,7 +543,7 @@ vuint64m8_t test_vwaddu_wv_u64m8(vuint64m8_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wx_u64m8(vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m8(op1, op2, vl); + return __riscv_vwaddu_wx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf4_m( @@ -552,7 +552,7 @@ vuint64m8_t test_vwaddu_wx_u64m8(vuint64m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vv_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf4_m( @@ -561,7 +561,7 @@ vuint16mf4_t test_vwaddu_vv_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vx_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf4_m( @@ -570,7 +570,7 @@ vuint16mf4_t test_vwaddu_vx_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_wv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf4_m( @@ -579,7 +579,7 @@ vuint16mf4_t test_vwaddu_wv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf2_m( @@ -588,7 +588,7 @@ vuint16mf4_t test_vwaddu_wx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vv_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf2_m( @@ -597,7 +597,7 @@ vuint16mf2_t test_vwaddu_vv_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vx_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf2_m( @@ -606,7 +606,7 @@ vuint16mf2_t test_vwaddu_vx_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_wv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf2_m( @@ -615,7 +615,7 @@ vuint16mf2_t test_vwaddu_wv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m1_m( @@ -624,7 +624,7 @@ vuint16mf2_t test_vwaddu_wx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vv_u16m1_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m1_m( @@ -633,7 +633,7 @@ vuint16m1_t test_vwaddu_vv_u16m1_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vx_u16m1_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m1_m( @@ -642,7 +642,7 @@ vuint16m1_t test_vwaddu_vx_u16m1_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_wv_u16m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m1_m( @@ -651,7 +651,7 @@ vuint16m1_t test_vwaddu_wv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m2_m( @@ -660,7 +660,7 @@ vuint16m1_t test_vwaddu_wx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vv_u16m2_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m2_m( @@ -669,7 +669,7 @@ vuint16m2_t test_vwaddu_vv_u16m2_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vx_u16m2_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m2_m( @@ -678,7 +678,7 @@ vuint16m2_t test_vwaddu_vx_u16m2_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_wv_u16m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m2_m( @@ -687,7 +687,7 @@ vuint16m2_t test_vwaddu_wv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m4_m( @@ -696,7 +696,7 @@ vuint16m2_t test_vwaddu_wx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vv_u16m4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m4_m( @@ -705,7 +705,7 @@ vuint16m4_t test_vwaddu_vv_u16m4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vx_u16m4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m4_m( @@ -714,7 +714,7 @@ vuint16m4_t test_vwaddu_vx_u16m4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_wv_u16m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m4_m( @@ -723,7 +723,7 @@ vuint16m4_t test_vwaddu_wv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m8_m( @@ -732,7 +732,7 @@ vuint16m4_t test_vwaddu_wx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vv_u16m8_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m8_m( @@ -741,7 +741,7 @@ vuint16m8_t test_vwaddu_vv_u16m8_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vx_u16m8_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m8_m( @@ -750,7 +750,7 @@ vuint16m8_t test_vwaddu_vx_u16m8_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_wv_u16m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m8_m( @@ -759,7 +759,7 @@ vuint16m8_t test_vwaddu_wv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32mf2_m( @@ -768,7 +768,7 @@ vuint16m8_t test_vwaddu_wx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vv_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32mf2_m( @@ -777,7 +777,7 @@ vuint32mf2_t test_vwaddu_vv_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vx_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32mf2_m( @@ -786,7 +786,7 @@ vuint32mf2_t test_vwaddu_vx_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_wv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32mf2_m( @@ -795,7 +795,7 @@ vuint32mf2_t test_vwaddu_wv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m1_m( @@ -804,7 +804,7 @@ vuint32mf2_t test_vwaddu_wx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vv_u32m1_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m1_m( @@ -813,7 +813,7 @@ vuint32m1_t test_vwaddu_vv_u32m1_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vx_u32m1_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m1_m( @@ -822,7 +822,7 @@ vuint32m1_t test_vwaddu_vx_u32m1_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_wv_u32m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m1_m( @@ -831,7 +831,7 @@ vuint32m1_t test_vwaddu_wv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m2_m( @@ -840,7 +840,7 @@ vuint32m1_t test_vwaddu_wx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vv_u32m2_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m2_m( @@ -849,7 +849,7 @@ vuint32m2_t test_vwaddu_vv_u32m2_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vx_u32m2_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m2_m( @@ -858,7 +858,7 @@ vuint32m2_t test_vwaddu_vx_u32m2_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_wv_u32m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m2_m( @@ -867,7 +867,7 @@ vuint32m2_t test_vwaddu_wv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m4_m( @@ -876,7 +876,7 @@ vuint32m2_t test_vwaddu_wx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vv_u32m4_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m4_m( @@ -885,7 +885,7 @@ vuint32m4_t test_vwaddu_vv_u32m4_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vx_u32m4_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m4_m( @@ -894,7 +894,7 @@ vuint32m4_t test_vwaddu_vx_u32m4_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_wv_u32m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m4_m( @@ -903,7 +903,7 @@ vuint32m4_t test_vwaddu_wv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m8_m( @@ -912,7 +912,7 @@ vuint32m4_t test_vwaddu_wx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vv_u32m8_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m8_m( @@ -921,7 +921,7 @@ vuint32m8_t test_vwaddu_vv_u32m8_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vx_u32m8_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m8_m( @@ -930,7 +930,7 @@ vuint32m8_t test_vwaddu_vx_u32m8_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_wv_u32m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m8_m( @@ -939,7 +939,7 @@ vuint32m8_t test_vwaddu_wv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m1_m( @@ -948,7 +948,7 @@ vuint32m8_t test_vwaddu_wx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vv_u64m1_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m1_m( @@ -957,7 +957,7 @@ vuint64m1_t test_vwaddu_vv_u64m1_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vx_u64m1_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m1_m( @@ -966,7 +966,7 @@ vuint64m1_t test_vwaddu_vx_u64m1_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_wv_u64m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m1_m( @@ -975,7 +975,7 @@ vuint64m1_t test_vwaddu_wv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m1_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m2_m( @@ -984,7 +984,7 @@ vuint64m1_t test_vwaddu_wx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vv_u64m2_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m2_m( @@ -993,7 +993,7 @@ vuint64m2_t test_vwaddu_vv_u64m2_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vx_u64m2_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m2_m( @@ -1002,7 +1002,7 @@ vuint64m2_t test_vwaddu_vx_u64m2_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_wv_u64m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m2_m( @@ -1011,7 +1011,7 @@ vuint64m2_t test_vwaddu_wv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m2_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m4_m( @@ -1020,7 +1020,7 @@ vuint64m2_t test_vwaddu_wx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vv_u64m4_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m4_m( @@ -1029,7 +1029,7 @@ vuint64m4_t test_vwaddu_vv_u64m4_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vx_u64m4_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m4_m( @@ -1038,7 +1038,7 @@ vuint64m4_t test_vwaddu_vx_u64m4_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_wv_u64m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m4_m( @@ -1047,7 +1047,7 @@ vuint64m4_t test_vwaddu_wv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m4_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m8_m( @@ -1056,7 +1056,7 @@ vuint64m4_t test_vwaddu_wx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vv_u64m8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m8_m( @@ -1065,7 +1065,7 @@ vuint64m8_t test_vwaddu_vv_u64m8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vx_u64m8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_vx_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m8_m( @@ -1074,7 +1074,7 @@ vuint64m8_t test_vwaddu_vx_u64m8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_wv_u64m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_wv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m8_m( @@ -1083,6 +1083,6 @@ vuint64m8_t test_vwaddu_wv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m8_m(mask, op1, op2, vl); + return __riscv_vwaddu_wx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwcvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwcvt.c index 41180bb393fb658d31f4e394b53a82cff76131a8..8495be0f20d6088a8c68b8f32752232bee3b9be5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwcvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwcvt.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwcvt_x_x_v_i16mf4(vint8mf8_t src, size_t vl) { - return vwcvt_x_x_v_i16mf4(src, vl); + return __riscv_vwcvt_x_x_v_i16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf2( @@ -21,7 +21,7 @@ vint16mf4_t test_vwcvt_x_x_v_i16mf4(vint8mf8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwcvt_x_x_v_i16mf2(vint8mf4_t src, size_t vl) { - return vwcvt_x_x_v_i16mf2(src, vl); + return __riscv_vwcvt_x_x_v_i16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m1( @@ -30,7 +30,7 @@ vint16mf2_t test_vwcvt_x_x_v_i16mf2(vint8mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwcvt_x_x_v_i16m1(vint8mf2_t src, size_t vl) { - return vwcvt_x_x_v_i16m1(src, vl); + return __riscv_vwcvt_x_x_v_i16m1(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m2( @@ -39,7 +39,7 @@ vint16m1_t test_vwcvt_x_x_v_i16m1(vint8mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwcvt_x_x_v_i16m2(vint8m1_t src, size_t vl) { - return vwcvt_x_x_v_i16m2(src, vl); + return __riscv_vwcvt_x_x_v_i16m2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m4( @@ -48,7 +48,7 @@ vint16m2_t test_vwcvt_x_x_v_i16m2(vint8m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwcvt_x_x_v_i16m4(vint8m2_t src, size_t vl) { - return vwcvt_x_x_v_i16m4(src, vl); + return __riscv_vwcvt_x_x_v_i16m4(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m8( @@ -57,7 +57,7 @@ vint16m4_t test_vwcvt_x_x_v_i16m4(vint8m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwcvt_x_x_v_i16m8(vint8m4_t src, size_t vl) { - return vwcvt_x_x_v_i16m8(src, vl); + return __riscv_vwcvt_x_x_v_i16m8(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32mf2( @@ -66,7 +66,7 @@ vint16m8_t test_vwcvt_x_x_v_i16m8(vint8m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwcvt_x_x_v_i32mf2(vint16mf4_t src, size_t vl) { - return vwcvt_x_x_v_i32mf2(src, vl); + return __riscv_vwcvt_x_x_v_i32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m1( @@ -75,7 +75,7 @@ vint32mf2_t test_vwcvt_x_x_v_i32mf2(vint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwcvt_x_x_v_i32m1(vint16mf2_t src, size_t vl) { - return vwcvt_x_x_v_i32m1(src, vl); + return __riscv_vwcvt_x_x_v_i32m1(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m2( @@ -84,7 +84,7 @@ vint32m1_t test_vwcvt_x_x_v_i32m1(vint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwcvt_x_x_v_i32m2(vint16m1_t src, size_t vl) { - return vwcvt_x_x_v_i32m2(src, vl); + return __riscv_vwcvt_x_x_v_i32m2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m4( @@ -93,7 +93,7 @@ vint32m2_t test_vwcvt_x_x_v_i32m2(vint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwcvt_x_x_v_i32m4(vint16m2_t src, size_t vl) { - return vwcvt_x_x_v_i32m4(src, vl); + return __riscv_vwcvt_x_x_v_i32m4(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m8( @@ -102,7 +102,7 @@ vint32m4_t test_vwcvt_x_x_v_i32m4(vint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwcvt_x_x_v_i32m8(vint16m4_t src, size_t vl) { - return vwcvt_x_x_v_i32m8(src, vl); + return __riscv_vwcvt_x_x_v_i32m8(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m1( @@ -111,7 +111,7 @@ vint32m8_t test_vwcvt_x_x_v_i32m8(vint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwcvt_x_x_v_i64m1(vint32mf2_t src, size_t vl) { - return vwcvt_x_x_v_i64m1(src, vl); + return __riscv_vwcvt_x_x_v_i64m1(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m2( @@ -120,7 +120,7 @@ vint64m1_t test_vwcvt_x_x_v_i64m1(vint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwcvt_x_x_v_i64m2(vint32m1_t src, size_t vl) { - return vwcvt_x_x_v_i64m2(src, vl); + return __riscv_vwcvt_x_x_v_i64m2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m4( @@ -129,7 +129,7 @@ vint64m2_t test_vwcvt_x_x_v_i64m2(vint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwcvt_x_x_v_i64m4(vint32m2_t src, size_t vl) { - return vwcvt_x_x_v_i64m4(src, vl); + return __riscv_vwcvt_x_x_v_i64m4(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m8( @@ -138,7 +138,7 @@ vint64m4_t test_vwcvt_x_x_v_i64m4(vint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwcvt_x_x_v_i64m8(vint32m4_t src, size_t vl) { - return vwcvt_x_x_v_i64m8(src, vl); + return __riscv_vwcvt_x_x_v_i64m8(src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf4_m( @@ -147,7 +147,7 @@ vint64m8_t test_vwcvt_x_x_v_i64m8(vint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwcvt_x_x_v_i16mf4_m(vbool64_t mask, vint8mf8_t src, size_t vl) { - return vwcvt_x_x_v_i16mf4_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf2_m( @@ -156,7 +156,7 @@ vint16mf4_t test_vwcvt_x_x_v_i16mf4_m(vbool64_t mask, vint8mf8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwcvt_x_x_v_i16mf2_m(vbool32_t mask, vint8mf4_t src, size_t vl) { - return vwcvt_x_x_v_i16mf2_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m1_m( @@ -165,7 +165,7 @@ vint16mf2_t test_vwcvt_x_x_v_i16mf2_m(vbool32_t mask, vint8mf4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwcvt_x_x_v_i16m1_m(vbool16_t mask, vint8mf2_t src, size_t vl) { - return vwcvt_x_x_v_i16m1_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m2_m( @@ -174,7 +174,7 @@ vint16m1_t test_vwcvt_x_x_v_i16m1_m(vbool16_t mask, vint8mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwcvt_x_x_v_i16m2_m(vbool8_t mask, vint8m1_t src, size_t vl) { - return vwcvt_x_x_v_i16m2_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m4_m( @@ -183,7 +183,7 @@ vint16m2_t test_vwcvt_x_x_v_i16m2_m(vbool8_t mask, vint8m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwcvt_x_x_v_i16m4_m(vbool4_t mask, vint8m2_t src, size_t vl) { - return vwcvt_x_x_v_i16m4_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m8_m( @@ -192,7 +192,7 @@ vint16m4_t test_vwcvt_x_x_v_i16m4_m(vbool4_t mask, vint8m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwcvt_x_x_v_i16m8_m(vbool2_t mask, vint8m4_t src, size_t vl) { - return vwcvt_x_x_v_i16m8_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32mf2_m( @@ -201,7 +201,7 @@ vint16m8_t test_vwcvt_x_x_v_i16m8_m(vbool2_t mask, vint8m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwcvt_x_x_v_i32mf2_m(vbool64_t mask, vint16mf4_t src, size_t vl) { - return vwcvt_x_x_v_i32mf2_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m1_m( @@ -210,7 +210,7 @@ vint32mf2_t test_vwcvt_x_x_v_i32mf2_m(vbool64_t mask, vint16mf4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwcvt_x_x_v_i32m1_m(vbool32_t mask, vint16mf2_t src, size_t vl) { - return vwcvt_x_x_v_i32m1_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m2_m( @@ -219,7 +219,7 @@ vint32m1_t test_vwcvt_x_x_v_i32m1_m(vbool32_t mask, vint16mf2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwcvt_x_x_v_i32m2_m(vbool16_t mask, vint16m1_t src, size_t vl) { - return vwcvt_x_x_v_i32m2_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m4_m( @@ -228,7 +228,7 @@ vint32m2_t test_vwcvt_x_x_v_i32m2_m(vbool16_t mask, vint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwcvt_x_x_v_i32m4_m(vbool8_t mask, vint16m2_t src, size_t vl) { - return vwcvt_x_x_v_i32m4_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m8_m( @@ -237,7 +237,7 @@ vint32m4_t test_vwcvt_x_x_v_i32m4_m(vbool8_t mask, vint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwcvt_x_x_v_i32m8_m(vbool4_t mask, vint16m4_t src, size_t vl) { - return vwcvt_x_x_v_i32m8_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m1_m( @@ -246,7 +246,7 @@ vint32m8_t test_vwcvt_x_x_v_i32m8_m(vbool4_t mask, vint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwcvt_x_x_v_i64m1_m(vbool64_t mask, vint32mf2_t src, size_t vl) { - return vwcvt_x_x_v_i64m1_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m2_m( @@ -255,7 +255,7 @@ vint64m1_t test_vwcvt_x_x_v_i64m1_m(vbool64_t mask, vint32mf2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwcvt_x_x_v_i64m2_m(vbool32_t mask, vint32m1_t src, size_t vl) { - return vwcvt_x_x_v_i64m2_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m4_m( @@ -264,7 +264,7 @@ vint64m2_t test_vwcvt_x_x_v_i64m2_m(vbool32_t mask, vint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwcvt_x_x_v_i64m4_m(vbool16_t mask, vint32m2_t src, size_t vl) { - return vwcvt_x_x_v_i64m4_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m8_m( @@ -273,6 +273,6 @@ vint64m4_t test_vwcvt_x_x_v_i64m4_m(vbool16_t mask, vint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwcvt_x_x_v_i64m8_m(vbool8_t mask, vint32m4_t src, size_t vl) { - return vwcvt_x_x_v_i64m8_m(mask, src, vl); + return __riscv_vwcvt_x_x_v_i64m8_m(mask, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwcvtu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwcvtu.c index a076f6aeeb9399b1ae33cc0bc480452cbd5dc754..68603b8bed8307ec77a3a5b9105187cdba8d4cc9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwcvtu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwcvtu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwcvtu_x_x_v_u16mf4(vuint8mf8_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf4(src, vl); + return __riscv_vwcvtu_x_x_v_u16mf4(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf2( @@ -21,7 +21,7 @@ vuint16mf4_t test_vwcvtu_x_x_v_u16mf4(vuint8mf8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwcvtu_x_x_v_u16mf2(vuint8mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf2(src, vl); + return __riscv_vwcvtu_x_x_v_u16mf2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m1( @@ -30,7 +30,7 @@ vuint16mf2_t test_vwcvtu_x_x_v_u16mf2(vuint8mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwcvtu_x_x_v_u16m1(vuint8mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m1(src, vl); + return __riscv_vwcvtu_x_x_v_u16m1(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m2( @@ -39,7 +39,7 @@ vuint16m1_t test_vwcvtu_x_x_v_u16m1(vuint8mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwcvtu_x_x_v_u16m2(vuint8m1_t src, size_t vl) { - return vwcvtu_x_x_v_u16m2(src, vl); + return __riscv_vwcvtu_x_x_v_u16m2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m4( @@ -48,7 +48,7 @@ vuint16m2_t test_vwcvtu_x_x_v_u16m2(vuint8m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwcvtu_x_x_v_u16m4(vuint8m2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m4(src, vl); + return __riscv_vwcvtu_x_x_v_u16m4(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m8( @@ -57,7 +57,7 @@ vuint16m4_t test_vwcvtu_x_x_v_u16m4(vuint8m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwcvtu_x_x_v_u16m8(vuint8m4_t src, size_t vl) { - return vwcvtu_x_x_v_u16m8(src, vl); + return __riscv_vwcvtu_x_x_v_u16m8(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32mf2( @@ -66,7 +66,7 @@ vuint16m8_t test_vwcvtu_x_x_v_u16m8(vuint8m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwcvtu_x_x_v_u32mf2(vuint16mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u32mf2(src, vl); + return __riscv_vwcvtu_x_x_v_u32mf2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m1( @@ -75,7 +75,7 @@ vuint32mf2_t test_vwcvtu_x_x_v_u32mf2(vuint16mf4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwcvtu_x_x_v_u32m1(vuint16mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m1(src, vl); + return __riscv_vwcvtu_x_x_v_u32m1(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m2( @@ -84,7 +84,7 @@ vuint32m1_t test_vwcvtu_x_x_v_u32m1(vuint16mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwcvtu_x_x_v_u32m2(vuint16m1_t src, size_t vl) { - return vwcvtu_x_x_v_u32m2(src, vl); + return __riscv_vwcvtu_x_x_v_u32m2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m4( @@ -93,7 +93,7 @@ vuint32m2_t test_vwcvtu_x_x_v_u32m2(vuint16m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwcvtu_x_x_v_u32m4(vuint16m2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m4(src, vl); + return __riscv_vwcvtu_x_x_v_u32m4(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m8( @@ -102,7 +102,7 @@ vuint32m4_t test_vwcvtu_x_x_v_u32m4(vuint16m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwcvtu_x_x_v_u32m8(vuint16m4_t src, size_t vl) { - return vwcvtu_x_x_v_u32m8(src, vl); + return __riscv_vwcvtu_x_x_v_u32m8(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m1( @@ -111,7 +111,7 @@ vuint32m8_t test_vwcvtu_x_x_v_u32m8(vuint16m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwcvtu_x_x_v_u64m1(vuint32mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m1(src, vl); + return __riscv_vwcvtu_x_x_v_u64m1(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m2( @@ -120,7 +120,7 @@ vuint64m1_t test_vwcvtu_x_x_v_u64m1(vuint32mf2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwcvtu_x_x_v_u64m2(vuint32m1_t src, size_t vl) { - return vwcvtu_x_x_v_u64m2(src, vl); + return __riscv_vwcvtu_x_x_v_u64m2(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m4( @@ -129,7 +129,7 @@ vuint64m2_t test_vwcvtu_x_x_v_u64m2(vuint32m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwcvtu_x_x_v_u64m4(vuint32m2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m4(src, vl); + return __riscv_vwcvtu_x_x_v_u64m4(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m8( @@ -138,7 +138,7 @@ vuint64m4_t test_vwcvtu_x_x_v_u64m4(vuint32m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwcvtu_x_x_v_u64m8(vuint32m4_t src, size_t vl) { - return vwcvtu_x_x_v_u64m8(src, vl); + return __riscv_vwcvtu_x_x_v_u64m8(src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf4_m( @@ -147,7 +147,7 @@ vuint64m8_t test_vwcvtu_x_x_v_u64m8(vuint32m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_m(vbool64_t mask, vuint8mf8_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf4_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf2_m( @@ -156,7 +156,7 @@ vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_m(vbool64_t mask, vuint8mf8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_m(vbool32_t mask, vuint8mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf2_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m1_m( @@ -165,7 +165,7 @@ vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_m(vbool32_t mask, vuint8mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwcvtu_x_x_v_u16m1_m(vbool16_t mask, vuint8mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m1_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u16m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m2_m( @@ -174,7 +174,7 @@ vuint16m1_t test_vwcvtu_x_x_v_u16m1_m(vbool16_t mask, vuint8mf2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwcvtu_x_x_v_u16m2_m(vbool8_t mask, vuint8m1_t src, size_t vl) { - return vwcvtu_x_x_v_u16m2_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u16m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m4_m( @@ -183,7 +183,7 @@ vuint16m2_t test_vwcvtu_x_x_v_u16m2_m(vbool8_t mask, vuint8m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwcvtu_x_x_v_u16m4_m(vbool4_t mask, vuint8m2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m4_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u16m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m8_m( @@ -192,7 +192,7 @@ vuint16m4_t test_vwcvtu_x_x_v_u16m4_m(vbool4_t mask, vuint8m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwcvtu_x_x_v_u16m8_m(vbool2_t mask, vuint8m4_t src, size_t vl) { - return vwcvtu_x_x_v_u16m8_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u16m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32mf2_m( @@ -201,7 +201,7 @@ vuint16m8_t test_vwcvtu_x_x_v_u16m8_m(vbool2_t mask, vuint8m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_m(vbool64_t mask, vuint16mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u32mf2_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u32mf2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m1_m( @@ -210,7 +210,7 @@ vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_m(vbool64_t mask, vuint16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwcvtu_x_x_v_u32m1_m(vbool32_t mask, vuint16mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m1_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u32m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m2_m( @@ -219,7 +219,7 @@ vuint32m1_t test_vwcvtu_x_x_v_u32m1_m(vbool32_t mask, vuint16mf2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwcvtu_x_x_v_u32m2_m(vbool16_t mask, vuint16m1_t src, size_t vl) { - return vwcvtu_x_x_v_u32m2_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u32m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m4_m( @@ -228,7 +228,7 @@ vuint32m2_t test_vwcvtu_x_x_v_u32m2_m(vbool16_t mask, vuint16m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwcvtu_x_x_v_u32m4_m(vbool8_t mask, vuint16m2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m4_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u32m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m8_m( @@ -237,7 +237,7 @@ vuint32m4_t test_vwcvtu_x_x_v_u32m4_m(vbool8_t mask, vuint16m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwcvtu_x_x_v_u32m8_m(vbool4_t mask, vuint16m4_t src, size_t vl) { - return vwcvtu_x_x_v_u32m8_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u32m8_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m1_m( @@ -246,7 +246,7 @@ vuint32m8_t test_vwcvtu_x_x_v_u32m8_m(vbool4_t mask, vuint16m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwcvtu_x_x_v_u64m1_m(vbool64_t mask, vuint32mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m1_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u64m1_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m2_m( @@ -255,7 +255,7 @@ vuint64m1_t test_vwcvtu_x_x_v_u64m1_m(vbool64_t mask, vuint32mf2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwcvtu_x_x_v_u64m2_m(vbool32_t mask, vuint32m1_t src, size_t vl) { - return vwcvtu_x_x_v_u64m2_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u64m2_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m4_m( @@ -264,7 +264,7 @@ vuint64m2_t test_vwcvtu_x_x_v_u64m2_m(vbool32_t mask, vuint32m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwcvtu_x_x_v_u64m4_m(vbool16_t mask, vuint32m2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m4_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u64m4_m(mask, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m8_m( @@ -273,6 +273,6 @@ vuint64m4_t test_vwcvtu_x_x_v_u64m4_m(vbool16_t mask, vuint32m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwcvtu_x_x_v_u64m8_m(vbool8_t mask, vuint32m4_t src, size_t vl) { - return vwcvtu_x_x_v_u64m8_m(mask, src, vl); + return __riscv_vwcvtu_x_x_v_u64m8_m(mask, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmacc.c index 4c6a796a6e5ab2a1b5a68c5d8aacfe5463acfc4b..d56952b038547fe3575da1aab6a1a31b4a204227 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vv_i16mf4(vint16mf4_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vv_i16mf4(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf4( @@ -22,7 +22,7 @@ vint16mf4_t test_vwmacc_vv_i16mf4(vint16mf4_t vd, vint8mf8_t vs1, vint8mf8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vx_i16mf4(vint16mf4_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vx_i16mf4(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf2( @@ -31,7 +31,7 @@ vint16mf4_t test_vwmacc_vx_i16mf4(vint16mf4_t vd, int8_t rs1, vint8mf8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vv_i16mf2(vint16mf2_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vv_i16mf2(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf2( @@ -40,7 +40,7 @@ vint16mf2_t test_vwmacc_vv_i16mf2(vint16mf2_t vd, vint8mf4_t vs1, vint8mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vx_i16mf2(vint16mf2_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vx_i16mf2(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m1( @@ -49,7 +49,7 @@ vint16mf2_t test_vwmacc_vx_i16mf2(vint16mf2_t vd, int8_t rs1, vint8mf4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vv_i16m1(vint16m1_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vv_i16m1(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m1( @@ -58,7 +58,7 @@ vint16m1_t test_vwmacc_vv_i16m1(vint16m1_t vd, vint8mf2_t vs1, vint8mf2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vx_i16m1(vint16m1_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vx_i16m1(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m2( @@ -67,7 +67,7 @@ vint16m1_t test_vwmacc_vx_i16m1(vint16m1_t vd, int8_t rs1, vint8mf2_t vs2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vv_i16m2(vint16m2_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vv_i16m2(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m2( @@ -76,7 +76,7 @@ vint16m2_t test_vwmacc_vv_i16m2(vint16m2_t vd, vint8m1_t vs1, vint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vx_i16m2(vint16m2_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vx_i16m2(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m4( @@ -85,7 +85,7 @@ vint16m2_t test_vwmacc_vx_i16m2(vint16m2_t vd, int8_t rs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vv_i16m4(vint16m4_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vv_i16m4(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m4( @@ -94,7 +94,7 @@ vint16m4_t test_vwmacc_vv_i16m4(vint16m4_t vd, vint8m2_t vs1, vint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vx_i16m4(vint16m4_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vx_i16m4(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m8( @@ -103,7 +103,7 @@ vint16m4_t test_vwmacc_vx_i16m4(vint16m4_t vd, int8_t rs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vv_i16m8(vint16m8_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vv_i16m8(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m8( @@ -112,7 +112,7 @@ vint16m8_t test_vwmacc_vv_i16m8(vint16m8_t vd, vint8m4_t vs1, vint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vx_i16m8(vint16m8_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vx_i16m8(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32mf2( @@ -121,7 +121,7 @@ vint16m8_t test_vwmacc_vx_i16m8(vint16m8_t vd, int8_t rs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vv_i32mf2(vint32mf2_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vv_i32mf2(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32mf2( @@ -130,7 +130,7 @@ vint32mf2_t test_vwmacc_vv_i32mf2(vint32mf2_t vd, vint16mf4_t vs1, vint16mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vx_i32mf2(vint32mf2_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vx_i32mf2(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m1( @@ -139,7 +139,7 @@ vint32mf2_t test_vwmacc_vx_i32mf2(vint32mf2_t vd, int16_t rs1, vint16mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vv_i32m1(vint32m1_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vv_i32m1(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m1( @@ -148,7 +148,7 @@ vint32m1_t test_vwmacc_vv_i32m1(vint32m1_t vd, vint16mf2_t vs1, vint16mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vx_i32m1(vint32m1_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vx_i32m1(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m2( @@ -157,7 +157,7 @@ vint32m1_t test_vwmacc_vx_i32m1(vint32m1_t vd, int16_t rs1, vint16mf2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vv_i32m2(vint32m2_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vv_i32m2(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m2( @@ -166,7 +166,7 @@ vint32m2_t test_vwmacc_vv_i32m2(vint32m2_t vd, vint16m1_t vs1, vint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vx_i32m2(vint32m2_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vx_i32m2(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m4( @@ -175,7 +175,7 @@ vint32m2_t test_vwmacc_vx_i32m2(vint32m2_t vd, int16_t rs1, vint16m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vv_i32m4(vint32m4_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vv_i32m4(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m4( @@ -184,7 +184,7 @@ vint32m4_t test_vwmacc_vv_i32m4(vint32m4_t vd, vint16m2_t vs1, vint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vx_i32m4(vint32m4_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vx_i32m4(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m8( @@ -193,7 +193,7 @@ vint32m4_t test_vwmacc_vx_i32m4(vint32m4_t vd, int16_t rs1, vint16m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vv_i32m8(vint32m8_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vv_i32m8(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m8( @@ -202,7 +202,7 @@ vint32m8_t test_vwmacc_vv_i32m8(vint32m8_t vd, vint16m4_t vs1, vint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vx_i32m8(vint32m8_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vx_i32m8(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m1( @@ -211,7 +211,7 @@ vint32m8_t test_vwmacc_vx_i32m8(vint32m8_t vd, int16_t rs1, vint16m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vv_i64m1(vint64m1_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vv_i64m1(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m1( @@ -220,7 +220,7 @@ vint64m1_t test_vwmacc_vv_i64m1(vint64m1_t vd, vint32mf2_t vs1, vint32mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vx_i64m1(vint64m1_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vx_i64m1(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m2( @@ -229,7 +229,7 @@ vint64m1_t test_vwmacc_vx_i64m1(vint64m1_t vd, int32_t rs1, vint32mf2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vv_i64m2(vint64m2_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vv_i64m2(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m2( @@ -238,7 +238,7 @@ vint64m2_t test_vwmacc_vv_i64m2(vint64m2_t vd, vint32m1_t vs1, vint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vx_i64m2(vint64m2_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vx_i64m2(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m4( @@ -247,7 +247,7 @@ vint64m2_t test_vwmacc_vx_i64m2(vint64m2_t vd, int32_t rs1, vint32m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vv_i64m4(vint64m4_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vv_i64m4(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m4( @@ -256,7 +256,7 @@ vint64m4_t test_vwmacc_vv_i64m4(vint64m4_t vd, vint32m2_t vs1, vint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vx_i64m4(vint64m4_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vx_i64m4(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m8( @@ -265,7 +265,7 @@ vint64m4_t test_vwmacc_vx_i64m4(vint64m4_t vd, int32_t rs1, vint32m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vv_i64m8(vint64m8_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vv_i64m8(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m8( @@ -274,7 +274,7 @@ vint64m8_t test_vwmacc_vv_i64m8(vint64m8_t vd, vint32m4_t vs1, vint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vx_i64m8(vint64m8_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vx_i64m8(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf4_m( @@ -283,7 +283,7 @@ vint64m8_t test_vwmacc_vx_i64m8(vint64m8_t vd, int32_t rs1, vint32m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vv_i16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf4_m( @@ -292,7 +292,7 @@ vint16mf4_t test_vwmacc_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vx_i16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf2_m( @@ -301,7 +301,7 @@ vint16mf4_t test_vwmacc_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vv_i16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf2_m( @@ -310,7 +310,7 @@ vint16mf2_t test_vwmacc_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vx_i16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m1_m( @@ -319,7 +319,7 @@ vint16mf2_t test_vwmacc_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vv_i16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m1_m( @@ -328,7 +328,7 @@ vint16m1_t test_vwmacc_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vx_i16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m2_m( @@ -337,7 +337,7 @@ vint16m1_t test_vwmacc_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vv_i16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m2_m( @@ -346,7 +346,7 @@ vint16m2_t test_vwmacc_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vx_i16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m4_m( @@ -355,7 +355,7 @@ vint16m2_t test_vwmacc_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vv_i16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m4_m( @@ -364,7 +364,7 @@ vint16m4_t test_vwmacc_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vx_i16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m8_m( @@ -373,7 +373,7 @@ vint16m4_t test_vwmacc_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vv_i16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m8_m( @@ -382,7 +382,7 @@ vint16m8_t test_vwmacc_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vx_i16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32mf2_m( @@ -391,7 +391,7 @@ vint16m8_t test_vwmacc_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vv_i32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32mf2_m( @@ -400,7 +400,7 @@ vint32mf2_t test_vwmacc_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vx_i32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m1_m( @@ -409,7 +409,7 @@ vint32mf2_t test_vwmacc_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vv_i32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m1_m( @@ -418,7 +418,7 @@ vint32m1_t test_vwmacc_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vx_i32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m2_m( @@ -427,7 +427,7 @@ vint32m1_t test_vwmacc_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vv_i32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m2_m( @@ -436,7 +436,7 @@ vint32m2_t test_vwmacc_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vx_i32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m4_m( @@ -445,7 +445,7 @@ vint32m2_t test_vwmacc_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vv_i32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m4_m( @@ -454,7 +454,7 @@ vint32m4_t test_vwmacc_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vx_i32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m8_m( @@ -463,7 +463,7 @@ vint32m4_t test_vwmacc_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vv_i32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m8_m( @@ -472,7 +472,7 @@ vint32m8_t test_vwmacc_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vx_i32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m1_m( @@ -481,7 +481,7 @@ vint32m8_t test_vwmacc_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vv_i64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m1_m( @@ -490,7 +490,7 @@ vint64m1_t test_vwmacc_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vx_i64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m2_m( @@ -499,7 +499,7 @@ vint64m1_t test_vwmacc_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vv_i64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m2_m( @@ -508,7 +508,7 @@ vint64m2_t test_vwmacc_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vx_i64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m4_m( @@ -517,7 +517,7 @@ vint64m2_t test_vwmacc_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vv_i64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m4_m( @@ -526,7 +526,7 @@ vint64m4_t test_vwmacc_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vx_i64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m8_m( @@ -535,7 +535,7 @@ vint64m4_t test_vwmacc_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vv_i64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m8_m( @@ -544,6 +544,6 @@ vint64m8_t test_vwmacc_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vx_i64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccsu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccsu.c index 4fe18b19aa1cf7fc65c468397daee39e190075e9..4a21eeeea274107f9f5871fcaf03c32e64a7f1dc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccsu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccsu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vv_i16mf4(vint16mf4_t vd, vint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf4(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf4( @@ -22,7 +22,7 @@ vint16mf4_t test_vwmaccsu_vv_i16mf4(vint16mf4_t vd, vint8mf8_t vs1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vx_i16mf4(vint16mf4_t vd, int8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf4(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf2( @@ -31,7 +31,7 @@ vint16mf4_t test_vwmaccsu_vx_i16mf4(vint16mf4_t vd, int8_t rs1, vuint8mf8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vv_i16mf2(vint16mf2_t vd, vint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf2(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf2( @@ -40,7 +40,7 @@ vint16mf2_t test_vwmaccsu_vv_i16mf2(vint16mf2_t vd, vint8mf4_t vs1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vx_i16mf2(vint16mf2_t vd, int8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf2(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m1( @@ -49,7 +49,7 @@ vint16mf2_t test_vwmaccsu_vx_i16mf2(vint16mf2_t vd, int8_t rs1, vuint8mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vv_i16m1(vint16m1_t vd, vint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m1(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m1( @@ -58,7 +58,7 @@ vint16m1_t test_vwmaccsu_vv_i16m1(vint16m1_t vd, vint8mf2_t vs1, vuint8mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vx_i16m1(vint16m1_t vd, int8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m1(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m2( @@ -67,7 +67,7 @@ vint16m1_t test_vwmaccsu_vx_i16m1(vint16m1_t vd, int8_t rs1, vuint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vv_i16m2(vint16m2_t vd, vint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vv_i16m2(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m2( @@ -76,7 +76,7 @@ vint16m2_t test_vwmaccsu_vv_i16m2(vint16m2_t vd, vint8m1_t vs1, vuint8m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vx_i16m2(vint16m2_t vd, int8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vx_i16m2(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m4( @@ -85,7 +85,7 @@ vint16m2_t test_vwmaccsu_vx_i16m2(vint16m2_t vd, int8_t rs1, vuint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vv_i16m4(vint16m4_t vd, vint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m4(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m4( @@ -94,7 +94,7 @@ vint16m4_t test_vwmaccsu_vv_i16m4(vint16m4_t vd, vint8m2_t vs1, vuint8m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vx_i16m4(vint16m4_t vd, int8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m4(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m8( @@ -103,7 +103,7 @@ vint16m4_t test_vwmaccsu_vx_i16m4(vint16m4_t vd, int8_t rs1, vuint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vv_i16m8(vint16m8_t vd, vint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vv_i16m8(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m8( @@ -112,7 +112,7 @@ vint16m8_t test_vwmaccsu_vv_i16m8(vint16m8_t vd, vint8m4_t vs1, vuint8m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vx_i16m8(vint16m8_t vd, int8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vx_i16m8(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32mf2( @@ -121,7 +121,7 @@ vint16m8_t test_vwmaccsu_vx_i16m8(vint16m8_t vd, int8_t rs1, vuint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vv_i32mf2(vint32mf2_t vd, vint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i32mf2(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32mf2( @@ -130,7 +130,7 @@ vint32mf2_t test_vwmaccsu_vv_i32mf2(vint32mf2_t vd, vint16mf4_t vs1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vx_i32mf2(vint32mf2_t vd, int16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i32mf2(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m1( @@ -139,7 +139,7 @@ vint32mf2_t test_vwmaccsu_vx_i32mf2(vint32mf2_t vd, int16_t rs1, vuint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vv_i32m1(vint32m1_t vd, vint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m1(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m1( @@ -148,7 +148,7 @@ vint32m1_t test_vwmaccsu_vv_i32m1(vint32m1_t vd, vint16mf2_t vs1, vuint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vx_i32m1(vint32m1_t vd, int16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m1(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m2( @@ -157,7 +157,7 @@ vint32m1_t test_vwmaccsu_vx_i32m1(vint32m1_t vd, int16_t rs1, vuint16mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vv_i32m2(vint32m2_t vd, vint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vv_i32m2(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m2( @@ -166,7 +166,7 @@ vint32m2_t test_vwmaccsu_vv_i32m2(vint32m2_t vd, vint16m1_t vs1, vuint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vx_i32m2(vint32m2_t vd, int16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vx_i32m2(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m4( @@ -175,7 +175,7 @@ vint32m2_t test_vwmaccsu_vx_i32m2(vint32m2_t vd, int16_t rs1, vuint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vv_i32m4(vint32m4_t vd, vint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m4(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m4( @@ -184,7 +184,7 @@ vint32m4_t test_vwmaccsu_vv_i32m4(vint32m4_t vd, vint16m2_t vs1, vuint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vx_i32m4(vint32m4_t vd, int16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m4(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m8( @@ -193,7 +193,7 @@ vint32m4_t test_vwmaccsu_vx_i32m4(vint32m4_t vd, int16_t rs1, vuint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vv_i32m8(vint32m8_t vd, vint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vv_i32m8(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m8( @@ -202,7 +202,7 @@ vint32m8_t test_vwmaccsu_vv_i32m8(vint32m8_t vd, vint16m4_t vs1, vuint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vx_i32m8(vint32m8_t vd, int16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vx_i32m8(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m1( @@ -211,7 +211,7 @@ vint32m8_t test_vwmaccsu_vx_i32m8(vint32m8_t vd, int16_t rs1, vuint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vv_i64m1(vint64m1_t vd, vint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m1(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m1( @@ -220,7 +220,7 @@ vint64m1_t test_vwmaccsu_vv_i64m1(vint64m1_t vd, vint32mf2_t vs1, vuint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vx_i64m1(vint64m1_t vd, int32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m1(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m2( @@ -229,7 +229,7 @@ vint64m1_t test_vwmaccsu_vx_i64m1(vint64m1_t vd, int32_t rs1, vuint32mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vv_i64m2(vint64m2_t vd, vint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vv_i64m2(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m2( @@ -238,7 +238,7 @@ vint64m2_t test_vwmaccsu_vv_i64m2(vint64m2_t vd, vint32m1_t vs1, vuint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vx_i64m2(vint64m2_t vd, int32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vx_i64m2(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m4( @@ -247,7 +247,7 @@ vint64m2_t test_vwmaccsu_vx_i64m2(vint64m2_t vd, int32_t rs1, vuint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vv_i64m4(vint64m4_t vd, vint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m4(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m4( @@ -256,7 +256,7 @@ vint64m4_t test_vwmaccsu_vv_i64m4(vint64m4_t vd, vint32m2_t vs1, vuint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vx_i64m4(vint64m4_t vd, int32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m4(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m8( @@ -265,7 +265,7 @@ vint64m4_t test_vwmaccsu_vx_i64m4(vint64m4_t vd, int32_t rs1, vuint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vv_i64m8(vint64m8_t vd, vint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vv_i64m8(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m8( @@ -274,7 +274,7 @@ vint64m8_t test_vwmaccsu_vv_i64m8(vint64m8_t vd, vint32m4_t vs1, vuint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vx_i64m8(vint64m8_t vd, int32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vx_i64m8(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf4_m( @@ -283,7 +283,7 @@ vint64m8_t test_vwmaccsu_vx_i64m8(vint64m8_t vd, int32_t rs1, vuint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf4_m( @@ -292,7 +292,7 @@ vint16mf4_t test_vwmaccsu_vv_i16mf4_m(vbool64_t mask, vint16mf4_t vd, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf2_m( @@ -301,7 +301,7 @@ vint16mf4_t test_vwmaccsu_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, int8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf2_m( @@ -310,7 +310,7 @@ vint16mf2_t test_vwmaccsu_vv_i16mf2_m(vbool32_t mask, vint16mf2_t vd, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m1_m( @@ -319,7 +319,7 @@ vint16mf2_t test_vwmaccsu_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, int8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m1_m( @@ -328,7 +328,7 @@ vint16m1_t test_vwmaccsu_vv_i16m1_m(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m2_m( @@ -337,7 +337,7 @@ vint16m1_t test_vwmaccsu_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vv_i16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m2_m( @@ -346,7 +346,7 @@ vint16m2_t test_vwmaccsu_vv_i16m2_m(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vx_i16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m4_m( @@ -355,7 +355,7 @@ vint16m2_t test_vwmaccsu_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, int8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m4_m( @@ -364,7 +364,7 @@ vint16m4_t test_vwmaccsu_vv_i16m4_m(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m8_m( @@ -373,7 +373,7 @@ vint16m4_t test_vwmaccsu_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, int8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vv_i16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m8_m( @@ -382,7 +382,7 @@ vint16m8_t test_vwmaccsu_vv_i16m8_m(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vx_i16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32mf2_m( @@ -391,7 +391,7 @@ vint16m8_t test_vwmaccsu_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, int8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32mf2_m( @@ -400,7 +400,7 @@ vint32mf2_t test_vwmaccsu_vv_i32mf2_m(vbool64_t mask, vint32mf2_t vd, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m1_m( @@ -409,7 +409,7 @@ vint32mf2_t test_vwmaccsu_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m1_m( @@ -418,7 +418,7 @@ vint32m1_t test_vwmaccsu_vv_i32m1_m(vbool32_t mask, vint32m1_t vd, vint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m2_m( @@ -427,7 +427,7 @@ vint32m1_t test_vwmaccsu_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vv_i32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m2_m( @@ -436,7 +436,7 @@ vint32m2_t test_vwmaccsu_vv_i32m2_m(vbool16_t mask, vint32m2_t vd, vint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vx_i32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m4_m( @@ -445,7 +445,7 @@ vint32m2_t test_vwmaccsu_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m4_m( @@ -454,7 +454,7 @@ vint32m4_t test_vwmaccsu_vv_i32m4_m(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m8_m( @@ -463,7 +463,7 @@ vint32m4_t test_vwmaccsu_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vv_i32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m8_m( @@ -472,7 +472,7 @@ vint32m8_t test_vwmaccsu_vv_i32m8_m(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vx_i32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m1_m( @@ -481,7 +481,7 @@ vint32m8_t test_vwmaccsu_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m1_m( @@ -490,7 +490,7 @@ vint64m1_t test_vwmaccsu_vv_i64m1_m(vbool64_t mask, vint64m1_t vd, vint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m2_m( @@ -499,7 +499,7 @@ vint64m1_t test_vwmaccsu_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vv_i64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m2_m( @@ -508,7 +508,7 @@ vint64m2_t test_vwmaccsu_vv_i64m2_m(vbool32_t mask, vint64m2_t vd, vint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vx_i64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m4_m( @@ -517,7 +517,7 @@ vint64m2_t test_vwmaccsu_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m4_m( @@ -526,7 +526,7 @@ vint64m4_t test_vwmaccsu_vv_i64m4_m(vbool16_t mask, vint64m4_t vd, vint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m8_m( @@ -535,7 +535,7 @@ vint64m4_t test_vwmaccsu_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vv_i64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m8_m( @@ -544,6 +544,6 @@ vint64m8_t test_vwmaccsu_vv_i64m8_m(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, int32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vx_i64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccu.c index 460be5c3dee859469cc953c8f708d132c9109b99..6896c7f6cbe8306f6bf503f1eccc4550c4afdaec 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vv_u16mf4(vuint16mf4_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vv_u16mf4(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf4( @@ -22,7 +22,7 @@ vuint16mf4_t test_vwmaccu_vv_u16mf4(vuint16mf4_t vd, vuint8mf8_t vs1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vx_u16mf4(vuint16mf4_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vx_u16mf4(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf2( @@ -31,7 +31,7 @@ vuint16mf4_t test_vwmaccu_vx_u16mf4(vuint16mf4_t vd, uint8_t rs1, vuint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vv_u16mf2(vuint16mf2_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vv_u16mf2(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf2( @@ -40,7 +40,7 @@ vuint16mf2_t test_vwmaccu_vv_u16mf2(vuint16mf2_t vd, vuint8mf4_t vs1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vx_u16mf2(vuint16mf2_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vx_u16mf2(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m1( @@ -49,7 +49,7 @@ vuint16mf2_t test_vwmaccu_vx_u16mf2(vuint16mf2_t vd, uint8_t rs1, vuint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vv_u16m1(vuint16m1_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vv_u16m1(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m1( @@ -58,7 +58,7 @@ vuint16m1_t test_vwmaccu_vv_u16m1(vuint16m1_t vd, vuint8mf2_t vs1, vuint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vx_u16m1(vuint16m1_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vx_u16m1(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m2( @@ -67,7 +67,7 @@ vuint16m1_t test_vwmaccu_vx_u16m1(vuint16m1_t vd, uint8_t rs1, vuint8mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vv_u16m2(vuint16m2_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vv_u16m2(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m2( @@ -76,7 +76,7 @@ vuint16m2_t test_vwmaccu_vv_u16m2(vuint16m2_t vd, vuint8m1_t vs1, vuint8m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vx_u16m2(vuint16m2_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vx_u16m2(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m4( @@ -85,7 +85,7 @@ vuint16m2_t test_vwmaccu_vx_u16m2(vuint16m2_t vd, uint8_t rs1, vuint8m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vv_u16m4(vuint16m4_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vv_u16m4(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m4( @@ -94,7 +94,7 @@ vuint16m4_t test_vwmaccu_vv_u16m4(vuint16m4_t vd, vuint8m2_t vs1, vuint8m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vx_u16m4(vuint16m4_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vx_u16m4(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m8( @@ -103,7 +103,7 @@ vuint16m4_t test_vwmaccu_vx_u16m4(vuint16m4_t vd, uint8_t rs1, vuint8m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vv_u16m8(vuint16m8_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vv_u16m8(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m8( @@ -112,7 +112,7 @@ vuint16m8_t test_vwmaccu_vv_u16m8(vuint16m8_t vd, vuint8m4_t vs1, vuint8m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vx_u16m8(vuint16m8_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vx_u16m8(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32mf2( @@ -121,7 +121,7 @@ vuint16m8_t test_vwmaccu_vx_u16m8(vuint16m8_t vd, uint8_t rs1, vuint8m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vv_u32mf2(vuint32mf2_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vv_u32mf2(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32mf2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32mf2( @@ -130,7 +130,7 @@ vuint32mf2_t test_vwmaccu_vv_u32mf2(vuint32mf2_t vd, vuint16mf4_t vs1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vx_u32mf2(vuint32mf2_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vx_u32mf2(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m1( @@ -139,7 +139,7 @@ vuint32mf2_t test_vwmaccu_vx_u32mf2(vuint32mf2_t vd, uint16_t rs1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vv_u32m1(vuint32m1_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vv_u32m1(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m1( @@ -148,7 +148,7 @@ vuint32m1_t test_vwmaccu_vv_u32m1(vuint32m1_t vd, vuint16mf2_t vs1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vx_u32m1(vuint32m1_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vx_u32m1(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m2( @@ -157,7 +157,7 @@ vuint32m1_t test_vwmaccu_vx_u32m1(vuint32m1_t vd, uint16_t rs1, vuint16mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vv_u32m2(vuint32m2_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vv_u32m2(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m2( @@ -166,7 +166,7 @@ vuint32m2_t test_vwmaccu_vv_u32m2(vuint32m2_t vd, vuint16m1_t vs1, vuint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vx_u32m2(vuint32m2_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vx_u32m2(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m4( @@ -175,7 +175,7 @@ vuint32m2_t test_vwmaccu_vx_u32m2(vuint32m2_t vd, uint16_t rs1, vuint16m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vv_u32m4(vuint32m4_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vv_u32m4(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m4( @@ -184,7 +184,7 @@ vuint32m4_t test_vwmaccu_vv_u32m4(vuint32m4_t vd, vuint16m2_t vs1, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vx_u32m4(vuint32m4_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vx_u32m4(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m8( @@ -193,7 +193,7 @@ vuint32m4_t test_vwmaccu_vx_u32m4(vuint32m4_t vd, uint16_t rs1, vuint16m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vv_u32m8(vuint32m8_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vv_u32m8(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m8( @@ -202,7 +202,7 @@ vuint32m8_t test_vwmaccu_vv_u32m8(vuint32m8_t vd, vuint16m4_t vs1, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vx_u32m8(vuint32m8_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vx_u32m8(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m1( @@ -211,7 +211,7 @@ vuint32m8_t test_vwmaccu_vx_u32m8(vuint32m8_t vd, uint16_t rs1, vuint16m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vv_u64m1(vuint64m1_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vv_u64m1(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m1(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m1( @@ -220,7 +220,7 @@ vuint64m1_t test_vwmaccu_vv_u64m1(vuint64m1_t vd, vuint32mf2_t vs1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vx_u64m1(vuint64m1_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vx_u64m1(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m2( @@ -229,7 +229,7 @@ vuint64m1_t test_vwmaccu_vx_u64m1(vuint64m1_t vd, uint32_t rs1, vuint32mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vv_u64m2(vuint64m2_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vv_u64m2(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m2(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m2( @@ -238,7 +238,7 @@ vuint64m2_t test_vwmaccu_vv_u64m2(vuint64m2_t vd, vuint32m1_t vs1, vuint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vx_u64m2(vuint64m2_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vx_u64m2(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m4( @@ -247,7 +247,7 @@ vuint64m2_t test_vwmaccu_vx_u64m2(vuint64m2_t vd, uint32_t rs1, vuint32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vv_u64m4(vuint64m4_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vv_u64m4(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m4(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m4( @@ -256,7 +256,7 @@ vuint64m4_t test_vwmaccu_vv_u64m4(vuint64m4_t vd, vuint32m2_t vs1, vuint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vx_u64m4(vuint64m4_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vx_u64m4(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m8( @@ -265,7 +265,7 @@ vuint64m4_t test_vwmaccu_vx_u64m4(vuint64m4_t vd, uint32_t rs1, vuint32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vv_u64m8(vuint64m8_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vv_u64m8(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m8(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m8( @@ -274,7 +274,7 @@ vuint64m8_t test_vwmaccu_vv_u64m8(vuint64m8_t vd, vuint32m4_t vs1, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vx_u64m8(vuint64m8_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vx_u64m8(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf4_m( @@ -283,7 +283,7 @@ vuint64m8_t test_vwmaccu_vx_u64m8(vuint64m8_t vd, uint32_t rs1, vuint32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vv_u16mf4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf4_m( @@ -292,7 +292,7 @@ vuint16mf4_t test_vwmaccu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vx_u16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf2_m( @@ -301,7 +301,7 @@ vuint16mf4_t test_vwmaccu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t vd, uint8_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vv_u16mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf2_m( @@ -310,7 +310,7 @@ vuint16mf2_t test_vwmaccu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vx_u16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m1_m( @@ -319,7 +319,7 @@ vuint16mf2_t test_vwmaccu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t vd, uint8_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vv_u16m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m1_m( @@ -328,7 +328,7 @@ vuint16m1_t test_vwmaccu_vv_u16m1_m(vbool16_t mask, vuint16m1_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vx_u16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m2_m( @@ -337,7 +337,7 @@ vuint16m1_t test_vwmaccu_vx_u16m1_m(vbool16_t mask, vuint16m1_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vv_u16m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m2_m( @@ -346,7 +346,7 @@ vuint16m2_t test_vwmaccu_vv_u16m2_m(vbool8_t mask, vuint16m2_t vd, vuint8m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vx_u16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m4_m( @@ -355,7 +355,7 @@ vuint16m2_t test_vwmaccu_vx_u16m2_m(vbool8_t mask, vuint16m2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vv_u16m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m4_m( @@ -364,7 +364,7 @@ vuint16m4_t test_vwmaccu_vv_u16m4_m(vbool4_t mask, vuint16m4_t vd, vuint8m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vx_u16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m8_m( @@ -373,7 +373,7 @@ vuint16m4_t test_vwmaccu_vx_u16m4_m(vbool4_t mask, vuint16m4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vv_u16m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m8_m( @@ -382,7 +382,7 @@ vuint16m8_t test_vwmaccu_vv_u16m8_m(vbool2_t mask, vuint16m8_t vd, vuint8m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vx_u16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32mf2_m( @@ -391,7 +391,7 @@ vuint16m8_t test_vwmaccu_vx_u16m8_m(vbool2_t mask, vuint16m8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vv_u32mf2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32mf2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32mf2_m( @@ -400,7 +400,7 @@ vuint32mf2_t test_vwmaccu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vx_u32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m1_m( @@ -409,7 +409,7 @@ vuint32mf2_t test_vwmaccu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vv_u32m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m1_m( @@ -418,7 +418,7 @@ vuint32m1_t test_vwmaccu_vv_u32m1_m(vbool32_t mask, vuint32m1_t vd, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vx_u32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m2_m( @@ -427,7 +427,7 @@ vuint32m1_t test_vwmaccu_vx_u32m1_m(vbool32_t mask, vuint32m1_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vv_u32m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m2_m( @@ -436,7 +436,7 @@ vuint32m2_t test_vwmaccu_vv_u32m2_m(vbool16_t mask, vuint32m2_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vx_u32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m4_m( @@ -445,7 +445,7 @@ vuint32m2_t test_vwmaccu_vx_u32m2_m(vbool16_t mask, vuint32m2_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vv_u32m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m4_m( @@ -454,7 +454,7 @@ vuint32m4_t test_vwmaccu_vv_u32m4_m(vbool8_t mask, vuint32m4_t vd, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vx_u32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m8_m( @@ -463,7 +463,7 @@ vuint32m4_t test_vwmaccu_vx_u32m4_m(vbool8_t mask, vuint32m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vv_u32m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m8_m( @@ -472,7 +472,7 @@ vuint32m8_t test_vwmaccu_vv_u32m8_m(vbool4_t mask, vuint32m8_t vd, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vx_u32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m1_m( @@ -481,7 +481,7 @@ vuint32m8_t test_vwmaccu_vx_u32m8_m(vbool4_t mask, vuint32m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vv_u64m1_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m1_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m1_m( @@ -490,7 +490,7 @@ vuint64m1_t test_vwmaccu_vv_u64m1_m(vbool64_t mask, vuint64m1_t vd, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vx_u64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m2_m( @@ -499,7 +499,7 @@ vuint64m1_t test_vwmaccu_vx_u64m1_m(vbool64_t mask, vuint64m1_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vv_u64m2_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m2_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m2_m( @@ -508,7 +508,7 @@ vuint64m2_t test_vwmaccu_vv_u64m2_m(vbool32_t mask, vuint64m2_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vx_u64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m4_m( @@ -517,7 +517,7 @@ vuint64m2_t test_vwmaccu_vx_u64m2_m(vbool32_t mask, vuint64m2_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vv_u64m4_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m4_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m4_m( @@ -526,7 +526,7 @@ vuint64m4_t test_vwmaccu_vv_u64m4_m(vbool16_t mask, vuint64m4_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vx_u64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m8_m( @@ -535,7 +535,7 @@ vuint64m4_t test_vwmaccu_vx_u64m4_m(vbool16_t mask, vuint64m4_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vv_u64m8_m(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m8_m(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m8_m( @@ -544,6 +544,6 @@ vuint64m8_t test_vwmaccu_vv_u64m8_m(vbool8_t mask, vuint64m8_t vd, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vx_u64m8_m(vbool8_t mask, vuint64m8_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vx_u64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccus.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccus.c index 128a56eb61b45e3401f5ece0322217d102461727..0b2c1130d8bc562abaa48c31f2113f1c2ff41386 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccus.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmaccus.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccus_vx_i16mf4(vint16mf4_t vd, uint8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmaccus_vx_i16mf4(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf2( @@ -22,7 +22,7 @@ vint16mf4_t test_vwmaccus_vx_i16mf4(vint16mf4_t vd, uint8_t rs1, vint8mf8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccus_vx_i16mf2(vint16mf2_t vd, uint8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmaccus_vx_i16mf2(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m1( @@ -31,7 +31,7 @@ vint16mf2_t test_vwmaccus_vx_i16mf2(vint16mf2_t vd, uint8_t rs1, vint8mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccus_vx_i16m1(vint16m1_t vd, uint8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmaccus_vx_i16m1(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m2( @@ -40,7 +40,7 @@ vint16m1_t test_vwmaccus_vx_i16m1(vint16m1_t vd, uint8_t rs1, vint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccus_vx_i16m2(vint16m2_t vd, uint8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmaccus_vx_i16m2(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m4( @@ -49,7 +49,7 @@ vint16m2_t test_vwmaccus_vx_i16m2(vint16m2_t vd, uint8_t rs1, vint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccus_vx_i16m4(vint16m4_t vd, uint8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmaccus_vx_i16m4(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m8( @@ -58,7 +58,7 @@ vint16m4_t test_vwmaccus_vx_i16m4(vint16m4_t vd, uint8_t rs1, vint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccus_vx_i16m8(vint16m8_t vd, uint8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmaccus_vx_i16m8(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32mf2( @@ -67,7 +67,7 @@ vint16m8_t test_vwmaccus_vx_i16m8(vint16m8_t vd, uint8_t rs1, vint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccus_vx_i32mf2(vint32mf2_t vd, uint16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmaccus_vx_i32mf2(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32mf2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m1( @@ -76,7 +76,7 @@ vint32mf2_t test_vwmaccus_vx_i32mf2(vint32mf2_t vd, uint16_t rs1, vint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccus_vx_i32m1(vint32m1_t vd, uint16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmaccus_vx_i32m1(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m2( @@ -85,7 +85,7 @@ vint32m1_t test_vwmaccus_vx_i32m1(vint32m1_t vd, uint16_t rs1, vint16mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccus_vx_i32m2(vint32m2_t vd, uint16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmaccus_vx_i32m2(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m4( @@ -94,7 +94,7 @@ vint32m2_t test_vwmaccus_vx_i32m2(vint32m2_t vd, uint16_t rs1, vint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccus_vx_i32m4(vint32m4_t vd, uint16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmaccus_vx_i32m4(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m8( @@ -103,7 +103,7 @@ vint32m4_t test_vwmaccus_vx_i32m4(vint32m4_t vd, uint16_t rs1, vint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccus_vx_i32m8(vint32m8_t vd, uint16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmaccus_vx_i32m8(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m1( @@ -112,7 +112,7 @@ vint32m8_t test_vwmaccus_vx_i32m8(vint32m8_t vd, uint16_t rs1, vint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccus_vx_i64m1(vint64m1_t vd, uint32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmaccus_vx_i64m1(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m1(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m2( @@ -121,7 +121,7 @@ vint64m1_t test_vwmaccus_vx_i64m1(vint64m1_t vd, uint32_t rs1, vint32mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccus_vx_i64m2(vint64m2_t vd, uint32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmaccus_vx_i64m2(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m2(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m4( @@ -130,7 +130,7 @@ vint64m2_t test_vwmaccus_vx_i64m2(vint64m2_t vd, uint32_t rs1, vint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccus_vx_i64m4(vint64m4_t vd, uint32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmaccus_vx_i64m4(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m4(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m8( @@ -139,7 +139,7 @@ vint64m4_t test_vwmaccus_vx_i64m4(vint64m4_t vd, uint32_t rs1, vint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccus_vx_i64m8(vint64m8_t vd, uint32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmaccus_vx_i64m8(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m8(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf4_m( @@ -148,7 +148,7 @@ vint64m8_t test_vwmaccus_vx_i64m8(vint64m8_t vd, uint32_t rs1, vint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccus_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, uint8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmaccus_vx_i16mf4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf2_m( @@ -157,7 +157,7 @@ vint16mf4_t test_vwmaccus_vx_i16mf4_m(vbool64_t mask, vint16mf4_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccus_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, uint8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmaccus_vx_i16mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m1_m( @@ -166,7 +166,7 @@ vint16mf2_t test_vwmaccus_vx_i16mf2_m(vbool32_t mask, vint16mf2_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccus_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, uint8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmaccus_vx_i16m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m2_m( @@ -175,7 +175,7 @@ vint16m1_t test_vwmaccus_vx_i16m1_m(vbool16_t mask, vint16m1_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccus_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, uint8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmaccus_vx_i16m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m4_m( @@ -184,7 +184,7 @@ vint16m2_t test_vwmaccus_vx_i16m2_m(vbool8_t mask, vint16m2_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccus_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, uint8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmaccus_vx_i16m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m8_m( @@ -193,7 +193,7 @@ vint16m4_t test_vwmaccus_vx_i16m4_m(vbool4_t mask, vint16m4_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccus_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, uint8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmaccus_vx_i16m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32mf2_m( @@ -202,7 +202,7 @@ vint16m8_t test_vwmaccus_vx_i16m8_m(vbool2_t mask, vint16m8_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccus_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, uint16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmaccus_vx_i32mf2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32mf2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m1_m( @@ -211,7 +211,7 @@ vint32mf2_t test_vwmaccus_vx_i32mf2_m(vbool64_t mask, vint32mf2_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccus_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, uint16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmaccus_vx_i32m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m2_m( @@ -220,7 +220,7 @@ vint32m1_t test_vwmaccus_vx_i32m1_m(vbool32_t mask, vint32m1_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccus_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, uint16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmaccus_vx_i32m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m4_m( @@ -229,7 +229,7 @@ vint32m2_t test_vwmaccus_vx_i32m2_m(vbool16_t mask, vint32m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccus_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, uint16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmaccus_vx_i32m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m8_m( @@ -238,7 +238,7 @@ vint32m4_t test_vwmaccus_vx_i32m4_m(vbool8_t mask, vint32m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccus_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, uint16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmaccus_vx_i32m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m8_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m1_m( @@ -247,7 +247,7 @@ vint32m8_t test_vwmaccus_vx_i32m8_m(vbool4_t mask, vint32m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccus_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, uint32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmaccus_vx_i64m1_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m1_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m2_m( @@ -256,7 +256,7 @@ vint64m1_t test_vwmaccus_vx_i64m1_m(vbool64_t mask, vint64m1_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccus_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, uint32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmaccus_vx_i64m2_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m2_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m4_m( @@ -265,7 +265,7 @@ vint64m2_t test_vwmaccus_vx_i64m2_m(vbool32_t mask, vint64m2_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccus_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, uint32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmaccus_vx_i64m4_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m4_m(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m8_m( @@ -274,6 +274,6 @@ vint64m4_t test_vwmaccus_vx_i64m4_m(vbool16_t mask, vint64m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccus_vx_i64m8_m(vbool8_t mask, vint64m8_t vd, uint32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmaccus_vx_i64m8_m(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m8_m(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmul.c index 6aa8c765d307edb012229219ffb09dc63c5bc46a..46272f4e21ca7b4c9b79dfd0b566a292fbd6f55b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmul.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vv_i16mf4(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwmul_vv_i16mf4(op1, op2, vl); + return __riscv_vwmul_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf4( @@ -21,7 +21,7 @@ vint16mf4_t test_vwmul_vv_i16mf4(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vx_i16mf4(vint8mf8_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf4(op1, op2, vl); + return __riscv_vwmul_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf2( @@ -30,7 +30,7 @@ vint16mf4_t test_vwmul_vx_i16mf4(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vv_i16mf2(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwmul_vv_i16mf2(op1, op2, vl); + return __riscv_vwmul_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf2( @@ -39,7 +39,7 @@ vint16mf2_t test_vwmul_vv_i16mf2(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vx_i16mf2(vint8mf4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf2(op1, op2, vl); + return __riscv_vwmul_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m1( @@ -48,7 +48,7 @@ vint16mf2_t test_vwmul_vx_i16mf2(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vv_i16m1(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwmul_vv_i16m1(op1, op2, vl); + return __riscv_vwmul_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m1( @@ -57,7 +57,7 @@ vint16m1_t test_vwmul_vv_i16m1(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vx_i16m1(vint8mf2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m1(op1, op2, vl); + return __riscv_vwmul_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m2( @@ -66,7 +66,7 @@ vint16m1_t test_vwmul_vx_i16m1(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vv_i16m2(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwmul_vv_i16m2(op1, op2, vl); + return __riscv_vwmul_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m2( @@ -75,7 +75,7 @@ vint16m2_t test_vwmul_vv_i16m2(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vx_i16m2(vint8m1_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m2(op1, op2, vl); + return __riscv_vwmul_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m4( @@ -84,7 +84,7 @@ vint16m2_t test_vwmul_vx_i16m2(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vv_i16m4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwmul_vv_i16m4(op1, op2, vl); + return __riscv_vwmul_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m4( @@ -93,7 +93,7 @@ vint16m4_t test_vwmul_vv_i16m4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vx_i16m4(vint8m2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m4(op1, op2, vl); + return __riscv_vwmul_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m8( @@ -102,7 +102,7 @@ vint16m4_t test_vwmul_vx_i16m4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vv_i16m8(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwmul_vv_i16m8(op1, op2, vl); + return __riscv_vwmul_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m8( @@ -111,7 +111,7 @@ vint16m8_t test_vwmul_vv_i16m8(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vx_i16m8(vint8m4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m8(op1, op2, vl); + return __riscv_vwmul_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32mf2( @@ -120,7 +120,7 @@ vint16m8_t test_vwmul_vx_i16m8(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vv_i32mf2(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwmul_vv_i32mf2(op1, op2, vl); + return __riscv_vwmul_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32mf2( @@ -129,7 +129,7 @@ vint32mf2_t test_vwmul_vv_i32mf2(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vx_i32mf2(vint16mf4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32mf2(op1, op2, vl); + return __riscv_vwmul_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m1( @@ -138,7 +138,7 @@ vint32mf2_t test_vwmul_vx_i32mf2(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vv_i32m1(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwmul_vv_i32m1(op1, op2, vl); + return __riscv_vwmul_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m1( @@ -147,7 +147,7 @@ vint32m1_t test_vwmul_vv_i32m1(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vx_i32m1(vint16mf2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m1(op1, op2, vl); + return __riscv_vwmul_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m2( @@ -156,7 +156,7 @@ vint32m1_t test_vwmul_vx_i32m1(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vv_i32m2(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwmul_vv_i32m2(op1, op2, vl); + return __riscv_vwmul_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m2( @@ -165,7 +165,7 @@ vint32m2_t test_vwmul_vv_i32m2(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vx_i32m2(vint16m1_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m2(op1, op2, vl); + return __riscv_vwmul_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m4( @@ -174,7 +174,7 @@ vint32m2_t test_vwmul_vx_i32m2(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vv_i32m4(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwmul_vv_i32m4(op1, op2, vl); + return __riscv_vwmul_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m4( @@ -183,7 +183,7 @@ vint32m4_t test_vwmul_vv_i32m4(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vx_i32m4(vint16m2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m4(op1, op2, vl); + return __riscv_vwmul_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m8( @@ -192,7 +192,7 @@ vint32m4_t test_vwmul_vx_i32m4(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vv_i32m8(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwmul_vv_i32m8(op1, op2, vl); + return __riscv_vwmul_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m8( @@ -201,7 +201,7 @@ vint32m8_t test_vwmul_vv_i32m8(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vx_i32m8(vint16m4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m8(op1, op2, vl); + return __riscv_vwmul_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m1( @@ -210,7 +210,7 @@ vint32m8_t test_vwmul_vx_i32m8(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vv_i64m1(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwmul_vv_i64m1(op1, op2, vl); + return __riscv_vwmul_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m1( @@ -219,7 +219,7 @@ vint64m1_t test_vwmul_vv_i64m1(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vx_i64m1(vint32mf2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m1(op1, op2, vl); + return __riscv_vwmul_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m2( @@ -228,7 +228,7 @@ vint64m1_t test_vwmul_vx_i64m1(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vv_i64m2(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwmul_vv_i64m2(op1, op2, vl); + return __riscv_vwmul_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m2( @@ -237,7 +237,7 @@ vint64m2_t test_vwmul_vv_i64m2(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vx_i64m2(vint32m1_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m2(op1, op2, vl); + return __riscv_vwmul_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m4( @@ -246,7 +246,7 @@ vint64m2_t test_vwmul_vx_i64m2(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vv_i64m4(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwmul_vv_i64m4(op1, op2, vl); + return __riscv_vwmul_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m4( @@ -255,7 +255,7 @@ vint64m4_t test_vwmul_vv_i64m4(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vx_i64m4(vint32m2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m4(op1, op2, vl); + return __riscv_vwmul_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m8( @@ -264,7 +264,7 @@ vint64m4_t test_vwmul_vx_i64m4(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vv_i64m8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwmul_vv_i64m8(op1, op2, vl); + return __riscv_vwmul_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m8( @@ -273,7 +273,7 @@ vint64m8_t test_vwmul_vv_i64m8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vx_i64m8(vint32m4_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m8(op1, op2, vl); + return __riscv_vwmul_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf4_m( @@ -282,7 +282,7 @@ vint64m8_t test_vwmul_vx_i64m8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vv_i16mf4_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwmul_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf4_m( @@ -291,7 +291,7 @@ vint16mf4_t test_vwmul_vv_i16mf4_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vx_i16mf4_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf2_m( @@ -300,7 +300,7 @@ vint16mf4_t test_vwmul_vx_i16mf4_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vv_i16mf2_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwmul_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf2_m( @@ -309,7 +309,7 @@ vint16mf2_t test_vwmul_vv_i16mf2_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vx_i16mf2_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m1_m( @@ -318,7 +318,7 @@ vint16mf2_t test_vwmul_vx_i16mf2_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vv_i16m1_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwmul_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m1_m( @@ -327,7 +327,7 @@ vint16m1_t test_vwmul_vv_i16m1_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vx_i16m1_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m2_m( @@ -336,7 +336,7 @@ vint16m1_t test_vwmul_vx_i16m1_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vv_i16m2_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwmul_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m2_m( @@ -345,7 +345,7 @@ vint16m2_t test_vwmul_vv_i16m2_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vx_i16m2_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m4_m( @@ -354,7 +354,7 @@ vint16m2_t test_vwmul_vx_i16m2_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vv_i16m4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwmul_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m4_m( @@ -363,7 +363,7 @@ vint16m4_t test_vwmul_vv_i16m4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vx_i16m4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m8_m( @@ -372,7 +372,7 @@ vint16m4_t test_vwmul_vx_i16m4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vv_i16m8_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwmul_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m8_m( @@ -381,7 +381,7 @@ vint16m8_t test_vwmul_vv_i16m8_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vx_i16m8_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32mf2_m( @@ -390,7 +390,7 @@ vint16m8_t test_vwmul_vx_i16m8_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vv_i32mf2_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwmul_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32mf2_m( @@ -399,7 +399,7 @@ vint32mf2_t test_vwmul_vv_i32mf2_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vx_i32mf2_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m1_m( @@ -408,7 +408,7 @@ vint32mf2_t test_vwmul_vx_i32mf2_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vv_i32m1_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwmul_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m1_m( @@ -417,7 +417,7 @@ vint32m1_t test_vwmul_vv_i32m1_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vx_i32m1_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m2_m( @@ -426,7 +426,7 @@ vint32m1_t test_vwmul_vx_i32m1_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vv_i32m2_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwmul_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m2_m( @@ -435,7 +435,7 @@ vint32m2_t test_vwmul_vv_i32m2_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vx_i32m2_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m4_m( @@ -444,7 +444,7 @@ vint32m2_t test_vwmul_vx_i32m2_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vv_i32m4_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwmul_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m4_m( @@ -453,7 +453,7 @@ vint32m4_t test_vwmul_vv_i32m4_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vx_i32m4_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m8_m( @@ -462,7 +462,7 @@ vint32m4_t test_vwmul_vx_i32m4_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vv_i32m8_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwmul_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m8_m( @@ -471,7 +471,7 @@ vint32m8_t test_vwmul_vv_i32m8_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vx_i32m8_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m1_m( @@ -480,7 +480,7 @@ vint32m8_t test_vwmul_vx_i32m8_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vv_i64m1_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwmul_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m1_m( @@ -489,7 +489,7 @@ vint64m1_t test_vwmul_vv_i64m1_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vx_i64m1_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m2_m( @@ -498,7 +498,7 @@ vint64m1_t test_vwmul_vx_i64m1_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vv_i64m2_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwmul_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m2_m( @@ -507,7 +507,7 @@ vint64m2_t test_vwmul_vv_i64m2_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vx_i64m2_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m4_m( @@ -516,7 +516,7 @@ vint64m2_t test_vwmul_vx_i64m2_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vv_i64m4_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwmul_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m4_m( @@ -525,7 +525,7 @@ vint64m4_t test_vwmul_vv_i64m4_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vx_i64m4_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m8_m( @@ -534,7 +534,7 @@ vint64m4_t test_vwmul_vx_i64m4_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vv_i64m8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwmul_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vwmul_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m8_m( @@ -543,6 +543,6 @@ vint64m8_t test_vwmul_vv_i64m8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vx_i64m8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vwmul_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmulsu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmulsu.c index 5d57827a16740dbafe80f894ae2a6c7f5e1617da..4b8960d86a22650efd8fcb51198bc39cb2430014 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmulsu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmulsu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vv_i16mf4(vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulsu_vv_i16mf4(op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf4( @@ -21,7 +21,7 @@ vint16mf4_t test_vwmulsu_vv_i16mf4(vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vx_i16mf4(vint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf4(op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf2( @@ -30,7 +30,7 @@ vint16mf4_t test_vwmulsu_vx_i16mf4(vint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vv_i16mf2(vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulsu_vv_i16mf2(op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf2( @@ -39,7 +39,7 @@ vint16mf2_t test_vwmulsu_vv_i16mf2(vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vx_i16mf2(vint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf2(op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m1( @@ -48,7 +48,7 @@ vint16mf2_t test_vwmulsu_vx_i16mf2(vint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vv_i16m1(vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulsu_vv_i16m1(op1, op2, vl); + return __riscv_vwmulsu_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m1( @@ -57,7 +57,7 @@ vint16m1_t test_vwmulsu_vv_i16m1(vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vx_i16m1(vint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m1(op1, op2, vl); + return __riscv_vwmulsu_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m2( @@ -66,7 +66,7 @@ vint16m1_t test_vwmulsu_vx_i16m1(vint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vv_i16m2(vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulsu_vv_i16m2(op1, op2, vl); + return __riscv_vwmulsu_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m2( @@ -75,7 +75,7 @@ vint16m2_t test_vwmulsu_vv_i16m2(vint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vx_i16m2(vint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m2(op1, op2, vl); + return __riscv_vwmulsu_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m4( @@ -84,7 +84,7 @@ vint16m2_t test_vwmulsu_vx_i16m2(vint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vv_i16m4(vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulsu_vv_i16m4(op1, op2, vl); + return __riscv_vwmulsu_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m4( @@ -93,7 +93,7 @@ vint16m4_t test_vwmulsu_vv_i16m4(vint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vx_i16m4(vint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m4(op1, op2, vl); + return __riscv_vwmulsu_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m8( @@ -102,7 +102,7 @@ vint16m4_t test_vwmulsu_vx_i16m4(vint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vv_i16m8(vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulsu_vv_i16m8(op1, op2, vl); + return __riscv_vwmulsu_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m8( @@ -111,7 +111,7 @@ vint16m8_t test_vwmulsu_vv_i16m8(vint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vx_i16m8(vint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m8(op1, op2, vl); + return __riscv_vwmulsu_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32mf2( @@ -120,7 +120,7 @@ vint16m8_t test_vwmulsu_vx_i16m8(vint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vv_i32mf2(vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulsu_vv_i32mf2(op1, op2, vl); + return __riscv_vwmulsu_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32mf2( @@ -129,7 +129,7 @@ vint32mf2_t test_vwmulsu_vv_i32mf2(vint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vx_i32mf2(vint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32mf2(op1, op2, vl); + return __riscv_vwmulsu_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m1( @@ -138,7 +138,7 @@ vint32mf2_t test_vwmulsu_vx_i32mf2(vint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vv_i32m1(vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulsu_vv_i32m1(op1, op2, vl); + return __riscv_vwmulsu_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m1( @@ -147,7 +147,7 @@ vint32m1_t test_vwmulsu_vv_i32m1(vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vx_i32m1(vint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m1(op1, op2, vl); + return __riscv_vwmulsu_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m2( @@ -156,7 +156,7 @@ vint32m1_t test_vwmulsu_vx_i32m1(vint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vv_i32m2(vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulsu_vv_i32m2(op1, op2, vl); + return __riscv_vwmulsu_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m2( @@ -165,7 +165,7 @@ vint32m2_t test_vwmulsu_vv_i32m2(vint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vx_i32m2(vint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m2(op1, op2, vl); + return __riscv_vwmulsu_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m4( @@ -174,7 +174,7 @@ vint32m2_t test_vwmulsu_vx_i32m2(vint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vv_i32m4(vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulsu_vv_i32m4(op1, op2, vl); + return __riscv_vwmulsu_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m4( @@ -183,7 +183,7 @@ vint32m4_t test_vwmulsu_vv_i32m4(vint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vx_i32m4(vint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m4(op1, op2, vl); + return __riscv_vwmulsu_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m8( @@ -192,7 +192,7 @@ vint32m4_t test_vwmulsu_vx_i32m4(vint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vv_i32m8(vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulsu_vv_i32m8(op1, op2, vl); + return __riscv_vwmulsu_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m8( @@ -201,7 +201,7 @@ vint32m8_t test_vwmulsu_vv_i32m8(vint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vx_i32m8(vint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m8(op1, op2, vl); + return __riscv_vwmulsu_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m1( @@ -210,7 +210,7 @@ vint32m8_t test_vwmulsu_vx_i32m8(vint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vv_i64m1(vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulsu_vv_i64m1(op1, op2, vl); + return __riscv_vwmulsu_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m1( @@ -219,7 +219,7 @@ vint64m1_t test_vwmulsu_vv_i64m1(vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vx_i64m1(vint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m1(op1, op2, vl); + return __riscv_vwmulsu_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m2( @@ -228,7 +228,7 @@ vint64m1_t test_vwmulsu_vx_i64m1(vint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vv_i64m2(vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulsu_vv_i64m2(op1, op2, vl); + return __riscv_vwmulsu_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m2( @@ -237,7 +237,7 @@ vint64m2_t test_vwmulsu_vv_i64m2(vint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vx_i64m2(vint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m2(op1, op2, vl); + return __riscv_vwmulsu_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m4( @@ -246,7 +246,7 @@ vint64m2_t test_vwmulsu_vx_i64m2(vint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vv_i64m4(vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulsu_vv_i64m4(op1, op2, vl); + return __riscv_vwmulsu_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m4( @@ -255,7 +255,7 @@ vint64m4_t test_vwmulsu_vv_i64m4(vint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vx_i64m4(vint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m4(op1, op2, vl); + return __riscv_vwmulsu_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m8( @@ -264,7 +264,7 @@ vint64m4_t test_vwmulsu_vx_i64m4(vint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vv_i64m8(vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulsu_vv_i64m8(op1, op2, vl); + return __riscv_vwmulsu_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m8( @@ -273,7 +273,7 @@ vint64m8_t test_vwmulsu_vv_i64m8(vint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vx_i64m8(vint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m8(op1, op2, vl); + return __riscv_vwmulsu_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf4_m( @@ -282,7 +282,7 @@ vint64m8_t test_vwmulsu_vx_i64m8(vint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vv_i16mf4_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulsu_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf4_m( @@ -291,7 +291,7 @@ vint16mf4_t test_vwmulsu_vv_i16mf4_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vx_i16mf4_m(vbool64_t mask, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf2_m( @@ -300,7 +300,7 @@ vint16mf4_t test_vwmulsu_vx_i16mf4_m(vbool64_t mask, vint8mf8_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vv_i16mf2_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulsu_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf2_m( @@ -309,7 +309,7 @@ vint16mf2_t test_vwmulsu_vv_i16mf2_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vx_i16mf2_m(vbool32_t mask, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m1_m( @@ -318,7 +318,7 @@ vint16mf2_t test_vwmulsu_vx_i16mf2_m(vbool32_t mask, vint8mf4_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vv_i16m1_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulsu_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m1_m( @@ -327,7 +327,7 @@ vint16m1_t test_vwmulsu_vv_i16m1_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vx_i16m1_m(vbool16_t mask, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m2_m( @@ -336,7 +336,7 @@ vint16m1_t test_vwmulsu_vx_i16m1_m(vbool16_t mask, vint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vv_i16m2_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulsu_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m2_m( @@ -345,7 +345,7 @@ vint16m2_t test_vwmulsu_vv_i16m2_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vx_i16m2_m(vbool8_t mask, vint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m4_m( @@ -354,7 +354,7 @@ vint16m2_t test_vwmulsu_vx_i16m2_m(vbool8_t mask, vint8m1_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vv_i16m4_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulsu_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m4_m( @@ -363,7 +363,7 @@ vint16m4_t test_vwmulsu_vv_i16m4_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vx_i16m4_m(vbool4_t mask, vint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m8_m( @@ -372,7 +372,7 @@ vint16m4_t test_vwmulsu_vx_i16m4_m(vbool4_t mask, vint8m2_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vv_i16m8_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulsu_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m8_m( @@ -381,7 +381,7 @@ vint16m8_t test_vwmulsu_vv_i16m8_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vx_i16m8_m(vbool2_t mask, vint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32mf2_m( @@ -390,7 +390,7 @@ vint16m8_t test_vwmulsu_vx_i16m8_m(vbool2_t mask, vint8m4_t op1, uint8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vv_i32mf2_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulsu_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32mf2_m( @@ -399,7 +399,7 @@ vint32mf2_t test_vwmulsu_vv_i32mf2_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vx_i32mf2_m(vbool64_t mask, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m1_m( @@ -408,7 +408,7 @@ vint32mf2_t test_vwmulsu_vx_i32mf2_m(vbool64_t mask, vint16mf4_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vv_i32m1_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulsu_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m1_m( @@ -417,7 +417,7 @@ vint32m1_t test_vwmulsu_vv_i32m1_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vx_i32m1_m(vbool32_t mask, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m2_m( @@ -426,7 +426,7 @@ vint32m1_t test_vwmulsu_vx_i32m1_m(vbool32_t mask, vint16mf2_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vv_i32m2_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulsu_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m2_m( @@ -435,7 +435,7 @@ vint32m2_t test_vwmulsu_vv_i32m2_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vx_i32m2_m(vbool16_t mask, vint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m4_m( @@ -444,7 +444,7 @@ vint32m2_t test_vwmulsu_vx_i32m2_m(vbool16_t mask, vint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vv_i32m4_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulsu_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m4_m( @@ -453,7 +453,7 @@ vint32m4_t test_vwmulsu_vv_i32m4_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vx_i32m4_m(vbool8_t mask, vint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m8_m( @@ -462,7 +462,7 @@ vint32m4_t test_vwmulsu_vx_i32m4_m(vbool8_t mask, vint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vv_i32m8_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulsu_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m8_m( @@ -471,7 +471,7 @@ vint32m8_t test_vwmulsu_vv_i32m8_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vx_i32m8_m(vbool4_t mask, vint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m1_m( @@ -480,7 +480,7 @@ vint32m8_t test_vwmulsu_vx_i32m8_m(vbool4_t mask, vint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vv_i64m1_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulsu_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m1_m( @@ -489,7 +489,7 @@ vint64m1_t test_vwmulsu_vv_i64m1_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vx_i64m1_m(vbool64_t mask, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m2_m( @@ -498,7 +498,7 @@ vint64m1_t test_vwmulsu_vx_i64m1_m(vbool64_t mask, vint32mf2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vv_i64m2_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulsu_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m2_m( @@ -507,7 +507,7 @@ vint64m2_t test_vwmulsu_vv_i64m2_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vx_i64m2_m(vbool32_t mask, vint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m4_m( @@ -516,7 +516,7 @@ vint64m2_t test_vwmulsu_vx_i64m2_m(vbool32_t mask, vint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vv_i64m4_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulsu_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m4_m( @@ -525,7 +525,7 @@ vint64m4_t test_vwmulsu_vv_i64m4_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vx_i64m4_m(vbool16_t mask, vint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m8_m( @@ -534,7 +534,7 @@ vint64m4_t test_vwmulsu_vx_i64m4_m(vbool16_t mask, vint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vv_i64m8_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulsu_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m8_m( @@ -543,6 +543,6 @@ vint64m8_t test_vwmulsu_vv_i64m8_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vx_i64m8_m(vbool8_t mask, vint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmulu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmulu.c index 087a6819dd98b714522a42cc81eb69c30787afa0..20a041e0605e53bddca611d03e2ea894d97f859c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmulu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwmulu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vv_u16mf4(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulu_vv_u16mf4(op1, op2, vl); + return __riscv_vwmulu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf4( @@ -21,7 +21,7 @@ vuint16mf4_t test_vwmulu_vv_u16mf4(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vx_u16mf4(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf4(op1, op2, vl); + return __riscv_vwmulu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf2( @@ -30,7 +30,7 @@ vuint16mf4_t test_vwmulu_vx_u16mf4(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vv_u16mf2(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulu_vv_u16mf2(op1, op2, vl); + return __riscv_vwmulu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf2( @@ -39,7 +39,7 @@ vuint16mf2_t test_vwmulu_vv_u16mf2(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vx_u16mf2(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf2(op1, op2, vl); + return __riscv_vwmulu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m1( @@ -48,7 +48,7 @@ vuint16mf2_t test_vwmulu_vx_u16mf2(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vv_u16m1(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulu_vv_u16m1(op1, op2, vl); + return __riscv_vwmulu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m1( @@ -57,7 +57,7 @@ vuint16m1_t test_vwmulu_vv_u16m1(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vx_u16m1(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m1(op1, op2, vl); + return __riscv_vwmulu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m2( @@ -66,7 +66,7 @@ vuint16m1_t test_vwmulu_vx_u16m1(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vv_u16m2(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulu_vv_u16m2(op1, op2, vl); + return __riscv_vwmulu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m2( @@ -75,7 +75,7 @@ vuint16m2_t test_vwmulu_vv_u16m2(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vx_u16m2(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m2(op1, op2, vl); + return __riscv_vwmulu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m4( @@ -84,7 +84,7 @@ vuint16m2_t test_vwmulu_vx_u16m2(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vv_u16m4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulu_vv_u16m4(op1, op2, vl); + return __riscv_vwmulu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m4( @@ -93,7 +93,7 @@ vuint16m4_t test_vwmulu_vv_u16m4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vx_u16m4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m4(op1, op2, vl); + return __riscv_vwmulu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m8( @@ -102,7 +102,7 @@ vuint16m4_t test_vwmulu_vx_u16m4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vv_u16m8(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulu_vv_u16m8(op1, op2, vl); + return __riscv_vwmulu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m8( @@ -111,7 +111,7 @@ vuint16m8_t test_vwmulu_vv_u16m8(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vx_u16m8(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m8(op1, op2, vl); + return __riscv_vwmulu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32mf2( @@ -120,7 +120,7 @@ vuint16m8_t test_vwmulu_vx_u16m8(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vv_u32mf2(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulu_vv_u32mf2(op1, op2, vl); + return __riscv_vwmulu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32mf2( @@ -129,7 +129,7 @@ vuint32mf2_t test_vwmulu_vv_u32mf2(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vx_u32mf2(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32mf2(op1, op2, vl); + return __riscv_vwmulu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m1( @@ -138,7 +138,7 @@ vuint32mf2_t test_vwmulu_vx_u32mf2(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vv_u32m1(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulu_vv_u32m1(op1, op2, vl); + return __riscv_vwmulu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m1( @@ -147,7 +147,7 @@ vuint32m1_t test_vwmulu_vv_u32m1(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vx_u32m1(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m1(op1, op2, vl); + return __riscv_vwmulu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m2( @@ -156,7 +156,7 @@ vuint32m1_t test_vwmulu_vx_u32m1(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vv_u32m2(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulu_vv_u32m2(op1, op2, vl); + return __riscv_vwmulu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m2( @@ -165,7 +165,7 @@ vuint32m2_t test_vwmulu_vv_u32m2(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vx_u32m2(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m2(op1, op2, vl); + return __riscv_vwmulu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m4( @@ -174,7 +174,7 @@ vuint32m2_t test_vwmulu_vx_u32m2(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vv_u32m4(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulu_vv_u32m4(op1, op2, vl); + return __riscv_vwmulu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m4( @@ -183,7 +183,7 @@ vuint32m4_t test_vwmulu_vv_u32m4(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vx_u32m4(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m4(op1, op2, vl); + return __riscv_vwmulu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m8( @@ -192,7 +192,7 @@ vuint32m4_t test_vwmulu_vx_u32m4(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vv_u32m8(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulu_vv_u32m8(op1, op2, vl); + return __riscv_vwmulu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m8( @@ -201,7 +201,7 @@ vuint32m8_t test_vwmulu_vv_u32m8(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vx_u32m8(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m8(op1, op2, vl); + return __riscv_vwmulu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m1( @@ -210,7 +210,7 @@ vuint32m8_t test_vwmulu_vx_u32m8(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vv_u64m1(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulu_vv_u64m1(op1, op2, vl); + return __riscv_vwmulu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m1( @@ -219,7 +219,7 @@ vuint64m1_t test_vwmulu_vv_u64m1(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vx_u64m1(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m1(op1, op2, vl); + return __riscv_vwmulu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m2( @@ -228,7 +228,7 @@ vuint64m1_t test_vwmulu_vx_u64m1(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vv_u64m2(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulu_vv_u64m2(op1, op2, vl); + return __riscv_vwmulu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m2( @@ -237,7 +237,7 @@ vuint64m2_t test_vwmulu_vv_u64m2(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vx_u64m2(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m2(op1, op2, vl); + return __riscv_vwmulu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m4( @@ -246,7 +246,7 @@ vuint64m2_t test_vwmulu_vx_u64m2(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vv_u64m4(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulu_vv_u64m4(op1, op2, vl); + return __riscv_vwmulu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m4( @@ -255,7 +255,7 @@ vuint64m4_t test_vwmulu_vv_u64m4(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vx_u64m4(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m4(op1, op2, vl); + return __riscv_vwmulu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m8( @@ -264,7 +264,7 @@ vuint64m4_t test_vwmulu_vx_u64m4(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vv_u64m8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulu_vv_u64m8(op1, op2, vl); + return __riscv_vwmulu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m8( @@ -273,7 +273,7 @@ vuint64m8_t test_vwmulu_vv_u64m8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vx_u64m8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m8(op1, op2, vl); + return __riscv_vwmulu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf4_m( @@ -282,7 +282,7 @@ vuint64m8_t test_vwmulu_vx_u64m8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vv_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf4_m( @@ -291,7 +291,7 @@ vuint16mf4_t test_vwmulu_vv_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vx_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf2_m( @@ -300,7 +300,7 @@ vuint16mf4_t test_vwmulu_vx_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vv_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf2_m( @@ -309,7 +309,7 @@ vuint16mf2_t test_vwmulu_vv_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vx_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m1_m( @@ -318,7 +318,7 @@ vuint16mf2_t test_vwmulu_vx_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vv_u16m1_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m1_m( @@ -327,7 +327,7 @@ vuint16m1_t test_vwmulu_vv_u16m1_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vx_u16m1_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m2_m( @@ -336,7 +336,7 @@ vuint16m1_t test_vwmulu_vx_u16m1_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vv_u16m2_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m2_m( @@ -345,7 +345,7 @@ vuint16m2_t test_vwmulu_vv_u16m2_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vx_u16m2_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m4_m( @@ -354,7 +354,7 @@ vuint16m2_t test_vwmulu_vx_u16m2_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vv_u16m4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m4_m( @@ -363,7 +363,7 @@ vuint16m4_t test_vwmulu_vv_u16m4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vx_u16m4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m8_m( @@ -372,7 +372,7 @@ vuint16m4_t test_vwmulu_vx_u16m4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vv_u16m8_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m8_m( @@ -381,7 +381,7 @@ vuint16m8_t test_vwmulu_vv_u16m8_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vx_u16m8_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32mf2_m( @@ -390,7 +390,7 @@ vuint16m8_t test_vwmulu_vx_u16m8_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vv_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32mf2_m( @@ -399,7 +399,7 @@ vuint32mf2_t test_vwmulu_vv_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vx_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m1_m( @@ -408,7 +408,7 @@ vuint32mf2_t test_vwmulu_vx_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vv_u32m1_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m1_m( @@ -417,7 +417,7 @@ vuint32m1_t test_vwmulu_vv_u32m1_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vx_u32m1_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m2_m( @@ -426,7 +426,7 @@ vuint32m1_t test_vwmulu_vx_u32m1_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vv_u32m2_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m2_m( @@ -435,7 +435,7 @@ vuint32m2_t test_vwmulu_vv_u32m2_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vx_u32m2_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m4_m( @@ -444,7 +444,7 @@ vuint32m2_t test_vwmulu_vx_u32m2_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vv_u32m4_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m4_m( @@ -453,7 +453,7 @@ vuint32m4_t test_vwmulu_vv_u32m4_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vx_u32m4_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m8_m( @@ -462,7 +462,7 @@ vuint32m4_t test_vwmulu_vx_u32m4_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vv_u32m8_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m8_m( @@ -471,7 +471,7 @@ vuint32m8_t test_vwmulu_vv_u32m8_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vx_u32m8_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m1_m( @@ -480,7 +480,7 @@ vuint32m8_t test_vwmulu_vx_u32m8_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vv_u64m1_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m1_m( @@ -489,7 +489,7 @@ vuint64m1_t test_vwmulu_vv_u64m1_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vx_u64m1_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m2_m( @@ -498,7 +498,7 @@ vuint64m1_t test_vwmulu_vx_u64m1_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vv_u64m2_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m2_m( @@ -507,7 +507,7 @@ vuint64m2_t test_vwmulu_vv_u64m2_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vx_u64m2_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m4_m( @@ -516,7 +516,7 @@ vuint64m2_t test_vwmulu_vx_u64m2_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vv_u64m4_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m4_m( @@ -525,7 +525,7 @@ vuint64m4_t test_vwmulu_vv_u64m4_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vx_u64m4_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m8_m( @@ -534,7 +534,7 @@ vuint64m4_t test_vwmulu_vx_u64m4_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vv_u64m8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vwmulu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m8_m( @@ -543,6 +543,6 @@ vuint64m8_t test_vwmulu_vv_u64m8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vx_u64m8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vwmulu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwredsum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwredsum.c index 360e1609ad312a00c103727edca2db80e2c2d777..d24e82b839107d3fbdabdf6441fb0c33a9827d6f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwredsum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwredsum.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf8_i16m1(vint8mf8_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf8_i16m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf8_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf4_i16m1( @@ -21,7 +21,7 @@ vint16m1_t test_vwredsum_vs_i8mf8_i16m1(vint8mf8_t vector, vint16m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf4_i16m1(vint8mf4_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf4_i16m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf2_i16m1( @@ -30,7 +30,7 @@ vint16m1_t test_vwredsum_vs_i8mf4_i16m1(vint8mf4_t vector, vint16m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf2_i16m1(vint8mf2_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf2_i16m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m1_i16m1( @@ -39,7 +39,7 @@ vint16m1_t test_vwredsum_vs_i8mf2_i16m1(vint8mf2_t vector, vint16m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m1_i16m1(vint8m1_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m1_i16m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i8m1_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m2_i16m1( @@ -48,7 +48,7 @@ vint16m1_t test_vwredsum_vs_i8m1_i16m1(vint8m1_t vector, vint16m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m2_i16m1(vint8m2_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m2_i16m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i8m2_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m4_i16m1( @@ -57,7 +57,7 @@ vint16m1_t test_vwredsum_vs_i8m2_i16m1(vint8m2_t vector, vint16m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m4_i16m1(vint8m4_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m4_i16m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i8m4_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m8_i16m1( @@ -66,7 +66,7 @@ vint16m1_t test_vwredsum_vs_i8m4_i16m1(vint8m4_t vector, vint16m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m8_i16m1(vint8m8_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m8_i16m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i8m8_i16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16mf4_i32m1( @@ -75,7 +75,7 @@ vint16m1_t test_vwredsum_vs_i8m8_i16m1(vint8m8_t vector, vint16m1_t scalar, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16mf4_i32m1(vint16mf4_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16mf4_i32m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i16mf4_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16mf2_i32m1( @@ -84,7 +84,7 @@ vint32m1_t test_vwredsum_vs_i16mf4_i32m1(vint16mf4_t vector, vint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16mf2_i32m1(vint16mf2_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16mf2_i32m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i16mf2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m1_i32m1( @@ -93,7 +93,7 @@ vint32m1_t test_vwredsum_vs_i16mf2_i32m1(vint16mf2_t vector, vint32m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m1_i32m1(vint16m1_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m1_i32m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i16m1_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m2_i32m1( @@ -102,7 +102,7 @@ vint32m1_t test_vwredsum_vs_i16m1_i32m1(vint16m1_t vector, vint32m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m2_i32m1(vint16m2_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m2_i32m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i16m2_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m4_i32m1( @@ -111,7 +111,7 @@ vint32m1_t test_vwredsum_vs_i16m2_i32m1(vint16m2_t vector, vint32m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m4_i32m1(vint16m4_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m4_i32m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i16m4_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m8_i32m1( @@ -120,7 +120,7 @@ vint32m1_t test_vwredsum_vs_i16m4_i32m1(vint16m4_t vector, vint32m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m8_i32m1(vint16m8_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m8_i32m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i16m8_i32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32mf2_i64m1( @@ -129,7 +129,7 @@ vint32m1_t test_vwredsum_vs_i16m8_i32m1(vint16m8_t vector, vint32m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32mf2_i64m1(vint32mf2_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32mf2_i64m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i32mf2_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m1_i64m1( @@ -138,7 +138,7 @@ vint64m1_t test_vwredsum_vs_i32mf2_i64m1(vint32mf2_t vector, vint64m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m1_i64m1(vint32m1_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m1_i64m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i32m1_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m2_i64m1( @@ -147,7 +147,7 @@ vint64m1_t test_vwredsum_vs_i32m1_i64m1(vint32m1_t vector, vint64m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m2_i64m1(vint32m2_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m2_i64m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i32m2_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m4_i64m1( @@ -156,7 +156,7 @@ vint64m1_t test_vwredsum_vs_i32m2_i64m1(vint32m2_t vector, vint64m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m4_i64m1(vint32m4_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m4_i64m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i32m4_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m8_i64m1( @@ -165,7 +165,7 @@ vint64m1_t test_vwredsum_vs_i32m4_i64m1(vint32m4_t vector, vint64m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m8_i64m1(vint32m8_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m8_i64m1(vector, scalar, vl); + return __riscv_vwredsum_vs_i32m8_i64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf8_i16m1_m( @@ -174,7 +174,7 @@ vint64m1_t test_vwredsum_vs_i32m8_i64m1(vint32m8_t vector, vint64m1_t scalar, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf8_i16m1_m(vbool64_t mask, vint8mf8_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf8_i16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf8_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf4_i16m1_m( @@ -183,7 +183,7 @@ vint16m1_t test_vwredsum_vs_i8mf8_i16m1_m(vbool64_t mask, vint8mf8_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf4_i16m1_m(vbool32_t mask, vint8mf4_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf2_i16m1_m( @@ -192,7 +192,7 @@ vint16m1_t test_vwredsum_vs_i8mf4_i16m1_m(vbool32_t mask, vint8mf4_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf2_i16m1_m(vbool16_t mask, vint8mf2_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m1_i16m1_m( @@ -201,7 +201,7 @@ vint16m1_t test_vwredsum_vs_i8mf2_i16m1_m(vbool16_t mask, vint8mf2_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m1_i16m1_m(vbool8_t mask, vint8m1_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m1_i16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m1_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m2_i16m1_m( @@ -210,7 +210,7 @@ vint16m1_t test_vwredsum_vs_i8m1_i16m1_m(vbool8_t mask, vint8m1_t vector, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m2_i16m1_m(vbool4_t mask, vint8m2_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m2_i16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m2_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m4_i16m1_m( @@ -219,7 +219,7 @@ vint16m1_t test_vwredsum_vs_i8m2_i16m1_m(vbool4_t mask, vint8m2_t vector, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m4_i16m1_m(vbool2_t mask, vint8m4_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m4_i16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m4_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m8_i16m1_m( @@ -228,7 +228,7 @@ vint16m1_t test_vwredsum_vs_i8m4_i16m1_m(vbool2_t mask, vint8m4_t vector, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m8_i16m1_m(vbool1_t mask, vint8m8_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m8_i16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m8_i16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16mf4_i32m1_m( @@ -237,7 +237,7 @@ vint16m1_t test_vwredsum_vs_i8m8_i16m1_m(vbool1_t mask, vint8m8_t vector, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16mf4_i32m1_m(vbool64_t mask, vint16mf4_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16mf4_i32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i16mf4_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16mf2_i32m1_m( @@ -246,7 +246,7 @@ vint32m1_t test_vwredsum_vs_i16mf4_i32m1_m(vbool64_t mask, vint16mf4_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16mf2_i32m1_m(vbool32_t mask, vint16mf2_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16mf2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i16mf2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m1_i32m1_m( @@ -255,7 +255,7 @@ vint32m1_t test_vwredsum_vs_i16mf2_i32m1_m(vbool32_t mask, vint16mf2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m1_i32m1_m(vbool16_t mask, vint16m1_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m1_i32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m1_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m2_i32m1_m( @@ -264,7 +264,7 @@ vint32m1_t test_vwredsum_vs_i16m1_i32m1_m(vbool16_t mask, vint16m1_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m2_i32m1_m(vbool8_t mask, vint16m2_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m2_i32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m2_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m4_i32m1_m( @@ -273,7 +273,7 @@ vint32m1_t test_vwredsum_vs_i16m2_i32m1_m(vbool8_t mask, vint16m2_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m4_i32m1_m(vbool4_t mask, vint16m4_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m4_i32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m4_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m8_i32m1_m( @@ -282,7 +282,7 @@ vint32m1_t test_vwredsum_vs_i16m4_i32m1_m(vbool4_t mask, vint16m4_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m8_i32m1_m(vbool2_t mask, vint16m8_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m8_i32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m8_i32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32mf2_i64m1_m( @@ -291,7 +291,7 @@ vint32m1_t test_vwredsum_vs_i16m8_i32m1_m(vbool2_t mask, vint16m8_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32mf2_i64m1_m(vbool64_t mask, vint32mf2_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32mf2_i64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i32mf2_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m1_i64m1_m( @@ -300,7 +300,7 @@ vint64m1_t test_vwredsum_vs_i32mf2_i64m1_m(vbool64_t mask, vint32mf2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m1_i64m1_m(vbool32_t mask, vint32m1_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m1_i64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m1_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m2_i64m1_m( @@ -309,7 +309,7 @@ vint64m1_t test_vwredsum_vs_i32m1_i64m1_m(vbool32_t mask, vint32m1_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m2_i64m1_m(vbool16_t mask, vint32m2_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m2_i64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m2_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m4_i64m1_m( @@ -318,7 +318,7 @@ vint64m1_t test_vwredsum_vs_i32m2_i64m1_m(vbool16_t mask, vint32m2_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m4_i64m1_m(vbool8_t mask, vint32m4_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m4_i64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m4_i64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m8_i64m1_m( @@ -327,6 +327,6 @@ vint64m1_t test_vwredsum_vs_i32m4_i64m1_m(vbool8_t mask, vint32m4_t vector, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m8_i64m1_m(vbool4_t mask, vint32m8_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m8_i64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m8_i64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwredsumu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwredsumu.c index d0fde2644122c9fa220de3fad265e8f14a34f0e9..e310e46e59f8db3adb69671648a570093924542b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwredsumu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwredsumu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf8_u16m1(vuint8mf8_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf8_u16m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf8_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf4_u16m1( @@ -21,7 +21,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf8_u16m1(vuint8mf8_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf4_u16m1(vuint8mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf4_u16m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf2_u16m1( @@ -30,7 +30,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf4_u16m1(vuint8mf4_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf2_u16m1(vuint8mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf2_u16m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m1_u16m1( @@ -39,7 +39,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf2_u16m1(vuint8mf2_t vector, vuint16m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m1_u16m1(vuint8m1_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m1_u16m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m1_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m2_u16m1( @@ -48,7 +48,7 @@ vuint16m1_t test_vwredsumu_vs_u8m1_u16m1(vuint8m1_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m2_u16m1(vuint8m2_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m2_u16m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m2_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m4_u16m1( @@ -57,7 +57,7 @@ vuint16m1_t test_vwredsumu_vs_u8m2_u16m1(vuint8m2_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m4_u16m1(vuint8m4_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m4_u16m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m4_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m8_u16m1( @@ -66,7 +66,7 @@ vuint16m1_t test_vwredsumu_vs_u8m4_u16m1(vuint8m4_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m8_u16m1(vuint8m8_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m8_u16m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m8_u16m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16mf4_u32m1( @@ -75,7 +75,7 @@ vuint16m1_t test_vwredsumu_vs_u8m8_u16m1(vuint8m8_t vector, vuint16m1_t scalar, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16mf4_u32m1(vuint16mf4_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16mf4_u32m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u16mf4_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16mf2_u32m1( @@ -84,7 +84,7 @@ vuint32m1_t test_vwredsumu_vs_u16mf4_u32m1(vuint16mf4_t vector, vuint32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16mf2_u32m1(vuint16mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16mf2_u32m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u16mf2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m1_u32m1( @@ -93,7 +93,7 @@ vuint32m1_t test_vwredsumu_vs_u16mf2_u32m1(vuint16mf2_t vector, vuint32m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m1_u32m1(vuint16m1_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m1_u32m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m1_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m2_u32m1( @@ -102,7 +102,7 @@ vuint32m1_t test_vwredsumu_vs_u16m1_u32m1(vuint16m1_t vector, vuint32m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m2_u32m1(vuint16m2_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m2_u32m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m2_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m4_u32m1( @@ -111,7 +111,7 @@ vuint32m1_t test_vwredsumu_vs_u16m2_u32m1(vuint16m2_t vector, vuint32m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m4_u32m1(vuint16m4_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m4_u32m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m4_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m8_u32m1( @@ -120,7 +120,7 @@ vuint32m1_t test_vwredsumu_vs_u16m4_u32m1(vuint16m4_t vector, vuint32m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m8_u32m1(vuint16m8_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m8_u32m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m8_u32m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32mf2_u64m1( @@ -129,7 +129,7 @@ vuint32m1_t test_vwredsumu_vs_u16m8_u32m1(vuint16m8_t vector, vuint32m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32mf2_u64m1(vuint32mf2_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32mf2_u64m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u32mf2_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m1_u64m1( @@ -138,7 +138,7 @@ vuint64m1_t test_vwredsumu_vs_u32mf2_u64m1(vuint32mf2_t vector, vuint64m1_t scal // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m1_u64m1(vuint32m1_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m1_u64m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m1_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m2_u64m1( @@ -147,7 +147,7 @@ vuint64m1_t test_vwredsumu_vs_u32m1_u64m1(vuint32m1_t vector, vuint64m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m2_u64m1(vuint32m2_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m2_u64m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m2_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m4_u64m1( @@ -156,7 +156,7 @@ vuint64m1_t test_vwredsumu_vs_u32m2_u64m1(vuint32m2_t vector, vuint64m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m4_u64m1(vuint32m4_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m4_u64m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m4_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m8_u64m1( @@ -165,7 +165,7 @@ vuint64m1_t test_vwredsumu_vs_u32m4_u64m1(vuint32m4_t vector, vuint64m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m8_u64m1(vuint32m8_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m8_u64m1(vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m8_u64m1(vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf8_u16m1_m( @@ -174,7 +174,7 @@ vuint64m1_t test_vwredsumu_vs_u32m8_u64m1(vuint32m8_t vector, vuint64m1_t scalar // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf8_u16m1_m(vbool64_t mask, vuint8mf8_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf8_u16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf8_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf4_u16m1_m( @@ -183,7 +183,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf8_u16m1_m(vbool64_t mask, vuint8mf8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf4_u16m1_m(vbool32_t mask, vuint8mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf2_u16m1_m( @@ -192,7 +192,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf4_u16m1_m(vbool32_t mask, vuint8mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf2_u16m1_m(vbool16_t mask, vuint8mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m1_u16m1_m( @@ -201,7 +201,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf2_u16m1_m(vbool16_t mask, vuint8mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m1_u16m1_m(vbool8_t mask, vuint8m1_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m1_u16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m1_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m2_u16m1_m( @@ -210,7 +210,7 @@ vuint16m1_t test_vwredsumu_vs_u8m1_u16m1_m(vbool8_t mask, vuint8m1_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m2_u16m1_m(vbool4_t mask, vuint8m2_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m2_u16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m2_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m4_u16m1_m( @@ -219,7 +219,7 @@ vuint16m1_t test_vwredsumu_vs_u8m2_u16m1_m(vbool4_t mask, vuint8m2_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m4_u16m1_m(vbool2_t mask, vuint8m4_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m4_u16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m4_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m8_u16m1_m( @@ -228,7 +228,7 @@ vuint16m1_t test_vwredsumu_vs_u8m4_u16m1_m(vbool2_t mask, vuint8m4_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m8_u16m1_m(vbool1_t mask, vuint8m8_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m8_u16m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m8_u16m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16mf4_u32m1_m( @@ -237,7 +237,7 @@ vuint16m1_t test_vwredsumu_vs_u8m8_u16m1_m(vbool1_t mask, vuint8m8_t vector, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16mf4_u32m1_m(vbool64_t mask, vuint16mf4_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16mf4_u32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16mf4_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16mf2_u32m1_m( @@ -246,7 +246,7 @@ vuint32m1_t test_vwredsumu_vs_u16mf4_u32m1_m(vbool64_t mask, vuint16mf4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16mf2_u32m1_m(vbool32_t mask, vuint16mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16mf2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16mf2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m1_u32m1_m( @@ -255,7 +255,7 @@ vuint32m1_t test_vwredsumu_vs_u16mf2_u32m1_m(vbool32_t mask, vuint16mf2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m1_u32m1_m(vbool16_t mask, vuint16m1_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m1_u32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m1_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m2_u32m1_m( @@ -264,7 +264,7 @@ vuint32m1_t test_vwredsumu_vs_u16m1_u32m1_m(vbool16_t mask, vuint16m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m2_u32m1_m(vbool8_t mask, vuint16m2_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m2_u32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m2_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m4_u32m1_m( @@ -273,7 +273,7 @@ vuint32m1_t test_vwredsumu_vs_u16m2_u32m1_m(vbool8_t mask, vuint16m2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m4_u32m1_m(vbool4_t mask, vuint16m4_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m4_u32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m4_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m8_u32m1_m( @@ -282,7 +282,7 @@ vuint32m1_t test_vwredsumu_vs_u16m4_u32m1_m(vbool4_t mask, vuint16m4_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m8_u32m1_m(vbool2_t mask, vuint16m8_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m8_u32m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m8_u32m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32mf2_u64m1_m( @@ -291,7 +291,7 @@ vuint32m1_t test_vwredsumu_vs_u16m8_u32m1_m(vbool2_t mask, vuint16m8_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32mf2_u64m1_m(vbool64_t mask, vuint32mf2_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32mf2_u64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32mf2_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m1_u64m1_m( @@ -300,7 +300,7 @@ vuint64m1_t test_vwredsumu_vs_u32mf2_u64m1_m(vbool64_t mask, vuint32mf2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m1_u64m1_m(vbool32_t mask, vuint32m1_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m1_u64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m1_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m2_u64m1_m( @@ -309,7 +309,7 @@ vuint64m1_t test_vwredsumu_vs_u32m1_u64m1_m(vbool32_t mask, vuint32m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m2_u64m1_m(vbool16_t mask, vuint32m2_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m2_u64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m2_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m4_u64m1_m( @@ -318,7 +318,7 @@ vuint64m1_t test_vwredsumu_vs_u32m2_u64m1_m(vbool16_t mask, vuint32m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m4_u64m1_m(vbool8_t mask, vuint32m4_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m4_u64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m4_u64m1_m(mask, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m8_u64m1_m( @@ -327,6 +327,6 @@ vuint64m1_t test_vwredsumu_vs_u32m4_u64m1_m(vbool8_t mask, vuint32m4_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m8_u64m1_m(vbool4_t mask, vuint32m8_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m8_u64m1_m(mask, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m8_u64m1_m(mask, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsub.c index d11a8f88334b8f9a9b4b8b1192fd138bccb4d010..feae78f6103c652fe7d80cd9292eaa53d428b492 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vv_i16mf4(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_vv_i16mf4(op1, op2, vl); + return __riscv_vwsub_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf4( @@ -21,7 +21,7 @@ vint16mf4_t test_vwsub_vv_i16mf4(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vx_i16mf4(vint8mf8_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf4(op1, op2, vl); + return __riscv_vwsub_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf4( @@ -30,7 +30,7 @@ vint16mf4_t test_vwsub_vx_i16mf4(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wv_i16mf4(vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_wv_i16mf4(op1, op2, vl); + return __riscv_vwsub_wv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf4( @@ -39,7 +39,7 @@ vint16mf4_t test_vwsub_wv_i16mf4(vint16mf4_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wx_i16mf4(vint16mf4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf4(op1, op2, vl); + return __riscv_vwsub_wx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf2( @@ -48,7 +48,7 @@ vint16mf4_t test_vwsub_wx_i16mf4(vint16mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vv_i16mf2(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_vv_i16mf2(op1, op2, vl); + return __riscv_vwsub_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf2( @@ -57,7 +57,7 @@ vint16mf2_t test_vwsub_vv_i16mf2(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vx_i16mf2(vint8mf4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf2(op1, op2, vl); + return __riscv_vwsub_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf2( @@ -66,7 +66,7 @@ vint16mf2_t test_vwsub_vx_i16mf2(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wv_i16mf2(vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_wv_i16mf2(op1, op2, vl); + return __riscv_vwsub_wv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf2( @@ -75,7 +75,7 @@ vint16mf2_t test_vwsub_wv_i16mf2(vint16mf2_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wx_i16mf2(vint16mf2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf2(op1, op2, vl); + return __riscv_vwsub_wx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m1( @@ -84,7 +84,7 @@ vint16mf2_t test_vwsub_wx_i16mf2(vint16mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vv_i16m1(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_vv_i16m1(op1, op2, vl); + return __riscv_vwsub_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m1( @@ -93,7 +93,7 @@ vint16m1_t test_vwsub_vv_i16m1(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vx_i16m1(vint8mf2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m1(op1, op2, vl); + return __riscv_vwsub_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m1( @@ -102,7 +102,7 @@ vint16m1_t test_vwsub_vx_i16m1(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wv_i16m1(vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_wv_i16m1(op1, op2, vl); + return __riscv_vwsub_wv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m1( @@ -111,7 +111,7 @@ vint16m1_t test_vwsub_wv_i16m1(vint16m1_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wx_i16m1(vint16m1_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m1(op1, op2, vl); + return __riscv_vwsub_wx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m2( @@ -120,7 +120,7 @@ vint16m1_t test_vwsub_wx_i16m1(vint16m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vv_i16m2(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwsub_vv_i16m2(op1, op2, vl); + return __riscv_vwsub_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m2( @@ -129,7 +129,7 @@ vint16m2_t test_vwsub_vv_i16m2(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vx_i16m2(vint8m1_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m2(op1, op2, vl); + return __riscv_vwsub_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m2( @@ -138,7 +138,7 @@ vint16m2_t test_vwsub_vx_i16m2(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wv_i16m2(vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwsub_wv_i16m2(op1, op2, vl); + return __riscv_vwsub_wv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m2( @@ -147,7 +147,7 @@ vint16m2_t test_vwsub_wv_i16m2(vint16m2_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wx_i16m2(vint16m2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m2(op1, op2, vl); + return __riscv_vwsub_wx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m4( @@ -156,7 +156,7 @@ vint16m2_t test_vwsub_wx_i16m2(vint16m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vv_i16m4(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwsub_vv_i16m4(op1, op2, vl); + return __riscv_vwsub_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m4( @@ -165,7 +165,7 @@ vint16m4_t test_vwsub_vv_i16m4(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vx_i16m4(vint8m2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m4(op1, op2, vl); + return __riscv_vwsub_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m4( @@ -174,7 +174,7 @@ vint16m4_t test_vwsub_vx_i16m4(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wv_i16m4(vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwsub_wv_i16m4(op1, op2, vl); + return __riscv_vwsub_wv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m4( @@ -183,7 +183,7 @@ vint16m4_t test_vwsub_wv_i16m4(vint16m4_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wx_i16m4(vint16m4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m4(op1, op2, vl); + return __riscv_vwsub_wx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m8( @@ -192,7 +192,7 @@ vint16m4_t test_vwsub_wx_i16m4(vint16m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vv_i16m8(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwsub_vv_i16m8(op1, op2, vl); + return __riscv_vwsub_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m8( @@ -201,7 +201,7 @@ vint16m8_t test_vwsub_vv_i16m8(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vx_i16m8(vint8m4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m8(op1, op2, vl); + return __riscv_vwsub_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m8( @@ -210,7 +210,7 @@ vint16m8_t test_vwsub_vx_i16m8(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wv_i16m8(vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwsub_wv_i16m8(op1, op2, vl); + return __riscv_vwsub_wv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m8( @@ -219,7 +219,7 @@ vint16m8_t test_vwsub_wv_i16m8(vint16m8_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wx_i16m8(vint16m8_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m8(op1, op2, vl); + return __riscv_vwsub_wx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32mf2( @@ -228,7 +228,7 @@ vint16m8_t test_vwsub_wx_i16m8(vint16m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vv_i32mf2(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_vv_i32mf2(op1, op2, vl); + return __riscv_vwsub_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32mf2( @@ -237,7 +237,7 @@ vint32mf2_t test_vwsub_vv_i32mf2(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vx_i32mf2(vint16mf4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32mf2(op1, op2, vl); + return __riscv_vwsub_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32mf2( @@ -246,7 +246,7 @@ vint32mf2_t test_vwsub_vx_i32mf2(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wv_i32mf2(vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_wv_i32mf2(op1, op2, vl); + return __riscv_vwsub_wv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vwsub_wv_i32mf2(vint32mf2_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wx_i32mf2(vint32mf2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32mf2(op1, op2, vl); + return __riscv_vwsub_wx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vwsub_wx_i32mf2(vint32mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vv_i32m1(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_vv_i32m1(op1, op2, vl); + return __riscv_vwsub_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vwsub_vv_i32m1(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vx_i32m1(vint16mf2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m1(op1, op2, vl); + return __riscv_vwsub_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m1( @@ -282,7 +282,7 @@ vint32m1_t test_vwsub_vx_i32m1(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wv_i32m1(vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_wv_i32m1(op1, op2, vl); + return __riscv_vwsub_wv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m1( @@ -291,7 +291,7 @@ vint32m1_t test_vwsub_wv_i32m1(vint32m1_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wx_i32m1(vint32m1_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m1(op1, op2, vl); + return __riscv_vwsub_wx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m2( @@ -300,7 +300,7 @@ vint32m1_t test_vwsub_wx_i32m1(vint32m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vv_i32m2(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwsub_vv_i32m2(op1, op2, vl); + return __riscv_vwsub_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m2( @@ -309,7 +309,7 @@ vint32m2_t test_vwsub_vv_i32m2(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vx_i32m2(vint16m1_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m2(op1, op2, vl); + return __riscv_vwsub_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m2( @@ -318,7 +318,7 @@ vint32m2_t test_vwsub_vx_i32m2(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wv_i32m2(vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwsub_wv_i32m2(op1, op2, vl); + return __riscv_vwsub_wv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m2( @@ -327,7 +327,7 @@ vint32m2_t test_vwsub_wv_i32m2(vint32m2_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wx_i32m2(vint32m2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m2(op1, op2, vl); + return __riscv_vwsub_wx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m4( @@ -336,7 +336,7 @@ vint32m2_t test_vwsub_wx_i32m2(vint32m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vv_i32m4(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwsub_vv_i32m4(op1, op2, vl); + return __riscv_vwsub_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m4( @@ -345,7 +345,7 @@ vint32m4_t test_vwsub_vv_i32m4(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vx_i32m4(vint16m2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m4(op1, op2, vl); + return __riscv_vwsub_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m4( @@ -354,7 +354,7 @@ vint32m4_t test_vwsub_vx_i32m4(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wv_i32m4(vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwsub_wv_i32m4(op1, op2, vl); + return __riscv_vwsub_wv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m4( @@ -363,7 +363,7 @@ vint32m4_t test_vwsub_wv_i32m4(vint32m4_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wx_i32m4(vint32m4_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m4(op1, op2, vl); + return __riscv_vwsub_wx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m8( @@ -372,7 +372,7 @@ vint32m4_t test_vwsub_wx_i32m4(vint32m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vv_i32m8(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwsub_vv_i32m8(op1, op2, vl); + return __riscv_vwsub_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m8( @@ -381,7 +381,7 @@ vint32m8_t test_vwsub_vv_i32m8(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vx_i32m8(vint16m4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m8(op1, op2, vl); + return __riscv_vwsub_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m8( @@ -390,7 +390,7 @@ vint32m8_t test_vwsub_vx_i32m8(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wv_i32m8(vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwsub_wv_i32m8(op1, op2, vl); + return __riscv_vwsub_wv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m8( @@ -399,7 +399,7 @@ vint32m8_t test_vwsub_wv_i32m8(vint32m8_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wx_i32m8(vint32m8_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m8(op1, op2, vl); + return __riscv_vwsub_wx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m1( @@ -408,7 +408,7 @@ vint32m8_t test_vwsub_wx_i32m8(vint32m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vv_i64m1(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_vv_i64m1(op1, op2, vl); + return __riscv_vwsub_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m1( @@ -417,7 +417,7 @@ vint64m1_t test_vwsub_vv_i64m1(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vx_i64m1(vint32mf2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m1(op1, op2, vl); + return __riscv_vwsub_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m1( @@ -426,7 +426,7 @@ vint64m1_t test_vwsub_vx_i64m1(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wv_i64m1(vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_wv_i64m1(op1, op2, vl); + return __riscv_vwsub_wv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m1( @@ -435,7 +435,7 @@ vint64m1_t test_vwsub_wv_i64m1(vint64m1_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wx_i64m1(vint64m1_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m1(op1, op2, vl); + return __riscv_vwsub_wx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m2( @@ -444,7 +444,7 @@ vint64m1_t test_vwsub_wx_i64m1(vint64m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vv_i64m2(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwsub_vv_i64m2(op1, op2, vl); + return __riscv_vwsub_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m2( @@ -453,7 +453,7 @@ vint64m2_t test_vwsub_vv_i64m2(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vx_i64m2(vint32m1_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m2(op1, op2, vl); + return __riscv_vwsub_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m2( @@ -462,7 +462,7 @@ vint64m2_t test_vwsub_vx_i64m2(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wv_i64m2(vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwsub_wv_i64m2(op1, op2, vl); + return __riscv_vwsub_wv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m2( @@ -471,7 +471,7 @@ vint64m2_t test_vwsub_wv_i64m2(vint64m2_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wx_i64m2(vint64m2_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m2(op1, op2, vl); + return __riscv_vwsub_wx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m4( @@ -480,7 +480,7 @@ vint64m2_t test_vwsub_wx_i64m2(vint64m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vv_i64m4(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwsub_vv_i64m4(op1, op2, vl); + return __riscv_vwsub_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m4( @@ -489,7 +489,7 @@ vint64m4_t test_vwsub_vv_i64m4(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vx_i64m4(vint32m2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m4(op1, op2, vl); + return __riscv_vwsub_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m4( @@ -498,7 +498,7 @@ vint64m4_t test_vwsub_vx_i64m4(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wv_i64m4(vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwsub_wv_i64m4(op1, op2, vl); + return __riscv_vwsub_wv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m4( @@ -507,7 +507,7 @@ vint64m4_t test_vwsub_wv_i64m4(vint64m4_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wx_i64m4(vint64m4_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m4(op1, op2, vl); + return __riscv_vwsub_wx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m8( @@ -516,7 +516,7 @@ vint64m4_t test_vwsub_wx_i64m4(vint64m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vv_i64m8(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwsub_vv_i64m8(op1, op2, vl); + return __riscv_vwsub_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m8( @@ -525,7 +525,7 @@ vint64m8_t test_vwsub_vv_i64m8(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vx_i64m8(vint32m4_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m8(op1, op2, vl); + return __riscv_vwsub_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m8( @@ -534,7 +534,7 @@ vint64m8_t test_vwsub_vx_i64m8(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wv_i64m8(vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwsub_wv_i64m8(op1, op2, vl); + return __riscv_vwsub_wv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m8( @@ -543,7 +543,7 @@ vint64m8_t test_vwsub_wv_i64m8(vint64m8_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wx_i64m8(vint64m8_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m8(op1, op2, vl); + return __riscv_vwsub_wx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf4_m( @@ -552,7 +552,7 @@ vint64m8_t test_vwsub_wx_i64m8(vint64m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vv_i16mf4_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf4_m( @@ -561,7 +561,7 @@ vint16mf4_t test_vwsub_vv_i16mf4_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vx_i16mf4_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf4_m( @@ -570,7 +570,7 @@ vint16mf4_t test_vwsub_vx_i16mf4_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_wv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf4_m( @@ -579,7 +579,7 @@ vint16mf4_t test_vwsub_wv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf2_m( @@ -588,7 +588,7 @@ vint16mf4_t test_vwsub_wx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vv_i16mf2_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf2_m( @@ -597,7 +597,7 @@ vint16mf2_t test_vwsub_vv_i16mf2_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vx_i16mf2_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf2_m( @@ -606,7 +606,7 @@ vint16mf2_t test_vwsub_vx_i16mf2_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_wv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf2_m( @@ -615,7 +615,7 @@ vint16mf2_t test_vwsub_wv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m1_m( @@ -624,7 +624,7 @@ vint16mf2_t test_vwsub_wx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vv_i16m1_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m1_m( @@ -633,7 +633,7 @@ vint16m1_t test_vwsub_vv_i16m1_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vx_i16m1_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m1_m( @@ -642,7 +642,7 @@ vint16m1_t test_vwsub_vx_i16m1_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_wv_i16m1_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m1_m( @@ -651,7 +651,7 @@ vint16m1_t test_vwsub_wv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wx_i16m1_m(vbool16_t mask, vint16m1_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m1_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m2_m( @@ -660,7 +660,7 @@ vint16m1_t test_vwsub_wx_i16m1_m(vbool16_t mask, vint16m1_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vv_i16m2_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwsub_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m2_m( @@ -669,7 +669,7 @@ vint16m2_t test_vwsub_vv_i16m2_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vx_i16m2_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m2_m( @@ -678,7 +678,7 @@ vint16m2_t test_vwsub_vx_i16m2_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwsub_wv_i16m2_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m2_m( @@ -687,7 +687,7 @@ vint16m2_t test_vwsub_wv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint8m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wx_i16m2_m(vbool8_t mask, vint16m2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m2_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m4_m( @@ -696,7 +696,7 @@ vint16m2_t test_vwsub_wx_i16m2_m(vbool8_t mask, vint16m2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vv_i16m4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwsub_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m4_m( @@ -705,7 +705,7 @@ vint16m4_t test_vwsub_vv_i16m4_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vx_i16m4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m4_m( @@ -714,7 +714,7 @@ vint16m4_t test_vwsub_vx_i16m4_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwsub_wv_i16m4_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m4_m( @@ -723,7 +723,7 @@ vint16m4_t test_vwsub_wv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint8m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wx_i16m4_m(vbool4_t mask, vint16m4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m4_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m8_m( @@ -732,7 +732,7 @@ vint16m4_t test_vwsub_wx_i16m4_m(vbool4_t mask, vint16m4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vv_i16m8_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwsub_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m8_m( @@ -741,7 +741,7 @@ vint16m8_t test_vwsub_vv_i16m8_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vx_i16m8_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m8_m( @@ -750,7 +750,7 @@ vint16m8_t test_vwsub_vx_i16m8_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwsub_wv_i16m8_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m8_m( @@ -759,7 +759,7 @@ vint16m8_t test_vwsub_wv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint8m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wx_i16m8_m(vbool2_t mask, vint16m8_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m8_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32mf2_m( @@ -768,7 +768,7 @@ vint16m8_t test_vwsub_wx_i16m8_m(vbool2_t mask, vint16m8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vv_i32mf2_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32mf2_m( @@ -777,7 +777,7 @@ vint32mf2_t test_vwsub_vv_i32mf2_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vx_i32mf2_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32mf2_m( @@ -786,7 +786,7 @@ vint32mf2_t test_vwsub_vx_i32mf2_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_wv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32mf2_m( @@ -795,7 +795,7 @@ vint32mf2_t test_vwsub_wv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m1_m( @@ -804,7 +804,7 @@ vint32mf2_t test_vwsub_wx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vv_i32m1_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m1_m( @@ -813,7 +813,7 @@ vint32m1_t test_vwsub_vv_i32m1_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vx_i32m1_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m1_m( @@ -822,7 +822,7 @@ vint32m1_t test_vwsub_vx_i32m1_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_wv_i32m1_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m1_m( @@ -831,7 +831,7 @@ vint32m1_t test_vwsub_wv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint16mf2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wx_i32m1_m(vbool32_t mask, vint32m1_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m1_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m2_m( @@ -840,7 +840,7 @@ vint32m1_t test_vwsub_wx_i32m1_m(vbool32_t mask, vint32m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vv_i32m2_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwsub_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m2_m( @@ -849,7 +849,7 @@ vint32m2_t test_vwsub_vv_i32m2_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vx_i32m2_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m2_m( @@ -858,7 +858,7 @@ vint32m2_t test_vwsub_vx_i32m2_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwsub_wv_i32m2_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m2_m( @@ -867,7 +867,7 @@ vint32m2_t test_vwsub_wv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wx_i32m2_m(vbool16_t mask, vint32m2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m2_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m4_m( @@ -876,7 +876,7 @@ vint32m2_t test_vwsub_wx_i32m2_m(vbool16_t mask, vint32m2_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vv_i32m4_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwsub_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m4_m( @@ -885,7 +885,7 @@ vint32m4_t test_vwsub_vv_i32m4_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vx_i32m4_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m4_m( @@ -894,7 +894,7 @@ vint32m4_t test_vwsub_vx_i32m4_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwsub_wv_i32m4_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m4_m( @@ -903,7 +903,7 @@ vint32m4_t test_vwsub_wv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wx_i32m4_m(vbool8_t mask, vint32m4_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m4_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m8_m( @@ -912,7 +912,7 @@ vint32m4_t test_vwsub_wx_i32m4_m(vbool8_t mask, vint32m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vv_i32m8_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwsub_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m8_m( @@ -921,7 +921,7 @@ vint32m8_t test_vwsub_vv_i32m8_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vx_i32m8_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m8_m( @@ -930,7 +930,7 @@ vint32m8_t test_vwsub_vx_i32m8_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwsub_wv_i32m8_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m8_m( @@ -939,7 +939,7 @@ vint32m8_t test_vwsub_wv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wx_i32m8_m(vbool4_t mask, vint32m8_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m8_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m1_m( @@ -948,7 +948,7 @@ vint32m8_t test_vwsub_wx_i32m8_m(vbool4_t mask, vint32m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vv_i64m1_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m1_m( @@ -957,7 +957,7 @@ vint64m1_t test_vwsub_vv_i64m1_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vx_i64m1_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m1_m( @@ -966,7 +966,7 @@ vint64m1_t test_vwsub_vx_i64m1_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_wv_i64m1_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m1_m( @@ -975,7 +975,7 @@ vint64m1_t test_vwsub_wv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint32mf2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wx_i64m1_m(vbool64_t mask, vint64m1_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m1_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m2_m( @@ -984,7 +984,7 @@ vint64m1_t test_vwsub_wx_i64m1_m(vbool64_t mask, vint64m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vv_i64m2_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwsub_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m2_m( @@ -993,7 +993,7 @@ vint64m2_t test_vwsub_vv_i64m2_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vx_i64m2_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m2_m( @@ -1002,7 +1002,7 @@ vint64m2_t test_vwsub_vx_i64m2_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwsub_wv_i64m2_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m2_m( @@ -1011,7 +1011,7 @@ vint64m2_t test_vwsub_wv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wx_i64m2_m(vbool32_t mask, vint64m2_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m2_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m4_m( @@ -1020,7 +1020,7 @@ vint64m2_t test_vwsub_wx_i64m2_m(vbool32_t mask, vint64m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vv_i64m4_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwsub_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m4_m( @@ -1029,7 +1029,7 @@ vint64m4_t test_vwsub_vv_i64m4_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vx_i64m4_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m4_m( @@ -1038,7 +1038,7 @@ vint64m4_t test_vwsub_vx_i64m4_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwsub_wv_i64m4_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m4_m( @@ -1047,7 +1047,7 @@ vint64m4_t test_vwsub_wv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wx_i64m4_m(vbool16_t mask, vint64m4_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m4_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m8_m( @@ -1056,7 +1056,7 @@ vint64m4_t test_vwsub_wx_i64m4_m(vbool16_t mask, vint64m4_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vv_i64m8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwsub_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vwsub_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m8_m( @@ -1065,7 +1065,7 @@ vint64m8_t test_vwsub_vv_i64m8_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vx_i64m8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vwsub_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m8_m( @@ -1074,7 +1074,7 @@ vint64m8_t test_vwsub_vx_i64m8_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwsub_wv_i64m8_m(mask, op1, op2, vl); + return __riscv_vwsub_wv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m8_m( @@ -1083,6 +1083,6 @@ vint64m8_t test_vwsub_wv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wx_i64m8_m(vbool8_t mask, vint64m8_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m8_m(mask, op1, op2, vl); + return __riscv_vwsub_wx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsubu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsubu.c index 4daa6d6ed6f3b9e4f4f8f7d4ca4f9f654408702c..0d3464570f136fb11c390684d046155b42851cf7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsubu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vwsubu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vv_u16mf4(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_vv_u16mf4(op1, op2, vl); + return __riscv_vwsubu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf4( @@ -21,7 +21,7 @@ vuint16mf4_t test_vwsubu_vv_u16mf4(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vx_u16mf4(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf4(op1, op2, vl); + return __riscv_vwsubu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf4( @@ -30,7 +30,7 @@ vuint16mf4_t test_vwsubu_vx_u16mf4(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wv_u16mf4(vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_wv_u16mf4(op1, op2, vl); + return __riscv_vwsubu_wv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf4( @@ -39,7 +39,7 @@ vuint16mf4_t test_vwsubu_wv_u16mf4(vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wx_u16mf4(vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf4(op1, op2, vl); + return __riscv_vwsubu_wx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf2( @@ -48,7 +48,7 @@ vuint16mf4_t test_vwsubu_wx_u16mf4(vuint16mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vv_u16mf2(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_vv_u16mf2(op1, op2, vl); + return __riscv_vwsubu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf2( @@ -57,7 +57,7 @@ vuint16mf2_t test_vwsubu_vv_u16mf2(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vx_u16mf2(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf2(op1, op2, vl); + return __riscv_vwsubu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf2( @@ -66,7 +66,7 @@ vuint16mf2_t test_vwsubu_vx_u16mf2(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wv_u16mf2(vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_wv_u16mf2(op1, op2, vl); + return __riscv_vwsubu_wv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf2( @@ -75,7 +75,7 @@ vuint16mf2_t test_vwsubu_wv_u16mf2(vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wx_u16mf2(vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf2(op1, op2, vl); + return __riscv_vwsubu_wx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m1( @@ -84,7 +84,7 @@ vuint16mf2_t test_vwsubu_wx_u16mf2(vuint16mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vv_u16m1(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_vv_u16m1(op1, op2, vl); + return __riscv_vwsubu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m1( @@ -93,7 +93,7 @@ vuint16m1_t test_vwsubu_vv_u16m1(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vx_u16m1(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m1(op1, op2, vl); + return __riscv_vwsubu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m1( @@ -102,7 +102,7 @@ vuint16m1_t test_vwsubu_vx_u16m1(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wv_u16m1(vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_wv_u16m1(op1, op2, vl); + return __riscv_vwsubu_wv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m1( @@ -111,7 +111,7 @@ vuint16m1_t test_vwsubu_wv_u16m1(vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wx_u16m1(vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m1(op1, op2, vl); + return __riscv_vwsubu_wx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m2( @@ -120,7 +120,7 @@ vuint16m1_t test_vwsubu_wx_u16m1(vuint16m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vv_u16m2(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_vv_u16m2(op1, op2, vl); + return __riscv_vwsubu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m2( @@ -129,7 +129,7 @@ vuint16m2_t test_vwsubu_vv_u16m2(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vx_u16m2(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m2(op1, op2, vl); + return __riscv_vwsubu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m2( @@ -138,7 +138,7 @@ vuint16m2_t test_vwsubu_vx_u16m2(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wv_u16m2(vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_wv_u16m2(op1, op2, vl); + return __riscv_vwsubu_wv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m2( @@ -147,7 +147,7 @@ vuint16m2_t test_vwsubu_wv_u16m2(vuint16m2_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wx_u16m2(vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m2(op1, op2, vl); + return __riscv_vwsubu_wx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m4( @@ -156,7 +156,7 @@ vuint16m2_t test_vwsubu_wx_u16m2(vuint16m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vv_u16m4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_vv_u16m4(op1, op2, vl); + return __riscv_vwsubu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m4( @@ -165,7 +165,7 @@ vuint16m4_t test_vwsubu_vv_u16m4(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vx_u16m4(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m4(op1, op2, vl); + return __riscv_vwsubu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m4( @@ -174,7 +174,7 @@ vuint16m4_t test_vwsubu_vx_u16m4(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wv_u16m4(vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_wv_u16m4(op1, op2, vl); + return __riscv_vwsubu_wv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m4( @@ -183,7 +183,7 @@ vuint16m4_t test_vwsubu_wv_u16m4(vuint16m4_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wx_u16m4(vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m4(op1, op2, vl); + return __riscv_vwsubu_wx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m8( @@ -192,7 +192,7 @@ vuint16m4_t test_vwsubu_wx_u16m4(vuint16m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vv_u16m8(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_vv_u16m8(op1, op2, vl); + return __riscv_vwsubu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m8( @@ -201,7 +201,7 @@ vuint16m8_t test_vwsubu_vv_u16m8(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vx_u16m8(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m8(op1, op2, vl); + return __riscv_vwsubu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m8( @@ -210,7 +210,7 @@ vuint16m8_t test_vwsubu_vx_u16m8(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wv_u16m8(vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_wv_u16m8(op1, op2, vl); + return __riscv_vwsubu_wv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m8( @@ -219,7 +219,7 @@ vuint16m8_t test_vwsubu_wv_u16m8(vuint16m8_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wx_u16m8(vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m8(op1, op2, vl); + return __riscv_vwsubu_wx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32mf2( @@ -228,7 +228,7 @@ vuint16m8_t test_vwsubu_wx_u16m8(vuint16m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vv_u32mf2(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_vv_u32mf2(op1, op2, vl); + return __riscv_vwsubu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32mf2( @@ -237,7 +237,7 @@ vuint32mf2_t test_vwsubu_vv_u32mf2(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vx_u32mf2(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32mf2(op1, op2, vl); + return __riscv_vwsubu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32mf2( @@ -246,7 +246,7 @@ vuint32mf2_t test_vwsubu_vx_u32mf2(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wv_u32mf2(vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_wv_u32mf2(op1, op2, vl); + return __riscv_vwsubu_wv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vwsubu_wv_u32mf2(vuint32mf2_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wx_u32mf2(vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32mf2(op1, op2, vl); + return __riscv_vwsubu_wx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vwsubu_wx_u32mf2(vuint32mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vv_u32m1(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_vv_u32m1(op1, op2, vl); + return __riscv_vwsubu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vwsubu_vv_u32m1(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vx_u32m1(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m1(op1, op2, vl); + return __riscv_vwsubu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m1( @@ -282,7 +282,7 @@ vuint32m1_t test_vwsubu_vx_u32m1(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wv_u32m1(vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_wv_u32m1(op1, op2, vl); + return __riscv_vwsubu_wv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m1( @@ -291,7 +291,7 @@ vuint32m1_t test_vwsubu_wv_u32m1(vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wx_u32m1(vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m1(op1, op2, vl); + return __riscv_vwsubu_wx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m2( @@ -300,7 +300,7 @@ vuint32m1_t test_vwsubu_wx_u32m1(vuint32m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vv_u32m2(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_vv_u32m2(op1, op2, vl); + return __riscv_vwsubu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m2( @@ -309,7 +309,7 @@ vuint32m2_t test_vwsubu_vv_u32m2(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vx_u32m2(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m2(op1, op2, vl); + return __riscv_vwsubu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m2( @@ -318,7 +318,7 @@ vuint32m2_t test_vwsubu_vx_u32m2(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wv_u32m2(vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_wv_u32m2(op1, op2, vl); + return __riscv_vwsubu_wv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m2( @@ -327,7 +327,7 @@ vuint32m2_t test_vwsubu_wv_u32m2(vuint32m2_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wx_u32m2(vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m2(op1, op2, vl); + return __riscv_vwsubu_wx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m4( @@ -336,7 +336,7 @@ vuint32m2_t test_vwsubu_wx_u32m2(vuint32m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vv_u32m4(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_vv_u32m4(op1, op2, vl); + return __riscv_vwsubu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m4( @@ -345,7 +345,7 @@ vuint32m4_t test_vwsubu_vv_u32m4(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vx_u32m4(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m4(op1, op2, vl); + return __riscv_vwsubu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m4( @@ -354,7 +354,7 @@ vuint32m4_t test_vwsubu_vx_u32m4(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wv_u32m4(vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_wv_u32m4(op1, op2, vl); + return __riscv_vwsubu_wv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m4( @@ -363,7 +363,7 @@ vuint32m4_t test_vwsubu_wv_u32m4(vuint32m4_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wx_u32m4(vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m4(op1, op2, vl); + return __riscv_vwsubu_wx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m8( @@ -372,7 +372,7 @@ vuint32m4_t test_vwsubu_wx_u32m4(vuint32m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vv_u32m8(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_vv_u32m8(op1, op2, vl); + return __riscv_vwsubu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m8( @@ -381,7 +381,7 @@ vuint32m8_t test_vwsubu_vv_u32m8(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vx_u32m8(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m8(op1, op2, vl); + return __riscv_vwsubu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m8( @@ -390,7 +390,7 @@ vuint32m8_t test_vwsubu_vx_u32m8(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wv_u32m8(vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_wv_u32m8(op1, op2, vl); + return __riscv_vwsubu_wv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m8( @@ -399,7 +399,7 @@ vuint32m8_t test_vwsubu_wv_u32m8(vuint32m8_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wx_u32m8(vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m8(op1, op2, vl); + return __riscv_vwsubu_wx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m1( @@ -408,7 +408,7 @@ vuint32m8_t test_vwsubu_wx_u32m8(vuint32m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vv_u64m1(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_vv_u64m1(op1, op2, vl); + return __riscv_vwsubu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m1( @@ -417,7 +417,7 @@ vuint64m1_t test_vwsubu_vv_u64m1(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vx_u64m1(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m1(op1, op2, vl); + return __riscv_vwsubu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m1( @@ -426,7 +426,7 @@ vuint64m1_t test_vwsubu_vx_u64m1(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wv_u64m1(vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_wv_u64m1(op1, op2, vl); + return __riscv_vwsubu_wv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m1( @@ -435,7 +435,7 @@ vuint64m1_t test_vwsubu_wv_u64m1(vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wx_u64m1(vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m1(op1, op2, vl); + return __riscv_vwsubu_wx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m2( @@ -444,7 +444,7 @@ vuint64m1_t test_vwsubu_wx_u64m1(vuint64m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vv_u64m2(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_vv_u64m2(op1, op2, vl); + return __riscv_vwsubu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m2( @@ -453,7 +453,7 @@ vuint64m2_t test_vwsubu_vv_u64m2(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vx_u64m2(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m2(op1, op2, vl); + return __riscv_vwsubu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m2( @@ -462,7 +462,7 @@ vuint64m2_t test_vwsubu_vx_u64m2(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wv_u64m2(vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_wv_u64m2(op1, op2, vl); + return __riscv_vwsubu_wv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m2( @@ -471,7 +471,7 @@ vuint64m2_t test_vwsubu_wv_u64m2(vuint64m2_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wx_u64m2(vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m2(op1, op2, vl); + return __riscv_vwsubu_wx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m4( @@ -480,7 +480,7 @@ vuint64m2_t test_vwsubu_wx_u64m2(vuint64m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vv_u64m4(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_vv_u64m4(op1, op2, vl); + return __riscv_vwsubu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m4( @@ -489,7 +489,7 @@ vuint64m4_t test_vwsubu_vv_u64m4(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vx_u64m4(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m4(op1, op2, vl); + return __riscv_vwsubu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m4( @@ -498,7 +498,7 @@ vuint64m4_t test_vwsubu_vx_u64m4(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wv_u64m4(vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_wv_u64m4(op1, op2, vl); + return __riscv_vwsubu_wv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m4( @@ -507,7 +507,7 @@ vuint64m4_t test_vwsubu_wv_u64m4(vuint64m4_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wx_u64m4(vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m4(op1, op2, vl); + return __riscv_vwsubu_wx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m8( @@ -516,7 +516,7 @@ vuint64m4_t test_vwsubu_wx_u64m4(vuint64m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vv_u64m8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_vv_u64m8(op1, op2, vl); + return __riscv_vwsubu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m8( @@ -525,7 +525,7 @@ vuint64m8_t test_vwsubu_vv_u64m8(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vx_u64m8(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m8(op1, op2, vl); + return __riscv_vwsubu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m8( @@ -534,7 +534,7 @@ vuint64m8_t test_vwsubu_vx_u64m8(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wv_u64m8(vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_wv_u64m8(op1, op2, vl); + return __riscv_vwsubu_wv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m8( @@ -543,7 +543,7 @@ vuint64m8_t test_vwsubu_wv_u64m8(vuint64m8_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wx_u64m8(vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m8(op1, op2, vl); + return __riscv_vwsubu_wx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf4_m( @@ -552,7 +552,7 @@ vuint64m8_t test_vwsubu_wx_u64m8(vuint64m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vv_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf4_m( @@ -561,7 +561,7 @@ vuint16mf4_t test_vwsubu_vv_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vx_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf4_m( @@ -570,7 +570,7 @@ vuint16mf4_t test_vwsubu_vx_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_wv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf4_m( @@ -579,7 +579,7 @@ vuint16mf4_t test_vwsubu_wv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf2_m( @@ -588,7 +588,7 @@ vuint16mf4_t test_vwsubu_wx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vv_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf2_m( @@ -597,7 +597,7 @@ vuint16mf2_t test_vwsubu_vv_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vx_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf2_m( @@ -606,7 +606,7 @@ vuint16mf2_t test_vwsubu_vx_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_wv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf2_m( @@ -615,7 +615,7 @@ vuint16mf2_t test_vwsubu_wv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m1_m( @@ -624,7 +624,7 @@ vuint16mf2_t test_vwsubu_wx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vv_u16m1_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m1_m( @@ -633,7 +633,7 @@ vuint16m1_t test_vwsubu_vv_u16m1_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vx_u16m1_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m1_m( @@ -642,7 +642,7 @@ vuint16m1_t test_vwsubu_vx_u16m1_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_wv_u16m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m1_m( @@ -651,7 +651,7 @@ vuint16m1_t test_vwsubu_wv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m2_m( @@ -660,7 +660,7 @@ vuint16m1_t test_vwsubu_wx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vv_u16m2_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m2_m( @@ -669,7 +669,7 @@ vuint16m2_t test_vwsubu_vv_u16m2_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vx_u16m2_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m2_m( @@ -678,7 +678,7 @@ vuint16m2_t test_vwsubu_vx_u16m2_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_wv_u16m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m2_m( @@ -687,7 +687,7 @@ vuint16m2_t test_vwsubu_wv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m4_m( @@ -696,7 +696,7 @@ vuint16m2_t test_vwsubu_wx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vv_u16m4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m4_m( @@ -705,7 +705,7 @@ vuint16m4_t test_vwsubu_vv_u16m4_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vx_u16m4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m4_m( @@ -714,7 +714,7 @@ vuint16m4_t test_vwsubu_vx_u16m4_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_wv_u16m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m4_m( @@ -723,7 +723,7 @@ vuint16m4_t test_vwsubu_wv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m8_m( @@ -732,7 +732,7 @@ vuint16m4_t test_vwsubu_wx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vv_u16m8_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m8_m( @@ -741,7 +741,7 @@ vuint16m8_t test_vwsubu_vv_u16m8_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vx_u16m8_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m8_m( @@ -750,7 +750,7 @@ vuint16m8_t test_vwsubu_vx_u16m8_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_wv_u16m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m8_m( @@ -759,7 +759,7 @@ vuint16m8_t test_vwsubu_wv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32mf2_m( @@ -768,7 +768,7 @@ vuint16m8_t test_vwsubu_wx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vv_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32mf2_m( @@ -777,7 +777,7 @@ vuint32mf2_t test_vwsubu_vv_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vx_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32mf2_m( @@ -786,7 +786,7 @@ vuint32mf2_t test_vwsubu_vx_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_wv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32mf2_m( @@ -795,7 +795,7 @@ vuint32mf2_t test_vwsubu_wv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m1_m( @@ -804,7 +804,7 @@ vuint32mf2_t test_vwsubu_wx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vv_u32m1_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m1_m( @@ -813,7 +813,7 @@ vuint32m1_t test_vwsubu_vv_u32m1_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vx_u32m1_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m1_m( @@ -822,7 +822,7 @@ vuint32m1_t test_vwsubu_vx_u32m1_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_wv_u32m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m1_m( @@ -831,7 +831,7 @@ vuint32m1_t test_vwsubu_wv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m2_m( @@ -840,7 +840,7 @@ vuint32m1_t test_vwsubu_wx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vv_u32m2_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m2_m( @@ -849,7 +849,7 @@ vuint32m2_t test_vwsubu_vv_u32m2_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vx_u32m2_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m2_m( @@ -858,7 +858,7 @@ vuint32m2_t test_vwsubu_vx_u32m2_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_wv_u32m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m2_m( @@ -867,7 +867,7 @@ vuint32m2_t test_vwsubu_wv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m4_m( @@ -876,7 +876,7 @@ vuint32m2_t test_vwsubu_wx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vv_u32m4_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m4_m( @@ -885,7 +885,7 @@ vuint32m4_t test_vwsubu_vv_u32m4_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vx_u32m4_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m4_m( @@ -894,7 +894,7 @@ vuint32m4_t test_vwsubu_vx_u32m4_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_wv_u32m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m4_m( @@ -903,7 +903,7 @@ vuint32m4_t test_vwsubu_wv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m8_m( @@ -912,7 +912,7 @@ vuint32m4_t test_vwsubu_wx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vv_u32m8_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m8_m( @@ -921,7 +921,7 @@ vuint32m8_t test_vwsubu_vv_u32m8_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vx_u32m8_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m8_m( @@ -930,7 +930,7 @@ vuint32m8_t test_vwsubu_vx_u32m8_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_wv_u32m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m8_m( @@ -939,7 +939,7 @@ vuint32m8_t test_vwsubu_wv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m1_m( @@ -948,7 +948,7 @@ vuint32m8_t test_vwsubu_wx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vv_u64m1_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m1_m( @@ -957,7 +957,7 @@ vuint64m1_t test_vwsubu_vv_u64m1_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vx_u64m1_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m1_m( @@ -966,7 +966,7 @@ vuint64m1_t test_vwsubu_vx_u64m1_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_wv_u64m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m1_m( @@ -975,7 +975,7 @@ vuint64m1_t test_vwsubu_wv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m1_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m2_m( @@ -984,7 +984,7 @@ vuint64m1_t test_vwsubu_wx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vv_u64m2_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m2_m( @@ -993,7 +993,7 @@ vuint64m2_t test_vwsubu_vv_u64m2_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vx_u64m2_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m2_m( @@ -1002,7 +1002,7 @@ vuint64m2_t test_vwsubu_vx_u64m2_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_wv_u64m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m2_m( @@ -1011,7 +1011,7 @@ vuint64m2_t test_vwsubu_wv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m2_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m4_m( @@ -1020,7 +1020,7 @@ vuint64m2_t test_vwsubu_wx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vv_u64m4_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m4_m( @@ -1029,7 +1029,7 @@ vuint64m4_t test_vwsubu_vv_u64m4_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vx_u64m4_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m4_m( @@ -1038,7 +1038,7 @@ vuint64m4_t test_vwsubu_vx_u64m4_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_wv_u64m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m4_m( @@ -1047,7 +1047,7 @@ vuint64m4_t test_vwsubu_wv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m4_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m8_m( @@ -1056,7 +1056,7 @@ vuint64m4_t test_vwsubu_wx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vv_u64m8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m8_m( @@ -1065,7 +1065,7 @@ vuint64m8_t test_vwsubu_vv_u64m8_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vx_u64m8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_vx_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m8_m( @@ -1074,7 +1074,7 @@ vuint64m8_t test_vwsubu_vx_u64m8_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_wv_u64m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_wv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m8_m( @@ -1083,6 +1083,6 @@ vuint64m8_t test_vwsubu_wv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m8_m(mask, op1, op2, vl); + return __riscv_vwsubu_wx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vxor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vxor.c index 625ddca306663a3a8d6271cc754e3f354de1632d..7840eae315d98c7b6375fce3c20c87c654485d81 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vxor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vxor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vxor_vv_i8mf8(op1, op2, vl); + return __riscv_vxor_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vxor_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf8(op1, op2, vl); + return __riscv_vxor_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vxor_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vxor_vv_i8mf4(op1, op2, vl); + return __riscv_vxor_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vxor_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf4(op1, op2, vl); + return __riscv_vxor_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vxor_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vxor_vv_i8mf2(op1, op2, vl); + return __riscv_vxor_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vxor_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf2(op1, op2, vl); + return __riscv_vxor_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vxor_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vxor_vv_i8m1(op1, op2, vl); + return __riscv_vxor_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vxor_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m1(op1, op2, vl); + return __riscv_vxor_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vxor_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vxor_vv_i8m2(op1, op2, vl); + return __riscv_vxor_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vxor_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m2(op1, op2, vl); + return __riscv_vxor_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vxor_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vxor_vv_i8m4(op1, op2, vl); + return __riscv_vxor_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vxor_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m4(op1, op2, vl); + return __riscv_vxor_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vxor_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vxor_vv_i8m8(op1, op2, vl); + return __riscv_vxor_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vxor_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m8(op1, op2, vl); + return __riscv_vxor_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vxor_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vxor_vv_i16mf4(op1, op2, vl); + return __riscv_vxor_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vxor_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf4(op1, op2, vl); + return __riscv_vxor_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vxor_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vxor_vv_i16mf2(op1, op2, vl); + return __riscv_vxor_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vxor_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf2(op1, op2, vl); + return __riscv_vxor_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vxor_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vxor_vv_i16m1(op1, op2, vl); + return __riscv_vxor_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vxor_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m1(op1, op2, vl); + return __riscv_vxor_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vxor_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vxor_vv_i16m2(op1, op2, vl); + return __riscv_vxor_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vxor_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m2(op1, op2, vl); + return __riscv_vxor_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vxor_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vxor_vv_i16m4(op1, op2, vl); + return __riscv_vxor_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vxor_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m4(op1, op2, vl); + return __riscv_vxor_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vxor_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vxor_vv_i16m8(op1, op2, vl); + return __riscv_vxor_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vxor_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m8(op1, op2, vl); + return __riscv_vxor_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vxor_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vxor_vv_i32mf2(op1, op2, vl); + return __riscv_vxor_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vxor_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32mf2(op1, op2, vl); + return __riscv_vxor_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vxor_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vxor_vv_i32m1(op1, op2, vl); + return __riscv_vxor_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vxor_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m1(op1, op2, vl); + return __riscv_vxor_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vxor_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vxor_vv_i32m2(op1, op2, vl); + return __riscv_vxor_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vxor_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m2(op1, op2, vl); + return __riscv_vxor_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vxor_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vxor_vv_i32m4(op1, op2, vl); + return __riscv_vxor_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vxor_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m4(op1, op2, vl); + return __riscv_vxor_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vxor_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vxor_vv_i32m8(op1, op2, vl); + return __riscv_vxor_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vxor_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m8(op1, op2, vl); + return __riscv_vxor_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m1( @@ -336,7 +336,7 @@ vint32m8_t test_vxor_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vxor_vv_i64m1(op1, op2, vl); + return __riscv_vxor_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m1( @@ -345,7 +345,7 @@ vint64m1_t test_vxor_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m1(op1, op2, vl); + return __riscv_vxor_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m2( @@ -354,7 +354,7 @@ vint64m1_t test_vxor_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vxor_vv_i64m2(op1, op2, vl); + return __riscv_vxor_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m2( @@ -363,7 +363,7 @@ vint64m2_t test_vxor_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m2(op1, op2, vl); + return __riscv_vxor_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m4( @@ -372,7 +372,7 @@ vint64m2_t test_vxor_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vxor_vv_i64m4(op1, op2, vl); + return __riscv_vxor_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m4( @@ -381,7 +381,7 @@ vint64m4_t test_vxor_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m4(op1, op2, vl); + return __riscv_vxor_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m8( @@ -390,7 +390,7 @@ vint64m4_t test_vxor_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vxor_vv_i64m8(op1, op2, vl); + return __riscv_vxor_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m8( @@ -399,7 +399,7 @@ vint64m8_t test_vxor_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m8(op1, op2, vl); + return __riscv_vxor_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf8( @@ -408,7 +408,7 @@ vint64m8_t test_vxor_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vxor_vv_u8mf8(op1, op2, vl); + return __riscv_vxor_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf8( @@ -417,7 +417,7 @@ vuint8mf8_t test_vxor_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf8(op1, op2, vl); + return __riscv_vxor_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf4( @@ -426,7 +426,7 @@ vuint8mf8_t test_vxor_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vxor_vv_u8mf4(op1, op2, vl); + return __riscv_vxor_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf4( @@ -435,7 +435,7 @@ vuint8mf4_t test_vxor_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf4(op1, op2, vl); + return __riscv_vxor_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf2( @@ -444,7 +444,7 @@ vuint8mf4_t test_vxor_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vxor_vv_u8mf2(op1, op2, vl); + return __riscv_vxor_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf2( @@ -453,7 +453,7 @@ vuint8mf2_t test_vxor_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf2(op1, op2, vl); + return __riscv_vxor_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m1( @@ -462,7 +462,7 @@ vuint8mf2_t test_vxor_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vxor_vv_u8m1(op1, op2, vl); + return __riscv_vxor_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m1( @@ -471,7 +471,7 @@ vuint8m1_t test_vxor_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m1(op1, op2, vl); + return __riscv_vxor_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m2( @@ -480,7 +480,7 @@ vuint8m1_t test_vxor_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vxor_vv_u8m2(op1, op2, vl); + return __riscv_vxor_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m2( @@ -489,7 +489,7 @@ vuint8m2_t test_vxor_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m2(op1, op2, vl); + return __riscv_vxor_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m4( @@ -498,7 +498,7 @@ vuint8m2_t test_vxor_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vxor_vv_u8m4(op1, op2, vl); + return __riscv_vxor_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m4( @@ -507,7 +507,7 @@ vuint8m4_t test_vxor_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m4(op1, op2, vl); + return __riscv_vxor_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m8( @@ -516,7 +516,7 @@ vuint8m4_t test_vxor_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vxor_vv_u8m8(op1, op2, vl); + return __riscv_vxor_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m8( @@ -525,7 +525,7 @@ vuint8m8_t test_vxor_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m8(op1, op2, vl); + return __riscv_vxor_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf4( @@ -534,7 +534,7 @@ vuint8m8_t test_vxor_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vxor_vv_u16mf4(op1, op2, vl); + return __riscv_vxor_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf4( @@ -543,7 +543,7 @@ vuint16mf4_t test_vxor_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf4(op1, op2, vl); + return __riscv_vxor_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf2( @@ -552,7 +552,7 @@ vuint16mf4_t test_vxor_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vxor_vv_u16mf2(op1, op2, vl); + return __riscv_vxor_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf2( @@ -561,7 +561,7 @@ vuint16mf2_t test_vxor_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf2(op1, op2, vl); + return __riscv_vxor_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m1( @@ -570,7 +570,7 @@ vuint16mf2_t test_vxor_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vxor_vv_u16m1(op1, op2, vl); + return __riscv_vxor_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m1( @@ -579,7 +579,7 @@ vuint16m1_t test_vxor_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m1(op1, op2, vl); + return __riscv_vxor_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m2( @@ -588,7 +588,7 @@ vuint16m1_t test_vxor_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vxor_vv_u16m2(op1, op2, vl); + return __riscv_vxor_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m2( @@ -597,7 +597,7 @@ vuint16m2_t test_vxor_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m2(op1, op2, vl); + return __riscv_vxor_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m4( @@ -606,7 +606,7 @@ vuint16m2_t test_vxor_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vxor_vv_u16m4(op1, op2, vl); + return __riscv_vxor_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m4( @@ -615,7 +615,7 @@ vuint16m4_t test_vxor_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m4(op1, op2, vl); + return __riscv_vxor_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m8( @@ -624,7 +624,7 @@ vuint16m4_t test_vxor_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vxor_vv_u16m8(op1, op2, vl); + return __riscv_vxor_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m8( @@ -633,7 +633,7 @@ vuint16m8_t test_vxor_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m8(op1, op2, vl); + return __riscv_vxor_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32mf2( @@ -642,7 +642,7 @@ vuint16m8_t test_vxor_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vxor_vv_u32mf2(op1, op2, vl); + return __riscv_vxor_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32mf2( @@ -651,7 +651,7 @@ vuint32mf2_t test_vxor_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32mf2(op1, op2, vl); + return __riscv_vxor_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m1( @@ -660,7 +660,7 @@ vuint32mf2_t test_vxor_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vxor_vv_u32m1(op1, op2, vl); + return __riscv_vxor_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m1( @@ -669,7 +669,7 @@ vuint32m1_t test_vxor_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m1(op1, op2, vl); + return __riscv_vxor_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m2( @@ -678,7 +678,7 @@ vuint32m1_t test_vxor_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vxor_vv_u32m2(op1, op2, vl); + return __riscv_vxor_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m2( @@ -687,7 +687,7 @@ vuint32m2_t test_vxor_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m2(op1, op2, vl); + return __riscv_vxor_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m4( @@ -696,7 +696,7 @@ vuint32m2_t test_vxor_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vxor_vv_u32m4(op1, op2, vl); + return __riscv_vxor_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m4( @@ -705,7 +705,7 @@ vuint32m4_t test_vxor_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m4(op1, op2, vl); + return __riscv_vxor_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m8( @@ -714,7 +714,7 @@ vuint32m4_t test_vxor_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vxor_vv_u32m8(op1, op2, vl); + return __riscv_vxor_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m8( @@ -723,7 +723,7 @@ vuint32m8_t test_vxor_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m8(op1, op2, vl); + return __riscv_vxor_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m1( @@ -732,7 +732,7 @@ vuint32m8_t test_vxor_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vxor_vv_u64m1(op1, op2, vl); + return __riscv_vxor_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m1( @@ -741,7 +741,7 @@ vuint64m1_t test_vxor_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m1(op1, op2, vl); + return __riscv_vxor_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m2( @@ -750,7 +750,7 @@ vuint64m1_t test_vxor_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vxor_vv_u64m2(op1, op2, vl); + return __riscv_vxor_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m2( @@ -759,7 +759,7 @@ vuint64m2_t test_vxor_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m2(op1, op2, vl); + return __riscv_vxor_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m4( @@ -768,7 +768,7 @@ vuint64m2_t test_vxor_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vxor_vv_u64m4(op1, op2, vl); + return __riscv_vxor_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m4( @@ -777,7 +777,7 @@ vuint64m4_t test_vxor_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m4(op1, op2, vl); + return __riscv_vxor_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m8( @@ -786,7 +786,7 @@ vuint64m4_t test_vxor_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vxor_vv_u64m8(op1, op2, vl); + return __riscv_vxor_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m8( @@ -795,7 +795,7 @@ vuint64m8_t test_vxor_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m8(op1, op2, vl); + return __riscv_vxor_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf8_m( @@ -804,7 +804,7 @@ vuint64m8_t test_vxor_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vxor_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf8_m( @@ -813,7 +813,7 @@ vint8mf8_t test_vxor_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf4_m( @@ -822,7 +822,7 @@ vint8mf8_t test_vxor_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vxor_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf4_m( @@ -831,7 +831,7 @@ vint8mf4_t test_vxor_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf2_m( @@ -840,7 +840,7 @@ vint8mf4_t test_vxor_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vxor_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf2_m( @@ -849,7 +849,7 @@ vint8mf2_t test_vxor_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m1_m( @@ -858,7 +858,7 @@ vint8mf2_t test_vxor_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vxor_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m1_m( @@ -867,7 +867,7 @@ vint8m1_t test_vxor_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m2_m( @@ -876,7 +876,7 @@ vint8m1_t test_vxor_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vxor_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m2_m( @@ -885,7 +885,7 @@ vint8m2_t test_vxor_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m4_m( @@ -894,7 +894,7 @@ vint8m2_t test_vxor_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vxor_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m4_m( @@ -903,7 +903,7 @@ vint8m4_t test_vxor_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m8_m( @@ -912,7 +912,7 @@ vint8m4_t test_vxor_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vxor_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m8_m( @@ -921,7 +921,7 @@ vint8m8_t test_vxor_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf4_m( @@ -930,7 +930,7 @@ vint8m8_t test_vxor_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vxor_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf4_m( @@ -939,7 +939,7 @@ vint16mf4_t test_vxor_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf2_m( @@ -948,7 +948,7 @@ vint16mf4_t test_vxor_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vxor_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf2_m( @@ -957,7 +957,7 @@ vint16mf2_t test_vxor_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m1_m( @@ -966,7 +966,7 @@ vint16mf2_t test_vxor_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vxor_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m1_m( @@ -975,7 +975,7 @@ vint16m1_t test_vxor_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m2_m( @@ -984,7 +984,7 @@ vint16m1_t test_vxor_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vxor_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m2_m( @@ -993,7 +993,7 @@ vint16m2_t test_vxor_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m4_m( @@ -1002,7 +1002,7 @@ vint16m2_t test_vxor_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vxor_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m4_m( @@ -1011,7 +1011,7 @@ vint16m4_t test_vxor_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m8_m( @@ -1020,7 +1020,7 @@ vint16m4_t test_vxor_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vxor_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m8_m( @@ -1029,7 +1029,7 @@ vint16m8_t test_vxor_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32mf2_m( @@ -1038,7 +1038,7 @@ vint16m8_t test_vxor_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vxor_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32mf2_m( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vxor_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m1_m( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vxor_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vxor_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m1_m( @@ -1065,7 +1065,7 @@ vint32m1_t test_vxor_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m2_m( @@ -1074,7 +1074,7 @@ vint32m1_t test_vxor_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vxor_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m2_m( @@ -1083,7 +1083,7 @@ vint32m2_t test_vxor_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m4_m( @@ -1092,7 +1092,7 @@ vint32m2_t test_vxor_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vxor_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m4_m( @@ -1101,7 +1101,7 @@ vint32m4_t test_vxor_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m8_m( @@ -1110,7 +1110,7 @@ vint32m4_t test_vxor_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vxor_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m8_m( @@ -1119,7 +1119,7 @@ vint32m8_t test_vxor_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m1_m( @@ -1128,7 +1128,7 @@ vint32m8_t test_vxor_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vxor_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m1_m( @@ -1137,7 +1137,7 @@ vint64m1_t test_vxor_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m2_m( @@ -1146,7 +1146,7 @@ vint64m1_t test_vxor_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vxor_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m2_m( @@ -1155,7 +1155,7 @@ vint64m2_t test_vxor_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m4_m( @@ -1164,7 +1164,7 @@ vint64m2_t test_vxor_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vxor_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m4_m( @@ -1173,7 +1173,7 @@ vint64m4_t test_vxor_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m8_m( @@ -1182,7 +1182,7 @@ vint64m4_t test_vxor_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vxor_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m8_m( @@ -1191,7 +1191,7 @@ vint64m8_t test_vxor_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf8_m( @@ -1200,7 +1200,7 @@ vint64m8_t test_vxor_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vxor_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf8_m( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vxor_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf4_m( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vxor_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vxor_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf4_m( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vxor_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf2_m( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vxor_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vxor_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf2_m( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vxor_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m1_m( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vxor_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vxor_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m1_m( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vxor_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m2_m( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vxor_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vxor_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m2_m( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vxor_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m4_m( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vxor_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vxor_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m4_m( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vxor_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m8_m( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vxor_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vxor_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m8_m( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vxor_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf4_m( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vxor_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vxor_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf4_m( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vxor_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf2_m( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vxor_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vxor_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf2_m( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vxor_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m1_m( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vxor_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vxor_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m1_m( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vxor_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m2_m( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vxor_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vxor_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m2_m( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vxor_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m4_m( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vxor_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vxor_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m4_m( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vxor_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m8_m( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vxor_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vxor_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m8_m( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vxor_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32mf2_m( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vxor_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vxor_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32mf2_m( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vxor_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m1_m( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vxor_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vxor_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m1_m( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vxor_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m2_m( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vxor_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vxor_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m2_m( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vxor_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m4_m( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vxor_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vxor_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m4_m( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vxor_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m8_m( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vxor_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vxor_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m8_m( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vxor_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m1_m( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vxor_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vxor_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m1_m( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vxor_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m2_m( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vxor_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vxor_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m2_m( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vxor_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m4_m( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vxor_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vxor_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m4_m( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vxor_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m8_m( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vxor_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vxor_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vxor_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m8_m( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vxor_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vxor_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vzext.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vzext.c index 57d951da8a924e220f56e5b64c27801d6908a1bc..a7bef5c40c343d656c59efb7a86f5f0c45ee1c25 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vzext.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vzext.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vzext_vf2_u16mf4(vuint8mf8_t op1, size_t vl) { - return vzext_vf2_u16mf4(op1, vl); + return __riscv_vzext_vf2_u16mf4(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf2( @@ -21,7 +21,7 @@ vuint16mf4_t test_vzext_vf2_u16mf4(vuint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vzext_vf2_u16mf2(vuint8mf4_t op1, size_t vl) { - return vzext_vf2_u16mf2(op1, vl); + return __riscv_vzext_vf2_u16mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m1( @@ -30,7 +30,7 @@ vuint16mf2_t test_vzext_vf2_u16mf2(vuint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vzext_vf2_u16m1(vuint8mf2_t op1, size_t vl) { - return vzext_vf2_u16m1(op1, vl); + return __riscv_vzext_vf2_u16m1(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m2( @@ -39,7 +39,7 @@ vuint16m1_t test_vzext_vf2_u16m1(vuint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vzext_vf2_u16m2(vuint8m1_t op1, size_t vl) { - return vzext_vf2_u16m2(op1, vl); + return __riscv_vzext_vf2_u16m2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m4( @@ -48,7 +48,7 @@ vuint16m2_t test_vzext_vf2_u16m2(vuint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vzext_vf2_u16m4(vuint8m2_t op1, size_t vl) { - return vzext_vf2_u16m4(op1, vl); + return __riscv_vzext_vf2_u16m4(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m8( @@ -57,7 +57,7 @@ vuint16m4_t test_vzext_vf2_u16m4(vuint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vzext_vf2_u16m8(vuint8m4_t op1, size_t vl) { - return vzext_vf2_u16m8(op1, vl); + return __riscv_vzext_vf2_u16m8(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32mf2( @@ -66,7 +66,7 @@ vuint16m8_t test_vzext_vf2_u16m8(vuint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf4_u32mf2(vuint8mf8_t op1, size_t vl) { - return vzext_vf4_u32mf2(op1, vl); + return __riscv_vzext_vf4_u32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m1( @@ -75,7 +75,7 @@ vuint32mf2_t test_vzext_vf4_u32mf2(vuint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf4_u32m1(vuint8mf4_t op1, size_t vl) { - return vzext_vf4_u32m1(op1, vl); + return __riscv_vzext_vf4_u32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m2( @@ -84,7 +84,7 @@ vuint32m1_t test_vzext_vf4_u32m1(vuint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf4_u32m2(vuint8mf2_t op1, size_t vl) { - return vzext_vf4_u32m2(op1, vl); + return __riscv_vzext_vf4_u32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m4( @@ -93,7 +93,7 @@ vuint32m2_t test_vzext_vf4_u32m2(vuint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf4_u32m4(vuint8m1_t op1, size_t vl) { - return vzext_vf4_u32m4(op1, vl); + return __riscv_vzext_vf4_u32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m8( @@ -102,7 +102,7 @@ vuint32m4_t test_vzext_vf4_u32m4(vuint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf4_u32m8(vuint8m2_t op1, size_t vl) { - return vzext_vf4_u32m8(op1, vl); + return __riscv_vzext_vf4_u32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m1( @@ -111,7 +111,7 @@ vuint32m8_t test_vzext_vf4_u32m8(vuint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf8_u64m1(vuint8mf8_t op1, size_t vl) { - return vzext_vf8_u64m1(op1, vl); + return __riscv_vzext_vf8_u64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m2( @@ -120,7 +120,7 @@ vuint64m1_t test_vzext_vf8_u64m1(vuint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf8_u64m2(vuint8mf4_t op1, size_t vl) { - return vzext_vf8_u64m2(op1, vl); + return __riscv_vzext_vf8_u64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m4( @@ -129,7 +129,7 @@ vuint64m2_t test_vzext_vf8_u64m2(vuint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf8_u64m4(vuint8mf2_t op1, size_t vl) { - return vzext_vf8_u64m4(op1, vl); + return __riscv_vzext_vf8_u64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m8( @@ -138,7 +138,7 @@ vuint64m4_t test_vzext_vf8_u64m4(vuint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf8_u64m8(vuint8m1_t op1, size_t vl) { - return vzext_vf8_u64m8(op1, vl); + return __riscv_vzext_vf8_u64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32mf2( @@ -147,7 +147,7 @@ vuint64m8_t test_vzext_vf8_u64m8(vuint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf2_u32mf2(vuint16mf4_t op1, size_t vl) { - return vzext_vf2_u32mf2(op1, vl); + return __riscv_vzext_vf2_u32mf2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m1( @@ -156,7 +156,7 @@ vuint32mf2_t test_vzext_vf2_u32mf2(vuint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf2_u32m1(vuint16mf2_t op1, size_t vl) { - return vzext_vf2_u32m1(op1, vl); + return __riscv_vzext_vf2_u32m1(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m2( @@ -165,7 +165,7 @@ vuint32m1_t test_vzext_vf2_u32m1(vuint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf2_u32m2(vuint16m1_t op1, size_t vl) { - return vzext_vf2_u32m2(op1, vl); + return __riscv_vzext_vf2_u32m2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m4( @@ -174,7 +174,7 @@ vuint32m2_t test_vzext_vf2_u32m2(vuint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf2_u32m4(vuint16m2_t op1, size_t vl) { - return vzext_vf2_u32m4(op1, vl); + return __riscv_vzext_vf2_u32m4(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m8( @@ -183,7 +183,7 @@ vuint32m4_t test_vzext_vf2_u32m4(vuint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf2_u32m8(vuint16m4_t op1, size_t vl) { - return vzext_vf2_u32m8(op1, vl); + return __riscv_vzext_vf2_u32m8(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m1( @@ -192,7 +192,7 @@ vuint32m8_t test_vzext_vf2_u32m8(vuint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf4_u64m1(vuint16mf4_t op1, size_t vl) { - return vzext_vf4_u64m1(op1, vl); + return __riscv_vzext_vf4_u64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m2( @@ -201,7 +201,7 @@ vuint64m1_t test_vzext_vf4_u64m1(vuint16mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf4_u64m2(vuint16mf2_t op1, size_t vl) { - return vzext_vf4_u64m2(op1, vl); + return __riscv_vzext_vf4_u64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m4( @@ -210,7 +210,7 @@ vuint64m2_t test_vzext_vf4_u64m2(vuint16mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf4_u64m4(vuint16m1_t op1, size_t vl) { - return vzext_vf4_u64m4(op1, vl); + return __riscv_vzext_vf4_u64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m8( @@ -219,7 +219,7 @@ vuint64m4_t test_vzext_vf4_u64m4(vuint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf4_u64m8(vuint16m2_t op1, size_t vl) { - return vzext_vf4_u64m8(op1, vl); + return __riscv_vzext_vf4_u64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m1( @@ -228,7 +228,7 @@ vuint64m8_t test_vzext_vf4_u64m8(vuint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf2_u64m1(vuint32mf2_t op1, size_t vl) { - return vzext_vf2_u64m1(op1, vl); + return __riscv_vzext_vf2_u64m1(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m2( @@ -237,7 +237,7 @@ vuint64m1_t test_vzext_vf2_u64m1(vuint32mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf2_u64m2(vuint32m1_t op1, size_t vl) { - return vzext_vf2_u64m2(op1, vl); + return __riscv_vzext_vf2_u64m2(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m4( @@ -246,7 +246,7 @@ vuint64m2_t test_vzext_vf2_u64m2(vuint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf2_u64m4(vuint32m2_t op1, size_t vl) { - return vzext_vf2_u64m4(op1, vl); + return __riscv_vzext_vf2_u64m4(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m8( @@ -255,7 +255,7 @@ vuint64m4_t test_vzext_vf2_u64m4(vuint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf2_u64m8(vuint32m4_t op1, size_t vl) { - return vzext_vf2_u64m8(op1, vl); + return __riscv_vzext_vf2_u64m8(op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf4_m( @@ -264,7 +264,7 @@ vuint64m8_t test_vzext_vf2_u64m8(vuint32m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vzext_vf2_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, size_t vl) { - return vzext_vf2_u16mf4_m(mask, op1, vl); + return __riscv_vzext_vf2_u16mf4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf2_m( @@ -273,7 +273,7 @@ vuint16mf4_t test_vzext_vf2_u16mf4_m(vbool64_t mask, vuint8mf8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vzext_vf2_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, size_t vl) { - return vzext_vf2_u16mf2_m(mask, op1, vl); + return __riscv_vzext_vf2_u16mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m1_m( @@ -282,7 +282,7 @@ vuint16mf2_t test_vzext_vf2_u16mf2_m(vbool32_t mask, vuint8mf4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vzext_vf2_u16m1_m(vbool16_t mask, vuint8mf2_t op1, size_t vl) { - return vzext_vf2_u16m1_m(mask, op1, vl); + return __riscv_vzext_vf2_u16m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m2_m( @@ -291,7 +291,7 @@ vuint16m1_t test_vzext_vf2_u16m1_m(vbool16_t mask, vuint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vzext_vf2_u16m2_m(vbool8_t mask, vuint8m1_t op1, size_t vl) { - return vzext_vf2_u16m2_m(mask, op1, vl); + return __riscv_vzext_vf2_u16m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m4_m( @@ -300,7 +300,7 @@ vuint16m2_t test_vzext_vf2_u16m2_m(vbool8_t mask, vuint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vzext_vf2_u16m4_m(vbool4_t mask, vuint8m2_t op1, size_t vl) { - return vzext_vf2_u16m4_m(mask, op1, vl); + return __riscv_vzext_vf2_u16m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m8_m( @@ -309,7 +309,7 @@ vuint16m4_t test_vzext_vf2_u16m4_m(vbool4_t mask, vuint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vzext_vf2_u16m8_m(vbool2_t mask, vuint8m4_t op1, size_t vl) { - return vzext_vf2_u16m8_m(mask, op1, vl); + return __riscv_vzext_vf2_u16m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32mf2_m( @@ -318,7 +318,7 @@ vuint16m8_t test_vzext_vf2_u16m8_m(vbool2_t mask, vuint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf4_u32mf2_m(vbool64_t mask, vuint8mf8_t op1, size_t vl) { - return vzext_vf4_u32mf2_m(mask, op1, vl); + return __riscv_vzext_vf4_u32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m1_m( @@ -327,7 +327,7 @@ vuint32mf2_t test_vzext_vf4_u32mf2_m(vbool64_t mask, vuint8mf8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf4_u32m1_m(vbool32_t mask, vuint8mf4_t op1, size_t vl) { - return vzext_vf4_u32m1_m(mask, op1, vl); + return __riscv_vzext_vf4_u32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m2_m( @@ -336,7 +336,7 @@ vuint32m1_t test_vzext_vf4_u32m1_m(vbool32_t mask, vuint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf4_u32m2_m(vbool16_t mask, vuint8mf2_t op1, size_t vl) { - return vzext_vf4_u32m2_m(mask, op1, vl); + return __riscv_vzext_vf4_u32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m4_m( @@ -345,7 +345,7 @@ vuint32m2_t test_vzext_vf4_u32m2_m(vbool16_t mask, vuint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf4_u32m4_m(vbool8_t mask, vuint8m1_t op1, size_t vl) { - return vzext_vf4_u32m4_m(mask, op1, vl); + return __riscv_vzext_vf4_u32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m8_m( @@ -354,7 +354,7 @@ vuint32m4_t test_vzext_vf4_u32m4_m(vbool8_t mask, vuint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf4_u32m8_m(vbool4_t mask, vuint8m2_t op1, size_t vl) { - return vzext_vf4_u32m8_m(mask, op1, vl); + return __riscv_vzext_vf4_u32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m1_m( @@ -363,7 +363,7 @@ vuint32m8_t test_vzext_vf4_u32m8_m(vbool4_t mask, vuint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf8_u64m1_m(vbool64_t mask, vuint8mf8_t op1, size_t vl) { - return vzext_vf8_u64m1_m(mask, op1, vl); + return __riscv_vzext_vf8_u64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m2_m( @@ -372,7 +372,7 @@ vuint64m1_t test_vzext_vf8_u64m1_m(vbool64_t mask, vuint8mf8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf8_u64m2_m(vbool32_t mask, vuint8mf4_t op1, size_t vl) { - return vzext_vf8_u64m2_m(mask, op1, vl); + return __riscv_vzext_vf8_u64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m4_m( @@ -381,7 +381,7 @@ vuint64m2_t test_vzext_vf8_u64m2_m(vbool32_t mask, vuint8mf4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf8_u64m4_m(vbool16_t mask, vuint8mf2_t op1, size_t vl) { - return vzext_vf8_u64m4_m(mask, op1, vl); + return __riscv_vzext_vf8_u64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m8_m( @@ -390,7 +390,7 @@ vuint64m4_t test_vzext_vf8_u64m4_m(vbool16_t mask, vuint8mf2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf8_u64m8_m(vbool8_t mask, vuint8m1_t op1, size_t vl) { - return vzext_vf8_u64m8_m(mask, op1, vl); + return __riscv_vzext_vf8_u64m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32mf2_m( @@ -399,7 +399,7 @@ vuint64m8_t test_vzext_vf8_u64m8_m(vbool8_t mask, vuint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf2_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, size_t vl) { - return vzext_vf2_u32mf2_m(mask, op1, vl); + return __riscv_vzext_vf2_u32mf2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m1_m( @@ -408,7 +408,7 @@ vuint32mf2_t test_vzext_vf2_u32mf2_m(vbool64_t mask, vuint16mf4_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf2_u32m1_m(vbool32_t mask, vuint16mf2_t op1, size_t vl) { - return vzext_vf2_u32m1_m(mask, op1, vl); + return __riscv_vzext_vf2_u32m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m2_m( @@ -417,7 +417,7 @@ vuint32m1_t test_vzext_vf2_u32m1_m(vbool32_t mask, vuint16mf2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf2_u32m2_m(vbool16_t mask, vuint16m1_t op1, size_t vl) { - return vzext_vf2_u32m2_m(mask, op1, vl); + return __riscv_vzext_vf2_u32m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m4_m( @@ -426,7 +426,7 @@ vuint32m2_t test_vzext_vf2_u32m2_m(vbool16_t mask, vuint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf2_u32m4_m(vbool8_t mask, vuint16m2_t op1, size_t vl) { - return vzext_vf2_u32m4_m(mask, op1, vl); + return __riscv_vzext_vf2_u32m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m8_m( @@ -435,7 +435,7 @@ vuint32m4_t test_vzext_vf2_u32m4_m(vbool8_t mask, vuint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf2_u32m8_m(vbool4_t mask, vuint16m4_t op1, size_t vl) { - return vzext_vf2_u32m8_m(mask, op1, vl); + return __riscv_vzext_vf2_u32m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m1_m( @@ -444,7 +444,7 @@ vuint32m8_t test_vzext_vf2_u32m8_m(vbool4_t mask, vuint16m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf4_u64m1_m(vbool64_t mask, vuint16mf4_t op1, size_t vl) { - return vzext_vf4_u64m1_m(mask, op1, vl); + return __riscv_vzext_vf4_u64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m2_m( @@ -453,7 +453,7 @@ vuint64m1_t test_vzext_vf4_u64m1_m(vbool64_t mask, vuint16mf4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf4_u64m2_m(vbool32_t mask, vuint16mf2_t op1, size_t vl) { - return vzext_vf4_u64m2_m(mask, op1, vl); + return __riscv_vzext_vf4_u64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m4_m( @@ -462,7 +462,7 @@ vuint64m2_t test_vzext_vf4_u64m2_m(vbool32_t mask, vuint16mf2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf4_u64m4_m(vbool16_t mask, vuint16m1_t op1, size_t vl) { - return vzext_vf4_u64m4_m(mask, op1, vl); + return __riscv_vzext_vf4_u64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m8_m( @@ -471,7 +471,7 @@ vuint64m4_t test_vzext_vf4_u64m4_m(vbool16_t mask, vuint16m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf4_u64m8_m(vbool8_t mask, vuint16m2_t op1, size_t vl) { - return vzext_vf4_u64m8_m(mask, op1, vl); + return __riscv_vzext_vf4_u64m8_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m1_m( @@ -480,7 +480,7 @@ vuint64m8_t test_vzext_vf4_u64m8_m(vbool8_t mask, vuint16m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf2_u64m1_m(vbool64_t mask, vuint32mf2_t op1, size_t vl) { - return vzext_vf2_u64m1_m(mask, op1, vl); + return __riscv_vzext_vf2_u64m1_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m2_m( @@ -489,7 +489,7 @@ vuint64m1_t test_vzext_vf2_u64m1_m(vbool64_t mask, vuint32mf2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf2_u64m2_m(vbool32_t mask, vuint32m1_t op1, size_t vl) { - return vzext_vf2_u64m2_m(mask, op1, vl); + return __riscv_vzext_vf2_u64m2_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m4_m( @@ -498,7 +498,7 @@ vuint64m2_t test_vzext_vf2_u64m2_m(vbool32_t mask, vuint32m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf2_u64m4_m(vbool16_t mask, vuint32m2_t op1, size_t vl) { - return vzext_vf2_u64m4_m(mask, op1, vl); + return __riscv_vzext_vf2_u64m4_m(mask, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m8_m( @@ -507,6 +507,6 @@ vuint64m4_t test_vzext_vf2_u64m4_m(vbool16_t mask, vuint32m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf2_u64m8_m(vbool8_t mask, vuint32m4_t op1, size_t vl) { - return vzext_vf2_u64m8_m(mask, op1, vl); + return __riscv_vzext_vf2_u64m8_m(mask, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaadd.c index 05ebc5c0c5cabfb7f2acd98ca8659fecc3715e9d..b49d182a4bc691931fa8414393deeeca79070158 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaadd.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vaadd_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vaadd_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vaadd_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vaadd_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vaadd_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vaadd_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vaadd_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vaadd_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vaadd_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vaadd_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vaadd_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vaadd_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vaadd_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vaadd_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vaadd_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vaadd_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vaadd_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vaadd_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vaadd_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vaadd_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vaadd_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vaadd_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vaadd_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vaadd_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vaadd_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vaadd_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vaadd_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vaadd_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vaadd_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vaadd_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vaadd_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vaadd_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vaadd_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vaadd_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vaadd_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vaadd_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vaadd_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vaadd_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vaadd_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vaadd_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vaadd_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vaadd_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vaadd_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vaadd_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vaadd_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vaadd_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vaadd_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vaadd_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vaadd_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vaadd_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vaadd_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vaadd_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vaadd_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vaadd_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vaadd_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vaadd_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vaadd_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vaadd_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vaadd_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vaadd_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vaadd_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vaadd_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vaadd_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vaadd_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vaadd_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vaadd_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vaadd_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vaadd_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vaadd_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vaadd_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vaadd_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vaadd_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vaadd_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vaadd_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vaadd_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vaadd_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vaadd_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vaadd_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vaadd_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vaadd_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vaadd_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vaadd_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vaadd_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vaadd_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vaadd_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vaadd_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vaadd_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vaadd_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vaadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vaadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vaadd_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vaadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vaadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vaadd_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vaadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vaadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vaadd_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vaadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vaadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vaadd_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vaadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vaadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vaadd_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vaadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vaadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vaadd_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vaadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vaadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vaadd_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vaadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vaadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vaadd_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vaadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vaadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vaadd_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vaadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vaadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vaadd_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vaadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vaadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vaadd_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vaadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vaadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vaadd_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vaadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vaadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vaadd_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vaadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vaadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vaadd_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vaadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vaadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vaadd_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vaadd_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vaadd_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vaadd_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vaadd_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vaadd_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vaadd_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vaadd_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vaadd_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vaadd_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vaadd_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vaadd_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vaadd_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vaadd_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vaadd_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vaadd_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vaadd_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vaadd_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vaadd_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vaadd_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vaadd_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vaadd_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vaadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vaadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vaadd_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vaadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vaadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vaadd_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vaadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vaadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vaadd_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vaadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vaadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vaadd_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vaadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vaadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vaadd_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vaadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vaadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vaadd_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vaadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vaadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vaadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vaadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vaadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vaadd_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vaadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vaadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vaadd_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vaadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vaadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vaadd_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vaadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vaadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vaadd_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vaadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vaadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vaadd_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vaadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vaadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vaadd_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vaadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vaadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vaadd_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vaadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vaadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vaadd_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vaadd_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vaadd_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vaadd_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vaadd_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vaadd_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vaadd_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vaadd_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vaadd_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vaadd_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vaadd_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vaadd_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vaadd_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vaadd_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vaadd_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vaadd_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vaadd_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vaadd_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vaadd_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vaadd_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vaadd_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vaadd_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vaadd_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vaadd_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vaadd_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vaadd_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vaadd_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vaadd_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vaadd_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vaadd_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vaadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vaadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vaadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vaadd_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vaadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vaadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vaadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vaadd_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vaadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vaadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vaadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vaadd_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vaadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vaadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vaadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vaadd_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vaadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vaadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vaadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vaadd_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vaadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vaadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vaadd_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vaadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vaadd_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vaadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vaadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vaadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vaadd_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vaadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vaadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vaadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vaadd_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vaadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vaadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vaadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vaadd_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vaadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vaadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vaadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vaadd_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vaadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vaadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vaadd_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vaadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vaadd_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vaadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vaadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vaadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vaadd_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vaadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vaadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vaadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vaadd_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vaadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vaadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vaadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vaadd_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaadd_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vaadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vaadd_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vaadd_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaadd_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaaddu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaaddu.c index 24d8118e4c3982d846040fda45ce2a69ba1dc86c..8d08d44f936388fce918e1be997434d366496b6e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaaddu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vaaddu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vaaddu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vaaddu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vaaddu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vaaddu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vaaddu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vaaddu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vaaddu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vaaddu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vaaddu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vaaddu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vaaddu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vaaddu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vaaddu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vaaddu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vaaddu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vaaddu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vaaddu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vaaddu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vaaddu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vaaddu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vaaddu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vaaddu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vaaddu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vaaddu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vaaddu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vaaddu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vaaddu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vaaddu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vaaddu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vaaddu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vaaddu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vaaddu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vaaddu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vaaddu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vaaddu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vaaddu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vaaddu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vaaddu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vaaddu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vaaddu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vaaddu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vaaddu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vaaddu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vaaddu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vaaddu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vaaddu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vaaddu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vaaddu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vaaddu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vaaddu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vaaddu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vaaddu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vaaddu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vaaddu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vaaddu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vaaddu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vaaddu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vaaddu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vaaddu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vaaddu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vaaddu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vaaddu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vaaddu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vaaddu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vaaddu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vaaddu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vaaddu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vaaddu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vaaddu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vaaddu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vaaddu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vaaddu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vaaddu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vaaddu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vaaddu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vaaddu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vaaddu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vaaddu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vaaddu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vaaddu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vaaddu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vaaddu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vaaddu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vaaddu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vaaddu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vaaddu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vaaddu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vaaddu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vaaddu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vaaddu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vaaddu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vaaddu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vaaddu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vaaddu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vaaddu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vaaddu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vaaddu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vaaddu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vaaddu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vaaddu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vaaddu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vaaddu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vaaddu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vaaddu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vaaddu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vaaddu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vaaddu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vaaddu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vaaddu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vaaddu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vaaddu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vaaddu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vaaddu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vaaddu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vaaddu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vaaddu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vaaddu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vaaddu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vaaddu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vaaddu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vaaddu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vaaddu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vaaddu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vaaddu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vaaddu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vaaddu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vaaddu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vaaddu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vaaddu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vaaddu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vaaddu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vaaddu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vaaddu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vaaddu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vaaddu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vaaddu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vaaddu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vaaddu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vaaddu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vaaddu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vaaddu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vaaddu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vaaddu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vaaddu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vaaddu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vaaddu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vaaddu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vaaddu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vaaddu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vaaddu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vaaddu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vaaddu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vaaddu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vaaddu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vaaddu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vaaddu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vaaddu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vaaddu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vaaddu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vaaddu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vaaddu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vaaddu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vaaddu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vaaddu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vaaddu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vaaddu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vaaddu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vaaddu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vaaddu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vaaddu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vaaddu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vaaddu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vaaddu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vaaddu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vaaddu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vaaddu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vaaddu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vaaddu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vaaddu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vaaddu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vaaddu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vaaddu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vaaddu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vaaddu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vaaddu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vaaddu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vaaddu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vaaddu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vaaddu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vaaddu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vaaddu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vaaddu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vaaddu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vaaddu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vaaddu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vaaddu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vaaddu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vaaddu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vaaddu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vaaddu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vaaddu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vaaddu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vaaddu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vaaddu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vaaddu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vaaddu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vaaddu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vaaddu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vaaddu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vaaddu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vaaddu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vaaddu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vaaddu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vaaddu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vaaddu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vaaddu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vaaddu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vaaddu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vaaddu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vaaddu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vaaddu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vaaddu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vaaddu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vaaddu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vaaddu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vaaddu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vaaddu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vaaddu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vaaddu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vaaddu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vaaddu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vaaddu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vaaddu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vaaddu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vaaddu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vaaddu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vaaddu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vaaddu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vaaddu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vaaddu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vaaddu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vaaddu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vaaddu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vaaddu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vaaddu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vaaddu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vaaddu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vaaddu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vaaddu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vaaddu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vaaddu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vaaddu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vaaddu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vaaddu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vaaddu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vaaddu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vaaddu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vaaddu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vaaddu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vaaddu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vaaddu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vaaddu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vaaddu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vaaddu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vaaddu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vaaddu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vaaddu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vaaddu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vaaddu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vaaddu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vaaddu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vaaddu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vaaddu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vaaddu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vaaddu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vaaddu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vaaddu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vaaddu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vaaddu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vaaddu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vaaddu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vaaddu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vaaddu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vaaddu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vaaddu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vaaddu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vaaddu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vaaddu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vaaddu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vaaddu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vaaddu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vadc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vadc.c index 34545aafd9877c5580a393c4975cfd595fb0eb2c..bf9e264d2193a0985965445f3c9bd45dfc51ae31 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vadc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vadc.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadc_vvm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_i8mf8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8mf8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vadc_vvm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadc_vxm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_i8mf8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8mf8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vadc_vxm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadc_vvm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_i8mf4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8mf4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vadc_vvm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadc_vxm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_i8mf4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8mf4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vadc_vxm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadc_vvm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_i8mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vadc_vvm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadc_vxm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_i8mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vadc_vxm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadc_vvm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_i8m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vadc_vvm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadc_vxm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_i8m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vadc_vxm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadc_vvm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_i8m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vadc_vvm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadc_vxm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_i8m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vadc_vxm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadc_vvm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, vbool2_t carryin, size_t vl) { - return vadc_vvm_i8m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vadc_vvm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadc_vxm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, vbool2_t carryin, size_t vl) { - return vadc_vxm_i8m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vadc_vxm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadc_vvm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, vbool1_t carryin, size_t vl) { - return vadc_vvm_i8m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i8m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vadc_vvm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadc_vxm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, vbool1_t carryin, size_t vl) { - return vadc_vxm_i8m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i8m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vadc_vxm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadc_vvm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_i16mf4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16mf4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vadc_vvm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadc_vxm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_i16mf4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16mf4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vadc_vxm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadc_vvm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_i16mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vadc_vvm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadc_vxm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_i16mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vadc_vxm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadc_vvm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_i16m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vadc_vvm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadc_vxm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_i16m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vadc_vxm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadc_vvm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_i16m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vadc_vvm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadc_vxm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_i16m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vadc_vxm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadc_vvm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_i16m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vadc_vvm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadc_vxm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_i16m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vadc_vxm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadc_vvm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, vbool2_t carryin, size_t vl) { - return vadc_vvm_i16m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i16m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vadc_vvm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadc_vxm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, vbool2_t carryin, size_t vl) { - return vadc_vxm_i16m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i16m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vadc_vxm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadc_vvm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_i32mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vadc_vvm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadc_vxm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_i32mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vadc_vxm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadc_vvm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_i32m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vadc_vvm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadc_vxm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_i32m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vadc_vxm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadc_vvm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_i32m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vadc_vvm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadc_vxm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_i32m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vadc_vxm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadc_vvm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_i32m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vadc_vvm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadc_vxm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_i32m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vadc_vxm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadc_vvm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_i32m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i32m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vadc_vvm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadc_vxm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_i32m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i32m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vadc_vxm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadc_vvm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_i64m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i64m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vadc_vvm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadc_vxm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_i64m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i64m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vadc_vxm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadc_vvm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_i64m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i64m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vadc_vvm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadc_vxm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_i64m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i64m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vadc_vxm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadc_vvm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_i64m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i64m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vadc_vvm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadc_vxm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_i64m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i64m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vadc_vxm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadc_vvm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_i64m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_i64m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vadc_vvm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadc_vxm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_i64m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_i64m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vadc_vxm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadc_vvm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_u8mf8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8mf8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vadc_vvm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadc_vxm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_u8mf8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8mf8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vadc_vxm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadc_vvm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_u8mf4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8mf4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vadc_vvm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadc_vxm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_u8mf4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8mf4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vadc_vxm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadc_vvm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_u8mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vadc_vvm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadc_vxm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_u8mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vadc_vxm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadc_vvm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_u8m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vadc_vvm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadc_vxm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_u8m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vadc_vxm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadc_vvm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_u8m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vadc_vvm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadc_vxm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_u8m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vadc_vxm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadc_vvm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, vbool2_t carryin, size_t vl) { - return vadc_vvm_u8m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vadc_vvm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadc_vxm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, vbool2_t carryin, size_t vl) { - return vadc_vxm_u8m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vadc_vxm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadc_vvm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, vbool1_t carryin, size_t vl) { - return vadc_vvm_u8m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u8m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vadc_vvm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadc_vxm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, vbool1_t carryin, size_t vl) { - return vadc_vxm_u8m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u8m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vadc_vxm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadc_vvm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_u16mf4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16mf4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vadc_vvm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadc_vxm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_u16mf4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16mf4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vadc_vxm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadc_vvm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_u16mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vadc_vvm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadc_vxm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_u16mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vadc_vxm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadc_vvm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_u16m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vadc_vvm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadc_vxm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_u16m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vadc_vxm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadc_vvm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_u16m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vadc_vvm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadc_vxm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_u16m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vadc_vxm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadc_vvm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_u16m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vadc_vvm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadc_vxm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_u16m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vadc_vxm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadc_vvm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, vbool2_t carryin, size_t vl) { - return vadc_vvm_u16m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u16m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vadc_vvm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadc_vxm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, vbool2_t carryin, size_t vl) { - return vadc_vxm_u16m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u16m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vadc_vxm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadc_vvm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_u32mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vadc_vvm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadc_vxm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_u32mf2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32mf2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vadc_vxm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadc_vvm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_u32m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vadc_vvm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadc_vxm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_u32m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vadc_vxm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadc_vvm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_u32m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vadc_vvm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadc_vxm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_u32m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vadc_vxm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadc_vvm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_u32m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vadc_vvm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadc_vxm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_u32m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vadc_vxm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadc_vvm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, vbool4_t carryin, size_t vl) { - return vadc_vvm_u32m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u32m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vadc_vvm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadc_vxm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, vbool4_t carryin, size_t vl) { - return vadc_vxm_u32m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u32m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vadc_vxm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadc_vvm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, vbool64_t carryin, size_t vl) { - return vadc_vvm_u64m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u64m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vadc_vvm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadc_vxm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, vbool64_t carryin, size_t vl) { - return vadc_vxm_u64m1_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u64m1_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vadc_vxm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadc_vvm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, vbool32_t carryin, size_t vl) { - return vadc_vvm_u64m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u64m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vadc_vvm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadc_vxm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, vbool32_t carryin, size_t vl) { - return vadc_vxm_u64m2_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u64m2_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vadc_vxm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadc_vvm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, vbool16_t carryin, size_t vl) { - return vadc_vvm_u64m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u64m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vadc_vvm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadc_vxm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, vbool16_t carryin, size_t vl) { - return vadc_vxm_u64m4_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u64m4_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vvm_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vadc_vxm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadc_vvm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, vbool8_t carryin, size_t vl) { - return vadc_vvm_u64m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vvm_u64m8_tu(maskedoff, op1, op2, carryin, vl); } // CHECK-RV64-LABEL: @test_vadc_vxm_u64m8_tu( @@ -795,6 +795,6 @@ vuint64m8_t test_vadc_vvm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadc_vxm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, vbool8_t carryin, size_t vl) { - return vadc_vxm_u64m8_tu(maskedoff, op1, op2, carryin, vl); + return __riscv_vadc_vxm_u64m8_tu(maskedoff, op1, op2, carryin, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vadd.c index 5b5d5012fa9f07c3951d7cb12dc525bd9d2eddef..f1e5edb51d283faacd78967f04ce675195191ea1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vadd.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vadd_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vadd_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vadd_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vadd_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vadd_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vadd_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vadd_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vadd_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vadd_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vadd_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vadd_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vadd_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vadd_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vadd_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vadd_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vadd_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vadd_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vadd_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vadd_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vadd_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vadd_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vadd_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vadd_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vadd_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vadd_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vadd_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vadd_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vadd_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vadd_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vadd_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vadd_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vadd_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vadd_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vadd_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vadd_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vadd_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vadd_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vadd_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vadd_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vadd_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vadd_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vadd_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vadd_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vadd_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vadd_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vadd_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vadd_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vadd_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vadd_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vadd_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vadd_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vadd_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vadd_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vadd_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vadd_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vadd_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vadd_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vadd_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vadd_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vadd_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vadd_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vadd_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vadd_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vadd_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vadd_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vadd_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vadd_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vadd_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vadd_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vadd_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vadd_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vadd_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vadd_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vadd_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vadd_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vadd_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vadd_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vadd_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vadd_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vadd_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vadd_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vadd_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vadd_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vadd_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vadd_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vadd_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vadd_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vadd_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vadd_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vadd_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vadd_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vadd_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vadd_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vadd_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vadd_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vadd_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vadd_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vadd_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vadd_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vadd_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vadd_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vadd_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vadd_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vadd_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vadd_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vadd_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vadd_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vadd_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vadd_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vadd_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vadd_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vadd_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vadd_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vadd_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vadd_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vadd_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vadd_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vadd_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vadd_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vadd_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vadd_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vadd_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vadd_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vadd_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vadd_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vadd_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vadd_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vadd_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vadd_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vadd_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m8_tu( @@ -795,7 +795,7 @@ vuint64m8_t test_vadd_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf8_tum( @@ -804,7 +804,7 @@ vuint64m8_t test_vadd_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vadd_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf8_tum( @@ -813,7 +813,7 @@ vint8mf8_t test_vadd_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf4_tum( @@ -822,7 +822,7 @@ vint8mf8_t test_vadd_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vadd_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf4_tum( @@ -831,7 +831,7 @@ vint8mf4_t test_vadd_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf2_tum( @@ -840,7 +840,7 @@ vint8mf4_t test_vadd_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vadd_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf2_tum( @@ -849,7 +849,7 @@ vint8mf2_t test_vadd_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m1_tum( @@ -858,7 +858,7 @@ vint8mf2_t test_vadd_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vadd_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m1_tum( @@ -867,7 +867,7 @@ vint8m1_t test_vadd_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m2_tum( @@ -876,7 +876,7 @@ vint8m1_t test_vadd_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vadd_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m2_tum( @@ -885,7 +885,7 @@ vint8m2_t test_vadd_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m4_tum( @@ -894,7 +894,7 @@ vint8m2_t test_vadd_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vadd_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m4_tum( @@ -903,7 +903,7 @@ vint8m4_t test_vadd_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m8_tum( @@ -912,7 +912,7 @@ vint8m4_t test_vadd_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vadd_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m8_tum( @@ -921,7 +921,7 @@ vint8m8_t test_vadd_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf4_tum( @@ -930,7 +930,7 @@ vint8m8_t test_vadd_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vadd_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf4_tum( @@ -939,7 +939,7 @@ vint16mf4_t test_vadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf2_tum( @@ -948,7 +948,7 @@ vint16mf4_t test_vadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vadd_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf2_tum( @@ -957,7 +957,7 @@ vint16mf2_t test_vadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m1_tum( @@ -966,7 +966,7 @@ vint16mf2_t test_vadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vadd_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m1_tum( @@ -975,7 +975,7 @@ vint16m1_t test_vadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m2_tum( @@ -984,7 +984,7 @@ vint16m1_t test_vadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vadd_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m2_tum( @@ -993,7 +993,7 @@ vint16m2_t test_vadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m4_tum( @@ -1002,7 +1002,7 @@ vint16m2_t test_vadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vadd_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m4_tum( @@ -1011,7 +1011,7 @@ vint16m4_t test_vadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m8_tum( @@ -1020,7 +1020,7 @@ vint16m4_t test_vadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vadd_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m8_tum( @@ -1029,7 +1029,7 @@ vint16m8_t test_vadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32mf2_tum( @@ -1038,7 +1038,7 @@ vint16m8_t test_vadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vadd_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32mf2_tum( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m1_tum( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vadd_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m1_tum( @@ -1065,7 +1065,7 @@ vint32m1_t test_vadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m2_tum( @@ -1074,7 +1074,7 @@ vint32m1_t test_vadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vadd_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m2_tum( @@ -1083,7 +1083,7 @@ vint32m2_t test_vadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m4_tum( @@ -1092,7 +1092,7 @@ vint32m2_t test_vadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vadd_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m4_tum( @@ -1101,7 +1101,7 @@ vint32m4_t test_vadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m8_tum( @@ -1110,7 +1110,7 @@ vint32m4_t test_vadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vadd_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m8_tum( @@ -1119,7 +1119,7 @@ vint32m8_t test_vadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m1_tum( @@ -1128,7 +1128,7 @@ vint32m8_t test_vadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vadd_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m1_tum( @@ -1137,7 +1137,7 @@ vint64m1_t test_vadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m2_tum( @@ -1146,7 +1146,7 @@ vint64m1_t test_vadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vadd_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m2_tum( @@ -1155,7 +1155,7 @@ vint64m2_t test_vadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m4_tum( @@ -1164,7 +1164,7 @@ vint64m2_t test_vadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vadd_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m4_tum( @@ -1173,7 +1173,7 @@ vint64m4_t test_vadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m8_tum( @@ -1182,7 +1182,7 @@ vint64m4_t test_vadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vadd_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m8_tum( @@ -1191,7 +1191,7 @@ vint64m8_t test_vadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf8_tum( @@ -1200,7 +1200,7 @@ vint64m8_t test_vadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vadd_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf8_tum( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vadd_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf4_tum( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vadd_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vadd_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf4_tum( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vadd_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf2_tum( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vadd_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vadd_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf2_tum( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vadd_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m1_tum( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vadd_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vadd_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m1_tum( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vadd_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m2_tum( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vadd_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vadd_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m2_tum( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vadd_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m4_tum( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vadd_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vadd_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m4_tum( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vadd_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m8_tum( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vadd_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vadd_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m8_tum( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vadd_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf4_tum( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vadd_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vadd_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf4_tum( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vadd_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf2_tum( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vadd_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vadd_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf2_tum( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vadd_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m1_tum( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vadd_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vadd_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m1_tum( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vadd_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m2_tum( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vadd_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vadd_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m2_tum( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vadd_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m4_tum( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vadd_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vadd_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m4_tum( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vadd_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m8_tum( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vadd_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vadd_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m8_tum( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vadd_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32mf2_tum( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vadd_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vadd_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32mf2_tum( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vadd_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m1_tum( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vadd_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vadd_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m1_tum( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vadd_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m2_tum( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vadd_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vadd_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m2_tum( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vadd_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m4_tum( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vadd_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vadd_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m4_tum( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vadd_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m8_tum( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vadd_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vadd_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m8_tum( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vadd_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m1_tum( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vadd_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vadd_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m1_tum( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vadd_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m2_tum( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vadd_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vadd_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m2_tum( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vadd_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m4_tum( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vadd_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vadd_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m4_tum( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vadd_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m8_tum( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vadd_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vadd_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m8_tum( @@ -1587,7 +1587,7 @@ vuint64m8_t test_vadd_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf8_tumu( @@ -1596,7 +1596,7 @@ vuint64m8_t test_vadd_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vadd_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf8_tumu( @@ -1605,7 +1605,7 @@ vint8mf8_t test_vadd_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf4_tumu( @@ -1614,7 +1614,7 @@ vint8mf8_t test_vadd_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vadd_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf4_tumu( @@ -1623,7 +1623,7 @@ vint8mf4_t test_vadd_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf2_tumu( @@ -1632,7 +1632,7 @@ vint8mf4_t test_vadd_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vadd_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf2_tumu( @@ -1641,7 +1641,7 @@ vint8mf2_t test_vadd_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m1_tumu( @@ -1650,7 +1650,7 @@ vint8mf2_t test_vadd_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vadd_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m1_tumu( @@ -1659,7 +1659,7 @@ vint8m1_t test_vadd_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m2_tumu( @@ -1668,7 +1668,7 @@ vint8m1_t test_vadd_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vadd_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m2_tumu( @@ -1677,7 +1677,7 @@ vint8m2_t test_vadd_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m4_tumu( @@ -1686,7 +1686,7 @@ vint8m2_t test_vadd_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vadd_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m4_tumu( @@ -1695,7 +1695,7 @@ vint8m4_t test_vadd_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m8_tumu( @@ -1704,7 +1704,7 @@ vint8m4_t test_vadd_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vadd_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m8_tumu( @@ -1713,7 +1713,7 @@ vint8m8_t test_vadd_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf4_tumu( @@ -1722,7 +1722,7 @@ vint8m8_t test_vadd_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vadd_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf4_tumu( @@ -1731,7 +1731,7 @@ vint16mf4_t test_vadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf2_tumu( @@ -1740,7 +1740,7 @@ vint16mf4_t test_vadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vadd_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf2_tumu( @@ -1749,7 +1749,7 @@ vint16mf2_t test_vadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m1_tumu( @@ -1758,7 +1758,7 @@ vint16mf2_t test_vadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vadd_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m1_tumu( @@ -1767,7 +1767,7 @@ vint16m1_t test_vadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m2_tumu( @@ -1776,7 +1776,7 @@ vint16m1_t test_vadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vadd_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m2_tumu( @@ -1785,7 +1785,7 @@ vint16m2_t test_vadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m4_tumu( @@ -1794,7 +1794,7 @@ vint16m2_t test_vadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vadd_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m4_tumu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m8_tumu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vadd_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m8_tumu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32mf2_tumu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vadd_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32mf2_tumu( @@ -1839,7 +1839,7 @@ vint32mf2_t test_vadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m1_tumu( @@ -1848,7 +1848,7 @@ vint32mf2_t test_vadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m1_tumu( @@ -1857,7 +1857,7 @@ vint32m1_t test_vadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m2_tumu( @@ -1866,7 +1866,7 @@ vint32m1_t test_vadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vadd_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m2_tumu( @@ -1875,7 +1875,7 @@ vint32m2_t test_vadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m4_tumu( @@ -1884,7 +1884,7 @@ vint32m2_t test_vadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vadd_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m4_tumu( @@ -1893,7 +1893,7 @@ vint32m4_t test_vadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m8_tumu( @@ -1902,7 +1902,7 @@ vint32m4_t test_vadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vadd_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m8_tumu( @@ -1911,7 +1911,7 @@ vint32m8_t test_vadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m1_tumu( @@ -1920,7 +1920,7 @@ vint32m8_t test_vadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vadd_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m1_tumu( @@ -1929,7 +1929,7 @@ vint64m1_t test_vadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m2_tumu( @@ -1938,7 +1938,7 @@ vint64m1_t test_vadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vadd_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m2_tumu( @@ -1947,7 +1947,7 @@ vint64m2_t test_vadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m4_tumu( @@ -1956,7 +1956,7 @@ vint64m2_t test_vadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vadd_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m4_tumu( @@ -1965,7 +1965,7 @@ vint64m4_t test_vadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m8_tumu( @@ -1974,7 +1974,7 @@ vint64m4_t test_vadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vadd_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m8_tumu( @@ -1983,7 +1983,7 @@ vint64m8_t test_vadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf8_tumu( @@ -1992,7 +1992,7 @@ vint64m8_t test_vadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vadd_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf8_tumu( @@ -2001,7 +2001,7 @@ vuint8mf8_t test_vadd_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf4_tumu( @@ -2010,7 +2010,7 @@ vuint8mf8_t test_vadd_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vadd_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf4_tumu( @@ -2019,7 +2019,7 @@ vuint8mf4_t test_vadd_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf2_tumu( @@ -2028,7 +2028,7 @@ vuint8mf4_t test_vadd_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vadd_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf2_tumu( @@ -2037,7 +2037,7 @@ vuint8mf2_t test_vadd_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m1_tumu( @@ -2046,7 +2046,7 @@ vuint8mf2_t test_vadd_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vadd_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m1_tumu( @@ -2055,7 +2055,7 @@ vuint8m1_t test_vadd_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m2_tumu( @@ -2064,7 +2064,7 @@ vuint8m1_t test_vadd_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vadd_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m2_tumu( @@ -2073,7 +2073,7 @@ vuint8m2_t test_vadd_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m4_tumu( @@ -2082,7 +2082,7 @@ vuint8m2_t test_vadd_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vadd_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m4_tumu( @@ -2091,7 +2091,7 @@ vuint8m4_t test_vadd_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m8_tumu( @@ -2100,7 +2100,7 @@ vuint8m4_t test_vadd_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vadd_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m8_tumu( @@ -2109,7 +2109,7 @@ vuint8m8_t test_vadd_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf4_tumu( @@ -2118,7 +2118,7 @@ vuint8m8_t test_vadd_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vadd_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf4_tumu( @@ -2127,7 +2127,7 @@ vuint16mf4_t test_vadd_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf2_tumu( @@ -2136,7 +2136,7 @@ vuint16mf4_t test_vadd_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vadd_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf2_tumu( @@ -2145,7 +2145,7 @@ vuint16mf2_t test_vadd_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m1_tumu( @@ -2154,7 +2154,7 @@ vuint16mf2_t test_vadd_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vadd_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m1_tumu( @@ -2163,7 +2163,7 @@ vuint16m1_t test_vadd_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m2_tumu( @@ -2172,7 +2172,7 @@ vuint16m1_t test_vadd_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vadd_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m2_tumu( @@ -2181,7 +2181,7 @@ vuint16m2_t test_vadd_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m4_tumu( @@ -2190,7 +2190,7 @@ vuint16m2_t test_vadd_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vadd_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m4_tumu( @@ -2199,7 +2199,7 @@ vuint16m4_t test_vadd_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m8_tumu( @@ -2208,7 +2208,7 @@ vuint16m4_t test_vadd_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vadd_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m8_tumu( @@ -2217,7 +2217,7 @@ vuint16m8_t test_vadd_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32mf2_tumu( @@ -2226,7 +2226,7 @@ vuint16m8_t test_vadd_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vadd_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32mf2_tumu( @@ -2235,7 +2235,7 @@ vuint32mf2_t test_vadd_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m1_tumu( @@ -2244,7 +2244,7 @@ vuint32mf2_t test_vadd_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vadd_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m1_tumu( @@ -2253,7 +2253,7 @@ vuint32m1_t test_vadd_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m2_tumu( @@ -2262,7 +2262,7 @@ vuint32m1_t test_vadd_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vadd_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m2_tumu( @@ -2271,7 +2271,7 @@ vuint32m2_t test_vadd_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m4_tumu( @@ -2280,7 +2280,7 @@ vuint32m2_t test_vadd_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vadd_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m4_tumu( @@ -2289,7 +2289,7 @@ vuint32m4_t test_vadd_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m8_tumu( @@ -2298,7 +2298,7 @@ vuint32m4_t test_vadd_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vadd_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m8_tumu( @@ -2307,7 +2307,7 @@ vuint32m8_t test_vadd_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m1_tumu( @@ -2316,7 +2316,7 @@ vuint32m8_t test_vadd_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vadd_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m1_tumu( @@ -2325,7 +2325,7 @@ vuint64m1_t test_vadd_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m2_tumu( @@ -2334,7 +2334,7 @@ vuint64m1_t test_vadd_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vadd_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m2_tumu( @@ -2343,7 +2343,7 @@ vuint64m2_t test_vadd_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m4_tumu( @@ -2352,7 +2352,7 @@ vuint64m2_t test_vadd_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vadd_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m4_tumu( @@ -2361,7 +2361,7 @@ vuint64m4_t test_vadd_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m8_tumu( @@ -2370,7 +2370,7 @@ vuint64m4_t test_vadd_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vadd_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m8_tumu( @@ -2379,7 +2379,7 @@ vuint64m8_t test_vadd_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf8_mu( @@ -2388,7 +2388,7 @@ vuint64m8_t test_vadd_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vadd_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf8_mu( @@ -2397,7 +2397,7 @@ vint8mf8_t test_vadd_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vadd_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf4_mu( @@ -2406,7 +2406,7 @@ vint8mf8_t test_vadd_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vadd_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf4_mu( @@ -2415,7 +2415,7 @@ vint8mf4_t test_vadd_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vadd_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8mf2_mu( @@ -2424,7 +2424,7 @@ vint8mf4_t test_vadd_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vadd_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8mf2_mu( @@ -2433,7 +2433,7 @@ vint8mf2_t test_vadd_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vadd_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m1_mu( @@ -2442,7 +2442,7 @@ vint8mf2_t test_vadd_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vadd_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m1_mu( @@ -2451,7 +2451,7 @@ vint8m1_t test_vadd_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vadd_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m2_mu( @@ -2460,7 +2460,7 @@ vint8m1_t test_vadd_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vadd_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m2_mu( @@ -2469,7 +2469,7 @@ vint8m2_t test_vadd_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vadd_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m4_mu( @@ -2478,7 +2478,7 @@ vint8m2_t test_vadd_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vadd_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m4_mu( @@ -2487,7 +2487,7 @@ vint8m4_t test_vadd_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vadd_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i8m8_mu( @@ -2496,7 +2496,7 @@ vint8m4_t test_vadd_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vadd_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i8m8_mu( @@ -2505,7 +2505,7 @@ vint8m8_t test_vadd_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vadd_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vadd_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf4_mu( @@ -2514,7 +2514,7 @@ vint8m8_t test_vadd_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vadd_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf4_mu( @@ -2523,7 +2523,7 @@ vint16mf4_t test_vadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16mf2_mu( @@ -2532,7 +2532,7 @@ vint16mf4_t test_vadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vadd_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16mf2_mu( @@ -2541,7 +2541,7 @@ vint16mf2_t test_vadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m1_mu( @@ -2550,7 +2550,7 @@ vint16mf2_t test_vadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vadd_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m1_mu( @@ -2559,7 +2559,7 @@ vint16m1_t test_vadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m2_mu( @@ -2568,7 +2568,7 @@ vint16m1_t test_vadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vadd_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m2_mu( @@ -2577,7 +2577,7 @@ vint16m2_t test_vadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m4_mu( @@ -2586,7 +2586,7 @@ vint16m2_t test_vadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vadd_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m4_mu( @@ -2595,7 +2595,7 @@ vint16m4_t test_vadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i16m8_mu( @@ -2604,7 +2604,7 @@ vint16m4_t test_vadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vadd_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i16m8_mu( @@ -2613,7 +2613,7 @@ vint16m8_t test_vadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vadd_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32mf2_mu( @@ -2622,7 +2622,7 @@ vint16m8_t test_vadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vadd_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32mf2_mu( @@ -2631,7 +2631,7 @@ vint32mf2_t test_vadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m1_mu( @@ -2640,7 +2640,7 @@ vint32mf2_t test_vadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vadd_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m1_mu( @@ -2649,7 +2649,7 @@ vint32m1_t test_vadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m2_mu( @@ -2658,7 +2658,7 @@ vint32m1_t test_vadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vadd_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m2_mu( @@ -2667,7 +2667,7 @@ vint32m2_t test_vadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m4_mu( @@ -2676,7 +2676,7 @@ vint32m2_t test_vadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vadd_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m4_mu( @@ -2685,7 +2685,7 @@ vint32m4_t test_vadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i32m8_mu( @@ -2694,7 +2694,7 @@ vint32m4_t test_vadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vadd_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i32m8_mu( @@ -2703,7 +2703,7 @@ vint32m8_t test_vadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vadd_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m1_mu( @@ -2712,7 +2712,7 @@ vint32m8_t test_vadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vadd_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m1_mu( @@ -2721,7 +2721,7 @@ vint64m1_t test_vadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m2_mu( @@ -2730,7 +2730,7 @@ vint64m1_t test_vadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vadd_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m2_mu( @@ -2739,7 +2739,7 @@ vint64m2_t test_vadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m4_mu( @@ -2748,7 +2748,7 @@ vint64m2_t test_vadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vadd_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m4_mu( @@ -2757,7 +2757,7 @@ vint64m4_t test_vadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_i64m8_mu( @@ -2766,7 +2766,7 @@ vint64m4_t test_vadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vadd_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_i64m8_mu( @@ -2775,7 +2775,7 @@ vint64m8_t test_vadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vadd_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vadd_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf8_mu( @@ -2784,7 +2784,7 @@ vint64m8_t test_vadd_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vadd_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf8_mu( @@ -2793,7 +2793,7 @@ vuint8mf8_t test_vadd_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vadd_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf4_mu( @@ -2802,7 +2802,7 @@ vuint8mf8_t test_vadd_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vadd_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf4_mu( @@ -2811,7 +2811,7 @@ vuint8mf4_t test_vadd_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vadd_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8mf2_mu( @@ -2820,7 +2820,7 @@ vuint8mf4_t test_vadd_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vadd_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8mf2_mu( @@ -2829,7 +2829,7 @@ vuint8mf2_t test_vadd_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vadd_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m1_mu( @@ -2838,7 +2838,7 @@ vuint8mf2_t test_vadd_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vadd_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m1_mu( @@ -2847,7 +2847,7 @@ vuint8m1_t test_vadd_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vadd_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m2_mu( @@ -2856,7 +2856,7 @@ vuint8m1_t test_vadd_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vadd_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m2_mu( @@ -2865,7 +2865,7 @@ vuint8m2_t test_vadd_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vadd_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m4_mu( @@ -2874,7 +2874,7 @@ vuint8m2_t test_vadd_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vadd_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m4_mu( @@ -2883,7 +2883,7 @@ vuint8m4_t test_vadd_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vadd_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u8m8_mu( @@ -2892,7 +2892,7 @@ vuint8m4_t test_vadd_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vadd_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u8m8_mu( @@ -2901,7 +2901,7 @@ vuint8m8_t test_vadd_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vadd_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vadd_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf4_mu( @@ -2910,7 +2910,7 @@ vuint8m8_t test_vadd_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vadd_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf4_mu( @@ -2919,7 +2919,7 @@ vuint16mf4_t test_vadd_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vadd_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16mf2_mu( @@ -2928,7 +2928,7 @@ vuint16mf4_t test_vadd_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vadd_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16mf2_mu( @@ -2937,7 +2937,7 @@ vuint16mf2_t test_vadd_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vadd_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m1_mu( @@ -2946,7 +2946,7 @@ vuint16mf2_t test_vadd_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vadd_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m1_mu( @@ -2955,7 +2955,7 @@ vuint16m1_t test_vadd_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vadd_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m2_mu( @@ -2964,7 +2964,7 @@ vuint16m1_t test_vadd_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vadd_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m2_mu( @@ -2973,7 +2973,7 @@ vuint16m2_t test_vadd_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vadd_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m4_mu( @@ -2982,7 +2982,7 @@ vuint16m2_t test_vadd_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vadd_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m4_mu( @@ -2991,7 +2991,7 @@ vuint16m4_t test_vadd_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vadd_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u16m8_mu( @@ -3000,7 +3000,7 @@ vuint16m4_t test_vadd_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vadd_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u16m8_mu( @@ -3009,7 +3009,7 @@ vuint16m8_t test_vadd_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vadd_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vadd_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32mf2_mu( @@ -3018,7 +3018,7 @@ vuint16m8_t test_vadd_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vadd_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32mf2_mu( @@ -3027,7 +3027,7 @@ vuint32mf2_t test_vadd_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vadd_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m1_mu( @@ -3036,7 +3036,7 @@ vuint32mf2_t test_vadd_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vadd_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m1_mu( @@ -3045,7 +3045,7 @@ vuint32m1_t test_vadd_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vadd_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m2_mu( @@ -3054,7 +3054,7 @@ vuint32m1_t test_vadd_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vadd_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m2_mu( @@ -3063,7 +3063,7 @@ vuint32m2_t test_vadd_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vadd_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m4_mu( @@ -3072,7 +3072,7 @@ vuint32m2_t test_vadd_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vadd_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m4_mu( @@ -3081,7 +3081,7 @@ vuint32m4_t test_vadd_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vadd_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u32m8_mu( @@ -3090,7 +3090,7 @@ vuint32m4_t test_vadd_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vadd_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u32m8_mu( @@ -3099,7 +3099,7 @@ vuint32m8_t test_vadd_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vadd_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vadd_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m1_mu( @@ -3108,7 +3108,7 @@ vuint32m8_t test_vadd_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vadd_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m1_mu( @@ -3117,7 +3117,7 @@ vuint64m1_t test_vadd_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vadd_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m2_mu( @@ -3126,7 +3126,7 @@ vuint64m1_t test_vadd_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vadd_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m2_mu( @@ -3135,7 +3135,7 @@ vuint64m2_t test_vadd_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vadd_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m4_mu( @@ -3144,7 +3144,7 @@ vuint64m2_t test_vadd_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vadd_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m4_mu( @@ -3153,7 +3153,7 @@ vuint64m4_t test_vadd_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vadd_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vv_u64m8_mu( @@ -3162,7 +3162,7 @@ vuint64m4_t test_vadd_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vadd_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vadd_vx_u64m8_mu( @@ -3171,6 +3171,6 @@ vuint64m8_t test_vadd_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vadd_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vadd_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vadd_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vand.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vand.c index 6aa38f5601e6612a78c2842c94d81284eb01e19f..6f71f5772955bb46703b8a255acb5ba057afc91e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vand.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vand.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vand_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vand_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vand_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vand_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vand_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vand_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vand_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vand_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vand_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vand_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vand_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vand_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vand_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vand_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vand_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vand_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vand_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vand_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vand_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vand_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vand_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vand_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vand_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vand_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vand_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vand_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vand_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vand_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vand_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vand_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vand_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vand_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vand_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vand_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vand_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vand_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vand_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vand_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vand_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vand_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vand_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vand_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vand_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vand_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vand_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vand_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vand_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vand_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vand_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vand_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vand_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vand_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vand_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vand_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vand_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vand_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vand_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vand_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vand_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vand_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vand_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vand_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vand_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vand_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vand_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vand_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vand_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vand_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vand_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vand_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vand_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vand_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vand_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vand_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vand_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vand_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vand_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vand_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vand_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vand_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vand_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vand_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vand_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vand_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vand_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vand_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vand_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vand_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vand_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vand_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vand_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vand_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vand_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vand_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vand_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vand_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vand_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vand_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vand_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vand_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vand_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vand_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vand_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vand_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vand_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vand_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vand_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vand_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vand_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vand_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vand_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vand_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vand_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vand_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vand_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vand_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vand_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vand_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vand_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vand_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vand_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vand_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vand_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vand_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vand_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vand_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vand_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vand_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vand_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vand_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m8_tu( @@ -795,7 +795,7 @@ vuint64m8_t test_vand_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf8_tum( @@ -804,7 +804,7 @@ vuint64m8_t test_vand_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vand_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf8_tum( @@ -813,7 +813,7 @@ vint8mf8_t test_vand_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf4_tum( @@ -822,7 +822,7 @@ vint8mf8_t test_vand_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vand_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf4_tum( @@ -831,7 +831,7 @@ vint8mf4_t test_vand_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf2_tum( @@ -840,7 +840,7 @@ vint8mf4_t test_vand_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vand_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf2_tum( @@ -849,7 +849,7 @@ vint8mf2_t test_vand_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m1_tum( @@ -858,7 +858,7 @@ vint8mf2_t test_vand_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vand_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m1_tum( @@ -867,7 +867,7 @@ vint8m1_t test_vand_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m2_tum( @@ -876,7 +876,7 @@ vint8m1_t test_vand_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vand_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m2_tum( @@ -885,7 +885,7 @@ vint8m2_t test_vand_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m4_tum( @@ -894,7 +894,7 @@ vint8m2_t test_vand_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vand_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m4_tum( @@ -903,7 +903,7 @@ vint8m4_t test_vand_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m8_tum( @@ -912,7 +912,7 @@ vint8m4_t test_vand_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vand_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m8_tum( @@ -921,7 +921,7 @@ vint8m8_t test_vand_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf4_tum( @@ -930,7 +930,7 @@ vint8m8_t test_vand_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vand_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf4_tum( @@ -939,7 +939,7 @@ vint16mf4_t test_vand_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf2_tum( @@ -948,7 +948,7 @@ vint16mf4_t test_vand_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vand_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf2_tum( @@ -957,7 +957,7 @@ vint16mf2_t test_vand_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m1_tum( @@ -966,7 +966,7 @@ vint16mf2_t test_vand_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vand_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m1_tum( @@ -975,7 +975,7 @@ vint16m1_t test_vand_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m2_tum( @@ -984,7 +984,7 @@ vint16m1_t test_vand_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vand_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m2_tum( @@ -993,7 +993,7 @@ vint16m2_t test_vand_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m4_tum( @@ -1002,7 +1002,7 @@ vint16m2_t test_vand_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vand_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m4_tum( @@ -1011,7 +1011,7 @@ vint16m4_t test_vand_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m8_tum( @@ -1020,7 +1020,7 @@ vint16m4_t test_vand_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vand_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m8_tum( @@ -1029,7 +1029,7 @@ vint16m8_t test_vand_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32mf2_tum( @@ -1038,7 +1038,7 @@ vint16m8_t test_vand_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vand_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32mf2_tum( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vand_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m1_tum( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vand_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vand_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m1_tum( @@ -1065,7 +1065,7 @@ vint32m1_t test_vand_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m2_tum( @@ -1074,7 +1074,7 @@ vint32m1_t test_vand_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vand_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m2_tum( @@ -1083,7 +1083,7 @@ vint32m2_t test_vand_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m4_tum( @@ -1092,7 +1092,7 @@ vint32m2_t test_vand_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vand_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m4_tum( @@ -1101,7 +1101,7 @@ vint32m4_t test_vand_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m8_tum( @@ -1110,7 +1110,7 @@ vint32m4_t test_vand_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vand_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m8_tum( @@ -1119,7 +1119,7 @@ vint32m8_t test_vand_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m1_tum( @@ -1128,7 +1128,7 @@ vint32m8_t test_vand_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vand_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m1_tum( @@ -1137,7 +1137,7 @@ vint64m1_t test_vand_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m2_tum( @@ -1146,7 +1146,7 @@ vint64m1_t test_vand_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vand_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m2_tum( @@ -1155,7 +1155,7 @@ vint64m2_t test_vand_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m4_tum( @@ -1164,7 +1164,7 @@ vint64m2_t test_vand_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vand_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m4_tum( @@ -1173,7 +1173,7 @@ vint64m4_t test_vand_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m8_tum( @@ -1182,7 +1182,7 @@ vint64m4_t test_vand_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vand_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m8_tum( @@ -1191,7 +1191,7 @@ vint64m8_t test_vand_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf8_tum( @@ -1200,7 +1200,7 @@ vint64m8_t test_vand_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vand_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf8_tum( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vand_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf4_tum( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vand_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vand_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf4_tum( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vand_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf2_tum( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vand_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vand_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf2_tum( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vand_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m1_tum( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vand_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vand_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m1_tum( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vand_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m2_tum( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vand_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vand_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m2_tum( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vand_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m4_tum( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vand_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vand_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m4_tum( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vand_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m8_tum( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vand_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vand_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m8_tum( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vand_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf4_tum( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vand_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vand_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf4_tum( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vand_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf2_tum( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vand_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vand_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf2_tum( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vand_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m1_tum( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vand_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vand_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m1_tum( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vand_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m2_tum( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vand_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vand_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m2_tum( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vand_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m4_tum( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vand_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vand_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m4_tum( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vand_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m8_tum( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vand_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vand_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m8_tum( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vand_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32mf2_tum( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vand_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vand_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32mf2_tum( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vand_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m1_tum( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vand_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vand_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m1_tum( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vand_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m2_tum( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vand_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vand_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m2_tum( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vand_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m4_tum( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vand_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vand_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m4_tum( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vand_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m8_tum( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vand_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vand_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m8_tum( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vand_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m1_tum( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vand_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vand_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m1_tum( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vand_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m2_tum( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vand_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vand_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m2_tum( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vand_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m4_tum( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vand_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vand_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m4_tum( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vand_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m8_tum( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vand_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vand_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m8_tum( @@ -1587,7 +1587,7 @@ vuint64m8_t test_vand_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf8_tumu( @@ -1596,7 +1596,7 @@ vuint64m8_t test_vand_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vand_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf8_tumu( @@ -1605,7 +1605,7 @@ vint8mf8_t test_vand_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf4_tumu( @@ -1614,7 +1614,7 @@ vint8mf8_t test_vand_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vand_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf4_tumu( @@ -1623,7 +1623,7 @@ vint8mf4_t test_vand_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf2_tumu( @@ -1632,7 +1632,7 @@ vint8mf4_t test_vand_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vand_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf2_tumu( @@ -1641,7 +1641,7 @@ vint8mf2_t test_vand_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m1_tumu( @@ -1650,7 +1650,7 @@ vint8mf2_t test_vand_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vand_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m1_tumu( @@ -1659,7 +1659,7 @@ vint8m1_t test_vand_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m2_tumu( @@ -1668,7 +1668,7 @@ vint8m1_t test_vand_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vand_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m2_tumu( @@ -1677,7 +1677,7 @@ vint8m2_t test_vand_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m4_tumu( @@ -1686,7 +1686,7 @@ vint8m2_t test_vand_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vand_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m4_tumu( @@ -1695,7 +1695,7 @@ vint8m4_t test_vand_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m8_tumu( @@ -1704,7 +1704,7 @@ vint8m4_t test_vand_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vand_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m8_tumu( @@ -1713,7 +1713,7 @@ vint8m8_t test_vand_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf4_tumu( @@ -1722,7 +1722,7 @@ vint8m8_t test_vand_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vand_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf4_tumu( @@ -1731,7 +1731,7 @@ vint16mf4_t test_vand_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf2_tumu( @@ -1740,7 +1740,7 @@ vint16mf4_t test_vand_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vand_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf2_tumu( @@ -1749,7 +1749,7 @@ vint16mf2_t test_vand_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m1_tumu( @@ -1758,7 +1758,7 @@ vint16mf2_t test_vand_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vand_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m1_tumu( @@ -1767,7 +1767,7 @@ vint16m1_t test_vand_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m2_tumu( @@ -1776,7 +1776,7 @@ vint16m1_t test_vand_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vand_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m2_tumu( @@ -1785,7 +1785,7 @@ vint16m2_t test_vand_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m4_tumu( @@ -1794,7 +1794,7 @@ vint16m2_t test_vand_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vand_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m4_tumu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vand_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m8_tumu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vand_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vand_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m8_tumu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vand_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32mf2_tumu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vand_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vand_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32mf2_tumu( @@ -1839,7 +1839,7 @@ vint32mf2_t test_vand_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m1_tumu( @@ -1848,7 +1848,7 @@ vint32mf2_t test_vand_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vand_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m1_tumu( @@ -1857,7 +1857,7 @@ vint32m1_t test_vand_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m2_tumu( @@ -1866,7 +1866,7 @@ vint32m1_t test_vand_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vand_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m2_tumu( @@ -1875,7 +1875,7 @@ vint32m2_t test_vand_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m4_tumu( @@ -1884,7 +1884,7 @@ vint32m2_t test_vand_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vand_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m4_tumu( @@ -1893,7 +1893,7 @@ vint32m4_t test_vand_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m8_tumu( @@ -1902,7 +1902,7 @@ vint32m4_t test_vand_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vand_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m8_tumu( @@ -1911,7 +1911,7 @@ vint32m8_t test_vand_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m1_tumu( @@ -1920,7 +1920,7 @@ vint32m8_t test_vand_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vand_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m1_tumu( @@ -1929,7 +1929,7 @@ vint64m1_t test_vand_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m2_tumu( @@ -1938,7 +1938,7 @@ vint64m1_t test_vand_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vand_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m2_tumu( @@ -1947,7 +1947,7 @@ vint64m2_t test_vand_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m4_tumu( @@ -1956,7 +1956,7 @@ vint64m2_t test_vand_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vand_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m4_tumu( @@ -1965,7 +1965,7 @@ vint64m4_t test_vand_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m8_tumu( @@ -1974,7 +1974,7 @@ vint64m4_t test_vand_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vand_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m8_tumu( @@ -1983,7 +1983,7 @@ vint64m8_t test_vand_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf8_tumu( @@ -1992,7 +1992,7 @@ vint64m8_t test_vand_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vand_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf8_tumu( @@ -2001,7 +2001,7 @@ vuint8mf8_t test_vand_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf4_tumu( @@ -2010,7 +2010,7 @@ vuint8mf8_t test_vand_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vand_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf4_tumu( @@ -2019,7 +2019,7 @@ vuint8mf4_t test_vand_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf2_tumu( @@ -2028,7 +2028,7 @@ vuint8mf4_t test_vand_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vand_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf2_tumu( @@ -2037,7 +2037,7 @@ vuint8mf2_t test_vand_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m1_tumu( @@ -2046,7 +2046,7 @@ vuint8mf2_t test_vand_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vand_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m1_tumu( @@ -2055,7 +2055,7 @@ vuint8m1_t test_vand_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m2_tumu( @@ -2064,7 +2064,7 @@ vuint8m1_t test_vand_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vand_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m2_tumu( @@ -2073,7 +2073,7 @@ vuint8m2_t test_vand_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m4_tumu( @@ -2082,7 +2082,7 @@ vuint8m2_t test_vand_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vand_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m4_tumu( @@ -2091,7 +2091,7 @@ vuint8m4_t test_vand_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m8_tumu( @@ -2100,7 +2100,7 @@ vuint8m4_t test_vand_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vand_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m8_tumu( @@ -2109,7 +2109,7 @@ vuint8m8_t test_vand_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf4_tumu( @@ -2118,7 +2118,7 @@ vuint8m8_t test_vand_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vand_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf4_tumu( @@ -2127,7 +2127,7 @@ vuint16mf4_t test_vand_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf2_tumu( @@ -2136,7 +2136,7 @@ vuint16mf4_t test_vand_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vand_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf2_tumu( @@ -2145,7 +2145,7 @@ vuint16mf2_t test_vand_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m1_tumu( @@ -2154,7 +2154,7 @@ vuint16mf2_t test_vand_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vand_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m1_tumu( @@ -2163,7 +2163,7 @@ vuint16m1_t test_vand_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m2_tumu( @@ -2172,7 +2172,7 @@ vuint16m1_t test_vand_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vand_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m2_tumu( @@ -2181,7 +2181,7 @@ vuint16m2_t test_vand_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m4_tumu( @@ -2190,7 +2190,7 @@ vuint16m2_t test_vand_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vand_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m4_tumu( @@ -2199,7 +2199,7 @@ vuint16m4_t test_vand_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m8_tumu( @@ -2208,7 +2208,7 @@ vuint16m4_t test_vand_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vand_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m8_tumu( @@ -2217,7 +2217,7 @@ vuint16m8_t test_vand_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32mf2_tumu( @@ -2226,7 +2226,7 @@ vuint16m8_t test_vand_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vand_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32mf2_tumu( @@ -2235,7 +2235,7 @@ vuint32mf2_t test_vand_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m1_tumu( @@ -2244,7 +2244,7 @@ vuint32mf2_t test_vand_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vand_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m1_tumu( @@ -2253,7 +2253,7 @@ vuint32m1_t test_vand_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m2_tumu( @@ -2262,7 +2262,7 @@ vuint32m1_t test_vand_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vand_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m2_tumu( @@ -2271,7 +2271,7 @@ vuint32m2_t test_vand_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m4_tumu( @@ -2280,7 +2280,7 @@ vuint32m2_t test_vand_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vand_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m4_tumu( @@ -2289,7 +2289,7 @@ vuint32m4_t test_vand_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m8_tumu( @@ -2298,7 +2298,7 @@ vuint32m4_t test_vand_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vand_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m8_tumu( @@ -2307,7 +2307,7 @@ vuint32m8_t test_vand_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m1_tumu( @@ -2316,7 +2316,7 @@ vuint32m8_t test_vand_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vand_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m1_tumu( @@ -2325,7 +2325,7 @@ vuint64m1_t test_vand_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m2_tumu( @@ -2334,7 +2334,7 @@ vuint64m1_t test_vand_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vand_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m2_tumu( @@ -2343,7 +2343,7 @@ vuint64m2_t test_vand_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m4_tumu( @@ -2352,7 +2352,7 @@ vuint64m2_t test_vand_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vand_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m4_tumu( @@ -2361,7 +2361,7 @@ vuint64m4_t test_vand_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m8_tumu( @@ -2370,7 +2370,7 @@ vuint64m4_t test_vand_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vand_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m8_tumu( @@ -2379,7 +2379,7 @@ vuint64m8_t test_vand_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf8_mu( @@ -2388,7 +2388,7 @@ vuint64m8_t test_vand_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vand_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf8_mu( @@ -2397,7 +2397,7 @@ vint8mf8_t test_vand_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vand_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf4_mu( @@ -2406,7 +2406,7 @@ vint8mf8_t test_vand_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vand_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf4_mu( @@ -2415,7 +2415,7 @@ vint8mf4_t test_vand_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vand_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8mf2_mu( @@ -2424,7 +2424,7 @@ vint8mf4_t test_vand_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vand_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8mf2_mu( @@ -2433,7 +2433,7 @@ vint8mf2_t test_vand_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vand_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m1_mu( @@ -2442,7 +2442,7 @@ vint8mf2_t test_vand_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vand_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m1_mu( @@ -2451,7 +2451,7 @@ vint8m1_t test_vand_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vand_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m2_mu( @@ -2460,7 +2460,7 @@ vint8m1_t test_vand_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vand_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m2_mu( @@ -2469,7 +2469,7 @@ vint8m2_t test_vand_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vand_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m4_mu( @@ -2478,7 +2478,7 @@ vint8m2_t test_vand_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vand_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m4_mu( @@ -2487,7 +2487,7 @@ vint8m4_t test_vand_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vand_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i8m8_mu( @@ -2496,7 +2496,7 @@ vint8m4_t test_vand_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vand_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i8m8_mu( @@ -2505,7 +2505,7 @@ vint8m8_t test_vand_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vand_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vand_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf4_mu( @@ -2514,7 +2514,7 @@ vint8m8_t test_vand_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vand_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf4_mu( @@ -2523,7 +2523,7 @@ vint16mf4_t test_vand_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vand_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16mf2_mu( @@ -2532,7 +2532,7 @@ vint16mf4_t test_vand_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vand_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16mf2_mu( @@ -2541,7 +2541,7 @@ vint16mf2_t test_vand_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vand_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m1_mu( @@ -2550,7 +2550,7 @@ vint16mf2_t test_vand_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vand_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m1_mu( @@ -2559,7 +2559,7 @@ vint16m1_t test_vand_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vand_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m2_mu( @@ -2568,7 +2568,7 @@ vint16m1_t test_vand_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vand_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m2_mu( @@ -2577,7 +2577,7 @@ vint16m2_t test_vand_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vand_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m4_mu( @@ -2586,7 +2586,7 @@ vint16m2_t test_vand_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vand_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m4_mu( @@ -2595,7 +2595,7 @@ vint16m4_t test_vand_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vand_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i16m8_mu( @@ -2604,7 +2604,7 @@ vint16m4_t test_vand_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vand_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i16m8_mu( @@ -2613,7 +2613,7 @@ vint16m8_t test_vand_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vand_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vand_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32mf2_mu( @@ -2622,7 +2622,7 @@ vint16m8_t test_vand_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vand_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32mf2_mu( @@ -2631,7 +2631,7 @@ vint32mf2_t test_vand_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vand_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m1_mu( @@ -2640,7 +2640,7 @@ vint32mf2_t test_vand_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vand_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m1_mu( @@ -2649,7 +2649,7 @@ vint32m1_t test_vand_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vand_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m2_mu( @@ -2658,7 +2658,7 @@ vint32m1_t test_vand_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vand_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m2_mu( @@ -2667,7 +2667,7 @@ vint32m2_t test_vand_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vand_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m4_mu( @@ -2676,7 +2676,7 @@ vint32m2_t test_vand_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vand_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m4_mu( @@ -2685,7 +2685,7 @@ vint32m4_t test_vand_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vand_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i32m8_mu( @@ -2694,7 +2694,7 @@ vint32m4_t test_vand_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vand_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i32m8_mu( @@ -2703,7 +2703,7 @@ vint32m8_t test_vand_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vand_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vand_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m1_mu( @@ -2712,7 +2712,7 @@ vint32m8_t test_vand_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vand_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m1_mu( @@ -2721,7 +2721,7 @@ vint64m1_t test_vand_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vand_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m2_mu( @@ -2730,7 +2730,7 @@ vint64m1_t test_vand_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vand_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m2_mu( @@ -2739,7 +2739,7 @@ vint64m2_t test_vand_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vand_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m4_mu( @@ -2748,7 +2748,7 @@ vint64m2_t test_vand_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vand_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m4_mu( @@ -2757,7 +2757,7 @@ vint64m4_t test_vand_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vand_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_i64m8_mu( @@ -2766,7 +2766,7 @@ vint64m4_t test_vand_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vand_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_i64m8_mu( @@ -2775,7 +2775,7 @@ vint64m8_t test_vand_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vand_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vand_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf8_mu( @@ -2784,7 +2784,7 @@ vint64m8_t test_vand_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vand_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf8_mu( @@ -2793,7 +2793,7 @@ vuint8mf8_t test_vand_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vand_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf4_mu( @@ -2802,7 +2802,7 @@ vuint8mf8_t test_vand_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vand_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf4_mu( @@ -2811,7 +2811,7 @@ vuint8mf4_t test_vand_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vand_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8mf2_mu( @@ -2820,7 +2820,7 @@ vuint8mf4_t test_vand_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vand_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8mf2_mu( @@ -2829,7 +2829,7 @@ vuint8mf2_t test_vand_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vand_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m1_mu( @@ -2838,7 +2838,7 @@ vuint8mf2_t test_vand_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vand_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m1_mu( @@ -2847,7 +2847,7 @@ vuint8m1_t test_vand_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vand_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m2_mu( @@ -2856,7 +2856,7 @@ vuint8m1_t test_vand_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vand_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m2_mu( @@ -2865,7 +2865,7 @@ vuint8m2_t test_vand_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vand_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m4_mu( @@ -2874,7 +2874,7 @@ vuint8m2_t test_vand_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vand_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m4_mu( @@ -2883,7 +2883,7 @@ vuint8m4_t test_vand_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vand_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u8m8_mu( @@ -2892,7 +2892,7 @@ vuint8m4_t test_vand_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vand_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u8m8_mu( @@ -2901,7 +2901,7 @@ vuint8m8_t test_vand_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vand_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vand_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf4_mu( @@ -2910,7 +2910,7 @@ vuint8m8_t test_vand_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vand_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf4_mu( @@ -2919,7 +2919,7 @@ vuint16mf4_t test_vand_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vand_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16mf2_mu( @@ -2928,7 +2928,7 @@ vuint16mf4_t test_vand_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vand_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16mf2_mu( @@ -2937,7 +2937,7 @@ vuint16mf2_t test_vand_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vand_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m1_mu( @@ -2946,7 +2946,7 @@ vuint16mf2_t test_vand_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vand_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m1_mu( @@ -2955,7 +2955,7 @@ vuint16m1_t test_vand_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vand_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m2_mu( @@ -2964,7 +2964,7 @@ vuint16m1_t test_vand_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vand_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m2_mu( @@ -2973,7 +2973,7 @@ vuint16m2_t test_vand_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vand_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m4_mu( @@ -2982,7 +2982,7 @@ vuint16m2_t test_vand_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vand_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m4_mu( @@ -2991,7 +2991,7 @@ vuint16m4_t test_vand_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vand_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u16m8_mu( @@ -3000,7 +3000,7 @@ vuint16m4_t test_vand_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vand_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u16m8_mu( @@ -3009,7 +3009,7 @@ vuint16m8_t test_vand_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vand_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vand_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32mf2_mu( @@ -3018,7 +3018,7 @@ vuint16m8_t test_vand_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vand_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32mf2_mu( @@ -3027,7 +3027,7 @@ vuint32mf2_t test_vand_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vand_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m1_mu( @@ -3036,7 +3036,7 @@ vuint32mf2_t test_vand_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vand_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m1_mu( @@ -3045,7 +3045,7 @@ vuint32m1_t test_vand_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vand_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m2_mu( @@ -3054,7 +3054,7 @@ vuint32m1_t test_vand_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vand_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m2_mu( @@ -3063,7 +3063,7 @@ vuint32m2_t test_vand_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vand_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m4_mu( @@ -3072,7 +3072,7 @@ vuint32m2_t test_vand_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vand_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m4_mu( @@ -3081,7 +3081,7 @@ vuint32m4_t test_vand_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vand_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u32m8_mu( @@ -3090,7 +3090,7 @@ vuint32m4_t test_vand_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vand_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u32m8_mu( @@ -3099,7 +3099,7 @@ vuint32m8_t test_vand_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vand_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vand_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m1_mu( @@ -3108,7 +3108,7 @@ vuint32m8_t test_vand_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vand_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m1_mu( @@ -3117,7 +3117,7 @@ vuint64m1_t test_vand_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vand_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m2_mu( @@ -3126,7 +3126,7 @@ vuint64m1_t test_vand_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vand_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m2_mu( @@ -3135,7 +3135,7 @@ vuint64m2_t test_vand_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vand_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m4_mu( @@ -3144,7 +3144,7 @@ vuint64m2_t test_vand_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vand_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m4_mu( @@ -3153,7 +3153,7 @@ vuint64m4_t test_vand_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vand_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vv_u64m8_mu( @@ -3162,7 +3162,7 @@ vuint64m4_t test_vand_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vand_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vand_vx_u64m8_mu( @@ -3171,6 +3171,6 @@ vuint64m8_t test_vand_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vand_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vand_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vand_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vasub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vasub.c index 5e127beb4707ff5ee7e8b7dca84fead856a4af0e..7a8aed11aaa212b012c6e43f05d97b37bb0940d6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vasub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vasub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vasub_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vasub_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vasub_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vasub_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vasub_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vasub_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vasub_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vasub_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vasub_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vasub_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vasub_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vasub_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vasub_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vasub_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vasub_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vasub_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vasub_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vasub_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vasub_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vasub_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vasub_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vasub_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vasub_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vasub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vasub_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vasub_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vasub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vasub_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vasub_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vasub_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vasub_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vasub_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vasub_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vasub_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vasub_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vasub_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vasub_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vasub_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vasub_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vasub_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vasub_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vasub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vasub_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vasub_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vasub_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vasub_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vasub_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vasub_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vasub_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vasub_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vasub_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vasub_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vasub_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vasub_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vasub_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vasub_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vasub_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vasub_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vasub_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vasub_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vasub_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vasub_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vasub_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vasub_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vasub_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vasub_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vasub_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vasub_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vasub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vasub_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vasub_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vasub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vasub_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vasub_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vasub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vasub_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vasub_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vasub_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vasub_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vasub_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vasub_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vasub_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vasub_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vasub_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vasub_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vasub_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vasub_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vasub_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vasub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vasub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vasub_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vasub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vasub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vasub_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vasub_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vasub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vasub_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vasub_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vasub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vasub_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vasub_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vasub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vasub_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vasub_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vasub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vasub_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vasub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vasub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vasub_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vasub_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vasub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vasub_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vasub_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vasub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vasub_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vasub_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vasub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vasub_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vasub_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vasub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vasub_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vasub_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vasub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vasub_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vasub_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vasub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vasub_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vasub_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vasub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vasub_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vasub_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vasub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vasub_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vasub_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vasub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vasub_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vasub_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vasub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vasub_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vasub_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vasub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vasub_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vasub_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vasub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vasub_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vasub_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vasub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vasub_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vasub_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vasub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vasub_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vasub_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vasub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vasub_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vasub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vasub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vasub_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vasub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vasub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vasub_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vasub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vasub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vasub_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vasub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vasub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vasub_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vasub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vasub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vasub_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vasub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vasub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vasub_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vasub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vasub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vasub_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vasub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vasub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vasub_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vasub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vasub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vasub_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vasub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vasub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vasub_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vasub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vasub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vasub_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vasub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vasub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vasub_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vasub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vasub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vasub_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vasub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vasub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vasub_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vasub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vasub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vasub_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vasub_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vasub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vasub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vasub_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vasub_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vasub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vasub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vasub_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vasub_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vasub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vasub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vasub_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vasub_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vasub_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vasub_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vasub_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vasub_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vasub_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vasub_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vasub_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vasub_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vasub_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vasub_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vasub_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vasub_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vasub_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vasub_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vasub_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vasub_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vasub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vasub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vasub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vasub_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vasub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vasub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vasub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vasub_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vasub_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vasub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vasub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vasub_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vasub_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vasub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vasub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vasub_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vasub_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vasub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vasub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vasub_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vasub_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vasub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vasub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vasub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vasub_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vasub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vasub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vasub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vasub_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vasub_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vasub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vasub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vasub_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vasub_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vasub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vasub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vasub_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vasub_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vasub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vasub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vasub_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vasub_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vasub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vasub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vasub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vasub_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vasub_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vasub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vasub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vasub_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vasub_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vasub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vasub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vasub_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vasub_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vasub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vasub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vasub_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasub_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vasub_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vasub_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vasub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vasubu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vasubu.c index 91dea072e1483c2f9910d9faecd47e7a79ef63e1..9396834752402b3556d13018b3f3f761d19c54d6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vasubu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vasubu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vasubu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vasubu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vasubu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vasubu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vasubu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vasubu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vasubu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vasubu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vasubu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vasubu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vasubu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vasubu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vasubu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vasubu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vasubu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vasubu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vasubu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vasubu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vasubu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vasubu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vasubu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vasubu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vasubu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vasubu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vasubu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vasubu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vasubu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vasubu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vasubu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vasubu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vasubu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vasubu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vasubu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vasubu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vasubu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vasubu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vasubu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vasubu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vasubu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vasubu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vasubu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vasubu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vasubu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vasubu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vasubu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vasubu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vasubu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vasubu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vasubu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vasubu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vasubu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vasubu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vasubu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vasubu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vasubu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vasubu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vasubu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vasubu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vasubu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vasubu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vasubu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vasubu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vasubu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vasubu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vasubu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vasubu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vasubu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vasubu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vasubu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vasubu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vasubu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vasubu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vasubu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vasubu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vasubu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vasubu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vasubu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vasubu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vasubu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vasubu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vasubu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vasubu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vasubu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vasubu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vasubu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vasubu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vasubu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vasubu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vasubu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vasubu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vasubu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vasubu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vasubu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vasubu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vasubu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vasubu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vasubu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vasubu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vasubu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vasubu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vasubu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vasubu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vasubu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vasubu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vasubu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vasubu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vasubu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vasubu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vasubu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vasubu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vasubu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vasubu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vasubu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vasubu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vasubu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vasubu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vasubu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vasubu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vasubu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vasubu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vasubu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vasubu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vasubu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vasubu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vasubu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vasubu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vasubu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vasubu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vasubu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vasubu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vasubu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vasubu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vasubu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vasubu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vasubu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vasubu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vasubu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vasubu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vasubu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vasubu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vasubu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vasubu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vasubu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vasubu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vasubu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vasubu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vasubu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vasubu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vasubu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vasubu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vasubu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vasubu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vasubu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vasubu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vasubu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vasubu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vasubu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vasubu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vasubu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vasubu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vasubu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vasubu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vasubu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vasubu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vasubu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vasubu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vasubu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vasubu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vasubu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vasubu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vasubu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vasubu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vasubu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vasubu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vasubu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vasubu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vasubu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vasubu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vasubu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vasubu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vasubu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vasubu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vasubu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vasubu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vasubu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vasubu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vasubu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vasubu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vasubu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vasubu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vasubu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vasubu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vasubu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vasubu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vasubu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vasubu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vasubu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vasubu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vasubu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vasubu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vasubu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vasubu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vasubu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vasubu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vasubu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vasubu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vasubu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vasubu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vasubu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vasubu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vasubu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vasubu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vasubu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vasubu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vasubu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vasubu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vasubu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vasubu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vasubu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vasubu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vasubu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vasubu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vasubu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vasubu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vasubu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vasubu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vasubu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vasubu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vasubu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vasubu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vasubu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vasubu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vasubu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vasubu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vasubu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vasubu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vasubu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vasubu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vasubu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vasubu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vasubu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vasubu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vasubu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vasubu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vasubu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vasubu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vasubu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vasubu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vasubu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vasubu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vasubu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vasubu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vasubu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vasubu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vasubu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vasubu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vasubu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vasubu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vasubu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vasubu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vasubu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vasubu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vasubu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vasubu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vasubu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vasubu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vasubu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vasubu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vasubu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vasubu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vasubu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vasubu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vasubu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vasubu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vasubu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vasubu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vasubu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vasubu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vasubu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vasubu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vasubu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vasubu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vasubu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vasubu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vasubu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vasubu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vasubu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vasubu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vasubu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vasubu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vasubu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcompress.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcompress.c index d3939878ae0d445c130dfd55ed9d8374ad39f59b..980846387d5832da648094c1a343ac2d8b9b0dd9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcompress.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vcompress.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vcompress_vm_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_f16mf4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f16mf4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vcompress_vm_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vcompress_vm_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_f16mf2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f16mf2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vcompress_vm_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vcompress_vm_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_f16m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f16m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vcompress_vm_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vcompress_vm_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_f16m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f16m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vcompress_vm_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vcompress_vm_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_f16m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f16m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vcompress_vm_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vcompress_vm_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_f16m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f16m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vcompress_vm_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vcompress_vm_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_f32mf2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f32mf2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vcompress_vm_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vcompress_vm_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_f32m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f32m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vcompress_vm_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vcompress_vm_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_f32m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f32m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vcompress_vm_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vcompress_vm_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_f32m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f32m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vcompress_vm_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vcompress_vm_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_f32m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f32m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vcompress_vm_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vcompress_vm_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_f64m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f64m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vcompress_vm_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vcompress_vm_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_f64m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f64m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vcompress_vm_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vcompress_vm_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_f64m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f64m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vcompress_vm_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vcompress_vm_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_f64m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_f64m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8mf8_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vcompress_vm_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vcompress_vm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_i8mf8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i8mf8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8mf4_tu( @@ -157,7 +157,7 @@ vint8mf8_t test_vcompress_vm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vcompress_vm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_i8mf4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i8mf4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8mf2_tu( @@ -166,7 +166,7 @@ vint8mf4_t test_vcompress_vm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vcompress_vm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_i8mf2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i8mf2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8m1_tu( @@ -175,7 +175,7 @@ vint8mf2_t test_vcompress_vm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vcompress_vm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_i8m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i8m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8m2_tu( @@ -184,7 +184,7 @@ vint8m1_t test_vcompress_vm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, vbool8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vcompress_vm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_i8m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i8m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8m4_tu( @@ -193,7 +193,7 @@ vint8m2_t test_vcompress_vm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, vbool4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vcompress_vm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_i8m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i8m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i8m8_tu( @@ -202,7 +202,7 @@ vint8m4_t test_vcompress_vm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, vbool2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vcompress_vm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, vbool1_t mask, size_t vl) { - return vcompress_vm_i8m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i8m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16mf4_tu( @@ -211,7 +211,7 @@ vint8m8_t test_vcompress_vm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, vbool1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vcompress_vm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_i16mf4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i16mf4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16mf2_tu( @@ -220,7 +220,7 @@ vint16mf4_t test_vcompress_vm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vcompress_vm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_i16mf2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i16mf2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16m1_tu( @@ -229,7 +229,7 @@ vint16mf2_t test_vcompress_vm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vcompress_vm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_i16m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i16m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16m2_tu( @@ -238,7 +238,7 @@ vint16m1_t test_vcompress_vm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vcompress_vm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_i16m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i16m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16m4_tu( @@ -247,7 +247,7 @@ vint16m2_t test_vcompress_vm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vcompress_vm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_i16m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i16m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i16m8_tu( @@ -256,7 +256,7 @@ vint16m4_t test_vcompress_vm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vcompress_vm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_i16m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i16m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32mf2_tu( @@ -265,7 +265,7 @@ vint16m8_t test_vcompress_vm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vcompress_vm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_i32mf2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i32mf2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32m1_tu( @@ -274,7 +274,7 @@ vint32mf2_t test_vcompress_vm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vcompress_vm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_i32m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i32m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vcompress_vm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vcompress_vm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_i32m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i32m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32m4_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vcompress_vm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vcompress_vm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_i32m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i32m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i32m8_tu( @@ -301,7 +301,7 @@ vint32m4_t test_vcompress_vm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vcompress_vm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_i32m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i32m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i64m1_tu( @@ -310,7 +310,7 @@ vint32m8_t test_vcompress_vm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vcompress_vm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_i64m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i64m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i64m2_tu( @@ -319,7 +319,7 @@ vint64m1_t test_vcompress_vm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vcompress_vm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_i64m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i64m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i64m4_tu( @@ -328,7 +328,7 @@ vint64m2_t test_vcompress_vm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vcompress_vm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_i64m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i64m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_i64m8_tu( @@ -337,7 +337,7 @@ vint64m4_t test_vcompress_vm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vcompress_vm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_i64m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_i64m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8mf8_tu( @@ -346,7 +346,7 @@ vint64m8_t test_vcompress_vm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vcompress_vm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_u8mf8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u8mf8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8mf4_tu( @@ -355,7 +355,7 @@ vuint8mf8_t test_vcompress_vm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vcompress_vm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_u8mf4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u8mf4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8mf2_tu( @@ -364,7 +364,7 @@ vuint8mf4_t test_vcompress_vm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vcompress_vm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_u8mf2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u8mf2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8m1_tu( @@ -373,7 +373,7 @@ vuint8mf2_t test_vcompress_vm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vcompress_vm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_u8m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u8m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8m2_tu( @@ -382,7 +382,7 @@ vuint8m1_t test_vcompress_vm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vcompress_vm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_u8m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u8m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8m4_tu( @@ -391,7 +391,7 @@ vuint8m2_t test_vcompress_vm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vcompress_vm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_u8m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u8m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u8m8_tu( @@ -400,7 +400,7 @@ vuint8m4_t test_vcompress_vm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vcompress_vm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, vbool1_t mask, size_t vl) { - return vcompress_vm_u8m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u8m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16mf4_tu( @@ -409,7 +409,7 @@ vuint8m8_t test_vcompress_vm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vcompress_vm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_u16mf4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u16mf4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16mf2_tu( @@ -418,7 +418,7 @@ vuint16mf4_t test_vcompress_vm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vcompress_vm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_u16mf2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u16mf2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16m1_tu( @@ -427,7 +427,7 @@ vuint16mf2_t test_vcompress_vm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vcompress_vm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_u16m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u16m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16m2_tu( @@ -436,7 +436,7 @@ vuint16m1_t test_vcompress_vm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vcompress_vm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_u16m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u16m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16m4_tu( @@ -445,7 +445,7 @@ vuint16m2_t test_vcompress_vm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vcompress_vm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_u16m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u16m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u16m8_tu( @@ -454,7 +454,7 @@ vuint16m4_t test_vcompress_vm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vcompress_vm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, vbool2_t mask, size_t vl) { - return vcompress_vm_u16m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u16m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32mf2_tu( @@ -463,7 +463,7 @@ vuint16m8_t test_vcompress_vm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vcompress_vm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_u32mf2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u32mf2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32m1_tu( @@ -472,7 +472,7 @@ vuint32mf2_t test_vcompress_vm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vcompress_vm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_u32m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u32m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32m2_tu( @@ -481,7 +481,7 @@ vuint32m1_t test_vcompress_vm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vcompress_vm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_u32m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u32m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32m4_tu( @@ -490,7 +490,7 @@ vuint32m2_t test_vcompress_vm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vcompress_vm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_u32m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u32m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u32m8_tu( @@ -499,7 +499,7 @@ vuint32m4_t test_vcompress_vm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vcompress_vm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, vbool4_t mask, size_t vl) { - return vcompress_vm_u32m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u32m8_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u64m1_tu( @@ -508,7 +508,7 @@ vuint32m8_t test_vcompress_vm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vcompress_vm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, vbool64_t mask, size_t vl) { - return vcompress_vm_u64m1_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u64m1_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u64m2_tu( @@ -517,7 +517,7 @@ vuint64m1_t test_vcompress_vm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vcompress_vm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, vbool32_t mask, size_t vl) { - return vcompress_vm_u64m2_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u64m2_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u64m4_tu( @@ -526,7 +526,7 @@ vuint64m2_t test_vcompress_vm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vcompress_vm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, vbool16_t mask, size_t vl) { - return vcompress_vm_u64m4_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u64m4_tu(maskedoff, src, mask, vl); } // CHECK-RV64-LABEL: @test_vcompress_vm_u64m8_tu( @@ -535,6 +535,6 @@ vuint64m4_t test_vcompress_vm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vcompress_vm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, vbool8_t mask, size_t vl) { - return vcompress_vm_u64m8_tu(maskedoff, src, mask, vl); + return __riscv_vcompress_vm_u64m8_tu(maskedoff, src, mask, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vdiv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vdiv.c index c9b267a0d0c0dac56d981925eafb1d96bc06fc10..4b5af4e01d5372a5e2a9e2b4fa5669ff59abb9f9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vdiv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vdiv.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vdiv_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vdiv_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vdiv_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vdiv_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vdiv_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vdiv_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vdiv_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vdiv_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vdiv_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vdiv_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vdiv_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vdiv_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vdiv_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vdiv_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vdiv_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vdiv_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vdiv_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vdiv_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vdiv_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vdiv_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vdiv_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vdiv_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vdiv_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vdiv_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vdiv_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vdiv_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vdiv_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vdiv_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vdiv_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vdiv_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vdiv_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vdiv_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vdiv_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vdiv_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vdiv_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vdiv_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vdiv_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vdiv_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vdiv_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vdiv_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vdiv_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vdiv_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vdiv_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vdiv_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vdiv_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vdiv_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vdiv_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vdiv_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vdiv_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vdiv_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vdiv_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vdiv_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vdiv_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vdiv_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vdiv_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vdiv_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vdiv_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vdiv_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vdiv_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vdiv_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vdiv_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vdiv_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vdiv_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vdiv_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vdiv_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vdiv_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vdiv_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vdiv_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vdiv_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vdiv_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vdiv_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vdiv_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vdiv_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vdiv_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vdiv_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vdiv_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vdiv_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vdiv_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vdiv_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vdiv_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vdiv_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vdiv_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vdiv_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vdiv_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vdiv_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vdiv_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vdiv_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vdiv_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vdiv_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vdiv_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vdiv_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vdiv_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vdiv_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vdiv_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vdiv_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vdiv_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vdiv_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vdiv_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vdiv_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vdiv_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vdiv_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vdiv_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vdiv_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vdiv_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vdiv_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vdiv_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vdiv_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vdiv_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vdiv_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vdiv_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vdiv_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vdiv_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vdiv_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vdiv_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vdiv_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vdiv_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vdiv_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vdiv_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vdiv_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vdiv_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vdiv_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vdiv_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vdiv_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vdiv_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vdiv_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vdiv_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vdiv_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vdiv_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vdiv_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vdiv_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vdiv_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vdiv_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vdiv_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vdiv_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vdiv_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vdiv_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vdiv_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vdiv_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vdiv_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vdiv_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vdiv_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vdiv_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vdiv_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vdiv_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vdiv_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vdiv_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vdiv_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vdiv_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vdiv_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vdiv_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vdiv_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vdiv_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vdiv_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vdiv_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vdiv_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vdiv_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vdiv_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vdiv_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vdiv_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vdiv_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vdiv_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vdiv_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vdiv_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vdiv_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vdiv_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vdiv_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vdiv_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vdiv_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vdiv_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vdiv_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vdiv_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vdiv_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vdiv_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vdiv_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vdiv_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vdiv_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vdiv_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vdiv_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vdiv_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vdiv_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vdiv_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vdiv_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vdiv_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vdiv_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vdiv_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vdiv_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vdiv_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vdiv_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vdiv_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vdiv_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vdiv_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vdiv_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vdiv_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vdiv_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vdiv_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vdiv_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vdiv_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vdiv_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vdiv_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vdiv_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vdiv_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vdiv_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vdiv_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vdiv_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vdiv_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vdiv_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vdiv_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vdiv_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vdiv_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vdiv_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vdiv_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vdiv_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vdiv_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vdiv_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vdiv_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vdiv_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vdiv_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vdiv_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vdiv_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vdiv_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vdiv_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vdiv_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vdiv_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vdiv_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vdiv_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vdiv_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vdiv_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vdiv_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vdiv_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vdiv_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vdiv_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vdiv_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vdiv_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vdiv_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vdiv_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vdiv_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vdiv_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vdiv_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vdiv_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vdiv_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vdiv_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vdiv_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vdiv_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vdiv_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vdiv_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vdiv_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vdiv_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vdiv_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vdiv_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vdiv_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vdiv_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vdiv_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vdiv_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vdiv_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vdiv_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vdiv_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vdiv_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vdiv_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vdiv_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vdiv_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vdiv_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vdiv_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vdiv_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vdiv_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vdiv_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vdiv_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vdiv_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vdiv_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vdiv_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vdiv_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vdiv_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vdiv_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vdiv_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vdiv_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vdiv_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vdiv_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vdiv_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vdiv_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vdiv_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vdiv_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vdiv_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vdiv_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vdiv_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vdiv_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vdiv_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vdiv_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdiv_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vdiv_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vdiv_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vdiv_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdiv_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vdivu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vdivu.c index 54780e4df0dca85b3c5615a38ca6a7dfc128c3cc..20d4d357af99ef5a1be99519ddd7a9177d2063f3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vdivu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vdivu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vdivu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vdivu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vdivu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vdivu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vdivu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vdivu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vdivu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vdivu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vdivu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vdivu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vdivu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vdivu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vdivu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vdivu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vdivu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vdivu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vdivu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vdivu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vdivu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vdivu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vdivu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vdivu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vdivu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vdivu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vdivu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vdivu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vdivu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vdivu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vdivu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vdivu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vdivu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vdivu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vdivu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vdivu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vdivu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vdivu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vdivu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vdivu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vdivu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vdivu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vdivu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vdivu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vdivu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vdivu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vdivu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vdivu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vdivu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vdivu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vdivu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vdivu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vdivu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vdivu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vdivu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vdivu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vdivu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vdivu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vdivu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vdivu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vdivu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vdivu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vdivu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vdivu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vdivu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vdivu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vdivu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vdivu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vdivu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vdivu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vdivu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vdivu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vdivu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vdivu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vdivu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vdivu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vdivu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vdivu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vdivu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vdivu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vdivu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vdivu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vdivu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vdivu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vdivu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vdivu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vdivu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vdivu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vdivu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vdivu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vdivu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vdivu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vdivu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vdivu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vdivu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vdivu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vdivu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vdivu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vdivu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vdivu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vdivu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vdivu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vdivu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vdivu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vdivu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vdivu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vdivu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vdivu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vdivu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vdivu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vdivu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vdivu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vdivu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vdivu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vdivu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vdivu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vdivu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vdivu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vdivu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vdivu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vdivu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vdivu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vdivu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vdivu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vdivu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vdivu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vdivu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vdivu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vdivu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vdivu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vdivu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vdivu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vdivu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vdivu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vdivu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vdivu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vdivu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vdivu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vdivu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vdivu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vdivu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vdivu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vdivu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vdivu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vdivu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vdivu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vdivu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vdivu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vdivu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vdivu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vdivu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vdivu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vdivu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vdivu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vdivu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vdivu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vdivu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vdivu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vdivu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vdivu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vdivu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vdivu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vdivu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vdivu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vdivu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vdivu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vdivu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vdivu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vdivu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vdivu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vdivu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vdivu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vdivu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vdivu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vdivu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vdivu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vdivu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vdivu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vdivu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vdivu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vdivu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vdivu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vdivu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vdivu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vdivu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vdivu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vdivu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vdivu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vdivu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vdivu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vdivu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vdivu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vdivu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vdivu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vdivu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vdivu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vdivu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vdivu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vdivu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vdivu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vdivu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vdivu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vdivu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vdivu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vdivu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vdivu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vdivu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vdivu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vdivu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vdivu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vdivu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vdivu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vdivu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vdivu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vdivu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vdivu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vdivu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vdivu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vdivu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vdivu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vdivu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vdivu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vdivu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vdivu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vdivu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vdivu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vdivu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vdivu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vdivu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vdivu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vdivu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vdivu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vdivu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vdivu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vdivu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vdivu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vdivu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vdivu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vdivu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vdivu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vdivu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vdivu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vdivu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vdivu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vdivu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vdivu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vdivu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vdivu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vdivu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vdivu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vdivu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vdivu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vdivu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vdivu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vdivu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vdivu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vdivu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vdivu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vdivu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vdivu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vdivu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vdivu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vdivu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vdivu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vdivu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vdivu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vdivu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vdivu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vdivu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vdivu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vdivu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vdivu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vdivu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vdivu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vdivu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vdivu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vdivu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vdivu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vdivu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vdivu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vdivu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vdivu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vdivu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vdivu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vdivu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vdivu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vdivu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vdivu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vdivu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vdivu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vdivu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vdivu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vdivu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfabs.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfabs.c index bca4f9012a755d1804b0a7a2b0c16d7acb69c10d..28f3603467286cad159c46bf78717edbaa1f4412 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfabs.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfabs.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfabs_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfabs_v_f16mf4_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfabs_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfabs_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfabs_v_f16mf2_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfabs_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfabs_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfabs_v_f16m1_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfabs_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfabs_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfabs_v_f16m2_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfabs_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfabs_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfabs_v_f16m4_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfabs_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfabs_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfabs_v_f16m8_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfabs_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfabs_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfabs_v_f32mf2_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfabs_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfabs_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfabs_v_f32m1_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfabs_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfabs_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfabs_v_f32m2_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfabs_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfabs_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfabs_v_f32m4_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfabs_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfabs_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfabs_v_f32m8_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfabs_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfabs_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfabs_v_f64m1_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfabs_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfabs_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfabs_v_f64m2_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfabs_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfabs_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfabs_v_f64m4_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfabs_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfabs_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfabs_v_f64m8_tu(maskedoff, op1, vl); + return __riscv_vfabs_v_f64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfabs_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfabs_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfabs_v_f16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfabs_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfabs_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfabs_v_f16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfabs_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfabs_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfabs_v_f16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfabs_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfabs_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfabs_v_f16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfabs_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfabs_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfabs_v_f16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfabs_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfabs_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfabs_v_f16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfabs_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfabs_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfabs_v_f32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfabs_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfabs_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfabs_v_f32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfabs_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfabs_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfabs_v_f32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfabs_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfabs_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfabs_v_f32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfabs_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfabs_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfabs_v_f32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfabs_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfabs_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfabs_v_f64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfabs_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfabs_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfabs_v_f64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfabs_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfabs_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfabs_v_f64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfabs_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfabs_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfabs_v_f64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfabs_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfabs_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfabs_v_f16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfabs_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfabs_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfabs_v_f16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfabs_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfabs_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfabs_v_f16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfabs_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfabs_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfabs_v_f16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfabs_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfabs_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfabs_v_f16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfabs_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfabs_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfabs_v_f16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfabs_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfabs_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfabs_v_f32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfabs_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfabs_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfabs_v_f32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfabs_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfabs_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfabs_v_f32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfabs_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfabs_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfabs_v_f32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfabs_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfabs_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfabs_v_f32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfabs_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfabs_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfabs_v_f64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfabs_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfabs_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfabs_v_f64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfabs_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfabs_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfabs_v_f64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfabs_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfabs_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfabs_v_f64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfabs_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfabs_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfabs_v_f16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfabs_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfabs_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfabs_v_f16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfabs_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfabs_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfabs_v_f16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfabs_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfabs_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfabs_v_f16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfabs_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfabs_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfabs_v_f16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfabs_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfabs_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfabs_v_f16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfabs_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfabs_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfabs_v_f32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfabs_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfabs_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfabs_v_f32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfabs_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfabs_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfabs_v_f32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfabs_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfabs_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfabs_v_f32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfabs_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfabs_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfabs_v_f32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfabs_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfabs_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfabs_v_f64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfabs_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfabs_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfabs_v_f64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfabs_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfabs_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfabs_v_f64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfabs_v_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfabs_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfabs_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfabs_v_f64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfabs_v_f64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfadd.c index 984d8a6399b4e080dd72318b0a6d26e5534682a3..c56b4ff4b6acd070b1b2e5321d8d8d85f3a2e6d5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfadd_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfadd_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfadd_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfadd_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfadd_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfadd_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfadd_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfadd_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfadd_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfadd_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfadd_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfadd_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfadd_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfadd_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfadd_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfadd_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfadd_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfadd_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfadd_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfadd_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfadd_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfadd_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfadd_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfadd_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfadd_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfadd_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfadd_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfadd_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfadd_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfadd_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfadd_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfadd_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfadd_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfadd_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfadd_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfadd_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfadd_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfadd_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfadd_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfadd_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfadd_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfadd_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfadd_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfadd_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfadd_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfadd_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfadd_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfadd_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfadd_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfadd_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfadd_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfadd_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfadd_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfadd_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfadd_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfadd_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfadd_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfadd_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfadd_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfadd_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfadd_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfadd_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfadd_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfadd_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfadd_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfadd_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfadd_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfadd_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfadd_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfadd_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfadd_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfadd_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfadd_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfadd_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfadd_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfadd_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfadd_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfadd_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfadd_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfadd_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfadd_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfadd_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfadd_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfadd_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfadd_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfadd_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfadd_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfadd_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfadd_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfadd_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfadd_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfadd_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfadd_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfadd_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfadd_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfadd_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfadd_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfadd_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfadd_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfadd_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfadd_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfadd_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfadd_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfadd_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfadd_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfadd_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfadd_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfadd_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfadd_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfadd_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfadd_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfadd_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfadd_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfadd_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfadd_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfadd_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfadd_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfadd_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfadd_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfadd_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfadd_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfadd_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfadd_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfadd_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfadd_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfadd_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfadd_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfadd_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfadd_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfadd_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfadd_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfadd_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfadd_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfadd_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfadd_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfadd_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfadd_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfadd_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfadd_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfadd_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfadd_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfadd_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfadd_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfadd_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfadd_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfadd_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfadd_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfadd_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfadd_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfadd_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfadd_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfadd_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfadd_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfadd_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfadd_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfadd_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfadd_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfadd_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfadd_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfadd_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfadd_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfadd_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfadd_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfadd_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfadd_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfadd_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfadd_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfadd_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfadd_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfadd_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfadd_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfadd_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfadd_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfadd_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfadd_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfadd_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfadd_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfadd_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfadd_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfadd_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfadd_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfadd_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfadd_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfadd_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfadd_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfadd_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfadd_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfadd_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfadd_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfadd_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfadd_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfadd_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfadd_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfadd_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfadd_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfadd_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfadd_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfadd_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfadd_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfadd_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfadd_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfadd_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfadd_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfadd_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfadd_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfadd_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfadd_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfadd_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfadd_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfadd_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfadd_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfadd_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfadd_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfadd_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfadd_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfadd_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfadd_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfadd_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfadd_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfadd_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfadd_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfadd_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfadd_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfadd_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfadd_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfadd_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfadd_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfadd_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfadd_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfadd_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfadd_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfadd_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfadd_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfclass.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfclass.c index 7d58bc9783ea95a100b637f3f02c2a17acb44267..908ef3a1a731acc975d27870239c23cb8a6671f2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfclass.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfclass.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfclass_v_u16mf4_tu(vuint16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfclass_v_u16mf4_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf2_tu( @@ -22,7 +22,7 @@ vuint16mf4_t test_vfclass_v_u16mf4_tu(vuint16mf4_t maskedoff, vfloat16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfclass_v_u16mf2_tu(vuint16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfclass_v_u16mf2_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m1_tu( @@ -31,7 +31,7 @@ vuint16mf2_t test_vfclass_v_u16mf2_tu(vuint16mf2_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfclass_v_u16m1_tu(vuint16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfclass_v_u16m1_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m2_tu( @@ -40,7 +40,7 @@ vuint16m1_t test_vfclass_v_u16m1_tu(vuint16m1_t maskedoff, vfloat16m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfclass_v_u16m2_tu(vuint16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfclass_v_u16m2_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m4_tu( @@ -49,7 +49,7 @@ vuint16m2_t test_vfclass_v_u16m2_tu(vuint16m2_t maskedoff, vfloat16m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfclass_v_u16m4_tu(vuint16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfclass_v_u16m4_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m8_tu( @@ -58,7 +58,7 @@ vuint16m4_t test_vfclass_v_u16m4_tu(vuint16m4_t maskedoff, vfloat16m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfclass_v_u16m8_tu(vuint16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfclass_v_u16m8_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32mf2_tu( @@ -67,7 +67,7 @@ vuint16m8_t test_vfclass_v_u16m8_tu(vuint16m8_t maskedoff, vfloat16m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfclass_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfclass_v_u32mf2_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m1_tu( @@ -76,7 +76,7 @@ vuint32mf2_t test_vfclass_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfclass_v_u32m1_tu(vuint32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfclass_v_u32m1_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m2_tu( @@ -85,7 +85,7 @@ vuint32m1_t test_vfclass_v_u32m1_tu(vuint32m1_t maskedoff, vfloat32m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfclass_v_u32m2_tu(vuint32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfclass_v_u32m2_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m4_tu( @@ -94,7 +94,7 @@ vuint32m2_t test_vfclass_v_u32m2_tu(vuint32m2_t maskedoff, vfloat32m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfclass_v_u32m4_tu(vuint32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfclass_v_u32m4_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m8_tu( @@ -103,7 +103,7 @@ vuint32m4_t test_vfclass_v_u32m4_tu(vuint32m4_t maskedoff, vfloat32m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfclass_v_u32m8_tu(vuint32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfclass_v_u32m8_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m1_tu( @@ -112,7 +112,7 @@ vuint32m8_t test_vfclass_v_u32m8_tu(vuint32m8_t maskedoff, vfloat32m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfclass_v_u64m1_tu(vuint64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfclass_v_u64m1_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m2_tu( @@ -121,7 +121,7 @@ vuint64m1_t test_vfclass_v_u64m1_tu(vuint64m1_t maskedoff, vfloat64m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfclass_v_u64m2_tu(vuint64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfclass_v_u64m2_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m4_tu( @@ -130,7 +130,7 @@ vuint64m2_t test_vfclass_v_u64m2_tu(vuint64m2_t maskedoff, vfloat64m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfclass_v_u64m4_tu(vuint64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfclass_v_u64m4_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m8_tu( @@ -139,7 +139,7 @@ vuint64m4_t test_vfclass_v_u64m4_tu(vuint64m4_t maskedoff, vfloat64m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfclass_v_u64m8_tu(vuint64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfclass_v_u64m8_tu(maskedoff, op1, vl); + return __riscv_vfclass_v_u64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf4_tum( @@ -148,7 +148,7 @@ vuint64m8_t test_vfclass_v_u64m8_tu(vuint64m8_t maskedoff, vfloat64m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfclass_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfclass_v_u16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf2_tum( @@ -157,7 +157,7 @@ vuint16mf4_t test_vfclass_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfclass_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfclass_v_u16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m1_tum( @@ -166,7 +166,7 @@ vuint16mf2_t test_vfclass_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfclass_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfclass_v_u16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m2_tum( @@ -175,7 +175,7 @@ vuint16m1_t test_vfclass_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfclass_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfclass_v_u16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m4_tum( @@ -184,7 +184,7 @@ vuint16m2_t test_vfclass_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfclass_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfclass_v_u16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m8_tum( @@ -193,7 +193,7 @@ vuint16m4_t test_vfclass_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfclass_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfclass_v_u16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32mf2_tum( @@ -202,7 +202,7 @@ vuint16m8_t test_vfclass_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfclass_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfclass_v_u32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m1_tum( @@ -211,7 +211,7 @@ vuint32mf2_t test_vfclass_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfclass_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfclass_v_u32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m2_tum( @@ -220,7 +220,7 @@ vuint32m1_t test_vfclass_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfclass_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfclass_v_u32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m4_tum( @@ -229,7 +229,7 @@ vuint32m2_t test_vfclass_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfclass_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfclass_v_u32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m8_tum( @@ -238,7 +238,7 @@ vuint32m4_t test_vfclass_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfclass_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfclass_v_u32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m1_tum( @@ -247,7 +247,7 @@ vuint32m8_t test_vfclass_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfclass_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfclass_v_u64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m2_tum( @@ -256,7 +256,7 @@ vuint64m1_t test_vfclass_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfclass_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfclass_v_u64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m4_tum( @@ -265,7 +265,7 @@ vuint64m2_t test_vfclass_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfclass_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfclass_v_u64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m8_tum( @@ -274,7 +274,7 @@ vuint64m4_t test_vfclass_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfclass_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfclass_v_u64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf4_tumu( @@ -283,7 +283,7 @@ vuint64m8_t test_vfclass_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfclass_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfclass_v_u16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf2_tumu( @@ -292,7 +292,7 @@ vuint16mf4_t test_vfclass_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfclass_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfclass_v_u16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m1_tumu( @@ -301,7 +301,7 @@ vuint16mf2_t test_vfclass_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfclass_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfclass_v_u16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m2_tumu( @@ -310,7 +310,7 @@ vuint16m1_t test_vfclass_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfclass_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfclass_v_u16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m4_tumu( @@ -319,7 +319,7 @@ vuint16m2_t test_vfclass_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfclass_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfclass_v_u16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m8_tumu( @@ -328,7 +328,7 @@ vuint16m4_t test_vfclass_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfclass_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfclass_v_u16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32mf2_tumu( @@ -337,7 +337,7 @@ vuint16m8_t test_vfclass_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfclass_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfclass_v_u32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m1_tumu( @@ -346,7 +346,7 @@ vuint32mf2_t test_vfclass_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfclass_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfclass_v_u32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m2_tumu( @@ -355,7 +355,7 @@ vuint32m1_t test_vfclass_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfclass_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfclass_v_u32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m4_tumu( @@ -364,7 +364,7 @@ vuint32m2_t test_vfclass_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfclass_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfclass_v_u32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m8_tumu( @@ -373,7 +373,7 @@ vuint32m4_t test_vfclass_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfclass_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfclass_v_u32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m1_tumu( @@ -382,7 +382,7 @@ vuint32m8_t test_vfclass_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfclass_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfclass_v_u64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m2_tumu( @@ -391,7 +391,7 @@ vuint64m1_t test_vfclass_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfclass_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfclass_v_u64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m4_tumu( @@ -400,7 +400,7 @@ vuint64m2_t test_vfclass_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfclass_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfclass_v_u64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m8_tumu( @@ -409,7 +409,7 @@ vuint64m4_t test_vfclass_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfclass_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfclass_v_u64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf4_mu( @@ -418,7 +418,7 @@ vuint64m8_t test_vfclass_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfclass_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfclass_v_u16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16mf2_mu( @@ -427,7 +427,7 @@ vuint16mf4_t test_vfclass_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfclass_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfclass_v_u16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m1_mu( @@ -436,7 +436,7 @@ vuint16mf2_t test_vfclass_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfclass_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfclass_v_u16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m2_mu( @@ -445,7 +445,7 @@ vuint16m1_t test_vfclass_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfclass_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfclass_v_u16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m4_mu( @@ -454,7 +454,7 @@ vuint16m2_t test_vfclass_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfclass_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfclass_v_u16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u16m8_mu( @@ -463,7 +463,7 @@ vuint16m4_t test_vfclass_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfclass_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfclass_v_u16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32mf2_mu( @@ -472,7 +472,7 @@ vuint16m8_t test_vfclass_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfclass_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfclass_v_u32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m1_mu( @@ -481,7 +481,7 @@ vuint32mf2_t test_vfclass_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfclass_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfclass_v_u32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m2_mu( @@ -490,7 +490,7 @@ vuint32m1_t test_vfclass_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfclass_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfclass_v_u32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m4_mu( @@ -499,7 +499,7 @@ vuint32m2_t test_vfclass_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfclass_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfclass_v_u32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u32m8_mu( @@ -508,7 +508,7 @@ vuint32m4_t test_vfclass_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfclass_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfclass_v_u32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m1_mu( @@ -517,7 +517,7 @@ vuint32m8_t test_vfclass_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfclass_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfclass_v_u64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m2_mu( @@ -526,7 +526,7 @@ vuint64m1_t test_vfclass_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfclass_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfclass_v_u64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m4_mu( @@ -535,7 +535,7 @@ vuint64m2_t test_vfclass_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfclass_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfclass_v_u64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfclass_v_u64m8_mu( @@ -544,6 +544,6 @@ vuint64m4_t test_vfclass_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfclass_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfclass_v_u64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfclass_v_u64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfcvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfcvt.c index bbaff6dacab79aaa9484a70ca35288145c4c7867..e4ffc37ae7adcf7d4fc98f4f6b93118cfb377e29 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfcvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfcvt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_x_f_v_i16mf4_tu(vint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_x_f_v_i16mf4_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf4_tu( @@ -22,7 +22,7 @@ vint16mf4_t test_vfcvt_x_f_v_i16mf4_tu(vint16mf4_t maskedoff, vfloat16mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_tu(vint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf4_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf2_tu( @@ -31,7 +31,7 @@ vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_tu(vint16mf4_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_x_f_v_i16mf2_tu(vint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_x_f_v_i16mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf2_tu( @@ -40,7 +40,7 @@ vint16mf2_t test_vfcvt_x_f_v_i16mf2_tu(vint16mf2_t maskedoff, vfloat16mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_tu(vint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m1_tu( @@ -49,7 +49,7 @@ vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_tu(vint16mf2_t maskedoff, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_x_f_v_i16m1_tu(vint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_x_f_v_i16m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m1_tu( @@ -58,7 +58,7 @@ vint16m1_t test_vfcvt_x_f_v_i16m1_tu(vint16m1_t maskedoff, vfloat16m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_tu(vint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m2_tu( @@ -67,7 +67,7 @@ vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_tu(vint16m1_t maskedoff, vfloat16m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_x_f_v_i16m2_tu(vint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_x_f_v_i16m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m2_tu( @@ -76,7 +76,7 @@ vint16m2_t test_vfcvt_x_f_v_i16m2_tu(vint16m2_t maskedoff, vfloat16m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_tu(vint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m4_tu( @@ -85,7 +85,7 @@ vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_tu(vint16m2_t maskedoff, vfloat16m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_x_f_v_i16m4_tu(vint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_x_f_v_i16m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m4_tu( @@ -94,7 +94,7 @@ vint16m4_t test_vfcvt_x_f_v_i16m4_tu(vint16m4_t maskedoff, vfloat16m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_tu(vint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m8_tu( @@ -103,7 +103,7 @@ vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_tu(vint16m4_t maskedoff, vfloat16m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_x_f_v_i16m8_tu(vint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_x_f_v_i16m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m8_tu( @@ -112,7 +112,7 @@ vint16m8_t test_vfcvt_x_f_v_i16m8_tu(vint16m8_t maskedoff, vfloat16m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_tu(vint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf4_tu( @@ -121,7 +121,7 @@ vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_tu(vint16m8_t maskedoff, vfloat16m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_tu(vuint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf4_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf4_tu( @@ -130,7 +130,7 @@ vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_tu(vuint16mf4_t maskedoff, vfloat16mf4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_tu(vuint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf4_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf2_tu( @@ -139,7 +139,7 @@ vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_tu(vuint16mf4_t maskedoff, vfloat16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_tu(vuint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf2_tu( @@ -148,7 +148,7 @@ vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_tu(vuint16mf2_t maskedoff, vfloat16mf2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_tu(vuint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m1_tu( @@ -157,7 +157,7 @@ vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_tu(vuint16mf2_t maskedoff, vfloat16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_xu_f_v_u16m1_tu(vuint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_xu_f_v_u16m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m1_tu( @@ -166,7 +166,7 @@ vuint16m1_t test_vfcvt_xu_f_v_u16m1_tu(vuint16m1_t maskedoff, vfloat16m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_tu(vuint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m2_tu( @@ -175,7 +175,7 @@ vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_tu(vuint16m1_t maskedoff, vfloat16m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_xu_f_v_u16m2_tu(vuint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_xu_f_v_u16m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m2_tu( @@ -184,7 +184,7 @@ vuint16m2_t test_vfcvt_xu_f_v_u16m2_tu(vuint16m2_t maskedoff, vfloat16m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_tu(vuint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m4_tu( @@ -193,7 +193,7 @@ vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_tu(vuint16m2_t maskedoff, vfloat16m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_xu_f_v_u16m4_tu(vuint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_xu_f_v_u16m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m4_tu( @@ -202,7 +202,7 @@ vuint16m4_t test_vfcvt_xu_f_v_u16m4_tu(vuint16m4_t maskedoff, vfloat16m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_tu(vuint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m8_tu( @@ -211,7 +211,7 @@ vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_tu(vuint16m4_t maskedoff, vfloat16m4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_xu_f_v_u16m8_tu(vuint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_xu_f_v_u16m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m8_tu( @@ -220,7 +220,7 @@ vuint16m8_t test_vfcvt_xu_f_v_u16m8_tu(vuint16m8_t maskedoff, vfloat16m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_tu(vuint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf4_tu( @@ -229,7 +229,7 @@ vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_tu(vuint16m8_t maskedoff, vfloat16m8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_tu(vfloat16mf4_t maskedoff, vint16mf4_t src, size_t vl) { - return vfcvt_f_x_v_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf2_tu( @@ -238,7 +238,7 @@ vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_tu(vfloat16mf4_t maskedoff, vint16mf4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_tu(vfloat16mf2_t maskedoff, vint16mf2_t src, size_t vl) { - return vfcvt_f_x_v_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m1_tu( @@ -247,7 +247,7 @@ vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_tu(vfloat16mf2_t maskedoff, vint16mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_x_v_f16m1_tu(vfloat16m1_t maskedoff, vint16m1_t src, size_t vl) { - return vfcvt_f_x_v_f16m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m2_tu( @@ -256,7 +256,7 @@ vfloat16m1_t test_vfcvt_f_x_v_f16m1_tu(vfloat16m1_t maskedoff, vint16m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_x_v_f16m2_tu(vfloat16m2_t maskedoff, vint16m2_t src, size_t vl) { - return vfcvt_f_x_v_f16m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m4_tu( @@ -265,7 +265,7 @@ vfloat16m2_t test_vfcvt_f_x_v_f16m2_tu(vfloat16m2_t maskedoff, vint16m2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_x_v_f16m4_tu(vfloat16m4_t maskedoff, vint16m4_t src, size_t vl) { - return vfcvt_f_x_v_f16m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m8_tu( @@ -274,7 +274,7 @@ vfloat16m4_t test_vfcvt_f_x_v_f16m4_tu(vfloat16m4_t maskedoff, vint16m4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_x_v_f16m8_tu(vfloat16m8_t maskedoff, vint16m8_t src, size_t vl) { - return vfcvt_f_x_v_f16m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf4_tu( @@ -283,7 +283,7 @@ vfloat16m8_t test_vfcvt_f_x_v_f16m8_tu(vfloat16m8_t maskedoff, vint16m8_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_tu(vfloat16mf4_t maskedoff, vuint16mf4_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf2_tu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_tu(vfloat16mf4_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_tu(vfloat16mf2_t maskedoff, vuint16mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m1_tu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_tu(vfloat16mf2_t maskedoff, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_xu_v_f16m1_tu(vfloat16m1_t maskedoff, vuint16m1_t src, size_t vl) { - return vfcvt_f_xu_v_f16m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m2_tu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfcvt_f_xu_v_f16m1_tu(vfloat16m1_t maskedoff, vuint16m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_xu_v_f16m2_tu(vfloat16m2_t maskedoff, vuint16m2_t src, size_t vl) { - return vfcvt_f_xu_v_f16m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m4_tu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfcvt_f_xu_v_f16m2_tu(vfloat16m2_t maskedoff, vuint16m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_xu_v_f16m4_tu(vfloat16m4_t maskedoff, vuint16m4_t src, size_t vl) { - return vfcvt_f_xu_v_f16m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m8_tu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfcvt_f_xu_v_f16m4_tu(vfloat16m4_t maskedoff, vuint16m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_xu_v_f16m8_tu(vfloat16m8_t maskedoff, vuint16m8_t src, size_t vl) { - return vfcvt_f_xu_v_f16m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32mf2_tu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfcvt_f_xu_v_f16m8_tu(vfloat16m8_t maskedoff, vuint16m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_x_f_v_i32mf2_tu(vint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_x_f_v_i32mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32mf2_tu( @@ -346,7 +346,7 @@ vint32mf2_t test_vfcvt_x_f_v_i32mf2_tu(vint32mf2_t maskedoff, vfloat32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_tu(vint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m1_tu( @@ -355,7 +355,7 @@ vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_tu(vint32mf2_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_x_f_v_i32m1_tu(vint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_x_f_v_i32m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m1_tu( @@ -364,7 +364,7 @@ vint32m1_t test_vfcvt_x_f_v_i32m1_tu(vint32m1_t maskedoff, vfloat32m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_tu(vint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m2_tu( @@ -373,7 +373,7 @@ vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_tu(vint32m1_t maskedoff, vfloat32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_x_f_v_i32m2_tu(vint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_x_f_v_i32m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m2_tu( @@ -382,7 +382,7 @@ vint32m2_t test_vfcvt_x_f_v_i32m2_tu(vint32m2_t maskedoff, vfloat32m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_tu(vint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m4_tu( @@ -391,7 +391,7 @@ vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_tu(vint32m2_t maskedoff, vfloat32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_x_f_v_i32m4_tu(vint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_x_f_v_i32m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m4_tu( @@ -400,7 +400,7 @@ vint32m4_t test_vfcvt_x_f_v_i32m4_tu(vint32m4_t maskedoff, vfloat32m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_tu(vint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m8_tu( @@ -409,7 +409,7 @@ vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_tu(vint32m4_t maskedoff, vfloat32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_x_f_v_i32m8_tu(vint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_x_f_v_i32m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m8_tu( @@ -418,7 +418,7 @@ vint32m8_t test_vfcvt_x_f_v_i32m8_tu(vint32m8_t maskedoff, vfloat32m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_tu(vint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32mf2_tu( @@ -427,7 +427,7 @@ vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_tu(vint32m8_t maskedoff, vfloat32m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u32mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32mf2_tu( @@ -436,7 +436,7 @@ vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat32mf2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m1_tu( @@ -445,7 +445,7 @@ vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_xu_f_v_u32m1_tu(vuint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_xu_f_v_u32m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m1_tu( @@ -454,7 +454,7 @@ vuint32m1_t test_vfcvt_xu_f_v_u32m1_tu(vuint32m1_t maskedoff, vfloat32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_tu(vuint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m2_tu( @@ -463,7 +463,7 @@ vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_tu(vuint32m1_t maskedoff, vfloat32m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_xu_f_v_u32m2_tu(vuint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_xu_f_v_u32m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m2_tu( @@ -472,7 +472,7 @@ vuint32m2_t test_vfcvt_xu_f_v_u32m2_tu(vuint32m2_t maskedoff, vfloat32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_tu(vuint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m4_tu( @@ -481,7 +481,7 @@ vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_tu(vuint32m2_t maskedoff, vfloat32m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_xu_f_v_u32m4_tu(vuint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_xu_f_v_u32m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m4_tu( @@ -490,7 +490,7 @@ vuint32m4_t test_vfcvt_xu_f_v_u32m4_tu(vuint32m4_t maskedoff, vfloat32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_tu(vuint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m8_tu( @@ -499,7 +499,7 @@ vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_tu(vuint32m4_t maskedoff, vfloat32m4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_xu_f_v_u32m8_tu(vuint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_xu_f_v_u32m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m8_tu( @@ -508,7 +508,7 @@ vuint32m8_t test_vfcvt_xu_f_v_u32m8_tu(vuint32m8_t maskedoff, vfloat32m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_tu(vuint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32mf2_tu( @@ -517,7 +517,7 @@ vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_tu(vuint32m8_t maskedoff, vfloat32m8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_tu(vfloat32mf2_t maskedoff, vint32mf2_t src, size_t vl) { - return vfcvt_f_x_v_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m1_tu( @@ -526,7 +526,7 @@ vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_tu(vfloat32mf2_t maskedoff, vint32mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_x_v_f32m1_tu(vfloat32m1_t maskedoff, vint32m1_t src, size_t vl) { - return vfcvt_f_x_v_f32m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m2_tu( @@ -535,7 +535,7 @@ vfloat32m1_t test_vfcvt_f_x_v_f32m1_tu(vfloat32m1_t maskedoff, vint32m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_x_v_f32m2_tu(vfloat32m2_t maskedoff, vint32m2_t src, size_t vl) { - return vfcvt_f_x_v_f32m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m4_tu( @@ -544,7 +544,7 @@ vfloat32m2_t test_vfcvt_f_x_v_f32m2_tu(vfloat32m2_t maskedoff, vint32m2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_x_v_f32m4_tu(vfloat32m4_t maskedoff, vint32m4_t src, size_t vl) { - return vfcvt_f_x_v_f32m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m8_tu( @@ -553,7 +553,7 @@ vfloat32m4_t test_vfcvt_f_x_v_f32m4_tu(vfloat32m4_t maskedoff, vint32m4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_x_v_f32m8_tu(vfloat32m8_t maskedoff, vint32m8_t src, size_t vl) { - return vfcvt_f_x_v_f32m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32mf2_tu( @@ -562,7 +562,7 @@ vfloat32m8_t test_vfcvt_f_x_v_f32m8_tu(vfloat32m8_t maskedoff, vint32m8_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_tu(vfloat32mf2_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m1_tu( @@ -571,7 +571,7 @@ vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_tu(vfloat32mf2_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_xu_v_f32m1_tu(vfloat32m1_t maskedoff, vuint32m1_t src, size_t vl) { - return vfcvt_f_xu_v_f32m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m2_tu( @@ -580,7 +580,7 @@ vfloat32m1_t test_vfcvt_f_xu_v_f32m1_tu(vfloat32m1_t maskedoff, vuint32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_xu_v_f32m2_tu(vfloat32m2_t maskedoff, vuint32m2_t src, size_t vl) { - return vfcvt_f_xu_v_f32m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m4_tu( @@ -589,7 +589,7 @@ vfloat32m2_t test_vfcvt_f_xu_v_f32m2_tu(vfloat32m2_t maskedoff, vuint32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_xu_v_f32m4_tu(vfloat32m4_t maskedoff, vuint32m4_t src, size_t vl) { - return vfcvt_f_xu_v_f32m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m8_tu( @@ -598,7 +598,7 @@ vfloat32m4_t test_vfcvt_f_xu_v_f32m4_tu(vfloat32m4_t maskedoff, vuint32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_xu_v_f32m8_tu(vfloat32m8_t maskedoff, vuint32m8_t src, size_t vl) { - return vfcvt_f_xu_v_f32m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m1_tu( @@ -607,7 +607,7 @@ vfloat32m8_t test_vfcvt_f_xu_v_f32m8_tu(vfloat32m8_t maskedoff, vuint32m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_x_f_v_i64m1_tu(vint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_x_f_v_i64m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m1_tu( @@ -616,7 +616,7 @@ vint64m1_t test_vfcvt_x_f_v_i64m1_tu(vint64m1_t maskedoff, vfloat64m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_tu(vint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m2_tu( @@ -625,7 +625,7 @@ vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_tu(vint64m1_t maskedoff, vfloat64m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_x_f_v_i64m2_tu(vint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_x_f_v_i64m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m2_tu( @@ -634,7 +634,7 @@ vint64m2_t test_vfcvt_x_f_v_i64m2_tu(vint64m2_t maskedoff, vfloat64m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_tu(vint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m4_tu( @@ -643,7 +643,7 @@ vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_tu(vint64m2_t maskedoff, vfloat64m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_x_f_v_i64m4_tu(vint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_x_f_v_i64m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m4_tu( @@ -652,7 +652,7 @@ vint64m4_t test_vfcvt_x_f_v_i64m4_tu(vint64m4_t maskedoff, vfloat64m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_tu(vint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m8_tu( @@ -661,7 +661,7 @@ vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_tu(vint64m4_t maskedoff, vfloat64m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_x_f_v_i64m8_tu(vint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_x_f_v_i64m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m8_tu( @@ -670,7 +670,7 @@ vint64m8_t test_vfcvt_x_f_v_i64m8_tu(vint64m8_t maskedoff, vfloat64m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_tu(vint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m1_tu( @@ -679,7 +679,7 @@ vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_tu(vint64m8_t maskedoff, vfloat64m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_xu_f_v_u64m1_tu(vuint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_xu_f_v_u64m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m1_tu( @@ -688,7 +688,7 @@ vuint64m1_t test_vfcvt_xu_f_v_u64m1_tu(vuint64m1_t maskedoff, vfloat64m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_tu(vuint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m2_tu( @@ -697,7 +697,7 @@ vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_tu(vuint64m1_t maskedoff, vfloat64m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_xu_f_v_u64m2_tu(vuint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_xu_f_v_u64m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m2_tu( @@ -706,7 +706,7 @@ vuint64m2_t test_vfcvt_xu_f_v_u64m2_tu(vuint64m2_t maskedoff, vfloat64m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_tu(vuint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m4_tu( @@ -715,7 +715,7 @@ vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_tu(vuint64m2_t maskedoff, vfloat64m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_xu_f_v_u64m4_tu(vuint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_xu_f_v_u64m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m4_tu( @@ -724,7 +724,7 @@ vuint64m4_t test_vfcvt_xu_f_v_u64m4_tu(vuint64m4_t maskedoff, vfloat64m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_tu(vuint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m8_tu( @@ -733,7 +733,7 @@ vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_tu(vuint64m4_t maskedoff, vfloat64m4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_xu_f_v_u64m8_tu(vuint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_xu_f_v_u64m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m8_tu( @@ -742,7 +742,7 @@ vuint64m8_t test_vfcvt_xu_f_v_u64m8_tu(vuint64m8_t maskedoff, vfloat64m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_tu(vuint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m1_tu( @@ -751,7 +751,7 @@ vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_tu(vuint64m8_t maskedoff, vfloat64m8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_x_v_f64m1_tu(vfloat64m1_t maskedoff, vint64m1_t src, size_t vl) { - return vfcvt_f_x_v_f64m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m2_tu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfcvt_f_x_v_f64m1_tu(vfloat64m1_t maskedoff, vint64m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_x_v_f64m2_tu(vfloat64m2_t maskedoff, vint64m2_t src, size_t vl) { - return vfcvt_f_x_v_f64m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m4_tu( @@ -769,7 +769,7 @@ vfloat64m2_t test_vfcvt_f_x_v_f64m2_tu(vfloat64m2_t maskedoff, vint64m2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_x_v_f64m4_tu(vfloat64m4_t maskedoff, vint64m4_t src, size_t vl) { - return vfcvt_f_x_v_f64m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m8_tu( @@ -778,7 +778,7 @@ vfloat64m4_t test_vfcvt_f_x_v_f64m4_tu(vfloat64m4_t maskedoff, vint64m4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_x_v_f64m8_tu(vfloat64m8_t maskedoff, vint64m8_t src, size_t vl) { - return vfcvt_f_x_v_f64m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m1_tu( @@ -787,7 +787,7 @@ vfloat64m8_t test_vfcvt_f_x_v_f64m8_tu(vfloat64m8_t maskedoff, vint64m8_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_xu_v_f64m1_tu(vfloat64m1_t maskedoff, vuint64m1_t src, size_t vl) { - return vfcvt_f_xu_v_f64m1_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m2_tu( @@ -796,7 +796,7 @@ vfloat64m1_t test_vfcvt_f_xu_v_f64m1_tu(vfloat64m1_t maskedoff, vuint64m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_xu_v_f64m2_tu(vfloat64m2_t maskedoff, vuint64m2_t src, size_t vl) { - return vfcvt_f_xu_v_f64m2_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m4_tu( @@ -805,7 +805,7 @@ vfloat64m2_t test_vfcvt_f_xu_v_f64m2_tu(vfloat64m2_t maskedoff, vuint64m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_xu_v_f64m4_tu(vfloat64m4_t maskedoff, vuint64m4_t src, size_t vl) { - return vfcvt_f_xu_v_f64m4_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m8_tu( @@ -814,7 +814,7 @@ vfloat64m4_t test_vfcvt_f_xu_v_f64m4_tu(vfloat64m4_t maskedoff, vuint64m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_xu_v_f64m8_tu(vfloat64m8_t maskedoff, vuint64m8_t src, size_t vl) { - return vfcvt_f_xu_v_f64m8_tu(maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf4_tum( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfcvt_f_xu_v_f64m8_tu(vfloat64m8_t maskedoff, vuint64m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_x_f_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_x_f_v_i16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf4_tum( @@ -832,7 +832,7 @@ vint16mf4_t test_vfcvt_x_f_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf2_tum( @@ -841,7 +841,7 @@ vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_x_f_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_x_f_v_i16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf2_tum( @@ -850,7 +850,7 @@ vint16mf2_t test_vfcvt_x_f_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m1_tum( @@ -859,7 +859,7 @@ vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_x_f_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_x_f_v_i16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m1_tum( @@ -868,7 +868,7 @@ vint16m1_t test_vfcvt_x_f_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m2_tum( @@ -877,7 +877,7 @@ vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_x_f_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_x_f_v_i16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m2_tum( @@ -886,7 +886,7 @@ vint16m2_t test_vfcvt_x_f_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m4_tum( @@ -895,7 +895,7 @@ vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_x_f_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_x_f_v_i16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m4_tum( @@ -904,7 +904,7 @@ vint16m4_t test_vfcvt_x_f_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m8_tum( @@ -913,7 +913,7 @@ vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_x_f_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_x_f_v_i16m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m8_tum( @@ -922,7 +922,7 @@ vint16m8_t test_vfcvt_x_f_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf4_tum( @@ -931,7 +931,7 @@ vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf4_tum( @@ -940,7 +940,7 @@ vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf2_tum( @@ -949,7 +949,7 @@ vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf2_tum( @@ -958,7 +958,7 @@ vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m1_tum( @@ -967,7 +967,7 @@ vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_xu_f_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_xu_f_v_u16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m1_tum( @@ -976,7 +976,7 @@ vuint16m1_t test_vfcvt_xu_f_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m2_tum( @@ -985,7 +985,7 @@ vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_xu_f_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_xu_f_v_u16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m2_tum( @@ -994,7 +994,7 @@ vuint16m2_t test_vfcvt_xu_f_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m4_tum( @@ -1003,7 +1003,7 @@ vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_xu_f_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_xu_f_v_u16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m4_tum( @@ -1012,7 +1012,7 @@ vuint16m4_t test_vfcvt_xu_f_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m8_tum( @@ -1021,7 +1021,7 @@ vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_xu_f_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_xu_f_v_u16m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m8_tum( @@ -1030,7 +1030,7 @@ vuint16m8_t test_vfcvt_xu_f_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf4_tum( @@ -1039,7 +1039,7 @@ vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vint16mf4_t src, size_t vl) { - return vfcvt_f_x_v_f16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf2_tum( @@ -1048,7 +1048,7 @@ vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vint16mf2_t src, size_t vl) { - return vfcvt_f_x_v_f16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m1_tum( @@ -1057,7 +1057,7 @@ vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_x_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vint16m1_t src, size_t vl) { - return vfcvt_f_x_v_f16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m2_tum( @@ -1066,7 +1066,7 @@ vfloat16m1_t test_vfcvt_f_x_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_x_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vint16m2_t src, size_t vl) { - return vfcvt_f_x_v_f16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m4_tum( @@ -1075,7 +1075,7 @@ vfloat16m2_t test_vfcvt_f_x_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_x_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vint16m4_t src, size_t vl) { - return vfcvt_f_x_v_f16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m8_tum( @@ -1084,7 +1084,7 @@ vfloat16m4_t test_vfcvt_f_x_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_x_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vint16m8_t src, size_t vl) { - return vfcvt_f_x_v_f16m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf4_tum( @@ -1093,7 +1093,7 @@ vfloat16m8_t test_vfcvt_f_x_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vuint16mf4_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf2_tum( @@ -1102,7 +1102,7 @@ vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vuint16mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m1_tum( @@ -1111,7 +1111,7 @@ vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_xu_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vuint16m1_t src, size_t vl) { - return vfcvt_f_xu_v_f16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m2_tum( @@ -1120,7 +1120,7 @@ vfloat16m1_t test_vfcvt_f_xu_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_xu_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vuint16m2_t src, size_t vl) { - return vfcvt_f_xu_v_f16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m4_tum( @@ -1129,7 +1129,7 @@ vfloat16m2_t test_vfcvt_f_xu_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_xu_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vuint16m4_t src, size_t vl) { - return vfcvt_f_xu_v_f16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m8_tum( @@ -1138,7 +1138,7 @@ vfloat16m4_t test_vfcvt_f_xu_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_xu_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vuint16m8_t src, size_t vl) { - return vfcvt_f_xu_v_f16m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32mf2_tum( @@ -1147,7 +1147,7 @@ vfloat16m8_t test_vfcvt_f_xu_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_x_f_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_x_f_v_i32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32mf2_tum( @@ -1156,7 +1156,7 @@ vint32mf2_t test_vfcvt_x_f_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m1_tum( @@ -1165,7 +1165,7 @@ vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_x_f_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_x_f_v_i32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m1_tum( @@ -1174,7 +1174,7 @@ vint32m1_t test_vfcvt_x_f_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m2_tum( @@ -1183,7 +1183,7 @@ vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_x_f_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_x_f_v_i32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m2_tum( @@ -1192,7 +1192,7 @@ vint32m2_t test_vfcvt_x_f_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m4_tum( @@ -1201,7 +1201,7 @@ vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_x_f_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_x_f_v_i32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m4_tum( @@ -1210,7 +1210,7 @@ vint32m4_t test_vfcvt_x_f_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m8_tum( @@ -1219,7 +1219,7 @@ vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_x_f_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_x_f_v_i32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m8_tum( @@ -1228,7 +1228,7 @@ vint32m8_t test_vfcvt_x_f_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32mf2_tum( @@ -1237,7 +1237,7 @@ vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32mf2_tum( @@ -1246,7 +1246,7 @@ vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m1_tum( @@ -1255,7 +1255,7 @@ vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_xu_f_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_xu_f_v_u32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m1_tum( @@ -1264,7 +1264,7 @@ vuint32m1_t test_vfcvt_xu_f_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m2_tum( @@ -1273,7 +1273,7 @@ vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_xu_f_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_xu_f_v_u32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m2_tum( @@ -1282,7 +1282,7 @@ vuint32m2_t test_vfcvt_xu_f_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m4_tum( @@ -1291,7 +1291,7 @@ vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_xu_f_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_xu_f_v_u32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m4_tum( @@ -1300,7 +1300,7 @@ vuint32m4_t test_vfcvt_xu_f_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m8_tum( @@ -1309,7 +1309,7 @@ vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_xu_f_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_xu_f_v_u32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m8_tum( @@ -1318,7 +1318,7 @@ vuint32m8_t test_vfcvt_xu_f_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32mf2_tum( @@ -1327,7 +1327,7 @@ vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vint32mf2_t src, size_t vl) { - return vfcvt_f_x_v_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m1_tum( @@ -1336,7 +1336,7 @@ vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_x_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vint32m1_t src, size_t vl) { - return vfcvt_f_x_v_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m2_tum( @@ -1345,7 +1345,7 @@ vfloat32m1_t test_vfcvt_f_x_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_x_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vint32m2_t src, size_t vl) { - return vfcvt_f_x_v_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m4_tum( @@ -1354,7 +1354,7 @@ vfloat32m2_t test_vfcvt_f_x_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_x_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vint32m4_t src, size_t vl) { - return vfcvt_f_x_v_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m8_tum( @@ -1363,7 +1363,7 @@ vfloat32m4_t test_vfcvt_f_x_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_x_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vint32m8_t src, size_t vl) { - return vfcvt_f_x_v_f32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32mf2_tum( @@ -1372,7 +1372,7 @@ vfloat32m8_t test_vfcvt_f_x_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m1_tum( @@ -1381,7 +1381,7 @@ vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_xu_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vuint32m1_t src, size_t vl) { - return vfcvt_f_xu_v_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m2_tum( @@ -1390,7 +1390,7 @@ vfloat32m1_t test_vfcvt_f_xu_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_xu_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vuint32m2_t src, size_t vl) { - return vfcvt_f_xu_v_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m4_tum( @@ -1399,7 +1399,7 @@ vfloat32m2_t test_vfcvt_f_xu_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_xu_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vuint32m4_t src, size_t vl) { - return vfcvt_f_xu_v_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m8_tum( @@ -1408,7 +1408,7 @@ vfloat32m4_t test_vfcvt_f_xu_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_xu_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vuint32m8_t src, size_t vl) { - return vfcvt_f_xu_v_f32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m1_tum( @@ -1417,7 +1417,7 @@ vfloat32m8_t test_vfcvt_f_xu_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_x_f_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_x_f_v_i64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m1_tum( @@ -1426,7 +1426,7 @@ vint64m1_t test_vfcvt_x_f_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m2_tum( @@ -1435,7 +1435,7 @@ vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_x_f_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_x_f_v_i64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m2_tum( @@ -1444,7 +1444,7 @@ vint64m2_t test_vfcvt_x_f_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m4_tum( @@ -1453,7 +1453,7 @@ vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_x_f_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_x_f_v_i64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m4_tum( @@ -1462,7 +1462,7 @@ vint64m4_t test_vfcvt_x_f_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m8_tum( @@ -1471,7 +1471,7 @@ vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_x_f_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_x_f_v_i64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m8_tum( @@ -1480,7 +1480,7 @@ vint64m8_t test_vfcvt_x_f_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m1_tum( @@ -1489,7 +1489,7 @@ vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_xu_f_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_xu_f_v_u64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m1_tum( @@ -1498,7 +1498,7 @@ vuint64m1_t test_vfcvt_xu_f_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m2_tum( @@ -1507,7 +1507,7 @@ vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_xu_f_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_xu_f_v_u64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m2_tum( @@ -1516,7 +1516,7 @@ vuint64m2_t test_vfcvt_xu_f_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m4_tum( @@ -1525,7 +1525,7 @@ vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_xu_f_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_xu_f_v_u64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m4_tum( @@ -1534,7 +1534,7 @@ vuint64m4_t test_vfcvt_xu_f_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m8_tum( @@ -1543,7 +1543,7 @@ vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_xu_f_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_xu_f_v_u64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m8_tum( @@ -1552,7 +1552,7 @@ vuint64m8_t test_vfcvt_xu_f_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m1_tum( @@ -1561,7 +1561,7 @@ vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_x_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vint64m1_t src, size_t vl) { - return vfcvt_f_x_v_f64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m2_tum( @@ -1570,7 +1570,7 @@ vfloat64m1_t test_vfcvt_f_x_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_x_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vint64m2_t src, size_t vl) { - return vfcvt_f_x_v_f64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m4_tum( @@ -1579,7 +1579,7 @@ vfloat64m2_t test_vfcvt_f_x_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_x_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vint64m4_t src, size_t vl) { - return vfcvt_f_x_v_f64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m8_tum( @@ -1588,7 +1588,7 @@ vfloat64m4_t test_vfcvt_f_x_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_x_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vint64m8_t src, size_t vl) { - return vfcvt_f_x_v_f64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m1_tum( @@ -1597,7 +1597,7 @@ vfloat64m8_t test_vfcvt_f_x_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_xu_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vuint64m1_t src, size_t vl) { - return vfcvt_f_xu_v_f64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m2_tum( @@ -1606,7 +1606,7 @@ vfloat64m1_t test_vfcvt_f_xu_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_xu_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vuint64m2_t src, size_t vl) { - return vfcvt_f_xu_v_f64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m4_tum( @@ -1615,7 +1615,7 @@ vfloat64m2_t test_vfcvt_f_xu_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_xu_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vuint64m4_t src, size_t vl) { - return vfcvt_f_xu_v_f64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m8_tum( @@ -1624,7 +1624,7 @@ vfloat64m4_t test_vfcvt_f_xu_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_xu_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vuint64m8_t src, size_t vl) { - return vfcvt_f_xu_v_f64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf4_tumu( @@ -1633,7 +1633,7 @@ vfloat64m8_t test_vfcvt_f_xu_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_x_f_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_x_f_v_i16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf4_tumu( @@ -1642,7 +1642,7 @@ vint16mf4_t test_vfcvt_x_f_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf2_tumu( @@ -1651,7 +1651,7 @@ vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_x_f_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_x_f_v_i16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf2_tumu( @@ -1660,7 +1660,7 @@ vint16mf2_t test_vfcvt_x_f_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m1_tumu( @@ -1669,7 +1669,7 @@ vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_x_f_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_x_f_v_i16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m1_tumu( @@ -1678,7 +1678,7 @@ vint16m1_t test_vfcvt_x_f_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m2_tumu( @@ -1687,7 +1687,7 @@ vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_x_f_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_x_f_v_i16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m2_tumu( @@ -1696,7 +1696,7 @@ vint16m2_t test_vfcvt_x_f_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m4_tumu( @@ -1705,7 +1705,7 @@ vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_x_f_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_x_f_v_i16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m4_tumu( @@ -1714,7 +1714,7 @@ vint16m4_t test_vfcvt_x_f_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m8_tumu( @@ -1723,7 +1723,7 @@ vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_x_f_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_x_f_v_i16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m8_tumu( @@ -1732,7 +1732,7 @@ vint16m8_t test_vfcvt_x_f_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf4_tumu( @@ -1741,7 +1741,7 @@ vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf4_tumu( @@ -1750,7 +1750,7 @@ vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf2_tumu( @@ -1759,7 +1759,7 @@ vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf2_tumu( @@ -1768,7 +1768,7 @@ vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m1_tumu( @@ -1777,7 +1777,7 @@ vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_xu_f_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_xu_f_v_u16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m1_tumu( @@ -1786,7 +1786,7 @@ vuint16m1_t test_vfcvt_xu_f_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m2_tumu( @@ -1795,7 +1795,7 @@ vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_xu_f_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_xu_f_v_u16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m2_tumu( @@ -1804,7 +1804,7 @@ vuint16m2_t test_vfcvt_xu_f_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m4_tumu( @@ -1813,7 +1813,7 @@ vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_xu_f_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_xu_f_v_u16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m4_tumu( @@ -1822,7 +1822,7 @@ vuint16m4_t test_vfcvt_xu_f_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m8_tumu( @@ -1831,7 +1831,7 @@ vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_xu_f_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_xu_f_v_u16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m8_tumu( @@ -1840,7 +1840,7 @@ vuint16m8_t test_vfcvt_xu_f_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf4_tumu( @@ -1849,7 +1849,7 @@ vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vint16mf4_t src, size_t vl) { - return vfcvt_f_x_v_f16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf2_tumu( @@ -1858,7 +1858,7 @@ vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vint16mf2_t src, size_t vl) { - return vfcvt_f_x_v_f16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m1_tumu( @@ -1867,7 +1867,7 @@ vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_x_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vint16m1_t src, size_t vl) { - return vfcvt_f_x_v_f16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m2_tumu( @@ -1876,7 +1876,7 @@ vfloat16m1_t test_vfcvt_f_x_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_x_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vint16m2_t src, size_t vl) { - return vfcvt_f_x_v_f16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m4_tumu( @@ -1885,7 +1885,7 @@ vfloat16m2_t test_vfcvt_f_x_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_x_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vint16m4_t src, size_t vl) { - return vfcvt_f_x_v_f16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m8_tumu( @@ -1894,7 +1894,7 @@ vfloat16m4_t test_vfcvt_f_x_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_x_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vint16m8_t src, size_t vl) { - return vfcvt_f_x_v_f16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf4_tumu( @@ -1903,7 +1903,7 @@ vfloat16m8_t test_vfcvt_f_x_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vuint16mf4_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf2_tumu( @@ -1912,7 +1912,7 @@ vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vuint16mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m1_tumu( @@ -1921,7 +1921,7 @@ vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_xu_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vuint16m1_t src, size_t vl) { - return vfcvt_f_xu_v_f16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m2_tumu( @@ -1930,7 +1930,7 @@ vfloat16m1_t test_vfcvt_f_xu_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_xu_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vuint16m2_t src, size_t vl) { - return vfcvt_f_xu_v_f16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m4_tumu( @@ -1939,7 +1939,7 @@ vfloat16m2_t test_vfcvt_f_xu_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_xu_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vuint16m4_t src, size_t vl) { - return vfcvt_f_xu_v_f16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m8_tumu( @@ -1948,7 +1948,7 @@ vfloat16m4_t test_vfcvt_f_xu_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_xu_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vuint16m8_t src, size_t vl) { - return vfcvt_f_xu_v_f16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32mf2_tumu( @@ -1957,7 +1957,7 @@ vfloat16m8_t test_vfcvt_f_xu_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_x_f_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_x_f_v_i32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32mf2_tumu( @@ -1966,7 +1966,7 @@ vint32mf2_t test_vfcvt_x_f_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m1_tumu( @@ -1975,7 +1975,7 @@ vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_x_f_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_x_f_v_i32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m1_tumu( @@ -1984,7 +1984,7 @@ vint32m1_t test_vfcvt_x_f_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m2_tumu( @@ -1993,7 +1993,7 @@ vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_x_f_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_x_f_v_i32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m2_tumu( @@ -2002,7 +2002,7 @@ vint32m2_t test_vfcvt_x_f_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m4_tumu( @@ -2011,7 +2011,7 @@ vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_x_f_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_x_f_v_i32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m4_tumu( @@ -2020,7 +2020,7 @@ vint32m4_t test_vfcvt_x_f_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m8_tumu( @@ -2029,7 +2029,7 @@ vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_x_f_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_x_f_v_i32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m8_tumu( @@ -2038,7 +2038,7 @@ vint32m8_t test_vfcvt_x_f_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32mf2_tumu( @@ -2047,7 +2047,7 @@ vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32mf2_tumu( @@ -2056,7 +2056,7 @@ vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m1_tumu( @@ -2065,7 +2065,7 @@ vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_xu_f_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_xu_f_v_u32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m1_tumu( @@ -2074,7 +2074,7 @@ vuint32m1_t test_vfcvt_xu_f_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m2_tumu( @@ -2083,7 +2083,7 @@ vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_xu_f_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_xu_f_v_u32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m2_tumu( @@ -2092,7 +2092,7 @@ vuint32m2_t test_vfcvt_xu_f_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m4_tumu( @@ -2101,7 +2101,7 @@ vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_xu_f_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_xu_f_v_u32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m4_tumu( @@ -2110,7 +2110,7 @@ vuint32m4_t test_vfcvt_xu_f_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m8_tumu( @@ -2119,7 +2119,7 @@ vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_xu_f_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_xu_f_v_u32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m8_tumu( @@ -2128,7 +2128,7 @@ vuint32m8_t test_vfcvt_xu_f_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32mf2_tumu( @@ -2137,7 +2137,7 @@ vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vint32mf2_t src, size_t vl) { - return vfcvt_f_x_v_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m1_tumu( @@ -2146,7 +2146,7 @@ vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_x_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vint32m1_t src, size_t vl) { - return vfcvt_f_x_v_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m2_tumu( @@ -2155,7 +2155,7 @@ vfloat32m1_t test_vfcvt_f_x_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_x_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vint32m2_t src, size_t vl) { - return vfcvt_f_x_v_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m4_tumu( @@ -2164,7 +2164,7 @@ vfloat32m2_t test_vfcvt_f_x_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_x_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vint32m4_t src, size_t vl) { - return vfcvt_f_x_v_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m8_tumu( @@ -2173,7 +2173,7 @@ vfloat32m4_t test_vfcvt_f_x_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_x_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vint32m8_t src, size_t vl) { - return vfcvt_f_x_v_f32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32mf2_tumu( @@ -2182,7 +2182,7 @@ vfloat32m8_t test_vfcvt_f_x_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m1_tumu( @@ -2191,7 +2191,7 @@ vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_xu_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vuint32m1_t src, size_t vl) { - return vfcvt_f_xu_v_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m2_tumu( @@ -2200,7 +2200,7 @@ vfloat32m1_t test_vfcvt_f_xu_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_xu_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vuint32m2_t src, size_t vl) { - return vfcvt_f_xu_v_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m4_tumu( @@ -2209,7 +2209,7 @@ vfloat32m2_t test_vfcvt_f_xu_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_xu_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vuint32m4_t src, size_t vl) { - return vfcvt_f_xu_v_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m8_tumu( @@ -2218,7 +2218,7 @@ vfloat32m4_t test_vfcvt_f_xu_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_xu_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vuint32m8_t src, size_t vl) { - return vfcvt_f_xu_v_f32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m1_tumu( @@ -2227,7 +2227,7 @@ vfloat32m8_t test_vfcvt_f_xu_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_x_f_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_x_f_v_i64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m1_tumu( @@ -2236,7 +2236,7 @@ vint64m1_t test_vfcvt_x_f_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m2_tumu( @@ -2245,7 +2245,7 @@ vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_x_f_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_x_f_v_i64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m2_tumu( @@ -2254,7 +2254,7 @@ vint64m2_t test_vfcvt_x_f_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m4_tumu( @@ -2263,7 +2263,7 @@ vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_x_f_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_x_f_v_i64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m4_tumu( @@ -2272,7 +2272,7 @@ vint64m4_t test_vfcvt_x_f_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m8_tumu( @@ -2281,7 +2281,7 @@ vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_x_f_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_x_f_v_i64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m8_tumu( @@ -2290,7 +2290,7 @@ vint64m8_t test_vfcvt_x_f_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m1_tumu( @@ -2299,7 +2299,7 @@ vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_xu_f_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_xu_f_v_u64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m1_tumu( @@ -2308,7 +2308,7 @@ vuint64m1_t test_vfcvt_xu_f_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m2_tumu( @@ -2317,7 +2317,7 @@ vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_xu_f_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_xu_f_v_u64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m2_tumu( @@ -2326,7 +2326,7 @@ vuint64m2_t test_vfcvt_xu_f_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m4_tumu( @@ -2335,7 +2335,7 @@ vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_xu_f_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_xu_f_v_u64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m4_tumu( @@ -2344,7 +2344,7 @@ vuint64m4_t test_vfcvt_xu_f_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m8_tumu( @@ -2353,7 +2353,7 @@ vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_xu_f_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_xu_f_v_u64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m8_tumu( @@ -2362,7 +2362,7 @@ vuint64m8_t test_vfcvt_xu_f_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m1_tumu( @@ -2371,7 +2371,7 @@ vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_x_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vint64m1_t src, size_t vl) { - return vfcvt_f_x_v_f64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m2_tumu( @@ -2380,7 +2380,7 @@ vfloat64m1_t test_vfcvt_f_x_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_x_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vint64m2_t src, size_t vl) { - return vfcvt_f_x_v_f64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m4_tumu( @@ -2389,7 +2389,7 @@ vfloat64m2_t test_vfcvt_f_x_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_x_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vint64m4_t src, size_t vl) { - return vfcvt_f_x_v_f64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m8_tumu( @@ -2398,7 +2398,7 @@ vfloat64m4_t test_vfcvt_f_x_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_x_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vint64m8_t src, size_t vl) { - return vfcvt_f_x_v_f64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m1_tumu( @@ -2407,7 +2407,7 @@ vfloat64m8_t test_vfcvt_f_x_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_xu_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vuint64m1_t src, size_t vl) { - return vfcvt_f_xu_v_f64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m2_tumu( @@ -2416,7 +2416,7 @@ vfloat64m1_t test_vfcvt_f_xu_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_xu_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vuint64m2_t src, size_t vl) { - return vfcvt_f_xu_v_f64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m4_tumu( @@ -2425,7 +2425,7 @@ vfloat64m2_t test_vfcvt_f_xu_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_xu_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vuint64m4_t src, size_t vl) { - return vfcvt_f_xu_v_f64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m8_tumu( @@ -2434,7 +2434,7 @@ vfloat64m4_t test_vfcvt_f_xu_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_xu_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vuint64m8_t src, size_t vl) { - return vfcvt_f_xu_v_f64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf4_mu( @@ -2443,7 +2443,7 @@ vfloat64m8_t test_vfcvt_f_xu_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_x_f_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_x_f_v_i16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf4_mu( @@ -2452,7 +2452,7 @@ vint16mf4_t test_vfcvt_x_f_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16mf2_mu( @@ -2461,7 +2461,7 @@ vint16mf4_t test_vfcvt_rtz_x_f_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_x_f_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_x_f_v_i16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16mf2_mu( @@ -2470,7 +2470,7 @@ vint16mf2_t test_vfcvt_x_f_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m1_mu( @@ -2479,7 +2479,7 @@ vint16mf2_t test_vfcvt_rtz_x_f_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_x_f_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_x_f_v_i16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m1_mu( @@ -2488,7 +2488,7 @@ vint16m1_t test_vfcvt_x_f_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m2_mu( @@ -2497,7 +2497,7 @@ vint16m1_t test_vfcvt_rtz_x_f_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_x_f_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_x_f_v_i16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m2_mu( @@ -2506,7 +2506,7 @@ vint16m2_t test_vfcvt_x_f_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m4_mu( @@ -2515,7 +2515,7 @@ vint16m2_t test_vfcvt_rtz_x_f_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_x_f_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_x_f_v_i16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m4_mu( @@ -2524,7 +2524,7 @@ vint16m4_t test_vfcvt_x_f_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i16m8_mu( @@ -2533,7 +2533,7 @@ vint16m4_t test_vfcvt_rtz_x_f_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_x_f_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_x_f_v_i16m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i16m8_mu( @@ -2542,7 +2542,7 @@ vint16m8_t test_vfcvt_x_f_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i16m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf4_mu( @@ -2551,7 +2551,7 @@ vint16m8_t test_vfcvt_rtz_x_f_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf4_mu( @@ -2560,7 +2560,7 @@ vuint16mf4_t test_vfcvt_xu_f_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16mf2_mu( @@ -2569,7 +2569,7 @@ vuint16mf4_t test_vfcvt_rtz_xu_f_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16mf2_mu( @@ -2578,7 +2578,7 @@ vuint16mf2_t test_vfcvt_xu_f_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m1_mu( @@ -2587,7 +2587,7 @@ vuint16mf2_t test_vfcvt_rtz_xu_f_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_xu_f_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_xu_f_v_u16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m1_mu( @@ -2596,7 +2596,7 @@ vuint16m1_t test_vfcvt_xu_f_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m2_mu( @@ -2605,7 +2605,7 @@ vuint16m1_t test_vfcvt_rtz_xu_f_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_xu_f_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_xu_f_v_u16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m2_mu( @@ -2614,7 +2614,7 @@ vuint16m2_t test_vfcvt_xu_f_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m4_mu( @@ -2623,7 +2623,7 @@ vuint16m2_t test_vfcvt_rtz_xu_f_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_xu_f_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_xu_f_v_u16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m4_mu( @@ -2632,7 +2632,7 @@ vuint16m4_t test_vfcvt_xu_f_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u16m8_mu( @@ -2641,7 +2641,7 @@ vuint16m4_t test_vfcvt_rtz_xu_f_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_xu_f_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_xu_f_v_u16m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u16m8_mu( @@ -2650,7 +2650,7 @@ vuint16m8_t test_vfcvt_xu_f_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u16m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf4_mu( @@ -2659,7 +2659,7 @@ vuint16m8_t test_vfcvt_rtz_xu_f_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vint16mf4_t src, size_t vl) { - return vfcvt_f_x_v_f16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16mf2_mu( @@ -2668,7 +2668,7 @@ vfloat16mf4_t test_vfcvt_f_x_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vint16mf2_t src, size_t vl) { - return vfcvt_f_x_v_f16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m1_mu( @@ -2677,7 +2677,7 @@ vfloat16mf2_t test_vfcvt_f_x_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_x_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vint16m1_t src, size_t vl) { - return vfcvt_f_x_v_f16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m2_mu( @@ -2686,7 +2686,7 @@ vfloat16m1_t test_vfcvt_f_x_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_x_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vint16m2_t src, size_t vl) { - return vfcvt_f_x_v_f16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m4_mu( @@ -2695,7 +2695,7 @@ vfloat16m2_t test_vfcvt_f_x_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_x_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vint16m4_t src, size_t vl) { - return vfcvt_f_x_v_f16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f16m8_mu( @@ -2704,7 +2704,7 @@ vfloat16m4_t test_vfcvt_f_x_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_x_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vint16m8_t src, size_t vl) { - return vfcvt_f_x_v_f16m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf4_mu( @@ -2713,7 +2713,7 @@ vfloat16m8_t test_vfcvt_f_x_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vuint16mf4_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16mf2_mu( @@ -2722,7 +2722,7 @@ vfloat16mf4_t test_vfcvt_f_xu_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vuint16mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m1_mu( @@ -2731,7 +2731,7 @@ vfloat16mf2_t test_vfcvt_f_xu_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfcvt_f_xu_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vuint16m1_t src, size_t vl) { - return vfcvt_f_xu_v_f16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m2_mu( @@ -2740,7 +2740,7 @@ vfloat16m1_t test_vfcvt_f_xu_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfcvt_f_xu_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vuint16m2_t src, size_t vl) { - return vfcvt_f_xu_v_f16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m4_mu( @@ -2749,7 +2749,7 @@ vfloat16m2_t test_vfcvt_f_xu_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfcvt_f_xu_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vuint16m4_t src, size_t vl) { - return vfcvt_f_xu_v_f16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f16m8_mu( @@ -2758,7 +2758,7 @@ vfloat16m4_t test_vfcvt_f_xu_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfcvt_f_xu_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vuint16m8_t src, size_t vl) { - return vfcvt_f_xu_v_f16m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32mf2_mu( @@ -2767,7 +2767,7 @@ vfloat16m8_t test_vfcvt_f_xu_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_x_f_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_x_f_v_i32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32mf2_mu( @@ -2776,7 +2776,7 @@ vint32mf2_t test_vfcvt_x_f_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m1_mu( @@ -2785,7 +2785,7 @@ vint32mf2_t test_vfcvt_rtz_x_f_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_x_f_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_x_f_v_i32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m1_mu( @@ -2794,7 +2794,7 @@ vint32m1_t test_vfcvt_x_f_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m2_mu( @@ -2803,7 +2803,7 @@ vint32m1_t test_vfcvt_rtz_x_f_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_x_f_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_x_f_v_i32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m2_mu( @@ -2812,7 +2812,7 @@ vint32m2_t test_vfcvt_x_f_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m4_mu( @@ -2821,7 +2821,7 @@ vint32m2_t test_vfcvt_rtz_x_f_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_x_f_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_x_f_v_i32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m4_mu( @@ -2830,7 +2830,7 @@ vint32m4_t test_vfcvt_x_f_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i32m8_mu( @@ -2839,7 +2839,7 @@ vint32m4_t test_vfcvt_rtz_x_f_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_x_f_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_x_f_v_i32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i32m8_mu( @@ -2848,7 +2848,7 @@ vint32m8_t test_vfcvt_x_f_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32mf2_mu( @@ -2857,7 +2857,7 @@ vint32m8_t test_vfcvt_rtz_x_f_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_xu_f_v_u32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32mf2_mu( @@ -2866,7 +2866,7 @@ vuint32mf2_t test_vfcvt_xu_f_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m1_mu( @@ -2875,7 +2875,7 @@ vuint32mf2_t test_vfcvt_rtz_xu_f_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_xu_f_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_xu_f_v_u32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m1_mu( @@ -2884,7 +2884,7 @@ vuint32m1_t test_vfcvt_xu_f_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m2_mu( @@ -2893,7 +2893,7 @@ vuint32m1_t test_vfcvt_rtz_xu_f_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_xu_f_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_xu_f_v_u32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m2_mu( @@ -2902,7 +2902,7 @@ vuint32m2_t test_vfcvt_xu_f_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m4_mu( @@ -2911,7 +2911,7 @@ vuint32m2_t test_vfcvt_rtz_xu_f_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_xu_f_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_xu_f_v_u32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m4_mu( @@ -2920,7 +2920,7 @@ vuint32m4_t test_vfcvt_xu_f_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u32m8_mu( @@ -2929,7 +2929,7 @@ vuint32m4_t test_vfcvt_rtz_xu_f_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_xu_f_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_xu_f_v_u32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u32m8_mu( @@ -2938,7 +2938,7 @@ vuint32m8_t test_vfcvt_xu_f_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32mf2_mu( @@ -2947,7 +2947,7 @@ vuint32m8_t test_vfcvt_rtz_xu_f_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vint32mf2_t src, size_t vl) { - return vfcvt_f_x_v_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m1_mu( @@ -2956,7 +2956,7 @@ vfloat32mf2_t test_vfcvt_f_x_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_x_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vint32m1_t src, size_t vl) { - return vfcvt_f_x_v_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m2_mu( @@ -2965,7 +2965,7 @@ vfloat32m1_t test_vfcvt_f_x_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_x_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vint32m2_t src, size_t vl) { - return vfcvt_f_x_v_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m4_mu( @@ -2974,7 +2974,7 @@ vfloat32m2_t test_vfcvt_f_x_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_x_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vint32m4_t src, size_t vl) { - return vfcvt_f_x_v_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f32m8_mu( @@ -2983,7 +2983,7 @@ vfloat32m4_t test_vfcvt_f_x_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_x_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vint32m8_t src, size_t vl) { - return vfcvt_f_x_v_f32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32mf2_mu( @@ -2992,7 +2992,7 @@ vfloat32m8_t test_vfcvt_f_x_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfcvt_f_xu_v_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m1_mu( @@ -3001,7 +3001,7 @@ vfloat32mf2_t test_vfcvt_f_xu_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfcvt_f_xu_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vuint32m1_t src, size_t vl) { - return vfcvt_f_xu_v_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m2_mu( @@ -3010,7 +3010,7 @@ vfloat32m1_t test_vfcvt_f_xu_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfcvt_f_xu_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vuint32m2_t src, size_t vl) { - return vfcvt_f_xu_v_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m4_mu( @@ -3019,7 +3019,7 @@ vfloat32m2_t test_vfcvt_f_xu_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfcvt_f_xu_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vuint32m4_t src, size_t vl) { - return vfcvt_f_xu_v_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f32m8_mu( @@ -3028,7 +3028,7 @@ vfloat32m4_t test_vfcvt_f_xu_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfcvt_f_xu_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vuint32m8_t src, size_t vl) { - return vfcvt_f_xu_v_f32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m1_mu( @@ -3037,7 +3037,7 @@ vfloat32m8_t test_vfcvt_f_xu_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_x_f_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_x_f_v_i64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m1_mu( @@ -3046,7 +3046,7 @@ vint64m1_t test_vfcvt_x_f_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m2_mu( @@ -3055,7 +3055,7 @@ vint64m1_t test_vfcvt_rtz_x_f_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_x_f_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_x_f_v_i64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m2_mu( @@ -3064,7 +3064,7 @@ vint64m2_t test_vfcvt_x_f_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m4_mu( @@ -3073,7 +3073,7 @@ vint64m2_t test_vfcvt_rtz_x_f_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_x_f_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_x_f_v_i64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m4_mu( @@ -3082,7 +3082,7 @@ vint64m4_t test_vfcvt_x_f_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_x_f_v_i64m8_mu( @@ -3091,7 +3091,7 @@ vint64m4_t test_vfcvt_rtz_x_f_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_x_f_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_x_f_v_i64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_x_f_v_i64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_x_f_v_i64m8_mu( @@ -3100,7 +3100,7 @@ vint64m8_t test_vfcvt_x_f_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_x_f_v_i64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_x_f_v_i64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m1_mu( @@ -3109,7 +3109,7 @@ vint64m8_t test_vfcvt_rtz_x_f_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_xu_f_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_xu_f_v_u64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m1_mu( @@ -3118,7 +3118,7 @@ vuint64m1_t test_vfcvt_xu_f_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m2_mu( @@ -3127,7 +3127,7 @@ vuint64m1_t test_vfcvt_rtz_xu_f_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_xu_f_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_xu_f_v_u64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m2_mu( @@ -3136,7 +3136,7 @@ vuint64m2_t test_vfcvt_xu_f_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m4_mu( @@ -3145,7 +3145,7 @@ vuint64m2_t test_vfcvt_rtz_xu_f_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_xu_f_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_xu_f_v_u64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m4_mu( @@ -3154,7 +3154,7 @@ vuint64m4_t test_vfcvt_xu_f_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_xu_f_v_u64m8_mu( @@ -3163,7 +3163,7 @@ vuint64m4_t test_vfcvt_rtz_xu_f_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_xu_f_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_xu_f_v_u64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_xu_f_v_u64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_rtz_xu_f_v_u64m8_mu( @@ -3172,7 +3172,7 @@ vuint64m8_t test_vfcvt_xu_f_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfcvt_rtz_xu_f_v_u64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_rtz_xu_f_v_u64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m1_mu( @@ -3181,7 +3181,7 @@ vuint64m8_t test_vfcvt_rtz_xu_f_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_x_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vint64m1_t src, size_t vl) { - return vfcvt_f_x_v_f64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m2_mu( @@ -3190,7 +3190,7 @@ vfloat64m1_t test_vfcvt_f_x_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_x_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vint64m2_t src, size_t vl) { - return vfcvt_f_x_v_f64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m4_mu( @@ -3199,7 +3199,7 @@ vfloat64m2_t test_vfcvt_f_x_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_x_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vint64m4_t src, size_t vl) { - return vfcvt_f_x_v_f64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_x_v_f64m8_mu( @@ -3208,7 +3208,7 @@ vfloat64m4_t test_vfcvt_f_x_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_x_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vint64m8_t src, size_t vl) { - return vfcvt_f_x_v_f64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_x_v_f64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m1_mu( @@ -3217,7 +3217,7 @@ vfloat64m8_t test_vfcvt_f_x_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfcvt_f_xu_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vuint64m1_t src, size_t vl) { - return vfcvt_f_xu_v_f64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m2_mu( @@ -3226,7 +3226,7 @@ vfloat64m1_t test_vfcvt_f_xu_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfcvt_f_xu_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vuint64m2_t src, size_t vl) { - return vfcvt_f_xu_v_f64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m4_mu( @@ -3235,7 +3235,7 @@ vfloat64m2_t test_vfcvt_f_xu_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfcvt_f_xu_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vuint64m4_t src, size_t vl) { - return vfcvt_f_xu_v_f64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfcvt_f_xu_v_f64m8_mu( @@ -3244,6 +3244,6 @@ vfloat64m4_t test_vfcvt_f_xu_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfcvt_f_xu_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vuint64m8_t src, size_t vl) { - return vfcvt_f_xu_v_f64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfcvt_f_xu_v_f64m8_mu(mask, maskedoff, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfdiv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfdiv.c index 7028a15b4b441812972b57c6122e0c3fbef3c8e1..abc5fe752ca19c5c9971bc428e5cc600a3b8bbe2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfdiv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfdiv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfdiv_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfdiv_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfdiv_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfdiv_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfdiv_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfdiv_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfdiv_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfdiv_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfdiv_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfdiv_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfdiv_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfdiv_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfdiv_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfdiv_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfdiv_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfdiv_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfdiv_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfdiv_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfdiv_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfdiv_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfdiv_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfdiv_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfdiv_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfdiv_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfdiv_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfdiv_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfdiv_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfdiv_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfdiv_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfdiv_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfdiv_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfdiv_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfdiv_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfdiv_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfdiv_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfdiv_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfdiv_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfdiv_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfdiv_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfdiv_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfdiv_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfdiv_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfdiv_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfdiv_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfdiv_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfdiv_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfdiv_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfdiv_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfdiv_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfdiv_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfdiv_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfdiv_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfdiv_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfdiv_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfdiv_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfdiv_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfdiv_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfdiv_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfdiv_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfdiv_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfdiv_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfdiv_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfdiv_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfdiv_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfdiv_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfdiv_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfdiv_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfdiv_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfdiv_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfdiv_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfdiv_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfdiv_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfdiv_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfdiv_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfdiv_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfdiv_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfdiv_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfdiv_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfdiv_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfdiv_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfdiv_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfdiv_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfdiv_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfdiv_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfdiv_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfdiv_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfdiv_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfdiv_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfdiv_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfdiv_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfdiv_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfdiv_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfdiv_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfdiv_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfdiv_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfdiv_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfdiv_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfdiv_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfdiv_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfdiv_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfdiv_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfdiv_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfdiv_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfdiv_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfdiv_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfdiv_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfdiv_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfdiv_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfdiv_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfdiv_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfdiv_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfdiv_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfdiv_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfdiv_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfdiv_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfdiv_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfdiv_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfdiv_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfdiv_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfdiv_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfdiv_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfdiv_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfdiv_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfdiv_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfdiv_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfdiv_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfdiv_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfdiv_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfdiv_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfdiv_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfdiv_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfdiv_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfdiv_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfdiv_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfdiv_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfdiv_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfdiv_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfdiv_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfdiv_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfdiv_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfdiv_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfdiv_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfdiv_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfdiv_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfdiv_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfdiv_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfdiv_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfdiv_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfdiv_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfdiv_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfdiv_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfdiv_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfdiv_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfdiv_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfdiv_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfdiv_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfdiv_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfdiv_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfdiv_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfdiv_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfdiv_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfdiv_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfdiv_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfdiv_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfdiv_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfdiv_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfdiv_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfdiv_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfdiv_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfdiv_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfdiv_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfdiv_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfdiv_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfdiv_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfdiv_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfdiv_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfdiv_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfdiv_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfdiv_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfdiv_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfdiv_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfdiv_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfdiv_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfdiv_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfdiv_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfdiv_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfdiv_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfdiv_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfdiv_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfdiv_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfdiv_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfdiv_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfdiv_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfdiv_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfdiv_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfdiv_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfdiv_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfdiv_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfdiv_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmacc.c index f09b7148a1533374361900da32a1dcd794088686..f9e88ee2896b500eb906b67abeccb53913551b46 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vv_f16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmacc_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vf_f16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmacc_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vv_f16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmacc_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vf_f16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmacc_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vv_f16m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmacc_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vf_f16m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmacc_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vv_f16m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmacc_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vf_f16m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmacc_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vv_f16m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmacc_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vf_f16m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmacc_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vv_f16m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmacc_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vf_f16m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmacc_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmacc_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vf_f32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmacc_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmacc_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vf_f32m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmacc_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmacc_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vf_f32m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmacc_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmacc_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vf_f32m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmacc_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmacc_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vf_f32m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmacc_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmacc_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vf_f64m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmacc_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmacc_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vf_f64m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmacc_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmacc_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vf_f64m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmacc_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmacc_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vf_f64m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmacc_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmacc_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmacc_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmacc_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmacc_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vv_f16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmacc_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vf_f16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmacc_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vv_f16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmacc_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vf_f16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmacc_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vv_f16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmacc_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vf_f16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmacc_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vv_f16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmacc_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vf_f16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmacc_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmacc_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmacc_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmacc_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vf_f32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmacc_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmacc_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vf_f32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmacc_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmacc_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vf_f32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmacc_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmacc_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vf_f32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmacc_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmacc_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vf_f64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmacc_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmacc_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vf_f64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmacc_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmacc_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vf_f64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmacc_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfmacc_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vf_f64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfmacc_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfmacc_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfmacc_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfmacc_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfmacc_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfmacc_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfmacc_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfmacc_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfmacc_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfmacc_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfmacc_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfmacc_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfmacc_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfmacc_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfmacc_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfmacc_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfmacc_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfmacc_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfmacc_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfmacc_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfmacc_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfmacc_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfmacc_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfmacc_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfmacc_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfmacc_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfmacc_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfmacc_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfmacc_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfmacc_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfmacc_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfmacc_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmacc_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmacc_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfmacc_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfmacc_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmacc_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmacc_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfmacc_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vv_f16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfmacc_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmacc_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmacc_vf_f16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfmacc_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vv_f16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfmacc_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmacc_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmacc_vf_f16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfmacc_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vv_f16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfmacc_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmacc_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmacc_vf_f16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfmacc_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vv_f16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfmacc_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmacc_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmacc_vf_f16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfmacc_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfmacc_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmacc_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmacc_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfmacc_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfmacc_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmacc_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmacc_vf_f32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfmacc_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfmacc_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmacc_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmacc_vf_f32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfmacc_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfmacc_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmacc_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmacc_vf_f32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfmacc_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfmacc_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmacc_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmacc_vf_f32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfmacc_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfmacc_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmacc_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmacc_vf_f64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfmacc_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfmacc_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmacc_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmacc_vf_f64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfmacc_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfmacc_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmacc_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmacc_vf_f64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfmacc_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmacc_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmacc_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfmacc_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmacc_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmacc_vf_f64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmacc_vf_f64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmadd.c index 40fa6e56cc2125253f38da4a82c8ce757d66a9d2..a3194992b86603af46543f2bfa91ca5fd90bcdd2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vv_f16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmadd_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vf_f16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmadd_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vv_f16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmadd_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vf_f16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmadd_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vv_f16m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmadd_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vf_f16m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmadd_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vv_f16m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmadd_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vf_f16m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmadd_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vv_f16m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmadd_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vf_f16m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmadd_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vv_f16m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmadd_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vf_f16m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmadd_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmadd_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vf_f32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmadd_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmadd_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vf_f32m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmadd_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmadd_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vf_f32m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmadd_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmadd_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vf_f32m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmadd_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmadd_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vf_f32m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmadd_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmadd_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vf_f64m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmadd_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmadd_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vf_f64m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmadd_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmadd_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vf_f64m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmadd_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmadd_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vf_f64m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmadd_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmadd_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmadd_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmadd_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmadd_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vv_f16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmadd_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vf_f16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmadd_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vv_f16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmadd_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vf_f16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmadd_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vv_f16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmadd_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vf_f16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmadd_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vv_f16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmadd_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vf_f16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmadd_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmadd_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmadd_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmadd_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vf_f32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmadd_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmadd_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vf_f32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmadd_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmadd_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vf_f32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmadd_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmadd_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vf_f32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmadd_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmadd_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vf_f64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmadd_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmadd_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vf_f64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmadd_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmadd_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vf_f64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmadd_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfmadd_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vf_f64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfmadd_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfmadd_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfmadd_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfmadd_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfmadd_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfmadd_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfmadd_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfmadd_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfmadd_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfmadd_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfmadd_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfmadd_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfmadd_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfmadd_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfmadd_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfmadd_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfmadd_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfmadd_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfmadd_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfmadd_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfmadd_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfmadd_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfmadd_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfmadd_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfmadd_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfmadd_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfmadd_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfmadd_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfmadd_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfmadd_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfmadd_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfmadd_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmadd_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmadd_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfmadd_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfmadd_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmadd_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmadd_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfmadd_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vv_f16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfmadd_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmadd_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmadd_vf_f16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfmadd_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vv_f16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfmadd_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmadd_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmadd_vf_f16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfmadd_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vv_f16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfmadd_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmadd_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmadd_vf_f16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfmadd_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vv_f16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfmadd_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmadd_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmadd_vf_f16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfmadd_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfmadd_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmadd_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmadd_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfmadd_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfmadd_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmadd_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmadd_vf_f32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfmadd_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfmadd_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmadd_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmadd_vf_f32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfmadd_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfmadd_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmadd_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmadd_vf_f32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfmadd_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfmadd_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmadd_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmadd_vf_f32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfmadd_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfmadd_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmadd_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmadd_vf_f64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfmadd_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfmadd_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmadd_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmadd_vf_f64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfmadd_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfmadd_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmadd_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmadd_vf_f64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfmadd_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmadd_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmadd_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfmadd_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmadd_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmadd_vf_f64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmadd_vf_f64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmax.c index 9cfeaa33c4f08a6d82a8b45b394e6c2ab8596fd3..0af8a69d5256d16b5c06136431b2efaf3c6572f7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmax.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmax.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmax_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmax_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmax_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmax_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmax_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmax_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmax_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmax_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmax_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmax_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmax_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmax_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmax_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmax_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmax_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmax_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmax_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmax_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmax_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmax_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmax_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmax_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmax_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmax_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmax_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmax_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmax_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmax_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmax_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmax_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmax_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmax_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmax_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmax_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmax_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmax_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmax_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmax_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmax_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmax_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmax_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmax_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmax_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmax_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmax_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmax_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmax_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmax_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmax_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmax_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmax_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmax_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmax_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmax_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmax_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmax_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmax_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmax_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmax_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmax_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmax_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmax_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmax_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmax_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmax_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmax_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmax_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmax_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmax_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmax_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmax_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmax_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmax_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmax_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmax_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmax_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmax_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmax_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmax_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmax_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmax_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmax_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmax_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmax_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmax_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmax_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmax_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmax_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmax_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmax_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmax_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmax_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmax_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmax_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmax_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmax_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmax_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmax_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmax_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmax_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmax_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmax_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmax_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmax_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmax_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfmax_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmax_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfmax_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmax_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfmax_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfmax_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmax_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfmax_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfmax_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmax_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfmax_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfmax_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmax_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfmax_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfmax_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmax_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfmax_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfmax_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmax_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfmax_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfmax_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmax_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfmax_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmax_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfmax_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmax_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfmax_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmax_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfmax_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmax_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfmax_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmax_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfmax_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmax_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfmax_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmax_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfmax_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmax_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfmax_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmax_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfmax_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmax_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfmax_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmax_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfmax_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmax_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfmax_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmax_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfmax_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmax_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfmax_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmax_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfmax_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmax_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfmax_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmax_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfmax_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmax_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfmax_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmax_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfmax_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmax_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfmax_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmax_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfmax_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmax_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfmax_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmax_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfmax_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmax_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfmax_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmax_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfmax_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmax_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfmax_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmax_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfmax_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmax_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfmax_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmax_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmax_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfmax_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmax_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfmax_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmax_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmax_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfmax_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmax_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfmax_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmax_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmax_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfmax_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmax_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfmax_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmax_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmax_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfmax_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmax_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfmax_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmax_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmax_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfmax_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmax_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfmax_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmax_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmax_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfmax_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmax_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfmax_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmax_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmax_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfmax_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmax_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfmax_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmax_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmax_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfmax_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmax_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfmax_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmax_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmax_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfmax_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmax_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmax_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfmax_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmax_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmax_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmax_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmerge.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmerge.c index b0286fb8ab1e3c99eaa6407272c86b8d9593e123..86cbff68f30495d630a5bd905de0723d622ecdd1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmerge.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmerge.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmerge_vfm_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, vbool64_t mask, size_t vl) { - return vfmerge_vfm_f16mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmerge_vfm_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmerge_vfm_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, vbool32_t mask, size_t vl) { - return vfmerge_vfm_f16mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfmerge_vfm_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmerge_vfm_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, vbool16_t mask, size_t vl) { - return vfmerge_vfm_f16m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfmerge_vfm_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmerge_vfm_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, vbool8_t mask, size_t vl) { - return vfmerge_vfm_f16m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfmerge_vfm_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmerge_vfm_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, vbool4_t mask, size_t vl) { - return vfmerge_vfm_f16m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfmerge_vfm_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmerge_vfm_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, vbool2_t mask, size_t vl) { - return vfmerge_vfm_f16m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f16m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfmerge_vfm_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmerge_vfm_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, vbool64_t mask, size_t vl) { - return vfmerge_vfm_f32mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfmerge_vfm_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmerge_vfm_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, vbool32_t mask, size_t vl) { - return vfmerge_vfm_f32m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfmerge_vfm_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmerge_vfm_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, vbool16_t mask, size_t vl) { - return vfmerge_vfm_f32m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfmerge_vfm_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmerge_vfm_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, vbool8_t mask, size_t vl) { - return vfmerge_vfm_f32m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfmerge_vfm_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmerge_vfm_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, vbool4_t mask, size_t vl) { - return vfmerge_vfm_f32m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f32m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfmerge_vfm_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmerge_vfm_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, vbool64_t mask, size_t vl) { - return vfmerge_vfm_f64m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f64m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfmerge_vfm_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmerge_vfm_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, vbool32_t mask, size_t vl) { - return vfmerge_vfm_f64m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f64m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfmerge_vfm_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmerge_vfm_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, vbool16_t mask, size_t vl) { - return vfmerge_vfm_f64m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f64m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vfmerge_vfm_f64m8_tu( @@ -139,6 +139,6 @@ vfloat64m4_t test_vfmerge_vfm_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmerge_vfm_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, vbool8_t mask, size_t vl) { - return vfmerge_vfm_f64m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vfmerge_vfm_f64m8_tu(maskedoff, op1, op2, mask, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmin.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmin.c index 855a518770a192db7102bf6372864b5c40b3d35a..c898f0a54e9b7e4655764c44729a2250b42d821a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmin.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmin.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmin_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmin_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmin_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmin_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmin_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmin_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmin_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmin_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmin_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmin_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmin_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmin_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmin_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmin_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmin_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmin_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmin_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmin_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmin_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmin_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmin_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmin_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmin_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmin_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmin_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmin_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmin_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmin_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmin_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmin_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmin_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmin_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmin_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmin_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmin_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmin_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmin_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmin_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmin_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmin_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmin_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmin_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmin_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmin_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmin_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmin_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmin_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmin_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmin_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmin_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmin_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmin_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmin_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmin_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmin_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmin_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmin_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmin_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmin_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmin_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmin_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmin_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmin_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmin_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmin_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmin_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmin_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmin_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmin_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmin_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmin_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmin_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmin_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmin_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmin_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmin_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmin_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmin_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmin_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmin_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmin_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmin_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmin_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmin_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmin_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmin_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmin_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmin_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmin_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmin_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmin_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmin_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmin_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmin_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmin_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmin_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmin_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmin_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmin_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmin_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmin_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmin_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmin_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmin_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmin_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfmin_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmin_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfmin_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmin_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfmin_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfmin_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmin_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfmin_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfmin_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmin_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfmin_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfmin_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmin_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfmin_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfmin_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmin_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfmin_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfmin_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmin_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfmin_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfmin_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmin_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfmin_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmin_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfmin_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmin_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfmin_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmin_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfmin_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmin_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfmin_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmin_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfmin_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmin_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfmin_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmin_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfmin_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmin_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfmin_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmin_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfmin_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmin_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfmin_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmin_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfmin_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmin_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfmin_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmin_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfmin_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmin_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfmin_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmin_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfmin_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmin_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfmin_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmin_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfmin_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmin_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfmin_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmin_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfmin_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmin_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfmin_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmin_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfmin_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmin_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfmin_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmin_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfmin_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmin_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfmin_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmin_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfmin_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmin_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfmin_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmin_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfmin_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmin_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfmin_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmin_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmin_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfmin_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmin_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfmin_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmin_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmin_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfmin_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmin_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfmin_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmin_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmin_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfmin_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmin_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfmin_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmin_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmin_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfmin_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmin_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfmin_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmin_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmin_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfmin_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmin_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfmin_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmin_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmin_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfmin_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmin_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfmin_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmin_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmin_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfmin_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmin_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfmin_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmin_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmin_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfmin_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmin_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfmin_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmin_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmin_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfmin_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmin_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmin_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfmin_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmin_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmin_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmin_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsac.c index 21aae52f7cbea21350bc78c6ff9a63a2c22acc55..1597d60861ca93614c178501d4d8ea90fe87213a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vv_f16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmsac_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vf_f16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmsac_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vv_f16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmsac_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vf_f16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmsac_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vv_f16m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmsac_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vf_f16m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmsac_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vv_f16m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmsac_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vf_f16m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmsac_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vv_f16m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmsac_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vf_f16m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmsac_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vv_f16m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmsac_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vf_f16m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmsac_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmsac_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vf_f32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmsac_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmsac_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vf_f32m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmsac_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmsac_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vf_f32m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmsac_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmsac_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vf_f32m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmsac_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmsac_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vf_f32m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmsac_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmsac_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vf_f64m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmsac_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmsac_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vf_f64m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmsac_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmsac_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vf_f64m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmsac_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmsac_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vf_f64m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmsac_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmsac_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmsac_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmsac_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmsac_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vv_f16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmsac_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vf_f16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmsac_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vv_f16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmsac_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vf_f16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmsac_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vv_f16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmsac_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vf_f16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmsac_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vv_f16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmsac_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vf_f16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmsac_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmsac_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmsac_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmsac_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vf_f32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmsac_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmsac_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vf_f32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmsac_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmsac_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vf_f32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmsac_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmsac_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vf_f32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmsac_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmsac_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vf_f64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmsac_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmsac_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vf_f64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmsac_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmsac_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vf_f64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmsac_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfmsac_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vf_f64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfmsac_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfmsac_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfmsac_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfmsac_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfmsac_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfmsac_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfmsac_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfmsac_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfmsac_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfmsac_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfmsac_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfmsac_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfmsac_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfmsac_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfmsac_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfmsac_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfmsac_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfmsac_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfmsac_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfmsac_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfmsac_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfmsac_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfmsac_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfmsac_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfmsac_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfmsac_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfmsac_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfmsac_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfmsac_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfmsac_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfmsac_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfmsac_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsac_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsac_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfmsac_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfmsac_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsac_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsac_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfmsac_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vv_f16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfmsac_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsac_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsac_vf_f16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfmsac_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vv_f16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfmsac_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsac_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsac_vf_f16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfmsac_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vv_f16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfmsac_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsac_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsac_vf_f16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfmsac_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vv_f16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfmsac_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsac_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsac_vf_f16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfmsac_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfmsac_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsac_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsac_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfmsac_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfmsac_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsac_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsac_vf_f32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfmsac_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfmsac_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsac_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsac_vf_f32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfmsac_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfmsac_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsac_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsac_vf_f32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfmsac_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfmsac_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsac_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsac_vf_f32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfmsac_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfmsac_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsac_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsac_vf_f64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfmsac_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfmsac_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsac_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsac_vf_f64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfmsac_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfmsac_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsac_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsac_vf_f64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfmsac_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsac_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsac_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfmsac_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsac_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsac_vf_f64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsac_vf_f64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsub.c index c3fe807de68752ffe4958fbb506473f1856ce43b..9ea7476be2569d9567b00065666809af8b3d86e6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vv_f16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmsub_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vf_f16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmsub_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vv_f16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmsub_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vf_f16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmsub_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vv_f16m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmsub_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vf_f16m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmsub_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vv_f16m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmsub_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vf_f16m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmsub_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vv_f16m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmsub_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vf_f16m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmsub_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vv_f16m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmsub_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vf_f16m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmsub_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmsub_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vf_f32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmsub_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmsub_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vf_f32m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmsub_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmsub_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vf_f32m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmsub_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmsub_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vf_f32m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmsub_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmsub_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vf_f32m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmsub_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmsub_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vf_f64m1_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmsub_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmsub_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vf_f64m2_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmsub_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmsub_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vf_f64m4_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmsub_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmsub_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vf_f64m8_tu(vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmsub_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmsub_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmsub_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmsub_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmsub_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vv_f16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmsub_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vf_f16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmsub_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vv_f16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmsub_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vf_f16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmsub_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vv_f16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmsub_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vf_f16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmsub_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vv_f16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmsub_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vf_f16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmsub_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmsub_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmsub_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vf_f32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmsub_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vf_f32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmsub_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vf_f32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmsub_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vf_f32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmsub_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vf_f64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmsub_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vf_f64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmsub_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vf_f64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfmsub_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vf_f64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfmsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfmsub_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfmsub_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfmsub_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfmsub_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfmsub_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfmsub_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfmsub_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfmsub_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfmsub_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfmsub_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfmsub_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfmsub_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfmsub_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfmsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfmsub_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfmsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfmsub_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfmsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfmsub_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfmsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfmsub_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfmsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfmsub_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfmsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfmsub_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfmsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfmsub_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfmsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfmsub_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfmsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfmsub_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmsub_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfmsub_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfmsub_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfmsub_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmsub_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfmsub_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfmsub_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vv_f16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfmsub_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmsub_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfmsub_vf_f16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfmsub_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vv_f16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfmsub_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmsub_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfmsub_vf_f16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfmsub_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vv_f16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfmsub_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmsub_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfmsub_vf_f16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfmsub_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vv_f16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfmsub_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmsub_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfmsub_vf_f16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfmsub_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfmsub_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfmsub_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfmsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfmsub_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfmsub_vf_f32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfmsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfmsub_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfmsub_vf_f32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfmsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfmsub_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfmsub_vf_f32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfmsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfmsub_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfmsub_vf_f32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfmsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfmsub_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfmsub_vf_f64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfmsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfmsub_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfmsub_vf_f64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfmsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfmsub_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfmsub_vf_f64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfmsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfmsub_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfmsub_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfmsub_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmsub_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfmsub_vf_f64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfmsub_vf_f64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmul.c index f51ff89901786a403d8827e9ac11929b03ea2318..b9c6bddc1b08a37e6c25c92dd372d8e9146bbac5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmul.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmul_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmul_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfmul_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmul_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfmul_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfmul_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmul_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfmul_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfmul_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmul_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfmul_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfmul_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmul_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfmul_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfmul_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmul_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfmul_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfmul_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmul_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfmul_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmul_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfmul_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmul_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfmul_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmul_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfmul_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmul_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfmul_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmul_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfmul_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmul_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfmul_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmul_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfmul_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmul_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfmul_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmul_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfmul_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmul_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfmul_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmul_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfmul_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmul_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfmul_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmul_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfmul_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmul_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfmul_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmul_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfmul_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmul_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfmul_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmul_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfmul_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmul_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfmul_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfmul_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmul_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfmul_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfmul_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmul_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfmul_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfmul_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmul_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfmul_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfmul_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmul_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfmul_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfmul_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmul_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfmul_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfmul_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmul_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfmul_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmul_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfmul_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmul_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfmul_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmul_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfmul_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmul_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfmul_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmul_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfmul_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmul_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfmul_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmul_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfmul_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmul_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfmul_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmul_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfmul_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmul_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfmul_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmul_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfmul_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmul_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfmul_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmul_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfmul_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmul_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfmul_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmul_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfmul_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmul_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfmul_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmul_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfmul_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmul_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfmul_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfmul_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmul_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfmul_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfmul_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmul_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfmul_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfmul_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmul_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfmul_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfmul_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmul_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfmul_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfmul_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmul_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfmul_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfmul_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmul_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfmul_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmul_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfmul_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmul_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfmul_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmul_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfmul_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmul_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfmul_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmul_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfmul_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmul_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfmul_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmul_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfmul_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmul_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfmul_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmul_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfmul_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmul_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfmul_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmul_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfmul_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmul_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfmul_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmul_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfmul_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmul_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfmul_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmul_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfmul_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmul_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfmul_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmul_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfmul_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfmul_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfmul_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmul_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfmul_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfmul_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfmul_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmul_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfmul_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfmul_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfmul_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmul_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfmul_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfmul_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfmul_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmul_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfmul_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfmul_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfmul_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmul_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfmul_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfmul_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfmul_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmul_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfmul_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfmul_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfmul_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfmul_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmul_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfmul_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfmul_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfmul_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfmul_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmul_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfmul_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfmul_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfmul_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfmul_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmul_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfmul_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfmul_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfmul_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfmul_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmul_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfmul_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfmul_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfmul_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfmul_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmul_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfmul_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfmul_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfmul_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfmul_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmul_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfmul_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfmul_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfmul_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfmul_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmul_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfmul_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfmul_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfmul_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfmul_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmul_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfmul_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfmul_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfmul_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfmul_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfmul_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmul_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfmul_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfmul_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmv.c index ac7cf14592f337a926b299a0579b2bfec1d20499..97839bea00aa404dd01a396e3098f7158f004bba 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfmv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmv_v_f_f16mf4_tu(vfloat16mf4_t maskedoff, _Float16 src, size_t vl) { - return vfmv_v_f_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfmv_v_f_f16mf4_tu(vfloat16mf4_t maskedoff, _Float16 src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmv_v_f_f16mf2_tu(vfloat16mf2_t maskedoff, _Float16 src, size_t vl) { - return vfmv_v_f_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfmv_v_f_f16mf2_tu(vfloat16mf2_t maskedoff, _Float16 src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmv_v_f_f16m1_tu(vfloat16m1_t maskedoff, _Float16 src, size_t vl) { - return vfmv_v_f_f16m1_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfmv_v_f_f16m1_tu(vfloat16m1_t maskedoff, _Float16 src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmv_v_f_f16m2_tu(vfloat16m2_t maskedoff, _Float16 src, size_t vl) { - return vfmv_v_f_f16m2_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfmv_v_f_f16m2_tu(vfloat16m2_t maskedoff, _Float16 src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmv_v_f_f16m4_tu(vfloat16m4_t maskedoff, _Float16 src, size_t vl) { - return vfmv_v_f_f16m4_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfmv_v_f_f16m4_tu(vfloat16m4_t maskedoff, _Float16 src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmv_v_f_f16m8_tu(vfloat16m8_t maskedoff, _Float16 src, size_t vl) { - return vfmv_v_f_f16m8_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfmv_v_f_f16m8_tu(vfloat16m8_t maskedoff, _Float16 src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmv_v_f_f32mf2_tu(vfloat32mf2_t maskedoff, float src, size_t vl) { - return vfmv_v_f_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfmv_v_f_f32mf2_tu(vfloat32mf2_t maskedoff, float src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmv_v_f_f32m1_tu(vfloat32m1_t maskedoff, float src, size_t vl) { - return vfmv_v_f_f32m1_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfmv_v_f_f32m1_tu(vfloat32m1_t maskedoff, float src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmv_v_f_f32m2_tu(vfloat32m2_t maskedoff, float src, size_t vl) { - return vfmv_v_f_f32m2_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfmv_v_f_f32m2_tu(vfloat32m2_t maskedoff, float src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmv_v_f_f32m4_tu(vfloat32m4_t maskedoff, float src, size_t vl) { - return vfmv_v_f_f32m4_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfmv_v_f_f32m4_tu(vfloat32m4_t maskedoff, float src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmv_v_f_f32m8_tu(vfloat32m8_t maskedoff, float src, size_t vl) { - return vfmv_v_f_f32m8_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfmv_v_f_f32m8_tu(vfloat32m8_t maskedoff, float src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmv_v_f_f64m1_tu(vfloat64m1_t maskedoff, double src, size_t vl) { - return vfmv_v_f_f64m1_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfmv_v_f_f64m1_tu(vfloat64m1_t maskedoff, double src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmv_v_f_f64m2_tu(vfloat64m2_t maskedoff, double src, size_t vl) { - return vfmv_v_f_f64m2_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfmv_v_f_f64m2_tu(vfloat64m2_t maskedoff, double src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmv_v_f_f64m4_tu(vfloat64m4_t maskedoff, double src, size_t vl) { - return vfmv_v_f_f64m4_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_v_f_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfmv_v_f_f64m4_tu(vfloat64m4_t maskedoff, double src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmv_v_f_f64m8_tu(vfloat64m8_t maskedoff, double src, size_t vl) { - return vfmv_v_f_f64m8_tu(maskedoff, src, vl); + return __riscv_vfmv_v_f_f64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16mf4_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfmv_v_f_f64m8_tu(vfloat64m8_t maskedoff, double src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfmv_s_f_f16mf4_tu(vfloat16mf4_t maskedoff, _Float16 src, size_t vl) { - return vfmv_s_f_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16mf2_tu( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfmv_s_f_f16mf4_tu(vfloat16mf4_t maskedoff, _Float16 src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfmv_s_f_f16mf2_tu(vfloat16mf2_t maskedoff, _Float16 src, size_t vl) { - return vfmv_s_f_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16m1_tu( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfmv_s_f_f16mf2_tu(vfloat16mf2_t maskedoff, _Float16 src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfmv_s_f_f16m1_tu(vfloat16m1_t maskedoff, _Float16 src, size_t vl) { - return vfmv_s_f_f16m1_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16m2_tu( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfmv_s_f_f16m1_tu(vfloat16m1_t maskedoff, _Float16 src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfmv_s_f_f16m2_tu(vfloat16m2_t maskedoff, _Float16 src, size_t vl) { - return vfmv_s_f_f16m2_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16m4_tu( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfmv_s_f_f16m2_tu(vfloat16m2_t maskedoff, _Float16 src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfmv_s_f_f16m4_tu(vfloat16m4_t maskedoff, _Float16 src, size_t vl) { - return vfmv_s_f_f16m4_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f16m8_tu( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfmv_s_f_f16m4_tu(vfloat16m4_t maskedoff, _Float16 src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfmv_s_f_f16m8_tu(vfloat16m8_t maskedoff, _Float16 src, size_t vl) { - return vfmv_s_f_f16m8_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32mf2_tu( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfmv_s_f_f16m8_tu(vfloat16m8_t maskedoff, _Float16 src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfmv_s_f_f32mf2_tu(vfloat32mf2_t maskedoff, float src, size_t vl) { - return vfmv_s_f_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32m1_tu( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfmv_s_f_f32mf2_tu(vfloat32mf2_t maskedoff, float src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfmv_s_f_f32m1_tu(vfloat32m1_t maskedoff, float src, size_t vl) { - return vfmv_s_f_f32m1_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32m2_tu( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfmv_s_f_f32m1_tu(vfloat32m1_t maskedoff, float src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfmv_s_f_f32m2_tu(vfloat32m2_t maskedoff, float src, size_t vl) { - return vfmv_s_f_f32m2_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32m4_tu( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfmv_s_f_f32m2_tu(vfloat32m2_t maskedoff, float src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfmv_s_f_f32m4_tu(vfloat32m4_t maskedoff, float src, size_t vl) { - return vfmv_s_f_f32m4_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f32m8_tu( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfmv_s_f_f32m4_tu(vfloat32m4_t maskedoff, float src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfmv_s_f_f32m8_tu(vfloat32m8_t maskedoff, float src, size_t vl) { - return vfmv_s_f_f32m8_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f64m1_tu( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfmv_s_f_f32m8_tu(vfloat32m8_t maskedoff, float src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfmv_s_f_f64m1_tu(vfloat64m1_t maskedoff, double src, size_t vl) { - return vfmv_s_f_f64m1_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f64m2_tu( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfmv_s_f_f64m1_tu(vfloat64m1_t maskedoff, double src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfmv_s_f_f64m2_tu(vfloat64m2_t maskedoff, double src, size_t vl) { - return vfmv_s_f_f64m2_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f64m4_tu( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfmv_s_f_f64m2_tu(vfloat64m2_t maskedoff, double src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfmv_s_f_f64m4_tu(vfloat64m4_t maskedoff, double src, size_t vl) { - return vfmv_s_f_f64m4_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfmv_s_f_f64m8_tu( @@ -274,6 +274,6 @@ vfloat64m4_t test_vfmv_s_f_f64m4_tu(vfloat64m4_t maskedoff, double src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfmv_s_f_f64m8_tu(vfloat64m8_t maskedoff, double src, size_t vl) { - return vfmv_s_f_f64m8_tu(maskedoff, src, vl); + return __riscv_vfmv_s_f_f64m8_tu(maskedoff, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvt.c index 7be371615e4af4ceaf2df96581d7d30054981955..598b907b1bc6f01264706a4f2b031338a9c0f1cf 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_x_f_w_i8mf8_tu(vint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_x_f_w_i8mf8_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf8_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vfncvt_x_f_w_i8mf8_tu(vint8mf8_t maskedoff, vfloat16mf4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_tu(vint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf8_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf4_tu( @@ -31,7 +31,7 @@ vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_tu(vint8mf8_t maskedoff, vfloat16mf4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_x_f_w_i8mf4_tu(vint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_x_f_w_i8mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf4_tu( @@ -40,7 +40,7 @@ vint8mf4_t test_vfncvt_x_f_w_i8mf4_tu(vint8mf4_t maskedoff, vfloat16mf2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_tu(vint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf2_tu( @@ -49,7 +49,7 @@ vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_tu(vint8mf4_t maskedoff, vfloat16mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_x_f_w_i8mf2_tu(vint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_x_f_w_i8mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf2_tu( @@ -58,7 +58,7 @@ vint8mf2_t test_vfncvt_x_f_w_i8mf2_tu(vint8mf2_t maskedoff, vfloat16m1_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_tu(vint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m1_tu( @@ -67,7 +67,7 @@ vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_tu(vint8mf2_t maskedoff, vfloat16m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_x_f_w_i8m1_tu(vint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_x_f_w_i8m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m1_tu( @@ -76,7 +76,7 @@ vint8m1_t test_vfncvt_x_f_w_i8m1_tu(vint8m1_t maskedoff, vfloat16m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_tu(vint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m2_tu( @@ -85,7 +85,7 @@ vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_tu(vint8m1_t maskedoff, vfloat16m2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_x_f_w_i8m2_tu(vint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_x_f_w_i8m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m2_tu( @@ -94,7 +94,7 @@ vint8m2_t test_vfncvt_x_f_w_i8m2_tu(vint8m2_t maskedoff, vfloat16m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_tu(vint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m4_tu( @@ -103,7 +103,7 @@ vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_tu(vint8m2_t maskedoff, vfloat16m4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_x_f_w_i8m4_tu(vint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_x_f_w_i8m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m4_tu( @@ -112,7 +112,7 @@ vint8m4_t test_vfncvt_x_f_w_i8m4_tu(vint8m4_t maskedoff, vfloat16m8_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_tu(vint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf8_tu( @@ -121,7 +121,7 @@ vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_tu(vint8m4_t maskedoff, vfloat16m8_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_tu(vuint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf8_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf8_tu( @@ -130,7 +130,7 @@ vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_tu(vuint8mf8_t maskedoff, vfloat16mf4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_tu(vuint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf8_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf4_tu( @@ -139,7 +139,7 @@ vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_tu(vuint8mf8_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_tu(vuint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf4_tu( @@ -148,7 +148,7 @@ vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_tu(vuint8mf4_t maskedoff, vfloat16mf2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_tu(vuint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf2_tu( @@ -157,7 +157,7 @@ vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_tu(vuint8mf4_t maskedoff, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_tu(vuint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf2_tu( @@ -166,7 +166,7 @@ vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_tu(vuint8mf2_t maskedoff, vfloat16m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_tu(vuint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m1_tu( @@ -175,7 +175,7 @@ vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_tu(vuint8mf2_t maskedoff, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_xu_f_w_u8m1_tu(vuint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_xu_f_w_u8m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m1_tu( @@ -184,7 +184,7 @@ vuint8m1_t test_vfncvt_xu_f_w_u8m1_tu(vuint8m1_t maskedoff, vfloat16m2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_tu(vuint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m2_tu( @@ -193,7 +193,7 @@ vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_tu(vuint8m1_t maskedoff, vfloat16m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_xu_f_w_u8m2_tu(vuint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_xu_f_w_u8m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m2_tu( @@ -202,7 +202,7 @@ vuint8m2_t test_vfncvt_xu_f_w_u8m2_tu(vuint8m2_t maskedoff, vfloat16m4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_tu(vuint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m4_tu( @@ -211,7 +211,7 @@ vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_tu(vuint8m2_t maskedoff, vfloat16m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_xu_f_w_u8m4_tu(vuint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_xu_f_w_u8m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m4_tu( @@ -220,7 +220,7 @@ vuint8m4_t test_vfncvt_xu_f_w_u8m4_tu(vuint8m4_t maskedoff, vfloat16m8_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_tu(vuint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf4_tu( @@ -229,7 +229,7 @@ vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_tu(vuint8m4_t maskedoff, vfloat16m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_x_f_w_i16mf4_tu(vint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_x_f_w_i16mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf4_tu( @@ -238,7 +238,7 @@ vint16mf4_t test_vfncvt_x_f_w_i16mf4_tu(vint16mf4_t maskedoff, vfloat32mf2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_tu(vint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf2_tu( @@ -247,7 +247,7 @@ vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_tu(vint16mf4_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_x_f_w_i16mf2_tu(vint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_x_f_w_i16mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf2_tu( @@ -256,7 +256,7 @@ vint16mf2_t test_vfncvt_x_f_w_i16mf2_tu(vint16mf2_t maskedoff, vfloat32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_tu(vint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m1_tu( @@ -265,7 +265,7 @@ vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_tu(vint16mf2_t maskedoff, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_x_f_w_i16m1_tu(vint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_x_f_w_i16m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m1_tu( @@ -274,7 +274,7 @@ vint16m1_t test_vfncvt_x_f_w_i16m1_tu(vint16m1_t maskedoff, vfloat32m2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_tu(vint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m2_tu( @@ -283,7 +283,7 @@ vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_tu(vint16m1_t maskedoff, vfloat32m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_x_f_w_i16m2_tu(vint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_x_f_w_i16m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m2_tu( @@ -292,7 +292,7 @@ vint16m2_t test_vfncvt_x_f_w_i16m2_tu(vint16m2_t maskedoff, vfloat32m4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_tu(vint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m4_tu( @@ -301,7 +301,7 @@ vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_tu(vint16m2_t maskedoff, vfloat32m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_x_f_w_i16m4_tu(vint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_x_f_w_i16m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m4_tu( @@ -310,7 +310,7 @@ vint16m4_t test_vfncvt_x_f_w_i16m4_tu(vint16m4_t maskedoff, vfloat32m8_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_tu(vint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf4_tu( @@ -319,7 +319,7 @@ vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_tu(vint16m4_t maskedoff, vfloat32m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_tu(vuint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf4_tu( @@ -328,7 +328,7 @@ vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_tu(vuint16mf4_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_tu(vuint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf2_tu( @@ -337,7 +337,7 @@ vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_tu(vuint16mf4_t maskedoff, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_tu(vuint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf2_tu( @@ -346,7 +346,7 @@ vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_tu(vuint16mf2_t maskedoff, vfloat32m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_tu(vuint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m1_tu( @@ -355,7 +355,7 @@ vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_tu(vuint16mf2_t maskedoff, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_xu_f_w_u16m1_tu(vuint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_xu_f_w_u16m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m1_tu( @@ -364,7 +364,7 @@ vuint16m1_t test_vfncvt_xu_f_w_u16m1_tu(vuint16m1_t maskedoff, vfloat32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_tu(vuint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m2_tu( @@ -373,7 +373,7 @@ vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_tu(vuint16m1_t maskedoff, vfloat32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_xu_f_w_u16m2_tu(vuint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_xu_f_w_u16m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m2_tu( @@ -382,7 +382,7 @@ vuint16m2_t test_vfncvt_xu_f_w_u16m2_tu(vuint16m2_t maskedoff, vfloat32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_tu(vuint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m4_tu( @@ -391,7 +391,7 @@ vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_tu(vuint16m2_t maskedoff, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_xu_f_w_u16m4_tu(vuint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_xu_f_w_u16m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m4_tu( @@ -400,7 +400,7 @@ vuint16m4_t test_vfncvt_xu_f_w_u16m4_tu(vuint16m4_t maskedoff, vfloat32m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_tu(vuint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf4_tu( @@ -409,7 +409,7 @@ vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_tu(vuint16m4_t maskedoff, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_tu(vfloat16mf4_t maskedoff, vint32mf2_t src, size_t vl) { - return vfncvt_f_x_w_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf2_tu( @@ -418,7 +418,7 @@ vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_tu(vfloat16mf4_t maskedoff, vint32mf2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_tu(vfloat16mf2_t maskedoff, vint32m1_t src, size_t vl) { - return vfncvt_f_x_w_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m1_tu( @@ -427,7 +427,7 @@ vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_tu(vfloat16mf2_t maskedoff, vint32m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_x_w_f16m1_tu(vfloat16m1_t maskedoff, vint32m2_t src, size_t vl) { - return vfncvt_f_x_w_f16m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m2_tu( @@ -436,7 +436,7 @@ vfloat16m1_t test_vfncvt_f_x_w_f16m1_tu(vfloat16m1_t maskedoff, vint32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_x_w_f16m2_tu(vfloat16m2_t maskedoff, vint32m4_t src, size_t vl) { - return vfncvt_f_x_w_f16m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m4_tu( @@ -445,7 +445,7 @@ vfloat16m2_t test_vfncvt_f_x_w_f16m2_tu(vfloat16m2_t maskedoff, vint32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_x_w_f16m4_tu(vfloat16m4_t maskedoff, vint32m8_t src, size_t vl) { - return vfncvt_f_x_w_f16m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf4_tu( @@ -454,7 +454,7 @@ vfloat16m4_t test_vfncvt_f_x_w_f16m4_tu(vfloat16m4_t maskedoff, vint32m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_tu(vfloat16mf4_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf2_tu( @@ -463,7 +463,7 @@ vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_tu(vfloat16mf4_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_tu(vfloat16mf2_t maskedoff, vuint32m1_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m1_tu( @@ -472,7 +472,7 @@ vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_tu(vfloat16mf2_t maskedoff, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_xu_w_f16m1_tu(vfloat16m1_t maskedoff, vuint32m2_t src, size_t vl) { - return vfncvt_f_xu_w_f16m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m2_tu( @@ -481,7 +481,7 @@ vfloat16m1_t test_vfncvt_f_xu_w_f16m1_tu(vfloat16m1_t maskedoff, vuint32m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_xu_w_f16m2_tu(vfloat16m2_t maskedoff, vuint32m4_t src, size_t vl) { - return vfncvt_f_xu_w_f16m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m4_tu( @@ -490,7 +490,7 @@ vfloat16m2_t test_vfncvt_f_xu_w_f16m2_tu(vfloat16m2_t maskedoff, vuint32m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_xu_w_f16m4_tu(vfloat16m4_t maskedoff, vuint32m8_t src, size_t vl) { - return vfncvt_f_xu_w_f16m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf4_tu( @@ -499,7 +499,7 @@ vfloat16m4_t test_vfncvt_f_xu_w_f16m4_tu(vfloat16m4_t maskedoff, vuint32m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_f_f_w_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf4_tu( @@ -508,7 +508,7 @@ vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf2_tu( @@ -517,7 +517,7 @@ vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_f_f_w_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf2_tu( @@ -526,7 +526,7 @@ vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m1_tu( @@ -535,7 +535,7 @@ vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_f_w_f16m1_tu(vfloat16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_f_f_w_f16m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m1_tu( @@ -544,7 +544,7 @@ vfloat16m1_t test_vfncvt_f_f_w_f16m1_tu(vfloat16m1_t maskedoff, vfloat32m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tu(vfloat16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m2_tu( @@ -553,7 +553,7 @@ vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tu(vfloat16m1_t maskedoff, vfloat32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_f_w_f16m2_tu(vfloat16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_f_f_w_f16m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m2_tu( @@ -562,7 +562,7 @@ vfloat16m2_t test_vfncvt_f_f_w_f16m2_tu(vfloat16m2_t maskedoff, vfloat32m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tu(vfloat16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m4_tu( @@ -571,7 +571,7 @@ vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tu(vfloat16m2_t maskedoff, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_f_w_f16m4_tu(vfloat16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_f_f_w_f16m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m4_tu( @@ -580,7 +580,7 @@ vfloat16m4_t test_vfncvt_f_f_w_f16m4_tu(vfloat16m4_t maskedoff, vfloat32m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tu(vfloat16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32mf2_tu( @@ -589,7 +589,7 @@ vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tu(vfloat16m4_t maskedoff, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_x_f_w_i32mf2_tu(vint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_x_f_w_i32mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32mf2_tu( @@ -598,7 +598,7 @@ vint32mf2_t test_vfncvt_x_f_w_i32mf2_tu(vint32mf2_t maskedoff, vfloat64m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_tu(vint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m1_tu( @@ -607,7 +607,7 @@ vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_tu(vint32mf2_t maskedoff, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_x_f_w_i32m1_tu(vint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_x_f_w_i32m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m1_tu( @@ -616,7 +616,7 @@ vint32m1_t test_vfncvt_x_f_w_i32m1_tu(vint32m1_t maskedoff, vfloat64m2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_tu(vint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m2_tu( @@ -625,7 +625,7 @@ vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_tu(vint32m1_t maskedoff, vfloat64m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_x_f_w_i32m2_tu(vint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_x_f_w_i32m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m2_tu( @@ -634,7 +634,7 @@ vint32m2_t test_vfncvt_x_f_w_i32m2_tu(vint32m2_t maskedoff, vfloat64m4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_tu(vint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m4_tu( @@ -643,7 +643,7 @@ vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_tu(vint32m2_t maskedoff, vfloat64m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_x_f_w_i32m4_tu(vint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_x_f_w_i32m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m4_tu( @@ -652,7 +652,7 @@ vint32m4_t test_vfncvt_x_f_w_i32m4_tu(vint32m4_t maskedoff, vfloat64m8_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_tu(vint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32mf2_tu( @@ -661,7 +661,7 @@ vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_tu(vint32m4_t maskedoff, vfloat64m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_tu(vuint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_xu_f_w_u32mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32mf2_tu( @@ -670,7 +670,7 @@ vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_tu(vuint32mf2_t maskedoff, vfloat64m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_tu(vuint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m1_tu( @@ -679,7 +679,7 @@ vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_tu(vuint32mf2_t maskedoff, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_xu_f_w_u32m1_tu(vuint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_xu_f_w_u32m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m1_tu( @@ -688,7 +688,7 @@ vuint32m1_t test_vfncvt_xu_f_w_u32m1_tu(vuint32m1_t maskedoff, vfloat64m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_tu(vuint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m2_tu( @@ -697,7 +697,7 @@ vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_tu(vuint32m1_t maskedoff, vfloat64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_xu_f_w_u32m2_tu(vuint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_xu_f_w_u32m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m2_tu( @@ -706,7 +706,7 @@ vuint32m2_t test_vfncvt_xu_f_w_u32m2_tu(vuint32m2_t maskedoff, vfloat64m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_tu(vuint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m4_tu( @@ -715,7 +715,7 @@ vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_tu(vuint32m2_t maskedoff, vfloat64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_xu_f_w_u32m4_tu(vuint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_xu_f_w_u32m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m4_tu( @@ -724,7 +724,7 @@ vuint32m4_t test_vfncvt_xu_f_w_u32m4_tu(vuint32m4_t maskedoff, vfloat64m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_tu(vuint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32mf2_tu( @@ -733,7 +733,7 @@ vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_tu(vuint32m4_t maskedoff, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_tu(vfloat32mf2_t maskedoff, vint64m1_t src, size_t vl) { - return vfncvt_f_x_w_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m1_tu( @@ -742,7 +742,7 @@ vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_tu(vfloat32mf2_t maskedoff, vint64m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_x_w_f32m1_tu(vfloat32m1_t maskedoff, vint64m2_t src, size_t vl) { - return vfncvt_f_x_w_f32m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m2_tu( @@ -751,7 +751,7 @@ vfloat32m1_t test_vfncvt_f_x_w_f32m1_tu(vfloat32m1_t maskedoff, vint64m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_x_w_f32m2_tu(vfloat32m2_t maskedoff, vint64m4_t src, size_t vl) { - return vfncvt_f_x_w_f32m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m4_tu( @@ -760,7 +760,7 @@ vfloat32m2_t test_vfncvt_f_x_w_f32m2_tu(vfloat32m2_t maskedoff, vint64m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_x_w_f32m4_tu(vfloat32m4_t maskedoff, vint64m8_t src, size_t vl) { - return vfncvt_f_x_w_f32m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32mf2_tu( @@ -769,7 +769,7 @@ vfloat32m4_t test_vfncvt_f_x_w_f32m4_tu(vfloat32m4_t maskedoff, vint64m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_tu(vfloat32mf2_t maskedoff, vuint64m1_t src, size_t vl) { - return vfncvt_f_xu_w_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m1_tu( @@ -778,7 +778,7 @@ vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_tu(vfloat32mf2_t maskedoff, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_xu_w_f32m1_tu(vfloat32m1_t maskedoff, vuint64m2_t src, size_t vl) { - return vfncvt_f_xu_w_f32m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m2_tu( @@ -787,7 +787,7 @@ vfloat32m1_t test_vfncvt_f_xu_w_f32m1_tu(vfloat32m1_t maskedoff, vuint64m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_xu_w_f32m2_tu(vfloat32m2_t maskedoff, vuint64m4_t src, size_t vl) { - return vfncvt_f_xu_w_f32m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m4_tu( @@ -796,7 +796,7 @@ vfloat32m2_t test_vfncvt_f_xu_w_f32m2_tu(vfloat32m2_t maskedoff, vuint64m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_xu_w_f32m4_tu(vfloat32m4_t maskedoff, vuint64m8_t src, size_t vl) { - return vfncvt_f_xu_w_f32m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32mf2_tu( @@ -805,7 +805,7 @@ vfloat32m4_t test_vfncvt_f_xu_w_f32m4_tu(vfloat32m4_t maskedoff, vuint64m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_f_f_w_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32mf2_tu( @@ -814,7 +814,7 @@ vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m1_tu( @@ -823,7 +823,7 @@ vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_f_w_f32m1_tu(vfloat32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_f_f_w_f32m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m1_tu( @@ -832,7 +832,7 @@ vfloat32m1_t test_vfncvt_f_f_w_f32m1_tu(vfloat32m1_t maskedoff, vfloat64m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_tu(vfloat32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m1_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m2_tu( @@ -841,7 +841,7 @@ vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_tu(vfloat32m1_t maskedoff, vfloat64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_f_w_f32m2_tu(vfloat32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_f_f_w_f32m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m2_tu( @@ -850,7 +850,7 @@ vfloat32m2_t test_vfncvt_f_f_w_f32m2_tu(vfloat32m2_t maskedoff, vfloat64m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_tu(vfloat32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m2_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m4_tu( @@ -859,7 +859,7 @@ vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_tu(vfloat32m2_t maskedoff, vfloat64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_f_w_f32m4_tu(vfloat32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_f_f_w_f32m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m4_tu( @@ -868,7 +868,7 @@ vfloat32m4_t test_vfncvt_f_f_w_f32m4_tu(vfloat32m4_t maskedoff, vfloat64m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4_tu(vfloat32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m4_tu(maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf8_tum( @@ -877,7 +877,7 @@ vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4_tu(vfloat32m4_t maskedoff, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_x_f_w_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_x_f_w_i8mf8_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf8_tum( @@ -886,7 +886,7 @@ vint8mf8_t test_vfncvt_x_f_w_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf8_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf4_tum( @@ -895,7 +895,7 @@ vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_x_f_w_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_x_f_w_i8mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf4_tum( @@ -904,7 +904,7 @@ vint8mf4_t test_vfncvt_x_f_w_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf2_tum( @@ -913,7 +913,7 @@ vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_x_f_w_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_x_f_w_i8mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf2_tum( @@ -922,7 +922,7 @@ vint8mf2_t test_vfncvt_x_f_w_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m1_tum( @@ -931,7 +931,7 @@ vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_x_f_w_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_x_f_w_i8m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m1_tum( @@ -940,7 +940,7 @@ vint8m1_t test_vfncvt_x_f_w_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m2_tum( @@ -949,7 +949,7 @@ vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_x_f_w_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_x_f_w_i8m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m2_tum( @@ -958,7 +958,7 @@ vint8m2_t test_vfncvt_x_f_w_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m4_tum( @@ -967,7 +967,7 @@ vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_x_f_w_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_x_f_w_i8m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m4_tum( @@ -976,7 +976,7 @@ vint8m4_t test_vfncvt_x_f_w_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf8_tum( @@ -985,7 +985,7 @@ vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf8_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf8_tum( @@ -994,7 +994,7 @@ vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf8_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf4_tum( @@ -1003,7 +1003,7 @@ vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf4_tum( @@ -1012,7 +1012,7 @@ vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf2_tum( @@ -1021,7 +1021,7 @@ vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf2_tum( @@ -1030,7 +1030,7 @@ vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m1_tum( @@ -1039,7 +1039,7 @@ vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_xu_f_w_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_xu_f_w_u8m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m1_tum( @@ -1048,7 +1048,7 @@ vuint8m1_t test_vfncvt_xu_f_w_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m2_tum( @@ -1057,7 +1057,7 @@ vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_xu_f_w_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_xu_f_w_u8m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m2_tum( @@ -1066,7 +1066,7 @@ vuint8m2_t test_vfncvt_xu_f_w_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m4_tum( @@ -1075,7 +1075,7 @@ vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_xu_f_w_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_xu_f_w_u8m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m4_tum( @@ -1084,7 +1084,7 @@ vuint8m4_t test_vfncvt_xu_f_w_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf4_tum( @@ -1093,7 +1093,7 @@ vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_x_f_w_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_x_f_w_i16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf4_tum( @@ -1102,7 +1102,7 @@ vint16mf4_t test_vfncvt_x_f_w_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf2_tum( @@ -1111,7 +1111,7 @@ vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_x_f_w_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_x_f_w_i16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf2_tum( @@ -1120,7 +1120,7 @@ vint16mf2_t test_vfncvt_x_f_w_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m1_tum( @@ -1129,7 +1129,7 @@ vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_x_f_w_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_x_f_w_i16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m1_tum( @@ -1138,7 +1138,7 @@ vint16m1_t test_vfncvt_x_f_w_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m2_tum( @@ -1147,7 +1147,7 @@ vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_x_f_w_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_x_f_w_i16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m2_tum( @@ -1156,7 +1156,7 @@ vint16m2_t test_vfncvt_x_f_w_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m4_tum( @@ -1165,7 +1165,7 @@ vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_x_f_w_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_x_f_w_i16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m4_tum( @@ -1174,7 +1174,7 @@ vint16m4_t test_vfncvt_x_f_w_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf4_tum( @@ -1183,7 +1183,7 @@ vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf4_tum( @@ -1192,7 +1192,7 @@ vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf2_tum( @@ -1201,7 +1201,7 @@ vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_tum(vbool64_t mask, vuint16mf4_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf2_tum( @@ -1210,7 +1210,7 @@ vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m1_tum( @@ -1219,7 +1219,7 @@ vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_tum(vbool32_t mask, vuint16mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_xu_f_w_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_xu_f_w_u16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m1_tum( @@ -1228,7 +1228,7 @@ vuint16m1_t test_vfncvt_xu_f_w_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m2_tum( @@ -1237,7 +1237,7 @@ vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_tum(vbool16_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_xu_f_w_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_xu_f_w_u16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m2_tum( @@ -1246,7 +1246,7 @@ vuint16m2_t test_vfncvt_xu_f_w_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m4_tum( @@ -1255,7 +1255,7 @@ vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_tum(vbool8_t mask, vuint16m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_xu_f_w_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_xu_f_w_u16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m4_tum( @@ -1264,7 +1264,7 @@ vuint16m4_t test_vfncvt_xu_f_w_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf4_tum( @@ -1273,7 +1273,7 @@ vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_tum(vbool4_t mask, vuint16m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vint32mf2_t src, size_t vl) { - return vfncvt_f_x_w_f16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf2_tum( @@ -1282,7 +1282,7 @@ vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vint32m1_t src, size_t vl) { - return vfncvt_f_x_w_f16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m1_tum( @@ -1291,7 +1291,7 @@ vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_x_w_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vint32m2_t src, size_t vl) { - return vfncvt_f_x_w_f16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m2_tum( @@ -1300,7 +1300,7 @@ vfloat16m1_t test_vfncvt_f_x_w_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_x_w_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vint32m4_t src, size_t vl) { - return vfncvt_f_x_w_f16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m4_tum( @@ -1309,7 +1309,7 @@ vfloat16m2_t test_vfncvt_f_x_w_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_x_w_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vint32m8_t src, size_t vl) { - return vfncvt_f_x_w_f16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf4_tum( @@ -1318,7 +1318,7 @@ vfloat16m4_t test_vfncvt_f_x_w_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf2_tum( @@ -1327,7 +1327,7 @@ vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_tum(vbool64_t mask, vfloat16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vuint32m1_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m1_tum( @@ -1336,7 +1336,7 @@ vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_tum(vbool32_t mask, vfloat16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_xu_w_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vuint32m2_t src, size_t vl) { - return vfncvt_f_xu_w_f16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m2_tum( @@ -1345,7 +1345,7 @@ vfloat16m1_t test_vfncvt_f_xu_w_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_xu_w_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vuint32m4_t src, size_t vl) { - return vfncvt_f_xu_w_f16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m4_tum( @@ -1354,7 +1354,7 @@ vfloat16m2_t test_vfncvt_f_xu_w_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_xu_w_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vuint32m8_t src, size_t vl) { - return vfncvt_f_xu_w_f16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf4_tum( @@ -1363,7 +1363,7 @@ vfloat16m4_t test_vfncvt_f_xu_w_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_f_f_w_f16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf4_tum( @@ -1372,7 +1372,7 @@ vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf2_tum( @@ -1381,7 +1381,7 @@ vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tum(vbool64_t mask, vfloat16mf4_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_f_f_w_f16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf2_tum( @@ -1390,7 +1390,7 @@ vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m1_tum( @@ -1399,7 +1399,7 @@ vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tum(vbool32_t mask, vfloat16mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_f_w_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_f_f_w_f16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m1_tum( @@ -1408,7 +1408,7 @@ vfloat16m1_t test_vfncvt_f_f_w_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m2_tum( @@ -1417,7 +1417,7 @@ vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tum(vbool16_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_f_w_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_f_f_w_f16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m2_tum( @@ -1426,7 +1426,7 @@ vfloat16m2_t test_vfncvt_f_f_w_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m4_tum( @@ -1435,7 +1435,7 @@ vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_f_w_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_f_f_w_f16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m4_tum( @@ -1444,7 +1444,7 @@ vfloat16m4_t test_vfncvt_f_f_w_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32mf2_tum( @@ -1453,7 +1453,7 @@ vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_x_f_w_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_x_f_w_i32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32mf2_tum( @@ -1462,7 +1462,7 @@ vint32mf2_t test_vfncvt_x_f_w_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m1_tum( @@ -1471,7 +1471,7 @@ vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_x_f_w_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_x_f_w_i32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m1_tum( @@ -1480,7 +1480,7 @@ vint32m1_t test_vfncvt_x_f_w_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m2_tum( @@ -1489,7 +1489,7 @@ vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_x_f_w_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_x_f_w_i32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m2_tum( @@ -1498,7 +1498,7 @@ vint32m2_t test_vfncvt_x_f_w_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m4_tum( @@ -1507,7 +1507,7 @@ vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_x_f_w_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_x_f_w_i32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m4_tum( @@ -1516,7 +1516,7 @@ vint32m4_t test_vfncvt_x_f_w_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32mf2_tum( @@ -1525,7 +1525,7 @@ vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_xu_f_w_u32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32mf2_tum( @@ -1534,7 +1534,7 @@ vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m1_tum( @@ -1543,7 +1543,7 @@ vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_tum(vbool64_t mask, vuint32mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_xu_f_w_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_xu_f_w_u32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m1_tum( @@ -1552,7 +1552,7 @@ vuint32m1_t test_vfncvt_xu_f_w_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m2_tum( @@ -1561,7 +1561,7 @@ vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_tum(vbool32_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_xu_f_w_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_xu_f_w_u32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m2_tum( @@ -1570,7 +1570,7 @@ vuint32m2_t test_vfncvt_xu_f_w_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m4_tum( @@ -1579,7 +1579,7 @@ vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_tum(vbool16_t mask, vuint32m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_xu_f_w_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_xu_f_w_u32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m4_tum( @@ -1588,7 +1588,7 @@ vuint32m4_t test_vfncvt_xu_f_w_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32mf2_tum( @@ -1597,7 +1597,7 @@ vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_tum(vbool8_t mask, vuint32m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vint64m1_t src, size_t vl) { - return vfncvt_f_x_w_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m1_tum( @@ -1606,7 +1606,7 @@ vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_x_w_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vint64m2_t src, size_t vl) { - return vfncvt_f_x_w_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m2_tum( @@ -1615,7 +1615,7 @@ vfloat32m1_t test_vfncvt_f_x_w_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_x_w_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vint64m4_t src, size_t vl) { - return vfncvt_f_x_w_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m4_tum( @@ -1624,7 +1624,7 @@ vfloat32m2_t test_vfncvt_f_x_w_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_x_w_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vint64m8_t src, size_t vl) { - return vfncvt_f_x_w_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32mf2_tum( @@ -1633,7 +1633,7 @@ vfloat32m4_t test_vfncvt_f_x_w_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vuint64m1_t src, size_t vl) { - return vfncvt_f_xu_w_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m1_tum( @@ -1642,7 +1642,7 @@ vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_tum(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_xu_w_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vuint64m2_t src, size_t vl) { - return vfncvt_f_xu_w_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m2_tum( @@ -1651,7 +1651,7 @@ vfloat32m1_t test_vfncvt_f_xu_w_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_xu_w_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vuint64m4_t src, size_t vl) { - return vfncvt_f_xu_w_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m4_tum( @@ -1660,7 +1660,7 @@ vfloat32m2_t test_vfncvt_f_xu_w_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_xu_w_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vuint64m8_t src, size_t vl) { - return vfncvt_f_xu_w_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32mf2_tum( @@ -1669,7 +1669,7 @@ vfloat32m4_t test_vfncvt_f_xu_w_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_f_f_w_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32mf2_tum( @@ -1678,7 +1678,7 @@ vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m1_tum( @@ -1687,7 +1687,7 @@ vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_tum(vbool64_t mask, vfloat32mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_f_w_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_f_f_w_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m1_tum( @@ -1696,7 +1696,7 @@ vfloat32m1_t test_vfncvt_f_f_w_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m2_tum( @@ -1705,7 +1705,7 @@ vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_tum(vbool32_t mask, vfloat32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_f_w_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_f_f_w_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m2_tum( @@ -1714,7 +1714,7 @@ vfloat32m2_t test_vfncvt_f_f_w_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m4_tum( @@ -1723,7 +1723,7 @@ vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_tum(vbool16_t mask, vfloat32m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_f_w_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_f_f_w_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m4_tum( @@ -1732,7 +1732,7 @@ vfloat32m4_t test_vfncvt_f_f_w_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf8_tumu( @@ -1741,7 +1741,7 @@ vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_x_f_w_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_x_f_w_i8mf8_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf8_tumu( @@ -1750,7 +1750,7 @@ vint8mf8_t test_vfncvt_x_f_w_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf8_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf4_tumu( @@ -1759,7 +1759,7 @@ vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_x_f_w_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_x_f_w_i8mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf4_tumu( @@ -1768,7 +1768,7 @@ vint8mf4_t test_vfncvt_x_f_w_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf2_tumu( @@ -1777,7 +1777,7 @@ vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_x_f_w_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_x_f_w_i8mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf2_tumu( @@ -1786,7 +1786,7 @@ vint8mf2_t test_vfncvt_x_f_w_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m1_tumu( @@ -1795,7 +1795,7 @@ vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_x_f_w_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_x_f_w_i8m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m1_tumu( @@ -1804,7 +1804,7 @@ vint8m1_t test_vfncvt_x_f_w_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m2_tumu( @@ -1813,7 +1813,7 @@ vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_x_f_w_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_x_f_w_i8m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m2_tumu( @@ -1822,7 +1822,7 @@ vint8m2_t test_vfncvt_x_f_w_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m4_tumu( @@ -1831,7 +1831,7 @@ vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_x_f_w_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_x_f_w_i8m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m4_tumu( @@ -1840,7 +1840,7 @@ vint8m4_t test_vfncvt_x_f_w_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf8_tumu( @@ -1849,7 +1849,7 @@ vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf8_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf8_tumu( @@ -1858,7 +1858,7 @@ vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf8_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf4_tumu( @@ -1867,7 +1867,7 @@ vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_tumu(vbool64_t mask, vuint8mf8_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf4_tumu( @@ -1876,7 +1876,7 @@ vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf2_tumu( @@ -1885,7 +1885,7 @@ vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_tumu(vbool32_t mask, vuint8mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf2_tumu( @@ -1894,7 +1894,7 @@ vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m1_tumu( @@ -1903,7 +1903,7 @@ vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_tumu(vbool16_t mask, vuint8mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_xu_f_w_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_xu_f_w_u8m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m1_tumu( @@ -1912,7 +1912,7 @@ vuint8m1_t test_vfncvt_xu_f_w_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m2_tumu( @@ -1921,7 +1921,7 @@ vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_xu_f_w_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_xu_f_w_u8m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m2_tumu( @@ -1930,7 +1930,7 @@ vuint8m2_t test_vfncvt_xu_f_w_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m4_tumu( @@ -1939,7 +1939,7 @@ vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_xu_f_w_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_xu_f_w_u8m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m4_tumu( @@ -1948,7 +1948,7 @@ vuint8m4_t test_vfncvt_xu_f_w_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf4_tumu( @@ -1957,7 +1957,7 @@ vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_x_f_w_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_x_f_w_i16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf4_tumu( @@ -1966,7 +1966,7 @@ vint16mf4_t test_vfncvt_x_f_w_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf2_tumu( @@ -1975,7 +1975,7 @@ vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_tumu(vbool64_t mask, vint16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_x_f_w_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_x_f_w_i16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf2_tumu( @@ -1984,7 +1984,7 @@ vint16mf2_t test_vfncvt_x_f_w_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m1_tumu( @@ -1993,7 +1993,7 @@ vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_tumu(vbool32_t mask, vint16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_x_f_w_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_x_f_w_i16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m1_tumu( @@ -2002,7 +2002,7 @@ vint16m1_t test_vfncvt_x_f_w_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m2_tumu( @@ -2011,7 +2011,7 @@ vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_x_f_w_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_x_f_w_i16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m2_tumu( @@ -2020,7 +2020,7 @@ vint16m2_t test_vfncvt_x_f_w_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m4_tumu( @@ -2029,7 +2029,7 @@ vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_x_f_w_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_x_f_w_i16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m4_tumu( @@ -2038,7 +2038,7 @@ vint16m4_t test_vfncvt_x_f_w_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf4_tumu( @@ -2047,7 +2047,7 @@ vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf4_tumu( @@ -2056,7 +2056,7 @@ vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf2_tumu( @@ -2065,7 +2065,7 @@ vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_tumu(vbool64_t mask, vuint16mf4_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf2_tumu( @@ -2074,7 +2074,7 @@ vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m1_tumu( @@ -2083,7 +2083,7 @@ vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_tumu(vbool32_t mask, vuint16mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_xu_f_w_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_xu_f_w_u16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m1_tumu( @@ -2092,7 +2092,7 @@ vuint16m1_t test_vfncvt_xu_f_w_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m2_tumu( @@ -2101,7 +2101,7 @@ vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_tumu(vbool16_t mask, vuint16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_xu_f_w_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_xu_f_w_u16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m2_tumu( @@ -2110,7 +2110,7 @@ vuint16m2_t test_vfncvt_xu_f_w_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m4_tumu( @@ -2119,7 +2119,7 @@ vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_xu_f_w_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_xu_f_w_u16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m4_tumu( @@ -2128,7 +2128,7 @@ vuint16m4_t test_vfncvt_xu_f_w_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf4_tumu( @@ -2137,7 +2137,7 @@ vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vint32mf2_t src, size_t vl) { - return vfncvt_f_x_w_f16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf2_tumu( @@ -2146,7 +2146,7 @@ vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vint32m1_t src, size_t vl) { - return vfncvt_f_x_w_f16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m1_tumu( @@ -2155,7 +2155,7 @@ vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_x_w_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vint32m2_t src, size_t vl) { - return vfncvt_f_x_w_f16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m2_tumu( @@ -2164,7 +2164,7 @@ vfloat16m1_t test_vfncvt_f_x_w_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_x_w_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vint32m4_t src, size_t vl) { - return vfncvt_f_x_w_f16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m4_tumu( @@ -2173,7 +2173,7 @@ vfloat16m2_t test_vfncvt_f_x_w_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_x_w_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vint32m8_t src, size_t vl) { - return vfncvt_f_x_w_f16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf4_tumu( @@ -2182,7 +2182,7 @@ vfloat16m4_t test_vfncvt_f_x_w_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf2_tumu( @@ -2191,7 +2191,7 @@ vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vuint32m1_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m1_tumu( @@ -2200,7 +2200,7 @@ vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_xu_w_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vuint32m2_t src, size_t vl) { - return vfncvt_f_xu_w_f16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m2_tumu( @@ -2209,7 +2209,7 @@ vfloat16m1_t test_vfncvt_f_xu_w_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_xu_w_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vuint32m4_t src, size_t vl) { - return vfncvt_f_xu_w_f16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m4_tumu( @@ -2218,7 +2218,7 @@ vfloat16m2_t test_vfncvt_f_xu_w_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_xu_w_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vuint32m8_t src, size_t vl) { - return vfncvt_f_xu_w_f16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf4_tumu( @@ -2227,7 +2227,7 @@ vfloat16m4_t test_vfncvt_f_xu_w_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_f_f_w_f16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf4_tumu( @@ -2236,7 +2236,7 @@ vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf2_tumu( @@ -2245,7 +2245,7 @@ vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_f_f_w_f16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf2_tumu( @@ -2254,7 +2254,7 @@ vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m1_tumu( @@ -2263,7 +2263,7 @@ vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_f_w_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_f_f_w_f16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m1_tumu( @@ -2272,7 +2272,7 @@ vfloat16m1_t test_vfncvt_f_f_w_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m2_tumu( @@ -2281,7 +2281,7 @@ vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_tumu(vbool16_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_f_w_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_f_f_w_f16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m2_tumu( @@ -2290,7 +2290,7 @@ vfloat16m2_t test_vfncvt_f_f_w_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m4_tumu( @@ -2299,7 +2299,7 @@ vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_tumu(vbool8_t mask, vfloat16m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_f_w_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_f_f_w_f16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m4_tumu( @@ -2308,7 +2308,7 @@ vfloat16m4_t test_vfncvt_f_f_w_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32mf2_tumu( @@ -2317,7 +2317,7 @@ vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_tumu(vbool4_t mask, vfloat16m4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_x_f_w_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_x_f_w_i32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32mf2_tumu( @@ -2326,7 +2326,7 @@ vint32mf2_t test_vfncvt_x_f_w_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m1_tumu( @@ -2335,7 +2335,7 @@ vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_tumu(vbool64_t mask, vint32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_x_f_w_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_x_f_w_i32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m1_tumu( @@ -2344,7 +2344,7 @@ vint32m1_t test_vfncvt_x_f_w_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m2_tumu( @@ -2353,7 +2353,7 @@ vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_x_f_w_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_x_f_w_i32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m2_tumu( @@ -2362,7 +2362,7 @@ vint32m2_t test_vfncvt_x_f_w_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m4_tumu( @@ -2371,7 +2371,7 @@ vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_x_f_w_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_x_f_w_i32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m4_tumu( @@ -2380,7 +2380,7 @@ vint32m4_t test_vfncvt_x_f_w_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32mf2_tumu( @@ -2389,7 +2389,7 @@ vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_xu_f_w_u32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32mf2_tumu( @@ -2398,7 +2398,7 @@ vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m1_tumu( @@ -2407,7 +2407,7 @@ vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_tumu(vbool64_t mask, vuint32mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_xu_f_w_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_xu_f_w_u32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m1_tumu( @@ -2416,7 +2416,7 @@ vuint32m1_t test_vfncvt_xu_f_w_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m2_tumu( @@ -2425,7 +2425,7 @@ vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_tumu(vbool32_t mask, vuint32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_xu_f_w_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_xu_f_w_u32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m2_tumu( @@ -2434,7 +2434,7 @@ vuint32m2_t test_vfncvt_xu_f_w_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m4_tumu( @@ -2443,7 +2443,7 @@ vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_tumu(vbool16_t mask, vuint32m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_xu_f_w_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_xu_f_w_u32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m4_tumu( @@ -2452,7 +2452,7 @@ vuint32m4_t test_vfncvt_xu_f_w_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32mf2_tumu( @@ -2461,7 +2461,7 @@ vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vint64m1_t src, size_t vl) { - return vfncvt_f_x_w_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m1_tumu( @@ -2470,7 +2470,7 @@ vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_x_w_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vint64m2_t src, size_t vl) { - return vfncvt_f_x_w_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m2_tumu( @@ -2479,7 +2479,7 @@ vfloat32m1_t test_vfncvt_f_x_w_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_x_w_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vint64m4_t src, size_t vl) { - return vfncvt_f_x_w_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m4_tumu( @@ -2488,7 +2488,7 @@ vfloat32m2_t test_vfncvt_f_x_w_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_x_w_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vint64m8_t src, size_t vl) { - return vfncvt_f_x_w_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32mf2_tumu( @@ -2497,7 +2497,7 @@ vfloat32m4_t test_vfncvt_f_x_w_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vuint64m1_t src, size_t vl) { - return vfncvt_f_xu_w_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m1_tumu( @@ -2506,7 +2506,7 @@ vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_xu_w_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vuint64m2_t src, size_t vl) { - return vfncvt_f_xu_w_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m2_tumu( @@ -2515,7 +2515,7 @@ vfloat32m1_t test_vfncvt_f_xu_w_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_xu_w_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vuint64m4_t src, size_t vl) { - return vfncvt_f_xu_w_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m4_tumu( @@ -2524,7 +2524,7 @@ vfloat32m2_t test_vfncvt_f_xu_w_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_xu_w_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vuint64m8_t src, size_t vl) { - return vfncvt_f_xu_w_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32mf2_tumu( @@ -2533,7 +2533,7 @@ vfloat32m4_t test_vfncvt_f_xu_w_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_f_f_w_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32mf2_tumu( @@ -2542,7 +2542,7 @@ vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m1_tumu( @@ -2551,7 +2551,7 @@ vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_f_w_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_f_f_w_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m1_tumu( @@ -2560,7 +2560,7 @@ vfloat32m1_t test_vfncvt_f_f_w_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m2_tumu( @@ -2569,7 +2569,7 @@ vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_tumu(vbool32_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_f_w_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_f_f_w_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m2_tumu( @@ -2578,7 +2578,7 @@ vfloat32m2_t test_vfncvt_f_f_w_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m4_tumu( @@ -2587,7 +2587,7 @@ vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_tumu(vbool16_t mask, vfloat32m2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_f_w_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_f_f_w_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m4_tumu( @@ -2596,7 +2596,7 @@ vfloat32m4_t test_vfncvt_f_f_w_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf8_mu( @@ -2605,7 +2605,7 @@ vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4_tumu(vbool8_t mask, vfloat32m4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_x_f_w_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_x_f_w_i8mf8_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf8_mu( @@ -2614,7 +2614,7 @@ vint8mf8_t test_vfncvt_x_f_w_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf8_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf4_mu( @@ -2623,7 +2623,7 @@ vint8mf8_t test_vfncvt_rtz_x_f_w_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_x_f_w_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_x_f_w_i8mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf4_mu( @@ -2632,7 +2632,7 @@ vint8mf4_t test_vfncvt_x_f_w_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8mf2_mu( @@ -2641,7 +2641,7 @@ vint8mf4_t test_vfncvt_rtz_x_f_w_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_x_f_w_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_x_f_w_i8mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8mf2_mu( @@ -2650,7 +2650,7 @@ vint8mf2_t test_vfncvt_x_f_w_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m1_mu( @@ -2659,7 +2659,7 @@ vint8mf2_t test_vfncvt_rtz_x_f_w_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_x_f_w_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_x_f_w_i8m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m1_mu( @@ -2668,7 +2668,7 @@ vint8m1_t test_vfncvt_x_f_w_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m2_mu( @@ -2677,7 +2677,7 @@ vint8m1_t test_vfncvt_rtz_x_f_w_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_x_f_w_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_x_f_w_i8m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m2_mu( @@ -2686,7 +2686,7 @@ vint8m2_t test_vfncvt_x_f_w_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i8m4_mu( @@ -2695,7 +2695,7 @@ vint8m2_t test_vfncvt_rtz_x_f_w_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_x_f_w_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_x_f_w_i8m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i8m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i8m4_mu( @@ -2704,7 +2704,7 @@ vint8m4_t test_vfncvt_x_f_w_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i8m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i8m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf8_mu( @@ -2713,7 +2713,7 @@ vint8m4_t test_vfncvt_rtz_x_f_w_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf8_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf8_mu( @@ -2722,7 +2722,7 @@ vuint8mf8_t test_vfncvt_xu_f_w_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf8_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf4_mu( @@ -2731,7 +2731,7 @@ vuint8mf8_t test_vfncvt_rtz_xu_f_w_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf4_mu( @@ -2740,7 +2740,7 @@ vuint8mf4_t test_vfncvt_xu_f_w_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8mf2_mu( @@ -2749,7 +2749,7 @@ vuint8mf4_t test_vfncvt_rtz_xu_f_w_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_xu_f_w_u8mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8mf2_mu( @@ -2758,7 +2758,7 @@ vuint8mf2_t test_vfncvt_xu_f_w_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m1_mu( @@ -2767,7 +2767,7 @@ vuint8mf2_t test_vfncvt_rtz_xu_f_w_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_xu_f_w_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_xu_f_w_u8m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m1_mu( @@ -2776,7 +2776,7 @@ vuint8m1_t test_vfncvt_xu_f_w_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m2_mu( @@ -2785,7 +2785,7 @@ vuint8m1_t test_vfncvt_rtz_xu_f_w_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_xu_f_w_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_xu_f_w_u8m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m2_mu( @@ -2794,7 +2794,7 @@ vuint8m2_t test_vfncvt_xu_f_w_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u8m4_mu( @@ -2803,7 +2803,7 @@ vuint8m2_t test_vfncvt_rtz_xu_f_w_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_xu_f_w_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_xu_f_w_u8m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u8m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u8m4_mu( @@ -2812,7 +2812,7 @@ vuint8m4_t test_vfncvt_xu_f_w_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vfloat16m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u8m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u8m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf4_mu( @@ -2821,7 +2821,7 @@ vuint8m4_t test_vfncvt_rtz_xu_f_w_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_x_f_w_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_x_f_w_i16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf4_mu( @@ -2830,7 +2830,7 @@ vint16mf4_t test_vfncvt_x_f_w_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16mf2_mu( @@ -2839,7 +2839,7 @@ vint16mf4_t test_vfncvt_rtz_x_f_w_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_x_f_w_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_x_f_w_i16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16mf2_mu( @@ -2848,7 +2848,7 @@ vint16mf2_t test_vfncvt_x_f_w_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m1_mu( @@ -2857,7 +2857,7 @@ vint16mf2_t test_vfncvt_rtz_x_f_w_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_x_f_w_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_x_f_w_i16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m1_mu( @@ -2866,7 +2866,7 @@ vint16m1_t test_vfncvt_x_f_w_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m2_mu( @@ -2875,7 +2875,7 @@ vint16m1_t test_vfncvt_rtz_x_f_w_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_x_f_w_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_x_f_w_i16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m2_mu( @@ -2884,7 +2884,7 @@ vint16m2_t test_vfncvt_x_f_w_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i16m4_mu( @@ -2893,7 +2893,7 @@ vint16m2_t test_vfncvt_rtz_x_f_w_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_x_f_w_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_x_f_w_i16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i16m4_mu( @@ -2902,7 +2902,7 @@ vint16m4_t test_vfncvt_x_f_w_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf4_mu( @@ -2911,7 +2911,7 @@ vint16m4_t test_vfncvt_rtz_x_f_w_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf4_mu( @@ -2920,7 +2920,7 @@ vuint16mf4_t test_vfncvt_xu_f_w_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16mf2_mu( @@ -2929,7 +2929,7 @@ vuint16mf4_t test_vfncvt_rtz_xu_f_w_u16mf4_mu(vbool64_t mask, vuint16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_xu_f_w_u16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16mf2_mu( @@ -2938,7 +2938,7 @@ vuint16mf2_t test_vfncvt_xu_f_w_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m1_mu( @@ -2947,7 +2947,7 @@ vuint16mf2_t test_vfncvt_rtz_xu_f_w_u16mf2_mu(vbool32_t mask, vuint16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_xu_f_w_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_xu_f_w_u16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m1_mu( @@ -2956,7 +2956,7 @@ vuint16m1_t test_vfncvt_xu_f_w_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m2_mu( @@ -2965,7 +2965,7 @@ vuint16m1_t test_vfncvt_rtz_xu_f_w_u16m1_mu(vbool16_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_xu_f_w_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_xu_f_w_u16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m2_mu( @@ -2974,7 +2974,7 @@ vuint16m2_t test_vfncvt_xu_f_w_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u16m4_mu( @@ -2983,7 +2983,7 @@ vuint16m2_t test_vfncvt_rtz_xu_f_w_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_xu_f_w_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_xu_f_w_u16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u16m4_mu( @@ -2992,7 +2992,7 @@ vuint16m4_t test_vfncvt_xu_f_w_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf4_mu( @@ -3001,7 +3001,7 @@ vuint16m4_t test_vfncvt_rtz_xu_f_w_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vint32mf2_t src, size_t vl) { - return vfncvt_f_x_w_f16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16mf2_mu( @@ -3010,7 +3010,7 @@ vfloat16mf4_t test_vfncvt_f_x_w_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vint32m1_t src, size_t vl) { - return vfncvt_f_x_w_f16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m1_mu( @@ -3019,7 +3019,7 @@ vfloat16mf2_t test_vfncvt_f_x_w_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_x_w_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vint32m2_t src, size_t vl) { - return vfncvt_f_x_w_f16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m2_mu( @@ -3028,7 +3028,7 @@ vfloat16m1_t test_vfncvt_f_x_w_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_x_w_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vint32m4_t src, size_t vl) { - return vfncvt_f_x_w_f16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f16m4_mu( @@ -3037,7 +3037,7 @@ vfloat16m2_t test_vfncvt_f_x_w_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_x_w_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vint32m8_t src, size_t vl) { - return vfncvt_f_x_w_f16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf4_mu( @@ -3046,7 +3046,7 @@ vfloat16m4_t test_vfncvt_f_x_w_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16mf2_mu( @@ -3055,7 +3055,7 @@ vfloat16mf4_t test_vfncvt_f_xu_w_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vuint32m1_t src, size_t vl) { - return vfncvt_f_xu_w_f16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m1_mu( @@ -3064,7 +3064,7 @@ vfloat16mf2_t test_vfncvt_f_xu_w_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_xu_w_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vuint32m2_t src, size_t vl) { - return vfncvt_f_xu_w_f16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m2_mu( @@ -3073,7 +3073,7 @@ vfloat16m1_t test_vfncvt_f_xu_w_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_xu_w_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vuint32m4_t src, size_t vl) { - return vfncvt_f_xu_w_f16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f16m4_mu( @@ -3082,7 +3082,7 @@ vfloat16m2_t test_vfncvt_f_xu_w_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_xu_w_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vuint32m8_t src, size_t vl) { - return vfncvt_f_xu_w_f16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf4_mu( @@ -3091,7 +3091,7 @@ vfloat16m4_t test_vfncvt_f_xu_w_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_f_f_w_f16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf4_mu( @@ -3100,7 +3100,7 @@ vfloat16mf4_t test_vfncvt_f_f_w_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16mf2_mu( @@ -3109,7 +3109,7 @@ vfloat16mf4_t test_vfncvt_rod_f_f_w_f16mf4_mu(vbool64_t mask, vfloat16mf4_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_f_f_w_f16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16mf2_mu( @@ -3118,7 +3118,7 @@ vfloat16mf2_t test_vfncvt_f_f_w_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m1_mu( @@ -3127,7 +3127,7 @@ vfloat16mf2_t test_vfncvt_rod_f_f_w_f16mf2_mu(vbool32_t mask, vfloat16mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_f_f_w_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_f_f_w_f16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m1_mu( @@ -3136,7 +3136,7 @@ vfloat16m1_t test_vfncvt_f_f_w_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m2_mu( @@ -3145,7 +3145,7 @@ vfloat16m1_t test_vfncvt_rod_f_f_w_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_f_f_w_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_f_f_w_f16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m2_mu( @@ -3154,7 +3154,7 @@ vfloat16m2_t test_vfncvt_f_f_w_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f16m4_mu( @@ -3163,7 +3163,7 @@ vfloat16m2_t test_vfncvt_rod_f_f_w_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_f_f_w_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_f_f_w_f16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f16m4_mu( @@ -3172,7 +3172,7 @@ vfloat16m4_t test_vfncvt_f_f_w_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat32m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32mf2_mu( @@ -3181,7 +3181,7 @@ vfloat16m4_t test_vfncvt_rod_f_f_w_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_x_f_w_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_x_f_w_i32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32mf2_mu( @@ -3190,7 +3190,7 @@ vint32mf2_t test_vfncvt_x_f_w_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m1_mu( @@ -3199,7 +3199,7 @@ vint32mf2_t test_vfncvt_rtz_x_f_w_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_x_f_w_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_x_f_w_i32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m1_mu( @@ -3208,7 +3208,7 @@ vint32m1_t test_vfncvt_x_f_w_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m2_mu( @@ -3217,7 +3217,7 @@ vint32m1_t test_vfncvt_rtz_x_f_w_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_x_f_w_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_x_f_w_i32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m2_mu( @@ -3226,7 +3226,7 @@ vint32m2_t test_vfncvt_x_f_w_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_x_f_w_i32m4_mu( @@ -3235,7 +3235,7 @@ vint32m2_t test_vfncvt_rtz_x_f_w_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_x_f_w_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_x_f_w_i32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_x_f_w_i32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_x_f_w_i32m4_mu( @@ -3244,7 +3244,7 @@ vint32m4_t test_vfncvt_x_f_w_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_x_f_w_i32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_x_f_w_i32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32mf2_mu( @@ -3253,7 +3253,7 @@ vint32m4_t test_vfncvt_rtz_x_f_w_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_xu_f_w_u32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32mf2_mu( @@ -3262,7 +3262,7 @@ vuint32mf2_t test_vfncvt_xu_f_w_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m1_mu( @@ -3271,7 +3271,7 @@ vuint32mf2_t test_vfncvt_rtz_xu_f_w_u32mf2_mu(vbool64_t mask, vuint32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_xu_f_w_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_xu_f_w_u32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m1_mu( @@ -3280,7 +3280,7 @@ vuint32m1_t test_vfncvt_xu_f_w_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m2_mu( @@ -3289,7 +3289,7 @@ vuint32m1_t test_vfncvt_rtz_xu_f_w_u32m1_mu(vbool32_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_xu_f_w_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_xu_f_w_u32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m2_mu( @@ -3298,7 +3298,7 @@ vuint32m2_t test_vfncvt_xu_f_w_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_xu_f_w_u32m4_mu( @@ -3307,7 +3307,7 @@ vuint32m2_t test_vfncvt_rtz_xu_f_w_u32m2_mu(vbool16_t mask, vuint32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_xu_f_w_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_xu_f_w_u32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_xu_f_w_u32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rtz_xu_f_w_u32m4_mu( @@ -3316,7 +3316,7 @@ vuint32m4_t test_vfncvt_xu_f_w_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rtz_xu_f_w_u32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rtz_xu_f_w_u32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32mf2_mu( @@ -3325,7 +3325,7 @@ vuint32m4_t test_vfncvt_rtz_xu_f_w_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vint64m1_t src, size_t vl) { - return vfncvt_f_x_w_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m1_mu( @@ -3334,7 +3334,7 @@ vfloat32mf2_t test_vfncvt_f_x_w_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_x_w_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vint64m2_t src, size_t vl) { - return vfncvt_f_x_w_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m2_mu( @@ -3343,7 +3343,7 @@ vfloat32m1_t test_vfncvt_f_x_w_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_x_w_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vint64m4_t src, size_t vl) { - return vfncvt_f_x_w_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_x_w_f32m4_mu( @@ -3352,7 +3352,7 @@ vfloat32m2_t test_vfncvt_f_x_w_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_x_w_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vint64m8_t src, size_t vl) { - return vfncvt_f_x_w_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_x_w_f32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32mf2_mu( @@ -3361,7 +3361,7 @@ vfloat32m4_t test_vfncvt_f_x_w_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vuint64m1_t src, size_t vl) { - return vfncvt_f_xu_w_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m1_mu( @@ -3370,7 +3370,7 @@ vfloat32mf2_t test_vfncvt_f_xu_w_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_xu_w_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vuint64m2_t src, size_t vl) { - return vfncvt_f_xu_w_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m2_mu( @@ -3379,7 +3379,7 @@ vfloat32m1_t test_vfncvt_f_xu_w_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_xu_w_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vuint64m4_t src, size_t vl) { - return vfncvt_f_xu_w_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_xu_w_f32m4_mu( @@ -3388,7 +3388,7 @@ vfloat32m2_t test_vfncvt_f_xu_w_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_xu_w_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vuint64m8_t src, size_t vl) { - return vfncvt_f_xu_w_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_xu_w_f32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32mf2_mu( @@ -3397,7 +3397,7 @@ vfloat32m4_t test_vfncvt_f_xu_w_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_f_f_w_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32mf2_mu( @@ -3406,7 +3406,7 @@ vfloat32mf2_t test_vfncvt_f_f_w_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat64m1_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m1_mu( @@ -3415,7 +3415,7 @@ vfloat32mf2_t test_vfncvt_rod_f_f_w_f32mf2_mu(vbool64_t mask, vfloat32mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_f_f_w_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_f_f_w_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m1_mu( @@ -3424,7 +3424,7 @@ vfloat32m1_t test_vfncvt_f_f_w_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat64m2_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m2_mu( @@ -3433,7 +3433,7 @@ vfloat32m1_t test_vfncvt_rod_f_f_w_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_f_f_w_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_f_f_w_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m2_mu( @@ -3442,7 +3442,7 @@ vfloat32m2_t test_vfncvt_f_f_w_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat64m4_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_f_f_w_f32m4_mu( @@ -3451,7 +3451,7 @@ vfloat32m2_t test_vfncvt_rod_f_f_w_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_f_f_w_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_f_f_w_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_f_f_w_f32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfncvt_rod_f_f_w_f32m4_mu( @@ -3460,6 +3460,6 @@ vfloat32m4_t test_vfncvt_f_f_w_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfncvt_rod_f_f_w_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat64m8_t src, size_t vl) { - return vfncvt_rod_f_f_w_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfncvt_rod_f_f_w_f32m4_mu(mask, maskedoff, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfneg.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfneg.c index ba972767345e0f0080c3de1b53fac40e96ae352e..b3ebf026ec57a48cf683f3267db74bdeaf033fc5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfneg.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfneg.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfneg_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfneg_v_f16mf4_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfneg_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfneg_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfneg_v_f16mf2_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfneg_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfneg_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfneg_v_f16m1_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfneg_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfneg_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfneg_v_f16m2_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfneg_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfneg_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfneg_v_f16m4_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfneg_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfneg_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfneg_v_f16m8_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfneg_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfneg_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfneg_v_f32mf2_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfneg_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfneg_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfneg_v_f32m1_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfneg_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfneg_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfneg_v_f32m2_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfneg_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfneg_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfneg_v_f32m4_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfneg_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfneg_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfneg_v_f32m8_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfneg_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfneg_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfneg_v_f64m1_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfneg_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfneg_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfneg_v_f64m2_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfneg_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfneg_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfneg_v_f64m4_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfneg_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfneg_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfneg_v_f64m8_tu(maskedoff, op1, vl); + return __riscv_vfneg_v_f64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfneg_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfneg_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfneg_v_f16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfneg_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfneg_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfneg_v_f16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfneg_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfneg_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfneg_v_f16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfneg_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfneg_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfneg_v_f16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfneg_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfneg_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfneg_v_f16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfneg_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfneg_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfneg_v_f16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfneg_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfneg_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfneg_v_f32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfneg_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfneg_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfneg_v_f32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfneg_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfneg_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfneg_v_f32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfneg_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfneg_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfneg_v_f32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfneg_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfneg_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfneg_v_f32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfneg_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfneg_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfneg_v_f64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfneg_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfneg_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfneg_v_f64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfneg_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfneg_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfneg_v_f64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfneg_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfneg_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfneg_v_f64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfneg_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfneg_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfneg_v_f16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfneg_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfneg_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfneg_v_f16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfneg_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfneg_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfneg_v_f16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfneg_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfneg_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfneg_v_f16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfneg_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfneg_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfneg_v_f16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfneg_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfneg_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfneg_v_f16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfneg_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfneg_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfneg_v_f32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfneg_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfneg_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfneg_v_f32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfneg_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfneg_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfneg_v_f32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfneg_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfneg_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfneg_v_f32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfneg_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfneg_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfneg_v_f32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfneg_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfneg_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfneg_v_f64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfneg_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfneg_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfneg_v_f64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfneg_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfneg_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfneg_v_f64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfneg_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfneg_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfneg_v_f64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfneg_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfneg_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfneg_v_f16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfneg_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfneg_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfneg_v_f16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfneg_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfneg_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfneg_v_f16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfneg_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfneg_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfneg_v_f16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfneg_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfneg_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfneg_v_f16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfneg_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfneg_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfneg_v_f16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfneg_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfneg_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfneg_v_f32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfneg_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfneg_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfneg_v_f32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfneg_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfneg_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfneg_v_f32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfneg_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfneg_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfneg_v_f32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfneg_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfneg_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfneg_v_f32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfneg_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfneg_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfneg_v_f64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfneg_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfneg_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfneg_v_f64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfneg_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfneg_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfneg_v_f64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfneg_v_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfneg_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfneg_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfneg_v_f64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfneg_v_f64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmacc.c index 5d8d9b1b64ea3fdaf09f91a776d15b5873c02cb0..935847ab6ac5f76820d2f5c14f51bd0ba8446075 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vv_f16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfnmacc_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vf_f16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfnmacc_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vv_f16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfnmacc_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vf_f16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfnmacc_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vv_f16m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfnmacc_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vf_f16m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfnmacc_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vv_f16m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfnmacc_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vf_f16m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfnmacc_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vv_f16m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfnmacc_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vf_f16m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfnmacc_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vv_f16m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfnmacc_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vf_f16m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfnmacc_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfnmacc_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vf_f32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfnmacc_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfnmacc_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vf_f32m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfnmacc_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfnmacc_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vf_f32m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfnmacc_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfnmacc_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vf_f32m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfnmacc_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfnmacc_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vf_f32m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfnmacc_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfnmacc_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vf_f64m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfnmacc_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfnmacc_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vf_f64m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfnmacc_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfnmacc_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vf_f64m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfnmacc_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfnmacc_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vf_f64m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfnmacc_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfnmacc_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfnmacc_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfnmacc_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfnmacc_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vv_f16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfnmacc_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vf_f16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfnmacc_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vv_f16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfnmacc_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vf_f16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfnmacc_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vv_f16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfnmacc_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vf_f16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfnmacc_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vv_f16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfnmacc_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vf_f16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfnmacc_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfnmacc_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfnmacc_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfnmacc_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vf_f32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfnmacc_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfnmacc_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vf_f32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfnmacc_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfnmacc_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vf_f32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfnmacc_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfnmacc_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vf_f32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfnmacc_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfnmacc_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vf_f64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfnmacc_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfnmacc_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vf_f64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfnmacc_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfnmacc_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vf_f64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfnmacc_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfnmacc_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vf_f64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfnmacc_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfnmacc_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfnmacc_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfnmacc_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfnmacc_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfnmacc_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfnmacc_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfnmacc_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfnmacc_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfnmacc_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfnmacc_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfnmacc_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfnmacc_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfnmacc_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfnmacc_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfnmacc_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfnmacc_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfnmacc_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfnmacc_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfnmacc_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfnmacc_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfnmacc_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfnmacc_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfnmacc_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfnmacc_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfnmacc_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfnmacc_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfnmacc_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfnmacc_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfnmacc_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfnmacc_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfnmacc_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmacc_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmacc_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfnmacc_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfnmacc_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmacc_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmacc_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfnmacc_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vv_f16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfnmacc_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmacc_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmacc_vf_f16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfnmacc_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vv_f16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfnmacc_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmacc_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmacc_vf_f16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfnmacc_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vv_f16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfnmacc_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmacc_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmacc_vf_f16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfnmacc_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vv_f16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfnmacc_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmacc_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmacc_vf_f16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfnmacc_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfnmacc_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmacc_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmacc_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfnmacc_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfnmacc_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmacc_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmacc_vf_f32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfnmacc_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfnmacc_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmacc_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmacc_vf_f32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfnmacc_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfnmacc_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmacc_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmacc_vf_f32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfnmacc_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfnmacc_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmacc_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmacc_vf_f32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfnmacc_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfnmacc_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmacc_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmacc_vf_f64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfnmacc_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfnmacc_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmacc_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmacc_vf_f64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfnmacc_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfnmacc_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmacc_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmacc_vf_f64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfnmacc_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmacc_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmacc_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfnmacc_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmacc_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmacc_vf_f64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmacc_vf_f64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmadd.c index ca0b6711af8ccf8f2253118e8e426dec3f95a13a..da19748f71ec63cb8623df3bb034e0f59194639b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vv_f16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfnmadd_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vf_f16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfnmadd_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vv_f16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfnmadd_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vf_f16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfnmadd_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vv_f16m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfnmadd_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vf_f16m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfnmadd_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vv_f16m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfnmadd_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vf_f16m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfnmadd_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vv_f16m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfnmadd_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vf_f16m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfnmadd_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vv_f16m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfnmadd_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vf_f16m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfnmadd_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfnmadd_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vf_f32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfnmadd_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfnmadd_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vf_f32m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfnmadd_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfnmadd_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vf_f32m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfnmadd_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfnmadd_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vf_f32m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfnmadd_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfnmadd_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vf_f32m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfnmadd_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfnmadd_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vf_f64m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfnmadd_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfnmadd_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vf_f64m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfnmadd_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfnmadd_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vf_f64m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfnmadd_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfnmadd_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vf_f64m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfnmadd_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfnmadd_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfnmadd_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfnmadd_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfnmadd_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vv_f16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfnmadd_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vf_f16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfnmadd_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vv_f16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfnmadd_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vf_f16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfnmadd_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vv_f16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfnmadd_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vf_f16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfnmadd_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vv_f16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfnmadd_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vf_f16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfnmadd_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfnmadd_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfnmadd_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfnmadd_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vf_f32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfnmadd_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfnmadd_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vf_f32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfnmadd_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfnmadd_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vf_f32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfnmadd_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfnmadd_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vf_f32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfnmadd_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfnmadd_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vf_f64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfnmadd_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfnmadd_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vf_f64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfnmadd_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfnmadd_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vf_f64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfnmadd_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfnmadd_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vf_f64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfnmadd_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfnmadd_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfnmadd_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfnmadd_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfnmadd_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfnmadd_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfnmadd_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfnmadd_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfnmadd_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfnmadd_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfnmadd_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfnmadd_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfnmadd_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfnmadd_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfnmadd_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfnmadd_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfnmadd_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfnmadd_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfnmadd_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfnmadd_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfnmadd_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfnmadd_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfnmadd_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfnmadd_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfnmadd_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfnmadd_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfnmadd_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfnmadd_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfnmadd_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfnmadd_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfnmadd_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfnmadd_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmadd_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmadd_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfnmadd_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfnmadd_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmadd_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmadd_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfnmadd_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vv_f16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfnmadd_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmadd_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmadd_vf_f16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfnmadd_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vv_f16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfnmadd_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmadd_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmadd_vf_f16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfnmadd_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vv_f16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfnmadd_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmadd_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmadd_vf_f16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfnmadd_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vv_f16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfnmadd_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmadd_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmadd_vf_f16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfnmadd_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfnmadd_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmadd_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmadd_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfnmadd_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfnmadd_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmadd_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmadd_vf_f32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfnmadd_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfnmadd_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmadd_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmadd_vf_f32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfnmadd_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfnmadd_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmadd_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmadd_vf_f32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfnmadd_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfnmadd_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmadd_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmadd_vf_f32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfnmadd_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfnmadd_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmadd_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmadd_vf_f64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfnmadd_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfnmadd_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmadd_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmadd_vf_f64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfnmadd_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfnmadd_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmadd_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmadd_vf_f64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfnmadd_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmadd_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmadd_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfnmadd_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmadd_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmadd_vf_f64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmadd_vf_f64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsac.c index 082e1e117edee032e0edd3311788fddda6e4c019..7d00fcee740116b35d02b83876f9c25f45424a97 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vv_f16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfnmsac_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vf_f16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfnmsac_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vv_f16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfnmsac_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vf_f16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfnmsac_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vv_f16m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfnmsac_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vf_f16m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfnmsac_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vv_f16m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfnmsac_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vf_f16m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfnmsac_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vv_f16m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfnmsac_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vf_f16m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfnmsac_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vv_f16m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfnmsac_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vf_f16m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfnmsac_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfnmsac_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vf_f32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfnmsac_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfnmsac_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vf_f32m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfnmsac_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfnmsac_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vf_f32m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfnmsac_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfnmsac_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vf_f32m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfnmsac_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfnmsac_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vf_f32m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfnmsac_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfnmsac_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vf_f64m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfnmsac_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfnmsac_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vf_f64m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfnmsac_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfnmsac_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vf_f64m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfnmsac_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfnmsac_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vf_f64m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfnmsac_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfnmsac_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfnmsac_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfnmsac_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfnmsac_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vv_f16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfnmsac_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vf_f16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfnmsac_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vv_f16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfnmsac_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vf_f16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfnmsac_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vv_f16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfnmsac_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vf_f16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfnmsac_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vv_f16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfnmsac_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vf_f16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfnmsac_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfnmsac_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfnmsac_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfnmsac_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vf_f32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfnmsac_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfnmsac_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vf_f32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfnmsac_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfnmsac_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vf_f32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfnmsac_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfnmsac_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vf_f32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfnmsac_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfnmsac_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vf_f64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfnmsac_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfnmsac_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vf_f64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfnmsac_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfnmsac_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vf_f64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfnmsac_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfnmsac_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vf_f64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfnmsac_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfnmsac_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfnmsac_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfnmsac_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfnmsac_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfnmsac_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfnmsac_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfnmsac_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfnmsac_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfnmsac_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfnmsac_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfnmsac_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfnmsac_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfnmsac_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfnmsac_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfnmsac_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfnmsac_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfnmsac_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfnmsac_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfnmsac_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfnmsac_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfnmsac_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfnmsac_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfnmsac_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfnmsac_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfnmsac_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfnmsac_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfnmsac_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfnmsac_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfnmsac_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfnmsac_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfnmsac_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsac_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsac_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfnmsac_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfnmsac_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsac_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsac_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfnmsac_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vv_f16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfnmsac_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsac_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsac_vf_f16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfnmsac_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vv_f16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfnmsac_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsac_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsac_vf_f16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfnmsac_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vv_f16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfnmsac_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsac_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsac_vf_f16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfnmsac_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vv_f16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfnmsac_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsac_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsac_vf_f16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfnmsac_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfnmsac_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsac_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsac_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfnmsac_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfnmsac_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsac_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsac_vf_f32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfnmsac_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfnmsac_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsac_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsac_vf_f32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfnmsac_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfnmsac_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsac_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsac_vf_f32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfnmsac_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfnmsac_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsac_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsac_vf_f32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfnmsac_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfnmsac_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsac_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsac_vf_f64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfnmsac_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfnmsac_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsac_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsac_vf_f64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfnmsac_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfnmsac_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsac_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsac_vf_f64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfnmsac_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsac_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsac_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfnmsac_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsac_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsac_vf_f64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsac_vf_f64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsub.c index 0365273a1e9802ff7bcb690f6003a7aa854128f0..f73d732913b3f46ba11c5c9302804ac27df9500e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfnmsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vv_f16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfnmsub_vv_f16mf4_tu(vfloat16mf4_t vd, vfloat16mf4_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vf_f16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfnmsub_vf_f16mf4_tu(vfloat16mf4_t vd, _Float16 rs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vv_f16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfnmsub_vv_f16mf2_tu(vfloat16mf2_t vd, vfloat16mf2_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vf_f16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfnmsub_vf_f16mf2_tu(vfloat16mf2_t vd, _Float16 rs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vv_f16m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfnmsub_vv_f16m1_tu(vfloat16m1_t vd, vfloat16m1_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vf_f16m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfnmsub_vf_f16m1_tu(vfloat16m1_t vd, _Float16 rs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vv_f16m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfnmsub_vv_f16m2_tu(vfloat16m2_t vd, vfloat16m2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vf_f16m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfnmsub_vf_f16m2_tu(vfloat16m2_t vd, _Float16 rs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vv_f16m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfnmsub_vv_f16m4_tu(vfloat16m4_t vd, vfloat16m4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vf_f16m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfnmsub_vf_f16m4_tu(vfloat16m4_t vd, _Float16 rs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vv_f16m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfnmsub_vv_f16m8_tu(vfloat16m8_t vd, vfloat16m8_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vf_f16m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfnmsub_vf_f16m8_tu(vfloat16m8_t vd, _Float16 rs1, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfnmsub_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat32mf2_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vf_f32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfnmsub_vf_f32mf2_tu(vfloat32mf2_t vd, float rs1, vfloat32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfnmsub_vv_f32m1_tu(vfloat32m1_t vd, vfloat32m1_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vf_f32m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfnmsub_vf_f32m1_tu(vfloat32m1_t vd, float rs1, vfloat32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfnmsub_vv_f32m2_tu(vfloat32m2_t vd, vfloat32m2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vf_f32m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfnmsub_vf_f32m2_tu(vfloat32m2_t vd, float rs1, vfloat32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfnmsub_vv_f32m4_tu(vfloat32m4_t vd, vfloat32m4_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vf_f32m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfnmsub_vf_f32m4_tu(vfloat32m4_t vd, float rs1, vfloat32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfnmsub_vv_f32m8_tu(vfloat32m8_t vd, vfloat32m8_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vf_f32m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfnmsub_vf_f32m8_tu(vfloat32m8_t vd, float rs1, vfloat32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfnmsub_vv_f64m1_tu(vfloat64m1_t vd, vfloat64m1_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vf_f64m1_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfnmsub_vf_f64m1_tu(vfloat64m1_t vd, double rs1, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfnmsub_vv_f64m2_tu(vfloat64m2_t vd, vfloat64m2_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vf_f64m2_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfnmsub_vf_f64m2_tu(vfloat64m2_t vd, double rs1, vfloat64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfnmsub_vv_f64m4_tu(vfloat64m4_t vd, vfloat64m4_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vf_f64m4_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfnmsub_vf_f64m4_tu(vfloat64m4_t vd, double rs1, vfloat64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfnmsub_vv_f64m8_tu(vfloat64m8_t vd, vfloat64m8_t vs1, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vf_f64m8_tu(vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfnmsub_vf_f64m8_tu(vfloat64m8_t vd, double rs1, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfnmsub_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfnmsub_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfnmsub_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfnmsub_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vv_f16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfnmsub_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vf_f16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfnmsub_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vv_f16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfnmsub_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vf_f16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfnmsub_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vv_f16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfnmsub_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vf_f16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfnmsub_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vv_f16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfnmsub_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vf_f16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfnmsub_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfnmsub_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfnmsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfnmsub_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vf_f32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfnmsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfnmsub_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vf_f32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfnmsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfnmsub_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vf_f32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfnmsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfnmsub_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vf_f32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfnmsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfnmsub_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vf_f64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfnmsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfnmsub_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vf_f64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfnmsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfnmsub_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vf_f64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfnmsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfnmsub_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vf_f64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfnmsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfnmsub_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfnmsub_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfnmsub_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfnmsub_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfnmsub_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfnmsub_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfnmsub_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfnmsub_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfnmsub_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfnmsub_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfnmsub_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfnmsub_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfnmsub_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfnmsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfnmsub_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfnmsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfnmsub_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfnmsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, float r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfnmsub_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfnmsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfnmsub_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfnmsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, float rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfnmsub_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfnmsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfnmsub_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfnmsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfnmsub_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfnmsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, double // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfnmsub_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfnmsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, double r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfnmsub_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfnmsub_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float16 rs1, vfloat16mf4_t vs2, size_t vl) { - return vfnmsub_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfnmsub_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfnmsub_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfnmsub_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float16 rs1, vfloat16mf2_t vs2, size_t vl) { - return vfnmsub_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfnmsub_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vv_f16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfnmsub_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfnmsub_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 rs1, vfloat16m1_t vs2, size_t vl) { - return vfnmsub_vf_f16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfnmsub_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vv_f16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfnmsub_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfnmsub_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 rs1, vfloat16m2_t vs2, size_t vl) { - return vfnmsub_vf_f16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfnmsub_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vv_f16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfnmsub_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfnmsub_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 rs1, vfloat16m4_t vs2, size_t vl) { - return vfnmsub_vf_f16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfnmsub_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8_t vs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vv_f16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfnmsub_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfnmsub_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 rs1, vfloat16m8_t vs2, size_t vl) { - return vfnmsub_vf_f16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfnmsub_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t vd, _Float16 r // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfnmsub_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfnmsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float rs1, vfloat32mf2_t vs2, size_t vl) { - return vfnmsub_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfnmsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfnmsub_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfnmsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1, vfloat32m1_t vs2, size_t vl) { - return vfnmsub_vf_f32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfnmsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfnmsub_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfnmsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1, vfloat32m2_t vs2, size_t vl) { - return vfnmsub_vf_f32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfnmsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, float rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfnmsub_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfnmsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, vfloat32m4_t vs2, size_t vl) { - return vfnmsub_vf_f32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfnmsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8_t vs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfnmsub_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfnmsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, vfloat32m8_t vs2, size_t vl) { - return vfnmsub_vf_f32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfnmsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, float rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m1_t vs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfnmsub_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfnmsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs1, vfloat64m1_t vs2, size_t vl) { - return vfnmsub_vf_f64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfnmsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m2_t vs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfnmsub_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfnmsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs1, vfloat64m2_t vs2, size_t vl) { - return vfnmsub_vf_f64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfnmsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m4_t vs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfnmsub_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfnmsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs1, vfloat64m4_t vs2, size_t vl) { - return vfnmsub_vf_f64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfnmsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, double rs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8_t vs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfnmsub_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfnmsub_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfnmsub_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfnmsub_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, double rs1, vfloat64m8_t vs2, size_t vl) { - return vfnmsub_vf_f64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vfnmsub_vf_f64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrdiv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrdiv.c index 5a761886fe71047221e924e8a459e14da09853c0..d1eda89938bdd908dece3200796d1fed42087592 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrdiv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrdiv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrdiv_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfrdiv_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrdiv_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfrdiv_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrdiv_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfrdiv_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrdiv_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfrdiv_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrdiv_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfrdiv_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrdiv_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfrdiv_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrdiv_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfrdiv_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrdiv_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfrdiv_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrdiv_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfrdiv_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrdiv_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfrdiv_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrdiv_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfrdiv_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrdiv_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfrdiv_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrdiv_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfrdiv_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrdiv_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfrdiv_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrdiv_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfrdiv_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrdiv_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfrdiv_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrdiv_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfrdiv_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrdiv_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfrdiv_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrdiv_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfrdiv_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrdiv_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfrdiv_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrdiv_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfrdiv_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrdiv_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfrdiv_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrdiv_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfrdiv_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrdiv_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfrdiv_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrdiv_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfrdiv_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrdiv_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfrdiv_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrdiv_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfrdiv_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrdiv_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfrdiv_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrdiv_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfrdiv_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrdiv_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfrdiv_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrdiv_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfrdiv_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrdiv_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfrdiv_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrdiv_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfrdiv_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrdiv_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfrdiv_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrdiv_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfrdiv_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrdiv_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfrdiv_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrdiv_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfrdiv_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrdiv_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfrdiv_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrdiv_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfrdiv_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrdiv_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfrdiv_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrdiv_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfrdiv_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrdiv_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfrdiv_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrdiv_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfrdiv_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrdiv_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfrdiv_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrdiv_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfrdiv_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrdiv_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfrdiv_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrdiv_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfrdiv_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrdiv_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfrdiv_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrdiv_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfrdiv_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrdiv_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfrdiv_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrdiv_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrdiv_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfrdiv_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrdiv_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfrdiv_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrdiv_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfrdiv_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrdiv_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfrdiv_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrdiv_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfrdiv_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrdiv_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfrdiv_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfrdiv_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrdiv_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfrdiv_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrdiv_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfrdiv_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrdiv_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrdiv_vf_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfrdiv_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrdiv_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfrdiv_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrdiv_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrec7.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrec7.c index 74ef076e724e25294845360eece7c94c116768e3..15dd45fd6e9bee9666f64c8dfe053cad8be0435b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrec7.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrec7.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrec7_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfrec7_v_f16mf4_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfrec7_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrec7_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfrec7_v_f16mf2_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfrec7_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrec7_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfrec7_v_f16m1_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfrec7_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrec7_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfrec7_v_f16m2_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfrec7_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrec7_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfrec7_v_f16m4_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfrec7_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrec7_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfrec7_v_f16m8_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfrec7_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrec7_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfrec7_v_f32mf2_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfrec7_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrec7_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfrec7_v_f32m1_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfrec7_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrec7_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfrec7_v_f32m2_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfrec7_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrec7_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfrec7_v_f32m4_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfrec7_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrec7_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfrec7_v_f32m8_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfrec7_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrec7_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfrec7_v_f64m1_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfrec7_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrec7_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfrec7_v_f64m2_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfrec7_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrec7_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfrec7_v_f64m4_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfrec7_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrec7_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfrec7_v_f64m8_tu(maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfrec7_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrec7_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfrec7_v_f16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfrec7_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrec7_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfrec7_v_f16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfrec7_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrec7_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfrec7_v_f16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfrec7_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrec7_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfrec7_v_f16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfrec7_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrec7_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfrec7_v_f16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfrec7_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrec7_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfrec7_v_f16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfrec7_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrec7_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfrec7_v_f32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfrec7_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrec7_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfrec7_v_f32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfrec7_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrec7_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfrec7_v_f32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfrec7_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrec7_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfrec7_v_f32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfrec7_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrec7_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfrec7_v_f32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfrec7_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrec7_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfrec7_v_f64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfrec7_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrec7_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfrec7_v_f64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfrec7_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrec7_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfrec7_v_f64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfrec7_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrec7_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfrec7_v_f64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfrec7_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrec7_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfrec7_v_f16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfrec7_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrec7_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfrec7_v_f16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfrec7_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrec7_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfrec7_v_f16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfrec7_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrec7_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfrec7_v_f16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfrec7_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrec7_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfrec7_v_f16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfrec7_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrec7_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfrec7_v_f16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfrec7_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrec7_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfrec7_v_f32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfrec7_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrec7_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfrec7_v_f32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfrec7_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrec7_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfrec7_v_f32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfrec7_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrec7_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfrec7_v_f32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfrec7_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrec7_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfrec7_v_f32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfrec7_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrec7_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfrec7_v_f64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfrec7_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrec7_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfrec7_v_f64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfrec7_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrec7_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfrec7_v_f64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfrec7_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrec7_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfrec7_v_f64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfrec7_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrec7_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfrec7_v_f16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfrec7_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrec7_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfrec7_v_f16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfrec7_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrec7_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfrec7_v_f16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfrec7_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrec7_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfrec7_v_f16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfrec7_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrec7_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfrec7_v_f16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfrec7_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrec7_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfrec7_v_f16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfrec7_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrec7_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfrec7_v_f32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfrec7_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrec7_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfrec7_v_f32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfrec7_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrec7_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfrec7_v_f32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfrec7_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrec7_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfrec7_v_f32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfrec7_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrec7_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfrec7_v_f32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfrec7_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrec7_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfrec7_v_f64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfrec7_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrec7_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfrec7_v_f64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfrec7_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrec7_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfrec7_v_f64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrec7_v_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfrec7_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrec7_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfrec7_v_f64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfrec7_v_f64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredmax.c index 4cb1d044a4950f33ca2b6ace889f52f3f94cd021..b4c7838a73c90c96907a2b60ce3b2d6d349b06ec 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredmax.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredmax.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16mf4_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16mf4_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16mf2_f16m1_tu( @@ -22,7 +22,7 @@ vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16mf2_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16mf2_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m1_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m1_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m1_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m2_f16m1_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfredmax_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m2_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m2_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m4_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16m1_t test_vfredmax_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m4_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m4_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m8_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfredmax_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m8_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m8_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32mf2_f32m1_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfredmax_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32mf2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32mf2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m1_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m1_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m1_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m2_f32m1_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfredmax_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m4_f32m1_tu( @@ -94,7 +94,7 @@ vfloat32m1_t test_vfredmax_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m4_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m4_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m8_f32m1_tu( @@ -103,7 +103,7 @@ vfloat32m1_t test_vfredmax_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m8_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m8_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m1_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m1_t test_vfredmax_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m1_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m1_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m2_f64m1_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfredmax_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m2_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m2_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m4_f64m1_tu( @@ -130,7 +130,7 @@ vfloat64m1_t test_vfredmax_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m4_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m4_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m8_f64m1_tu( @@ -139,7 +139,7 @@ vfloat64m1_t test_vfredmax_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m8_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m8_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16mf4_f16m1_tum( @@ -148,7 +148,7 @@ vfloat64m1_t test_vfredmax_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16mf4_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16mf4_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16mf2_f16m1_tum( @@ -157,7 +157,7 @@ vfloat16m1_t test_vfredmax_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16mf2_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16mf2_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m1_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16m1_t test_vfredmax_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m1_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m1_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m2_f16m1_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfredmax_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m2_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m2_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m4_f16m1_tum( @@ -184,7 +184,7 @@ vfloat16m1_t test_vfredmax_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m4_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m4_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f16m8_f16m1_tum( @@ -193,7 +193,7 @@ vfloat16m1_t test_vfredmax_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmax_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmax_vs_f16m8_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f16m8_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32mf2_f32m1_tum( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfredmax_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m1_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfredmax_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m2_f32m1_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfredmax_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m4_f32m1_tum( @@ -229,7 +229,7 @@ vfloat32m1_t test_vfredmax_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f32m8_f32m1_tum( @@ -238,7 +238,7 @@ vfloat32m1_t test_vfredmax_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmax_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmax_vs_f32m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f32m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m1_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m1_t test_vfredmax_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m2_f64m1_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfredmax_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m4_f64m1_tum( @@ -265,7 +265,7 @@ vfloat64m1_t test_vfredmax_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmax_vs_f64m8_f64m1_tum( @@ -274,6 +274,6 @@ vfloat64m1_t test_vfredmax_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmax_vs_f64m8_f64m1_tum(vbool8_t mask, vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmax_vs_f64m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmax_vs_f64m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredmin.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredmin.c index 7109b579b261a8d0616038789a1c4936f555146c..462c03ba9d62f837df106d8ea6a570eeec9905b6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredmin.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredmin.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16mf4_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16mf4_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16mf2_f16m1_tu( @@ -22,7 +22,7 @@ vfloat16m1_t test_vfredmin_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16mf2_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16mf2_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m1_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16m1_t test_vfredmin_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m1_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m1_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m2_f16m1_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfredmin_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m2_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m2_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m4_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16m1_t test_vfredmin_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m4_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m4_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m8_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfredmin_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m8_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m8_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32mf2_f32m1_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfredmin_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32mf2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32mf2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m1_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfredmin_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m1_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m1_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m2_f32m1_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfredmin_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m4_f32m1_tu( @@ -94,7 +94,7 @@ vfloat32m1_t test_vfredmin_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m4_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m4_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m8_f32m1_tu( @@ -103,7 +103,7 @@ vfloat32m1_t test_vfredmin_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m8_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m8_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m1_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m1_t test_vfredmin_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m1_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m1_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m2_f64m1_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfredmin_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m2_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m2_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m4_f64m1_tu( @@ -130,7 +130,7 @@ vfloat64m1_t test_vfredmin_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m4_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m4_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m8_f64m1_tu( @@ -139,7 +139,7 @@ vfloat64m1_t test_vfredmin_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m8_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m8_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16mf4_f16m1_tum( @@ -148,7 +148,7 @@ vfloat64m1_t test_vfredmin_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16mf4_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16mf4_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16mf2_f16m1_tum( @@ -157,7 +157,7 @@ vfloat16m1_t test_vfredmin_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16mf2_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16mf2_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m1_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16m1_t test_vfredmin_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m1_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m1_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m2_f16m1_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfredmin_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m2_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m2_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m4_f16m1_tum( @@ -184,7 +184,7 @@ vfloat16m1_t test_vfredmin_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m4_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m4_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f16m8_f16m1_tum( @@ -193,7 +193,7 @@ vfloat16m1_t test_vfredmin_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredmin_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredmin_vs_f16m8_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f16m8_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32mf2_f32m1_tum( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfredmin_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m1_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfredmin_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m2_f32m1_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfredmin_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m4_f32m1_tum( @@ -229,7 +229,7 @@ vfloat32m1_t test_vfredmin_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f32m8_f32m1_tum( @@ -238,7 +238,7 @@ vfloat32m1_t test_vfredmin_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredmin_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredmin_vs_f32m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f32m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m1_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m1_t test_vfredmin_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m2_f64m1_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfredmin_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m4_f64m1_tum( @@ -265,7 +265,7 @@ vfloat64m1_t test_vfredmin_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredmin_vs_f64m8_f64m1_tum( @@ -274,6 +274,6 @@ vfloat64m1_t test_vfredmin_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredmin_vs_f64m8_f64m1_tum(vbool8_t mask, vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredmin_vs_f64m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredmin_vs_f64m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredosum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredosum.c index 86ef5038d854f436de94503294cc19e9fb6d0887..ed40774a50ada2109d5f6cfc70ec270461ebbeff 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredosum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredosum.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16mf4_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16mf4_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16mf2_f16m1_tu( @@ -22,7 +22,7 @@ vfloat16m1_t test_vfredosum_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16mf2_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16mf2_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m1_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16m1_t test_vfredosum_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m1_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m1_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m2_f16m1_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfredosum_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m2_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m2_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m4_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16m1_t test_vfredosum_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m4_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m4_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m8_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfredosum_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m8_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m8_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32mf2_f32m1_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfredosum_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32mf2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32mf2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m1_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m1_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m1_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m2_f32m1_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfredosum_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m4_f32m1_tu( @@ -94,7 +94,7 @@ vfloat32m1_t test_vfredosum_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m4_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m4_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m8_f32m1_tu( @@ -103,7 +103,7 @@ vfloat32m1_t test_vfredosum_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m8_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m8_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m1_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m1_t test_vfredosum_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m1_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m1_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m2_f64m1_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfredosum_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m2_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m2_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m4_f64m1_tu( @@ -130,7 +130,7 @@ vfloat64m1_t test_vfredosum_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m4_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m4_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m8_f64m1_tu( @@ -139,7 +139,7 @@ vfloat64m1_t test_vfredosum_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m8_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m8_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16mf4_f16m1_tum( @@ -148,7 +148,7 @@ vfloat64m1_t test_vfredosum_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16mf4_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16mf4_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16mf2_f16m1_tum( @@ -157,7 +157,7 @@ vfloat16m1_t test_vfredosum_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16mf2_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16mf2_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m1_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16m1_t test_vfredosum_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m1_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m1_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m2_f16m1_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfredosum_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m2_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m2_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m4_f16m1_tum( @@ -184,7 +184,7 @@ vfloat16m1_t test_vfredosum_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m4_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m4_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f16m8_f16m1_tum( @@ -193,7 +193,7 @@ vfloat16m1_t test_vfredosum_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredosum_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredosum_vs_f16m8_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f16m8_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32mf2_f32m1_tum( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfredosum_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m1_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m2_f32m1_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfredosum_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m4_f32m1_tum( @@ -229,7 +229,7 @@ vfloat32m1_t test_vfredosum_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m8_f32m1_tum( @@ -238,7 +238,7 @@ vfloat32m1_t test_vfredosum_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredosum_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredosum_vs_f32m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f32m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m1_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m1_t test_vfredosum_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m2_f64m1_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfredosum_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m4_f64m1_tum( @@ -265,7 +265,7 @@ vfloat64m1_t test_vfredosum_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m8_f64m1_tum( @@ -274,6 +274,6 @@ vfloat64m1_t test_vfredosum_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredosum_vs_f64m8_f64m1_tum(vbool8_t mask, vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredosum_vs_f64m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredosum_vs_f64m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredusum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredusum.c index 10ab21c4259f02eb8a1fa76098ce27da1d9c773f..43c259afce5f9b76f5b84c5d784693be874414d3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredusum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfredusum.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16mf4_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16mf4_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16mf2_f16m1_tu( @@ -22,7 +22,7 @@ vfloat16m1_t test_vfredusum_vs_f16mf4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16mf2_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16mf2_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m1_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16m1_t test_vfredusum_vs_f16mf2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m1_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m1_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m2_f16m1_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfredusum_vs_f16m1_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m2_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m2_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m4_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16m1_t test_vfredusum_vs_f16m2_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m4_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m4_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m8_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfredusum_vs_f16m4_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m8_f16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m8_f16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32mf2_f32m1_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfredusum_vs_f16m8_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32mf2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32mf2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m1_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfredusum_vs_f32mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m1_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m1_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m2_f32m1_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfredusum_vs_f32m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m4_f32m1_tu( @@ -94,7 +94,7 @@ vfloat32m1_t test_vfredusum_vs_f32m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m4_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m4_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m8_f32m1_tu( @@ -103,7 +103,7 @@ vfloat32m1_t test_vfredusum_vs_f32m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m8_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m8_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m1_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m1_t test_vfredusum_vs_f32m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m1_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m1_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m2_f64m1_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfredusum_vs_f64m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m2_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m2_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m4_f64m1_tu( @@ -130,7 +130,7 @@ vfloat64m1_t test_vfredusum_vs_f64m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m4_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m4_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m8_f64m1_tu( @@ -139,7 +139,7 @@ vfloat64m1_t test_vfredusum_vs_f64m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m8_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m8_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16mf4_f16m1_tum( @@ -148,7 +148,7 @@ vfloat64m1_t test_vfredusum_vs_f64m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t maskedoff, vfloat16mf4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16mf4_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16mf4_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16mf2_f16m1_tum( @@ -157,7 +157,7 @@ vfloat16m1_t test_vfredusum_vs_f16mf4_f16m1_tum(vbool64_t mask, vfloat16m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t maskedoff, vfloat16mf2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16mf2_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16mf2_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m1_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16m1_t test_vfredusum_vs_f16mf2_f16m1_tum(vbool32_t mask, vfloat16m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m1_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m1_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m2_f16m1_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfredusum_vs_f16m1_f16m1_tum(vbool16_t mask, vfloat16m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t maskedoff, vfloat16m2_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m2_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m2_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m4_f16m1_tum( @@ -184,7 +184,7 @@ vfloat16m1_t test_vfredusum_vs_f16m2_f16m1_tum(vbool8_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t maskedoff, vfloat16m4_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m4_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m4_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f16m8_f16m1_tum( @@ -193,7 +193,7 @@ vfloat16m1_t test_vfredusum_vs_f16m4_f16m1_tum(vbool4_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfredusum_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t maskedoff, vfloat16m8_t vector, vfloat16m1_t scalar, size_t vl) { - return vfredusum_vs_f16m8_f16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f16m8_f16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32mf2_f32m1_tum( @@ -202,7 +202,7 @@ vfloat16m1_t test_vfredusum_vs_f16m8_f16m1_tum(vbool2_t mask, vfloat16m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t maskedoff, vfloat32mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m1_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfredusum_vs_f32mf2_f32m1_tum(vbool64_t mask, vfloat32m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m2_f32m1_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfredusum_vs_f32m1_f32m1_tum(vbool32_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t maskedoff, vfloat32m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m4_f32m1_tum( @@ -229,7 +229,7 @@ vfloat32m1_t test_vfredusum_vs_f32m2_f32m1_tum(vbool16_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t maskedoff, vfloat32m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f32m8_f32m1_tum( @@ -238,7 +238,7 @@ vfloat32m1_t test_vfredusum_vs_f32m4_f32m1_tum(vbool8_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfredusum_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t maskedoff, vfloat32m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfredusum_vs_f32m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f32m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m1_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m1_t test_vfredusum_vs_f32m8_f32m1_tum(vbool4_t mask, vfloat32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m2_f64m1_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfredusum_vs_f64m1_f64m1_tum(vbool64_t mask, vfloat64m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t maskedoff, vfloat64m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m4_f64m1_tum( @@ -265,7 +265,7 @@ vfloat64m1_t test_vfredusum_vs_f64m2_f64m1_tum(vbool32_t mask, vfloat64m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t maskedoff, vfloat64m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfredusum_vs_f64m8_f64m1_tum( @@ -274,6 +274,6 @@ vfloat64m1_t test_vfredusum_vs_f64m4_f64m1_tum(vbool16_t mask, vfloat64m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfredusum_vs_f64m8_f64m1_tum(vbool8_t mask, vfloat64m1_t maskedoff, vfloat64m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfredusum_vs_f64m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfredusum_vs_f64m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrsqrt7.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrsqrt7.c index 7649d5be503c9d9c0874492c3f9fa89ef63804f6..649d9895f9f5361aafaffa325ec993403f92a903 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrsqrt7.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrsqrt7.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsqrt7_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfrsqrt7_v_f16mf4_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfrsqrt7_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsqrt7_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfrsqrt7_v_f16mf2_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfrsqrt7_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsqrt7_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfrsqrt7_v_f16m1_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfrsqrt7_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsqrt7_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfrsqrt7_v_f16m2_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfrsqrt7_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsqrt7_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfrsqrt7_v_f16m4_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfrsqrt7_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsqrt7_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfrsqrt7_v_f16m8_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfrsqrt7_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsqrt7_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfrsqrt7_v_f32mf2_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfrsqrt7_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsqrt7_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfrsqrt7_v_f32m1_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfrsqrt7_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsqrt7_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfrsqrt7_v_f32m2_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfrsqrt7_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsqrt7_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfrsqrt7_v_f32m4_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfrsqrt7_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsqrt7_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfrsqrt7_v_f32m8_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfrsqrt7_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsqrt7_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfrsqrt7_v_f64m1_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfrsqrt7_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsqrt7_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfrsqrt7_v_f64m2_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfrsqrt7_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsqrt7_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfrsqrt7_v_f64m4_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfrsqrt7_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsqrt7_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfrsqrt7_v_f64m8_tu(maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfrsqrt7_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsqrt7_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfrsqrt7_v_f16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfrsqrt7_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsqrt7_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfrsqrt7_v_f16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfrsqrt7_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsqrt7_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfrsqrt7_v_f16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfrsqrt7_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsqrt7_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfrsqrt7_v_f16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfrsqrt7_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsqrt7_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfrsqrt7_v_f16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfrsqrt7_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsqrt7_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfrsqrt7_v_f16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfrsqrt7_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsqrt7_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfrsqrt7_v_f32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfrsqrt7_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsqrt7_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfrsqrt7_v_f32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfrsqrt7_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsqrt7_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfrsqrt7_v_f32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfrsqrt7_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsqrt7_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfrsqrt7_v_f32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfrsqrt7_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsqrt7_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfrsqrt7_v_f32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfrsqrt7_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsqrt7_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfrsqrt7_v_f64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfrsqrt7_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsqrt7_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfrsqrt7_v_f64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfrsqrt7_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsqrt7_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfrsqrt7_v_f64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfrsqrt7_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsqrt7_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfrsqrt7_v_f64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfrsqrt7_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsqrt7_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfrsqrt7_v_f16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfrsqrt7_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsqrt7_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfrsqrt7_v_f16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfrsqrt7_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsqrt7_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfrsqrt7_v_f16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfrsqrt7_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsqrt7_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfrsqrt7_v_f16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfrsqrt7_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsqrt7_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfrsqrt7_v_f16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfrsqrt7_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsqrt7_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfrsqrt7_v_f16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfrsqrt7_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsqrt7_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfrsqrt7_v_f32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfrsqrt7_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsqrt7_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfrsqrt7_v_f32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfrsqrt7_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsqrt7_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfrsqrt7_v_f32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfrsqrt7_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsqrt7_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfrsqrt7_v_f32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfrsqrt7_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsqrt7_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfrsqrt7_v_f32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfrsqrt7_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsqrt7_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfrsqrt7_v_f64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfrsqrt7_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsqrt7_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfrsqrt7_v_f64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfrsqrt7_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsqrt7_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfrsqrt7_v_f64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfrsqrt7_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsqrt7_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfrsqrt7_v_f64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfrsqrt7_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsqrt7_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfrsqrt7_v_f16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfrsqrt7_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsqrt7_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfrsqrt7_v_f16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfrsqrt7_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsqrt7_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfrsqrt7_v_f16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfrsqrt7_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsqrt7_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfrsqrt7_v_f16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfrsqrt7_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsqrt7_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfrsqrt7_v_f16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfrsqrt7_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsqrt7_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfrsqrt7_v_f16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfrsqrt7_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsqrt7_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfrsqrt7_v_f32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfrsqrt7_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsqrt7_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfrsqrt7_v_f32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfrsqrt7_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsqrt7_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfrsqrt7_v_f32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfrsqrt7_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsqrt7_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfrsqrt7_v_f32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfrsqrt7_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsqrt7_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfrsqrt7_v_f32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfrsqrt7_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsqrt7_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfrsqrt7_v_f64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfrsqrt7_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsqrt7_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfrsqrt7_v_f64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfrsqrt7_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsqrt7_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfrsqrt7_v_f64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfrsqrt7_v_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfrsqrt7_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsqrt7_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfrsqrt7_v_f64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfrsqrt7_v_f64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrsub.c index ca99198611b90abc302b70d304c7ed9f762a24a1..784ae88959a74775301386bc2cbb589a401ac70d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfrsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsub_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfrsub_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsub_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfrsub_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsub_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfrsub_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsub_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfrsub_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsub_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfrsub_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsub_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfrsub_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsub_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfrsub_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsub_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfrsub_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsub_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfrsub_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsub_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfrsub_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsub_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfrsub_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsub_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfrsub_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsub_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfrsub_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsub_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfrsub_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsub_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfrsub_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsub_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfrsub_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsub_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfrsub_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsub_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfrsub_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsub_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfrsub_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsub_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfrsub_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsub_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfrsub_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfrsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfrsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfrsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfrsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfrsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfrsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfrsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfrsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfrsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsub_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfrsub_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsub_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfrsub_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsub_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfrsub_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsub_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfrsub_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsub_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfrsub_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsub_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfrsub_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfrsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfrsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfrsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfrsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfrsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfrsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfrsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfrsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfrsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfrsub_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfrsub_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfrsub_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfrsub_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfrsub_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfrsub_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfrsub_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfrsub_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfrsub_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfrsub_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfrsub_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfrsub_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfrsub_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfrsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfrsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfrsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfrsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfrsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfrsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfrsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfrsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfrsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfrsub_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfrsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfrsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfrsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfrsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfrsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfrsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfrsub_vf_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfrsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfrsub_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfrsub_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfrsub_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnj.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnj.c index 151f13692ce06dab4820668af82d7ef2734ec270..375237f753192832c70900c12b91455e96a0516c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnj.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnj.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnj_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsgnj_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfsgnj_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnj_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfsgnj_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfsgnj_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnj_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfsgnj_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfsgnj_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnj_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfsgnj_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfsgnj_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnj_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfsgnj_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfsgnj_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnj_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfsgnj_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfsgnj_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnj_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfsgnj_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfsgnj_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnj_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfsgnj_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfsgnj_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnj_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfsgnj_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfsgnj_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnj_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfsgnj_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfsgnj_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnj_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfsgnj_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfsgnj_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnj_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfsgnj_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfsgnj_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnj_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfsgnj_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfsgnj_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnj_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfsgnj_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfsgnj_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnj_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfsgnj_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsgnj_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, d // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnj_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsgnj_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfsgnj_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnj_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfsgnj_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfsgnj_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnj_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfsgnj_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfsgnj_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnj_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfsgnj_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfsgnj_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnj_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfsgnj_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfsgnj_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnj_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfsgnj_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfsgnj_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnj_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfsgnj_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfsgnj_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnj_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfsgnj_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfsgnj_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnj_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfsgnj_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfsgnj_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnj_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfsgnj_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfsgnj_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnj_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfsgnj_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfsgnj_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnj_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfsgnj_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfsgnj_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnj_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfsgnj_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfsgnj_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnj_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfsgnj_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfsgnj_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnj_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfsgnj_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfsgnj_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnj_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfsgnj_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfsgnj_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnj_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfsgnj_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfsgnj_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnj_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfsgnj_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfsgnj_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnj_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfsgnj_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfsgnj_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnj_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfsgnj_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfsgnj_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnj_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfsgnj_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfsgnj_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnj_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfsgnj_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfsgnj_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnj_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfsgnj_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfsgnj_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnj_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfsgnj_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfsgnj_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnj_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfsgnj_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfsgnj_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnj_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfsgnj_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfsgnj_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnj_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfsgnj_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfsgnj_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnj_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfsgnj_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfsgnj_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnj_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfsgnj_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfsgnj_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnj_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfsgnj_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfsgnj_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnj_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfsgnj_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnj_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfsgnj_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnj_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfsgnj_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnj_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfsgnj_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnj_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfsgnj_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnj_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfsgnj_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnj_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfsgnj_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnj_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfsgnj_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnj_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfsgnj_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnj_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfsgnj_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnj_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfsgnj_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnj_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnj_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfsgnj_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnj_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfsgnj_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnj_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfsgnj_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnj_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfsgnj_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnj_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfsgnj_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnj_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfsgnj_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnj_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfsgnj_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnj_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfsgnj_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnj_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfsgnj_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnj_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfsgnj_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnj_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnj_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfsgnj_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnj_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfsgnj_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnj_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfsgnj_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnj_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfsgnj_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnj_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfsgnj_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnj_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfsgnj_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnj_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfsgnj_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnj_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnj_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfsgnj_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnj_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnj_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnj_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnjn.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnjn.c index f29dce0610888493063e9da8ba3ca4b1beefd40e..f5b7cb14d82bc5738d16b6ddd44a4ebb7c51f318 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnjn.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnjn.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjn_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsgnjn_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfsgnjn_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjn_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfsgnjn_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfsgnjn_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjn_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfsgnjn_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfsgnjn_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjn_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfsgnjn_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfsgnjn_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjn_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfsgnjn_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfsgnjn_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjn_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfsgnjn_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfsgnjn_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjn_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfsgnjn_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfsgnjn_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjn_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfsgnjn_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfsgnjn_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjn_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfsgnjn_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfsgnjn_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjn_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfsgnjn_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfsgnjn_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjn_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfsgnjn_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfsgnjn_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjn_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfsgnjn_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfsgnjn_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjn_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfsgnjn_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfsgnjn_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjn_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfsgnjn_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfsgnjn_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjn_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfsgnjn_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsgnjn_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjn_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsgnjn_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfsgnjn_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjn_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfsgnjn_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfsgnjn_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjn_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfsgnjn_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfsgnjn_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjn_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfsgnjn_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfsgnjn_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjn_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfsgnjn_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfsgnjn_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjn_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfsgnjn_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfsgnjn_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjn_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfsgnjn_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfsgnjn_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjn_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfsgnjn_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfsgnjn_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjn_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfsgnjn_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfsgnjn_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjn_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfsgnjn_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfsgnjn_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjn_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfsgnjn_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfsgnjn_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjn_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfsgnjn_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfsgnjn_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjn_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfsgnjn_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfsgnjn_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjn_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfsgnjn_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfsgnjn_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjn_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfsgnjn_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfsgnjn_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjn_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfsgnjn_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfsgnjn_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjn_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfsgnjn_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfsgnjn_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjn_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfsgnjn_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfsgnjn_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjn_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfsgnjn_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfsgnjn_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjn_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfsgnjn_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfsgnjn_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjn_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfsgnjn_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfsgnjn_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjn_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfsgnjn_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfsgnjn_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjn_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfsgnjn_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfsgnjn_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjn_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfsgnjn_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfsgnjn_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjn_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfsgnjn_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfsgnjn_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjn_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfsgnjn_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfsgnjn_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjn_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfsgnjn_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfsgnjn_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjn_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfsgnjn_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfsgnjn_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjn_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfsgnjn_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfsgnjn_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjn_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfsgnjn_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfsgnjn_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjn_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfsgnjn_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjn_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfsgnjn_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjn_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfsgnjn_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjn_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfsgnjn_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjn_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfsgnjn_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjn_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfsgnjn_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjn_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfsgnjn_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjn_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfsgnjn_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjn_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfsgnjn_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjn_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfsgnjn_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjn_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfsgnjn_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjn_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjn_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfsgnjn_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjn_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfsgnjn_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjn_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfsgnjn_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjn_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfsgnjn_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjn_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfsgnjn_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjn_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfsgnjn_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjn_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfsgnjn_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjn_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfsgnjn_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjn_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfsgnjn_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjn_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfsgnjn_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjn_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjn_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfsgnjn_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjn_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfsgnjn_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjn_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfsgnjn_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjn_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfsgnjn_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjn_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfsgnjn_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjn_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfsgnjn_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjn_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfsgnjn_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjn_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjn_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfsgnjn_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjn_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjn_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjn_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnjx.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnjx.c index 3f7b4d782261b7bea5714b658c075ebc94ab3ad5..5c2adf589013e148f656cafeadd303c2cd8c5929 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnjx.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsgnjx.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjx_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsgnjx_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfsgnjx_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjx_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfsgnjx_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfsgnjx_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjx_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfsgnjx_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfsgnjx_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjx_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfsgnjx_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfsgnjx_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjx_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfsgnjx_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfsgnjx_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjx_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfsgnjx_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfsgnjx_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjx_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfsgnjx_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfsgnjx_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjx_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfsgnjx_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfsgnjx_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjx_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfsgnjx_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfsgnjx_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjx_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfsgnjx_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfsgnjx_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjx_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfsgnjx_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfsgnjx_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjx_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfsgnjx_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfsgnjx_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjx_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfsgnjx_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfsgnjx_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjx_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfsgnjx_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfsgnjx_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjx_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfsgnjx_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsgnjx_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjx_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsgnjx_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfsgnjx_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjx_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfsgnjx_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfsgnjx_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjx_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfsgnjx_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfsgnjx_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjx_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfsgnjx_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfsgnjx_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjx_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfsgnjx_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfsgnjx_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjx_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfsgnjx_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfsgnjx_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjx_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfsgnjx_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfsgnjx_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjx_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfsgnjx_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfsgnjx_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjx_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfsgnjx_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfsgnjx_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjx_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfsgnjx_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfsgnjx_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjx_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfsgnjx_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfsgnjx_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjx_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfsgnjx_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfsgnjx_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjx_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfsgnjx_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfsgnjx_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjx_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfsgnjx_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfsgnjx_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjx_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfsgnjx_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfsgnjx_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjx_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfsgnjx_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfsgnjx_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjx_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfsgnjx_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfsgnjx_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjx_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfsgnjx_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfsgnjx_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjx_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfsgnjx_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfsgnjx_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjx_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfsgnjx_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfsgnjx_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjx_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfsgnjx_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfsgnjx_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjx_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfsgnjx_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfsgnjx_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjx_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfsgnjx_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfsgnjx_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjx_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfsgnjx_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfsgnjx_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjx_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfsgnjx_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfsgnjx_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjx_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfsgnjx_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfsgnjx_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjx_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfsgnjx_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfsgnjx_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjx_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfsgnjx_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfsgnjx_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjx_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfsgnjx_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfsgnjx_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjx_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfsgnjx_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfsgnjx_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsgnjx_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfsgnjx_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsgnjx_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfsgnjx_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsgnjx_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfsgnjx_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsgnjx_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfsgnjx_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsgnjx_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfsgnjx_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsgnjx_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfsgnjx_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsgnjx_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfsgnjx_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsgnjx_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfsgnjx_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsgnjx_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfsgnjx_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsgnjx_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfsgnjx_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsgnjx_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfsgnjx_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsgnjx_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsgnjx_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfsgnjx_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsgnjx_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfsgnjx_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsgnjx_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfsgnjx_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsgnjx_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfsgnjx_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsgnjx_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfsgnjx_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsgnjx_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfsgnjx_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsgnjx_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfsgnjx_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsgnjx_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfsgnjx_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsgnjx_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfsgnjx_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsgnjx_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfsgnjx_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsgnjx_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsgnjx_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfsgnjx_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsgnjx_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfsgnjx_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsgnjx_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfsgnjx_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsgnjx_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfsgnjx_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsgnjx_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfsgnjx_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsgnjx_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfsgnjx_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsgnjx_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfsgnjx_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsgnjx_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsgnjx_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfsgnjx_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsgnjx_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsgnjx_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsgnjx_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfslide1down.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfslide1down.c index 7f948a9a854e2481849211d15b409a25cca1fc6e..359ccd2e4ea2a837995396885e72e85fad314b7b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfslide1down.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfslide1down.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1down_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf4_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfslide1down_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1down_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfslide1down_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1down_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m1_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfslide1down_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1down_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfslide1down_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1down_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m4_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfslide1down_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1down_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m8_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfslide1down_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1down_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1down_vf_f32mf2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfslide1down_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1down_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t src, float value, size_t vl) { - return vfslide1down_vf_f32m1_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfslide1down_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1down_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t src, float value, size_t vl) { - return vfslide1down_vf_f32m2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfslide1down_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1down_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t src, float value, size_t vl) { - return vfslide1down_vf_f32m4_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfslide1down_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1down_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t src, float value, size_t vl) { - return vfslide1down_vf_f32m8_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfslide1down_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1down_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t src, double value, size_t vl) { - return vfslide1down_vf_f64m1_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfslide1down_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1down_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t src, double value, size_t vl) { - return vfslide1down_vf_f64m2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfslide1down_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1down_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t src, double value, size_t vl) { - return vfslide1down_vf_f64m4_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfslide1down_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1down_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t src, double value, size_t vl) { - return vfslide1down_vf_f64m8_tu(maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfslide1down_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1down_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfslide1down_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1down_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfslide1down_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1down_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfslide1down_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1down_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfslide1down_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1down_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfslide1down_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1down_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfslide1down_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1down_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1down_vf_f32mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfslide1down_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1down_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, float value, size_t vl) { - return vfslide1down_vf_f32m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfslide1down_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1down_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, float value, size_t vl) { - return vfslide1down_vf_f32m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfslide1down_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1down_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, float value, size_t vl) { - return vfslide1down_vf_f32m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfslide1down_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1down_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, float value, size_t vl) { - return vfslide1down_vf_f32m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfslide1down_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1down_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, double value, size_t vl) { - return vfslide1down_vf_f64m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfslide1down_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1down_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, double value, size_t vl) { - return vfslide1down_vf_f64m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfslide1down_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1down_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, double value, size_t vl) { - return vfslide1down_vf_f64m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfslide1down_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1down_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, double value, size_t vl) { - return vfslide1down_vf_f64m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfslide1down_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1down_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfslide1down_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1down_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfslide1down_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1down_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfslide1down_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1down_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfslide1down_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1down_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfslide1down_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1down_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfslide1down_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1down_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1down_vf_f32mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfslide1down_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1down_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, float value, size_t vl) { - return vfslide1down_vf_f32m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfslide1down_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1down_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, float value, size_t vl) { - return vfslide1down_vf_f32m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfslide1down_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1down_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, float value, size_t vl) { - return vfslide1down_vf_f32m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfslide1down_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1down_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, float value, size_t vl) { - return vfslide1down_vf_f32m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfslide1down_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1down_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, double value, size_t vl) { - return vfslide1down_vf_f64m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfslide1down_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1down_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, double value, size_t vl) { - return vfslide1down_vf_f64m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfslide1down_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1down_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, double value, size_t vl) { - return vfslide1down_vf_f64m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfslide1down_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1down_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, double value, size_t vl) { - return vfslide1down_vf_f64m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfslide1down_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1down_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfslide1down_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1down_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfslide1down_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1down_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfslide1down_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1down_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfslide1down_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1down_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfslide1down_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1down_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1down_vf_f16m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f16m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfslide1down_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1down_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1down_vf_f32mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfslide1down_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1down_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, float value, size_t vl) { - return vfslide1down_vf_f32m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfslide1down_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1down_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, float value, size_t vl) { - return vfslide1down_vf_f32m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfslide1down_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1down_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, float value, size_t vl) { - return vfslide1down_vf_f32m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfslide1down_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1down_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, float value, size_t vl) { - return vfslide1down_vf_f32m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f32m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfslide1down_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1down_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, double value, size_t vl) { - return vfslide1down_vf_f64m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfslide1down_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1down_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, double value, size_t vl) { - return vfslide1down_vf_f64m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfslide1down_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1down_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, double value, size_t vl) { - return vfslide1down_vf_f64m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1down_vf_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfslide1down_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1down_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, double value, size_t vl) { - return vfslide1down_vf_f64m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1down_vf_f64m8_mu(mask, maskedoff, src, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfslide1up.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfslide1up.c index 282dcf10d2cec2f9ce981007b742e87c88582fcc..390b90b447911c9d6167bba6a86345251b2ef617 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfslide1up.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfslide1up.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1up_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf4_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfslide1up_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1up_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfslide1up_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1up_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m1_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfslide1up_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1up_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfslide1up_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1up_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m4_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfslide1up_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1up_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m8_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfslide1up_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1up_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1up_vf_f32mf2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfslide1up_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1up_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t src, float value, size_t vl) { - return vfslide1up_vf_f32m1_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfslide1up_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1up_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t src, float value, size_t vl) { - return vfslide1up_vf_f32m2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfslide1up_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1up_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t src, float value, size_t vl) { - return vfslide1up_vf_f32m4_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfslide1up_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1up_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t src, float value, size_t vl) { - return vfslide1up_vf_f32m8_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfslide1up_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1up_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t src, double value, size_t vl) { - return vfslide1up_vf_f64m1_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfslide1up_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1up_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t src, double value, size_t vl) { - return vfslide1up_vf_f64m2_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfslide1up_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1up_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t src, double value, size_t vl) { - return vfslide1up_vf_f64m4_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfslide1up_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1up_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t src, double value, size_t vl) { - return vfslide1up_vf_f64m8_tu(maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfslide1up_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1up_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfslide1up_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1up_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfslide1up_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1up_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfslide1up_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1up_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfslide1up_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1up_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfslide1up_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1up_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfslide1up_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1up_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1up_vf_f32mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfslide1up_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1up_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, float value, size_t vl) { - return vfslide1up_vf_f32m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfslide1up_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1up_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, float value, size_t vl) { - return vfslide1up_vf_f32m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfslide1up_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1up_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, float value, size_t vl) { - return vfslide1up_vf_f32m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfslide1up_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1up_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, float value, size_t vl) { - return vfslide1up_vf_f32m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfslide1up_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1up_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, double value, size_t vl) { - return vfslide1up_vf_f64m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfslide1up_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1up_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, double value, size_t vl) { - return vfslide1up_vf_f64m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfslide1up_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1up_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, double value, size_t vl) { - return vfslide1up_vf_f64m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfslide1up_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1up_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, double value, size_t vl) { - return vfslide1up_vf_f64m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfslide1up_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1up_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfslide1up_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1up_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfslide1up_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1up_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfslide1up_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1up_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfslide1up_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1up_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfslide1up_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1up_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfslide1up_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1up_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1up_vf_f32mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfslide1up_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1up_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, float value, size_t vl) { - return vfslide1up_vf_f32m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfslide1up_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1up_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, float value, size_t vl) { - return vfslide1up_vf_f32m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfslide1up_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1up_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, float value, size_t vl) { - return vfslide1up_vf_f32m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfslide1up_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1up_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, float value, size_t vl) { - return vfslide1up_vf_f32m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfslide1up_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1up_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, double value, size_t vl) { - return vfslide1up_vf_f64m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfslide1up_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1up_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, double value, size_t vl) { - return vfslide1up_vf_f64m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfslide1up_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1up_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, double value, size_t vl) { - return vfslide1up_vf_f64m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfslide1up_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1up_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, double value, size_t vl) { - return vfslide1up_vf_f64m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfslide1up_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfslide1up_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfslide1up_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfslide1up_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfslide1up_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfslide1up_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfslide1up_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfslide1up_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfslide1up_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfslide1up_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfslide1up_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfslide1up_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, _Float16 value, size_t vl) { - return vfslide1up_vf_f16m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f16m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfslide1up_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfslide1up_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, float value, size_t vl) { - return vfslide1up_vf_f32mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfslide1up_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfslide1up_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, float value, size_t vl) { - return vfslide1up_vf_f32m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfslide1up_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfslide1up_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, float value, size_t vl) { - return vfslide1up_vf_f32m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfslide1up_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfslide1up_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, float value, size_t vl) { - return vfslide1up_vf_f32m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfslide1up_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfslide1up_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, float value, size_t vl) { - return vfslide1up_vf_f32m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f32m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfslide1up_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfslide1up_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, double value, size_t vl) { - return vfslide1up_vf_f64m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfslide1up_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfslide1up_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, double value, size_t vl) { - return vfslide1up_vf_f64m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfslide1up_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfslide1up_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, double value, size_t vl) { - return vfslide1up_vf_f64m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vfslide1up_vf_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfslide1up_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfslide1up_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, double value, size_t vl) { - return vfslide1up_vf_f64m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vfslide1up_vf_f64m8_mu(mask, maskedoff, src, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsqrt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsqrt.c index d3fe27d458ea7d876f44aec10c613c0f6e40d80a..47ba0c31993ab683fdb0e4ec12ca03aef5734721 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsqrt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsqrt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsqrt_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfsqrt_v_f16mf4_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsqrt_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsqrt_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfsqrt_v_f16mf2_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfsqrt_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsqrt_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfsqrt_v_f16m1_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfsqrt_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsqrt_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfsqrt_v_f16m2_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfsqrt_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsqrt_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfsqrt_v_f16m4_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfsqrt_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsqrt_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfsqrt_v_f16m8_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfsqrt_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsqrt_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfsqrt_v_f32mf2_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vfsqrt_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsqrt_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfsqrt_v_f32m1_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfsqrt_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsqrt_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfsqrt_v_f32m2_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfsqrt_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsqrt_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfsqrt_v_f32m4_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vfsqrt_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsqrt_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfsqrt_v_f32m8_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vfsqrt_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsqrt_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfsqrt_v_f64m1_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfsqrt_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsqrt_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfsqrt_v_f64m2_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfsqrt_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsqrt_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfsqrt_v_f64m4_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vfsqrt_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsqrt_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfsqrt_v_f64m8_tu(maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf4_tum( @@ -148,7 +148,7 @@ vfloat64m8_t test_vfsqrt_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsqrt_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfsqrt_v_f16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf2_tum( @@ -157,7 +157,7 @@ vfloat16mf4_t test_vfsqrt_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsqrt_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfsqrt_v_f16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m1_tum( @@ -166,7 +166,7 @@ vfloat16mf2_t test_vfsqrt_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsqrt_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfsqrt_v_f16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m2_tum( @@ -175,7 +175,7 @@ vfloat16m1_t test_vfsqrt_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsqrt_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfsqrt_v_f16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m4_tum( @@ -184,7 +184,7 @@ vfloat16m2_t test_vfsqrt_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsqrt_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfsqrt_v_f16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m8_tum( @@ -193,7 +193,7 @@ vfloat16m4_t test_vfsqrt_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsqrt_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfsqrt_v_f16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32mf2_tum( @@ -202,7 +202,7 @@ vfloat16m8_t test_vfsqrt_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsqrt_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfsqrt_v_f32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m1_tum( @@ -211,7 +211,7 @@ vfloat32mf2_t test_vfsqrt_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsqrt_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfsqrt_v_f32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vfsqrt_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsqrt_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfsqrt_v_f32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfsqrt_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsqrt_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfsqrt_v_f32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m8_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfsqrt_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsqrt_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfsqrt_v_f32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m1_tum( @@ -247,7 +247,7 @@ vfloat32m8_t test_vfsqrt_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsqrt_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfsqrt_v_f64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m2_tum( @@ -256,7 +256,7 @@ vfloat64m1_t test_vfsqrt_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsqrt_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfsqrt_v_f64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m4_tum( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfsqrt_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsqrt_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfsqrt_v_f64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m8_tum( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfsqrt_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsqrt_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfsqrt_v_f64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf4_tumu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsqrt_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsqrt_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfsqrt_v_f16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf2_tumu( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsqrt_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsqrt_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfsqrt_v_f16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m1_tumu( @@ -301,7 +301,7 @@ vfloat16mf2_t test_vfsqrt_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsqrt_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfsqrt_v_f16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m2_tumu( @@ -310,7 +310,7 @@ vfloat16m1_t test_vfsqrt_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsqrt_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfsqrt_v_f16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m4_tumu( @@ -319,7 +319,7 @@ vfloat16m2_t test_vfsqrt_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsqrt_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfsqrt_v_f16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m8_tumu( @@ -328,7 +328,7 @@ vfloat16m4_t test_vfsqrt_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsqrt_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfsqrt_v_f16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat16m8_t test_vfsqrt_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsqrt_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfsqrt_v_f32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m1_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfsqrt_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsqrt_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfsqrt_v_f32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m2_tumu( @@ -355,7 +355,7 @@ vfloat32m1_t test_vfsqrt_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsqrt_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfsqrt_v_f32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m4_tumu( @@ -364,7 +364,7 @@ vfloat32m2_t test_vfsqrt_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsqrt_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfsqrt_v_f32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m8_tumu( @@ -373,7 +373,7 @@ vfloat32m4_t test_vfsqrt_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsqrt_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfsqrt_v_f32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m1_tumu( @@ -382,7 +382,7 @@ vfloat32m8_t test_vfsqrt_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsqrt_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfsqrt_v_f64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m2_tumu( @@ -391,7 +391,7 @@ vfloat64m1_t test_vfsqrt_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsqrt_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfsqrt_v_f64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m4_tumu( @@ -400,7 +400,7 @@ vfloat64m2_t test_vfsqrt_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsqrt_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfsqrt_v_f64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m8_tumu( @@ -409,7 +409,7 @@ vfloat64m4_t test_vfsqrt_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsqrt_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfsqrt_v_f64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf4_mu( @@ -418,7 +418,7 @@ vfloat64m8_t test_vfsqrt_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsqrt_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t vl) { - return vfsqrt_v_f16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16mf2_mu( @@ -427,7 +427,7 @@ vfloat16mf4_t test_vfsqrt_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsqrt_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t vl) { - return vfsqrt_v_f16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m1_mu( @@ -436,7 +436,7 @@ vfloat16mf2_t test_vfsqrt_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsqrt_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t vl) { - return vfsqrt_v_f16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m2_mu( @@ -445,7 +445,7 @@ vfloat16m1_t test_vfsqrt_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsqrt_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t vl) { - return vfsqrt_v_f16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m4_mu( @@ -454,7 +454,7 @@ vfloat16m2_t test_vfsqrt_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsqrt_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t vl) { - return vfsqrt_v_f16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f16m8_mu( @@ -463,7 +463,7 @@ vfloat16m4_t test_vfsqrt_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsqrt_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t vl) { - return vfsqrt_v_f16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32mf2_mu( @@ -472,7 +472,7 @@ vfloat16m8_t test_vfsqrt_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsqrt_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t vl) { - return vfsqrt_v_f32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m1_mu( @@ -481,7 +481,7 @@ vfloat32mf2_t test_vfsqrt_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsqrt_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t vl) { - return vfsqrt_v_f32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m2_mu( @@ -490,7 +490,7 @@ vfloat32m1_t test_vfsqrt_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsqrt_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t vl) { - return vfsqrt_v_f32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m4_mu( @@ -499,7 +499,7 @@ vfloat32m2_t test_vfsqrt_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsqrt_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t vl) { - return vfsqrt_v_f32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f32m8_mu( @@ -508,7 +508,7 @@ vfloat32m4_t test_vfsqrt_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsqrt_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t vl) { - return vfsqrt_v_f32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m1_mu( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfsqrt_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsqrt_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t vl) { - return vfsqrt_v_f64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m2_mu( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfsqrt_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsqrt_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t vl) { - return vfsqrt_v_f64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m4_mu( @@ -535,7 +535,7 @@ vfloat64m2_t test_vfsqrt_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsqrt_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t vl) { - return vfsqrt_v_f64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vfsqrt_v_f64m8_mu( @@ -544,6 +544,6 @@ vfloat64m4_t test_vfsqrt_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsqrt_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t vl) { - return vfsqrt_v_f64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vfsqrt_v_f64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsub.c index eca6cc2b477d6e9e28c13df18df1bcbedecf7e27..ab5aaf04f2ba5cff2db0f0ae27fac39d915b40fa 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsub_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfsub_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vfsub_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsub_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vfsub_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vfsub_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsub_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vfsub_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vfsub_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsub_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vfsub_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vfsub_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsub_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vfsub_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vfsub_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsub_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vfsub_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfsub_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, _F // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsub_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vfsub_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsub_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vfsub_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsub_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfsub_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsub_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfsub_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsub_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vfsub_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsub_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vfsub_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsub_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vfsub_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsub_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vfsub_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsub_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vfsub_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsub_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vfsub_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsub_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfsub_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsub_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfsub_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsub_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfsub_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsub_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfsub_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsub_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vfsub_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsub_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vfsub_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsub_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vfsub_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsub_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf4_tum( @@ -283,7 +283,7 @@ vfloat64m8_t test_vfsub_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, do // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsub_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf4_tum( @@ -292,7 +292,7 @@ vfloat16mf4_t test_vfsub_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf2_tum( @@ -301,7 +301,7 @@ vfloat16mf4_t test_vfsub_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsub_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf2_tum( @@ -310,7 +310,7 @@ vfloat16mf2_t test_vfsub_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m1_tum( @@ -319,7 +319,7 @@ vfloat16mf2_t test_vfsub_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsub_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m1_tum( @@ -328,7 +328,7 @@ vfloat16m1_t test_vfsub_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m2_tum( @@ -337,7 +337,7 @@ vfloat16m1_t test_vfsub_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsub_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m2_tum( @@ -346,7 +346,7 @@ vfloat16m2_t test_vfsub_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m4_tum( @@ -355,7 +355,7 @@ vfloat16m2_t test_vfsub_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsub_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m4_tum( @@ -364,7 +364,7 @@ vfloat16m4_t test_vfsub_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m8_tum( @@ -373,7 +373,7 @@ vfloat16m4_t test_vfsub_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsub_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m8_tum( @@ -382,7 +382,7 @@ vfloat16m8_t test_vfsub_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32mf2_tum( @@ -391,7 +391,7 @@ vfloat16m8_t test_vfsub_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsub_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32mf2_tum( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfsub_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsub_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m1_tum( @@ -409,7 +409,7 @@ vfloat32mf2_t test_vfsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsub_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m1_tum( @@ -418,7 +418,7 @@ vfloat32m1_t test_vfsub_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsub_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m1_t test_vfsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsub_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfsub_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsub_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsub_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfsub_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsub_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m8_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsub_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m8_tum( @@ -472,7 +472,7 @@ vfloat32m8_t test_vfsub_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsub_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m8_t test_vfsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsub_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m1_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vfsub_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsub_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m2_tum( @@ -499,7 +499,7 @@ vfloat64m1_t test_vfsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsub_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m2_tum( @@ -508,7 +508,7 @@ vfloat64m2_t test_vfsub_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsub_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m4_tum( @@ -517,7 +517,7 @@ vfloat64m2_t test_vfsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsub_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m4_tum( @@ -526,7 +526,7 @@ vfloat64m4_t test_vfsub_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsub_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m8_tum( @@ -535,7 +535,7 @@ vfloat64m4_t test_vfsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsub_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m8_tum( @@ -544,7 +544,7 @@ vfloat64m8_t test_vfsub_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsub_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf4_tumu( @@ -553,7 +553,7 @@ vfloat64m8_t test_vfsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsub_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf4_tumu( @@ -562,7 +562,7 @@ vfloat16mf4_t test_vfsub_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf2_tumu( @@ -571,7 +571,7 @@ vfloat16mf4_t test_vfsub_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsub_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf2_tumu( @@ -580,7 +580,7 @@ vfloat16mf2_t test_vfsub_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m1_tumu( @@ -589,7 +589,7 @@ vfloat16mf2_t test_vfsub_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsub_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m1_tumu( @@ -598,7 +598,7 @@ vfloat16m1_t test_vfsub_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m2_tumu( @@ -607,7 +607,7 @@ vfloat16m1_t test_vfsub_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsub_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m2_tumu( @@ -616,7 +616,7 @@ vfloat16m2_t test_vfsub_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m4_tumu( @@ -625,7 +625,7 @@ vfloat16m2_t test_vfsub_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsub_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m4_tumu( @@ -634,7 +634,7 @@ vfloat16m4_t test_vfsub_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m8_tumu( @@ -643,7 +643,7 @@ vfloat16m4_t test_vfsub_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsub_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m8_tumu( @@ -652,7 +652,7 @@ vfloat16m8_t test_vfsub_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat16m8_t test_vfsub_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsub_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfsub_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsub_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m1_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsub_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m1_tumu( @@ -688,7 +688,7 @@ vfloat32m1_t test_vfsub_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsub_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m2_tumu( @@ -697,7 +697,7 @@ vfloat32m1_t test_vfsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsub_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m2_tumu( @@ -706,7 +706,7 @@ vfloat32m2_t test_vfsub_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsub_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m4_tumu( @@ -715,7 +715,7 @@ vfloat32m2_t test_vfsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsub_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m4_tumu( @@ -724,7 +724,7 @@ vfloat32m4_t test_vfsub_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsub_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m8_tumu( @@ -733,7 +733,7 @@ vfloat32m4_t test_vfsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsub_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m8_tumu( @@ -742,7 +742,7 @@ vfloat32m8_t test_vfsub_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsub_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m1_tumu( @@ -751,7 +751,7 @@ vfloat32m8_t test_vfsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsub_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m1_tumu( @@ -760,7 +760,7 @@ vfloat64m1_t test_vfsub_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsub_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m2_tumu( @@ -769,7 +769,7 @@ vfloat64m1_t test_vfsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsub_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m2_tumu( @@ -778,7 +778,7 @@ vfloat64m2_t test_vfsub_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsub_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m4_tumu( @@ -787,7 +787,7 @@ vfloat64m2_t test_vfsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsub_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m4_tumu( @@ -796,7 +796,7 @@ vfloat64m4_t test_vfsub_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsub_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m8_tumu( @@ -805,7 +805,7 @@ vfloat64m4_t test_vfsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsub_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m8_tumu( @@ -814,7 +814,7 @@ vfloat64m8_t test_vfsub_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsub_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf4_mu( @@ -823,7 +823,7 @@ vfloat64m8_t test_vfsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfsub_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf4_mu( @@ -832,7 +832,7 @@ vfloat16mf4_t test_vfsub_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfsub_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16mf2_mu( @@ -841,7 +841,7 @@ vfloat16mf4_t test_vfsub_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfsub_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16mf2_mu( @@ -850,7 +850,7 @@ vfloat16mf2_t test_vfsub_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfsub_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m1_mu( @@ -859,7 +859,7 @@ vfloat16mf2_t test_vfsub_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfsub_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m1_mu( @@ -868,7 +868,7 @@ vfloat16m1_t test_vfsub_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfsub_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m2_mu( @@ -877,7 +877,7 @@ vfloat16m1_t test_vfsub_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfsub_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m2_mu( @@ -886,7 +886,7 @@ vfloat16m2_t test_vfsub_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfsub_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m4_mu( @@ -895,7 +895,7 @@ vfloat16m2_t test_vfsub_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfsub_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m4_mu( @@ -904,7 +904,7 @@ vfloat16m4_t test_vfsub_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfsub_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f16m8_mu( @@ -913,7 +913,7 @@ vfloat16m4_t test_vfsub_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vfsub_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f16m8_mu( @@ -922,7 +922,7 @@ vfloat16m8_t test_vfsub_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfsub_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vfsub_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32mf2_mu( @@ -931,7 +931,7 @@ vfloat16m8_t test_vfsub_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfsub_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32mf2_mu( @@ -940,7 +940,7 @@ vfloat32mf2_t test_vfsub_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfsub_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m1_mu( @@ -949,7 +949,7 @@ vfloat32mf2_t test_vfsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfsub_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m1_mu( @@ -958,7 +958,7 @@ vfloat32m1_t test_vfsub_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfsub_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m2_mu( @@ -967,7 +967,7 @@ vfloat32m1_t test_vfsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfsub_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m2_mu( @@ -976,7 +976,7 @@ vfloat32m2_t test_vfsub_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfsub_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m4_mu( @@ -985,7 +985,7 @@ vfloat32m2_t test_vfsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfsub_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m4_mu( @@ -994,7 +994,7 @@ vfloat32m4_t test_vfsub_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfsub_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f32m8_mu( @@ -1003,7 +1003,7 @@ vfloat32m4_t test_vfsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vfsub_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f32m8_mu( @@ -1012,7 +1012,7 @@ vfloat32m8_t test_vfsub_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vfsub_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m1_mu( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vfsub_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m1_mu( @@ -1030,7 +1030,7 @@ vfloat64m1_t test_vfsub_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vfsub_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m2_mu( @@ -1039,7 +1039,7 @@ vfloat64m1_t test_vfsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vfsub_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m2_mu( @@ -1048,7 +1048,7 @@ vfloat64m2_t test_vfsub_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vfsub_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m4_mu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vfsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vfsub_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m4_mu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vfsub_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vfsub_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vv_f64m8_mu( @@ -1075,7 +1075,7 @@ vfloat64m4_t test_vfsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vfsub_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfsub_vf_f64m8_mu( @@ -1084,6 +1084,6 @@ vfloat64m8_t test_vfsub_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfsub_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vfsub_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfsub_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwadd.c index c7f57726212a50d0d064e1b7db90297b3269eeb7..fef538c1bf7317bc4ff69f5888319445fc1f9e60 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32mf2_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwadd_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32mf2_tu( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwadd_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_wv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32mf2_tu( @@ -40,7 +40,7 @@ vfloat32mf2_t test_vfwadd_wv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m1_tu( @@ -49,7 +49,7 @@ vfloat32mf2_t test_vfwadd_wf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m1_tu( @@ -58,7 +58,7 @@ vfloat32m1_t test_vfwadd_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m1_tu( @@ -67,7 +67,7 @@ vfloat32m1_t test_vfwadd_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_wv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfwadd_wv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfwadd_wf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m2_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfwadd_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m2_tu( @@ -103,7 +103,7 @@ vfloat32m2_t test_vfwadd_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_wv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m2_tu( @@ -112,7 +112,7 @@ vfloat32m2_t test_vfwadd_wv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m4_tu( @@ -121,7 +121,7 @@ vfloat32m2_t test_vfwadd_wf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m4_tu( @@ -130,7 +130,7 @@ vfloat32m4_t test_vfwadd_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m4_tu( @@ -139,7 +139,7 @@ vfloat32m4_t test_vfwadd_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_wv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m4_tu( @@ -148,7 +148,7 @@ vfloat32m4_t test_vfwadd_wv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m8_tu( @@ -157,7 +157,7 @@ vfloat32m4_t test_vfwadd_wf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m8_tu( @@ -166,7 +166,7 @@ vfloat32m8_t test_vfwadd_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m8_tu( @@ -175,7 +175,7 @@ vfloat32m8_t test_vfwadd_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_wv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m8_tu( @@ -184,7 +184,7 @@ vfloat32m8_t test_vfwadd_wv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m1_tu( @@ -193,7 +193,7 @@ vfloat32m8_t test_vfwadd_wf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m1_tu( @@ -202,7 +202,7 @@ vfloat64m1_t test_vfwadd_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat64m1_t test_vfwadd_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_wv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfwadd_wv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfwadd_wf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfwadd_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m2_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfwadd_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_wv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m2_tu( @@ -256,7 +256,7 @@ vfloat64m2_t test_vfwadd_wv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m4_tu( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfwadd_wf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m4_tu( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfwadd_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m4_tu( @@ -283,7 +283,7 @@ vfloat64m4_t test_vfwadd_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_wv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m4_tu( @@ -292,7 +292,7 @@ vfloat64m4_t test_vfwadd_wv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m8_tu( @@ -301,7 +301,7 @@ vfloat64m4_t test_vfwadd_wf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m8_tu( @@ -310,7 +310,7 @@ vfloat64m8_t test_vfwadd_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m8_tu( @@ -319,7 +319,7 @@ vfloat64m8_t test_vfwadd_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_wv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m8_tu( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwadd_wv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32mf2_tum( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwadd_wf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32mf2_tum( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwadd_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32mf2_tum( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwadd_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_wv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32mf2_tum( @@ -364,7 +364,7 @@ vfloat32mf2_t test_vfwadd_wv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m1_tum( @@ -373,7 +373,7 @@ vfloat32mf2_t test_vfwadd_wf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m1_tum( @@ -382,7 +382,7 @@ vfloat32m1_t test_vfwadd_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m1_tum( @@ -391,7 +391,7 @@ vfloat32m1_t test_vfwadd_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_wv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m1_tum( @@ -400,7 +400,7 @@ vfloat32m1_t test_vfwadd_wv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m2_tum( @@ -409,7 +409,7 @@ vfloat32m1_t test_vfwadd_wf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m2_tum( @@ -418,7 +418,7 @@ vfloat32m2_t test_vfwadd_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m2_t test_vfwadd_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_wv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfwadd_wv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfwadd_wf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfwadd_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m4_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfwadd_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_wv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m4_tum( @@ -472,7 +472,7 @@ vfloat32m4_t test_vfwadd_wv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m8_tum( @@ -481,7 +481,7 @@ vfloat32m4_t test_vfwadd_wf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m8_tum( @@ -490,7 +490,7 @@ vfloat32m8_t test_vfwadd_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m8_tum( @@ -499,7 +499,7 @@ vfloat32m8_t test_vfwadd_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_wv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m8_tum( @@ -508,7 +508,7 @@ vfloat32m8_t test_vfwadd_wv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m1_tum( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfwadd_wf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m1_tum( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfwadd_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m1_tum( @@ -535,7 +535,7 @@ vfloat64m1_t test_vfwadd_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_wv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m1_tum( @@ -544,7 +544,7 @@ vfloat64m1_t test_vfwadd_wv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m2_tum( @@ -553,7 +553,7 @@ vfloat64m1_t test_vfwadd_wf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m2_tum( @@ -562,7 +562,7 @@ vfloat64m2_t test_vfwadd_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m2_tum( @@ -571,7 +571,7 @@ vfloat64m2_t test_vfwadd_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_wv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m2_tum( @@ -580,7 +580,7 @@ vfloat64m2_t test_vfwadd_wv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m4_tum( @@ -589,7 +589,7 @@ vfloat64m2_t test_vfwadd_wf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m4_tum( @@ -598,7 +598,7 @@ vfloat64m4_t test_vfwadd_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m4_tum( @@ -607,7 +607,7 @@ vfloat64m4_t test_vfwadd_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_wv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m4_tum( @@ -616,7 +616,7 @@ vfloat64m4_t test_vfwadd_wv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m8_tum( @@ -625,7 +625,7 @@ vfloat64m4_t test_vfwadd_wf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m8_tum( @@ -634,7 +634,7 @@ vfloat64m8_t test_vfwadd_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m8_tum( @@ -643,7 +643,7 @@ vfloat64m8_t test_vfwadd_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_wv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m8_tum( @@ -652,7 +652,7 @@ vfloat64m8_t test_vfwadd_wv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat64m8_t test_vfwadd_wf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfwadd_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32mf2_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfwadd_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_wv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32mf2_tumu( @@ -688,7 +688,7 @@ vfloat32mf2_t test_vfwadd_wv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m1_tumu( @@ -697,7 +697,7 @@ vfloat32mf2_t test_vfwadd_wf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m1_tumu( @@ -706,7 +706,7 @@ vfloat32m1_t test_vfwadd_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m1_tumu( @@ -715,7 +715,7 @@ vfloat32m1_t test_vfwadd_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_wv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m1_tumu( @@ -724,7 +724,7 @@ vfloat32m1_t test_vfwadd_wv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m2_tumu( @@ -733,7 +733,7 @@ vfloat32m1_t test_vfwadd_wf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m2_tumu( @@ -742,7 +742,7 @@ vfloat32m2_t test_vfwadd_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m2_tumu( @@ -751,7 +751,7 @@ vfloat32m2_t test_vfwadd_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_wv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m2_tumu( @@ -760,7 +760,7 @@ vfloat32m2_t test_vfwadd_wv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m4_tumu( @@ -769,7 +769,7 @@ vfloat32m2_t test_vfwadd_wf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m4_tumu( @@ -778,7 +778,7 @@ vfloat32m4_t test_vfwadd_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m4_tumu( @@ -787,7 +787,7 @@ vfloat32m4_t test_vfwadd_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_wv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m4_tumu( @@ -796,7 +796,7 @@ vfloat32m4_t test_vfwadd_wv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m8_tumu( @@ -805,7 +805,7 @@ vfloat32m4_t test_vfwadd_wf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m8_tumu( @@ -814,7 +814,7 @@ vfloat32m8_t test_vfwadd_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m8_tumu( @@ -823,7 +823,7 @@ vfloat32m8_t test_vfwadd_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_wv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m8_tumu( @@ -832,7 +832,7 @@ vfloat32m8_t test_vfwadd_wv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m1_tumu( @@ -841,7 +841,7 @@ vfloat32m8_t test_vfwadd_wf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m1_tumu( @@ -850,7 +850,7 @@ vfloat64m1_t test_vfwadd_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m1_tumu( @@ -859,7 +859,7 @@ vfloat64m1_t test_vfwadd_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_wv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m1_tumu( @@ -868,7 +868,7 @@ vfloat64m1_t test_vfwadd_wv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m2_tumu( @@ -877,7 +877,7 @@ vfloat64m1_t test_vfwadd_wf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m2_tumu( @@ -886,7 +886,7 @@ vfloat64m2_t test_vfwadd_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m2_tumu( @@ -895,7 +895,7 @@ vfloat64m2_t test_vfwadd_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_wv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m2_tumu( @@ -904,7 +904,7 @@ vfloat64m2_t test_vfwadd_wv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m4_tumu( @@ -913,7 +913,7 @@ vfloat64m2_t test_vfwadd_wf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m4_tumu( @@ -922,7 +922,7 @@ vfloat64m4_t test_vfwadd_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m4_tumu( @@ -931,7 +931,7 @@ vfloat64m4_t test_vfwadd_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_wv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m4_tumu( @@ -940,7 +940,7 @@ vfloat64m4_t test_vfwadd_wv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m8_tumu( @@ -949,7 +949,7 @@ vfloat64m4_t test_vfwadd_wf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m8_tumu( @@ -958,7 +958,7 @@ vfloat64m8_t test_vfwadd_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m8_tumu( @@ -967,7 +967,7 @@ vfloat64m8_t test_vfwadd_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_wv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m8_tumu( @@ -976,7 +976,7 @@ vfloat64m8_t test_vfwadd_wv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32mf2_mu( @@ -985,7 +985,7 @@ vfloat64m8_t test_vfwadd_wf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32mf2_mu( @@ -994,7 +994,7 @@ vfloat32mf2_t test_vfwadd_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32mf2_mu( @@ -1003,7 +1003,7 @@ vfloat32mf2_t test_vfwadd_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwadd_wv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32mf2_mu( @@ -1012,7 +1012,7 @@ vfloat32mf2_t test_vfwadd_wv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwadd_wf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m1_mu( @@ -1021,7 +1021,7 @@ vfloat32mf2_t test_vfwadd_wf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m1_mu( @@ -1030,7 +1030,7 @@ vfloat32m1_t test_vfwadd_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m1_mu( @@ -1039,7 +1039,7 @@ vfloat32m1_t test_vfwadd_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwadd_wv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m1_mu( @@ -1048,7 +1048,7 @@ vfloat32m1_t test_vfwadd_wv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwadd_wf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m2_mu( @@ -1057,7 +1057,7 @@ vfloat32m1_t test_vfwadd_wf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m2_mu( @@ -1066,7 +1066,7 @@ vfloat32m2_t test_vfwadd_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m2_mu( @@ -1075,7 +1075,7 @@ vfloat32m2_t test_vfwadd_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwadd_wv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m2_mu( @@ -1084,7 +1084,7 @@ vfloat32m2_t test_vfwadd_wv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwadd_wf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m4_mu( @@ -1093,7 +1093,7 @@ vfloat32m2_t test_vfwadd_wf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m4_mu( @@ -1102,7 +1102,7 @@ vfloat32m4_t test_vfwadd_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m4_mu( @@ -1111,7 +1111,7 @@ vfloat32m4_t test_vfwadd_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwadd_wv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m4_mu( @@ -1120,7 +1120,7 @@ vfloat32m4_t test_vfwadd_wv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwadd_wf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f32m8_mu( @@ -1129,7 +1129,7 @@ vfloat32m4_t test_vfwadd_wf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f32m8_mu( @@ -1138,7 +1138,7 @@ vfloat32m8_t test_vfwadd_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwadd_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f32m8_mu( @@ -1147,7 +1147,7 @@ vfloat32m8_t test_vfwadd_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwadd_wv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f32m8_mu( @@ -1156,7 +1156,7 @@ vfloat32m8_t test_vfwadd_wv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwadd_wf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwadd_wf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m1_mu( @@ -1165,7 +1165,7 @@ vfloat32m8_t test_vfwadd_wf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m1_mu( @@ -1174,7 +1174,7 @@ vfloat64m1_t test_vfwadd_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m1_mu( @@ -1183,7 +1183,7 @@ vfloat64m1_t test_vfwadd_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwadd_wv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m1_mu( @@ -1192,7 +1192,7 @@ vfloat64m1_t test_vfwadd_wv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwadd_wf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m2_mu( @@ -1201,7 +1201,7 @@ vfloat64m1_t test_vfwadd_wf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m2_mu( @@ -1210,7 +1210,7 @@ vfloat64m2_t test_vfwadd_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m2_mu( @@ -1219,7 +1219,7 @@ vfloat64m2_t test_vfwadd_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwadd_wv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m2_mu( @@ -1228,7 +1228,7 @@ vfloat64m2_t test_vfwadd_wv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwadd_wf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m4_mu( @@ -1237,7 +1237,7 @@ vfloat64m2_t test_vfwadd_wf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m4_mu( @@ -1246,7 +1246,7 @@ vfloat64m4_t test_vfwadd_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m4_mu( @@ -1255,7 +1255,7 @@ vfloat64m4_t test_vfwadd_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwadd_wv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m4_mu( @@ -1264,7 +1264,7 @@ vfloat64m4_t test_vfwadd_wv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwadd_wf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vv_f64m8_mu( @@ -1273,7 +1273,7 @@ vfloat64m4_t test_vfwadd_wf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_vf_f64m8_mu( @@ -1282,7 +1282,7 @@ vfloat64m8_t test_vfwadd_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwadd_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wv_f64m8_mu( @@ -1291,7 +1291,7 @@ vfloat64m8_t test_vfwadd_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwadd_wv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwadd_wf_f64m8_mu( @@ -1300,6 +1300,6 @@ vfloat64m8_t test_vfwadd_wv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwadd_wf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, float op2, size_t vl) { - return vfwadd_wf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwadd_wf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvt.c index 3cf427e09368e70e679c14d101c62c61a74ed2c2..109b70a2de258a73c0c20ed29a90969fd39ed436 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_tu(vfloat16mf4_t maskedoff, vint8mf8_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_tu(vfloat16mf4_t maskedoff, vint8mf8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_tu(vfloat16mf2_t maskedoff, vint8mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_tu(vfloat16mf2_t maskedoff, vint8mf4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_x_v_f16m1_tu(vfloat16m1_t maskedoff, vint8mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vfwcvt_f_x_v_f16m1_tu(vfloat16m1_t maskedoff, vint8mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_x_v_f16m2_tu(vfloat16m2_t maskedoff, vint8m1_t src, size_t vl) { - return vfwcvt_f_x_v_f16m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vfwcvt_f_x_v_f16m2_tu(vfloat16m2_t maskedoff, vint8m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_x_v_f16m4_tu(vfloat16m4_t maskedoff, vint8m2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vfwcvt_f_x_v_f16m4_tu(vfloat16m4_t maskedoff, vint8m2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_x_v_f16m8_tu(vfloat16m8_t maskedoff, vint8m4_t src, size_t vl) { - return vfwcvt_f_x_v_f16m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf4_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vfwcvt_f_x_v_f16m8_tu(vfloat16m8_t maskedoff, vint8m4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_tu(vfloat16mf4_t maskedoff, vuint8mf8_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf2_tu( @@ -76,7 +76,7 @@ vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_tu(vfloat16mf4_t maskedoff, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_tu(vfloat16mf2_t maskedoff, vuint8mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m1_tu( @@ -85,7 +85,7 @@ vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_tu(vfloat16mf2_t maskedoff, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_tu(vfloat16m1_t maskedoff, vuint8mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m2_tu( @@ -94,7 +94,7 @@ vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_tu(vfloat16m1_t maskedoff, vuint8mf2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_tu(vfloat16m2_t maskedoff, vuint8m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m4_tu( @@ -103,7 +103,7 @@ vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_tu(vfloat16m2_t maskedoff, vuint8m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_tu(vfloat16m4_t maskedoff, vuint8m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_tu(vfloat16m4_t maskedoff, vuint8m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_tu(vfloat16m8_t maskedoff, vuint8m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_tu(vfloat16m8_t maskedoff, vuint8m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_x_f_v_i32mf2_tu(vint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_x_f_v_i32mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32mf2_tu( @@ -130,7 +130,7 @@ vint32mf2_t test_vfwcvt_x_f_v_i32mf2_tu(vint32mf2_t maskedoff, vfloat16mf4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_tu(vint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m1_tu( @@ -139,7 +139,7 @@ vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_tu(vint32mf2_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_x_f_v_i32m1_tu(vint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m1_tu( @@ -148,7 +148,7 @@ vint32m1_t test_vfwcvt_x_f_v_i32m1_tu(vint32m1_t maskedoff, vfloat16mf2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_tu(vint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m2_tu( @@ -157,7 +157,7 @@ vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_tu(vint32m1_t maskedoff, vfloat16mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_x_f_v_i32m2_tu(vint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_x_f_v_i32m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m2_tu( @@ -166,7 +166,7 @@ vint32m2_t test_vfwcvt_x_f_v_i32m2_tu(vint32m2_t maskedoff, vfloat16m1_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_tu(vint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m4_tu( @@ -175,7 +175,7 @@ vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_tu(vint32m2_t maskedoff, vfloat16m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_x_f_v_i32m4_tu(vint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m4_tu( @@ -184,7 +184,7 @@ vint32m4_t test_vfwcvt_x_f_v_i32m4_tu(vint32m4_t maskedoff, vfloat16m2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_tu(vint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m8_tu( @@ -193,7 +193,7 @@ vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_tu(vint32m4_t maskedoff, vfloat16m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_x_f_v_i32m8_tu(vint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_x_f_v_i32m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m8_tu( @@ -202,7 +202,7 @@ vint32m8_t test_vfwcvt_x_f_v_i32m8_tu(vint32m8_t maskedoff, vfloat16m4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_tu(vint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32mf2_tu( @@ -211,7 +211,7 @@ vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_tu(vint32m8_t maskedoff, vfloat16m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32mf2_tu( @@ -220,7 +220,7 @@ vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m1_tu( @@ -229,7 +229,7 @@ vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_tu(vuint32mf2_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_xu_f_v_u32m1_tu(vuint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m1_tu( @@ -238,7 +238,7 @@ vuint32m1_t test_vfwcvt_xu_f_v_u32m1_tu(vuint32m1_t maskedoff, vfloat16mf2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_tu(vuint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m2_tu( @@ -247,7 +247,7 @@ vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_tu(vuint32m1_t maskedoff, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_xu_f_v_u32m2_tu(vuint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m2_tu( @@ -256,7 +256,7 @@ vuint32m2_t test_vfwcvt_xu_f_v_u32m2_tu(vuint32m2_t maskedoff, vfloat16m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_tu(vuint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m4_tu( @@ -265,7 +265,7 @@ vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_tu(vuint32m2_t maskedoff, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_xu_f_v_u32m4_tu(vuint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m4_tu( @@ -274,7 +274,7 @@ vuint32m4_t test_vfwcvt_xu_f_v_u32m4_tu(vuint32m4_t maskedoff, vfloat16m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_tu(vuint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m8_tu( @@ -283,7 +283,7 @@ vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_tu(vuint32m4_t maskedoff, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_xu_f_v_u32m8_tu(vuint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m8_tu( @@ -292,7 +292,7 @@ vuint32m8_t test_vfwcvt_xu_f_v_u32m8_tu(vuint32m8_t maskedoff, vfloat16m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_tu(vuint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32mf2_tu( @@ -301,7 +301,7 @@ vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_tu(vuint32m8_t maskedoff, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_tu(vfloat32mf2_t maskedoff, vint16mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m1_tu( @@ -310,7 +310,7 @@ vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_tu(vfloat32mf2_t maskedoff, vint16mf4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_x_v_f32m1_tu(vfloat32m1_t maskedoff, vint16mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m2_tu( @@ -319,7 +319,7 @@ vfloat32m1_t test_vfwcvt_f_x_v_f32m1_tu(vfloat32m1_t maskedoff, vint16mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_x_v_f32m2_tu(vfloat32m2_t maskedoff, vint16m1_t src, size_t vl) { - return vfwcvt_f_x_v_f32m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m4_tu( @@ -328,7 +328,7 @@ vfloat32m2_t test_vfwcvt_f_x_v_f32m2_tu(vfloat32m2_t maskedoff, vint16m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_x_v_f32m4_tu(vfloat32m4_t maskedoff, vint16m2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m8_tu( @@ -337,7 +337,7 @@ vfloat32m4_t test_vfwcvt_f_x_v_f32m4_tu(vfloat32m4_t maskedoff, vint16m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_x_v_f32m8_tu(vfloat32m8_t maskedoff, vint16m4_t src, size_t vl) { - return vfwcvt_f_x_v_f32m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32mf2_tu( @@ -346,7 +346,7 @@ vfloat32m8_t test_vfwcvt_f_x_v_f32m8_tu(vfloat32m8_t maskedoff, vint16m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_tu(vfloat32mf2_t maskedoff, vuint16mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m1_tu( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_tu(vfloat32mf2_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_tu(vfloat32m1_t maskedoff, vuint16mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m2_tu( @@ -364,7 +364,7 @@ vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_tu(vfloat32m1_t maskedoff, vuint16mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_tu(vfloat32m2_t maskedoff, vuint16m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m4_tu( @@ -373,7 +373,7 @@ vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_tu(vfloat32m2_t maskedoff, vuint16m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_tu(vfloat32m4_t maskedoff, vuint16m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m8_tu( @@ -382,7 +382,7 @@ vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_tu(vfloat32m4_t maskedoff, vuint16m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_tu(vfloat32m8_t maskedoff, vuint16m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32mf2_tu( @@ -391,7 +391,7 @@ vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_tu(vfloat32m8_t maskedoff, vuint16m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_f_f_v_f32mf2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m1_tu( @@ -400,7 +400,7 @@ vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_f_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m2_tu( @@ -409,7 +409,7 @@ vfloat32m1_t test_vfwcvt_f_f_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_f_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_f_f_v_f32m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m4_tu( @@ -418,7 +418,7 @@ vfloat32m2_t test_vfwcvt_f_f_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_f_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m8_tu( @@ -427,7 +427,7 @@ vfloat32m4_t test_vfwcvt_f_f_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_f_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_f_f_v_f32m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m1_tu( @@ -436,7 +436,7 @@ vfloat32m8_t test_vfwcvt_f_f_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_x_f_v_i64m1_tu(vint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m1_tu( @@ -445,7 +445,7 @@ vint64m1_t test_vfwcvt_x_f_v_i64m1_tu(vint64m1_t maskedoff, vfloat32mf2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_tu(vint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m2_tu( @@ -454,7 +454,7 @@ vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_tu(vint64m1_t maskedoff, vfloat32mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_x_f_v_i64m2_tu(vint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_x_f_v_i64m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m2_tu( @@ -463,7 +463,7 @@ vint64m2_t test_vfwcvt_x_f_v_i64m2_tu(vint64m2_t maskedoff, vfloat32m1_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_tu(vint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m4_tu( @@ -472,7 +472,7 @@ vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_tu(vint64m2_t maskedoff, vfloat32m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_x_f_v_i64m4_tu(vint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m4_tu( @@ -481,7 +481,7 @@ vint64m4_t test_vfwcvt_x_f_v_i64m4_tu(vint64m4_t maskedoff, vfloat32m2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_tu(vint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m8_tu( @@ -490,7 +490,7 @@ vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_tu(vint64m4_t maskedoff, vfloat32m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_x_f_v_i64m8_tu(vint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_x_f_v_i64m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m8_tu( @@ -499,7 +499,7 @@ vint64m8_t test_vfwcvt_x_f_v_i64m8_tu(vint64m8_t maskedoff, vfloat32m4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_tu(vint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m1_tu( @@ -508,7 +508,7 @@ vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_tu(vint64m8_t maskedoff, vfloat32m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_xu_f_v_u64m1_tu(vuint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m1_tu( @@ -517,7 +517,7 @@ vuint64m1_t test_vfwcvt_xu_f_v_u64m1_tu(vuint64m1_t maskedoff, vfloat32mf2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_tu(vuint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m2_tu( @@ -526,7 +526,7 @@ vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_tu(vuint64m1_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_xu_f_v_u64m2_tu(vuint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m2_tu( @@ -535,7 +535,7 @@ vuint64m2_t test_vfwcvt_xu_f_v_u64m2_tu(vuint64m2_t maskedoff, vfloat32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_tu(vuint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m4_tu( @@ -544,7 +544,7 @@ vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_tu(vuint64m2_t maskedoff, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_xu_f_v_u64m4_tu(vuint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m4_tu( @@ -553,7 +553,7 @@ vuint64m4_t test_vfwcvt_xu_f_v_u64m4_tu(vuint64m4_t maskedoff, vfloat32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_tu(vuint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m8_tu( @@ -562,7 +562,7 @@ vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_tu(vuint64m4_t maskedoff, vfloat32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_xu_f_v_u64m8_tu(vuint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m8_tu( @@ -571,7 +571,7 @@ vuint64m8_t test_vfwcvt_xu_f_v_u64m8_tu(vuint64m8_t maskedoff, vfloat32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_tu(vuint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m1_tu( @@ -580,7 +580,7 @@ vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_tu(vuint64m8_t maskedoff, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_x_v_f64m1_tu(vfloat64m1_t maskedoff, vint32mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m2_tu( @@ -589,7 +589,7 @@ vfloat64m1_t test_vfwcvt_f_x_v_f64m1_tu(vfloat64m1_t maskedoff, vint32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_x_v_f64m2_tu(vfloat64m2_t maskedoff, vint32m1_t src, size_t vl) { - return vfwcvt_f_x_v_f64m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m4_tu( @@ -598,7 +598,7 @@ vfloat64m2_t test_vfwcvt_f_x_v_f64m2_tu(vfloat64m2_t maskedoff, vint32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_x_v_f64m4_tu(vfloat64m4_t maskedoff, vint32m2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m8_tu( @@ -607,7 +607,7 @@ vfloat64m4_t test_vfwcvt_f_x_v_f64m4_tu(vfloat64m4_t maskedoff, vint32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_x_v_f64m8_tu(vfloat64m8_t maskedoff, vint32m4_t src, size_t vl) { - return vfwcvt_f_x_v_f64m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m1_tu( @@ -616,7 +616,7 @@ vfloat64m8_t test_vfwcvt_f_x_v_f64m8_tu(vfloat64m8_t maskedoff, vint32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_tu(vfloat64m1_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m2_tu( @@ -625,7 +625,7 @@ vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_tu(vfloat64m1_t maskedoff, vuint32mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_tu(vfloat64m2_t maskedoff, vuint32m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m4_tu( @@ -634,7 +634,7 @@ vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_tu(vfloat64m2_t maskedoff, vuint32m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_tu(vfloat64m4_t maskedoff, vuint32m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m8_tu( @@ -643,7 +643,7 @@ vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_tu(vfloat64m4_t maskedoff, vuint32m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_tu(vfloat64m8_t maskedoff, vuint32m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m1_tu( @@ -652,7 +652,7 @@ vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_tu(vfloat64m8_t maskedoff, vuint32m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_f_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m1_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m2_tu( @@ -661,7 +661,7 @@ vfloat64m1_t test_vfwcvt_f_f_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_f_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_f_f_v_f64m2_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m4_tu( @@ -670,7 +670,7 @@ vfloat64m2_t test_vfwcvt_f_f_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_f_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m4_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m8_tu( @@ -679,7 +679,7 @@ vfloat64m4_t test_vfwcvt_f_f_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_f_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_f_f_v_f64m8_tu(maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf4_tum( @@ -688,7 +688,7 @@ vfloat64m8_t test_vfwcvt_f_f_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vint8mf8_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf2_tum( @@ -697,7 +697,7 @@ vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vint8mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m1_tum( @@ -706,7 +706,7 @@ vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_x_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vint8mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m2_tum( @@ -715,7 +715,7 @@ vfloat16m1_t test_vfwcvt_f_x_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_x_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vint8m1_t src, size_t vl) { - return vfwcvt_f_x_v_f16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m4_tum( @@ -724,7 +724,7 @@ vfloat16m2_t test_vfwcvt_f_x_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_x_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vint8m2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m8_tum( @@ -733,7 +733,7 @@ vfloat16m4_t test_vfwcvt_f_x_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_x_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vint8m4_t src, size_t vl) { - return vfwcvt_f_x_v_f16m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf4_tum( @@ -742,7 +742,7 @@ vfloat16m8_t test_vfwcvt_f_x_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vuint8mf8_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf2_tum( @@ -751,7 +751,7 @@ vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vuint8mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m1_tum( @@ -760,7 +760,7 @@ vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vuint8mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m2_tum( @@ -769,7 +769,7 @@ vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vuint8m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m4_tum( @@ -778,7 +778,7 @@ vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vuint8m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m8_tum( @@ -787,7 +787,7 @@ vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vuint8m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32mf2_tum( @@ -796,7 +796,7 @@ vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_x_f_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_x_f_v_i32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32mf2_tum( @@ -805,7 +805,7 @@ vint32mf2_t test_vfwcvt_x_f_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m1_tum( @@ -814,7 +814,7 @@ vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_x_f_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m1_tum( @@ -823,7 +823,7 @@ vint32m1_t test_vfwcvt_x_f_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m2_tum( @@ -832,7 +832,7 @@ vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_x_f_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_x_f_v_i32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m2_tum( @@ -841,7 +841,7 @@ vint32m2_t test_vfwcvt_x_f_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m4_tum( @@ -850,7 +850,7 @@ vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_x_f_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m4_tum( @@ -859,7 +859,7 @@ vint32m4_t test_vfwcvt_x_f_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m8_tum( @@ -868,7 +868,7 @@ vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_x_f_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_x_f_v_i32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m8_tum( @@ -877,7 +877,7 @@ vint32m8_t test_vfwcvt_x_f_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32mf2_tum( @@ -886,7 +886,7 @@ vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32mf2_tum( @@ -895,7 +895,7 @@ vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m1_tum( @@ -904,7 +904,7 @@ vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_xu_f_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m1_tum( @@ -913,7 +913,7 @@ vuint32m1_t test_vfwcvt_xu_f_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m2_tum( @@ -922,7 +922,7 @@ vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_xu_f_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m2_tum( @@ -931,7 +931,7 @@ vuint32m2_t test_vfwcvt_xu_f_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m4_tum( @@ -940,7 +940,7 @@ vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_xu_f_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m4_tum( @@ -949,7 +949,7 @@ vuint32m4_t test_vfwcvt_xu_f_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m8_tum( @@ -958,7 +958,7 @@ vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_xu_f_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m8_tum( @@ -967,7 +967,7 @@ vuint32m8_t test_vfwcvt_xu_f_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32mf2_tum( @@ -976,7 +976,7 @@ vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vint16mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m1_tum( @@ -985,7 +985,7 @@ vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_x_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vint16mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m2_tum( @@ -994,7 +994,7 @@ vfloat32m1_t test_vfwcvt_f_x_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_x_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vint16m1_t src, size_t vl) { - return vfwcvt_f_x_v_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m4_tum( @@ -1003,7 +1003,7 @@ vfloat32m2_t test_vfwcvt_f_x_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_x_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vint16m2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m8_tum( @@ -1012,7 +1012,7 @@ vfloat32m4_t test_vfwcvt_f_x_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_x_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vint16m4_t src, size_t vl) { - return vfwcvt_f_x_v_f32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32mf2_tum( @@ -1021,7 +1021,7 @@ vfloat32m8_t test_vfwcvt_f_x_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vuint16mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m1_tum( @@ -1030,7 +1030,7 @@ vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vuint16mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m2_tum( @@ -1039,7 +1039,7 @@ vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vuint16m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m4_tum( @@ -1048,7 +1048,7 @@ vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vuint16m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m8_tum( @@ -1057,7 +1057,7 @@ vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vuint16m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32mf2_tum( @@ -1066,7 +1066,7 @@ vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_f_f_v_f32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m1_tum( @@ -1075,7 +1075,7 @@ vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_f_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m2_tum( @@ -1084,7 +1084,7 @@ vfloat32m1_t test_vfwcvt_f_f_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_f_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_f_f_v_f32m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m4_tum( @@ -1093,7 +1093,7 @@ vfloat32m2_t test_vfwcvt_f_f_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_f_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m8_tum( @@ -1102,7 +1102,7 @@ vfloat32m4_t test_vfwcvt_f_f_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_f_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_f_f_v_f32m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m1_tum( @@ -1111,7 +1111,7 @@ vfloat32m8_t test_vfwcvt_f_f_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_x_f_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m1_tum( @@ -1120,7 +1120,7 @@ vint64m1_t test_vfwcvt_x_f_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m2_tum( @@ -1129,7 +1129,7 @@ vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_x_f_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_x_f_v_i64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m2_tum( @@ -1138,7 +1138,7 @@ vint64m2_t test_vfwcvt_x_f_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m4_tum( @@ -1147,7 +1147,7 @@ vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_x_f_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m4_tum( @@ -1156,7 +1156,7 @@ vint64m4_t test_vfwcvt_x_f_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m8_tum( @@ -1165,7 +1165,7 @@ vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_x_f_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_x_f_v_i64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m8_tum( @@ -1174,7 +1174,7 @@ vint64m8_t test_vfwcvt_x_f_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m1_tum( @@ -1183,7 +1183,7 @@ vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_xu_f_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m1_tum( @@ -1192,7 +1192,7 @@ vuint64m1_t test_vfwcvt_xu_f_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m2_tum( @@ -1201,7 +1201,7 @@ vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_xu_f_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m2_tum( @@ -1210,7 +1210,7 @@ vuint64m2_t test_vfwcvt_xu_f_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m4_tum( @@ -1219,7 +1219,7 @@ vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_xu_f_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m4_tum( @@ -1228,7 +1228,7 @@ vuint64m4_t test_vfwcvt_xu_f_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m8_tum( @@ -1237,7 +1237,7 @@ vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_xu_f_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m8_tum( @@ -1246,7 +1246,7 @@ vuint64m8_t test_vfwcvt_xu_f_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m1_tum( @@ -1255,7 +1255,7 @@ vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_x_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vint32mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m2_tum( @@ -1264,7 +1264,7 @@ vfloat64m1_t test_vfwcvt_f_x_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_x_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vint32m1_t src, size_t vl) { - return vfwcvt_f_x_v_f64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m4_tum( @@ -1273,7 +1273,7 @@ vfloat64m2_t test_vfwcvt_f_x_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_x_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vint32m2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m8_tum( @@ -1282,7 +1282,7 @@ vfloat64m4_t test_vfwcvt_f_x_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_x_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vint32m4_t src, size_t vl) { - return vfwcvt_f_x_v_f64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m1_tum( @@ -1291,7 +1291,7 @@ vfloat64m8_t test_vfwcvt_f_x_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m2_tum( @@ -1300,7 +1300,7 @@ vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vuint32m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m4_tum( @@ -1309,7 +1309,7 @@ vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vuint32m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m8_tum( @@ -1318,7 +1318,7 @@ vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vuint32m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m1_tum( @@ -1327,7 +1327,7 @@ vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_f_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m1_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m2_tum( @@ -1336,7 +1336,7 @@ vfloat64m1_t test_vfwcvt_f_f_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_f_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_f_f_v_f64m2_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m4_tum( @@ -1345,7 +1345,7 @@ vfloat64m2_t test_vfwcvt_f_f_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_f_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m4_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m8_tum( @@ -1354,7 +1354,7 @@ vfloat64m4_t test_vfwcvt_f_f_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_f_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_f_f_v_f64m8_tum(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf4_tumu( @@ -1363,7 +1363,7 @@ vfloat64m8_t test_vfwcvt_f_f_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vint8mf8_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf2_tumu( @@ -1372,7 +1372,7 @@ vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vint8mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m1_tumu( @@ -1381,7 +1381,7 @@ vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_x_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vint8mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m2_tumu( @@ -1390,7 +1390,7 @@ vfloat16m1_t test_vfwcvt_f_x_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_x_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vint8m1_t src, size_t vl) { - return vfwcvt_f_x_v_f16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m4_tumu( @@ -1399,7 +1399,7 @@ vfloat16m2_t test_vfwcvt_f_x_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_x_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vint8m2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m8_tumu( @@ -1408,7 +1408,7 @@ vfloat16m4_t test_vfwcvt_f_x_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_x_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vint8m4_t src, size_t vl) { - return vfwcvt_f_x_v_f16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf4_tumu( @@ -1417,7 +1417,7 @@ vfloat16m8_t test_vfwcvt_f_x_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vuint8mf8_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf2_tumu( @@ -1426,7 +1426,7 @@ vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vuint8mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m1_tumu( @@ -1435,7 +1435,7 @@ vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vuint8mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m2_tumu( @@ -1444,7 +1444,7 @@ vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vuint8m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m4_tumu( @@ -1453,7 +1453,7 @@ vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vuint8m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m8_tumu( @@ -1462,7 +1462,7 @@ vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vuint8m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32mf2_tumu( @@ -1471,7 +1471,7 @@ vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_x_f_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_x_f_v_i32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32mf2_tumu( @@ -1480,7 +1480,7 @@ vint32mf2_t test_vfwcvt_x_f_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m1_tumu( @@ -1489,7 +1489,7 @@ vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_x_f_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m1_tumu( @@ -1498,7 +1498,7 @@ vint32m1_t test_vfwcvt_x_f_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m2_tumu( @@ -1507,7 +1507,7 @@ vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_x_f_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_x_f_v_i32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m2_tumu( @@ -1516,7 +1516,7 @@ vint32m2_t test_vfwcvt_x_f_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m4_tumu( @@ -1525,7 +1525,7 @@ vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_x_f_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m4_tumu( @@ -1534,7 +1534,7 @@ vint32m4_t test_vfwcvt_x_f_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m8_tumu( @@ -1543,7 +1543,7 @@ vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_x_f_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_x_f_v_i32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m8_tumu( @@ -1552,7 +1552,7 @@ vint32m8_t test_vfwcvt_x_f_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32mf2_tumu( @@ -1561,7 +1561,7 @@ vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32mf2_tumu( @@ -1570,7 +1570,7 @@ vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m1_tumu( @@ -1579,7 +1579,7 @@ vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_xu_f_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m1_tumu( @@ -1588,7 +1588,7 @@ vuint32m1_t test_vfwcvt_xu_f_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m2_tumu( @@ -1597,7 +1597,7 @@ vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_tumu(vbool32_t mask, vuint32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_xu_f_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m2_tumu( @@ -1606,7 +1606,7 @@ vuint32m2_t test_vfwcvt_xu_f_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m4_tumu( @@ -1615,7 +1615,7 @@ vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_tumu(vbool16_t mask, vuint32m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_xu_f_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m4_tumu( @@ -1624,7 +1624,7 @@ vuint32m4_t test_vfwcvt_xu_f_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m8_tumu( @@ -1633,7 +1633,7 @@ vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_xu_f_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m8_tumu( @@ -1642,7 +1642,7 @@ vuint32m8_t test_vfwcvt_xu_f_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32mf2_tumu( @@ -1651,7 +1651,7 @@ vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vint16mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m1_tumu( @@ -1660,7 +1660,7 @@ vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_x_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vint16mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m2_tumu( @@ -1669,7 +1669,7 @@ vfloat32m1_t test_vfwcvt_f_x_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_x_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vint16m1_t src, size_t vl) { - return vfwcvt_f_x_v_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m4_tumu( @@ -1678,7 +1678,7 @@ vfloat32m2_t test_vfwcvt_f_x_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_x_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vint16m2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m8_tumu( @@ -1687,7 +1687,7 @@ vfloat32m4_t test_vfwcvt_f_x_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_x_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vint16m4_t src, size_t vl) { - return vfwcvt_f_x_v_f32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32mf2_tumu( @@ -1696,7 +1696,7 @@ vfloat32m8_t test_vfwcvt_f_x_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vuint16mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m1_tumu( @@ -1705,7 +1705,7 @@ vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vuint16mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m2_tumu( @@ -1714,7 +1714,7 @@ vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vuint16m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m4_tumu( @@ -1723,7 +1723,7 @@ vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vuint16m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m8_tumu( @@ -1732,7 +1732,7 @@ vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vuint16m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32mf2_tumu( @@ -1741,7 +1741,7 @@ vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_f_f_v_f32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m1_tumu( @@ -1750,7 +1750,7 @@ vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_f_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m2_tumu( @@ -1759,7 +1759,7 @@ vfloat32m1_t test_vfwcvt_f_f_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_f_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_f_f_v_f32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m4_tumu( @@ -1768,7 +1768,7 @@ vfloat32m2_t test_vfwcvt_f_f_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_f_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m8_tumu( @@ -1777,7 +1777,7 @@ vfloat32m4_t test_vfwcvt_f_f_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_f_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_f_f_v_f32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m1_tumu( @@ -1786,7 +1786,7 @@ vfloat32m8_t test_vfwcvt_f_f_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_x_f_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m1_tumu( @@ -1795,7 +1795,7 @@ vint64m1_t test_vfwcvt_x_f_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m2_tumu( @@ -1804,7 +1804,7 @@ vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_x_f_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_x_f_v_i64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m2_tumu( @@ -1813,7 +1813,7 @@ vint64m2_t test_vfwcvt_x_f_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m4_tumu( @@ -1822,7 +1822,7 @@ vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_x_f_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m4_tumu( @@ -1831,7 +1831,7 @@ vint64m4_t test_vfwcvt_x_f_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m8_tumu( @@ -1840,7 +1840,7 @@ vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_x_f_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_x_f_v_i64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m8_tumu( @@ -1849,7 +1849,7 @@ vint64m8_t test_vfwcvt_x_f_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m1_tumu( @@ -1858,7 +1858,7 @@ vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_xu_f_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m1_tumu( @@ -1867,7 +1867,7 @@ vuint64m1_t test_vfwcvt_xu_f_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m2_tumu( @@ -1876,7 +1876,7 @@ vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_tumu(vbool64_t mask, vuint64m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_xu_f_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m2_tumu( @@ -1885,7 +1885,7 @@ vuint64m2_t test_vfwcvt_xu_f_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m4_tumu( @@ -1894,7 +1894,7 @@ vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_tumu(vbool32_t mask, vuint64m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_xu_f_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m4_tumu( @@ -1903,7 +1903,7 @@ vuint64m4_t test_vfwcvt_xu_f_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m8_tumu( @@ -1912,7 +1912,7 @@ vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_tumu(vbool16_t mask, vuint64m4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_xu_f_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m8_tumu( @@ -1921,7 +1921,7 @@ vuint64m8_t test_vfwcvt_xu_f_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m1_tumu( @@ -1930,7 +1930,7 @@ vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_x_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vint32mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m2_tumu( @@ -1939,7 +1939,7 @@ vfloat64m1_t test_vfwcvt_f_x_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_x_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vint32m1_t src, size_t vl) { - return vfwcvt_f_x_v_f64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m4_tumu( @@ -1948,7 +1948,7 @@ vfloat64m2_t test_vfwcvt_f_x_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_x_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vint32m2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m8_tumu( @@ -1957,7 +1957,7 @@ vfloat64m4_t test_vfwcvt_f_x_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_x_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vint32m4_t src, size_t vl) { - return vfwcvt_f_x_v_f64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m1_tumu( @@ -1966,7 +1966,7 @@ vfloat64m8_t test_vfwcvt_f_x_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m2_tumu( @@ -1975,7 +1975,7 @@ vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vuint32m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m4_tumu( @@ -1984,7 +1984,7 @@ vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vuint32m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m8_tumu( @@ -1993,7 +1993,7 @@ vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vuint32m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m1_tumu( @@ -2002,7 +2002,7 @@ vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_f_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m2_tumu( @@ -2011,7 +2011,7 @@ vfloat64m1_t test_vfwcvt_f_f_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_f_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_f_f_v_f64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m4_tumu( @@ -2020,7 +2020,7 @@ vfloat64m2_t test_vfwcvt_f_f_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_f_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m8_tumu( @@ -2029,7 +2029,7 @@ vfloat64m4_t test_vfwcvt_f_f_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_f_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_f_f_v_f64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf4_mu( @@ -2038,7 +2038,7 @@ vfloat64m8_t test_vfwcvt_f_f_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vint8mf8_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16mf2_mu( @@ -2047,7 +2047,7 @@ vfloat16mf4_t test_vfwcvt_f_x_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vint8mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m1_mu( @@ -2056,7 +2056,7 @@ vfloat16mf2_t test_vfwcvt_f_x_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_x_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vint8mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m2_mu( @@ -2065,7 +2065,7 @@ vfloat16m1_t test_vfwcvt_f_x_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_x_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vint8m1_t src, size_t vl) { - return vfwcvt_f_x_v_f16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m4_mu( @@ -2074,7 +2074,7 @@ vfloat16m2_t test_vfwcvt_f_x_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_x_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vint8m2_t src, size_t vl) { - return vfwcvt_f_x_v_f16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f16m8_mu( @@ -2083,7 +2083,7 @@ vfloat16m4_t test_vfwcvt_f_x_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_x_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vint8m4_t src, size_t vl) { - return vfwcvt_f_x_v_f16m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf4_mu( @@ -2092,7 +2092,7 @@ vfloat16m8_t test_vfwcvt_f_x_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vuint8mf8_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16mf2_mu( @@ -2101,7 +2101,7 @@ vfloat16mf4_t test_vfwcvt_f_xu_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vuint8mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m1_mu( @@ -2110,7 +2110,7 @@ vfloat16mf2_t test_vfwcvt_f_xu_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vuint8mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m2_mu( @@ -2119,7 +2119,7 @@ vfloat16m1_t test_vfwcvt_f_xu_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vuint8m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m4_mu( @@ -2128,7 +2128,7 @@ vfloat16m2_t test_vfwcvt_f_xu_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vuint8m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f16m8_mu( @@ -2137,7 +2137,7 @@ vfloat16m4_t test_vfwcvt_f_xu_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vuint8m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f16m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32mf2_mu( @@ -2146,7 +2146,7 @@ vfloat16m8_t test_vfwcvt_f_xu_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_x_f_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_x_f_v_i32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32mf2_mu( @@ -2155,7 +2155,7 @@ vint32mf2_t test_vfwcvt_x_f_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m1_mu( @@ -2164,7 +2164,7 @@ vint32mf2_t test_vfwcvt_rtz_x_f_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_x_f_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m1_mu( @@ -2173,7 +2173,7 @@ vint32m1_t test_vfwcvt_x_f_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m2_mu( @@ -2182,7 +2182,7 @@ vint32m1_t test_vfwcvt_rtz_x_f_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_x_f_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_x_f_v_i32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m2_mu( @@ -2191,7 +2191,7 @@ vint32m2_t test_vfwcvt_x_f_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m4_mu( @@ -2200,7 +2200,7 @@ vint32m2_t test_vfwcvt_rtz_x_f_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_x_f_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_x_f_v_i32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m4_mu( @@ -2209,7 +2209,7 @@ vint32m4_t test_vfwcvt_x_f_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i32m8_mu( @@ -2218,7 +2218,7 @@ vint32m4_t test_vfwcvt_rtz_x_f_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_x_f_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_x_f_v_i32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i32m8_mu( @@ -2227,7 +2227,7 @@ vint32m8_t test_vfwcvt_x_f_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32mf2_mu( @@ -2236,7 +2236,7 @@ vint32m8_t test_vfwcvt_rtz_x_f_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32mf2_mu( @@ -2245,7 +2245,7 @@ vuint32mf2_t test_vfwcvt_xu_f_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m1_mu( @@ -2254,7 +2254,7 @@ vuint32mf2_t test_vfwcvt_rtz_xu_f_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_xu_f_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m1_mu( @@ -2263,7 +2263,7 @@ vuint32m1_t test_vfwcvt_xu_f_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m2_mu( @@ -2272,7 +2272,7 @@ vuint32m1_t test_vfwcvt_rtz_xu_f_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_xu_f_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m2_mu( @@ -2281,7 +2281,7 @@ vuint32m2_t test_vfwcvt_xu_f_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m4_mu( @@ -2290,7 +2290,7 @@ vuint32m2_t test_vfwcvt_rtz_xu_f_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_xu_f_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m4_mu( @@ -2299,7 +2299,7 @@ vuint32m4_t test_vfwcvt_xu_f_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u32m8_mu( @@ -2308,7 +2308,7 @@ vuint32m4_t test_vfwcvt_rtz_xu_f_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_xu_f_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u32m8_mu( @@ -2317,7 +2317,7 @@ vuint32m8_t test_vfwcvt_xu_f_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32mf2_mu( @@ -2326,7 +2326,7 @@ vuint32m8_t test_vfwcvt_rtz_xu_f_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vint16mf4_t src, size_t vl) { - return vfwcvt_f_x_v_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m1_mu( @@ -2335,7 +2335,7 @@ vfloat32mf2_t test_vfwcvt_f_x_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_x_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vint16mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m2_mu( @@ -2344,7 +2344,7 @@ vfloat32m1_t test_vfwcvt_f_x_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_x_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vint16m1_t src, size_t vl) { - return vfwcvt_f_x_v_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m4_mu( @@ -2353,7 +2353,7 @@ vfloat32m2_t test_vfwcvt_f_x_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_x_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vint16m2_t src, size_t vl) { - return vfwcvt_f_x_v_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f32m8_mu( @@ -2362,7 +2362,7 @@ vfloat32m4_t test_vfwcvt_f_x_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_x_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vint16m4_t src, size_t vl) { - return vfwcvt_f_x_v_f32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32mf2_mu( @@ -2371,7 +2371,7 @@ vfloat32m8_t test_vfwcvt_f_x_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vuint16mf4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m1_mu( @@ -2380,7 +2380,7 @@ vfloat32mf2_t test_vfwcvt_f_xu_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vuint16mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m2_mu( @@ -2389,7 +2389,7 @@ vfloat32m1_t test_vfwcvt_f_xu_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vuint16m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m4_mu( @@ -2398,7 +2398,7 @@ vfloat32m2_t test_vfwcvt_f_xu_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vuint16m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f32m8_mu( @@ -2407,7 +2407,7 @@ vfloat32m4_t test_vfwcvt_f_xu_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vuint16m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32mf2_mu( @@ -2416,7 +2416,7 @@ vfloat32m8_t test_vfwcvt_f_xu_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vfwcvt_f_f_v_f32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m1_mu( @@ -2425,7 +2425,7 @@ vfloat32mf2_t test_vfwcvt_f_f_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwcvt_f_f_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m2_mu( @@ -2434,7 +2434,7 @@ vfloat32m1_t test_vfwcvt_f_f_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwcvt_f_f_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t src, size_t vl) { - return vfwcvt_f_f_v_f32m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m4_mu( @@ -2443,7 +2443,7 @@ vfloat32m2_t test_vfwcvt_f_f_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwcvt_f_f_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t src, size_t vl) { - return vfwcvt_f_f_v_f32m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f32m8_mu( @@ -2452,7 +2452,7 @@ vfloat32m4_t test_vfwcvt_f_f_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwcvt_f_f_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t src, size_t vl) { - return vfwcvt_f_f_v_f32m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m1_mu( @@ -2461,7 +2461,7 @@ vfloat32m8_t test_vfwcvt_f_f_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_x_f_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m1_mu( @@ -2470,7 +2470,7 @@ vint64m1_t test_vfwcvt_x_f_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m2_mu( @@ -2479,7 +2479,7 @@ vint64m1_t test_vfwcvt_rtz_x_f_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_x_f_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_x_f_v_i64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m2_mu( @@ -2488,7 +2488,7 @@ vint64m2_t test_vfwcvt_x_f_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m4_mu( @@ -2497,7 +2497,7 @@ vint64m2_t test_vfwcvt_rtz_x_f_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_x_f_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_x_f_v_i64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m4_mu( @@ -2506,7 +2506,7 @@ vint64m4_t test_vfwcvt_x_f_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_x_f_v_i64m8_mu( @@ -2515,7 +2515,7 @@ vint64m4_t test_vfwcvt_rtz_x_f_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_x_f_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_x_f_v_i64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_x_f_v_i64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_x_f_v_i64m8_mu( @@ -2524,7 +2524,7 @@ vint64m8_t test_vfwcvt_x_f_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_x_f_v_i64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_x_f_v_i64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m1_mu( @@ -2533,7 +2533,7 @@ vint64m8_t test_vfwcvt_rtz_x_f_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_xu_f_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m1_mu( @@ -2542,7 +2542,7 @@ vuint64m1_t test_vfwcvt_xu_f_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m2_mu( @@ -2551,7 +2551,7 @@ vuint64m1_t test_vfwcvt_rtz_xu_f_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_xu_f_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m2_mu( @@ -2560,7 +2560,7 @@ vuint64m2_t test_vfwcvt_xu_f_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m4_mu( @@ -2569,7 +2569,7 @@ vuint64m2_t test_vfwcvt_rtz_xu_f_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_xu_f_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m4_mu( @@ -2578,7 +2578,7 @@ vuint64m4_t test_vfwcvt_xu_f_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_xu_f_v_u64m8_mu( @@ -2587,7 +2587,7 @@ vuint64m4_t test_vfwcvt_rtz_xu_f_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_xu_f_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_xu_f_v_u64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_xu_f_v_u64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_rtz_xu_f_v_u64m8_mu( @@ -2596,7 +2596,7 @@ vuint64m8_t test_vfwcvt_xu_f_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_rtz_xu_f_v_u64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_rtz_xu_f_v_u64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m1_mu( @@ -2605,7 +2605,7 @@ vuint64m8_t test_vfwcvt_rtz_xu_f_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_x_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vint32mf2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m2_mu( @@ -2614,7 +2614,7 @@ vfloat64m1_t test_vfwcvt_f_x_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_x_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vint32m1_t src, size_t vl) { - return vfwcvt_f_x_v_f64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m4_mu( @@ -2623,7 +2623,7 @@ vfloat64m2_t test_vfwcvt_f_x_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_x_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vint32m2_t src, size_t vl) { - return vfwcvt_f_x_v_f64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_x_v_f64m8_mu( @@ -2632,7 +2632,7 @@ vfloat64m4_t test_vfwcvt_f_x_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_x_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vint32m4_t src, size_t vl) { - return vfwcvt_f_x_v_f64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_x_v_f64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m1_mu( @@ -2641,7 +2641,7 @@ vfloat64m8_t test_vfwcvt_f_x_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vuint32mf2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m2_mu( @@ -2650,7 +2650,7 @@ vfloat64m1_t test_vfwcvt_f_xu_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vuint32m1_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m4_mu( @@ -2659,7 +2659,7 @@ vfloat64m2_t test_vfwcvt_f_xu_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vuint32m2_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_xu_v_f64m8_mu( @@ -2668,7 +2668,7 @@ vfloat64m4_t test_vfwcvt_f_xu_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vuint32m4_t src, size_t vl) { - return vfwcvt_f_xu_v_f64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_xu_v_f64m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m1_mu( @@ -2677,7 +2677,7 @@ vfloat64m8_t test_vfwcvt_f_xu_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwcvt_f_f_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m1_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m2_mu( @@ -2686,7 +2686,7 @@ vfloat64m1_t test_vfwcvt_f_f_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwcvt_f_f_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t src, size_t vl) { - return vfwcvt_f_f_v_f64m2_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m4_mu( @@ -2695,7 +2695,7 @@ vfloat64m2_t test_vfwcvt_f_f_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwcvt_f_f_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t src, size_t vl) { - return vfwcvt_f_f_v_f64m4_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vfwcvt_f_f_v_f64m8_mu( @@ -2704,6 +2704,6 @@ vfloat64m4_t test_vfwcvt_f_f_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwcvt_f_f_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t src, size_t vl) { - return vfwcvt_f_f_v_f64m8_mu(mask, maskedoff, src, vl); + return __riscv_vfwcvt_f_f_v_f64m8_mu(mask, maskedoff, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmacc.c index 48f5206aff25d8ef0643eab10d567a0d2b1b8fbe..b0363ab30cc2c0c5b86b42032f02cd07a11d5953 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32mf2_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwmacc_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vf_f32mf2_tu(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vf_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m1_tu( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwmacc_vf_f32mf2_tu(vfloat32mf2_t vd, _Float16 vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vv_f32m1_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m1_tu( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwmacc_vv_f32m1_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vf_f32m1_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vf_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m2_tu( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwmacc_vf_f32m1_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vv_f32m2_tu(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m2_tu( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwmacc_vv_f32m2_tu(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vf_f32m2_tu(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vf_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m4_tu( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwmacc_vf_f32m2_tu(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vv_f32m4_tu(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m4_tu( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwmacc_vv_f32m4_tu(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vf_f32m4_tu(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vf_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m8_tu( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwmacc_vf_f32m4_tu(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vv_f32m8_tu(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m8_tu( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwmacc_vv_f32m8_tu(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vf_f32m8_tu(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vf_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m1_tu( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwmacc_vf_f32m8_tu(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vv_f64m1_tu(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwmacc_vv_f64m1_tu(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vf_f64m1_tu(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vf_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwmacc_vf_f64m1_tu(vfloat64m1_t vd, float vs1, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vv_f64m2_tu(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m2_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwmacc_vv_f64m2_tu(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vf_f64m2_tu(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vf_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m4_tu( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwmacc_vf_f64m2_tu(vfloat64m2_t vd, float vs1, vfloat32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vv_f64m4_tu(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m4_tu( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwmacc_vv_f64m4_tu(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vf_f64m4_tu(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vf_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m8_tu( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwmacc_vf_f64m4_tu(vfloat64m4_t vd, float vs1, vfloat32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vv_f64m8_tu(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m8_tu( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwmacc_vv_f64m8_tu(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vf_f64m8_tu(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vf_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32mf2_tum( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwmacc_vf_f64m8_tu(vfloat64m8_t vd, float vs1, vfloat32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32mf2_tum( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwmacc_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vf_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m1_tum( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwmacc_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m1_tum( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwmacc_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vf_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m2_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwmacc_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwmacc_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vf_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwmacc_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m4_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwmacc_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vf_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m8_tum( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwmacc_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m8_tum( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwmacc_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vf_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m1_tum( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwmacc_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m1_tum( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwmacc_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vf_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m2_tum( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwmacc_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m2_tum( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwmacc_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vf_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m4_tum( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwmacc_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m4_tum( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwmacc_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vf_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m8_tum( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwmacc_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m8_tum( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwmacc_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vf_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwmacc_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32mf2_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwmacc_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vf_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m1_tumu( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwmacc_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m1_tumu( @@ -364,7 +364,7 @@ vfloat32m1_t test_vfwmacc_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vf_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m2_tumu( @@ -373,7 +373,7 @@ vfloat32m1_t test_vfwmacc_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m2_tumu( @@ -382,7 +382,7 @@ vfloat32m2_t test_vfwmacc_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vf_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m4_tumu( @@ -391,7 +391,7 @@ vfloat32m2_t test_vfwmacc_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m4_tumu( @@ -400,7 +400,7 @@ vfloat32m4_t test_vfwmacc_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vf_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m8_tumu( @@ -409,7 +409,7 @@ vfloat32m4_t test_vfwmacc_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m8_tumu( @@ -418,7 +418,7 @@ vfloat32m8_t test_vfwmacc_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vf_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m1_tumu( @@ -427,7 +427,7 @@ vfloat32m8_t test_vfwmacc_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m1_tumu( @@ -436,7 +436,7 @@ vfloat64m1_t test_vfwmacc_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vf_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m2_tumu( @@ -445,7 +445,7 @@ vfloat64m1_t test_vfwmacc_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m2_tumu( @@ -454,7 +454,7 @@ vfloat64m2_t test_vfwmacc_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vf_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m4_tumu( @@ -463,7 +463,7 @@ vfloat64m2_t test_vfwmacc_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m4_tumu( @@ -472,7 +472,7 @@ vfloat64m4_t test_vfwmacc_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vf_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m8_tumu( @@ -481,7 +481,7 @@ vfloat64m4_t test_vfwmacc_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m8_tumu( @@ -490,7 +490,7 @@ vfloat64m8_t test_vfwmacc_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vf_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32mf2_mu( @@ -499,7 +499,7 @@ vfloat64m8_t test_vfwmacc_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32mf2_mu( @@ -508,7 +508,7 @@ vfloat32mf2_t test_vfwmacc_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmacc_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmacc_vf_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m1_mu( @@ -517,7 +517,7 @@ vfloat32mf2_t test_vfwmacc_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m1_mu( @@ -526,7 +526,7 @@ vfloat32m1_t test_vfwmacc_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmacc_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmacc_vf_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m2_mu( @@ -535,7 +535,7 @@ vfloat32m1_t test_vfwmacc_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m2_mu( @@ -544,7 +544,7 @@ vfloat32m2_t test_vfwmacc_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmacc_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmacc_vf_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m4_mu( @@ -553,7 +553,7 @@ vfloat32m2_t test_vfwmacc_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m4_mu( @@ -562,7 +562,7 @@ vfloat32m4_t test_vfwmacc_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmacc_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmacc_vf_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f32m8_mu( @@ -571,7 +571,7 @@ vfloat32m4_t test_vfwmacc_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f32m8_mu( @@ -580,7 +580,7 @@ vfloat32m8_t test_vfwmacc_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmacc_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmacc_vf_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m1_mu( @@ -589,7 +589,7 @@ vfloat32m8_t test_vfwmacc_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m1_mu( @@ -598,7 +598,7 @@ vfloat64m1_t test_vfwmacc_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmacc_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmacc_vf_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m2_mu( @@ -607,7 +607,7 @@ vfloat64m1_t test_vfwmacc_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m2_mu( @@ -616,7 +616,7 @@ vfloat64m2_t test_vfwmacc_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmacc_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmacc_vf_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m4_mu( @@ -625,7 +625,7 @@ vfloat64m2_t test_vfwmacc_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m4_mu( @@ -634,7 +634,7 @@ vfloat64m4_t test_vfwmacc_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmacc_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmacc_vf_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vv_f64m8_mu( @@ -643,7 +643,7 @@ vfloat64m4_t test_vfwmacc_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmacc_vf_f64m8_mu( @@ -652,6 +652,6 @@ vfloat64m8_t test_vfwmacc_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmacc_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmacc_vf_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmacc_vf_f64m8_mu(mask, vd, vs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmsac.c index 53278c6ec2a53cf2b67a76946985db69c4470c50..8c473979d9d27b76076a288fb61aa2a77bc8733e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32mf2_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwmsac_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vf_f32mf2_tu(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vf_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m1_tu( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwmsac_vf_f32mf2_tu(vfloat32mf2_t vd, _Float16 vs1, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vv_f32m1_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m1_tu( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwmsac_vv_f32m1_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vf_f32m1_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vf_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m2_tu( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwmsac_vf_f32m1_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vv_f32m2_tu(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m2_tu( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwmsac_vv_f32m2_tu(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vf_f32m2_tu(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vf_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m4_tu( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwmsac_vf_f32m2_tu(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vv_f32m4_tu(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m4_tu( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwmsac_vv_f32m4_tu(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vf_f32m4_tu(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vf_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m8_tu( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwmsac_vf_f32m4_tu(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vv_f32m8_tu(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m8_tu( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwmsac_vv_f32m8_tu(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vf_f32m8_tu(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vf_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m1_tu( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwmsac_vf_f32m8_tu(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vv_f64m1_tu(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwmsac_vv_f64m1_tu(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vf_f64m1_tu(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vf_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwmsac_vf_f64m1_tu(vfloat64m1_t vd, float vs1, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vv_f64m2_tu(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m2_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwmsac_vv_f64m2_tu(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vf_f64m2_tu(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vf_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m4_tu( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwmsac_vf_f64m2_tu(vfloat64m2_t vd, float vs1, vfloat32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vv_f64m4_tu(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m4_tu( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwmsac_vv_f64m4_tu(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vf_f64m4_tu(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vf_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m8_tu( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwmsac_vf_f64m4_tu(vfloat64m4_t vd, float vs1, vfloat32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vv_f64m8_tu(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m8_tu( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwmsac_vv_f64m8_tu(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vf_f64m8_tu(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vf_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32mf2_tum( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwmsac_vf_f64m8_tu(vfloat64m8_t vd, float vs1, vfloat32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32mf2_tum( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwmsac_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vf_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m1_tum( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwmsac_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m1_tum( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwmsac_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vf_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m2_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwmsac_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwmsac_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vf_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwmsac_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m4_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwmsac_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vf_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m8_tum( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwmsac_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m8_tum( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwmsac_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vf_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m1_tum( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwmsac_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m1_tum( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwmsac_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vf_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m2_tum( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwmsac_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m2_tum( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwmsac_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vf_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m4_tum( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwmsac_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m4_tum( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwmsac_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vf_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m8_tum( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwmsac_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m8_tum( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwmsac_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vf_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwmsac_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32mf2_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwmsac_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vf_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m1_tumu( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwmsac_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m1_tumu( @@ -364,7 +364,7 @@ vfloat32m1_t test_vfwmsac_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vf_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m2_tumu( @@ -373,7 +373,7 @@ vfloat32m1_t test_vfwmsac_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m2_tumu( @@ -382,7 +382,7 @@ vfloat32m2_t test_vfwmsac_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vf_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m4_tumu( @@ -391,7 +391,7 @@ vfloat32m2_t test_vfwmsac_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m4_tumu( @@ -400,7 +400,7 @@ vfloat32m4_t test_vfwmsac_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vf_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m8_tumu( @@ -409,7 +409,7 @@ vfloat32m4_t test_vfwmsac_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m8_tumu( @@ -418,7 +418,7 @@ vfloat32m8_t test_vfwmsac_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vf_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m1_tumu( @@ -427,7 +427,7 @@ vfloat32m8_t test_vfwmsac_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m1_tumu( @@ -436,7 +436,7 @@ vfloat64m1_t test_vfwmsac_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vf_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m2_tumu( @@ -445,7 +445,7 @@ vfloat64m1_t test_vfwmsac_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m2_tumu( @@ -454,7 +454,7 @@ vfloat64m2_t test_vfwmsac_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vf_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m4_tumu( @@ -463,7 +463,7 @@ vfloat64m2_t test_vfwmsac_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m4_tumu( @@ -472,7 +472,7 @@ vfloat64m4_t test_vfwmsac_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vf_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m8_tumu( @@ -481,7 +481,7 @@ vfloat64m4_t test_vfwmsac_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m8_tumu( @@ -490,7 +490,7 @@ vfloat64m8_t test_vfwmsac_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vf_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32mf2_mu( @@ -499,7 +499,7 @@ vfloat64m8_t test_vfwmsac_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32mf2_mu( @@ -508,7 +508,7 @@ vfloat32mf2_t test_vfwmsac_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmsac_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwmsac_vf_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m1_mu( @@ -517,7 +517,7 @@ vfloat32mf2_t test_vfwmsac_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m1_mu( @@ -526,7 +526,7 @@ vfloat32m1_t test_vfwmsac_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmsac_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwmsac_vf_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m2_mu( @@ -535,7 +535,7 @@ vfloat32m1_t test_vfwmsac_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m2_mu( @@ -544,7 +544,7 @@ vfloat32m2_t test_vfwmsac_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmsac_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwmsac_vf_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m4_mu( @@ -553,7 +553,7 @@ vfloat32m2_t test_vfwmsac_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m4_mu( @@ -562,7 +562,7 @@ vfloat32m4_t test_vfwmsac_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmsac_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwmsac_vf_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f32m8_mu( @@ -571,7 +571,7 @@ vfloat32m4_t test_vfwmsac_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f32m8_mu( @@ -580,7 +580,7 @@ vfloat32m8_t test_vfwmsac_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmsac_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwmsac_vf_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m1_mu( @@ -589,7 +589,7 @@ vfloat32m8_t test_vfwmsac_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, _Float16 v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m1_mu( @@ -598,7 +598,7 @@ vfloat64m1_t test_vfwmsac_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmsac_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwmsac_vf_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m2_mu( @@ -607,7 +607,7 @@ vfloat64m1_t test_vfwmsac_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m2_mu( @@ -616,7 +616,7 @@ vfloat64m2_t test_vfwmsac_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmsac_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwmsac_vf_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m4_mu( @@ -625,7 +625,7 @@ vfloat64m2_t test_vfwmsac_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m4_mu( @@ -634,7 +634,7 @@ vfloat64m4_t test_vfwmsac_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmsac_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwmsac_vf_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vv_f64m8_mu( @@ -643,7 +643,7 @@ vfloat64m4_t test_vfwmsac_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, float vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwmsac_vf_f64m8_mu( @@ -652,6 +652,6 @@ vfloat64m8_t test_vfwmsac_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmsac_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwmsac_vf_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwmsac_vf_f64m8_mu(mask, vd, vs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmul.c index 55592b5152baf08798904f70dae983ad10efbe89..7948036f867c755ca42d66c4063d2f885eb594c7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmul.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwmul_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32mf2_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwmul_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m1_tu( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwmul_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwmul_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m1_tu( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwmul_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m2_tu( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwmul_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwmul_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m2_tu( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwmul_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m4_tu( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwmul_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwmul_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m4_tu( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwmul_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m8_tu( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwmul_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwmul_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m8_tu( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwmul_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m1_tu( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwmul_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwmul_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwmul_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwmul_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwmul_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m2_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwmul_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m4_tu( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwmul_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwmul_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m4_tu( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwmul_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m8_tu( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwmul_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwmul_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m8_tu( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwmul_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32mf2_tum( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwmul_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwmul_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32mf2_tum( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwmul_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m1_tum( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwmul_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwmul_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m1_tum( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwmul_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m2_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwmul_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwmul_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwmul_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwmul_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwmul_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m4_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwmul_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m8_tum( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwmul_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwmul_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m8_tum( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwmul_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m1_tum( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwmul_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwmul_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m1_tum( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwmul_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m2_tum( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwmul_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwmul_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m2_tum( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwmul_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m4_tum( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwmul_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwmul_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m4_tum( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwmul_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m8_tum( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwmul_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwmul_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m8_tum( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwmul_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwmul_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwmul_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32mf2_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwmul_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m1_tumu( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwmul_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwmul_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m1_tumu( @@ -364,7 +364,7 @@ vfloat32m1_t test_vfwmul_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m2_tumu( @@ -373,7 +373,7 @@ vfloat32m1_t test_vfwmul_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwmul_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m2_tumu( @@ -382,7 +382,7 @@ vfloat32m2_t test_vfwmul_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m4_tumu( @@ -391,7 +391,7 @@ vfloat32m2_t test_vfwmul_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwmul_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m4_tumu( @@ -400,7 +400,7 @@ vfloat32m4_t test_vfwmul_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m8_tumu( @@ -409,7 +409,7 @@ vfloat32m4_t test_vfwmul_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwmul_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m8_tumu( @@ -418,7 +418,7 @@ vfloat32m8_t test_vfwmul_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m1_tumu( @@ -427,7 +427,7 @@ vfloat32m8_t test_vfwmul_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwmul_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m1_tumu( @@ -436,7 +436,7 @@ vfloat64m1_t test_vfwmul_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m2_tumu( @@ -445,7 +445,7 @@ vfloat64m1_t test_vfwmul_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwmul_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m2_tumu( @@ -454,7 +454,7 @@ vfloat64m2_t test_vfwmul_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m4_tumu( @@ -463,7 +463,7 @@ vfloat64m2_t test_vfwmul_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwmul_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m4_tumu( @@ -472,7 +472,7 @@ vfloat64m4_t test_vfwmul_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m8_tumu( @@ -481,7 +481,7 @@ vfloat64m4_t test_vfwmul_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwmul_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m8_tumu( @@ -490,7 +490,7 @@ vfloat64m8_t test_vfwmul_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32mf2_mu( @@ -499,7 +499,7 @@ vfloat64m8_t test_vfwmul_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwmul_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32mf2_mu( @@ -508,7 +508,7 @@ vfloat32mf2_t test_vfwmul_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwmul_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m1_mu( @@ -517,7 +517,7 @@ vfloat32mf2_t test_vfwmul_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwmul_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m1_mu( @@ -526,7 +526,7 @@ vfloat32m1_t test_vfwmul_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwmul_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m2_mu( @@ -535,7 +535,7 @@ vfloat32m1_t test_vfwmul_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwmul_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m2_mu( @@ -544,7 +544,7 @@ vfloat32m2_t test_vfwmul_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwmul_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m4_mu( @@ -553,7 +553,7 @@ vfloat32m2_t test_vfwmul_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwmul_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m4_mu( @@ -562,7 +562,7 @@ vfloat32m4_t test_vfwmul_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwmul_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f32m8_mu( @@ -571,7 +571,7 @@ vfloat32m4_t test_vfwmul_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwmul_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f32m8_mu( @@ -580,7 +580,7 @@ vfloat32m8_t test_vfwmul_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwmul_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwmul_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m1_mu( @@ -589,7 +589,7 @@ vfloat32m8_t test_vfwmul_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwmul_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m1_mu( @@ -598,7 +598,7 @@ vfloat64m1_t test_vfwmul_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwmul_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m2_mu( @@ -607,7 +607,7 @@ vfloat64m1_t test_vfwmul_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwmul_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m2_mu( @@ -616,7 +616,7 @@ vfloat64m2_t test_vfwmul_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwmul_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m4_mu( @@ -625,7 +625,7 @@ vfloat64m2_t test_vfwmul_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwmul_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m4_mu( @@ -634,7 +634,7 @@ vfloat64m4_t test_vfwmul_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwmul_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vv_f64m8_mu( @@ -643,7 +643,7 @@ vfloat64m4_t test_vfwmul_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwmul_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwmul_vf_f64m8_mu( @@ -652,6 +652,6 @@ vfloat64m8_t test_vfwmul_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwmul_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwmul_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwmul_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmacc.c index f3a88dfc7de6ba3b8f849f0c6da5ea8bfbe11f74..64267471e4f035e740305dee8971876ea9c0f64e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32mf2_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwnmacc_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat16mf4_t vs1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vf_f32mf2_tu(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vf_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m1_tu( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwnmacc_vf_f32mf2_tu(vfloat32mf2_t vd, _Float16 vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vv_f32m1_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m1_tu( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwnmacc_vv_f32m1_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vf_f32m1_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m2_tu( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwnmacc_vf_f32m1_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vv_f32m2_tu(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m2_tu( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwnmacc_vv_f32m2_tu(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vf_f32m2_tu(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vf_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m4_tu( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwnmacc_vf_f32m2_tu(vfloat32m2_t vd, _Float16 vs1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vv_f32m4_tu(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m4_tu( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwnmacc_vv_f32m4_tu(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vf_f32m4_tu(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m8_tu( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwnmacc_vf_f32m4_tu(vfloat32m4_t vd, _Float16 vs1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vv_f32m8_tu(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m8_tu( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwnmacc_vv_f32m8_tu(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vf_f32m8_tu(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vf_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m1_tu( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwnmacc_vf_f32m8_tu(vfloat32m8_t vd, _Float16 vs1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vv_f64m1_tu(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwnmacc_vv_f64m1_tu(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vf_f64m1_tu(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwnmacc_vf_f64m1_tu(vfloat64m1_t vd, float vs1, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vv_f64m2_tu(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m2_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwnmacc_vv_f64m2_tu(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vf_f64m2_tu(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vf_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m4_tu( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwnmacc_vf_f64m2_tu(vfloat64m2_t vd, float vs1, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vv_f64m4_tu(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m4_tu( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwnmacc_vv_f64m4_tu(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vf_f64m4_tu(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m8_tu( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwnmacc_vf_f64m4_tu(vfloat64m4_t vd, float vs1, vfloat32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vv_f64m8_tu(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m8_tu( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwnmacc_vv_f64m8_tu(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vf_f64m8_tu(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vf_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32mf2_tum( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwnmacc_vf_f64m8_tu(vfloat64m8_t vd, float vs1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32mf2_tum( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwnmacc_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vf_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m1_tum( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwnmacc_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m1_tum( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwnmacc_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m2_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwnmacc_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwnmacc_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vf_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwnmacc_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m4_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwnmacc_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m8_tum( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwnmacc_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m8_tum( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwnmacc_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vf_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m1_tum( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwnmacc_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m1_tum( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwnmacc_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m2_tum( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwnmacc_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m2_tum( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwnmacc_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vf_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m4_tum( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwnmacc_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m4_tum( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwnmacc_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m8_tum( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwnmacc_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m8_tum( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwnmacc_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vf_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwnmacc_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32mf2_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwnmacc_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vf_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m1_tumu( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwnmacc_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, _Fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m1_tumu( @@ -364,7 +364,7 @@ vfloat32m1_t test_vfwnmacc_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m2_tumu( @@ -373,7 +373,7 @@ vfloat32m1_t test_vfwnmacc_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m2_tumu( @@ -382,7 +382,7 @@ vfloat32m2_t test_vfwnmacc_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vf_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m4_tumu( @@ -391,7 +391,7 @@ vfloat32m2_t test_vfwnmacc_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m4_tumu( @@ -400,7 +400,7 @@ vfloat32m4_t test_vfwnmacc_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m8_tumu( @@ -409,7 +409,7 @@ vfloat32m4_t test_vfwnmacc_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m8_tumu( @@ -418,7 +418,7 @@ vfloat32m8_t test_vfwnmacc_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vf_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m1_tumu( @@ -427,7 +427,7 @@ vfloat32m8_t test_vfwnmacc_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m1_tumu( @@ -436,7 +436,7 @@ vfloat64m1_t test_vfwnmacc_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m2_tumu( @@ -445,7 +445,7 @@ vfloat64m1_t test_vfwnmacc_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m2_tumu( @@ -454,7 +454,7 @@ vfloat64m2_t test_vfwnmacc_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vf_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m4_tumu( @@ -463,7 +463,7 @@ vfloat64m2_t test_vfwnmacc_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m4_tumu( @@ -472,7 +472,7 @@ vfloat64m4_t test_vfwnmacc_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m8_tumu( @@ -481,7 +481,7 @@ vfloat64m4_t test_vfwnmacc_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m8_tumu( @@ -490,7 +490,7 @@ vfloat64m8_t test_vfwnmacc_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vf_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32mf2_mu( @@ -499,7 +499,7 @@ vfloat64m8_t test_vfwnmacc_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32mf2_mu( @@ -508,7 +508,7 @@ vfloat32mf2_t test_vfwnmacc_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmacc_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmacc_vf_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m1_mu( @@ -517,7 +517,7 @@ vfloat32mf2_t test_vfwnmacc_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m1_mu( @@ -526,7 +526,7 @@ vfloat32m1_t test_vfwnmacc_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmacc_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m2_mu( @@ -535,7 +535,7 @@ vfloat32m1_t test_vfwnmacc_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m2_mu( @@ -544,7 +544,7 @@ vfloat32m2_t test_vfwnmacc_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmacc_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmacc_vf_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m4_mu( @@ -553,7 +553,7 @@ vfloat32m2_t test_vfwnmacc_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m4_mu( @@ -562,7 +562,7 @@ vfloat32m4_t test_vfwnmacc_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmacc_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmacc_vf_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f32m8_mu( @@ -571,7 +571,7 @@ vfloat32m4_t test_vfwnmacc_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f32m8_mu( @@ -580,7 +580,7 @@ vfloat32m8_t test_vfwnmacc_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmacc_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmacc_vf_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m1_mu( @@ -589,7 +589,7 @@ vfloat32m8_t test_vfwnmacc_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m1_mu( @@ -598,7 +598,7 @@ vfloat64m1_t test_vfwnmacc_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmacc_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m2_mu( @@ -607,7 +607,7 @@ vfloat64m1_t test_vfwnmacc_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m2_mu( @@ -616,7 +616,7 @@ vfloat64m2_t test_vfwnmacc_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmacc_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmacc_vf_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m4_mu( @@ -625,7 +625,7 @@ vfloat64m2_t test_vfwnmacc_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m4_mu( @@ -634,7 +634,7 @@ vfloat64m4_t test_vfwnmacc_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmacc_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmacc_vf_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vv_f64m8_mu( @@ -643,7 +643,7 @@ vfloat64m4_t test_vfwnmacc_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmacc_vf_f64m8_mu( @@ -652,6 +652,6 @@ vfloat64m8_t test_vfwnmacc_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmacc_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmacc_vf_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmacc_vf_f64m8_mu(mask, vd, vs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmsac.c index 956a5ff3809928884e8e5cdd91c28fc5d9c2300b..3e7a355d8b143527ab2b71b59752cc1874d60d8a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwnmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vv_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32mf2_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwnmsac_vv_f32mf2_tu(vfloat32mf2_t vd, vfloat16mf4_t vs1, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vf_f32mf2_tu(vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vf_f32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m1_tu( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwnmsac_vf_f32mf2_tu(vfloat32mf2_t vd, _Float16 vs1, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vv_f32m1_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m1_tu( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwnmsac_vv_f32m1_tu(vfloat32m1_t vd, vfloat16mf2_t vs1, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vf_f32m1_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m2_tu( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwnmsac_vf_f32m1_tu(vfloat32m1_t vd, _Float16 vs1, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vv_f32m2_tu(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vv_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m2_tu( @@ -58,7 +58,7 @@ vfloat32m2_t test_vfwnmsac_vv_f32m2_tu(vfloat32m2_t vd, vfloat16m1_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vf_f32m2_tu(vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vf_f32m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m4_tu( @@ -67,7 +67,7 @@ vfloat32m2_t test_vfwnmsac_vf_f32m2_tu(vfloat32m2_t vd, _Float16 vs1, vfloat16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vv_f32m4_tu(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m4_tu( @@ -76,7 +76,7 @@ vfloat32m4_t test_vfwnmsac_vv_f32m4_tu(vfloat32m4_t vd, vfloat16m2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vf_f32m4_tu(vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m8_tu( @@ -85,7 +85,7 @@ vfloat32m4_t test_vfwnmsac_vf_f32m4_tu(vfloat32m4_t vd, _Float16 vs1, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vv_f32m8_tu(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vv_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m8_tu( @@ -94,7 +94,7 @@ vfloat32m8_t test_vfwnmsac_vv_f32m8_tu(vfloat32m8_t vd, vfloat16m4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vf_f32m8_tu(vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vf_f32m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m1_tu( @@ -103,7 +103,7 @@ vfloat32m8_t test_vfwnmsac_vf_f32m8_tu(vfloat32m8_t vd, _Float16 vs1, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vv_f64m1_tu(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m1_tu( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwnmsac_vv_f64m1_tu(vfloat64m1_t vd, vfloat32mf2_t vs1, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vf_f64m1_tu(vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m1_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vfwnmsac_vf_f64m1_tu(vfloat64m1_t vd, float vs1, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vv_f64m2_tu(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vv_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m2_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vfwnmsac_vv_f64m2_tu(vfloat64m2_t vd, vfloat32m1_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vf_f64m2_tu(vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vf_f64m2_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m4_tu( @@ -139,7 +139,7 @@ vfloat64m2_t test_vfwnmsac_vf_f64m2_tu(vfloat64m2_t vd, float vs1, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vv_f64m4_tu(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m4_tu( @@ -148,7 +148,7 @@ vfloat64m4_t test_vfwnmsac_vv_f64m4_tu(vfloat64m4_t vd, vfloat32m2_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vf_f64m4_tu(vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m4_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m8_tu( @@ -157,7 +157,7 @@ vfloat64m4_t test_vfwnmsac_vf_f64m4_tu(vfloat64m4_t vd, float vs1, vfloat32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vv_f64m8_tu(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vv_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m8_tu( @@ -166,7 +166,7 @@ vfloat64m8_t test_vfwnmsac_vv_f64m8_tu(vfloat64m8_t vd, vfloat32m4_t vs1, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vf_f64m8_tu(vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vf_f64m8_tu(vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32mf2_tum( @@ -175,7 +175,7 @@ vfloat64m8_t test_vfwnmsac_vf_f64m8_tu(vfloat64m8_t vd, float vs1, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32mf2_tum( @@ -184,7 +184,7 @@ vfloat32mf2_t test_vfwnmsac_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vf_f32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m1_tum( @@ -193,7 +193,7 @@ vfloat32mf2_t test_vfwnmsac_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t vd, _Flo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m1_tum( @@ -202,7 +202,7 @@ vfloat32m1_t test_vfwnmsac_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m2_tum( @@ -211,7 +211,7 @@ vfloat32m1_t test_vfwnmsac_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vv_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m2_t test_vfwnmsac_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vf_f32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m4_tum( @@ -229,7 +229,7 @@ vfloat32m2_t test_vfwnmsac_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m4_tum( @@ -238,7 +238,7 @@ vfloat32m4_t test_vfwnmsac_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m8_tum( @@ -247,7 +247,7 @@ vfloat32m4_t test_vfwnmsac_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vv_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m8_tum( @@ -256,7 +256,7 @@ vfloat32m8_t test_vfwnmsac_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vf_f32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m1_tum( @@ -265,7 +265,7 @@ vfloat32m8_t test_vfwnmsac_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m1_tum( @@ -274,7 +274,7 @@ vfloat64m1_t test_vfwnmsac_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m2_tum( @@ -283,7 +283,7 @@ vfloat64m1_t test_vfwnmsac_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vv_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m2_tum( @@ -292,7 +292,7 @@ vfloat64m2_t test_vfwnmsac_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vf_f64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m4_tum( @@ -301,7 +301,7 @@ vfloat64m2_t test_vfwnmsac_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m4_tum( @@ -310,7 +310,7 @@ vfloat64m4_t test_vfwnmsac_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m8_tum( @@ -319,7 +319,7 @@ vfloat64m4_t test_vfwnmsac_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vv_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m8_tum( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwnmsac_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vf_f64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32mf2_tumu( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwnmsac_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32mf2_tumu( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwnmsac_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vf_f32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m1_tumu( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwnmsac_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t vd, _Fl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m1_tumu( @@ -364,7 +364,7 @@ vfloat32m1_t test_vfwnmsac_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m2_tumu( @@ -373,7 +373,7 @@ vfloat32m1_t test_vfwnmsac_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m2_tumu( @@ -382,7 +382,7 @@ vfloat32m2_t test_vfwnmsac_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vf_f32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m4_tumu( @@ -391,7 +391,7 @@ vfloat32m2_t test_vfwnmsac_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t vd, _Float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m4_tumu( @@ -400,7 +400,7 @@ vfloat32m4_t test_vfwnmsac_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m8_tumu( @@ -409,7 +409,7 @@ vfloat32m4_t test_vfwnmsac_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m8_tumu( @@ -418,7 +418,7 @@ vfloat32m8_t test_vfwnmsac_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vf_f32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m1_tumu( @@ -427,7 +427,7 @@ vfloat32m8_t test_vfwnmsac_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t vd, _Float1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m1_tumu( @@ -436,7 +436,7 @@ vfloat64m1_t test_vfwnmsac_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m2_tumu( @@ -445,7 +445,7 @@ vfloat64m1_t test_vfwnmsac_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m2_tumu( @@ -454,7 +454,7 @@ vfloat64m2_t test_vfwnmsac_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vf_f64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m4_tumu( @@ -463,7 +463,7 @@ vfloat64m2_t test_vfwnmsac_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m4_tumu( @@ -472,7 +472,7 @@ vfloat64m4_t test_vfwnmsac_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m8_tumu( @@ -481,7 +481,7 @@ vfloat64m4_t test_vfwnmsac_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t vd, float // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m8_tumu( @@ -490,7 +490,7 @@ vfloat64m8_t test_vfwnmsac_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vf_f64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32mf2_mu( @@ -499,7 +499,7 @@ vfloat64m8_t test_vfwnmsac_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t vd, float v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloat16mf4_t vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32mf2_mu( @@ -508,7 +508,7 @@ vfloat32mf2_t test_vfwnmsac_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwnmsac_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, _Float16 vs1, vfloat16mf4_t vs2, size_t vl) { - return vfwnmsac_vf_f32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m1_mu( @@ -517,7 +517,7 @@ vfloat32mf2_t test_vfwnmsac_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t vd, _Floa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16mf2_t vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m1_mu( @@ -526,7 +526,7 @@ vfloat32m1_t test_vfwnmsac_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwnmsac_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 vs1, vfloat16mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m2_mu( @@ -535,7 +535,7 @@ vfloat32m1_t test_vfwnmsac_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat16m1_t vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vv_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m2_mu( @@ -544,7 +544,7 @@ vfloat32m2_t test_vfwnmsac_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwnmsac_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, _Float16 vs1, vfloat16m1_t vs2, size_t vl) { - return vfwnmsac_vf_f32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m4_mu( @@ -553,7 +553,7 @@ vfloat32m2_t test_vfwnmsac_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat16m2_t vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vv_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m4_mu( @@ -562,7 +562,7 @@ vfloat32m4_t test_vfwnmsac_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwnmsac_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, _Float16 vs1, vfloat16m2_t vs2, size_t vl) { - return vfwnmsac_vf_f32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f32m8_mu( @@ -571,7 +571,7 @@ vfloat32m4_t test_vfwnmsac_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat16m4_t vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vv_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f32m8_mu( @@ -580,7 +580,7 @@ vfloat32m8_t test_vfwnmsac_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwnmsac_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, _Float16 vs1, vfloat16m4_t vs2, size_t vl) { - return vfwnmsac_vf_f32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m1_mu( @@ -589,7 +589,7 @@ vfloat32m8_t test_vfwnmsac_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t vd, _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat32mf2_t vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m1_mu( @@ -598,7 +598,7 @@ vfloat64m1_t test_vfwnmsac_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwnmsac_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, float vs1, vfloat32mf2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m2_mu( @@ -607,7 +607,7 @@ vfloat64m1_t test_vfwnmsac_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat32m1_t vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vv_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m2_mu( @@ -616,7 +616,7 @@ vfloat64m2_t test_vfwnmsac_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwnmsac_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, float vs1, vfloat32m1_t vs2, size_t vl) { - return vfwnmsac_vf_f64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m4_mu( @@ -625,7 +625,7 @@ vfloat64m2_t test_vfwnmsac_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat32m2_t vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vv_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m4_mu( @@ -634,7 +634,7 @@ vfloat64m4_t test_vfwnmsac_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwnmsac_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, float vs1, vfloat32m2_t vs2, size_t vl) { - return vfwnmsac_vf_f64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vv_f64m8_mu( @@ -643,7 +643,7 @@ vfloat64m4_t test_vfwnmsac_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t vd, float vs // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat32m4_t vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vv_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vv_f64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vfwnmsac_vf_f64m8_mu( @@ -652,6 +652,6 @@ vfloat64m8_t test_vfwnmsac_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwnmsac_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t vd, float vs1, vfloat32m4_t vs2, size_t vl) { - return vfwnmsac_vf_f64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vfwnmsac_vf_f64m8_mu(mask, vd, vs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredosum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredosum.c index 27694126314a6202625999710873ece94bf28b04..858200ce05af02b8700e16bfd2d9caba6e2b4f06 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredosum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredosum.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16mf4_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16mf4_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16mf4_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16mf2_f32m1_tu( @@ -22,7 +22,7 @@ vfloat32m1_t test_vfwredosum_vs_f16mf4_f32m1_tu(vfloat32m1_t maskedoff, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16mf2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16mf2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m1_f32m1_tu( @@ -31,7 +31,7 @@ vfloat32m1_t test_vfwredosum_vs_f16mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m1_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m1_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m2_f32m1_tu( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m4_f32m1_tu( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m4_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m4_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m8_f32m1_tu( @@ -58,7 +58,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m8_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m8_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32mf2_f64m1_tu( @@ -67,7 +67,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32mf2_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32mf2_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32mf2_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m1_f64m1_tu( @@ -76,7 +76,7 @@ vfloat64m1_t test_vfwredosum_vs_f32mf2_f64m1_tu(vfloat64m1_t maskedoff, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m1_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m1_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m2_f64m1_tu( @@ -85,7 +85,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m2_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m2_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m4_f64m1_tu( @@ -94,7 +94,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m4_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m4_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m8_f64m1_tu( @@ -103,7 +103,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m8_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m8_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16mf4_f32m1_tum( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16mf4_f32m1_tum(vbool64_t mask, vfloat32m1_t maskedoff, vfloat16mf4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16mf4_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16mf4_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16mf2_f32m1_tum( @@ -121,7 +121,7 @@ vfloat32m1_t test_vfwredosum_vs_f16mf4_f32m1_tum(vbool64_t mask, vfloat32m1_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16mf2_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m1_f32m1_tum( @@ -130,7 +130,7 @@ vfloat32m1_t test_vfwredosum_vs_f16mf2_f32m1_tum(vbool32_t mask, vfloat32m1_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m1_f32m1_tum(vbool16_t mask, vfloat32m1_t maskedoff, vfloat16m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m2_f32m1_tum( @@ -139,7 +139,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m1_f32m1_tum(vbool16_t mask, vfloat32m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m2_f32m1_tum(vbool8_t mask, vfloat32m1_t maskedoff, vfloat16m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m4_f32m1_tum( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m2_f32m1_tum(vbool8_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m4_f32m1_tum(vbool4_t mask, vfloat32m1_t maskedoff, vfloat16m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f16m8_f32m1_tum( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m4_f32m1_tum(vbool4_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredosum_vs_f16m8_f32m1_tum(vbool2_t mask, vfloat32m1_t maskedoff, vfloat16m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredosum_vs_f16m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f16m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32mf2_f64m1_tum( @@ -166,7 +166,7 @@ vfloat32m1_t test_vfwredosum_vs_f16m8_f32m1_tum(vbool2_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32mf2_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32mf2_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32mf2_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m1_f64m1_tum( @@ -175,7 +175,7 @@ vfloat64m1_t test_vfwredosum_vs_f32mf2_f64m1_tum(vbool64_t mask, vfloat64m1_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m1_f64m1_tum(vbool32_t mask, vfloat64m1_t maskedoff, vfloat32m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m2_f64m1_tum( @@ -184,7 +184,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m1_f64m1_tum(vbool32_t mask, vfloat64m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m2_f64m1_tum(vbool16_t mask, vfloat64m1_t maskedoff, vfloat32m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m4_f64m1_tum( @@ -193,7 +193,7 @@ vfloat64m1_t test_vfwredosum_vs_f32m2_f64m1_tum(vbool16_t mask, vfloat64m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m4_f64m1_tum(vbool8_t mask, vfloat64m1_t maskedoff, vfloat32m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredosum_vs_f32m8_f64m1_tum( @@ -202,6 +202,6 @@ vfloat64m1_t test_vfwredosum_vs_f32m4_f64m1_tum(vbool8_t mask, vfloat64m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredosum_vs_f32m8_f64m1_tum(vbool4_t mask, vfloat64m1_t maskedoff, vfloat32m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredosum_vs_f32m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredosum_vs_f32m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredusum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredusum.c index e2600e527e6533975b10cb399dddbc99c253a95c..a833a2942d4b5dc641b43030f85f011fd3f0767c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredusum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwredusum.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16mf4_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16mf4_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16mf4_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16mf2_f32m1_tu( @@ -22,7 +22,7 @@ vfloat32m1_t test_vfwredusum_vs_f16mf4_f32m1_tu(vfloat32m1_t maskedoff, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16mf2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16mf2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m1_f32m1_tu( @@ -31,7 +31,7 @@ vfloat32m1_t test_vfwredusum_vs_f16mf2_f32m1_tu(vfloat32m1_t maskedoff, vfloat16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m1_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m1_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m2_f32m1_tu( @@ -40,7 +40,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m1_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m2_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m2_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m4_f32m1_tu( @@ -49,7 +49,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m2_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m4_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m4_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m8_f32m1_tu( @@ -58,7 +58,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m4_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m8_f32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m8_f32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32mf2_f64m1_tu( @@ -67,7 +67,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m8_f32m1_tu(vfloat32m1_t maskedoff, vfloat16m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32mf2_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32mf2_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32mf2_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m1_f64m1_tu( @@ -76,7 +76,7 @@ vfloat64m1_t test_vfwredusum_vs_f32mf2_f64m1_tu(vfloat64m1_t maskedoff, vfloat32 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m1_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m1_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m2_f64m1_tu( @@ -85,7 +85,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m1_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m2_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m2_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m4_f64m1_tu( @@ -94,7 +94,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m2_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m4_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m4_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m8_f64m1_tu( @@ -103,7 +103,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m4_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m8_f64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m8_f64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16mf4_f32m1_tum( @@ -112,7 +112,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m8_f64m1_tu(vfloat64m1_t maskedoff, vfloat32m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16mf4_f32m1_tum(vbool64_t mask, vfloat32m1_t maskedoff, vfloat16mf4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16mf4_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16mf4_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16mf2_f32m1_tum( @@ -121,7 +121,7 @@ vfloat32m1_t test_vfwredusum_vs_f16mf4_f32m1_tum(vbool64_t mask, vfloat32m1_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16mf2_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16mf2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m1_f32m1_tum( @@ -130,7 +130,7 @@ vfloat32m1_t test_vfwredusum_vs_f16mf2_f32m1_tum(vbool32_t mask, vfloat32m1_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m1_f32m1_tum(vbool16_t mask, vfloat32m1_t maskedoff, vfloat16m1_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m1_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m2_f32m1_tum( @@ -139,7 +139,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m1_f32m1_tum(vbool16_t mask, vfloat32m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m2_f32m1_tum(vbool8_t mask, vfloat32m1_t maskedoff, vfloat16m2_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m2_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m4_f32m1_tum( @@ -148,7 +148,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m2_f32m1_tum(vbool8_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m4_f32m1_tum(vbool4_t mask, vfloat32m1_t maskedoff, vfloat16m4_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m4_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f16m8_f32m1_tum( @@ -157,7 +157,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m4_f32m1_tum(vbool4_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwredusum_vs_f16m8_f32m1_tum(vbool2_t mask, vfloat32m1_t maskedoff, vfloat16m8_t vector, vfloat32m1_t scalar, size_t vl) { - return vfwredusum_vs_f16m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f16m8_f32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32mf2_f64m1_tum( @@ -166,7 +166,7 @@ vfloat32m1_t test_vfwredusum_vs_f16m8_f32m1_tum(vbool2_t mask, vfloat32m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32mf2_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32mf2_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32mf2_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m1_f64m1_tum( @@ -175,7 +175,7 @@ vfloat64m1_t test_vfwredusum_vs_f32mf2_f64m1_tum(vbool64_t mask, vfloat64m1_t ma // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m1_f64m1_tum(vbool32_t mask, vfloat64m1_t maskedoff, vfloat32m1_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m1_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m2_f64m1_tum( @@ -184,7 +184,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m1_f64m1_tum(vbool32_t mask, vfloat64m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m2_f64m1_tum(vbool16_t mask, vfloat64m1_t maskedoff, vfloat32m2_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m2_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m4_f64m1_tum( @@ -193,7 +193,7 @@ vfloat64m1_t test_vfwredusum_vs_f32m2_f64m1_tum(vbool16_t mask, vfloat64m1_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m4_f64m1_tum(vbool8_t mask, vfloat64m1_t maskedoff, vfloat32m4_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m4_f64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vfwredusum_vs_f32m8_f64m1_tum( @@ -202,6 +202,6 @@ vfloat64m1_t test_vfwredusum_vs_f32m4_f64m1_tum(vbool8_t mask, vfloat64m1_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwredusum_vs_f32m8_f64m1_tum(vbool4_t mask, vfloat64m1_t maskedoff, vfloat32m8_t vector, vfloat64m1_t scalar, size_t vl) { - return vfwredusum_vs_f32m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vfwredusum_vs_f32m8_f64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwsub.c index 0498d18829e73bd7bb3ba6783e933a3652eedd8b..7397cd098029b5ae47a11a3e7a7e5a4c44101ece 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32mf2_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vfwsub_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32mf2_tu( @@ -31,7 +31,7 @@ vfloat32mf2_t test_vfwsub_vf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_wv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32mf2_tu( @@ -40,7 +40,7 @@ vfloat32mf2_t test_vfwsub_wv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m1_tu( @@ -49,7 +49,7 @@ vfloat32mf2_t test_vfwsub_wf_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m1_tu( @@ -58,7 +58,7 @@ vfloat32m1_t test_vfwsub_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m1_tu( @@ -67,7 +67,7 @@ vfloat32m1_t test_vfwsub_vf_f32m1_tu(vfloat32m1_t maskedoff, vfloat16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_wv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32m1_t test_vfwsub_wv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vfwsub_wf_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m2_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vfwsub_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m2_tu( @@ -103,7 +103,7 @@ vfloat32m2_t test_vfwsub_vf_f32m2_tu(vfloat32m2_t maskedoff, vfloat16m1_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_wv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m2_tu( @@ -112,7 +112,7 @@ vfloat32m2_t test_vfwsub_wv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m4_tu( @@ -121,7 +121,7 @@ vfloat32m2_t test_vfwsub_wf_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m4_tu( @@ -130,7 +130,7 @@ vfloat32m4_t test_vfwsub_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m4_tu( @@ -139,7 +139,7 @@ vfloat32m4_t test_vfwsub_vf_f32m4_tu(vfloat32m4_t maskedoff, vfloat16m2_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_wv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m4_tu( @@ -148,7 +148,7 @@ vfloat32m4_t test_vfwsub_wv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m8_tu( @@ -157,7 +157,7 @@ vfloat32m4_t test_vfwsub_wf_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m8_tu( @@ -166,7 +166,7 @@ vfloat32m8_t test_vfwsub_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m8_tu( @@ -175,7 +175,7 @@ vfloat32m8_t test_vfwsub_vf_f32m8_tu(vfloat32m8_t maskedoff, vfloat16m4_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_wv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m8_tu( @@ -184,7 +184,7 @@ vfloat32m8_t test_vfwsub_wv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m1_tu( @@ -193,7 +193,7 @@ vfloat32m8_t test_vfwsub_wf_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, _ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m1_tu( @@ -202,7 +202,7 @@ vfloat64m1_t test_vfwsub_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat64m1_t test_vfwsub_vf_f64m1_tu(vfloat64m1_t maskedoff, vfloat32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_wv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vfwsub_wv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vfwsub_wf_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vfwsub_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m2_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vfwsub_vf_f64m2_tu(vfloat64m2_t maskedoff, vfloat32m1_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_wv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m2_tu( @@ -256,7 +256,7 @@ vfloat64m2_t test_vfwsub_wv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m4_tu( @@ -265,7 +265,7 @@ vfloat64m2_t test_vfwsub_wf_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m4_tu( @@ -274,7 +274,7 @@ vfloat64m4_t test_vfwsub_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m4_tu( @@ -283,7 +283,7 @@ vfloat64m4_t test_vfwsub_vf_f64m4_tu(vfloat64m4_t maskedoff, vfloat32m2_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_wv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m4_tu( @@ -292,7 +292,7 @@ vfloat64m4_t test_vfwsub_wv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m8_tu( @@ -301,7 +301,7 @@ vfloat64m4_t test_vfwsub_wf_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m8_tu( @@ -310,7 +310,7 @@ vfloat64m8_t test_vfwsub_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m8_tu( @@ -319,7 +319,7 @@ vfloat64m8_t test_vfwsub_vf_f64m8_tu(vfloat64m8_t maskedoff, vfloat32m4_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_wv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m8_tu( @@ -328,7 +328,7 @@ vfloat64m8_t test_vfwsub_wv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32mf2_tum( @@ -337,7 +337,7 @@ vfloat64m8_t test_vfwsub_wf_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, f // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32mf2_tum( @@ -346,7 +346,7 @@ vfloat32mf2_t test_vfwsub_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32mf2_tum( @@ -355,7 +355,7 @@ vfloat32mf2_t test_vfwsub_vf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_wv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32mf2_tum( @@ -364,7 +364,7 @@ vfloat32mf2_t test_vfwsub_wv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m1_tum( @@ -373,7 +373,7 @@ vfloat32mf2_t test_vfwsub_wf_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m1_tum( @@ -382,7 +382,7 @@ vfloat32m1_t test_vfwsub_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m1_tum( @@ -391,7 +391,7 @@ vfloat32m1_t test_vfwsub_vf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_wv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m1_tum( @@ -400,7 +400,7 @@ vfloat32m1_t test_vfwsub_wv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m2_tum( @@ -409,7 +409,7 @@ vfloat32m1_t test_vfwsub_wf_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m2_tum( @@ -418,7 +418,7 @@ vfloat32m2_t test_vfwsub_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m2_tum( @@ -427,7 +427,7 @@ vfloat32m2_t test_vfwsub_vf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_wv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m2_tum( @@ -436,7 +436,7 @@ vfloat32m2_t test_vfwsub_wv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m4_tum( @@ -445,7 +445,7 @@ vfloat32m2_t test_vfwsub_wf_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m4_tum( @@ -454,7 +454,7 @@ vfloat32m4_t test_vfwsub_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m4_tum( @@ -463,7 +463,7 @@ vfloat32m4_t test_vfwsub_vf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_wv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m4_tum( @@ -472,7 +472,7 @@ vfloat32m4_t test_vfwsub_wv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m8_tum( @@ -481,7 +481,7 @@ vfloat32m4_t test_vfwsub_wf_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m8_tum( @@ -490,7 +490,7 @@ vfloat32m8_t test_vfwsub_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m8_tum( @@ -499,7 +499,7 @@ vfloat32m8_t test_vfwsub_vf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_wv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m8_tum( @@ -508,7 +508,7 @@ vfloat32m8_t test_vfwsub_wv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m1_tum( @@ -517,7 +517,7 @@ vfloat32m8_t test_vfwsub_wf_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m1_tum( @@ -526,7 +526,7 @@ vfloat64m1_t test_vfwsub_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m1_tum( @@ -535,7 +535,7 @@ vfloat64m1_t test_vfwsub_vf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_wv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m1_tum( @@ -544,7 +544,7 @@ vfloat64m1_t test_vfwsub_wv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m2_tum( @@ -553,7 +553,7 @@ vfloat64m1_t test_vfwsub_wf_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m2_tum( @@ -562,7 +562,7 @@ vfloat64m2_t test_vfwsub_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m2_tum( @@ -571,7 +571,7 @@ vfloat64m2_t test_vfwsub_vf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_wv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m2_tum( @@ -580,7 +580,7 @@ vfloat64m2_t test_vfwsub_wv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m4_tum( @@ -589,7 +589,7 @@ vfloat64m2_t test_vfwsub_wf_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m4_tum( @@ -598,7 +598,7 @@ vfloat64m4_t test_vfwsub_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m4_tum( @@ -607,7 +607,7 @@ vfloat64m4_t test_vfwsub_vf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_wv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m4_tum( @@ -616,7 +616,7 @@ vfloat64m4_t test_vfwsub_wv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m8_tum( @@ -625,7 +625,7 @@ vfloat64m4_t test_vfwsub_wf_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m8_tum( @@ -634,7 +634,7 @@ vfloat64m8_t test_vfwsub_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m8_tum( @@ -643,7 +643,7 @@ vfloat64m8_t test_vfwsub_vf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_wv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m8_tum( @@ -652,7 +652,7 @@ vfloat64m8_t test_vfwsub_wv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32mf2_tumu( @@ -661,7 +661,7 @@ vfloat64m8_t test_vfwsub_wf_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32mf2_tumu( @@ -670,7 +670,7 @@ vfloat32mf2_t test_vfwsub_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32mf2_tumu( @@ -679,7 +679,7 @@ vfloat32mf2_t test_vfwsub_vf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_wv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32mf2_tumu( @@ -688,7 +688,7 @@ vfloat32mf2_t test_vfwsub_wv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m1_tumu( @@ -697,7 +697,7 @@ vfloat32mf2_t test_vfwsub_wf_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m1_tumu( @@ -706,7 +706,7 @@ vfloat32m1_t test_vfwsub_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m1_tumu( @@ -715,7 +715,7 @@ vfloat32m1_t test_vfwsub_vf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_wv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m1_tumu( @@ -724,7 +724,7 @@ vfloat32m1_t test_vfwsub_wv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m2_tumu( @@ -733,7 +733,7 @@ vfloat32m1_t test_vfwsub_wf_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m2_tumu( @@ -742,7 +742,7 @@ vfloat32m2_t test_vfwsub_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m2_tumu( @@ -751,7 +751,7 @@ vfloat32m2_t test_vfwsub_vf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_wv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m2_tumu( @@ -760,7 +760,7 @@ vfloat32m2_t test_vfwsub_wv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m4_tumu( @@ -769,7 +769,7 @@ vfloat32m2_t test_vfwsub_wf_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m4_tumu( @@ -778,7 +778,7 @@ vfloat32m4_t test_vfwsub_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m4_tumu( @@ -787,7 +787,7 @@ vfloat32m4_t test_vfwsub_vf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_wv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m4_tumu( @@ -796,7 +796,7 @@ vfloat32m4_t test_vfwsub_wv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m8_tumu( @@ -805,7 +805,7 @@ vfloat32m4_t test_vfwsub_wf_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m8_tumu( @@ -814,7 +814,7 @@ vfloat32m8_t test_vfwsub_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m8_tumu( @@ -823,7 +823,7 @@ vfloat32m8_t test_vfwsub_vf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_wv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m8_tumu( @@ -832,7 +832,7 @@ vfloat32m8_t test_vfwsub_wv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m1_tumu( @@ -841,7 +841,7 @@ vfloat32m8_t test_vfwsub_wf_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m1_tumu( @@ -850,7 +850,7 @@ vfloat64m1_t test_vfwsub_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m1_tumu( @@ -859,7 +859,7 @@ vfloat64m1_t test_vfwsub_vf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_wv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m1_tumu( @@ -868,7 +868,7 @@ vfloat64m1_t test_vfwsub_wv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m2_tumu( @@ -877,7 +877,7 @@ vfloat64m1_t test_vfwsub_wf_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m2_tumu( @@ -886,7 +886,7 @@ vfloat64m2_t test_vfwsub_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m2_tumu( @@ -895,7 +895,7 @@ vfloat64m2_t test_vfwsub_vf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_wv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m2_tumu( @@ -904,7 +904,7 @@ vfloat64m2_t test_vfwsub_wv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m4_tumu( @@ -913,7 +913,7 @@ vfloat64m2_t test_vfwsub_wf_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m4_tumu( @@ -922,7 +922,7 @@ vfloat64m4_t test_vfwsub_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m4_tumu( @@ -931,7 +931,7 @@ vfloat64m4_t test_vfwsub_vf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_wv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m4_tumu( @@ -940,7 +940,7 @@ vfloat64m4_t test_vfwsub_wv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m8_tumu( @@ -949,7 +949,7 @@ vfloat64m4_t test_vfwsub_wf_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m8_tumu( @@ -958,7 +958,7 @@ vfloat64m8_t test_vfwsub_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m8_tumu( @@ -967,7 +967,7 @@ vfloat64m8_t test_vfwsub_vf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_wv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m8_tumu( @@ -976,7 +976,7 @@ vfloat64m8_t test_vfwsub_wv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32mf2_mu( @@ -985,7 +985,7 @@ vfloat64m8_t test_vfwsub_wf_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32mf2_mu( @@ -994,7 +994,7 @@ vfloat32mf2_t test_vfwsub_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32mf2_mu( @@ -1003,7 +1003,7 @@ vfloat32mf2_t test_vfwsub_vf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat16mf4_t op2, size_t vl) { - return vfwsub_wv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32mf2_mu( @@ -1012,7 +1012,7 @@ vfloat32mf2_t test_vfwsub_wv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vfwsub_wf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m1_mu( @@ -1021,7 +1021,7 @@ vfloat32mf2_t test_vfwsub_wf_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m1_mu( @@ -1030,7 +1030,7 @@ vfloat32m1_t test_vfwsub_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m1_mu( @@ -1039,7 +1039,7 @@ vfloat32m1_t test_vfwsub_vf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat16mf2_t op2, size_t vl) { - return vfwsub_wv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m1_mu( @@ -1048,7 +1048,7 @@ vfloat32m1_t test_vfwsub_wv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vfwsub_wf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m2_mu( @@ -1057,7 +1057,7 @@ vfloat32m1_t test_vfwsub_wf_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m2_mu( @@ -1066,7 +1066,7 @@ vfloat32m2_t test_vfwsub_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m2_mu( @@ -1075,7 +1075,7 @@ vfloat32m2_t test_vfwsub_vf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat16m1_t op2, size_t vl) { - return vfwsub_wv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m2_mu( @@ -1084,7 +1084,7 @@ vfloat32m2_t test_vfwsub_wv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vfwsub_wf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m4_mu( @@ -1093,7 +1093,7 @@ vfloat32m2_t test_vfwsub_wf_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m4_mu( @@ -1102,7 +1102,7 @@ vfloat32m4_t test_vfwsub_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m4_mu( @@ -1111,7 +1111,7 @@ vfloat32m4_t test_vfwsub_vf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat16m2_t op2, size_t vl) { - return vfwsub_wv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m4_mu( @@ -1120,7 +1120,7 @@ vfloat32m4_t test_vfwsub_wv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vfwsub_wf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f32m8_mu( @@ -1129,7 +1129,7 @@ vfloat32m4_t test_vfwsub_wf_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f32m8_mu( @@ -1138,7 +1138,7 @@ vfloat32m8_t test_vfwsub_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vfwsub_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f32m8_mu( @@ -1147,7 +1147,7 @@ vfloat32m8_t test_vfwsub_vf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat16m4_t op2, size_t vl) { - return vfwsub_wv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f32m8_mu( @@ -1156,7 +1156,7 @@ vfloat32m8_t test_vfwsub_wv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vfwsub_wf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, _Float16 op2, size_t vl) { - return vfwsub_wf_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m1_mu( @@ -1165,7 +1165,7 @@ vfloat32m8_t test_vfwsub_wf_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m1_mu( @@ -1174,7 +1174,7 @@ vfloat64m1_t test_vfwsub_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m1_mu( @@ -1183,7 +1183,7 @@ vfloat64m1_t test_vfwsub_vf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat32mf2_t op2, size_t vl) { - return vfwsub_wv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m1_mu( @@ -1192,7 +1192,7 @@ vfloat64m1_t test_vfwsub_wv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vfwsub_wf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m2_mu( @@ -1201,7 +1201,7 @@ vfloat64m1_t test_vfwsub_wf_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m2_mu( @@ -1210,7 +1210,7 @@ vfloat64m2_t test_vfwsub_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m2_mu( @@ -1219,7 +1219,7 @@ vfloat64m2_t test_vfwsub_vf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat32m1_t op2, size_t vl) { - return vfwsub_wv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m2_mu( @@ -1228,7 +1228,7 @@ vfloat64m2_t test_vfwsub_wv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vfwsub_wf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m4_mu( @@ -1237,7 +1237,7 @@ vfloat64m2_t test_vfwsub_wf_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m4_mu( @@ -1246,7 +1246,7 @@ vfloat64m4_t test_vfwsub_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m4_mu( @@ -1255,7 +1255,7 @@ vfloat64m4_t test_vfwsub_vf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat32m2_t op2, size_t vl) { - return vfwsub_wv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m4_mu( @@ -1264,7 +1264,7 @@ vfloat64m4_t test_vfwsub_wv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vfwsub_wf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vv_f64m8_mu( @@ -1273,7 +1273,7 @@ vfloat64m4_t test_vfwsub_wf_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_vf_f64m8_mu( @@ -1282,7 +1282,7 @@ vfloat64m8_t test_vfwsub_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vfwsub_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_vf_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wv_f64m8_mu( @@ -1291,7 +1291,7 @@ vfloat64m8_t test_vfwsub_vf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat32m4_t op2, size_t vl) { - return vfwsub_wv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vfwsub_wf_f64m8_mu( @@ -1300,6 +1300,6 @@ vfloat64m8_t test_vfwsub_wv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vfwsub_wf_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, float op2, size_t vl) { - return vfwsub_wf_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vfwsub_wf_f64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vid.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vid.c index bf6f3e721fd6502236442fb3a6c3b5ba4c00fed4..e8b3f7f563aa8c017a3c468d3ad813ea654c997c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vid.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vid.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vid_v_u8mf8_tu(vuint8mf8_t maskedoff, size_t vl) { - return vid_v_u8mf8_tu(maskedoff, vl); + return __riscv_vid_v_u8mf8_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf4_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vid_v_u8mf8_tu(vuint8mf8_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vid_v_u8mf4_tu(vuint8mf4_t maskedoff, size_t vl) { - return vid_v_u8mf4_tu(maskedoff, vl); + return __riscv_vid_v_u8mf4_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf2_tu( @@ -30,7 +30,7 @@ vuint8mf4_t test_vid_v_u8mf4_tu(vuint8mf4_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vid_v_u8mf2_tu(vuint8mf2_t maskedoff, size_t vl) { - return vid_v_u8mf2_tu(maskedoff, vl); + return __riscv_vid_v_u8mf2_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m1_tu( @@ -39,7 +39,7 @@ vuint8mf2_t test_vid_v_u8mf2_tu(vuint8mf2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vid_v_u8m1_tu(vuint8m1_t maskedoff, size_t vl) { - return vid_v_u8m1_tu(maskedoff, vl); + return __riscv_vid_v_u8m1_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m2_tu( @@ -48,7 +48,7 @@ vuint8m1_t test_vid_v_u8m1_tu(vuint8m1_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vid_v_u8m2_tu(vuint8m2_t maskedoff, size_t vl) { - return vid_v_u8m2_tu(maskedoff, vl); + return __riscv_vid_v_u8m2_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m4_tu( @@ -57,7 +57,7 @@ vuint8m2_t test_vid_v_u8m2_tu(vuint8m2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vid_v_u8m4_tu(vuint8m4_t maskedoff, size_t vl) { - return vid_v_u8m4_tu(maskedoff, vl); + return __riscv_vid_v_u8m4_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m8_tu( @@ -66,7 +66,7 @@ vuint8m4_t test_vid_v_u8m4_tu(vuint8m4_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vid_v_u8m8_tu(vuint8m8_t maskedoff, size_t vl) { - return vid_v_u8m8_tu(maskedoff, vl); + return __riscv_vid_v_u8m8_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf4_tu( @@ -75,7 +75,7 @@ vuint8m8_t test_vid_v_u8m8_tu(vuint8m8_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vid_v_u16mf4_tu(vuint16mf4_t maskedoff, size_t vl) { - return vid_v_u16mf4_tu(maskedoff, vl); + return __riscv_vid_v_u16mf4_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf2_tu( @@ -84,7 +84,7 @@ vuint16mf4_t test_vid_v_u16mf4_tu(vuint16mf4_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vid_v_u16mf2_tu(vuint16mf2_t maskedoff, size_t vl) { - return vid_v_u16mf2_tu(maskedoff, vl); + return __riscv_vid_v_u16mf2_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m1_tu( @@ -93,7 +93,7 @@ vuint16mf2_t test_vid_v_u16mf2_tu(vuint16mf2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vid_v_u16m1_tu(vuint16m1_t maskedoff, size_t vl) { - return vid_v_u16m1_tu(maskedoff, vl); + return __riscv_vid_v_u16m1_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m2_tu( @@ -102,7 +102,7 @@ vuint16m1_t test_vid_v_u16m1_tu(vuint16m1_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vid_v_u16m2_tu(vuint16m2_t maskedoff, size_t vl) { - return vid_v_u16m2_tu(maskedoff, vl); + return __riscv_vid_v_u16m2_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m4_tu( @@ -111,7 +111,7 @@ vuint16m2_t test_vid_v_u16m2_tu(vuint16m2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vid_v_u16m4_tu(vuint16m4_t maskedoff, size_t vl) { - return vid_v_u16m4_tu(maskedoff, vl); + return __riscv_vid_v_u16m4_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m8_tu( @@ -120,7 +120,7 @@ vuint16m4_t test_vid_v_u16m4_tu(vuint16m4_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vid_v_u16m8_tu(vuint16m8_t maskedoff, size_t vl) { - return vid_v_u16m8_tu(maskedoff, vl); + return __riscv_vid_v_u16m8_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32mf2_tu( @@ -129,7 +129,7 @@ vuint16m8_t test_vid_v_u16m8_tu(vuint16m8_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vid_v_u32mf2_tu(vuint32mf2_t maskedoff, size_t vl) { - return vid_v_u32mf2_tu(maskedoff, vl); + return __riscv_vid_v_u32mf2_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m1_tu( @@ -138,7 +138,7 @@ vuint32mf2_t test_vid_v_u32mf2_tu(vuint32mf2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vid_v_u32m1_tu(vuint32m1_t maskedoff, size_t vl) { - return vid_v_u32m1_tu(maskedoff, vl); + return __riscv_vid_v_u32m1_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m2_tu( @@ -147,7 +147,7 @@ vuint32m1_t test_vid_v_u32m1_tu(vuint32m1_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vid_v_u32m2_tu(vuint32m2_t maskedoff, size_t vl) { - return vid_v_u32m2_tu(maskedoff, vl); + return __riscv_vid_v_u32m2_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m4_tu( @@ -156,7 +156,7 @@ vuint32m2_t test_vid_v_u32m2_tu(vuint32m2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vid_v_u32m4_tu(vuint32m4_t maskedoff, size_t vl) { - return vid_v_u32m4_tu(maskedoff, vl); + return __riscv_vid_v_u32m4_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m8_tu( @@ -165,7 +165,7 @@ vuint32m4_t test_vid_v_u32m4_tu(vuint32m4_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vid_v_u32m8_tu(vuint32m8_t maskedoff, size_t vl) { - return vid_v_u32m8_tu(maskedoff, vl); + return __riscv_vid_v_u32m8_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m1_tu( @@ -174,7 +174,7 @@ vuint32m8_t test_vid_v_u32m8_tu(vuint32m8_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vid_v_u64m1_tu(vuint64m1_t maskedoff, size_t vl) { - return vid_v_u64m1_tu(maskedoff, vl); + return __riscv_vid_v_u64m1_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m2_tu( @@ -183,7 +183,7 @@ vuint64m1_t test_vid_v_u64m1_tu(vuint64m1_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vid_v_u64m2_tu(vuint64m2_t maskedoff, size_t vl) { - return vid_v_u64m2_tu(maskedoff, vl); + return __riscv_vid_v_u64m2_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m4_tu( @@ -192,7 +192,7 @@ vuint64m2_t test_vid_v_u64m2_tu(vuint64m2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vid_v_u64m4_tu(vuint64m4_t maskedoff, size_t vl) { - return vid_v_u64m4_tu(maskedoff, vl); + return __riscv_vid_v_u64m4_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m8_tu( @@ -201,7 +201,7 @@ vuint64m4_t test_vid_v_u64m4_tu(vuint64m4_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vid_v_u64m8_tu(vuint64m8_t maskedoff, size_t vl) { - return vid_v_u64m8_tu(maskedoff, vl); + return __riscv_vid_v_u64m8_tu(maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf8_tum( @@ -210,7 +210,7 @@ vuint64m8_t test_vid_v_u64m8_tu(vuint64m8_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vid_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, size_t vl) { - return vid_v_u8mf8_tum(mask, maskedoff, vl); + return __riscv_vid_v_u8mf8_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf4_tum( @@ -219,7 +219,7 @@ vuint8mf8_t test_vid_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vid_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, size_t vl) { - return vid_v_u8mf4_tum(mask, maskedoff, vl); + return __riscv_vid_v_u8mf4_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf2_tum( @@ -228,7 +228,7 @@ vuint8mf4_t test_vid_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vid_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, size_t vl) { - return vid_v_u8mf2_tum(mask, maskedoff, vl); + return __riscv_vid_v_u8mf2_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m1_tum( @@ -237,7 +237,7 @@ vuint8mf2_t test_vid_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vid_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, size_t vl) { - return vid_v_u8m1_tum(mask, maskedoff, vl); + return __riscv_vid_v_u8m1_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m2_tum( @@ -246,7 +246,7 @@ vuint8m1_t test_vid_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vid_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, size_t vl) { - return vid_v_u8m2_tum(mask, maskedoff, vl); + return __riscv_vid_v_u8m2_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m4_tum( @@ -255,7 +255,7 @@ vuint8m2_t test_vid_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vid_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, size_t vl) { - return vid_v_u8m4_tum(mask, maskedoff, vl); + return __riscv_vid_v_u8m4_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m8_tum( @@ -264,7 +264,7 @@ vuint8m4_t test_vid_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vid_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, size_t vl) { - return vid_v_u8m8_tum(mask, maskedoff, vl); + return __riscv_vid_v_u8m8_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf4_tum( @@ -273,7 +273,7 @@ vuint8m8_t test_vid_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vid_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, size_t vl) { - return vid_v_u16mf4_tum(mask, maskedoff, vl); + return __riscv_vid_v_u16mf4_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf2_tum( @@ -282,7 +282,7 @@ vuint16mf4_t test_vid_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vid_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, size_t vl) { - return vid_v_u16mf2_tum(mask, maskedoff, vl); + return __riscv_vid_v_u16mf2_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m1_tum( @@ -291,7 +291,7 @@ vuint16mf2_t test_vid_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vid_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, size_t vl) { - return vid_v_u16m1_tum(mask, maskedoff, vl); + return __riscv_vid_v_u16m1_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m2_tum( @@ -300,7 +300,7 @@ vuint16m1_t test_vid_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vid_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, size_t vl) { - return vid_v_u16m2_tum(mask, maskedoff, vl); + return __riscv_vid_v_u16m2_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m4_tum( @@ -309,7 +309,7 @@ vuint16m2_t test_vid_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vid_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, size_t vl) { - return vid_v_u16m4_tum(mask, maskedoff, vl); + return __riscv_vid_v_u16m4_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m8_tum( @@ -318,7 +318,7 @@ vuint16m4_t test_vid_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vid_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, size_t vl) { - return vid_v_u16m8_tum(mask, maskedoff, vl); + return __riscv_vid_v_u16m8_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32mf2_tum( @@ -327,7 +327,7 @@ vuint16m8_t test_vid_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vid_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, size_t vl) { - return vid_v_u32mf2_tum(mask, maskedoff, vl); + return __riscv_vid_v_u32mf2_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m1_tum( @@ -336,7 +336,7 @@ vuint32mf2_t test_vid_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vid_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, size_t vl) { - return vid_v_u32m1_tum(mask, maskedoff, vl); + return __riscv_vid_v_u32m1_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m2_tum( @@ -345,7 +345,7 @@ vuint32m1_t test_vid_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vid_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, size_t vl) { - return vid_v_u32m2_tum(mask, maskedoff, vl); + return __riscv_vid_v_u32m2_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m4_tum( @@ -354,7 +354,7 @@ vuint32m2_t test_vid_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vid_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, size_t vl) { - return vid_v_u32m4_tum(mask, maskedoff, vl); + return __riscv_vid_v_u32m4_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m8_tum( @@ -363,7 +363,7 @@ vuint32m4_t test_vid_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vid_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, size_t vl) { - return vid_v_u32m8_tum(mask, maskedoff, vl); + return __riscv_vid_v_u32m8_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m1_tum( @@ -372,7 +372,7 @@ vuint32m8_t test_vid_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vid_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, size_t vl) { - return vid_v_u64m1_tum(mask, maskedoff, vl); + return __riscv_vid_v_u64m1_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m2_tum( @@ -381,7 +381,7 @@ vuint64m1_t test_vid_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vid_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, size_t vl) { - return vid_v_u64m2_tum(mask, maskedoff, vl); + return __riscv_vid_v_u64m2_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m4_tum( @@ -390,7 +390,7 @@ vuint64m2_t test_vid_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vid_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, size_t vl) { - return vid_v_u64m4_tum(mask, maskedoff, vl); + return __riscv_vid_v_u64m4_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m8_tum( @@ -399,7 +399,7 @@ vuint64m4_t test_vid_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vid_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, size_t vl) { - return vid_v_u64m8_tum(mask, maskedoff, vl); + return __riscv_vid_v_u64m8_tum(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf8_tumu( @@ -408,7 +408,7 @@ vuint64m8_t test_vid_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vid_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, size_t vl) { - return vid_v_u8mf8_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u8mf8_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf4_tumu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vid_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vid_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, size_t vl) { - return vid_v_u8mf4_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u8mf4_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf2_tumu( @@ -426,7 +426,7 @@ vuint8mf4_t test_vid_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vid_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, size_t vl) { - return vid_v_u8mf2_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u8mf2_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m1_tumu( @@ -435,7 +435,7 @@ vuint8mf2_t test_vid_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vid_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, size_t vl) { - return vid_v_u8m1_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u8m1_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m2_tumu( @@ -444,7 +444,7 @@ vuint8m1_t test_vid_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vid_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, size_t vl) { - return vid_v_u8m2_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u8m2_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m4_tumu( @@ -453,7 +453,7 @@ vuint8m2_t test_vid_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vid_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, size_t vl) { - return vid_v_u8m4_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u8m4_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m8_tumu( @@ -462,7 +462,7 @@ vuint8m4_t test_vid_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vid_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, size_t vl) { - return vid_v_u8m8_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u8m8_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf4_tumu( @@ -471,7 +471,7 @@ vuint8m8_t test_vid_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vid_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, size_t vl) { - return vid_v_u16mf4_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u16mf4_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf2_tumu( @@ -480,7 +480,7 @@ vuint16mf4_t test_vid_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vid_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, size_t vl) { - return vid_v_u16mf2_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u16mf2_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m1_tumu( @@ -489,7 +489,7 @@ vuint16mf2_t test_vid_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vid_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, size_t vl) { - return vid_v_u16m1_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u16m1_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m2_tumu( @@ -498,7 +498,7 @@ vuint16m1_t test_vid_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vid_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, size_t vl) { - return vid_v_u16m2_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u16m2_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m4_tumu( @@ -507,7 +507,7 @@ vuint16m2_t test_vid_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vid_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, size_t vl) { - return vid_v_u16m4_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u16m4_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m8_tumu( @@ -516,7 +516,7 @@ vuint16m4_t test_vid_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vid_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, size_t vl) { - return vid_v_u16m8_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u16m8_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32mf2_tumu( @@ -525,7 +525,7 @@ vuint16m8_t test_vid_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vid_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, size_t vl) { - return vid_v_u32mf2_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u32mf2_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m1_tumu( @@ -534,7 +534,7 @@ vuint32mf2_t test_vid_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vid_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, size_t vl) { - return vid_v_u32m1_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u32m1_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m2_tumu( @@ -543,7 +543,7 @@ vuint32m1_t test_vid_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vid_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, size_t vl) { - return vid_v_u32m2_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u32m2_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m4_tumu( @@ -552,7 +552,7 @@ vuint32m2_t test_vid_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vid_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, size_t vl) { - return vid_v_u32m4_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u32m4_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m8_tumu( @@ -561,7 +561,7 @@ vuint32m4_t test_vid_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vid_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, size_t vl) { - return vid_v_u32m8_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u32m8_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m1_tumu( @@ -570,7 +570,7 @@ vuint32m8_t test_vid_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vid_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, size_t vl) { - return vid_v_u64m1_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u64m1_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m2_tumu( @@ -579,7 +579,7 @@ vuint64m1_t test_vid_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vid_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, size_t vl) { - return vid_v_u64m2_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u64m2_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m4_tumu( @@ -588,7 +588,7 @@ vuint64m2_t test_vid_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vid_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, size_t vl) { - return vid_v_u64m4_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u64m4_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m8_tumu( @@ -597,7 +597,7 @@ vuint64m4_t test_vid_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vid_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, size_t vl) { - return vid_v_u64m8_tumu(mask, maskedoff, vl); + return __riscv_vid_v_u64m8_tumu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf8_mu( @@ -606,7 +606,7 @@ vuint64m8_t test_vid_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vid_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, size_t vl) { - return vid_v_u8mf8_mu(mask, maskedoff, vl); + return __riscv_vid_v_u8mf8_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf4_mu( @@ -615,7 +615,7 @@ vuint8mf8_t test_vid_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vid_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, size_t vl) { - return vid_v_u8mf4_mu(mask, maskedoff, vl); + return __riscv_vid_v_u8mf4_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8mf2_mu( @@ -624,7 +624,7 @@ vuint8mf4_t test_vid_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vid_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, size_t vl) { - return vid_v_u8mf2_mu(mask, maskedoff, vl); + return __riscv_vid_v_u8mf2_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m1_mu( @@ -633,7 +633,7 @@ vuint8mf2_t test_vid_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vid_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, size_t vl) { - return vid_v_u8m1_mu(mask, maskedoff, vl); + return __riscv_vid_v_u8m1_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m2_mu( @@ -642,7 +642,7 @@ vuint8m1_t test_vid_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vid_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, size_t vl) { - return vid_v_u8m2_mu(mask, maskedoff, vl); + return __riscv_vid_v_u8m2_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m4_mu( @@ -651,7 +651,7 @@ vuint8m2_t test_vid_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vid_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, size_t vl) { - return vid_v_u8m4_mu(mask, maskedoff, vl); + return __riscv_vid_v_u8m4_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u8m8_mu( @@ -660,7 +660,7 @@ vuint8m4_t test_vid_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vid_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, size_t vl) { - return vid_v_u8m8_mu(mask, maskedoff, vl); + return __riscv_vid_v_u8m8_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf4_mu( @@ -669,7 +669,7 @@ vuint8m8_t test_vid_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vid_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, size_t vl) { - return vid_v_u16mf4_mu(mask, maskedoff, vl); + return __riscv_vid_v_u16mf4_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16mf2_mu( @@ -678,7 +678,7 @@ vuint16mf4_t test_vid_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vid_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, size_t vl) { - return vid_v_u16mf2_mu(mask, maskedoff, vl); + return __riscv_vid_v_u16mf2_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m1_mu( @@ -687,7 +687,7 @@ vuint16mf2_t test_vid_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vid_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, size_t vl) { - return vid_v_u16m1_mu(mask, maskedoff, vl); + return __riscv_vid_v_u16m1_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m2_mu( @@ -696,7 +696,7 @@ vuint16m1_t test_vid_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vid_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, size_t vl) { - return vid_v_u16m2_mu(mask, maskedoff, vl); + return __riscv_vid_v_u16m2_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m4_mu( @@ -705,7 +705,7 @@ vuint16m2_t test_vid_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vid_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, size_t vl) { - return vid_v_u16m4_mu(mask, maskedoff, vl); + return __riscv_vid_v_u16m4_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u16m8_mu( @@ -714,7 +714,7 @@ vuint16m4_t test_vid_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vid_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, size_t vl) { - return vid_v_u16m8_mu(mask, maskedoff, vl); + return __riscv_vid_v_u16m8_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32mf2_mu( @@ -723,7 +723,7 @@ vuint16m8_t test_vid_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vid_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, size_t vl) { - return vid_v_u32mf2_mu(mask, maskedoff, vl); + return __riscv_vid_v_u32mf2_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m1_mu( @@ -732,7 +732,7 @@ vuint32mf2_t test_vid_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vid_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, size_t vl) { - return vid_v_u32m1_mu(mask, maskedoff, vl); + return __riscv_vid_v_u32m1_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m2_mu( @@ -741,7 +741,7 @@ vuint32m1_t test_vid_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vid_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, size_t vl) { - return vid_v_u32m2_mu(mask, maskedoff, vl); + return __riscv_vid_v_u32m2_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m4_mu( @@ -750,7 +750,7 @@ vuint32m2_t test_vid_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vid_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, size_t vl) { - return vid_v_u32m4_mu(mask, maskedoff, vl); + return __riscv_vid_v_u32m4_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u32m8_mu( @@ -759,7 +759,7 @@ vuint32m4_t test_vid_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vid_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, size_t vl) { - return vid_v_u32m8_mu(mask, maskedoff, vl); + return __riscv_vid_v_u32m8_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m1_mu( @@ -768,7 +768,7 @@ vuint32m8_t test_vid_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vid_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, size_t vl) { - return vid_v_u64m1_mu(mask, maskedoff, vl); + return __riscv_vid_v_u64m1_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m2_mu( @@ -777,7 +777,7 @@ vuint64m1_t test_vid_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vid_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, size_t vl) { - return vid_v_u64m2_mu(mask, maskedoff, vl); + return __riscv_vid_v_u64m2_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m4_mu( @@ -786,7 +786,7 @@ vuint64m2_t test_vid_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vid_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, size_t vl) { - return vid_v_u64m4_mu(mask, maskedoff, vl); + return __riscv_vid_v_u64m4_mu(mask, maskedoff, vl); } // CHECK-RV64-LABEL: @test_vid_v_u64m8_mu( @@ -795,6 +795,6 @@ vuint64m4_t test_vid_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vid_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, size_t vl) { - return vid_v_u64m8_mu(mask, maskedoff, vl); + return __riscv_vid_v_u64m8_mu(mask, maskedoff, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/viota.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/viota.c index 9dccf2c3dce1ad4ff5f27ed5da8e372d468e6e5e..eea62c69894b19012203eb604f628892d228bc43 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/viota.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/viota.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_viota_m_u8mf8_tu(vuint8mf8_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u8mf8_tu(maskedoff, op1, vl); + return __riscv_viota_m_u8mf8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf4_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_viota_m_u8mf8_tu(vuint8mf8_t maskedoff, vbool64_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_viota_m_u8mf4_tu(vuint8mf4_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u8mf4_tu(maskedoff, op1, vl); + return __riscv_viota_m_u8mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf2_tu( @@ -30,7 +30,7 @@ vuint8mf4_t test_viota_m_u8mf4_tu(vuint8mf4_t maskedoff, vbool32_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_viota_m_u8mf2_tu(vuint8mf2_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u8mf2_tu(maskedoff, op1, vl); + return __riscv_viota_m_u8mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m1_tu( @@ -39,7 +39,7 @@ vuint8mf2_t test_viota_m_u8mf2_tu(vuint8mf2_t maskedoff, vbool16_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_viota_m_u8m1_tu(vuint8m1_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u8m1_tu(maskedoff, op1, vl); + return __riscv_viota_m_u8m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m2_tu( @@ -48,7 +48,7 @@ vuint8m1_t test_viota_m_u8m1_tu(vuint8m1_t maskedoff, vbool8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_viota_m_u8m2_tu(vuint8m2_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u8m2_tu(maskedoff, op1, vl); + return __riscv_viota_m_u8m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m4_tu( @@ -57,7 +57,7 @@ vuint8m2_t test_viota_m_u8m2_tu(vuint8m2_t maskedoff, vbool4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_viota_m_u8m4_tu(vuint8m4_t maskedoff, vbool2_t op1, size_t vl) { - return viota_m_u8m4_tu(maskedoff, op1, vl); + return __riscv_viota_m_u8m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m8_tu( @@ -66,7 +66,7 @@ vuint8m4_t test_viota_m_u8m4_tu(vuint8m4_t maskedoff, vbool2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_viota_m_u8m8_tu(vuint8m8_t maskedoff, vbool1_t op1, size_t vl) { - return viota_m_u8m8_tu(maskedoff, op1, vl); + return __riscv_viota_m_u8m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf4_tu( @@ -75,7 +75,7 @@ vuint8m8_t test_viota_m_u8m8_tu(vuint8m8_t maskedoff, vbool1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_viota_m_u16mf4_tu(vuint16mf4_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u16mf4_tu(maskedoff, op1, vl); + return __riscv_viota_m_u16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf2_tu( @@ -84,7 +84,7 @@ vuint16mf4_t test_viota_m_u16mf4_tu(vuint16mf4_t maskedoff, vbool64_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_viota_m_u16mf2_tu(vuint16mf2_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u16mf2_tu(maskedoff, op1, vl); + return __riscv_viota_m_u16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m1_tu( @@ -93,7 +93,7 @@ vuint16mf2_t test_viota_m_u16mf2_tu(vuint16mf2_t maskedoff, vbool32_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_viota_m_u16m1_tu(vuint16m1_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u16m1_tu(maskedoff, op1, vl); + return __riscv_viota_m_u16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m2_tu( @@ -102,7 +102,7 @@ vuint16m1_t test_viota_m_u16m1_tu(vuint16m1_t maskedoff, vbool16_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_viota_m_u16m2_tu(vuint16m2_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u16m2_tu(maskedoff, op1, vl); + return __riscv_viota_m_u16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m4_tu( @@ -111,7 +111,7 @@ vuint16m2_t test_viota_m_u16m2_tu(vuint16m2_t maskedoff, vbool8_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_viota_m_u16m4_tu(vuint16m4_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u16m4_tu(maskedoff, op1, vl); + return __riscv_viota_m_u16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m8_tu( @@ -120,7 +120,7 @@ vuint16m4_t test_viota_m_u16m4_tu(vuint16m4_t maskedoff, vbool4_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_viota_m_u16m8_tu(vuint16m8_t maskedoff, vbool2_t op1, size_t vl) { - return viota_m_u16m8_tu(maskedoff, op1, vl); + return __riscv_viota_m_u16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32mf2_tu( @@ -129,7 +129,7 @@ vuint16m8_t test_viota_m_u16m8_tu(vuint16m8_t maskedoff, vbool2_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_viota_m_u32mf2_tu(vuint32mf2_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u32mf2_tu(maskedoff, op1, vl); + return __riscv_viota_m_u32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m1_tu( @@ -138,7 +138,7 @@ vuint32mf2_t test_viota_m_u32mf2_tu(vuint32mf2_t maskedoff, vbool64_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_viota_m_u32m1_tu(vuint32m1_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u32m1_tu(maskedoff, op1, vl); + return __riscv_viota_m_u32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m2_tu( @@ -147,7 +147,7 @@ vuint32m1_t test_viota_m_u32m1_tu(vuint32m1_t maskedoff, vbool32_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_viota_m_u32m2_tu(vuint32m2_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u32m2_tu(maskedoff, op1, vl); + return __riscv_viota_m_u32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m4_tu( @@ -156,7 +156,7 @@ vuint32m2_t test_viota_m_u32m2_tu(vuint32m2_t maskedoff, vbool16_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_viota_m_u32m4_tu(vuint32m4_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u32m4_tu(maskedoff, op1, vl); + return __riscv_viota_m_u32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m8_tu( @@ -165,7 +165,7 @@ vuint32m4_t test_viota_m_u32m4_tu(vuint32m4_t maskedoff, vbool8_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_viota_m_u32m8_tu(vuint32m8_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u32m8_tu(maskedoff, op1, vl); + return __riscv_viota_m_u32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m1_tu( @@ -174,7 +174,7 @@ vuint32m8_t test_viota_m_u32m8_tu(vuint32m8_t maskedoff, vbool4_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_viota_m_u64m1_tu(vuint64m1_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u64m1_tu(maskedoff, op1, vl); + return __riscv_viota_m_u64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m2_tu( @@ -183,7 +183,7 @@ vuint64m1_t test_viota_m_u64m1_tu(vuint64m1_t maskedoff, vbool64_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_viota_m_u64m2_tu(vuint64m2_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u64m2_tu(maskedoff, op1, vl); + return __riscv_viota_m_u64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m4_tu( @@ -192,7 +192,7 @@ vuint64m2_t test_viota_m_u64m2_tu(vuint64m2_t maskedoff, vbool32_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_viota_m_u64m4_tu(vuint64m4_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u64m4_tu(maskedoff, op1, vl); + return __riscv_viota_m_u64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m8_tu( @@ -201,7 +201,7 @@ vuint64m4_t test_viota_m_u64m4_tu(vuint64m4_t maskedoff, vbool16_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_viota_m_u64m8_tu(vuint64m8_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u64m8_tu(maskedoff, op1, vl); + return __riscv_viota_m_u64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf8_tum( @@ -210,7 +210,7 @@ vuint64m8_t test_viota_m_u64m8_tu(vuint64m8_t maskedoff, vbool8_t op1, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_viota_m_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u8mf8_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf4_tum( @@ -219,7 +219,7 @@ vuint8mf8_t test_viota_m_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vbool6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_viota_m_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u8mf4_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf2_tum( @@ -228,7 +228,7 @@ vuint8mf4_t test_viota_m_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vbool3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_viota_m_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u8mf2_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m1_tum( @@ -237,7 +237,7 @@ vuint8mf2_t test_viota_m_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vbool1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_viota_m_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u8m1_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m2_tum( @@ -246,7 +246,7 @@ vuint8m1_t test_viota_m_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vbool8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_viota_m_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u8m2_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m4_tum( @@ -255,7 +255,7 @@ vuint8m2_t test_viota_m_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vbool4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_viota_m_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vbool2_t op1, size_t vl) { - return viota_m_u8m4_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m8_tum( @@ -264,7 +264,7 @@ vuint8m4_t test_viota_m_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vbool2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_viota_m_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vbool1_t op1, size_t vl) { - return viota_m_u8m8_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf4_tum( @@ -273,7 +273,7 @@ vuint8m8_t test_viota_m_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vbool1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_viota_m_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf2_tum( @@ -282,7 +282,7 @@ vuint16mf4_t test_viota_m_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vbo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_viota_m_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m1_tum( @@ -291,7 +291,7 @@ vuint16mf2_t test_viota_m_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vbo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_viota_m_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u16m1_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m2_tum( @@ -300,7 +300,7 @@ vuint16m1_t test_viota_m_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vbool1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_viota_m_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u16m2_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m4_tum( @@ -309,7 +309,7 @@ vuint16m2_t test_viota_m_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vbool8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_viota_m_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u16m4_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m8_tum( @@ -318,7 +318,7 @@ vuint16m4_t test_viota_m_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vbool4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_viota_m_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vbool2_t op1, size_t vl) { - return viota_m_u16m8_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32mf2_tum( @@ -327,7 +327,7 @@ vuint16m8_t test_viota_m_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vbool2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_viota_m_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m1_tum( @@ -336,7 +336,7 @@ vuint32mf2_t test_viota_m_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vbo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_viota_m_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u32m1_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m2_tum( @@ -345,7 +345,7 @@ vuint32m1_t test_viota_m_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vbool3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_viota_m_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u32m2_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m4_tum( @@ -354,7 +354,7 @@ vuint32m2_t test_viota_m_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vbool1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_viota_m_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u32m4_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m8_tum( @@ -363,7 +363,7 @@ vuint32m4_t test_viota_m_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vbool8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_viota_m_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u32m8_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m1_tum( @@ -372,7 +372,7 @@ vuint32m8_t test_viota_m_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vbool4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_viota_m_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u64m1_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m2_tum( @@ -381,7 +381,7 @@ vuint64m1_t test_viota_m_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vbool6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_viota_m_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u64m2_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m4_tum( @@ -390,7 +390,7 @@ vuint64m2_t test_viota_m_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vbool3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_viota_m_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u64m4_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m8_tum( @@ -399,7 +399,7 @@ vuint64m4_t test_viota_m_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vbool1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_viota_m_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u64m8_tum(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf8_tumu( @@ -408,7 +408,7 @@ vuint64m8_t test_viota_m_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vbool8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_viota_m_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u8mf8_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf4_tumu( @@ -417,7 +417,7 @@ vuint8mf8_t test_viota_m_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_viota_m_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u8mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf2_tumu( @@ -426,7 +426,7 @@ vuint8mf4_t test_viota_m_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_viota_m_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u8mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m1_tumu( @@ -435,7 +435,7 @@ vuint8mf2_t test_viota_m_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_viota_m_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u8m1_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m2_tumu( @@ -444,7 +444,7 @@ vuint8m1_t test_viota_m_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vbool8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_viota_m_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u8m2_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m4_tumu( @@ -453,7 +453,7 @@ vuint8m2_t test_viota_m_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vbool4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_viota_m_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vbool2_t op1, size_t vl) { - return viota_m_u8m4_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m8_tumu( @@ -462,7 +462,7 @@ vuint8m4_t test_viota_m_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vbool2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_viota_m_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vbool1_t op1, size_t vl) { - return viota_m_u8m8_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf4_tumu( @@ -471,7 +471,7 @@ vuint8m8_t test_viota_m_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vbool1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_viota_m_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf2_tumu( @@ -480,7 +480,7 @@ vuint16mf4_t test_viota_m_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vb // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_viota_m_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m1_tumu( @@ -489,7 +489,7 @@ vuint16mf2_t test_viota_m_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vb // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_viota_m_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m2_tumu( @@ -498,7 +498,7 @@ vuint16m1_t test_viota_m_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_viota_m_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m4_tumu( @@ -507,7 +507,7 @@ vuint16m2_t test_viota_m_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vbool8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_viota_m_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m8_tumu( @@ -516,7 +516,7 @@ vuint16m4_t test_viota_m_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vbool4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_viota_m_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vbool2_t op1, size_t vl) { - return viota_m_u16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32mf2_tumu( @@ -525,7 +525,7 @@ vuint16m8_t test_viota_m_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vbool2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_viota_m_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m1_tumu( @@ -534,7 +534,7 @@ vuint32mf2_t test_viota_m_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vb // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_viota_m_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m2_tumu( @@ -543,7 +543,7 @@ vuint32m1_t test_viota_m_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_viota_m_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m4_tumu( @@ -552,7 +552,7 @@ vuint32m2_t test_viota_m_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_viota_m_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m8_tumu( @@ -561,7 +561,7 @@ vuint32m4_t test_viota_m_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vbool8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_viota_m_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m1_tumu( @@ -570,7 +570,7 @@ vuint32m8_t test_viota_m_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vbool4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_viota_m_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m2_tumu( @@ -579,7 +579,7 @@ vuint64m1_t test_viota_m_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_viota_m_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m4_tumu( @@ -588,7 +588,7 @@ vuint64m2_t test_viota_m_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_viota_m_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m8_tumu( @@ -597,7 +597,7 @@ vuint64m4_t test_viota_m_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vbool // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_viota_m_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf8_mu( @@ -606,7 +606,7 @@ vuint64m8_t test_viota_m_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vbool8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_viota_m_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u8mf8_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf4_mu( @@ -615,7 +615,7 @@ vuint8mf8_t test_viota_m_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vbool64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_viota_m_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u8mf4_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8mf2_mu( @@ -624,7 +624,7 @@ vuint8mf4_t test_viota_m_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vbool32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_viota_m_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u8mf2_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m1_mu( @@ -633,7 +633,7 @@ vuint8mf2_t test_viota_m_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vbool16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_viota_m_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u8m1_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m2_mu( @@ -642,7 +642,7 @@ vuint8m1_t test_viota_m_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vbool8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_viota_m_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u8m2_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m4_mu( @@ -651,7 +651,7 @@ vuint8m2_t test_viota_m_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vbool4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_viota_m_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vbool2_t op1, size_t vl) { - return viota_m_u8m4_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u8m8_mu( @@ -660,7 +660,7 @@ vuint8m4_t test_viota_m_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vbool2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_viota_m_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vbool1_t op1, size_t vl) { - return viota_m_u8m8_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u8m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf4_mu( @@ -669,7 +669,7 @@ vuint8m8_t test_viota_m_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vbool1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_viota_m_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16mf2_mu( @@ -678,7 +678,7 @@ vuint16mf4_t test_viota_m_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_viota_m_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m1_mu( @@ -687,7 +687,7 @@ vuint16mf2_t test_viota_m_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_viota_m_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u16m1_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m2_mu( @@ -696,7 +696,7 @@ vuint16m1_t test_viota_m_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vbool16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_viota_m_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u16m2_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m4_mu( @@ -705,7 +705,7 @@ vuint16m2_t test_viota_m_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vbool8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_viota_m_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u16m4_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u16m8_mu( @@ -714,7 +714,7 @@ vuint16m4_t test_viota_m_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vbool4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_viota_m_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vbool2_t op1, size_t vl) { - return viota_m_u16m8_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32mf2_mu( @@ -723,7 +723,7 @@ vuint16m8_t test_viota_m_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vbool2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_viota_m_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m1_mu( @@ -732,7 +732,7 @@ vuint32mf2_t test_viota_m_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vboo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_viota_m_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u32m1_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m2_mu( @@ -741,7 +741,7 @@ vuint32m1_t test_viota_m_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vbool32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_viota_m_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u32m2_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m4_mu( @@ -750,7 +750,7 @@ vuint32m2_t test_viota_m_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vbool16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_viota_m_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u32m4_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u32m8_mu( @@ -759,7 +759,7 @@ vuint32m4_t test_viota_m_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vbool8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_viota_m_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vbool4_t op1, size_t vl) { - return viota_m_u32m8_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m1_mu( @@ -768,7 +768,7 @@ vuint32m8_t test_viota_m_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vbool4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_viota_m_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vbool64_t op1, size_t vl) { - return viota_m_u64m1_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m2_mu( @@ -777,7 +777,7 @@ vuint64m1_t test_viota_m_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vbool64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_viota_m_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vbool32_t op1, size_t vl) { - return viota_m_u64m2_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m4_mu( @@ -786,7 +786,7 @@ vuint64m2_t test_viota_m_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vbool32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_viota_m_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vbool16_t op1, size_t vl) { - return viota_m_u64m4_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_viota_m_u64m8_mu( @@ -795,6 +795,6 @@ vuint64m4_t test_viota_m_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vbool16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_viota_m_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vbool8_t op1, size_t vl) { - return viota_m_u64m8_mu(mask, maskedoff, op1, vl); + return __riscv_viota_m_u64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16.c index 2f40b26dc939de49015f55fd42f314b6c7abff12..7f96f39b3f1c2079219a2a076cf8eb15e6c7c688 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vle16_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16mf4_tu(maskedoff, base, vl); + return __riscv_vle16_v_f16mf4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vle16_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vle16_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16mf2_tu(maskedoff, base, vl); + return __riscv_vle16_v_f16mf2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vle16_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vle16_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m1_tu(maskedoff, base, vl); + return __riscv_vle16_v_f16m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vle16_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vle16_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m2_tu(maskedoff, base, vl); + return __riscv_vle16_v_f16m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vle16_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vle16_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m4_tu(maskedoff, base, vl); + return __riscv_vle16_v_f16m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vle16_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vle16_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m8_tu(maskedoff, base, vl); + return __riscv_vle16_v_f16m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf4_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vle16_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vle16_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16mf4_tu(maskedoff, base, vl); + return __riscv_vle16_v_i16mf4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf2_tu( @@ -76,7 +76,7 @@ vint16mf4_t test_vle16_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vle16_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16mf2_tu(maskedoff, base, vl); + return __riscv_vle16_v_i16mf2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m1_tu( @@ -85,7 +85,7 @@ vint16mf2_t test_vle16_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vle16_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m1_tu(maskedoff, base, vl); + return __riscv_vle16_v_i16m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m2_tu( @@ -94,7 +94,7 @@ vint16m1_t test_vle16_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vle16_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m2_tu(maskedoff, base, vl); + return __riscv_vle16_v_i16m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m4_tu( @@ -103,7 +103,7 @@ vint16m2_t test_vle16_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vle16_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m4_tu(maskedoff, base, vl); + return __riscv_vle16_v_i16m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m8_tu( @@ -112,7 +112,7 @@ vint16m4_t test_vle16_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vle16_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m8_tu(maskedoff, base, vl); + return __riscv_vle16_v_i16m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf4_tu( @@ -121,7 +121,7 @@ vint16m8_t test_vle16_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vle16_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16mf4_tu(maskedoff, base, vl); + return __riscv_vle16_v_u16mf4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf2_tu( @@ -130,7 +130,7 @@ vuint16mf4_t test_vle16_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vle16_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16mf2_tu(maskedoff, base, vl); + return __riscv_vle16_v_u16mf2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m1_tu( @@ -139,7 +139,7 @@ vuint16mf2_t test_vle16_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vle16_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m1_tu(maskedoff, base, vl); + return __riscv_vle16_v_u16m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m2_tu( @@ -148,7 +148,7 @@ vuint16m1_t test_vle16_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vle16_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m2_tu(maskedoff, base, vl); + return __riscv_vle16_v_u16m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m4_tu( @@ -157,7 +157,7 @@ vuint16m2_t test_vle16_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vle16_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m4_tu(maskedoff, base, vl); + return __riscv_vle16_v_u16m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m8_tu( @@ -166,7 +166,7 @@ vuint16m4_t test_vle16_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vle16_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m8_tu(maskedoff, base, vl); + return __riscv_vle16_v_u16m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf4_tum( @@ -175,7 +175,7 @@ vuint16m8_t test_vle16_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vle16_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16mf4_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16mf4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf2_tum( @@ -184,7 +184,7 @@ vfloat16mf4_t test_vle16_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vle16_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16mf2_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16mf2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m1_tum( @@ -193,7 +193,7 @@ vfloat16mf2_t test_vle16_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vle16_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m1_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m2_tum( @@ -202,7 +202,7 @@ vfloat16m1_t test_vle16_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vle16_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m2_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m4_tum( @@ -211,7 +211,7 @@ vfloat16m2_t test_vle16_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vle16_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m4_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m8_tum( @@ -220,7 +220,7 @@ vfloat16m4_t test_vle16_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vle16_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m8_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf4_tum( @@ -229,7 +229,7 @@ vfloat16m8_t test_vle16_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vle16_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16mf4_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16mf4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf2_tum( @@ -238,7 +238,7 @@ vint16mf4_t test_vle16_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vle16_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16mf2_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16mf2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m1_tum( @@ -247,7 +247,7 @@ vint16mf2_t test_vle16_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vle16_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m1_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m2_tum( @@ -256,7 +256,7 @@ vint16m1_t test_vle16_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vle16_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m2_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m4_tum( @@ -265,7 +265,7 @@ vint16m2_t test_vle16_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vle16_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m4_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m8_tum( @@ -274,7 +274,7 @@ vint16m4_t test_vle16_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vle16_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m8_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf4_tum( @@ -283,7 +283,7 @@ vint16m8_t test_vle16_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vle16_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16mf4_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16mf4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf2_tum( @@ -292,7 +292,7 @@ vuint16mf4_t test_vle16_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vle16_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16mf2_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16mf2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m1_tum( @@ -301,7 +301,7 @@ vuint16mf2_t test_vle16_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vle16_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m1_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m2_tum( @@ -310,7 +310,7 @@ vuint16m1_t test_vle16_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vle16_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m2_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m4_tum( @@ -319,7 +319,7 @@ vuint16m2_t test_vle16_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vle16_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m4_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m8_tum( @@ -328,7 +328,7 @@ vuint16m4_t test_vle16_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vle16_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m8_tum(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf4_tumu( @@ -337,7 +337,7 @@ vuint16m8_t test_vle16_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vle16_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16mf4_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16mf4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf2_tumu( @@ -346,7 +346,7 @@ vfloat16mf4_t test_vle16_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vle16_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16mf2_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16mf2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m1_tumu( @@ -355,7 +355,7 @@ vfloat16mf2_t test_vle16_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vle16_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m2_tumu( @@ -364,7 +364,7 @@ vfloat16m1_t test_vle16_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vle16_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m4_tumu( @@ -373,7 +373,7 @@ vfloat16m2_t test_vle16_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vle16_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m8_tumu( @@ -382,7 +382,7 @@ vfloat16m4_t test_vle16_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vle16_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf4_tumu( @@ -391,7 +391,7 @@ vfloat16m8_t test_vle16_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vle16_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16mf4_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16mf4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf2_tumu( @@ -400,7 +400,7 @@ vint16mf4_t test_vle16_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vle16_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16mf2_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16mf2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m1_tumu( @@ -409,7 +409,7 @@ vint16mf2_t test_vle16_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vle16_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m2_tumu( @@ -418,7 +418,7 @@ vint16m1_t test_vle16_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vle16_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m4_tumu( @@ -427,7 +427,7 @@ vint16m2_t test_vle16_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vle16_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m8_tumu( @@ -436,7 +436,7 @@ vint16m4_t test_vle16_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vle16_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf4_tumu( @@ -445,7 +445,7 @@ vint16m8_t test_vle16_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vle16_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16mf4_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16mf4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf2_tumu( @@ -454,7 +454,7 @@ vuint16mf4_t test_vle16_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vle16_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16mf2_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16mf2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m1_tumu( @@ -463,7 +463,7 @@ vuint16mf2_t test_vle16_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vle16_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m2_tumu( @@ -472,7 +472,7 @@ vuint16m1_t test_vle16_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vle16_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m4_tumu( @@ -481,7 +481,7 @@ vuint16m2_t test_vle16_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vle16_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m8_tumu( @@ -490,7 +490,7 @@ vuint16m4_t test_vle16_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vle16_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf4_mu( @@ -499,7 +499,7 @@ vuint16m8_t test_vle16_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vle16_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16mf4_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16mf4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16mf2_mu( @@ -508,7 +508,7 @@ vfloat16mf4_t test_vle16_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vle16_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16mf2_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16mf2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m1_mu( @@ -517,7 +517,7 @@ vfloat16mf2_t test_vle16_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vle16_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m1_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m2_mu( @@ -526,7 +526,7 @@ vfloat16m1_t test_vle16_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vle16_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m2_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m4_mu( @@ -535,7 +535,7 @@ vfloat16m2_t test_vle16_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vle16_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m4_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_f16m8_mu( @@ -544,7 +544,7 @@ vfloat16m4_t test_vle16_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vle16_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, size_t vl) { - return vle16_v_f16m8_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_f16m8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf4_mu( @@ -553,7 +553,7 @@ vfloat16m8_t test_vle16_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vle16_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16mf4_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16mf4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16mf2_mu( @@ -562,7 +562,7 @@ vint16mf4_t test_vle16_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vle16_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16mf2_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16mf2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m1_mu( @@ -571,7 +571,7 @@ vint16mf2_t test_vle16_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vle16_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m1_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m2_mu( @@ -580,7 +580,7 @@ vint16m1_t test_vle16_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vle16_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m2_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m4_mu( @@ -589,7 +589,7 @@ vint16m2_t test_vle16_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vle16_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m4_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_i16m8_mu( @@ -598,7 +598,7 @@ vint16m4_t test_vle16_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vle16_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, size_t vl) { - return vle16_v_i16m8_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_i16m8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf4_mu( @@ -607,7 +607,7 @@ vint16m8_t test_vle16_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vle16_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16mf4_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16mf4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16mf2_mu( @@ -616,7 +616,7 @@ vuint16mf4_t test_vle16_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vle16_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16mf2_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16mf2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m1_mu( @@ -625,7 +625,7 @@ vuint16mf2_t test_vle16_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vle16_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m1_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m2_mu( @@ -634,7 +634,7 @@ vuint16m1_t test_vle16_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vle16_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m2_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m4_mu( @@ -643,7 +643,7 @@ vuint16m2_t test_vle16_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vle16_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m4_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle16_v_u16m8_mu( @@ -652,6 +652,6 @@ vuint16m4_t test_vle16_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vle16_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, size_t vl) { - return vle16_v_u16m8_mu(mask, maskedoff, base, vl); + return __riscv_vle16_v_u16m8_mu(mask, maskedoff, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16ff.c index 7838873bf8a8eff94163c40f86e02f363d8199f8..2908a3dabfe52f0b1ba7f9b805cdafcd68079469 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle16ff.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf4_t test_vle16ff_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf2_tu( @@ -28,7 +28,7 @@ vfloat16mf4_t test_vle16ff_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 * // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf2_t test_vle16ff_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m1_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vle16ff_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 * // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m1_t test_vle16ff_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m2_tu( @@ -52,7 +52,7 @@ vfloat16m1_t test_vle16ff_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m2_t test_vle16ff_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m4_tu( @@ -64,7 +64,7 @@ vfloat16m2_t test_vle16ff_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m4_t test_vle16ff_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m8_tu( @@ -76,7 +76,7 @@ vfloat16m4_t test_vle16ff_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m8_t test_vle16ff_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf4_tu( @@ -88,7 +88,7 @@ vfloat16m8_t test_vle16ff_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf4_t test_vle16ff_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf2_tu( @@ -100,7 +100,7 @@ vint16mf4_t test_vle16ff_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf2_t test_vle16ff_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m1_tu( @@ -112,7 +112,7 @@ vint16mf2_t test_vle16ff_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m1_t test_vle16ff_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m2_tu( @@ -124,7 +124,7 @@ vint16m1_t test_vle16ff_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m2_t test_vle16ff_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m4_tu( @@ -136,7 +136,7 @@ vint16m2_t test_vle16ff_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m4_t test_vle16ff_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m8_tu( @@ -148,7 +148,7 @@ vint16m4_t test_vle16ff_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m8_t test_vle16ff_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf4_tu( @@ -160,7 +160,7 @@ vint16m8_t test_vle16ff_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf4_t test_vle16ff_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf2_tu( @@ -172,7 +172,7 @@ vuint16mf4_t test_vle16ff_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *ba // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf2_t test_vle16ff_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m1_tu( @@ -184,7 +184,7 @@ vuint16mf2_t test_vle16ff_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *ba // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m1_t test_vle16ff_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m2_tu( @@ -196,7 +196,7 @@ vuint16m1_t test_vle16ff_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m2_t test_vle16ff_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m4_tu( @@ -208,7 +208,7 @@ vuint16m2_t test_vle16ff_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m4_t test_vle16ff_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m8_tu( @@ -220,7 +220,7 @@ vuint16m4_t test_vle16ff_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m8_t test_vle16ff_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf4_tum( @@ -232,7 +232,7 @@ vuint16m8_t test_vle16ff_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf4_t test_vle16ff_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf2_tum( @@ -244,7 +244,7 @@ vfloat16mf4_t test_vle16ff_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf2_t test_vle16ff_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m1_tum( @@ -256,7 +256,7 @@ vfloat16mf2_t test_vle16ff_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m1_t test_vle16ff_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m2_tum( @@ -268,7 +268,7 @@ vfloat16m1_t test_vle16ff_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m2_t test_vle16ff_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m4_tum( @@ -280,7 +280,7 @@ vfloat16m2_t test_vle16ff_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m4_t test_vle16ff_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m8_tum( @@ -292,7 +292,7 @@ vfloat16m4_t test_vle16ff_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m8_t test_vle16ff_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf4_tum( @@ -304,7 +304,7 @@ vfloat16m8_t test_vle16ff_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf4_t test_vle16ff_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf2_tum( @@ -316,7 +316,7 @@ vint16mf4_t test_vle16ff_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf2_t test_vle16ff_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m1_tum( @@ -328,7 +328,7 @@ vint16mf2_t test_vle16ff_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m1_t test_vle16ff_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m2_tum( @@ -340,7 +340,7 @@ vint16m1_t test_vle16ff_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m2_t test_vle16ff_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m4_tum( @@ -352,7 +352,7 @@ vint16m2_t test_vle16ff_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m4_t test_vle16ff_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m8_tum( @@ -364,7 +364,7 @@ vint16m4_t test_vle16ff_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m8_t test_vle16ff_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf4_tum( @@ -376,7 +376,7 @@ vint16m8_t test_vle16ff_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf4_t test_vle16ff_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf2_tum( @@ -388,7 +388,7 @@ vuint16mf4_t test_vle16ff_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf2_t test_vle16ff_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m1_tum( @@ -400,7 +400,7 @@ vuint16mf2_t test_vle16ff_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m1_t test_vle16ff_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m2_tum( @@ -412,7 +412,7 @@ vuint16m1_t test_vle16ff_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m2_t test_vle16ff_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m4_tum( @@ -424,7 +424,7 @@ vuint16m2_t test_vle16ff_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m4_t test_vle16ff_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m8_tum( @@ -436,7 +436,7 @@ vuint16m4_t test_vle16ff_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m8_t test_vle16ff_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf4_tumu( @@ -448,7 +448,7 @@ vuint16m8_t test_vle16ff_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf4_t test_vle16ff_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf2_tumu( @@ -460,7 +460,7 @@ vfloat16mf4_t test_vle16ff_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf2_t test_vle16ff_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m1_tumu( @@ -472,7 +472,7 @@ vfloat16mf2_t test_vle16ff_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m1_t test_vle16ff_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m2_tumu( @@ -484,7 +484,7 @@ vfloat16m1_t test_vle16ff_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m2_t test_vle16ff_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m4_tumu( @@ -496,7 +496,7 @@ vfloat16m2_t test_vle16ff_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m4_t test_vle16ff_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m8_tumu( @@ -508,7 +508,7 @@ vfloat16m4_t test_vle16ff_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m8_t test_vle16ff_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf4_tumu( @@ -520,7 +520,7 @@ vfloat16m8_t test_vle16ff_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf4_t test_vle16ff_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf2_tumu( @@ -532,7 +532,7 @@ vint16mf4_t test_vle16ff_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf2_t test_vle16ff_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m1_tumu( @@ -544,7 +544,7 @@ vint16mf2_t test_vle16ff_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m1_t test_vle16ff_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m2_tumu( @@ -556,7 +556,7 @@ vint16m1_t test_vle16ff_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m2_t test_vle16ff_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m4_tumu( @@ -568,7 +568,7 @@ vint16m2_t test_vle16ff_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m4_t test_vle16ff_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m8_tumu( @@ -580,7 +580,7 @@ vint16m4_t test_vle16ff_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m8_t test_vle16ff_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf4_tumu( @@ -592,7 +592,7 @@ vint16m8_t test_vle16ff_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf4_t test_vle16ff_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf2_tumu( @@ -604,7 +604,7 @@ vuint16mf4_t test_vle16ff_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf2_t test_vle16ff_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m1_tumu( @@ -616,7 +616,7 @@ vuint16mf2_t test_vle16ff_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m1_t test_vle16ff_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m2_tumu( @@ -628,7 +628,7 @@ vuint16m1_t test_vle16ff_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m2_t test_vle16ff_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m4_tumu( @@ -640,7 +640,7 @@ vuint16m2_t test_vle16ff_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m4_t test_vle16ff_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m8_tumu( @@ -652,7 +652,7 @@ vuint16m4_t test_vle16ff_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m8_t test_vle16ff_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf4_mu( @@ -664,7 +664,7 @@ vuint16m8_t test_vle16ff_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf4_t test_vle16ff_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16mf2_mu( @@ -676,7 +676,7 @@ vfloat16mf4_t test_vle16ff_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16mf2_t test_vle16ff_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16mf2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16mf2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m1_mu( @@ -688,7 +688,7 @@ vfloat16mf2_t test_vle16ff_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m1_t test_vle16ff_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m2_mu( @@ -700,7 +700,7 @@ vfloat16m1_t test_vle16ff_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m2_t test_vle16ff_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m4_mu( @@ -712,7 +712,7 @@ vfloat16m2_t test_vle16ff_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m4_t test_vle16ff_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_f16m8_mu( @@ -724,7 +724,7 @@ vfloat16m4_t test_vle16ff_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat16m8_t test_vle16ff_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, size_t *new_vl, size_t vl) { - return vle16ff_v_f16m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_f16m8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf4_mu( @@ -736,7 +736,7 @@ vfloat16m8_t test_vle16ff_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf4_t test_vle16ff_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16mf2_mu( @@ -748,7 +748,7 @@ vint16mf4_t test_vle16ff_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vint16mf2_t test_vle16ff_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16mf2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16mf2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m1_mu( @@ -760,7 +760,7 @@ vint16mf2_t test_vle16ff_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m1_t test_vle16ff_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m2_mu( @@ -772,7 +772,7 @@ vint16m1_t test_vle16ff_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m2_t test_vle16ff_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m4_mu( @@ -784,7 +784,7 @@ vint16m2_t test_vle16ff_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m4_t test_vle16ff_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_i16m8_mu( @@ -796,7 +796,7 @@ vint16m4_t test_vle16ff_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vint16m8_t test_vle16ff_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_i16m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_i16m8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf4_mu( @@ -808,7 +808,7 @@ vint16m8_t test_vle16ff_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf4_t test_vle16ff_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16mf2_mu( @@ -820,7 +820,7 @@ vuint16mf4_t test_vle16ff_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16mf2_t test_vle16ff_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16mf2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16mf2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m1_mu( @@ -832,7 +832,7 @@ vuint16mf2_t test_vle16ff_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m1_t test_vle16ff_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m2_mu( @@ -844,7 +844,7 @@ vuint16m1_t test_vle16ff_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m2_t test_vle16ff_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m4_mu( @@ -856,7 +856,7 @@ vuint16m2_t test_vle16ff_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m4_t test_vle16ff_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle16ff_v_u16m8_mu( @@ -868,6 +868,6 @@ vuint16m4_t test_vle16ff_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint16m8_t test_vle16ff_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, size_t *new_vl, size_t vl) { - return vle16ff_v_u16m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle16ff_v_u16m8_mu(mask, maskedoff, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle32.c index d7a96aa2080867cf09e65844f55b2f62758eb63f..35ca4d85c5a7293142744cf6181d0b23dca765f6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vle32_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32mf2_tu(maskedoff, base, vl); + return __riscv_vle32_v_f32mf2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m1_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vle32_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vle32_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m1_tu(maskedoff, base, vl); + return __riscv_vle32_v_f32m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m2_tu( @@ -31,7 +31,7 @@ vfloat32m1_t test_vle32_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vle32_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m2_tu(maskedoff, base, vl); + return __riscv_vle32_v_f32m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m4_tu( @@ -40,7 +40,7 @@ vfloat32m2_t test_vle32_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vle32_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m4_tu(maskedoff, base, vl); + return __riscv_vle32_v_f32m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m8_tu( @@ -49,7 +49,7 @@ vfloat32m4_t test_vle32_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vle32_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m8_tu(maskedoff, base, vl); + return __riscv_vle32_v_f32m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32mf2_tu( @@ -58,7 +58,7 @@ vfloat32m8_t test_vle32_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vle32_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32mf2_tu(maskedoff, base, vl); + return __riscv_vle32_v_i32mf2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m1_tu( @@ -67,7 +67,7 @@ vint32mf2_t test_vle32_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vle32_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m1_tu(maskedoff, base, vl); + return __riscv_vle32_v_i32m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m2_tu( @@ -76,7 +76,7 @@ vint32m1_t test_vle32_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vle32_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m2_tu(maskedoff, base, vl); + return __riscv_vle32_v_i32m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m4_tu( @@ -85,7 +85,7 @@ vint32m2_t test_vle32_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vle32_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m4_tu(maskedoff, base, vl); + return __riscv_vle32_v_i32m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m8_tu( @@ -94,7 +94,7 @@ vint32m4_t test_vle32_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vle32_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m8_tu(maskedoff, base, vl); + return __riscv_vle32_v_i32m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32mf2_tu( @@ -103,7 +103,7 @@ vint32m8_t test_vle32_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vle32_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32mf2_tu(maskedoff, base, vl); + return __riscv_vle32_v_u32mf2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m1_tu( @@ -112,7 +112,7 @@ vuint32mf2_t test_vle32_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vle32_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m1_tu(maskedoff, base, vl); + return __riscv_vle32_v_u32m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m2_tu( @@ -121,7 +121,7 @@ vuint32m1_t test_vle32_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vle32_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m2_tu(maskedoff, base, vl); + return __riscv_vle32_v_u32m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m4_tu( @@ -130,7 +130,7 @@ vuint32m2_t test_vle32_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vle32_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m4_tu(maskedoff, base, vl); + return __riscv_vle32_v_u32m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m8_tu( @@ -139,7 +139,7 @@ vuint32m4_t test_vle32_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vle32_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m8_tu(maskedoff, base, vl); + return __riscv_vle32_v_u32m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32mf2_tum( @@ -148,7 +148,7 @@ vuint32m8_t test_vle32_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vle32_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32mf2_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32mf2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m1_tum( @@ -157,7 +157,7 @@ vfloat32mf2_t test_vle32_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vle32_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m1_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m2_tum( @@ -166,7 +166,7 @@ vfloat32m1_t test_vle32_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vle32_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m2_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m4_tum( @@ -175,7 +175,7 @@ vfloat32m2_t test_vle32_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vle32_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m4_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m8_tum( @@ -184,7 +184,7 @@ vfloat32m4_t test_vle32_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vle32_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m8_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32mf2_tum( @@ -193,7 +193,7 @@ vfloat32m8_t test_vle32_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vle32_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32mf2_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32mf2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m1_tum( @@ -202,7 +202,7 @@ vint32mf2_t test_vle32_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vle32_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m1_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m2_tum( @@ -211,7 +211,7 @@ vint32m1_t test_vle32_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vle32_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m2_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m4_tum( @@ -220,7 +220,7 @@ vint32m2_t test_vle32_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vle32_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m4_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m8_tum( @@ -229,7 +229,7 @@ vint32m4_t test_vle32_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vle32_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m8_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32mf2_tum( @@ -238,7 +238,7 @@ vint32m8_t test_vle32_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vle32_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32mf2_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32mf2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m1_tum( @@ -247,7 +247,7 @@ vuint32mf2_t test_vle32_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vle32_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m1_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m2_tum( @@ -256,7 +256,7 @@ vuint32m1_t test_vle32_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vle32_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m2_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m4_tum( @@ -265,7 +265,7 @@ vuint32m2_t test_vle32_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vle32_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m4_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m8_tum( @@ -274,7 +274,7 @@ vuint32m4_t test_vle32_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vle32_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m8_tum(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32mf2_tumu( @@ -283,7 +283,7 @@ vuint32m8_t test_vle32_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vle32_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32mf2_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32mf2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m1_tumu( @@ -292,7 +292,7 @@ vfloat32mf2_t test_vle32_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vle32_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m2_tumu( @@ -301,7 +301,7 @@ vfloat32m1_t test_vle32_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vle32_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m4_tumu( @@ -310,7 +310,7 @@ vfloat32m2_t test_vle32_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vle32_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m8_tumu( @@ -319,7 +319,7 @@ vfloat32m4_t test_vle32_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vle32_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32mf2_tumu( @@ -328,7 +328,7 @@ vfloat32m8_t test_vle32_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vle32_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32mf2_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32mf2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m1_tumu( @@ -337,7 +337,7 @@ vint32mf2_t test_vle32_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vle32_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m2_tumu( @@ -346,7 +346,7 @@ vint32m1_t test_vle32_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vle32_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m4_tumu( @@ -355,7 +355,7 @@ vint32m2_t test_vle32_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vle32_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m8_tumu( @@ -364,7 +364,7 @@ vint32m4_t test_vle32_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vle32_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32mf2_tumu( @@ -373,7 +373,7 @@ vint32m8_t test_vle32_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vle32_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32mf2_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32mf2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m1_tumu( @@ -382,7 +382,7 @@ vuint32mf2_t test_vle32_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vle32_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m2_tumu( @@ -391,7 +391,7 @@ vuint32m1_t test_vle32_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vle32_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m4_tumu( @@ -400,7 +400,7 @@ vuint32m2_t test_vle32_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vle32_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m8_tumu( @@ -409,7 +409,7 @@ vuint32m4_t test_vle32_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vle32_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32mf2_mu( @@ -418,7 +418,7 @@ vuint32m8_t test_vle32_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vle32_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32mf2_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32mf2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m1_mu( @@ -427,7 +427,7 @@ vfloat32mf2_t test_vle32_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vle32_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m1_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m2_mu( @@ -436,7 +436,7 @@ vfloat32m1_t test_vle32_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vle32_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m2_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m4_mu( @@ -445,7 +445,7 @@ vfloat32m2_t test_vle32_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vle32_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m4_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_f32m8_mu( @@ -454,7 +454,7 @@ vfloat32m4_t test_vle32_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vle32_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, size_t vl) { - return vle32_v_f32m8_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_f32m8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32mf2_mu( @@ -463,7 +463,7 @@ vfloat32m8_t test_vle32_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vle32_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32mf2_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32mf2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m1_mu( @@ -472,7 +472,7 @@ vint32mf2_t test_vle32_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vle32_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m1_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m2_mu( @@ -481,7 +481,7 @@ vint32m1_t test_vle32_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vle32_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m2_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m4_mu( @@ -490,7 +490,7 @@ vint32m2_t test_vle32_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vle32_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m4_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_i32m8_mu( @@ -499,7 +499,7 @@ vint32m4_t test_vle32_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vle32_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, size_t vl) { - return vle32_v_i32m8_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_i32m8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32mf2_mu( @@ -508,7 +508,7 @@ vint32m8_t test_vle32_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vle32_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32mf2_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32mf2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m1_mu( @@ -517,7 +517,7 @@ vuint32mf2_t test_vle32_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vle32_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m1_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m2_mu( @@ -526,7 +526,7 @@ vuint32m1_t test_vle32_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vle32_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m2_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m4_mu( @@ -535,7 +535,7 @@ vuint32m2_t test_vle32_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vle32_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m4_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle32_v_u32m8_mu( @@ -544,6 +544,6 @@ vuint32m4_t test_vle32_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vle32_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, size_t vl) { - return vle32_v_u32m8_mu(mask, maskedoff, base, vl); + return __riscv_vle32_v_u32m8_mu(mask, maskedoff, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle32ff.c index 16f670e105d1e9540bb5c57f23577c20e05a2562..94ec11f06c94d939e9187042a876fe186b0eea05 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle32ff.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32mf2_t test_vle32ff_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32mf2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32mf2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m1_tu( @@ -28,7 +28,7 @@ vfloat32mf2_t test_vle32ff_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *bas // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m1_t test_vle32ff_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m2_tu( @@ -40,7 +40,7 @@ vfloat32m1_t test_vle32ff_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m2_t test_vle32ff_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m4_tu( @@ -52,7 +52,7 @@ vfloat32m2_t test_vle32ff_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m4_t test_vle32ff_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m8_tu( @@ -64,7 +64,7 @@ vfloat32m4_t test_vle32ff_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m8_t test_vle32ff_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32mf2_tu( @@ -76,7 +76,7 @@ vfloat32m8_t test_vle32ff_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vint32mf2_t test_vle32ff_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32mf2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32mf2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m1_tu( @@ -88,7 +88,7 @@ vint32mf2_t test_vle32ff_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m1_t test_vle32ff_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m2_tu( @@ -100,7 +100,7 @@ vint32m1_t test_vle32ff_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m2_t test_vle32ff_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m4_tu( @@ -112,7 +112,7 @@ vint32m2_t test_vle32ff_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m4_t test_vle32ff_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m8_tu( @@ -124,7 +124,7 @@ vint32m4_t test_vle32ff_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m8_t test_vle32ff_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32mf2_tu( @@ -136,7 +136,7 @@ vint32m8_t test_vle32ff_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32mf2_t test_vle32ff_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32mf2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32mf2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m1_tu( @@ -148,7 +148,7 @@ vuint32mf2_t test_vle32ff_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *ba // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m1_t test_vle32ff_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m2_tu( @@ -160,7 +160,7 @@ vuint32m1_t test_vle32ff_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m2_t test_vle32ff_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m4_tu( @@ -172,7 +172,7 @@ vuint32m2_t test_vle32ff_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m4_t test_vle32ff_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m8_tu( @@ -184,7 +184,7 @@ vuint32m4_t test_vle32ff_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m8_t test_vle32ff_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32mf2_tum( @@ -196,7 +196,7 @@ vuint32m8_t test_vle32ff_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32mf2_t test_vle32ff_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32mf2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32mf2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m1_tum( @@ -208,7 +208,7 @@ vfloat32mf2_t test_vle32ff_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m1_t test_vle32ff_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m2_tum( @@ -220,7 +220,7 @@ vfloat32m1_t test_vle32ff_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m2_t test_vle32ff_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m4_tum( @@ -232,7 +232,7 @@ vfloat32m2_t test_vle32ff_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m4_t test_vle32ff_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m8_tum( @@ -244,7 +244,7 @@ vfloat32m4_t test_vle32ff_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m8_t test_vle32ff_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32mf2_tum( @@ -256,7 +256,7 @@ vfloat32m8_t test_vle32ff_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vint32mf2_t test_vle32ff_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32mf2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32mf2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m1_tum( @@ -268,7 +268,7 @@ vint32mf2_t test_vle32ff_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m1_t test_vle32ff_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m2_tum( @@ -280,7 +280,7 @@ vint32m1_t test_vle32ff_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m2_t test_vle32ff_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m4_tum( @@ -292,7 +292,7 @@ vint32m2_t test_vle32ff_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m4_t test_vle32ff_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m8_tum( @@ -304,7 +304,7 @@ vint32m4_t test_vle32ff_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m8_t test_vle32ff_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32mf2_tum( @@ -316,7 +316,7 @@ vint32m8_t test_vle32ff_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32mf2_t test_vle32ff_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32mf2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32mf2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m1_tum( @@ -328,7 +328,7 @@ vuint32mf2_t test_vle32ff_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m1_t test_vle32ff_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m2_tum( @@ -340,7 +340,7 @@ vuint32m1_t test_vle32ff_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m2_t test_vle32ff_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m4_tum( @@ -352,7 +352,7 @@ vuint32m2_t test_vle32ff_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m4_t test_vle32ff_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m8_tum( @@ -364,7 +364,7 @@ vuint32m4_t test_vle32ff_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m8_t test_vle32ff_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32mf2_tumu( @@ -376,7 +376,7 @@ vuint32m8_t test_vle32ff_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32mf2_t test_vle32ff_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32mf2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32mf2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m1_tumu( @@ -388,7 +388,7 @@ vfloat32mf2_t test_vle32ff_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m1_t test_vle32ff_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m2_tumu( @@ -400,7 +400,7 @@ vfloat32m1_t test_vle32ff_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m2_t test_vle32ff_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m4_tumu( @@ -412,7 +412,7 @@ vfloat32m2_t test_vle32ff_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m4_t test_vle32ff_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m8_tumu( @@ -424,7 +424,7 @@ vfloat32m4_t test_vle32ff_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m8_t test_vle32ff_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32mf2_tumu( @@ -436,7 +436,7 @@ vfloat32m8_t test_vle32ff_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vint32mf2_t test_vle32ff_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32mf2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32mf2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m1_tumu( @@ -448,7 +448,7 @@ vint32mf2_t test_vle32ff_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m1_t test_vle32ff_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m2_tumu( @@ -460,7 +460,7 @@ vint32m1_t test_vle32ff_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m2_t test_vle32ff_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m4_tumu( @@ -472,7 +472,7 @@ vint32m2_t test_vle32ff_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m4_t test_vle32ff_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m8_tumu( @@ -484,7 +484,7 @@ vint32m4_t test_vle32ff_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m8_t test_vle32ff_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32mf2_tumu( @@ -496,7 +496,7 @@ vint32m8_t test_vle32ff_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32mf2_t test_vle32ff_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32mf2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32mf2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m1_tumu( @@ -508,7 +508,7 @@ vuint32mf2_t test_vle32ff_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m1_t test_vle32ff_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m2_tumu( @@ -520,7 +520,7 @@ vuint32m1_t test_vle32ff_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m2_t test_vle32ff_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m4_tumu( @@ -532,7 +532,7 @@ vuint32m2_t test_vle32ff_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m4_t test_vle32ff_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m8_tumu( @@ -544,7 +544,7 @@ vuint32m4_t test_vle32ff_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m8_t test_vle32ff_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32mf2_mu( @@ -556,7 +556,7 @@ vuint32m8_t test_vle32ff_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32mf2_t test_vle32ff_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32mf2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32mf2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m1_mu( @@ -568,7 +568,7 @@ vfloat32mf2_t test_vle32ff_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m1_t test_vle32ff_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m2_mu( @@ -580,7 +580,7 @@ vfloat32m1_t test_vle32ff_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m2_t test_vle32ff_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m4_mu( @@ -592,7 +592,7 @@ vfloat32m2_t test_vle32ff_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m4_t test_vle32ff_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_f32m8_mu( @@ -604,7 +604,7 @@ vfloat32m4_t test_vle32ff_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat32m8_t test_vle32ff_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, size_t *new_vl, size_t vl) { - return vle32ff_v_f32m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_f32m8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32mf2_mu( @@ -616,7 +616,7 @@ vfloat32m8_t test_vle32ff_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vint32mf2_t test_vle32ff_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32mf2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32mf2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m1_mu( @@ -628,7 +628,7 @@ vint32mf2_t test_vle32ff_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m1_t test_vle32ff_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m2_mu( @@ -640,7 +640,7 @@ vint32m1_t test_vle32ff_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m2_t test_vle32ff_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m4_mu( @@ -652,7 +652,7 @@ vint32m2_t test_vle32ff_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m4_t test_vle32ff_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_i32m8_mu( @@ -664,7 +664,7 @@ vint32m4_t test_vle32ff_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vint32m8_t test_vle32ff_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_i32m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_i32m8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32mf2_mu( @@ -676,7 +676,7 @@ vint32m8_t test_vle32ff_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32mf2_t test_vle32ff_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32mf2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32mf2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m1_mu( @@ -688,7 +688,7 @@ vuint32mf2_t test_vle32ff_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m1_t test_vle32ff_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m2_mu( @@ -700,7 +700,7 @@ vuint32m1_t test_vle32ff_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m2_t test_vle32ff_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m4_mu( @@ -712,7 +712,7 @@ vuint32m2_t test_vle32ff_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m4_t test_vle32ff_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle32ff_v_u32m8_mu( @@ -724,6 +724,6 @@ vuint32m4_t test_vle32ff_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint32m8_t test_vle32ff_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, size_t *new_vl, size_t vl) { - return vle32ff_v_u32m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle32ff_v_u32m8_mu(mask, maskedoff, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle64.c index 3796da074e63143fc9ab3586041b162dee932c6c..53ca08b1b850e90aecdc2fb7b9defcf7169936ea 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vle64_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m1_tu(maskedoff, base, vl); + return __riscv_vle64_v_f64m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m2_tu( @@ -22,7 +22,7 @@ vfloat64m1_t test_vle64_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vle64_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m2_tu(maskedoff, base, vl); + return __riscv_vle64_v_f64m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m4_tu( @@ -31,7 +31,7 @@ vfloat64m2_t test_vle64_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vle64_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m4_tu(maskedoff, base, vl); + return __riscv_vle64_v_f64m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m8_tu( @@ -40,7 +40,7 @@ vfloat64m4_t test_vle64_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vle64_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m8_tu(maskedoff, base, vl); + return __riscv_vle64_v_f64m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m1_tu( @@ -49,7 +49,7 @@ vfloat64m8_t test_vle64_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vle64_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m1_tu(maskedoff, base, vl); + return __riscv_vle64_v_i64m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m2_tu( @@ -58,7 +58,7 @@ vint64m1_t test_vle64_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vle64_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m2_tu(maskedoff, base, vl); + return __riscv_vle64_v_i64m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m4_tu( @@ -67,7 +67,7 @@ vint64m2_t test_vle64_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vle64_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m4_tu(maskedoff, base, vl); + return __riscv_vle64_v_i64m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m8_tu( @@ -76,7 +76,7 @@ vint64m4_t test_vle64_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vle64_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m8_tu(maskedoff, base, vl); + return __riscv_vle64_v_i64m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m1_tu( @@ -85,7 +85,7 @@ vint64m8_t test_vle64_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vle64_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m1_tu(maskedoff, base, vl); + return __riscv_vle64_v_u64m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m2_tu( @@ -94,7 +94,7 @@ vuint64m1_t test_vle64_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vle64_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m2_tu(maskedoff, base, vl); + return __riscv_vle64_v_u64m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m4_tu( @@ -103,7 +103,7 @@ vuint64m2_t test_vle64_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vle64_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m4_tu(maskedoff, base, vl); + return __riscv_vle64_v_u64m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m8_tu( @@ -112,7 +112,7 @@ vuint64m4_t test_vle64_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vle64_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m8_tu(maskedoff, base, vl); + return __riscv_vle64_v_u64m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m1_tum( @@ -121,7 +121,7 @@ vuint64m8_t test_vle64_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, s // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vle64_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m1_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m2_tum( @@ -130,7 +130,7 @@ vfloat64m1_t test_vle64_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vle64_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m2_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m4_tum( @@ -139,7 +139,7 @@ vfloat64m2_t test_vle64_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vle64_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m4_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m8_tum( @@ -148,7 +148,7 @@ vfloat64m4_t test_vle64_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vle64_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m8_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m1_tum( @@ -157,7 +157,7 @@ vfloat64m8_t test_vle64_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vle64_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m1_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m2_tum( @@ -166,7 +166,7 @@ vint64m1_t test_vle64_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vle64_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m2_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m4_tum( @@ -175,7 +175,7 @@ vint64m2_t test_vle64_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vle64_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m4_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m8_tum( @@ -184,7 +184,7 @@ vint64m4_t test_vle64_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vle64_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m8_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m1_tum( @@ -193,7 +193,7 @@ vint64m8_t test_vle64_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vle64_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m1_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m2_tum( @@ -202,7 +202,7 @@ vuint64m1_t test_vle64_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vle64_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m2_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m4_tum( @@ -211,7 +211,7 @@ vuint64m2_t test_vle64_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vle64_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m4_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m8_tum( @@ -220,7 +220,7 @@ vuint64m4_t test_vle64_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vle64_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m8_tum(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m1_tumu( @@ -229,7 +229,7 @@ vuint64m8_t test_vle64_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vle64_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m2_tumu( @@ -238,7 +238,7 @@ vfloat64m1_t test_vle64_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vle64_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m4_tumu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vle64_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vle64_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m8_tumu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vle64_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vle64_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m1_tumu( @@ -265,7 +265,7 @@ vfloat64m8_t test_vle64_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vle64_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m2_tumu( @@ -274,7 +274,7 @@ vint64m1_t test_vle64_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vle64_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m4_tumu( @@ -283,7 +283,7 @@ vint64m2_t test_vle64_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vle64_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m8_tumu( @@ -292,7 +292,7 @@ vint64m4_t test_vle64_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vle64_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m1_tumu( @@ -301,7 +301,7 @@ vint64m8_t test_vle64_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vle64_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m2_tumu( @@ -310,7 +310,7 @@ vuint64m1_t test_vle64_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vle64_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m4_tumu( @@ -319,7 +319,7 @@ vuint64m2_t test_vle64_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vle64_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m8_tumu( @@ -328,7 +328,7 @@ vuint64m4_t test_vle64_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vle64_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m1_mu( @@ -337,7 +337,7 @@ vuint64m8_t test_vle64_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vle64_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m1_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m2_mu( @@ -346,7 +346,7 @@ vfloat64m1_t test_vle64_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vle64_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m2_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m4_mu( @@ -355,7 +355,7 @@ vfloat64m2_t test_vle64_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vle64_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m4_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_f64m8_mu( @@ -364,7 +364,7 @@ vfloat64m4_t test_vle64_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vle64_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, size_t vl) { - return vle64_v_f64m8_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_f64m8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m1_mu( @@ -373,7 +373,7 @@ vfloat64m8_t test_vle64_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vle64_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m1_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m2_mu( @@ -382,7 +382,7 @@ vint64m1_t test_vle64_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vle64_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m2_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m4_mu( @@ -391,7 +391,7 @@ vint64m2_t test_vle64_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vle64_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m4_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_i64m8_mu( @@ -400,7 +400,7 @@ vint64m4_t test_vle64_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vle64_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, size_t vl) { - return vle64_v_i64m8_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_i64m8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m1_mu( @@ -409,7 +409,7 @@ vint64m8_t test_vle64_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vle64_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m1_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m2_mu( @@ -418,7 +418,7 @@ vuint64m1_t test_vle64_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vle64_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m2_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m4_mu( @@ -427,7 +427,7 @@ vuint64m2_t test_vle64_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vle64_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m4_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle64_v_u64m8_mu( @@ -436,6 +436,6 @@ vuint64m4_t test_vle64_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vle64_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, size_t vl) { - return vle64_v_u64m8_mu(mask, maskedoff, base, vl); + return __riscv_vle64_v_u64m8_mu(mask, maskedoff, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle64ff.c index 573107deabae934d20876c5913ef91b3b041f140..c080d01ea11261ea8cb3e397e8a4f7fabe9d89ac 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle64ff.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m1_t test_vle64ff_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m2_tu( @@ -28,7 +28,7 @@ vfloat64m1_t test_vle64ff_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m2_t test_vle64ff_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m4_tu( @@ -40,7 +40,7 @@ vfloat64m2_t test_vle64ff_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m4_t test_vle64ff_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m8_tu( @@ -52,7 +52,7 @@ vfloat64m4_t test_vle64ff_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m8_t test_vle64ff_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m1_tu( @@ -64,7 +64,7 @@ vfloat64m8_t test_vle64ff_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m1_t test_vle64ff_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m2_tu( @@ -76,7 +76,7 @@ vint64m1_t test_vle64ff_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m2_t test_vle64ff_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m4_tu( @@ -88,7 +88,7 @@ vint64m2_t test_vle64ff_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m4_t test_vle64ff_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m8_tu( @@ -100,7 +100,7 @@ vint64m4_t test_vle64ff_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m8_t test_vle64ff_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m1_tu( @@ -112,7 +112,7 @@ vint64m8_t test_vle64ff_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, si // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m1_t test_vle64ff_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m2_tu( @@ -124,7 +124,7 @@ vuint64m1_t test_vle64ff_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m2_t test_vle64ff_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m4_tu( @@ -136,7 +136,7 @@ vuint64m2_t test_vle64ff_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m4_t test_vle64ff_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m8_tu( @@ -148,7 +148,7 @@ vuint64m4_t test_vle64ff_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m8_t test_vle64ff_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m1_tum( @@ -160,7 +160,7 @@ vuint64m8_t test_vle64ff_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m1_t test_vle64ff_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m2_tum( @@ -172,7 +172,7 @@ vfloat64m1_t test_vle64ff_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m2_t test_vle64ff_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m4_tum( @@ -184,7 +184,7 @@ vfloat64m2_t test_vle64ff_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m4_t test_vle64ff_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m8_tum( @@ -196,7 +196,7 @@ vfloat64m4_t test_vle64ff_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m8_t test_vle64ff_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m1_tum( @@ -208,7 +208,7 @@ vfloat64m8_t test_vle64ff_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m1_t test_vle64ff_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m2_tum( @@ -220,7 +220,7 @@ vint64m1_t test_vle64ff_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m2_t test_vle64ff_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m4_tum( @@ -232,7 +232,7 @@ vint64m2_t test_vle64ff_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m4_t test_vle64ff_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m8_tum( @@ -244,7 +244,7 @@ vint64m4_t test_vle64ff_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m8_t test_vle64ff_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m1_tum( @@ -256,7 +256,7 @@ vint64m8_t test_vle64ff_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m1_t test_vle64ff_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m2_tum( @@ -268,7 +268,7 @@ vuint64m1_t test_vle64ff_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m2_t test_vle64ff_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m4_tum( @@ -280,7 +280,7 @@ vuint64m2_t test_vle64ff_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m4_t test_vle64ff_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m8_tum( @@ -292,7 +292,7 @@ vuint64m4_t test_vle64ff_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m8_t test_vle64ff_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m1_tumu( @@ -304,7 +304,7 @@ vuint64m8_t test_vle64ff_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m1_t test_vle64ff_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m2_tumu( @@ -316,7 +316,7 @@ vfloat64m1_t test_vle64ff_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m2_t test_vle64ff_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m4_tumu( @@ -328,7 +328,7 @@ vfloat64m2_t test_vle64ff_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m4_t test_vle64ff_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m8_tumu( @@ -340,7 +340,7 @@ vfloat64m4_t test_vle64ff_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m8_t test_vle64ff_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m1_tumu( @@ -352,7 +352,7 @@ vfloat64m8_t test_vle64ff_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m1_t test_vle64ff_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m2_tumu( @@ -364,7 +364,7 @@ vint64m1_t test_vle64ff_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m2_t test_vle64ff_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m4_tumu( @@ -376,7 +376,7 @@ vint64m2_t test_vle64ff_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m4_t test_vle64ff_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m8_tumu( @@ -388,7 +388,7 @@ vint64m4_t test_vle64ff_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m8_t test_vle64ff_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m1_tumu( @@ -400,7 +400,7 @@ vint64m8_t test_vle64ff_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m1_t test_vle64ff_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m2_tumu( @@ -412,7 +412,7 @@ vuint64m1_t test_vle64ff_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m2_t test_vle64ff_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m4_tumu( @@ -424,7 +424,7 @@ vuint64m2_t test_vle64ff_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m4_t test_vle64ff_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m8_tumu( @@ -436,7 +436,7 @@ vuint64m4_t test_vle64ff_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m8_t test_vle64ff_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m1_mu( @@ -448,7 +448,7 @@ vuint64m8_t test_vle64ff_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m1_t test_vle64ff_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m2_mu( @@ -460,7 +460,7 @@ vfloat64m1_t test_vle64ff_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m2_t test_vle64ff_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m4_mu( @@ -472,7 +472,7 @@ vfloat64m2_t test_vle64ff_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m4_t test_vle64ff_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_f64m8_mu( @@ -484,7 +484,7 @@ vfloat64m4_t test_vle64ff_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP1]] // vfloat64m8_t test_vle64ff_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, size_t *new_vl, size_t vl) { - return vle64ff_v_f64m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_f64m8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m1_mu( @@ -496,7 +496,7 @@ vfloat64m8_t test_vle64ff_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m1_t test_vle64ff_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m2_mu( @@ -508,7 +508,7 @@ vint64m1_t test_vle64ff_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m2_t test_vle64ff_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m4_mu( @@ -520,7 +520,7 @@ vint64m2_t test_vle64ff_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m4_t test_vle64ff_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_i64m8_mu( @@ -532,7 +532,7 @@ vint64m4_t test_vle64ff_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint64m8_t test_vle64ff_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_i64m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_i64m8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m1_mu( @@ -544,7 +544,7 @@ vint64m8_t test_vle64ff_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m1_t test_vle64ff_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m2_mu( @@ -556,7 +556,7 @@ vuint64m1_t test_vle64ff_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m2_t test_vle64ff_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m4_mu( @@ -568,7 +568,7 @@ vuint64m2_t test_vle64ff_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m4_t test_vle64ff_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle64ff_v_u64m8_mu( @@ -580,6 +580,6 @@ vuint64m4_t test_vle64ff_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint64m8_t test_vle64ff_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, size_t *new_vl, size_t vl) { - return vle64ff_v_u64m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle64ff_v_u64m8_mu(mask, maskedoff, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle8.c index 0fb6b2922848dc7d3cf7cb4ebe2272f1b1703fb0..217388ee89cdc8a9b092b00d818344c4986d8457 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vle8_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf8_tu(maskedoff, base, vl); + return __riscv_vle8_v_i8mf8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf4_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vle8_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vle8_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf4_tu(maskedoff, base, vl); + return __riscv_vle8_v_i8mf4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf2_tu( @@ -31,7 +31,7 @@ vint8mf4_t test_vle8_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vle8_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf2_tu(maskedoff, base, vl); + return __riscv_vle8_v_i8mf2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m1_tu( @@ -40,7 +40,7 @@ vint8mf2_t test_vle8_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vle8_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m1_tu(maskedoff, base, vl); + return __riscv_vle8_v_i8m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m2_tu( @@ -49,7 +49,7 @@ vint8m1_t test_vle8_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vle8_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m2_tu(maskedoff, base, vl); + return __riscv_vle8_v_i8m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m4_tu( @@ -58,7 +58,7 @@ vint8m2_t test_vle8_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vle8_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m4_tu(maskedoff, base, vl); + return __riscv_vle8_v_i8m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m8_tu( @@ -67,7 +67,7 @@ vint8m4_t test_vle8_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vle8_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m8_tu(maskedoff, base, vl); + return __riscv_vle8_v_i8m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf8_tu( @@ -76,7 +76,7 @@ vint8m8_t test_vle8_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vle8_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf8_tu(maskedoff, base, vl); + return __riscv_vle8_v_u8mf8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf4_tu( @@ -85,7 +85,7 @@ vuint8mf8_t test_vle8_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vle8_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf4_tu(maskedoff, base, vl); + return __riscv_vle8_v_u8mf4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf2_tu( @@ -94,7 +94,7 @@ vuint8mf4_t test_vle8_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vle8_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf2_tu(maskedoff, base, vl); + return __riscv_vle8_v_u8mf2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m1_tu( @@ -103,7 +103,7 @@ vuint8mf2_t test_vle8_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vle8_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m1_tu(maskedoff, base, vl); + return __riscv_vle8_v_u8m1_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m2_tu( @@ -112,7 +112,7 @@ vuint8m1_t test_vle8_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vle8_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m2_tu(maskedoff, base, vl); + return __riscv_vle8_v_u8m2_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m4_tu( @@ -121,7 +121,7 @@ vuint8m2_t test_vle8_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vle8_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m4_tu(maskedoff, base, vl); + return __riscv_vle8_v_u8m4_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m8_tu( @@ -130,7 +130,7 @@ vuint8m4_t test_vle8_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vle8_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m8_tu(maskedoff, base, vl); + return __riscv_vle8_v_u8m8_tu(maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf8_tum( @@ -139,7 +139,7 @@ vuint8m8_t test_vle8_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vle8_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf8_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf4_tum( @@ -148,7 +148,7 @@ vint8mf8_t test_vle8_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vle8_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf4_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf2_tum( @@ -157,7 +157,7 @@ vint8mf4_t test_vle8_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vle8_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf2_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m1_tum( @@ -166,7 +166,7 @@ vint8mf2_t test_vle8_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vle8_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m1_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m2_tum( @@ -175,7 +175,7 @@ vint8m1_t test_vle8_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vle8_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m2_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m4_tum( @@ -184,7 +184,7 @@ vint8m2_t test_vle8_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vle8_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m4_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m8_tum( @@ -193,7 +193,7 @@ vint8m4_t test_vle8_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vle8_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m8_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf8_tum( @@ -202,7 +202,7 @@ vint8m8_t test_vle8_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vle8_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf8_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf4_tum( @@ -211,7 +211,7 @@ vuint8mf8_t test_vle8_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vle8_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf4_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf2_tum( @@ -220,7 +220,7 @@ vuint8mf4_t test_vle8_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vle8_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf2_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m1_tum( @@ -229,7 +229,7 @@ vuint8mf2_t test_vle8_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vle8_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m1_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m1_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m2_tum( @@ -238,7 +238,7 @@ vuint8m1_t test_vle8_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vle8_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m2_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m2_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m4_tum( @@ -247,7 +247,7 @@ vuint8m2_t test_vle8_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vle8_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m4_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m4_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m8_tum( @@ -256,7 +256,7 @@ vuint8m4_t test_vle8_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vle8_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m8_tum(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m8_tum(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf8_tumu( @@ -265,7 +265,7 @@ vuint8m8_t test_vle8_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vle8_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf8_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf4_tumu( @@ -274,7 +274,7 @@ vint8mf8_t test_vle8_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vle8_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf4_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf2_tumu( @@ -283,7 +283,7 @@ vint8mf4_t test_vle8_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vle8_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf2_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m1_tumu( @@ -292,7 +292,7 @@ vint8mf2_t test_vle8_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vle8_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m2_tumu( @@ -301,7 +301,7 @@ vint8m1_t test_vle8_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vle8_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m4_tumu( @@ -310,7 +310,7 @@ vint8m2_t test_vle8_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vle8_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m8_tumu( @@ -319,7 +319,7 @@ vint8m4_t test_vle8_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vle8_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf8_tumu( @@ -328,7 +328,7 @@ vint8m8_t test_vle8_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vle8_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf8_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf4_tumu( @@ -337,7 +337,7 @@ vuint8mf8_t test_vle8_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vle8_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf4_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf2_tumu( @@ -346,7 +346,7 @@ vuint8mf4_t test_vle8_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vle8_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf2_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m1_tumu( @@ -355,7 +355,7 @@ vuint8mf2_t test_vle8_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vle8_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m1_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m1_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m2_tumu( @@ -364,7 +364,7 @@ vuint8m1_t test_vle8_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vle8_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m2_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m2_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m4_tumu( @@ -373,7 +373,7 @@ vuint8m2_t test_vle8_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vle8_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m4_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m4_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m8_tumu( @@ -382,7 +382,7 @@ vuint8m4_t test_vle8_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vle8_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m8_tumu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m8_tumu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf8_mu( @@ -391,7 +391,7 @@ vuint8m8_t test_vle8_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vle8_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf8_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf4_mu( @@ -400,7 +400,7 @@ vint8mf8_t test_vle8_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vle8_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf4_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8mf2_mu( @@ -409,7 +409,7 @@ vint8mf4_t test_vle8_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vle8_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8mf2_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8mf2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m1_mu( @@ -418,7 +418,7 @@ vint8mf2_t test_vle8_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vle8_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m1_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m2_mu( @@ -427,7 +427,7 @@ vint8m1_t test_vle8_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t * // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vle8_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m2_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m4_mu( @@ -436,7 +436,7 @@ vint8m2_t test_vle8_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t * // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vle8_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m4_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_i8m8_mu( @@ -445,7 +445,7 @@ vint8m4_t test_vle8_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t * // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vle8_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, size_t vl) { - return vle8_v_i8m8_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_i8m8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf8_mu( @@ -454,7 +454,7 @@ vint8m8_t test_vle8_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_t * // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vle8_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf8_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf8_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf4_mu( @@ -463,7 +463,7 @@ vuint8mf8_t test_vle8_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vle8_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf4_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8mf2_mu( @@ -472,7 +472,7 @@ vuint8mf4_t test_vle8_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vle8_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8mf2_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8mf2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m1_mu( @@ -481,7 +481,7 @@ vuint8mf2_t test_vle8_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vle8_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m1_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m1_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m2_mu( @@ -490,7 +490,7 @@ vuint8m1_t test_vle8_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vle8_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m2_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m2_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m4_mu( @@ -499,7 +499,7 @@ vuint8m2_t test_vle8_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vle8_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m4_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m4_mu(mask, maskedoff, base, vl); } // CHECK-RV64-LABEL: @test_vle8_v_u8m8_mu( @@ -508,6 +508,6 @@ vuint8m4_t test_vle8_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vle8_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, size_t vl) { - return vle8_v_u8m8_mu(mask, maskedoff, base, vl); + return __riscv_vle8_v_u8m8_mu(mask, maskedoff, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle8ff.c index e6e6488b073ca19a63a835f86ee43359f89c0f71..3b000648d8ba23cb801f91bfed5605bbc1674258 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vle8ff.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf8_t test_vle8ff_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf4_tu( @@ -28,7 +28,7 @@ vint8mf8_t test_vle8ff_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf4_t test_vle8ff_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf2_tu( @@ -40,7 +40,7 @@ vint8mf4_t test_vle8ff_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf2_t test_vle8ff_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m1_tu( @@ -52,7 +52,7 @@ vint8mf2_t test_vle8ff_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m1_t test_vle8ff_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m2_tu( @@ -64,7 +64,7 @@ vint8m1_t test_vle8ff_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m2_t test_vle8ff_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m4_tu( @@ -76,7 +76,7 @@ vint8m2_t test_vle8ff_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m4_t test_vle8ff_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m8_tu( @@ -88,7 +88,7 @@ vint8m4_t test_vle8ff_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m8_t test_vle8ff_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf8_tu( @@ -100,7 +100,7 @@ vint8m8_t test_vle8ff_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, size_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf8_t test_vle8ff_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf4_tu( @@ -112,7 +112,7 @@ vuint8mf8_t test_vle8ff_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, s // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf4_t test_vle8ff_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf2_tu( @@ -124,7 +124,7 @@ vuint8mf4_t test_vle8ff_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, s // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf2_t test_vle8ff_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m1_tu( @@ -136,7 +136,7 @@ vuint8mf2_t test_vle8ff_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, s // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m1_t test_vle8ff_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m1_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m1_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m2_tu( @@ -148,7 +148,7 @@ vuint8m1_t test_vle8ff_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m2_t test_vle8ff_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m2_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m2_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m4_tu( @@ -160,7 +160,7 @@ vuint8m2_t test_vle8ff_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m4_t test_vle8ff_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m4_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m4_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m8_tu( @@ -172,7 +172,7 @@ vuint8m4_t test_vle8ff_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m8_t test_vle8ff_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m8_tu(maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m8_tu(maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf8_tum( @@ -184,7 +184,7 @@ vuint8m8_t test_vle8ff_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, size // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf8_t test_vle8ff_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf4_tum( @@ -196,7 +196,7 @@ vint8mf8_t test_vle8ff_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf4_t test_vle8ff_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf2_tum( @@ -208,7 +208,7 @@ vint8mf4_t test_vle8ff_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf2_t test_vle8ff_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m1_tum( @@ -220,7 +220,7 @@ vint8mf2_t test_vle8ff_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m1_t test_vle8ff_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m2_tum( @@ -232,7 +232,7 @@ vint8m1_t test_vle8ff_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m2_t test_vle8ff_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m4_tum( @@ -244,7 +244,7 @@ vint8m2_t test_vle8ff_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m4_t test_vle8ff_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m8_tum( @@ -256,7 +256,7 @@ vint8m4_t test_vle8ff_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m8_t test_vle8ff_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf8_tum( @@ -268,7 +268,7 @@ vint8m8_t test_vle8ff_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf8_t test_vle8ff_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf4_tum( @@ -280,7 +280,7 @@ vuint8mf8_t test_vle8ff_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf4_t test_vle8ff_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf2_tum( @@ -292,7 +292,7 @@ vuint8mf4_t test_vle8ff_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf2_t test_vle8ff_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m1_tum( @@ -304,7 +304,7 @@ vuint8mf2_t test_vle8ff_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m1_t test_vle8ff_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m1_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m1_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m2_tum( @@ -316,7 +316,7 @@ vuint8m1_t test_vle8ff_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m2_t test_vle8ff_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m2_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m2_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m4_tum( @@ -328,7 +328,7 @@ vuint8m2_t test_vle8ff_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m4_t test_vle8ff_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m4_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m4_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m8_tum( @@ -340,7 +340,7 @@ vuint8m4_t test_vle8ff_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m8_t test_vle8ff_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m8_tum(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m8_tum(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf8_tumu( @@ -352,7 +352,7 @@ vuint8m8_t test_vle8ff_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf8_t test_vle8ff_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf4_tumu( @@ -364,7 +364,7 @@ vint8mf8_t test_vle8ff_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf4_t test_vle8ff_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf2_tumu( @@ -376,7 +376,7 @@ vint8mf4_t test_vle8ff_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf2_t test_vle8ff_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m1_tumu( @@ -388,7 +388,7 @@ vint8mf2_t test_vle8ff_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m1_t test_vle8ff_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m2_tumu( @@ -400,7 +400,7 @@ vint8m1_t test_vle8ff_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m2_t test_vle8ff_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m4_tumu( @@ -412,7 +412,7 @@ vint8m2_t test_vle8ff_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m4_t test_vle8ff_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m8_tumu( @@ -424,7 +424,7 @@ vint8m4_t test_vle8ff_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m8_t test_vle8ff_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf8_tumu( @@ -436,7 +436,7 @@ vint8m8_t test_vle8ff_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf8_t test_vle8ff_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf4_tumu( @@ -448,7 +448,7 @@ vuint8mf8_t test_vle8ff_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf4_t test_vle8ff_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf2_tumu( @@ -460,7 +460,7 @@ vuint8mf4_t test_vle8ff_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf2_t test_vle8ff_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m1_tumu( @@ -472,7 +472,7 @@ vuint8mf2_t test_vle8ff_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m1_t test_vle8ff_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m1_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m1_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m2_tumu( @@ -484,7 +484,7 @@ vuint8m1_t test_vle8ff_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m2_t test_vle8ff_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m2_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m2_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m4_tumu( @@ -496,7 +496,7 @@ vuint8m2_t test_vle8ff_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m4_t test_vle8ff_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m4_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m4_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m8_tumu( @@ -508,7 +508,7 @@ vuint8m4_t test_vle8ff_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m8_t test_vle8ff_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m8_tumu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m8_tumu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf8_mu( @@ -520,7 +520,7 @@ vuint8m8_t test_vle8ff_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf8_t test_vle8ff_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf4_mu( @@ -532,7 +532,7 @@ vint8mf8_t test_vle8ff_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf4_t test_vle8ff_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8mf2_mu( @@ -544,7 +544,7 @@ vint8mf4_t test_vle8ff_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vint8mf2_t test_vle8ff_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8mf2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8mf2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m1_mu( @@ -556,7 +556,7 @@ vint8mf2_t test_vle8ff_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m1_t test_vle8ff_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m2_mu( @@ -568,7 +568,7 @@ vint8m1_t test_vle8ff_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m2_t test_vle8ff_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m4_mu( @@ -580,7 +580,7 @@ vint8m2_t test_vle8ff_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m4_t test_vle8ff_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_i8m8_mu( @@ -592,7 +592,7 @@ vint8m4_t test_vle8ff_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP1]] // vint8m8_t test_vle8ff_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_i8m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_i8m8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf8_mu( @@ -604,7 +604,7 @@ vint8m8_t test_vle8ff_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf8_t test_vle8ff_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf8_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf4_mu( @@ -616,7 +616,7 @@ vuint8mf8_t test_vle8ff_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf4_t test_vle8ff_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8mf2_mu( @@ -628,7 +628,7 @@ vuint8mf4_t test_vle8ff_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8mf2_t test_vle8ff_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8mf2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8mf2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m1_mu( @@ -640,7 +640,7 @@ vuint8mf2_t test_vle8ff_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m1_t test_vle8ff_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m1_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m1_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m2_mu( @@ -652,7 +652,7 @@ vuint8m1_t test_vle8ff_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m2_t test_vle8ff_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m2_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m2_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m4_mu( @@ -664,7 +664,7 @@ vuint8m2_t test_vle8ff_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m4_t test_vle8ff_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m4_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m4_mu(mask, maskedoff, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vle8ff_v_u8m8_mu( @@ -676,6 +676,6 @@ vuint8m4_t test_vle8ff_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP1]] // vuint8m8_t test_vle8ff_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, size_t *new_vl, size_t vl) { - return vle8ff_v_u8m8_mu(mask, maskedoff, base, new_vl, vl); + return __riscv_vle8ff_v_u8m8_mu(mask, maskedoff, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei16.c index 0db8f629450f76f1e4a8552d1baf4cd93b586e76..d192b1aab635dcb794a6c2d6475bb4c334dc90d2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei16_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vloxei16_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei16_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vloxei16_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei16_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vloxei16_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei16_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vloxei16_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei16_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vloxei16_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei16_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_f16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vloxei16_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei16_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vloxei16_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei16_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vloxei16_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei16_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vloxei16_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei16_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vloxei16_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei16_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vloxei16_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei16_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vloxei16_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei16_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vloxei16_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei16_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vloxei16_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei16_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf8_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vloxei16_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei16_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf4_tu( @@ -157,7 +157,7 @@ vint8mf8_t test_vloxei16_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei16_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf2_tu( @@ -166,7 +166,7 @@ vint8mf4_t test_vloxei16_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei16_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m1_tu( @@ -175,7 +175,7 @@ vint8mf2_t test_vloxei16_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei16_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m2_tu( @@ -184,7 +184,7 @@ vint8m1_t test_vloxei16_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei16_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m4_tu( @@ -193,7 +193,7 @@ vint8m2_t test_vloxei16_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei16_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i8m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf4_tu( @@ -202,7 +202,7 @@ vint8m4_t test_vloxei16_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei16_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf2_tu( @@ -211,7 +211,7 @@ vint16mf4_t test_vloxei16_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei16_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m1_tu( @@ -220,7 +220,7 @@ vint16mf2_t test_vloxei16_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei16_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m2_tu( @@ -229,7 +229,7 @@ vint16m1_t test_vloxei16_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei16_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m4_tu( @@ -238,7 +238,7 @@ vint16m2_t test_vloxei16_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei16_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m8_tu( @@ -247,7 +247,7 @@ vint16m4_t test_vloxei16_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei16_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32mf2_tu( @@ -256,7 +256,7 @@ vint16m8_t test_vloxei16_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei16_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vloxei16_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei16_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m2_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vloxei16_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei16_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m4_tu( @@ -283,7 +283,7 @@ vint32m2_t test_vloxei16_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei16_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m8_tu( @@ -292,7 +292,7 @@ vint32m4_t test_vloxei16_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei16_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m1_tu( @@ -301,7 +301,7 @@ vint32m8_t test_vloxei16_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei16_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m2_tu( @@ -310,7 +310,7 @@ vint64m1_t test_vloxei16_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei16_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m4_tu( @@ -319,7 +319,7 @@ vint64m2_t test_vloxei16_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei16_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m8_tu( @@ -328,7 +328,7 @@ vint64m4_t test_vloxei16_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei16_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf8_tu( @@ -337,7 +337,7 @@ vint64m8_t test_vloxei16_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei16_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf4_tu( @@ -346,7 +346,7 @@ vuint8mf8_t test_vloxei16_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei16_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf2_tu( @@ -355,7 +355,7 @@ vuint8mf4_t test_vloxei16_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei16_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m1_tu( @@ -364,7 +364,7 @@ vuint8mf2_t test_vloxei16_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei16_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m2_tu( @@ -373,7 +373,7 @@ vuint8m1_t test_vloxei16_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei16_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m4_tu( @@ -382,7 +382,7 @@ vuint8m2_t test_vloxei16_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei16_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u8m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf4_tu( @@ -391,7 +391,7 @@ vuint8m4_t test_vloxei16_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei16_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf2_tu( @@ -400,7 +400,7 @@ vuint16mf4_t test_vloxei16_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei16_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m1_tu( @@ -409,7 +409,7 @@ vuint16mf2_t test_vloxei16_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei16_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m2_tu( @@ -418,7 +418,7 @@ vuint16m1_t test_vloxei16_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei16_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m4_tu( @@ -427,7 +427,7 @@ vuint16m2_t test_vloxei16_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei16_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m8_tu( @@ -436,7 +436,7 @@ vuint16m4_t test_vloxei16_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei16_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32mf2_tu( @@ -445,7 +445,7 @@ vuint16m8_t test_vloxei16_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei16_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m1_tu( @@ -454,7 +454,7 @@ vuint32mf2_t test_vloxei16_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei16_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m2_tu( @@ -463,7 +463,7 @@ vuint32m1_t test_vloxei16_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei16_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m4_tu( @@ -472,7 +472,7 @@ vuint32m2_t test_vloxei16_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei16_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m8_tu( @@ -481,7 +481,7 @@ vuint32m4_t test_vloxei16_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei16_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m1_tu( @@ -490,7 +490,7 @@ vuint32m8_t test_vloxei16_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei16_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m2_tu( @@ -499,7 +499,7 @@ vuint64m1_t test_vloxei16_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei16_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m4_tu( @@ -508,7 +508,7 @@ vuint64m2_t test_vloxei16_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei16_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m8_tu( @@ -517,7 +517,7 @@ vuint64m4_t test_vloxei16_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei16_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf4_tum( @@ -526,7 +526,7 @@ vuint64m8_t test_vloxei16_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei16_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf2_tum( @@ -535,7 +535,7 @@ vfloat16mf4_t test_vloxei16_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei16_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m1_tum( @@ -544,7 +544,7 @@ vfloat16mf2_t test_vloxei16_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei16_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m2_tum( @@ -553,7 +553,7 @@ vfloat16m1_t test_vloxei16_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei16_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m4_tum( @@ -562,7 +562,7 @@ vfloat16m2_t test_vloxei16_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei16_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m8_tum( @@ -571,7 +571,7 @@ vfloat16m4_t test_vloxei16_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei16_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_f16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32mf2_tum( @@ -580,7 +580,7 @@ vfloat16m8_t test_vloxei16_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei16_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m1_tum( @@ -589,7 +589,7 @@ vfloat32mf2_t test_vloxei16_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei16_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m2_tum( @@ -598,7 +598,7 @@ vfloat32m1_t test_vloxei16_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei16_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m4_tum( @@ -607,7 +607,7 @@ vfloat32m2_t test_vloxei16_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei16_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m8_tum( @@ -616,7 +616,7 @@ vfloat32m4_t test_vloxei16_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei16_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m1_tum( @@ -625,7 +625,7 @@ vfloat32m8_t test_vloxei16_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei16_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m2_tum( @@ -634,7 +634,7 @@ vfloat64m1_t test_vloxei16_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei16_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m4_tum( @@ -643,7 +643,7 @@ vfloat64m2_t test_vloxei16_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei16_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m8_tum( @@ -652,7 +652,7 @@ vfloat64m4_t test_vloxei16_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei16_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf8_tum( @@ -661,7 +661,7 @@ vfloat64m8_t test_vloxei16_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei16_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf4_tum( @@ -670,7 +670,7 @@ vint8mf8_t test_vloxei16_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei16_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf2_tum( @@ -679,7 +679,7 @@ vint8mf4_t test_vloxei16_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei16_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m1_tum( @@ -688,7 +688,7 @@ vint8mf2_t test_vloxei16_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei16_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m2_tum( @@ -697,7 +697,7 @@ vint8m1_t test_vloxei16_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei16_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m4_tum( @@ -706,7 +706,7 @@ vint8m2_t test_vloxei16_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei16_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i8m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf4_tum( @@ -715,7 +715,7 @@ vint8m4_t test_vloxei16_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei16_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf2_tum( @@ -724,7 +724,7 @@ vint16mf4_t test_vloxei16_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei16_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m1_tum( @@ -733,7 +733,7 @@ vint16mf2_t test_vloxei16_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei16_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m2_tum( @@ -742,7 +742,7 @@ vint16m1_t test_vloxei16_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei16_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m4_tum( @@ -751,7 +751,7 @@ vint16m2_t test_vloxei16_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei16_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m8_tum( @@ -760,7 +760,7 @@ vint16m4_t test_vloxei16_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei16_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32mf2_tum( @@ -769,7 +769,7 @@ vint16m8_t test_vloxei16_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei16_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m1_tum( @@ -778,7 +778,7 @@ vint32mf2_t test_vloxei16_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei16_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m2_tum( @@ -787,7 +787,7 @@ vint32m1_t test_vloxei16_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei16_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m4_tum( @@ -796,7 +796,7 @@ vint32m2_t test_vloxei16_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei16_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m8_tum( @@ -805,7 +805,7 @@ vint32m4_t test_vloxei16_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei16_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m1_tum( @@ -814,7 +814,7 @@ vint32m8_t test_vloxei16_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei16_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m2_tum( @@ -823,7 +823,7 @@ vint64m1_t test_vloxei16_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei16_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m4_tum( @@ -832,7 +832,7 @@ vint64m2_t test_vloxei16_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei16_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m8_tum( @@ -841,7 +841,7 @@ vint64m4_t test_vloxei16_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei16_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf8_tum( @@ -850,7 +850,7 @@ vint64m8_t test_vloxei16_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei16_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf4_tum( @@ -859,7 +859,7 @@ vuint8mf8_t test_vloxei16_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei16_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf2_tum( @@ -868,7 +868,7 @@ vuint8mf4_t test_vloxei16_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei16_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m1_tum( @@ -877,7 +877,7 @@ vuint8mf2_t test_vloxei16_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei16_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m2_tum( @@ -886,7 +886,7 @@ vuint8m1_t test_vloxei16_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei16_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m4_tum( @@ -895,7 +895,7 @@ vuint8m2_t test_vloxei16_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei16_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u8m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf4_tum( @@ -904,7 +904,7 @@ vuint8m4_t test_vloxei16_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei16_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf2_tum( @@ -913,7 +913,7 @@ vuint16mf4_t test_vloxei16_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei16_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m1_tum( @@ -922,7 +922,7 @@ vuint16mf2_t test_vloxei16_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei16_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m2_tum( @@ -931,7 +931,7 @@ vuint16m1_t test_vloxei16_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei16_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m4_tum( @@ -940,7 +940,7 @@ vuint16m2_t test_vloxei16_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei16_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m8_tum( @@ -949,7 +949,7 @@ vuint16m4_t test_vloxei16_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei16_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32mf2_tum( @@ -958,7 +958,7 @@ vuint16m8_t test_vloxei16_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei16_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m1_tum( @@ -967,7 +967,7 @@ vuint32mf2_t test_vloxei16_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei16_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m2_tum( @@ -976,7 +976,7 @@ vuint32m1_t test_vloxei16_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei16_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m4_tum( @@ -985,7 +985,7 @@ vuint32m2_t test_vloxei16_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei16_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m8_tum( @@ -994,7 +994,7 @@ vuint32m4_t test_vloxei16_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei16_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m1_tum( @@ -1003,7 +1003,7 @@ vuint32m8_t test_vloxei16_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei16_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m2_tum( @@ -1012,7 +1012,7 @@ vuint64m1_t test_vloxei16_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei16_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m4_tum( @@ -1021,7 +1021,7 @@ vuint64m2_t test_vloxei16_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei16_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m8_tum( @@ -1030,7 +1030,7 @@ vuint64m4_t test_vloxei16_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei16_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf4_tumu( @@ -1039,7 +1039,7 @@ vuint64m8_t test_vloxei16_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei16_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf2_tumu( @@ -1048,7 +1048,7 @@ vfloat16mf4_t test_vloxei16_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei16_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m1_tumu( @@ -1057,7 +1057,7 @@ vfloat16mf2_t test_vloxei16_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei16_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m2_tumu( @@ -1066,7 +1066,7 @@ vfloat16m1_t test_vloxei16_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei16_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m4_tumu( @@ -1075,7 +1075,7 @@ vfloat16m2_t test_vloxei16_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei16_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m8_tumu( @@ -1084,7 +1084,7 @@ vfloat16m4_t test_vloxei16_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei16_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_f16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32mf2_tumu( @@ -1093,7 +1093,7 @@ vfloat16m8_t test_vloxei16_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei16_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m1_tumu( @@ -1102,7 +1102,7 @@ vfloat32mf2_t test_vloxei16_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei16_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m2_tumu( @@ -1111,7 +1111,7 @@ vfloat32m1_t test_vloxei16_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei16_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m4_tumu( @@ -1120,7 +1120,7 @@ vfloat32m2_t test_vloxei16_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei16_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m8_tumu( @@ -1129,7 +1129,7 @@ vfloat32m4_t test_vloxei16_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei16_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m1_tumu( @@ -1138,7 +1138,7 @@ vfloat32m8_t test_vloxei16_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei16_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m2_tumu( @@ -1147,7 +1147,7 @@ vfloat64m1_t test_vloxei16_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei16_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m4_tumu( @@ -1156,7 +1156,7 @@ vfloat64m2_t test_vloxei16_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei16_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m8_tumu( @@ -1165,7 +1165,7 @@ vfloat64m4_t test_vloxei16_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei16_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf8_tumu( @@ -1174,7 +1174,7 @@ vfloat64m8_t test_vloxei16_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei16_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf4_tumu( @@ -1183,7 +1183,7 @@ vint8mf8_t test_vloxei16_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei16_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf2_tumu( @@ -1192,7 +1192,7 @@ vint8mf4_t test_vloxei16_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei16_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m1_tumu( @@ -1201,7 +1201,7 @@ vint8mf2_t test_vloxei16_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei16_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m2_tumu( @@ -1210,7 +1210,7 @@ vint8m1_t test_vloxei16_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei16_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m4_tumu( @@ -1219,7 +1219,7 @@ vint8m2_t test_vloxei16_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei16_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i8m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf4_tumu( @@ -1228,7 +1228,7 @@ vint8m4_t test_vloxei16_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei16_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf2_tumu( @@ -1237,7 +1237,7 @@ vint16mf4_t test_vloxei16_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei16_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m1_tumu( @@ -1246,7 +1246,7 @@ vint16mf2_t test_vloxei16_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei16_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m2_tumu( @@ -1255,7 +1255,7 @@ vint16m1_t test_vloxei16_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei16_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m4_tumu( @@ -1264,7 +1264,7 @@ vint16m2_t test_vloxei16_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei16_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m8_tumu( @@ -1273,7 +1273,7 @@ vint16m4_t test_vloxei16_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei16_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32mf2_tumu( @@ -1282,7 +1282,7 @@ vint16m8_t test_vloxei16_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei16_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m1_tumu( @@ -1291,7 +1291,7 @@ vint32mf2_t test_vloxei16_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei16_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m2_tumu( @@ -1300,7 +1300,7 @@ vint32m1_t test_vloxei16_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei16_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m4_tumu( @@ -1309,7 +1309,7 @@ vint32m2_t test_vloxei16_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei16_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m8_tumu( @@ -1318,7 +1318,7 @@ vint32m4_t test_vloxei16_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei16_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m1_tumu( @@ -1327,7 +1327,7 @@ vint32m8_t test_vloxei16_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei16_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m2_tumu( @@ -1336,7 +1336,7 @@ vint64m1_t test_vloxei16_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei16_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m4_tumu( @@ -1345,7 +1345,7 @@ vint64m2_t test_vloxei16_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei16_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m8_tumu( @@ -1354,7 +1354,7 @@ vint64m4_t test_vloxei16_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei16_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf8_tumu( @@ -1363,7 +1363,7 @@ vint64m8_t test_vloxei16_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei16_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf4_tumu( @@ -1372,7 +1372,7 @@ vuint8mf8_t test_vloxei16_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei16_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf2_tumu( @@ -1381,7 +1381,7 @@ vuint8mf4_t test_vloxei16_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei16_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m1_tumu( @@ -1390,7 +1390,7 @@ vuint8mf2_t test_vloxei16_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei16_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m2_tumu( @@ -1399,7 +1399,7 @@ vuint8m1_t test_vloxei16_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei16_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m4_tumu( @@ -1408,7 +1408,7 @@ vuint8m2_t test_vloxei16_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei16_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u8m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf4_tumu( @@ -1417,7 +1417,7 @@ vuint8m4_t test_vloxei16_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei16_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf2_tumu( @@ -1426,7 +1426,7 @@ vuint16mf4_t test_vloxei16_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei16_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m1_tumu( @@ -1435,7 +1435,7 @@ vuint16mf2_t test_vloxei16_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei16_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m2_tumu( @@ -1444,7 +1444,7 @@ vuint16m1_t test_vloxei16_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei16_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m4_tumu( @@ -1453,7 +1453,7 @@ vuint16m2_t test_vloxei16_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei16_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m8_tumu( @@ -1462,7 +1462,7 @@ vuint16m4_t test_vloxei16_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei16_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32mf2_tumu( @@ -1471,7 +1471,7 @@ vuint16m8_t test_vloxei16_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei16_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m1_tumu( @@ -1480,7 +1480,7 @@ vuint32mf2_t test_vloxei16_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei16_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m2_tumu( @@ -1489,7 +1489,7 @@ vuint32m1_t test_vloxei16_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei16_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m4_tumu( @@ -1498,7 +1498,7 @@ vuint32m2_t test_vloxei16_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei16_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m8_tumu( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vloxei16_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei16_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m1_tumu( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vloxei16_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei16_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m2_tumu( @@ -1525,7 +1525,7 @@ vuint64m1_t test_vloxei16_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei16_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m4_tumu( @@ -1534,7 +1534,7 @@ vuint64m2_t test_vloxei16_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei16_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m8_tumu( @@ -1543,7 +1543,7 @@ vuint64m4_t test_vloxei16_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei16_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf4_mu( @@ -1552,7 +1552,7 @@ vuint64m8_t test_vloxei16_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei16_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16mf2_mu( @@ -1561,7 +1561,7 @@ vfloat16mf4_t test_vloxei16_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei16_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m1_mu( @@ -1570,7 +1570,7 @@ vfloat16mf2_t test_vloxei16_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei16_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m2_mu( @@ -1579,7 +1579,7 @@ vfloat16m1_t test_vloxei16_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei16_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m4_mu( @@ -1588,7 +1588,7 @@ vfloat16m2_t test_vloxei16_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei16_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f16m8_mu( @@ -1597,7 +1597,7 @@ vfloat16m4_t test_vloxei16_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei16_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_f16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32mf2_mu( @@ -1606,7 +1606,7 @@ vfloat16m8_t test_vloxei16_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei16_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m1_mu( @@ -1615,7 +1615,7 @@ vfloat32mf2_t test_vloxei16_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei16_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m2_mu( @@ -1624,7 +1624,7 @@ vfloat32m1_t test_vloxei16_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei16_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m4_mu( @@ -1633,7 +1633,7 @@ vfloat32m2_t test_vloxei16_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei16_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f32m8_mu( @@ -1642,7 +1642,7 @@ vfloat32m4_t test_vloxei16_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei16_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_f32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m1_mu( @@ -1651,7 +1651,7 @@ vfloat32m8_t test_vloxei16_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei16_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_f64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m2_mu( @@ -1660,7 +1660,7 @@ vfloat64m1_t test_vloxei16_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei16_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_f64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m4_mu( @@ -1669,7 +1669,7 @@ vfloat64m2_t test_vloxei16_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei16_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_f64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_f64m8_mu( @@ -1678,7 +1678,7 @@ vfloat64m4_t test_vloxei16_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei16_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_f64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_f64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf8_mu( @@ -1687,7 +1687,7 @@ vfloat64m8_t test_vloxei16_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei16_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf4_mu( @@ -1696,7 +1696,7 @@ vint8mf8_t test_vloxei16_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei16_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8mf2_mu( @@ -1705,7 +1705,7 @@ vint8mf4_t test_vloxei16_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei16_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m1_mu( @@ -1714,7 +1714,7 @@ vint8mf2_t test_vloxei16_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei16_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m2_mu( @@ -1723,7 +1723,7 @@ vint8m1_t test_vloxei16_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei16_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i8m4_mu( @@ -1732,7 +1732,7 @@ vint8m2_t test_vloxei16_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei16_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i8m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i8m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf4_mu( @@ -1741,7 +1741,7 @@ vint8m4_t test_vloxei16_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei16_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16mf2_mu( @@ -1750,7 +1750,7 @@ vint16mf4_t test_vloxei16_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei16_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m1_mu( @@ -1759,7 +1759,7 @@ vint16mf2_t test_vloxei16_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei16_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m2_mu( @@ -1768,7 +1768,7 @@ vint16m1_t test_vloxei16_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei16_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m4_mu( @@ -1777,7 +1777,7 @@ vint16m2_t test_vloxei16_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei16_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i16m8_mu( @@ -1786,7 +1786,7 @@ vint16m4_t test_vloxei16_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei16_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_i16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32mf2_mu( @@ -1795,7 +1795,7 @@ vint16m8_t test_vloxei16_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei16_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m1_mu( @@ -1804,7 +1804,7 @@ vint32mf2_t test_vloxei16_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei16_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m2_mu( @@ -1813,7 +1813,7 @@ vint32m1_t test_vloxei16_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei16_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m4_mu( @@ -1822,7 +1822,7 @@ vint32m2_t test_vloxei16_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei16_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i32m8_mu( @@ -1831,7 +1831,7 @@ vint32m4_t test_vloxei16_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei16_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_i32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m1_mu( @@ -1840,7 +1840,7 @@ vint32m8_t test_vloxei16_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei16_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_i64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m2_mu( @@ -1849,7 +1849,7 @@ vint64m1_t test_vloxei16_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei16_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_i64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m4_mu( @@ -1858,7 +1858,7 @@ vint64m2_t test_vloxei16_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei16_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_i64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_i64m8_mu( @@ -1867,7 +1867,7 @@ vint64m4_t test_vloxei16_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei16_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_i64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_i64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf8_mu( @@ -1876,7 +1876,7 @@ vint64m8_t test_vloxei16_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei16_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf4_mu( @@ -1885,7 +1885,7 @@ vuint8mf8_t test_vloxei16_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei16_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8mf2_mu( @@ -1894,7 +1894,7 @@ vuint8mf4_t test_vloxei16_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei16_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m1_mu( @@ -1903,7 +1903,7 @@ vuint8mf2_t test_vloxei16_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei16_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m2_mu( @@ -1912,7 +1912,7 @@ vuint8m1_t test_vloxei16_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei16_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u8m4_mu( @@ -1921,7 +1921,7 @@ vuint8m2_t test_vloxei16_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei16_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u8m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u8m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf4_mu( @@ -1930,7 +1930,7 @@ vuint8m4_t test_vloxei16_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei16_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16mf2_mu( @@ -1939,7 +1939,7 @@ vuint16mf4_t test_vloxei16_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei16_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m1_mu( @@ -1948,7 +1948,7 @@ vuint16mf2_t test_vloxei16_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei16_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m2_mu( @@ -1957,7 +1957,7 @@ vuint16m1_t test_vloxei16_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei16_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m4_mu( @@ -1966,7 +1966,7 @@ vuint16m2_t test_vloxei16_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei16_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u16m8_mu( @@ -1975,7 +1975,7 @@ vuint16m4_t test_vloxei16_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei16_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vloxei16_v_u16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32mf2_mu( @@ -1984,7 +1984,7 @@ vuint16m8_t test_vloxei16_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei16_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m1_mu( @@ -1993,7 +1993,7 @@ vuint32mf2_t test_vloxei16_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei16_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m2_mu( @@ -2002,7 +2002,7 @@ vuint32m1_t test_vloxei16_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei16_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m4_mu( @@ -2011,7 +2011,7 @@ vuint32m2_t test_vloxei16_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei16_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u32m8_mu( @@ -2020,7 +2020,7 @@ vuint32m4_t test_vloxei16_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei16_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vloxei16_v_u32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m1_mu( @@ -2029,7 +2029,7 @@ vuint32m8_t test_vloxei16_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei16_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxei16_v_u64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m2_mu( @@ -2038,7 +2038,7 @@ vuint64m1_t test_vloxei16_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei16_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxei16_v_u64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m4_mu( @@ -2047,7 +2047,7 @@ vuint64m2_t test_vloxei16_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei16_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxei16_v_u64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei16_v_u64m8_mu( @@ -2056,6 +2056,6 @@ vuint64m4_t test_vloxei16_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei16_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vloxei16_v_u64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei16_v_u64m8_mu(mask, maskedoff, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei32.c index d1f7660bca216b32eb22c1f46c6ef41cf231a386..c95de32b0c1929d08efff74c41a6ccc6632c28a9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei32_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vloxei32_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei32_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vloxei32_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei32_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vloxei32_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei32_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vloxei32_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei32_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32mf2_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vloxei32_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei32_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m1_tu( @@ -67,7 +67,7 @@ vfloat32mf2_t test_vloxei32_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei32_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m2_tu( @@ -76,7 +76,7 @@ vfloat32m1_t test_vloxei32_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei32_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m4_tu( @@ -85,7 +85,7 @@ vfloat32m2_t test_vloxei32_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei32_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m8_tu( @@ -94,7 +94,7 @@ vfloat32m4_t test_vloxei32_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei32_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m1_tu( @@ -103,7 +103,7 @@ vfloat32m8_t test_vloxei32_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei32_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m2_tu( @@ -112,7 +112,7 @@ vfloat64m1_t test_vloxei32_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei32_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m4_tu( @@ -121,7 +121,7 @@ vfloat64m2_t test_vloxei32_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei32_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m8_tu( @@ -130,7 +130,7 @@ vfloat64m4_t test_vloxei32_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei32_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf8_tu( @@ -139,7 +139,7 @@ vfloat64m8_t test_vloxei32_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei32_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf4_tu( @@ -148,7 +148,7 @@ vint8mf8_t test_vloxei32_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei32_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf2_tu( @@ -157,7 +157,7 @@ vint8mf4_t test_vloxei32_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei32_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m1_tu( @@ -166,7 +166,7 @@ vint8mf2_t test_vloxei32_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei32_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m2_tu( @@ -175,7 +175,7 @@ vint8m1_t test_vloxei32_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei32_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf4_tu( @@ -184,7 +184,7 @@ vint8m2_t test_vloxei32_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei32_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf2_tu( @@ -193,7 +193,7 @@ vint16mf4_t test_vloxei32_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei32_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m1_tu( @@ -202,7 +202,7 @@ vint16mf2_t test_vloxei32_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei32_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m2_tu( @@ -211,7 +211,7 @@ vint16m1_t test_vloxei32_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei32_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m4_tu( @@ -220,7 +220,7 @@ vint16m2_t test_vloxei32_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei32_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32mf2_tu( @@ -229,7 +229,7 @@ vint16m4_t test_vloxei32_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei32_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m1_tu( @@ -238,7 +238,7 @@ vint32mf2_t test_vloxei32_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei32_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m2_tu( @@ -247,7 +247,7 @@ vint32m1_t test_vloxei32_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei32_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m4_tu( @@ -256,7 +256,7 @@ vint32m2_t test_vloxei32_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei32_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m8_tu( @@ -265,7 +265,7 @@ vint32m4_t test_vloxei32_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei32_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m1_tu( @@ -274,7 +274,7 @@ vint32m8_t test_vloxei32_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei32_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m2_tu( @@ -283,7 +283,7 @@ vint64m1_t test_vloxei32_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei32_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m4_tu( @@ -292,7 +292,7 @@ vint64m2_t test_vloxei32_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei32_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m8_tu( @@ -301,7 +301,7 @@ vint64m4_t test_vloxei32_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei32_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf8_tu( @@ -310,7 +310,7 @@ vint64m8_t test_vloxei32_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei32_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf4_tu( @@ -319,7 +319,7 @@ vuint8mf8_t test_vloxei32_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei32_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf2_tu( @@ -328,7 +328,7 @@ vuint8mf4_t test_vloxei32_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei32_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m1_tu( @@ -337,7 +337,7 @@ vuint8mf2_t test_vloxei32_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei32_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m2_tu( @@ -346,7 +346,7 @@ vuint8m1_t test_vloxei32_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei32_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf4_tu( @@ -355,7 +355,7 @@ vuint8m2_t test_vloxei32_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei32_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf2_tu( @@ -364,7 +364,7 @@ vuint16mf4_t test_vloxei32_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei32_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m1_tu( @@ -373,7 +373,7 @@ vuint16mf2_t test_vloxei32_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei32_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m2_tu( @@ -382,7 +382,7 @@ vuint16m1_t test_vloxei32_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei32_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m4_tu( @@ -391,7 +391,7 @@ vuint16m2_t test_vloxei32_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei32_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32mf2_tu( @@ -400,7 +400,7 @@ vuint16m4_t test_vloxei32_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei32_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m1_tu( @@ -409,7 +409,7 @@ vuint32mf2_t test_vloxei32_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei32_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m2_tu( @@ -418,7 +418,7 @@ vuint32m1_t test_vloxei32_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei32_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m4_tu( @@ -427,7 +427,7 @@ vuint32m2_t test_vloxei32_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei32_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m8_tu( @@ -436,7 +436,7 @@ vuint32m4_t test_vloxei32_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei32_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m1_tu( @@ -445,7 +445,7 @@ vuint32m8_t test_vloxei32_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei32_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m2_tu( @@ -454,7 +454,7 @@ vuint64m1_t test_vloxei32_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei32_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m4_tu( @@ -463,7 +463,7 @@ vuint64m2_t test_vloxei32_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei32_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m8_tu( @@ -472,7 +472,7 @@ vuint64m4_t test_vloxei32_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei32_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf4_tum( @@ -481,7 +481,7 @@ vuint64m8_t test_vloxei32_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei32_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf2_tum( @@ -490,7 +490,7 @@ vfloat16mf4_t test_vloxei32_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei32_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m1_tum( @@ -499,7 +499,7 @@ vfloat16mf2_t test_vloxei32_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei32_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m2_tum( @@ -508,7 +508,7 @@ vfloat16m1_t test_vloxei32_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei32_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m4_tum( @@ -517,7 +517,7 @@ vfloat16m2_t test_vloxei32_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei32_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32mf2_tum( @@ -526,7 +526,7 @@ vfloat16m4_t test_vloxei32_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei32_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m1_tum( @@ -535,7 +535,7 @@ vfloat32mf2_t test_vloxei32_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei32_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m2_tum( @@ -544,7 +544,7 @@ vfloat32m1_t test_vloxei32_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei32_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m4_tum( @@ -553,7 +553,7 @@ vfloat32m2_t test_vloxei32_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei32_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m8_tum( @@ -562,7 +562,7 @@ vfloat32m4_t test_vloxei32_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei32_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m1_tum( @@ -571,7 +571,7 @@ vfloat32m8_t test_vloxei32_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei32_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m2_tum( @@ -580,7 +580,7 @@ vfloat64m1_t test_vloxei32_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei32_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m4_tum( @@ -589,7 +589,7 @@ vfloat64m2_t test_vloxei32_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei32_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m8_tum( @@ -598,7 +598,7 @@ vfloat64m4_t test_vloxei32_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei32_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf8_tum( @@ -607,7 +607,7 @@ vfloat64m8_t test_vloxei32_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei32_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf4_tum( @@ -616,7 +616,7 @@ vint8mf8_t test_vloxei32_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei32_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf2_tum( @@ -625,7 +625,7 @@ vint8mf4_t test_vloxei32_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei32_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m1_tum( @@ -634,7 +634,7 @@ vint8mf2_t test_vloxei32_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei32_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m2_tum( @@ -643,7 +643,7 @@ vint8m1_t test_vloxei32_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei32_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf4_tum( @@ -652,7 +652,7 @@ vint8m2_t test_vloxei32_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei32_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf2_tum( @@ -661,7 +661,7 @@ vint16mf4_t test_vloxei32_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei32_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m1_tum( @@ -670,7 +670,7 @@ vint16mf2_t test_vloxei32_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei32_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m2_tum( @@ -679,7 +679,7 @@ vint16m1_t test_vloxei32_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei32_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m4_tum( @@ -688,7 +688,7 @@ vint16m2_t test_vloxei32_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei32_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32mf2_tum( @@ -697,7 +697,7 @@ vint16m4_t test_vloxei32_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei32_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m1_tum( @@ -706,7 +706,7 @@ vint32mf2_t test_vloxei32_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei32_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m2_tum( @@ -715,7 +715,7 @@ vint32m1_t test_vloxei32_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei32_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m4_tum( @@ -724,7 +724,7 @@ vint32m2_t test_vloxei32_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei32_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m8_tum( @@ -733,7 +733,7 @@ vint32m4_t test_vloxei32_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei32_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m1_tum( @@ -742,7 +742,7 @@ vint32m8_t test_vloxei32_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei32_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m2_tum( @@ -751,7 +751,7 @@ vint64m1_t test_vloxei32_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei32_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m4_tum( @@ -760,7 +760,7 @@ vint64m2_t test_vloxei32_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei32_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m8_tum( @@ -769,7 +769,7 @@ vint64m4_t test_vloxei32_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei32_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf8_tum( @@ -778,7 +778,7 @@ vint64m8_t test_vloxei32_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei32_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf4_tum( @@ -787,7 +787,7 @@ vuint8mf8_t test_vloxei32_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei32_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf2_tum( @@ -796,7 +796,7 @@ vuint8mf4_t test_vloxei32_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei32_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m1_tum( @@ -805,7 +805,7 @@ vuint8mf2_t test_vloxei32_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei32_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m2_tum( @@ -814,7 +814,7 @@ vuint8m1_t test_vloxei32_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei32_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf4_tum( @@ -823,7 +823,7 @@ vuint8m2_t test_vloxei32_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei32_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf2_tum( @@ -832,7 +832,7 @@ vuint16mf4_t test_vloxei32_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei32_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m1_tum( @@ -841,7 +841,7 @@ vuint16mf2_t test_vloxei32_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei32_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m2_tum( @@ -850,7 +850,7 @@ vuint16m1_t test_vloxei32_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei32_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m4_tum( @@ -859,7 +859,7 @@ vuint16m2_t test_vloxei32_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei32_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32mf2_tum( @@ -868,7 +868,7 @@ vuint16m4_t test_vloxei32_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei32_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m1_tum( @@ -877,7 +877,7 @@ vuint32mf2_t test_vloxei32_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei32_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m2_tum( @@ -886,7 +886,7 @@ vuint32m1_t test_vloxei32_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei32_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m4_tum( @@ -895,7 +895,7 @@ vuint32m2_t test_vloxei32_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei32_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m8_tum( @@ -904,7 +904,7 @@ vuint32m4_t test_vloxei32_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei32_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m1_tum( @@ -913,7 +913,7 @@ vuint32m8_t test_vloxei32_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei32_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m2_tum( @@ -922,7 +922,7 @@ vuint64m1_t test_vloxei32_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei32_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m4_tum( @@ -931,7 +931,7 @@ vuint64m2_t test_vloxei32_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei32_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m8_tum( @@ -940,7 +940,7 @@ vuint64m4_t test_vloxei32_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei32_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf4_tumu( @@ -949,7 +949,7 @@ vuint64m8_t test_vloxei32_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei32_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf2_tumu( @@ -958,7 +958,7 @@ vfloat16mf4_t test_vloxei32_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei32_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m1_tumu( @@ -967,7 +967,7 @@ vfloat16mf2_t test_vloxei32_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei32_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m2_tumu( @@ -976,7 +976,7 @@ vfloat16m1_t test_vloxei32_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei32_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m4_tumu( @@ -985,7 +985,7 @@ vfloat16m2_t test_vloxei32_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei32_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32mf2_tumu( @@ -994,7 +994,7 @@ vfloat16m4_t test_vloxei32_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei32_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m1_tumu( @@ -1003,7 +1003,7 @@ vfloat32mf2_t test_vloxei32_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei32_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m2_tumu( @@ -1012,7 +1012,7 @@ vfloat32m1_t test_vloxei32_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei32_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m4_tumu( @@ -1021,7 +1021,7 @@ vfloat32m2_t test_vloxei32_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei32_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m8_tumu( @@ -1030,7 +1030,7 @@ vfloat32m4_t test_vloxei32_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei32_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m1_tumu( @@ -1039,7 +1039,7 @@ vfloat32m8_t test_vloxei32_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei32_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m2_tumu( @@ -1048,7 +1048,7 @@ vfloat64m1_t test_vloxei32_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei32_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m4_tumu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vloxei32_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei32_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m8_tumu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vloxei32_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei32_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf8_tumu( @@ -1075,7 +1075,7 @@ vfloat64m8_t test_vloxei32_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei32_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf4_tumu( @@ -1084,7 +1084,7 @@ vint8mf8_t test_vloxei32_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei32_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf2_tumu( @@ -1093,7 +1093,7 @@ vint8mf4_t test_vloxei32_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei32_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m1_tumu( @@ -1102,7 +1102,7 @@ vint8mf2_t test_vloxei32_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei32_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m2_tumu( @@ -1111,7 +1111,7 @@ vint8m1_t test_vloxei32_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei32_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf4_tumu( @@ -1120,7 +1120,7 @@ vint8m2_t test_vloxei32_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei32_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf2_tumu( @@ -1129,7 +1129,7 @@ vint16mf4_t test_vloxei32_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei32_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m1_tumu( @@ -1138,7 +1138,7 @@ vint16mf2_t test_vloxei32_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei32_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m2_tumu( @@ -1147,7 +1147,7 @@ vint16m1_t test_vloxei32_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei32_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m4_tumu( @@ -1156,7 +1156,7 @@ vint16m2_t test_vloxei32_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei32_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32mf2_tumu( @@ -1165,7 +1165,7 @@ vint16m4_t test_vloxei32_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei32_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m1_tumu( @@ -1174,7 +1174,7 @@ vint32mf2_t test_vloxei32_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei32_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m2_tumu( @@ -1183,7 +1183,7 @@ vint32m1_t test_vloxei32_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei32_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m4_tumu( @@ -1192,7 +1192,7 @@ vint32m2_t test_vloxei32_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei32_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m8_tumu( @@ -1201,7 +1201,7 @@ vint32m4_t test_vloxei32_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei32_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m1_tumu( @@ -1210,7 +1210,7 @@ vint32m8_t test_vloxei32_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei32_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m2_tumu( @@ -1219,7 +1219,7 @@ vint64m1_t test_vloxei32_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei32_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m4_tumu( @@ -1228,7 +1228,7 @@ vint64m2_t test_vloxei32_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei32_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m8_tumu( @@ -1237,7 +1237,7 @@ vint64m4_t test_vloxei32_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei32_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf8_tumu( @@ -1246,7 +1246,7 @@ vint64m8_t test_vloxei32_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei32_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf4_tumu( @@ -1255,7 +1255,7 @@ vuint8mf8_t test_vloxei32_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei32_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf2_tumu( @@ -1264,7 +1264,7 @@ vuint8mf4_t test_vloxei32_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei32_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m1_tumu( @@ -1273,7 +1273,7 @@ vuint8mf2_t test_vloxei32_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei32_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m2_tumu( @@ -1282,7 +1282,7 @@ vuint8m1_t test_vloxei32_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei32_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf4_tumu( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vloxei32_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei32_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf2_tumu( @@ -1300,7 +1300,7 @@ vuint16mf4_t test_vloxei32_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei32_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m1_tumu( @@ -1309,7 +1309,7 @@ vuint16mf2_t test_vloxei32_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei32_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m2_tumu( @@ -1318,7 +1318,7 @@ vuint16m1_t test_vloxei32_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei32_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m4_tumu( @@ -1327,7 +1327,7 @@ vuint16m2_t test_vloxei32_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei32_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32mf2_tumu( @@ -1336,7 +1336,7 @@ vuint16m4_t test_vloxei32_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei32_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m1_tumu( @@ -1345,7 +1345,7 @@ vuint32mf2_t test_vloxei32_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei32_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m2_tumu( @@ -1354,7 +1354,7 @@ vuint32m1_t test_vloxei32_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei32_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m4_tumu( @@ -1363,7 +1363,7 @@ vuint32m2_t test_vloxei32_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei32_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m8_tumu( @@ -1372,7 +1372,7 @@ vuint32m4_t test_vloxei32_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei32_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m1_tumu( @@ -1381,7 +1381,7 @@ vuint32m8_t test_vloxei32_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei32_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m2_tumu( @@ -1390,7 +1390,7 @@ vuint64m1_t test_vloxei32_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei32_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m4_tumu( @@ -1399,7 +1399,7 @@ vuint64m2_t test_vloxei32_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei32_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m8_tumu( @@ -1408,7 +1408,7 @@ vuint64m4_t test_vloxei32_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei32_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf4_mu( @@ -1417,7 +1417,7 @@ vuint64m8_t test_vloxei32_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei32_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16mf2_mu( @@ -1426,7 +1426,7 @@ vfloat16mf4_t test_vloxei32_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei32_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m1_mu( @@ -1435,7 +1435,7 @@ vfloat16mf2_t test_vloxei32_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei32_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m2_mu( @@ -1444,7 +1444,7 @@ vfloat16m1_t test_vloxei32_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei32_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f16m4_mu( @@ -1453,7 +1453,7 @@ vfloat16m2_t test_vloxei32_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei32_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32mf2_mu( @@ -1462,7 +1462,7 @@ vfloat16m4_t test_vloxei32_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei32_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m1_mu( @@ -1471,7 +1471,7 @@ vfloat32mf2_t test_vloxei32_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei32_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m2_mu( @@ -1480,7 +1480,7 @@ vfloat32m1_t test_vloxei32_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei32_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m4_mu( @@ -1489,7 +1489,7 @@ vfloat32m2_t test_vloxei32_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei32_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f32m8_mu( @@ -1498,7 +1498,7 @@ vfloat32m4_t test_vloxei32_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei32_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_f32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m1_mu( @@ -1507,7 +1507,7 @@ vfloat32m8_t test_vloxei32_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei32_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_f64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m2_mu( @@ -1516,7 +1516,7 @@ vfloat64m1_t test_vloxei32_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei32_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_f64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m4_mu( @@ -1525,7 +1525,7 @@ vfloat64m2_t test_vloxei32_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei32_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_f64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_f64m8_mu( @@ -1534,7 +1534,7 @@ vfloat64m4_t test_vloxei32_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei32_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_f64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_f64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf8_mu( @@ -1543,7 +1543,7 @@ vfloat64m8_t test_vloxei32_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei32_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf4_mu( @@ -1552,7 +1552,7 @@ vint8mf8_t test_vloxei32_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei32_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8mf2_mu( @@ -1561,7 +1561,7 @@ vint8mf4_t test_vloxei32_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei32_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m1_mu( @@ -1570,7 +1570,7 @@ vint8mf2_t test_vloxei32_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei32_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i8m2_mu( @@ -1579,7 +1579,7 @@ vint8m1_t test_vloxei32_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei32_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf4_mu( @@ -1588,7 +1588,7 @@ vint8m2_t test_vloxei32_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei32_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16mf2_mu( @@ -1597,7 +1597,7 @@ vint16mf4_t test_vloxei32_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei32_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m1_mu( @@ -1606,7 +1606,7 @@ vint16mf2_t test_vloxei32_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei32_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m2_mu( @@ -1615,7 +1615,7 @@ vint16m1_t test_vloxei32_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei32_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i16m4_mu( @@ -1624,7 +1624,7 @@ vint16m2_t test_vloxei32_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei32_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32mf2_mu( @@ -1633,7 +1633,7 @@ vint16m4_t test_vloxei32_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei32_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m1_mu( @@ -1642,7 +1642,7 @@ vint32mf2_t test_vloxei32_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei32_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m2_mu( @@ -1651,7 +1651,7 @@ vint32m1_t test_vloxei32_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei32_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m4_mu( @@ -1660,7 +1660,7 @@ vint32m2_t test_vloxei32_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei32_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i32m8_mu( @@ -1669,7 +1669,7 @@ vint32m4_t test_vloxei32_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei32_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_i32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m1_mu( @@ -1678,7 +1678,7 @@ vint32m8_t test_vloxei32_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei32_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_i64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m2_mu( @@ -1687,7 +1687,7 @@ vint64m1_t test_vloxei32_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei32_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_i64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m4_mu( @@ -1696,7 +1696,7 @@ vint64m2_t test_vloxei32_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei32_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_i64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_i64m8_mu( @@ -1705,7 +1705,7 @@ vint64m4_t test_vloxei32_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei32_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_i64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_i64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf8_mu( @@ -1714,7 +1714,7 @@ vint64m8_t test_vloxei32_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei32_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf4_mu( @@ -1723,7 +1723,7 @@ vuint8mf8_t test_vloxei32_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei32_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8mf2_mu( @@ -1732,7 +1732,7 @@ vuint8mf4_t test_vloxei32_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei32_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m1_mu( @@ -1741,7 +1741,7 @@ vuint8mf2_t test_vloxei32_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei32_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u8m2_mu( @@ -1750,7 +1750,7 @@ vuint8m1_t test_vloxei32_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei32_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf4_mu( @@ -1759,7 +1759,7 @@ vuint8m2_t test_vloxei32_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei32_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16mf2_mu( @@ -1768,7 +1768,7 @@ vuint16mf4_t test_vloxei32_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei32_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m1_mu( @@ -1777,7 +1777,7 @@ vuint16mf2_t test_vloxei32_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei32_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m2_mu( @@ -1786,7 +1786,7 @@ vuint16m1_t test_vloxei32_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei32_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u16m4_mu( @@ -1795,7 +1795,7 @@ vuint16m2_t test_vloxei32_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei32_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32mf2_mu( @@ -1804,7 +1804,7 @@ vuint16m4_t test_vloxei32_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei32_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m1_mu( @@ -1813,7 +1813,7 @@ vuint32mf2_t test_vloxei32_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei32_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m2_mu( @@ -1822,7 +1822,7 @@ vuint32m1_t test_vloxei32_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei32_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m4_mu( @@ -1831,7 +1831,7 @@ vuint32m2_t test_vloxei32_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei32_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u32m8_mu( @@ -1840,7 +1840,7 @@ vuint32m4_t test_vloxei32_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei32_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vloxei32_v_u32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m1_mu( @@ -1849,7 +1849,7 @@ vuint32m8_t test_vloxei32_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei32_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxei32_v_u64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m2_mu( @@ -1858,7 +1858,7 @@ vuint64m1_t test_vloxei32_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei32_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxei32_v_u64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m4_mu( @@ -1867,7 +1867,7 @@ vuint64m2_t test_vloxei32_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei32_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxei32_v_u64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei32_v_u64m8_mu( @@ -1876,6 +1876,6 @@ vuint64m4_t test_vloxei32_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei32_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vloxei32_v_u64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei32_v_u64m8_mu(mask, maskedoff, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei64.c index b145468ed28f4e5dea0467bb452232c8a9aa4491..8a5426398244985ac54074673f2d8eea45bc3d11 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei64_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vloxei64_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei64_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vloxei64_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei64_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vloxei64_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei64_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32mf2_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vloxei64_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei64_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m1_tu( @@ -58,7 +58,7 @@ vfloat32mf2_t test_vloxei64_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei64_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m2_tu( @@ -67,7 +67,7 @@ vfloat32m1_t test_vloxei64_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei64_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m4_tu( @@ -76,7 +76,7 @@ vfloat32m2_t test_vloxei64_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei64_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m1_tu( @@ -85,7 +85,7 @@ vfloat32m4_t test_vloxei64_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei64_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m2_tu( @@ -94,7 +94,7 @@ vfloat64m1_t test_vloxei64_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei64_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m4_tu( @@ -103,7 +103,7 @@ vfloat64m2_t test_vloxei64_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei64_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m8_tu( @@ -112,7 +112,7 @@ vfloat64m4_t test_vloxei64_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei64_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf8_tu( @@ -121,7 +121,7 @@ vfloat64m8_t test_vloxei64_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei64_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf4_tu( @@ -130,7 +130,7 @@ vint8mf8_t test_vloxei64_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei64_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf2_tu( @@ -139,7 +139,7 @@ vint8mf4_t test_vloxei64_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei64_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8m1_tu( @@ -148,7 +148,7 @@ vint8mf2_t test_vloxei64_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei64_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf4_tu( @@ -157,7 +157,7 @@ vint8m1_t test_vloxei64_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei64_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf2_tu( @@ -166,7 +166,7 @@ vint16mf4_t test_vloxei64_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei64_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m1_tu( @@ -175,7 +175,7 @@ vint16mf2_t test_vloxei64_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei64_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m2_tu( @@ -184,7 +184,7 @@ vint16m1_t test_vloxei64_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei64_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32mf2_tu( @@ -193,7 +193,7 @@ vint16m2_t test_vloxei64_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei64_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m1_tu( @@ -202,7 +202,7 @@ vint32mf2_t test_vloxei64_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei64_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m2_tu( @@ -211,7 +211,7 @@ vint32m1_t test_vloxei64_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei64_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m4_tu( @@ -220,7 +220,7 @@ vint32m2_t test_vloxei64_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei64_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m1_tu( @@ -229,7 +229,7 @@ vint32m4_t test_vloxei64_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei64_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m2_tu( @@ -238,7 +238,7 @@ vint64m1_t test_vloxei64_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei64_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m4_tu( @@ -247,7 +247,7 @@ vint64m2_t test_vloxei64_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei64_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m8_tu( @@ -256,7 +256,7 @@ vint64m4_t test_vloxei64_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei64_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf8_tu( @@ -265,7 +265,7 @@ vint64m8_t test_vloxei64_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei64_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf4_tu( @@ -274,7 +274,7 @@ vuint8mf8_t test_vloxei64_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei64_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf2_tu( @@ -283,7 +283,7 @@ vuint8mf4_t test_vloxei64_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei64_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8m1_tu( @@ -292,7 +292,7 @@ vuint8mf2_t test_vloxei64_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei64_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf4_tu( @@ -301,7 +301,7 @@ vuint8m1_t test_vloxei64_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei64_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf2_tu( @@ -310,7 +310,7 @@ vuint16mf4_t test_vloxei64_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei64_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m1_tu( @@ -319,7 +319,7 @@ vuint16mf2_t test_vloxei64_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei64_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m2_tu( @@ -328,7 +328,7 @@ vuint16m1_t test_vloxei64_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei64_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32mf2_tu( @@ -337,7 +337,7 @@ vuint16m2_t test_vloxei64_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei64_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m1_tu( @@ -346,7 +346,7 @@ vuint32mf2_t test_vloxei64_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei64_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m2_tu( @@ -355,7 +355,7 @@ vuint32m1_t test_vloxei64_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei64_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m4_tu( @@ -364,7 +364,7 @@ vuint32m2_t test_vloxei64_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei64_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m1_tu( @@ -373,7 +373,7 @@ vuint32m4_t test_vloxei64_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei64_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m2_tu( @@ -382,7 +382,7 @@ vuint64m1_t test_vloxei64_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei64_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m4_tu( @@ -391,7 +391,7 @@ vuint64m2_t test_vloxei64_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei64_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m8_tu( @@ -400,7 +400,7 @@ vuint64m4_t test_vloxei64_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei64_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf4_tum( @@ -409,7 +409,7 @@ vuint64m8_t test_vloxei64_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei64_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf2_tum( @@ -418,7 +418,7 @@ vfloat16mf4_t test_vloxei64_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei64_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m1_tum( @@ -427,7 +427,7 @@ vfloat16mf2_t test_vloxei64_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei64_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m2_tum( @@ -436,7 +436,7 @@ vfloat16m1_t test_vloxei64_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei64_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32mf2_tum( @@ -445,7 +445,7 @@ vfloat16m2_t test_vloxei64_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei64_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m1_tum( @@ -454,7 +454,7 @@ vfloat32mf2_t test_vloxei64_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei64_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m2_tum( @@ -463,7 +463,7 @@ vfloat32m1_t test_vloxei64_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei64_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m4_tum( @@ -472,7 +472,7 @@ vfloat32m2_t test_vloxei64_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei64_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m4_t test_vloxei64_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei64_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m2_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vloxei64_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei64_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m4_tum( @@ -499,7 +499,7 @@ vfloat64m2_t test_vloxei64_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei64_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m8_tum( @@ -508,7 +508,7 @@ vfloat64m4_t test_vloxei64_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei64_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf8_tum( @@ -517,7 +517,7 @@ vfloat64m8_t test_vloxei64_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei64_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf4_tum( @@ -526,7 +526,7 @@ vint8mf8_t test_vloxei64_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei64_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf2_tum( @@ -535,7 +535,7 @@ vint8mf4_t test_vloxei64_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei64_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8m1_tum( @@ -544,7 +544,7 @@ vint8mf2_t test_vloxei64_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei64_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf4_tum( @@ -553,7 +553,7 @@ vint8m1_t test_vloxei64_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei64_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf2_tum( @@ -562,7 +562,7 @@ vint16mf4_t test_vloxei64_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei64_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m1_tum( @@ -571,7 +571,7 @@ vint16mf2_t test_vloxei64_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei64_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m2_tum( @@ -580,7 +580,7 @@ vint16m1_t test_vloxei64_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei64_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32mf2_tum( @@ -589,7 +589,7 @@ vint16m2_t test_vloxei64_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei64_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m1_tum( @@ -598,7 +598,7 @@ vint32mf2_t test_vloxei64_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei64_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m2_tum( @@ -607,7 +607,7 @@ vint32m1_t test_vloxei64_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei64_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m4_tum( @@ -616,7 +616,7 @@ vint32m2_t test_vloxei64_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei64_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m1_tum( @@ -625,7 +625,7 @@ vint32m4_t test_vloxei64_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei64_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m2_tum( @@ -634,7 +634,7 @@ vint64m1_t test_vloxei64_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei64_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m4_tum( @@ -643,7 +643,7 @@ vint64m2_t test_vloxei64_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei64_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m8_tum( @@ -652,7 +652,7 @@ vint64m4_t test_vloxei64_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei64_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf8_tum( @@ -661,7 +661,7 @@ vint64m8_t test_vloxei64_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei64_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf4_tum( @@ -670,7 +670,7 @@ vuint8mf8_t test_vloxei64_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei64_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf2_tum( @@ -679,7 +679,7 @@ vuint8mf4_t test_vloxei64_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei64_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8m1_tum( @@ -688,7 +688,7 @@ vuint8mf2_t test_vloxei64_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei64_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf4_tum( @@ -697,7 +697,7 @@ vuint8m1_t test_vloxei64_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei64_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf2_tum( @@ -706,7 +706,7 @@ vuint16mf4_t test_vloxei64_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei64_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m1_tum( @@ -715,7 +715,7 @@ vuint16mf2_t test_vloxei64_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei64_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m2_tum( @@ -724,7 +724,7 @@ vuint16m1_t test_vloxei64_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei64_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32mf2_tum( @@ -733,7 +733,7 @@ vuint16m2_t test_vloxei64_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei64_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m1_tum( @@ -742,7 +742,7 @@ vuint32mf2_t test_vloxei64_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei64_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m2_tum( @@ -751,7 +751,7 @@ vuint32m1_t test_vloxei64_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei64_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m4_tum( @@ -760,7 +760,7 @@ vuint32m2_t test_vloxei64_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei64_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m1_tum( @@ -769,7 +769,7 @@ vuint32m4_t test_vloxei64_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei64_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m2_tum( @@ -778,7 +778,7 @@ vuint64m1_t test_vloxei64_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei64_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m4_tum( @@ -787,7 +787,7 @@ vuint64m2_t test_vloxei64_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei64_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m8_tum( @@ -796,7 +796,7 @@ vuint64m4_t test_vloxei64_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei64_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf4_tumu( @@ -805,7 +805,7 @@ vuint64m8_t test_vloxei64_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei64_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf2_tumu( @@ -814,7 +814,7 @@ vfloat16mf4_t test_vloxei64_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei64_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m1_tumu( @@ -823,7 +823,7 @@ vfloat16mf2_t test_vloxei64_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei64_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m2_tumu( @@ -832,7 +832,7 @@ vfloat16m1_t test_vloxei64_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei64_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32mf2_tumu( @@ -841,7 +841,7 @@ vfloat16m2_t test_vloxei64_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei64_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m1_tumu( @@ -850,7 +850,7 @@ vfloat32mf2_t test_vloxei64_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei64_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m2_tumu( @@ -859,7 +859,7 @@ vfloat32m1_t test_vloxei64_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei64_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m4_tumu( @@ -868,7 +868,7 @@ vfloat32m2_t test_vloxei64_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei64_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m1_tumu( @@ -877,7 +877,7 @@ vfloat32m4_t test_vloxei64_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei64_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m2_tumu( @@ -886,7 +886,7 @@ vfloat64m1_t test_vloxei64_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei64_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m4_tumu( @@ -895,7 +895,7 @@ vfloat64m2_t test_vloxei64_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei64_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m8_tumu( @@ -904,7 +904,7 @@ vfloat64m4_t test_vloxei64_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei64_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf8_tumu( @@ -913,7 +913,7 @@ vfloat64m8_t test_vloxei64_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei64_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf4_tumu( @@ -922,7 +922,7 @@ vint8mf8_t test_vloxei64_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei64_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf2_tumu( @@ -931,7 +931,7 @@ vint8mf4_t test_vloxei64_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei64_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8m1_tumu( @@ -940,7 +940,7 @@ vint8mf2_t test_vloxei64_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei64_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf4_tumu( @@ -949,7 +949,7 @@ vint8m1_t test_vloxei64_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei64_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf2_tumu( @@ -958,7 +958,7 @@ vint16mf4_t test_vloxei64_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei64_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m1_tumu( @@ -967,7 +967,7 @@ vint16mf2_t test_vloxei64_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei64_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m2_tumu( @@ -976,7 +976,7 @@ vint16m1_t test_vloxei64_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei64_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32mf2_tumu( @@ -985,7 +985,7 @@ vint16m2_t test_vloxei64_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei64_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m1_tumu( @@ -994,7 +994,7 @@ vint32mf2_t test_vloxei64_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei64_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m2_tumu( @@ -1003,7 +1003,7 @@ vint32m1_t test_vloxei64_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei64_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m4_tumu( @@ -1012,7 +1012,7 @@ vint32m2_t test_vloxei64_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei64_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m1_tumu( @@ -1021,7 +1021,7 @@ vint32m4_t test_vloxei64_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei64_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m2_tumu( @@ -1030,7 +1030,7 @@ vint64m1_t test_vloxei64_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei64_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m4_tumu( @@ -1039,7 +1039,7 @@ vint64m2_t test_vloxei64_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei64_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m8_tumu( @@ -1048,7 +1048,7 @@ vint64m4_t test_vloxei64_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei64_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf8_tumu( @@ -1057,7 +1057,7 @@ vint64m8_t test_vloxei64_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei64_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf4_tumu( @@ -1066,7 +1066,7 @@ vuint8mf8_t test_vloxei64_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei64_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf2_tumu( @@ -1075,7 +1075,7 @@ vuint8mf4_t test_vloxei64_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei64_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8m1_tumu( @@ -1084,7 +1084,7 @@ vuint8mf2_t test_vloxei64_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei64_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf4_tumu( @@ -1093,7 +1093,7 @@ vuint8m1_t test_vloxei64_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei64_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf2_tumu( @@ -1102,7 +1102,7 @@ vuint16mf4_t test_vloxei64_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei64_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m1_tumu( @@ -1111,7 +1111,7 @@ vuint16mf2_t test_vloxei64_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei64_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m2_tumu( @@ -1120,7 +1120,7 @@ vuint16m1_t test_vloxei64_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei64_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32mf2_tumu( @@ -1129,7 +1129,7 @@ vuint16m2_t test_vloxei64_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei64_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m1_tumu( @@ -1138,7 +1138,7 @@ vuint32mf2_t test_vloxei64_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei64_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m2_tumu( @@ -1147,7 +1147,7 @@ vuint32m1_t test_vloxei64_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei64_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m4_tumu( @@ -1156,7 +1156,7 @@ vuint32m2_t test_vloxei64_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei64_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m1_tumu( @@ -1165,7 +1165,7 @@ vuint32m4_t test_vloxei64_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei64_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m2_tumu( @@ -1174,7 +1174,7 @@ vuint64m1_t test_vloxei64_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei64_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m4_tumu( @@ -1183,7 +1183,7 @@ vuint64m2_t test_vloxei64_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei64_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m8_tumu( @@ -1192,7 +1192,7 @@ vuint64m4_t test_vloxei64_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei64_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf4_mu( @@ -1201,7 +1201,7 @@ vuint64m8_t test_vloxei64_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei64_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16mf2_mu( @@ -1210,7 +1210,7 @@ vfloat16mf4_t test_vloxei64_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei64_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m1_mu( @@ -1219,7 +1219,7 @@ vfloat16mf2_t test_vloxei64_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei64_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f16m2_mu( @@ -1228,7 +1228,7 @@ vfloat16m1_t test_vloxei64_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei64_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32mf2_mu( @@ -1237,7 +1237,7 @@ vfloat16m2_t test_vloxei64_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei64_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m1_mu( @@ -1246,7 +1246,7 @@ vfloat32mf2_t test_vloxei64_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei64_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m2_mu( @@ -1255,7 +1255,7 @@ vfloat32m1_t test_vloxei64_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei64_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f32m4_mu( @@ -1264,7 +1264,7 @@ vfloat32m2_t test_vloxei64_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei64_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m1_mu( @@ -1273,7 +1273,7 @@ vfloat32m4_t test_vloxei64_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei64_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_f64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m2_mu( @@ -1282,7 +1282,7 @@ vfloat64m1_t test_vloxei64_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei64_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_f64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m4_mu( @@ -1291,7 +1291,7 @@ vfloat64m2_t test_vloxei64_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei64_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_f64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_f64m8_mu( @@ -1300,7 +1300,7 @@ vfloat64m4_t test_vloxei64_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei64_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_f64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_f64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf8_mu( @@ -1309,7 +1309,7 @@ vfloat64m8_t test_vloxei64_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei64_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf4_mu( @@ -1318,7 +1318,7 @@ vint8mf8_t test_vloxei64_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei64_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8mf2_mu( @@ -1327,7 +1327,7 @@ vint8mf4_t test_vloxei64_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei64_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i8m1_mu( @@ -1336,7 +1336,7 @@ vint8mf2_t test_vloxei64_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei64_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf4_mu( @@ -1345,7 +1345,7 @@ vint8m1_t test_vloxei64_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei64_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16mf2_mu( @@ -1354,7 +1354,7 @@ vint16mf4_t test_vloxei64_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei64_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m1_mu( @@ -1363,7 +1363,7 @@ vint16mf2_t test_vloxei64_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei64_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i16m2_mu( @@ -1372,7 +1372,7 @@ vint16m1_t test_vloxei64_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei64_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32mf2_mu( @@ -1381,7 +1381,7 @@ vint16m2_t test_vloxei64_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei64_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m1_mu( @@ -1390,7 +1390,7 @@ vint32mf2_t test_vloxei64_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei64_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m2_mu( @@ -1399,7 +1399,7 @@ vint32m1_t test_vloxei64_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei64_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i32m4_mu( @@ -1408,7 +1408,7 @@ vint32m2_t test_vloxei64_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei64_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m1_mu( @@ -1417,7 +1417,7 @@ vint32m4_t test_vloxei64_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei64_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_i64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m2_mu( @@ -1426,7 +1426,7 @@ vint64m1_t test_vloxei64_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei64_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_i64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m4_mu( @@ -1435,7 +1435,7 @@ vint64m2_t test_vloxei64_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei64_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_i64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_i64m8_mu( @@ -1444,7 +1444,7 @@ vint64m4_t test_vloxei64_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei64_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_i64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_i64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf8_mu( @@ -1453,7 +1453,7 @@ vint64m8_t test_vloxei64_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei64_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf4_mu( @@ -1462,7 +1462,7 @@ vuint8mf8_t test_vloxei64_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei64_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8mf2_mu( @@ -1471,7 +1471,7 @@ vuint8mf4_t test_vloxei64_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei64_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u8m1_mu( @@ -1480,7 +1480,7 @@ vuint8mf2_t test_vloxei64_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei64_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf4_mu( @@ -1489,7 +1489,7 @@ vuint8m1_t test_vloxei64_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei64_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16mf2_mu( @@ -1498,7 +1498,7 @@ vuint16mf4_t test_vloxei64_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei64_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m1_mu( @@ -1507,7 +1507,7 @@ vuint16mf2_t test_vloxei64_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei64_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u16m2_mu( @@ -1516,7 +1516,7 @@ vuint16m1_t test_vloxei64_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei64_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32mf2_mu( @@ -1525,7 +1525,7 @@ vuint16m2_t test_vloxei64_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei64_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m1_mu( @@ -1534,7 +1534,7 @@ vuint32mf2_t test_vloxei64_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei64_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m2_mu( @@ -1543,7 +1543,7 @@ vuint32m1_t test_vloxei64_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei64_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u32m4_mu( @@ -1552,7 +1552,7 @@ vuint32m2_t test_vloxei64_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei64_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m1_mu( @@ -1561,7 +1561,7 @@ vuint32m4_t test_vloxei64_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei64_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxei64_v_u64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m2_mu( @@ -1570,7 +1570,7 @@ vuint64m1_t test_vloxei64_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei64_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxei64_v_u64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m4_mu( @@ -1579,7 +1579,7 @@ vuint64m2_t test_vloxei64_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei64_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxei64_v_u64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei64_v_u64m8_mu( @@ -1588,6 +1588,6 @@ vuint64m4_t test_vloxei64_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei64_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vloxei64_v_u64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei64_v_u64m8_mu(mask, maskedoff, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei8.c index b905e2e5313cddcddc23757a384449aee9bdbc7a..bbc08548c927dd7a4a4d4e9fa7e05033fa929522 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei8_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vloxei8_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 * // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei8_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vloxei8_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 * // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei8_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vloxei8_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei8_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vloxei8_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei8_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vloxei8_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei8_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_f16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vloxei8_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei8_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vloxei8_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei8_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vloxei8_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei8_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vloxei8_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei8_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vloxei8_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei8_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vloxei8_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei8_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vloxei8_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei8_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vloxei8_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei8_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vloxei8_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei8_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf8_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vloxei8_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei8_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf4_tu( @@ -157,7 +157,7 @@ vint8mf8_t test_vloxei8_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei8_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf2_tu( @@ -166,7 +166,7 @@ vint8mf4_t test_vloxei8_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei8_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m1_tu( @@ -175,7 +175,7 @@ vint8mf2_t test_vloxei8_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei8_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m2_tu( @@ -184,7 +184,7 @@ vint8m1_t test_vloxei8_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei8_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m4_tu( @@ -193,7 +193,7 @@ vint8m2_t test_vloxei8_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei8_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i8m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m8_tu( @@ -202,7 +202,7 @@ vint8m4_t test_vloxei8_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vloxei8_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_i8m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf4_tu( @@ -211,7 +211,7 @@ vint8m8_t test_vloxei8_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei8_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf2_tu( @@ -220,7 +220,7 @@ vint16mf4_t test_vloxei8_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei8_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m1_tu( @@ -229,7 +229,7 @@ vint16mf2_t test_vloxei8_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei8_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m2_tu( @@ -238,7 +238,7 @@ vint16m1_t test_vloxei8_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei8_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m4_tu( @@ -247,7 +247,7 @@ vint16m2_t test_vloxei8_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei8_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m8_tu( @@ -256,7 +256,7 @@ vint16m4_t test_vloxei8_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei8_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32mf2_tu( @@ -265,7 +265,7 @@ vint16m8_t test_vloxei8_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei8_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m1_tu( @@ -274,7 +274,7 @@ vint32mf2_t test_vloxei8_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei8_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vloxei8_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei8_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m4_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vloxei8_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei8_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m8_tu( @@ -301,7 +301,7 @@ vint32m4_t test_vloxei8_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei8_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m1_tu( @@ -310,7 +310,7 @@ vint32m8_t test_vloxei8_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei8_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m2_tu( @@ -319,7 +319,7 @@ vint64m1_t test_vloxei8_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei8_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m4_tu( @@ -328,7 +328,7 @@ vint64m2_t test_vloxei8_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei8_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m8_tu( @@ -337,7 +337,7 @@ vint64m4_t test_vloxei8_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei8_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf8_tu( @@ -346,7 +346,7 @@ vint64m8_t test_vloxei8_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei8_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf4_tu( @@ -355,7 +355,7 @@ vuint8mf8_t test_vloxei8_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei8_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf2_tu( @@ -364,7 +364,7 @@ vuint8mf4_t test_vloxei8_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei8_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m1_tu( @@ -373,7 +373,7 @@ vuint8mf2_t test_vloxei8_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei8_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m2_tu( @@ -382,7 +382,7 @@ vuint8m1_t test_vloxei8_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei8_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m4_tu( @@ -391,7 +391,7 @@ vuint8m2_t test_vloxei8_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei8_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u8m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m8_tu( @@ -400,7 +400,7 @@ vuint8m4_t test_vloxei8_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vloxei8_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_u8m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf4_tu( @@ -409,7 +409,7 @@ vuint8m8_t test_vloxei8_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei8_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf2_tu( @@ -418,7 +418,7 @@ vuint16mf4_t test_vloxei8_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei8_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m1_tu( @@ -427,7 +427,7 @@ vuint16mf2_t test_vloxei8_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei8_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m2_tu( @@ -436,7 +436,7 @@ vuint16m1_t test_vloxei8_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei8_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m4_tu( @@ -445,7 +445,7 @@ vuint16m2_t test_vloxei8_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei8_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m8_tu( @@ -454,7 +454,7 @@ vuint16m4_t test_vloxei8_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei8_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32mf2_tu( @@ -463,7 +463,7 @@ vuint16m8_t test_vloxei8_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei8_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m1_tu( @@ -472,7 +472,7 @@ vuint32mf2_t test_vloxei8_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei8_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m2_tu( @@ -481,7 +481,7 @@ vuint32m1_t test_vloxei8_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei8_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m4_tu( @@ -490,7 +490,7 @@ vuint32m2_t test_vloxei8_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei8_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m8_tu( @@ -499,7 +499,7 @@ vuint32m4_t test_vloxei8_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei8_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m1_tu( @@ -508,7 +508,7 @@ vuint32m8_t test_vloxei8_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei8_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m2_tu( @@ -517,7 +517,7 @@ vuint64m1_t test_vloxei8_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei8_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m4_tu( @@ -526,7 +526,7 @@ vuint64m2_t test_vloxei8_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei8_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m8_tu( @@ -535,7 +535,7 @@ vuint64m4_t test_vloxei8_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei8_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf4_tum( @@ -544,7 +544,7 @@ vuint64m8_t test_vloxei8_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei8_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf2_tum( @@ -553,7 +553,7 @@ vfloat16mf4_t test_vloxei8_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei8_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m1_tum( @@ -562,7 +562,7 @@ vfloat16mf2_t test_vloxei8_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei8_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m2_tum( @@ -571,7 +571,7 @@ vfloat16m1_t test_vloxei8_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei8_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m4_tum( @@ -580,7 +580,7 @@ vfloat16m2_t test_vloxei8_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei8_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m8_tum( @@ -589,7 +589,7 @@ vfloat16m4_t test_vloxei8_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei8_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_f16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32mf2_tum( @@ -598,7 +598,7 @@ vfloat16m8_t test_vloxei8_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei8_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m1_tum( @@ -607,7 +607,7 @@ vfloat32mf2_t test_vloxei8_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei8_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m2_tum( @@ -616,7 +616,7 @@ vfloat32m1_t test_vloxei8_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei8_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m4_tum( @@ -625,7 +625,7 @@ vfloat32m2_t test_vloxei8_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei8_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m8_tum( @@ -634,7 +634,7 @@ vfloat32m4_t test_vloxei8_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei8_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m1_tum( @@ -643,7 +643,7 @@ vfloat32m8_t test_vloxei8_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei8_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m2_tum( @@ -652,7 +652,7 @@ vfloat64m1_t test_vloxei8_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei8_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m4_tum( @@ -661,7 +661,7 @@ vfloat64m2_t test_vloxei8_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei8_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m8_tum( @@ -670,7 +670,7 @@ vfloat64m4_t test_vloxei8_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei8_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf8_tum( @@ -679,7 +679,7 @@ vfloat64m8_t test_vloxei8_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei8_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf4_tum( @@ -688,7 +688,7 @@ vint8mf8_t test_vloxei8_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei8_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf2_tum( @@ -697,7 +697,7 @@ vint8mf4_t test_vloxei8_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei8_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m1_tum( @@ -706,7 +706,7 @@ vint8mf2_t test_vloxei8_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei8_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m2_tum( @@ -715,7 +715,7 @@ vint8m1_t test_vloxei8_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei8_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m4_tum( @@ -724,7 +724,7 @@ vint8m2_t test_vloxei8_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei8_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i8m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m8_tum( @@ -733,7 +733,7 @@ vint8m4_t test_vloxei8_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vloxei8_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_i8m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf4_tum( @@ -742,7 +742,7 @@ vint8m8_t test_vloxei8_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei8_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf2_tum( @@ -751,7 +751,7 @@ vint16mf4_t test_vloxei8_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei8_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m1_tum( @@ -760,7 +760,7 @@ vint16mf2_t test_vloxei8_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei8_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m2_tum( @@ -769,7 +769,7 @@ vint16m1_t test_vloxei8_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei8_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m4_tum( @@ -778,7 +778,7 @@ vint16m2_t test_vloxei8_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei8_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m8_tum( @@ -787,7 +787,7 @@ vint16m4_t test_vloxei8_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei8_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32mf2_tum( @@ -796,7 +796,7 @@ vint16m8_t test_vloxei8_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei8_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m1_tum( @@ -805,7 +805,7 @@ vint32mf2_t test_vloxei8_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei8_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m2_tum( @@ -814,7 +814,7 @@ vint32m1_t test_vloxei8_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei8_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m4_tum( @@ -823,7 +823,7 @@ vint32m2_t test_vloxei8_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei8_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m8_tum( @@ -832,7 +832,7 @@ vint32m4_t test_vloxei8_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei8_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m1_tum( @@ -841,7 +841,7 @@ vint32m8_t test_vloxei8_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei8_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m2_tum( @@ -850,7 +850,7 @@ vint64m1_t test_vloxei8_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei8_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m4_tum( @@ -859,7 +859,7 @@ vint64m2_t test_vloxei8_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei8_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m8_tum( @@ -868,7 +868,7 @@ vint64m4_t test_vloxei8_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei8_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf8_tum( @@ -877,7 +877,7 @@ vint64m8_t test_vloxei8_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei8_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf4_tum( @@ -886,7 +886,7 @@ vuint8mf8_t test_vloxei8_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei8_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf2_tum( @@ -895,7 +895,7 @@ vuint8mf4_t test_vloxei8_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei8_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m1_tum( @@ -904,7 +904,7 @@ vuint8mf2_t test_vloxei8_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei8_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m2_tum( @@ -913,7 +913,7 @@ vuint8m1_t test_vloxei8_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei8_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m4_tum( @@ -922,7 +922,7 @@ vuint8m2_t test_vloxei8_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei8_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u8m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m8_tum( @@ -931,7 +931,7 @@ vuint8m4_t test_vloxei8_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vloxei8_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_u8m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf4_tum( @@ -940,7 +940,7 @@ vuint8m8_t test_vloxei8_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei8_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf2_tum( @@ -949,7 +949,7 @@ vuint16mf4_t test_vloxei8_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei8_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m1_tum( @@ -958,7 +958,7 @@ vuint16mf2_t test_vloxei8_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei8_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m2_tum( @@ -967,7 +967,7 @@ vuint16m1_t test_vloxei8_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei8_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m4_tum( @@ -976,7 +976,7 @@ vuint16m2_t test_vloxei8_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei8_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m8_tum( @@ -985,7 +985,7 @@ vuint16m4_t test_vloxei8_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei8_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32mf2_tum( @@ -994,7 +994,7 @@ vuint16m8_t test_vloxei8_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei8_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m1_tum( @@ -1003,7 +1003,7 @@ vuint32mf2_t test_vloxei8_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei8_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m2_tum( @@ -1012,7 +1012,7 @@ vuint32m1_t test_vloxei8_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei8_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m4_tum( @@ -1021,7 +1021,7 @@ vuint32m2_t test_vloxei8_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei8_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m8_tum( @@ -1030,7 +1030,7 @@ vuint32m4_t test_vloxei8_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei8_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m1_tum( @@ -1039,7 +1039,7 @@ vuint32m8_t test_vloxei8_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei8_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m2_tum( @@ -1048,7 +1048,7 @@ vuint64m1_t test_vloxei8_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei8_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m4_tum( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vloxei8_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei8_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m8_tum( @@ -1066,7 +1066,7 @@ vuint64m4_t test_vloxei8_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei8_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf4_tumu( @@ -1075,7 +1075,7 @@ vuint64m8_t test_vloxei8_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei8_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf2_tumu( @@ -1084,7 +1084,7 @@ vfloat16mf4_t test_vloxei8_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei8_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m1_tumu( @@ -1093,7 +1093,7 @@ vfloat16mf2_t test_vloxei8_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei8_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m2_tumu( @@ -1102,7 +1102,7 @@ vfloat16m1_t test_vloxei8_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei8_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m4_tumu( @@ -1111,7 +1111,7 @@ vfloat16m2_t test_vloxei8_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei8_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m8_tumu( @@ -1120,7 +1120,7 @@ vfloat16m4_t test_vloxei8_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei8_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_f16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32mf2_tumu( @@ -1129,7 +1129,7 @@ vfloat16m8_t test_vloxei8_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei8_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m1_tumu( @@ -1138,7 +1138,7 @@ vfloat32mf2_t test_vloxei8_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei8_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m2_tumu( @@ -1147,7 +1147,7 @@ vfloat32m1_t test_vloxei8_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei8_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m4_tumu( @@ -1156,7 +1156,7 @@ vfloat32m2_t test_vloxei8_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei8_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m8_tumu( @@ -1165,7 +1165,7 @@ vfloat32m4_t test_vloxei8_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei8_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m1_tumu( @@ -1174,7 +1174,7 @@ vfloat32m8_t test_vloxei8_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei8_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m2_tumu( @@ -1183,7 +1183,7 @@ vfloat64m1_t test_vloxei8_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei8_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m4_tumu( @@ -1192,7 +1192,7 @@ vfloat64m2_t test_vloxei8_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei8_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m8_tumu( @@ -1201,7 +1201,7 @@ vfloat64m4_t test_vloxei8_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei8_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf8_tumu( @@ -1210,7 +1210,7 @@ vfloat64m8_t test_vloxei8_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei8_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf4_tumu( @@ -1219,7 +1219,7 @@ vint8mf8_t test_vloxei8_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei8_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf2_tumu( @@ -1228,7 +1228,7 @@ vint8mf4_t test_vloxei8_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei8_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m1_tumu( @@ -1237,7 +1237,7 @@ vint8mf2_t test_vloxei8_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei8_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m2_tumu( @@ -1246,7 +1246,7 @@ vint8m1_t test_vloxei8_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei8_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m4_tumu( @@ -1255,7 +1255,7 @@ vint8m2_t test_vloxei8_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei8_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i8m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m8_tumu( @@ -1264,7 +1264,7 @@ vint8m4_t test_vloxei8_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vloxei8_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_i8m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf4_tumu( @@ -1273,7 +1273,7 @@ vint8m8_t test_vloxei8_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei8_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf2_tumu( @@ -1282,7 +1282,7 @@ vint16mf4_t test_vloxei8_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei8_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m1_tumu( @@ -1291,7 +1291,7 @@ vint16mf2_t test_vloxei8_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei8_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m2_tumu( @@ -1300,7 +1300,7 @@ vint16m1_t test_vloxei8_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei8_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m4_tumu( @@ -1309,7 +1309,7 @@ vint16m2_t test_vloxei8_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei8_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m8_tumu( @@ -1318,7 +1318,7 @@ vint16m4_t test_vloxei8_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei8_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32mf2_tumu( @@ -1327,7 +1327,7 @@ vint16m8_t test_vloxei8_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei8_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m1_tumu( @@ -1336,7 +1336,7 @@ vint32mf2_t test_vloxei8_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei8_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m2_tumu( @@ -1345,7 +1345,7 @@ vint32m1_t test_vloxei8_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei8_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m4_tumu( @@ -1354,7 +1354,7 @@ vint32m2_t test_vloxei8_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei8_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m8_tumu( @@ -1363,7 +1363,7 @@ vint32m4_t test_vloxei8_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei8_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m1_tumu( @@ -1372,7 +1372,7 @@ vint32m8_t test_vloxei8_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei8_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m2_tumu( @@ -1381,7 +1381,7 @@ vint64m1_t test_vloxei8_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei8_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m4_tumu( @@ -1390,7 +1390,7 @@ vint64m2_t test_vloxei8_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei8_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m8_tumu( @@ -1399,7 +1399,7 @@ vint64m4_t test_vloxei8_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei8_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf8_tumu( @@ -1408,7 +1408,7 @@ vint64m8_t test_vloxei8_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei8_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf4_tumu( @@ -1417,7 +1417,7 @@ vuint8mf8_t test_vloxei8_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei8_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf2_tumu( @@ -1426,7 +1426,7 @@ vuint8mf4_t test_vloxei8_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei8_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m1_tumu( @@ -1435,7 +1435,7 @@ vuint8mf2_t test_vloxei8_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei8_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m2_tumu( @@ -1444,7 +1444,7 @@ vuint8m1_t test_vloxei8_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei8_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m4_tumu( @@ -1453,7 +1453,7 @@ vuint8m2_t test_vloxei8_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei8_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u8m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m8_tumu( @@ -1462,7 +1462,7 @@ vuint8m4_t test_vloxei8_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vloxei8_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_u8m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf4_tumu( @@ -1471,7 +1471,7 @@ vuint8m8_t test_vloxei8_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei8_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf2_tumu( @@ -1480,7 +1480,7 @@ vuint16mf4_t test_vloxei8_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei8_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m1_tumu( @@ -1489,7 +1489,7 @@ vuint16mf2_t test_vloxei8_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei8_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m2_tumu( @@ -1498,7 +1498,7 @@ vuint16m1_t test_vloxei8_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei8_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m4_tumu( @@ -1507,7 +1507,7 @@ vuint16m2_t test_vloxei8_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei8_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m8_tumu( @@ -1516,7 +1516,7 @@ vuint16m4_t test_vloxei8_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei8_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32mf2_tumu( @@ -1525,7 +1525,7 @@ vuint16m8_t test_vloxei8_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei8_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m1_tumu( @@ -1534,7 +1534,7 @@ vuint32mf2_t test_vloxei8_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei8_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m2_tumu( @@ -1543,7 +1543,7 @@ vuint32m1_t test_vloxei8_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei8_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m4_tumu( @@ -1552,7 +1552,7 @@ vuint32m2_t test_vloxei8_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei8_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m8_tumu( @@ -1561,7 +1561,7 @@ vuint32m4_t test_vloxei8_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei8_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m1_tumu( @@ -1570,7 +1570,7 @@ vuint32m8_t test_vloxei8_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei8_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m2_tumu( @@ -1579,7 +1579,7 @@ vuint64m1_t test_vloxei8_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei8_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m4_tumu( @@ -1588,7 +1588,7 @@ vuint64m2_t test_vloxei8_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei8_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m8_tumu( @@ -1597,7 +1597,7 @@ vuint64m4_t test_vloxei8_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei8_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf4_mu( @@ -1606,7 +1606,7 @@ vuint64m8_t test_vloxei8_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vloxei8_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16mf2_mu( @@ -1615,7 +1615,7 @@ vfloat16mf4_t test_vloxei8_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vloxei8_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m1_mu( @@ -1624,7 +1624,7 @@ vfloat16mf2_t test_vloxei8_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vloxei8_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m2_mu( @@ -1633,7 +1633,7 @@ vfloat16m1_t test_vloxei8_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vloxei8_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m4_mu( @@ -1642,7 +1642,7 @@ vfloat16m2_t test_vloxei8_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vloxei8_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f16m8_mu( @@ -1651,7 +1651,7 @@ vfloat16m4_t test_vloxei8_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vloxei8_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_f16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32mf2_mu( @@ -1660,7 +1660,7 @@ vfloat16m8_t test_vloxei8_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vloxei8_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m1_mu( @@ -1669,7 +1669,7 @@ vfloat32mf2_t test_vloxei8_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vloxei8_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m2_mu( @@ -1678,7 +1678,7 @@ vfloat32m1_t test_vloxei8_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vloxei8_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m4_mu( @@ -1687,7 +1687,7 @@ vfloat32m2_t test_vloxei8_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vloxei8_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f32m8_mu( @@ -1696,7 +1696,7 @@ vfloat32m4_t test_vloxei8_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vloxei8_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_f32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m1_mu( @@ -1705,7 +1705,7 @@ vfloat32m8_t test_vloxei8_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vloxei8_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_f64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m2_mu( @@ -1714,7 +1714,7 @@ vfloat64m1_t test_vloxei8_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vloxei8_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_f64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m4_mu( @@ -1723,7 +1723,7 @@ vfloat64m2_t test_vloxei8_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vloxei8_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_f64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_f64m8_mu( @@ -1732,7 +1732,7 @@ vfloat64m4_t test_vloxei8_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vloxei8_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_f64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_f64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf8_mu( @@ -1741,7 +1741,7 @@ vfloat64m8_t test_vloxei8_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vloxei8_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf4_mu( @@ -1750,7 +1750,7 @@ vint8mf8_t test_vloxei8_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vloxei8_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8mf2_mu( @@ -1759,7 +1759,7 @@ vint8mf4_t test_vloxei8_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vloxei8_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m1_mu( @@ -1768,7 +1768,7 @@ vint8mf2_t test_vloxei8_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vloxei8_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m2_mu( @@ -1777,7 +1777,7 @@ vint8m1_t test_vloxei8_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vloxei8_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m4_mu( @@ -1786,7 +1786,7 @@ vint8m2_t test_vloxei8_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vloxei8_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i8m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i8m8_mu( @@ -1795,7 +1795,7 @@ vint8m4_t test_vloxei8_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vloxei8_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_i8m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i8m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf4_mu( @@ -1804,7 +1804,7 @@ vint8m8_t test_vloxei8_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vloxei8_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16mf2_mu( @@ -1813,7 +1813,7 @@ vint16mf4_t test_vloxei8_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vloxei8_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m1_mu( @@ -1822,7 +1822,7 @@ vint16mf2_t test_vloxei8_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vloxei8_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m2_mu( @@ -1831,7 +1831,7 @@ vint16m1_t test_vloxei8_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vloxei8_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m4_mu( @@ -1840,7 +1840,7 @@ vint16m2_t test_vloxei8_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vloxei8_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i16m8_mu( @@ -1849,7 +1849,7 @@ vint16m4_t test_vloxei8_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vloxei8_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_i16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32mf2_mu( @@ -1858,7 +1858,7 @@ vint16m8_t test_vloxei8_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vloxei8_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m1_mu( @@ -1867,7 +1867,7 @@ vint32mf2_t test_vloxei8_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vloxei8_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m2_mu( @@ -1876,7 +1876,7 @@ vint32m1_t test_vloxei8_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vloxei8_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m4_mu( @@ -1885,7 +1885,7 @@ vint32m2_t test_vloxei8_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vloxei8_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i32m8_mu( @@ -1894,7 +1894,7 @@ vint32m4_t test_vloxei8_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vloxei8_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_i32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m1_mu( @@ -1903,7 +1903,7 @@ vint32m8_t test_vloxei8_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vloxei8_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_i64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m2_mu( @@ -1912,7 +1912,7 @@ vint64m1_t test_vloxei8_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vloxei8_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_i64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m4_mu( @@ -1921,7 +1921,7 @@ vint64m2_t test_vloxei8_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vloxei8_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_i64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_i64m8_mu( @@ -1930,7 +1930,7 @@ vint64m4_t test_vloxei8_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vloxei8_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_i64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_i64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf8_mu( @@ -1939,7 +1939,7 @@ vint64m8_t test_vloxei8_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vloxei8_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf4_mu( @@ -1948,7 +1948,7 @@ vuint8mf8_t test_vloxei8_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vloxei8_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8mf2_mu( @@ -1957,7 +1957,7 @@ vuint8mf4_t test_vloxei8_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vloxei8_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m1_mu( @@ -1966,7 +1966,7 @@ vuint8mf2_t test_vloxei8_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vloxei8_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m2_mu( @@ -1975,7 +1975,7 @@ vuint8m1_t test_vloxei8_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vloxei8_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m4_mu( @@ -1984,7 +1984,7 @@ vuint8m2_t test_vloxei8_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vloxei8_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u8m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u8m8_mu( @@ -1993,7 +1993,7 @@ vuint8m4_t test_vloxei8_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vloxei8_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vloxei8_v_u8m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u8m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf4_mu( @@ -2002,7 +2002,7 @@ vuint8m8_t test_vloxei8_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vloxei8_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16mf2_mu( @@ -2011,7 +2011,7 @@ vuint16mf4_t test_vloxei8_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vloxei8_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m1_mu( @@ -2020,7 +2020,7 @@ vuint16mf2_t test_vloxei8_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vloxei8_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m2_mu( @@ -2029,7 +2029,7 @@ vuint16m1_t test_vloxei8_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vloxei8_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m4_mu( @@ -2038,7 +2038,7 @@ vuint16m2_t test_vloxei8_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vloxei8_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u16m8_mu( @@ -2047,7 +2047,7 @@ vuint16m4_t test_vloxei8_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vloxei8_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vloxei8_v_u16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32mf2_mu( @@ -2056,7 +2056,7 @@ vuint16m8_t test_vloxei8_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vloxei8_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m1_mu( @@ -2065,7 +2065,7 @@ vuint32mf2_t test_vloxei8_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vloxei8_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m2_mu( @@ -2074,7 +2074,7 @@ vuint32m1_t test_vloxei8_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vloxei8_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m4_mu( @@ -2083,7 +2083,7 @@ vuint32m2_t test_vloxei8_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vloxei8_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u32m8_mu( @@ -2092,7 +2092,7 @@ vuint32m4_t test_vloxei8_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vloxei8_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vloxei8_v_u32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m1_mu( @@ -2101,7 +2101,7 @@ vuint32m8_t test_vloxei8_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vloxei8_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxei8_v_u64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m2_mu( @@ -2110,7 +2110,7 @@ vuint64m1_t test_vloxei8_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vloxei8_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxei8_v_u64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m4_mu( @@ -2119,7 +2119,7 @@ vuint64m2_t test_vloxei8_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vloxei8_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxei8_v_u64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxei8_v_u64m8_mu( @@ -2128,6 +2128,6 @@ vuint64m4_t test_vloxei8_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vloxei8_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vloxei8_v_u64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vloxei8_v_u64m8_mu(mask, maskedoff, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c index 852214f52c8156441e87473afde876eb6eb162e9..66bb2ca6959eb8cc09cd036417c9767bbc1bb5de 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei16.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vloxseg2ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vloxseg2ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vloxseg2ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m4_tu( @@ -69,7 +69,7 @@ void test_vloxseg2ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32mf2_tu( @@ -82,7 +82,7 @@ void test_vloxseg2ei16_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m1_tu( @@ -95,7 +95,7 @@ void test_vloxseg2ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m2_tu( @@ -108,7 +108,7 @@ void test_vloxseg2ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m4_tu( @@ -121,7 +121,7 @@ void test_vloxseg2ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m1_tu( @@ -134,7 +134,7 @@ void test_vloxseg2ei16_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m2_tu( @@ -147,7 +147,7 @@ void test_vloxseg2ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m4_tu( @@ -160,7 +160,7 @@ void test_vloxseg2ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf8_tu( @@ -173,7 +173,7 @@ void test_vloxseg2ei16_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf4_tu( @@ -186,7 +186,7 @@ void test_vloxseg2ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf2_tu( @@ -199,7 +199,7 @@ void test_vloxseg2ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m1_tu( @@ -212,7 +212,7 @@ void test_vloxseg2ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m2_tu( @@ -225,7 +225,7 @@ void test_vloxseg2ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m4_tu( @@ -238,7 +238,7 @@ void test_vloxseg2ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf4_tu( @@ -251,7 +251,7 @@ void test_vloxseg2ei16_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf2_tu( @@ -264,7 +264,7 @@ void test_vloxseg2ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vloxseg2ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m2_tu( @@ -290,7 +290,7 @@ void test_vloxseg2ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m4_tu( @@ -303,7 +303,7 @@ void test_vloxseg2ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32mf2_tu( @@ -316,7 +316,7 @@ void test_vloxseg2ei16_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m1_tu( @@ -329,7 +329,7 @@ void test_vloxseg2ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m2_tu( @@ -342,7 +342,7 @@ void test_vloxseg2ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m4_tu( @@ -355,7 +355,7 @@ void test_vloxseg2ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m1_tu( @@ -368,7 +368,7 @@ void test_vloxseg2ei16_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m2_tu( @@ -381,7 +381,7 @@ void test_vloxseg2ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m4_tu( @@ -394,7 +394,7 @@ void test_vloxseg2ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf8_tu( @@ -407,7 +407,7 @@ void test_vloxseg2ei16_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf4_tu( @@ -420,7 +420,7 @@ void test_vloxseg2ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf2_tu( @@ -433,7 +433,7 @@ void test_vloxseg2ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m1_tu( @@ -446,7 +446,7 @@ void test_vloxseg2ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m2_tu( @@ -459,7 +459,7 @@ void test_vloxseg2ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m4_tu( @@ -472,7 +472,7 @@ void test_vloxseg2ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf4_tu( @@ -485,7 +485,7 @@ void test_vloxseg2ei16_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf2_tu( @@ -498,7 +498,7 @@ void test_vloxseg2ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m1_tu( @@ -511,7 +511,7 @@ void test_vloxseg2ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m2_tu( @@ -524,7 +524,7 @@ void test_vloxseg2ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m4_tu( @@ -537,7 +537,7 @@ void test_vloxseg2ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32mf2_tu( @@ -550,7 +550,7 @@ void test_vloxseg2ei16_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m1_tu( @@ -563,7 +563,7 @@ void test_vloxseg2ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m2_tu( @@ -576,7 +576,7 @@ void test_vloxseg2ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m4_tu( @@ -589,7 +589,7 @@ void test_vloxseg2ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vloxseg2ei16_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m2_tu( @@ -615,7 +615,7 @@ void test_vloxseg2ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m4_tu( @@ -628,7 +628,7 @@ void test_vloxseg2ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf4_tum( @@ -641,7 +641,7 @@ void test_vloxseg2ei16_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf2_tum( @@ -654,7 +654,7 @@ void test_vloxseg2ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m1_tum( @@ -667,7 +667,7 @@ void test_vloxseg2ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m2_tum( @@ -680,7 +680,7 @@ void test_vloxseg2ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m4_tum( @@ -693,7 +693,7 @@ void test_vloxseg2ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32mf2_tum( @@ -706,7 +706,7 @@ void test_vloxseg2ei16_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m1_tum( @@ -719,7 +719,7 @@ void test_vloxseg2ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m2_tum( @@ -732,7 +732,7 @@ void test_vloxseg2ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m4_tum( @@ -745,7 +745,7 @@ void test_vloxseg2ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m1_tum( @@ -758,7 +758,7 @@ void test_vloxseg2ei16_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m2_tum( @@ -771,7 +771,7 @@ void test_vloxseg2ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m4_tum( @@ -784,7 +784,7 @@ void test_vloxseg2ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf8_tum( @@ -797,7 +797,7 @@ void test_vloxseg2ei16_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf4_tum( @@ -810,7 +810,7 @@ void test_vloxseg2ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf2_tum( @@ -823,7 +823,7 @@ void test_vloxseg2ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m1_tum( @@ -836,7 +836,7 @@ void test_vloxseg2ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m2_tum( @@ -849,7 +849,7 @@ void test_vloxseg2ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m4_tum( @@ -862,7 +862,7 @@ void test_vloxseg2ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf4_tum( @@ -875,7 +875,7 @@ void test_vloxseg2ei16_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf2_tum( @@ -888,7 +888,7 @@ void test_vloxseg2ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vloxseg2ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m2_tum( @@ -914,7 +914,7 @@ void test_vloxseg2ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m4_tum( @@ -927,7 +927,7 @@ void test_vloxseg2ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32mf2_tum( @@ -940,7 +940,7 @@ void test_vloxseg2ei16_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m1_tum( @@ -953,7 +953,7 @@ void test_vloxseg2ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m2_tum( @@ -966,7 +966,7 @@ void test_vloxseg2ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m4_tum( @@ -979,7 +979,7 @@ void test_vloxseg2ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m1_tum( @@ -992,7 +992,7 @@ void test_vloxseg2ei16_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m2_tum( @@ -1005,7 +1005,7 @@ void test_vloxseg2ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m4_tum( @@ -1018,7 +1018,7 @@ void test_vloxseg2ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf8_tum( @@ -1031,7 +1031,7 @@ void test_vloxseg2ei16_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf4_tum( @@ -1044,7 +1044,7 @@ void test_vloxseg2ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf2_tum( @@ -1057,7 +1057,7 @@ void test_vloxseg2ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m1_tum( @@ -1070,7 +1070,7 @@ void test_vloxseg2ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m2_tum( @@ -1083,7 +1083,7 @@ void test_vloxseg2ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m4_tum( @@ -1096,7 +1096,7 @@ void test_vloxseg2ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf4_tum( @@ -1109,7 +1109,7 @@ void test_vloxseg2ei16_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf2_tum( @@ -1122,7 +1122,7 @@ void test_vloxseg2ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m1_tum( @@ -1135,7 +1135,7 @@ void test_vloxseg2ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m2_tum( @@ -1148,7 +1148,7 @@ void test_vloxseg2ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m4_tum( @@ -1161,7 +1161,7 @@ void test_vloxseg2ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32mf2_tum( @@ -1174,7 +1174,7 @@ void test_vloxseg2ei16_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m1_tum( @@ -1187,7 +1187,7 @@ void test_vloxseg2ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m2_tum( @@ -1200,7 +1200,7 @@ void test_vloxseg2ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m4_tum( @@ -1213,7 +1213,7 @@ void test_vloxseg2ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m1_tum( @@ -1226,7 +1226,7 @@ void test_vloxseg2ei16_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m2_tum( @@ -1239,7 +1239,7 @@ void test_vloxseg2ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m4_tum( @@ -1252,7 +1252,7 @@ void test_vloxseg2ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf4_tumu( @@ -1265,7 +1265,7 @@ void test_vloxseg2ei16_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf2_tumu( @@ -1278,7 +1278,7 @@ void test_vloxseg2ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m1_tumu( @@ -1291,7 +1291,7 @@ void test_vloxseg2ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m2_tumu( @@ -1304,7 +1304,7 @@ void test_vloxseg2ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m4_tumu( @@ -1317,7 +1317,7 @@ void test_vloxseg2ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32mf2_tumu( @@ -1330,7 +1330,7 @@ void test_vloxseg2ei16_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m1_tumu( @@ -1343,7 +1343,7 @@ void test_vloxseg2ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m2_tumu( @@ -1356,7 +1356,7 @@ void test_vloxseg2ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m4_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg2ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m1_tumu( @@ -1382,7 +1382,7 @@ void test_vloxseg2ei16_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m2_tumu( @@ -1395,7 +1395,7 @@ void test_vloxseg2ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m4_tumu( @@ -1408,7 +1408,7 @@ void test_vloxseg2ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf8_tumu( @@ -1421,7 +1421,7 @@ void test_vloxseg2ei16_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf4_tumu( @@ -1434,7 +1434,7 @@ void test_vloxseg2ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf2_tumu( @@ -1447,7 +1447,7 @@ void test_vloxseg2ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m1_tumu( @@ -1460,7 +1460,7 @@ void test_vloxseg2ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m2_tumu( @@ -1473,7 +1473,7 @@ void test_vloxseg2ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m4_tumu( @@ -1486,7 +1486,7 @@ void test_vloxseg2ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf4_tumu( @@ -1499,7 +1499,7 @@ void test_vloxseg2ei16_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf2_tumu( @@ -1512,7 +1512,7 @@ void test_vloxseg2ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m1_tumu( @@ -1525,7 +1525,7 @@ void test_vloxseg2ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m2_tumu( @@ -1538,7 +1538,7 @@ void test_vloxseg2ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m4_tumu( @@ -1551,7 +1551,7 @@ void test_vloxseg2ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vloxseg2ei16_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m1_tumu( @@ -1577,7 +1577,7 @@ void test_vloxseg2ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m2_tumu( @@ -1590,7 +1590,7 @@ void test_vloxseg2ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m4_tumu( @@ -1603,7 +1603,7 @@ void test_vloxseg2ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m1_tumu( @@ -1616,7 +1616,7 @@ void test_vloxseg2ei16_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m2_tumu( @@ -1629,7 +1629,7 @@ void test_vloxseg2ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m4_tumu( @@ -1642,7 +1642,7 @@ void test_vloxseg2ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf8_tumu( @@ -1655,7 +1655,7 @@ void test_vloxseg2ei16_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf4_tumu( @@ -1668,7 +1668,7 @@ void test_vloxseg2ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf2_tumu( @@ -1681,7 +1681,7 @@ void test_vloxseg2ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m1_tumu( @@ -1694,7 +1694,7 @@ void test_vloxseg2ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m2_tumu( @@ -1707,7 +1707,7 @@ void test_vloxseg2ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m4_tumu( @@ -1720,7 +1720,7 @@ void test_vloxseg2ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf4_tumu( @@ -1733,7 +1733,7 @@ void test_vloxseg2ei16_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf2_tumu( @@ -1746,7 +1746,7 @@ void test_vloxseg2ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m1_tumu( @@ -1759,7 +1759,7 @@ void test_vloxseg2ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m2_tumu( @@ -1772,7 +1772,7 @@ void test_vloxseg2ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m4_tumu( @@ -1785,7 +1785,7 @@ void test_vloxseg2ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32mf2_tumu( @@ -1798,7 +1798,7 @@ void test_vloxseg2ei16_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m1_tumu( @@ -1811,7 +1811,7 @@ void test_vloxseg2ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m2_tumu( @@ -1824,7 +1824,7 @@ void test_vloxseg2ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m4_tumu( @@ -1837,7 +1837,7 @@ void test_vloxseg2ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m1_tumu( @@ -1850,7 +1850,7 @@ void test_vloxseg2ei16_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m2_tumu( @@ -1863,7 +1863,7 @@ void test_vloxseg2ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m4_tumu( @@ -1876,7 +1876,7 @@ void test_vloxseg2ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf4_mu( @@ -1889,7 +1889,7 @@ void test_vloxseg2ei16_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16mf2_mu( @@ -1902,7 +1902,7 @@ void test_vloxseg2ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m1_mu( @@ -1915,7 +1915,7 @@ void test_vloxseg2ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m2_mu( @@ -1928,7 +1928,7 @@ void test_vloxseg2ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f16m4_mu( @@ -1941,7 +1941,7 @@ void test_vloxseg2ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vloxseg2ei16_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m1_mu( @@ -1967,7 +1967,7 @@ void test_vloxseg2ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m2_mu( @@ -1980,7 +1980,7 @@ void test_vloxseg2ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f32m4_mu( @@ -1993,7 +1993,7 @@ void test_vloxseg2ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m1_mu( @@ -2006,7 +2006,7 @@ void test_vloxseg2ei16_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m2_mu( @@ -2019,7 +2019,7 @@ void test_vloxseg2ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_f64m4_mu( @@ -2032,7 +2032,7 @@ void test_vloxseg2ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf8_mu( @@ -2045,7 +2045,7 @@ void test_vloxseg2ei16_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf4_mu( @@ -2058,7 +2058,7 @@ void test_vloxseg2ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8mf2_mu( @@ -2071,7 +2071,7 @@ void test_vloxseg2ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m1_mu( @@ -2084,7 +2084,7 @@ void test_vloxseg2ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m2_mu( @@ -2097,7 +2097,7 @@ void test_vloxseg2ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i8m4_mu( @@ -2110,7 +2110,7 @@ void test_vloxseg2ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf4_mu( @@ -2123,7 +2123,7 @@ void test_vloxseg2ei16_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16mf2_mu( @@ -2136,7 +2136,7 @@ void test_vloxseg2ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m1_mu( @@ -2149,7 +2149,7 @@ void test_vloxseg2ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m2_mu( @@ -2162,7 +2162,7 @@ void test_vloxseg2ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i16m4_mu( @@ -2175,7 +2175,7 @@ void test_vloxseg2ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32mf2_mu( @@ -2188,7 +2188,7 @@ void test_vloxseg2ei16_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m1_mu( @@ -2201,7 +2201,7 @@ void test_vloxseg2ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m2_mu( @@ -2214,7 +2214,7 @@ void test_vloxseg2ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i32m4_mu( @@ -2227,7 +2227,7 @@ void test_vloxseg2ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m1_mu( @@ -2240,7 +2240,7 @@ void test_vloxseg2ei16_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m2_mu( @@ -2253,7 +2253,7 @@ void test_vloxseg2ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_i64m4_mu( @@ -2266,7 +2266,7 @@ void test_vloxseg2ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf8_mu( @@ -2279,7 +2279,7 @@ void test_vloxseg2ei16_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf4_mu( @@ -2292,7 +2292,7 @@ void test_vloxseg2ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8mf2_mu( @@ -2305,7 +2305,7 @@ void test_vloxseg2ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m1_mu( @@ -2318,7 +2318,7 @@ void test_vloxseg2ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m2_mu( @@ -2331,7 +2331,7 @@ void test_vloxseg2ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u8m4_mu( @@ -2344,7 +2344,7 @@ void test_vloxseg2ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vloxseg2ei16_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf4_mu( @@ -2357,7 +2357,7 @@ void test_vloxseg2ei16_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16mf2_mu( @@ -2370,7 +2370,7 @@ void test_vloxseg2ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m1_mu( @@ -2383,7 +2383,7 @@ void test_vloxseg2ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m2_mu( @@ -2396,7 +2396,7 @@ void test_vloxseg2ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u16m4_mu( @@ -2409,7 +2409,7 @@ void test_vloxseg2ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg2ei16_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32mf2_mu( @@ -2422,7 +2422,7 @@ void test_vloxseg2ei16_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m1_mu( @@ -2435,7 +2435,7 @@ void test_vloxseg2ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m2_mu( @@ -2448,7 +2448,7 @@ void test_vloxseg2ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u32m4_mu( @@ -2461,7 +2461,7 @@ void test_vloxseg2ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg2ei16_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m1_mu( @@ -2474,7 +2474,7 @@ void test_vloxseg2ei16_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m2_mu( @@ -2487,7 +2487,7 @@ void test_vloxseg2ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei16_v_u64m4_mu( @@ -2500,6 +2500,6 @@ void test_vloxseg2ei16_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei16_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg2ei16_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei16_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c index 3cc3876df2d59d58d6f355c29119599f0d347c9d..1dc22cb473ba037155925e7f9a9cf464126010bb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei32.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vloxseg2ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vloxseg2ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vloxseg2ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m4_tu( @@ -69,7 +69,7 @@ void test_vloxseg2ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32mf2_tu( @@ -82,7 +82,7 @@ void test_vloxseg2ei32_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m1_tu( @@ -95,7 +95,7 @@ void test_vloxseg2ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m2_tu( @@ -108,7 +108,7 @@ void test_vloxseg2ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m4_tu( @@ -121,7 +121,7 @@ void test_vloxseg2ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m1_tu( @@ -134,7 +134,7 @@ void test_vloxseg2ei32_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m2_tu( @@ -147,7 +147,7 @@ void test_vloxseg2ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m4_tu( @@ -160,7 +160,7 @@ void test_vloxseg2ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf8_tu( @@ -173,7 +173,7 @@ void test_vloxseg2ei32_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf4_tu( @@ -186,7 +186,7 @@ void test_vloxseg2ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf2_tu( @@ -199,7 +199,7 @@ void test_vloxseg2ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m1_tu( @@ -212,7 +212,7 @@ void test_vloxseg2ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m2_tu( @@ -225,7 +225,7 @@ void test_vloxseg2ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf4_tu( @@ -238,7 +238,7 @@ void test_vloxseg2ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf2_tu( @@ -251,7 +251,7 @@ void test_vloxseg2ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m1_tu( @@ -264,7 +264,7 @@ void test_vloxseg2ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m2_tu( @@ -277,7 +277,7 @@ void test_vloxseg2ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m4_tu( @@ -290,7 +290,7 @@ void test_vloxseg2ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32mf2_tu( @@ -303,7 +303,7 @@ void test_vloxseg2ei32_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m1_tu( @@ -316,7 +316,7 @@ void test_vloxseg2ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m2_tu( @@ -329,7 +329,7 @@ void test_vloxseg2ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m4_tu( @@ -342,7 +342,7 @@ void test_vloxseg2ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m1_tu( @@ -355,7 +355,7 @@ void test_vloxseg2ei32_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m2_tu( @@ -368,7 +368,7 @@ void test_vloxseg2ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m4_tu( @@ -381,7 +381,7 @@ void test_vloxseg2ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf8_tu( @@ -394,7 +394,7 @@ void test_vloxseg2ei32_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf4_tu( @@ -407,7 +407,7 @@ void test_vloxseg2ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf2_tu( @@ -420,7 +420,7 @@ void test_vloxseg2ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m1_tu( @@ -433,7 +433,7 @@ void test_vloxseg2ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m2_tu( @@ -446,7 +446,7 @@ void test_vloxseg2ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf4_tu( @@ -459,7 +459,7 @@ void test_vloxseg2ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf2_tu( @@ -472,7 +472,7 @@ void test_vloxseg2ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m1_tu( @@ -485,7 +485,7 @@ void test_vloxseg2ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m2_tu( @@ -498,7 +498,7 @@ void test_vloxseg2ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m4_tu( @@ -511,7 +511,7 @@ void test_vloxseg2ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32mf2_tu( @@ -524,7 +524,7 @@ void test_vloxseg2ei32_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m1_tu( @@ -537,7 +537,7 @@ void test_vloxseg2ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m2_tu( @@ -550,7 +550,7 @@ void test_vloxseg2ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m4_tu( @@ -563,7 +563,7 @@ void test_vloxseg2ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m1_tu( @@ -576,7 +576,7 @@ void test_vloxseg2ei32_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m2_tu( @@ -589,7 +589,7 @@ void test_vloxseg2ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m4_tu( @@ -602,7 +602,7 @@ void test_vloxseg2ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf4_tum( @@ -615,7 +615,7 @@ void test_vloxseg2ei32_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf2_tum( @@ -628,7 +628,7 @@ void test_vloxseg2ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m1_tum( @@ -641,7 +641,7 @@ void test_vloxseg2ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m2_tum( @@ -654,7 +654,7 @@ void test_vloxseg2ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m4_tum( @@ -667,7 +667,7 @@ void test_vloxseg2ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32mf2_tum( @@ -680,7 +680,7 @@ void test_vloxseg2ei32_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m1_tum( @@ -693,7 +693,7 @@ void test_vloxseg2ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m2_tum( @@ -706,7 +706,7 @@ void test_vloxseg2ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m4_tum( @@ -719,7 +719,7 @@ void test_vloxseg2ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m1_tum( @@ -732,7 +732,7 @@ void test_vloxseg2ei32_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m2_tum( @@ -745,7 +745,7 @@ void test_vloxseg2ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m4_tum( @@ -758,7 +758,7 @@ void test_vloxseg2ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf8_tum( @@ -771,7 +771,7 @@ void test_vloxseg2ei32_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf4_tum( @@ -784,7 +784,7 @@ void test_vloxseg2ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf2_tum( @@ -797,7 +797,7 @@ void test_vloxseg2ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m1_tum( @@ -810,7 +810,7 @@ void test_vloxseg2ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m2_tum( @@ -823,7 +823,7 @@ void test_vloxseg2ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf4_tum( @@ -836,7 +836,7 @@ void test_vloxseg2ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf2_tum( @@ -849,7 +849,7 @@ void test_vloxseg2ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m1_tum( @@ -862,7 +862,7 @@ void test_vloxseg2ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m2_tum( @@ -875,7 +875,7 @@ void test_vloxseg2ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m4_tum( @@ -888,7 +888,7 @@ void test_vloxseg2ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32mf2_tum( @@ -901,7 +901,7 @@ void test_vloxseg2ei32_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m1_tum( @@ -914,7 +914,7 @@ void test_vloxseg2ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m2_tum( @@ -927,7 +927,7 @@ void test_vloxseg2ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m4_tum( @@ -940,7 +940,7 @@ void test_vloxseg2ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m1_tum( @@ -953,7 +953,7 @@ void test_vloxseg2ei32_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m2_tum( @@ -966,7 +966,7 @@ void test_vloxseg2ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m4_tum( @@ -979,7 +979,7 @@ void test_vloxseg2ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf8_tum( @@ -992,7 +992,7 @@ void test_vloxseg2ei32_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf4_tum( @@ -1005,7 +1005,7 @@ void test_vloxseg2ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf2_tum( @@ -1018,7 +1018,7 @@ void test_vloxseg2ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m1_tum( @@ -1031,7 +1031,7 @@ void test_vloxseg2ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m2_tum( @@ -1044,7 +1044,7 @@ void test_vloxseg2ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf4_tum( @@ -1057,7 +1057,7 @@ void test_vloxseg2ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf2_tum( @@ -1070,7 +1070,7 @@ void test_vloxseg2ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m1_tum( @@ -1083,7 +1083,7 @@ void test_vloxseg2ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m2_tum( @@ -1096,7 +1096,7 @@ void test_vloxseg2ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m4_tum( @@ -1109,7 +1109,7 @@ void test_vloxseg2ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32mf2_tum( @@ -1122,7 +1122,7 @@ void test_vloxseg2ei32_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m1_tum( @@ -1135,7 +1135,7 @@ void test_vloxseg2ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m2_tum( @@ -1148,7 +1148,7 @@ void test_vloxseg2ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m4_tum( @@ -1161,7 +1161,7 @@ void test_vloxseg2ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m1_tum( @@ -1174,7 +1174,7 @@ void test_vloxseg2ei32_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m2_tum( @@ -1187,7 +1187,7 @@ void test_vloxseg2ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m4_tum( @@ -1200,7 +1200,7 @@ void test_vloxseg2ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf4_tumu( @@ -1213,7 +1213,7 @@ void test_vloxseg2ei32_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf2_tumu( @@ -1226,7 +1226,7 @@ void test_vloxseg2ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vloxseg2ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m2_tumu( @@ -1252,7 +1252,7 @@ void test_vloxseg2ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m4_tumu( @@ -1265,7 +1265,7 @@ void test_vloxseg2ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32mf2_tumu( @@ -1278,7 +1278,7 @@ void test_vloxseg2ei32_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m1_tumu( @@ -1291,7 +1291,7 @@ void test_vloxseg2ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m2_tumu( @@ -1304,7 +1304,7 @@ void test_vloxseg2ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m4_tumu( @@ -1317,7 +1317,7 @@ void test_vloxseg2ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m1_tumu( @@ -1330,7 +1330,7 @@ void test_vloxseg2ei32_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m2_tumu( @@ -1343,7 +1343,7 @@ void test_vloxseg2ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m4_tumu( @@ -1356,7 +1356,7 @@ void test_vloxseg2ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf8_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg2ei32_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf4_tumu( @@ -1382,7 +1382,7 @@ void test_vloxseg2ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf2_tumu( @@ -1395,7 +1395,7 @@ void test_vloxseg2ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m1_tumu( @@ -1408,7 +1408,7 @@ void test_vloxseg2ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m2_tumu( @@ -1421,7 +1421,7 @@ void test_vloxseg2ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf4_tumu( @@ -1434,7 +1434,7 @@ void test_vloxseg2ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf2_tumu( @@ -1447,7 +1447,7 @@ void test_vloxseg2ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m1_tumu( @@ -1460,7 +1460,7 @@ void test_vloxseg2ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m2_tumu( @@ -1473,7 +1473,7 @@ void test_vloxseg2ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m4_tumu( @@ -1486,7 +1486,7 @@ void test_vloxseg2ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32mf2_tumu( @@ -1499,7 +1499,7 @@ void test_vloxseg2ei32_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m1_tumu( @@ -1512,7 +1512,7 @@ void test_vloxseg2ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m2_tumu( @@ -1525,7 +1525,7 @@ void test_vloxseg2ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m4_tumu( @@ -1538,7 +1538,7 @@ void test_vloxseg2ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m1_tumu( @@ -1551,7 +1551,7 @@ void test_vloxseg2ei32_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m2_tumu( @@ -1564,7 +1564,7 @@ void test_vloxseg2ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m4_tumu( @@ -1577,7 +1577,7 @@ void test_vloxseg2ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf8_tumu( @@ -1590,7 +1590,7 @@ void test_vloxseg2ei32_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf4_tumu( @@ -1603,7 +1603,7 @@ void test_vloxseg2ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf2_tumu( @@ -1616,7 +1616,7 @@ void test_vloxseg2ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m1_tumu( @@ -1629,7 +1629,7 @@ void test_vloxseg2ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m2_tumu( @@ -1642,7 +1642,7 @@ void test_vloxseg2ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf4_tumu( @@ -1655,7 +1655,7 @@ void test_vloxseg2ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf2_tumu( @@ -1668,7 +1668,7 @@ void test_vloxseg2ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m1_tumu( @@ -1681,7 +1681,7 @@ void test_vloxseg2ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m2_tumu( @@ -1694,7 +1694,7 @@ void test_vloxseg2ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m4_tumu( @@ -1707,7 +1707,7 @@ void test_vloxseg2ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32mf2_tumu( @@ -1720,7 +1720,7 @@ void test_vloxseg2ei32_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m1_tumu( @@ -1733,7 +1733,7 @@ void test_vloxseg2ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m2_tumu( @@ -1746,7 +1746,7 @@ void test_vloxseg2ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m4_tumu( @@ -1759,7 +1759,7 @@ void test_vloxseg2ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m1_tumu( @@ -1772,7 +1772,7 @@ void test_vloxseg2ei32_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m2_tumu( @@ -1785,7 +1785,7 @@ void test_vloxseg2ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m4_tumu( @@ -1798,7 +1798,7 @@ void test_vloxseg2ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf4_mu( @@ -1811,7 +1811,7 @@ void test_vloxseg2ei32_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16mf2_mu( @@ -1824,7 +1824,7 @@ void test_vloxseg2ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m1_mu( @@ -1837,7 +1837,7 @@ void test_vloxseg2ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m2_mu( @@ -1850,7 +1850,7 @@ void test_vloxseg2ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f16m4_mu( @@ -1863,7 +1863,7 @@ void test_vloxseg2ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32mf2_mu( @@ -1876,7 +1876,7 @@ void test_vloxseg2ei32_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m1_mu( @@ -1889,7 +1889,7 @@ void test_vloxseg2ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m2_mu( @@ -1902,7 +1902,7 @@ void test_vloxseg2ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f32m4_mu( @@ -1915,7 +1915,7 @@ void test_vloxseg2ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m1_mu( @@ -1928,7 +1928,7 @@ void test_vloxseg2ei32_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m2_mu( @@ -1941,7 +1941,7 @@ void test_vloxseg2ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_f64m4_mu( @@ -1954,7 +1954,7 @@ void test_vloxseg2ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf8_mu( @@ -1967,7 +1967,7 @@ void test_vloxseg2ei32_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf4_mu( @@ -1980,7 +1980,7 @@ void test_vloxseg2ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8mf2_mu( @@ -1993,7 +1993,7 @@ void test_vloxseg2ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m1_mu( @@ -2006,7 +2006,7 @@ void test_vloxseg2ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i8m2_mu( @@ -2019,7 +2019,7 @@ void test_vloxseg2ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf4_mu( @@ -2032,7 +2032,7 @@ void test_vloxseg2ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16mf2_mu( @@ -2045,7 +2045,7 @@ void test_vloxseg2ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m1_mu( @@ -2058,7 +2058,7 @@ void test_vloxseg2ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m2_mu( @@ -2071,7 +2071,7 @@ void test_vloxseg2ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i16m4_mu( @@ -2084,7 +2084,7 @@ void test_vloxseg2ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32mf2_mu( @@ -2097,7 +2097,7 @@ void test_vloxseg2ei32_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m1_mu( @@ -2110,7 +2110,7 @@ void test_vloxseg2ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m2_mu( @@ -2123,7 +2123,7 @@ void test_vloxseg2ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i32m4_mu( @@ -2136,7 +2136,7 @@ void test_vloxseg2ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m1_mu( @@ -2149,7 +2149,7 @@ void test_vloxseg2ei32_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m2_mu( @@ -2162,7 +2162,7 @@ void test_vloxseg2ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_i64m4_mu( @@ -2175,7 +2175,7 @@ void test_vloxseg2ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf8_mu( @@ -2188,7 +2188,7 @@ void test_vloxseg2ei32_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf4_mu( @@ -2201,7 +2201,7 @@ void test_vloxseg2ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8mf2_mu( @@ -2214,7 +2214,7 @@ void test_vloxseg2ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m1_mu( @@ -2227,7 +2227,7 @@ void test_vloxseg2ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u8m2_mu( @@ -2240,7 +2240,7 @@ void test_vloxseg2ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf4_mu( @@ -2253,7 +2253,7 @@ void test_vloxseg2ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16mf2_mu( @@ -2266,7 +2266,7 @@ void test_vloxseg2ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m1_mu( @@ -2279,7 +2279,7 @@ void test_vloxseg2ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m2_mu( @@ -2292,7 +2292,7 @@ void test_vloxseg2ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u16m4_mu( @@ -2305,7 +2305,7 @@ void test_vloxseg2ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg2ei32_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32mf2_mu( @@ -2318,7 +2318,7 @@ void test_vloxseg2ei32_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m1_mu( @@ -2331,7 +2331,7 @@ void test_vloxseg2ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m2_mu( @@ -2344,7 +2344,7 @@ void test_vloxseg2ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u32m4_mu( @@ -2357,7 +2357,7 @@ void test_vloxseg2ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg2ei32_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m1_mu( @@ -2370,7 +2370,7 @@ void test_vloxseg2ei32_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m2_mu( @@ -2383,7 +2383,7 @@ void test_vloxseg2ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei32_v_u64m4_mu( @@ -2396,6 +2396,6 @@ void test_vloxseg2ei32_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei32_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg2ei32_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei32_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c index 7eb993e0efddd18a7415f67f35fa80e1986be52d..a0f521ba5eae9cd88d5a09b17e91159e898d36a8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei64.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vloxseg2ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vloxseg2ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vloxseg2ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32mf2_tu( @@ -69,7 +69,7 @@ void test_vloxseg2ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m1_tu( @@ -82,7 +82,7 @@ void test_vloxseg2ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m2_tu( @@ -95,7 +95,7 @@ void test_vloxseg2ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m4_tu( @@ -108,7 +108,7 @@ void test_vloxseg2ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m1_tu( @@ -121,7 +121,7 @@ void test_vloxseg2ei64_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m2_tu( @@ -134,7 +134,7 @@ void test_vloxseg2ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m4_tu( @@ -147,7 +147,7 @@ void test_vloxseg2ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf8_tu( @@ -160,7 +160,7 @@ void test_vloxseg2ei64_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf4_tu( @@ -173,7 +173,7 @@ void test_vloxseg2ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf2_tu( @@ -186,7 +186,7 @@ void test_vloxseg2ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vloxseg2ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf4_tu( @@ -212,7 +212,7 @@ void test_vloxseg2ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedo // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf2_tu( @@ -225,7 +225,7 @@ void test_vloxseg2ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m1_tu( @@ -238,7 +238,7 @@ void test_vloxseg2ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m2_tu( @@ -251,7 +251,7 @@ void test_vloxseg2ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32mf2_tu( @@ -264,7 +264,7 @@ void test_vloxseg2ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m1_tu( @@ -277,7 +277,7 @@ void test_vloxseg2ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m2_tu( @@ -290,7 +290,7 @@ void test_vloxseg2ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m4_tu( @@ -303,7 +303,7 @@ void test_vloxseg2ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m1_tu( @@ -316,7 +316,7 @@ void test_vloxseg2ei64_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m2_tu( @@ -329,7 +329,7 @@ void test_vloxseg2ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m4_tu( @@ -342,7 +342,7 @@ void test_vloxseg2ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf8_tu( @@ -355,7 +355,7 @@ void test_vloxseg2ei64_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf4_tu( @@ -368,7 +368,7 @@ void test_vloxseg2ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf2_tu( @@ -381,7 +381,7 @@ void test_vloxseg2ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8m1_tu( @@ -394,7 +394,7 @@ void test_vloxseg2ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf4_tu( @@ -407,7 +407,7 @@ void test_vloxseg2ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf2_tu( @@ -420,7 +420,7 @@ void test_vloxseg2ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m1_tu( @@ -433,7 +433,7 @@ void test_vloxseg2ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m2_tu( @@ -446,7 +446,7 @@ void test_vloxseg2ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32mf2_tu( @@ -459,7 +459,7 @@ void test_vloxseg2ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m1_tu( @@ -472,7 +472,7 @@ void test_vloxseg2ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m2_tu( @@ -485,7 +485,7 @@ void test_vloxseg2ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m4_tu( @@ -498,7 +498,7 @@ void test_vloxseg2ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m1_tu( @@ -511,7 +511,7 @@ void test_vloxseg2ei64_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m2_tu( @@ -524,7 +524,7 @@ void test_vloxseg2ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m4_tu( @@ -537,7 +537,7 @@ void test_vloxseg2ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf4_tum( @@ -550,7 +550,7 @@ void test_vloxseg2ei64_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf2_tum( @@ -563,7 +563,7 @@ void test_vloxseg2ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m1_tum( @@ -576,7 +576,7 @@ void test_vloxseg2ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m2_tum( @@ -589,7 +589,7 @@ void test_vloxseg2ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32mf2_tum( @@ -602,7 +602,7 @@ void test_vloxseg2ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m1_tum( @@ -615,7 +615,7 @@ void test_vloxseg2ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m2_tum( @@ -628,7 +628,7 @@ void test_vloxseg2ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m4_tum( @@ -641,7 +641,7 @@ void test_vloxseg2ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m1_tum( @@ -654,7 +654,7 @@ void test_vloxseg2ei64_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m2_tum( @@ -667,7 +667,7 @@ void test_vloxseg2ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m4_tum( @@ -680,7 +680,7 @@ void test_vloxseg2ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf8_tum( @@ -693,7 +693,7 @@ void test_vloxseg2ei64_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf4_tum( @@ -706,7 +706,7 @@ void test_vloxseg2ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf2_tum( @@ -719,7 +719,7 @@ void test_vloxseg2ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8m1_tum( @@ -732,7 +732,7 @@ void test_vloxseg2ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf4_tum( @@ -745,7 +745,7 @@ void test_vloxseg2ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf2_tum( @@ -758,7 +758,7 @@ void test_vloxseg2ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m1_tum( @@ -771,7 +771,7 @@ void test_vloxseg2ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m2_tum( @@ -784,7 +784,7 @@ void test_vloxseg2ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32mf2_tum( @@ -797,7 +797,7 @@ void test_vloxseg2ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m1_tum( @@ -810,7 +810,7 @@ void test_vloxseg2ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m2_tum( @@ -823,7 +823,7 @@ void test_vloxseg2ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m4_tum( @@ -836,7 +836,7 @@ void test_vloxseg2ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m1_tum( @@ -849,7 +849,7 @@ void test_vloxseg2ei64_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m2_tum( @@ -862,7 +862,7 @@ void test_vloxseg2ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m4_tum( @@ -875,7 +875,7 @@ void test_vloxseg2ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf8_tum( @@ -888,7 +888,7 @@ void test_vloxseg2ei64_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf4_tum( @@ -901,7 +901,7 @@ void test_vloxseg2ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf2_tum( @@ -914,7 +914,7 @@ void test_vloxseg2ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8m1_tum( @@ -927,7 +927,7 @@ void test_vloxseg2ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf4_tum( @@ -940,7 +940,7 @@ void test_vloxseg2ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf2_tum( @@ -953,7 +953,7 @@ void test_vloxseg2ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m1_tum( @@ -966,7 +966,7 @@ void test_vloxseg2ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m2_tum( @@ -979,7 +979,7 @@ void test_vloxseg2ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32mf2_tum( @@ -992,7 +992,7 @@ void test_vloxseg2ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m1_tum( @@ -1005,7 +1005,7 @@ void test_vloxseg2ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m2_tum( @@ -1018,7 +1018,7 @@ void test_vloxseg2ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m4_tum( @@ -1031,7 +1031,7 @@ void test_vloxseg2ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m1_tum( @@ -1044,7 +1044,7 @@ void test_vloxseg2ei64_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m2_tum( @@ -1057,7 +1057,7 @@ void test_vloxseg2ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m4_tum( @@ -1070,7 +1070,7 @@ void test_vloxseg2ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf4_tumu( @@ -1083,7 +1083,7 @@ void test_vloxseg2ei64_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf2_tumu( @@ -1096,7 +1096,7 @@ void test_vloxseg2ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m1_tumu( @@ -1109,7 +1109,7 @@ void test_vloxseg2ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m2_tumu( @@ -1122,7 +1122,7 @@ void test_vloxseg2ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32mf2_tumu( @@ -1135,7 +1135,7 @@ void test_vloxseg2ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m1_tumu( @@ -1148,7 +1148,7 @@ void test_vloxseg2ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m2_tumu( @@ -1161,7 +1161,7 @@ void test_vloxseg2ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m4_tumu( @@ -1174,7 +1174,7 @@ void test_vloxseg2ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m1_tumu( @@ -1187,7 +1187,7 @@ void test_vloxseg2ei64_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m2_tumu( @@ -1200,7 +1200,7 @@ void test_vloxseg2ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m4_tumu( @@ -1213,7 +1213,7 @@ void test_vloxseg2ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf8_tumu( @@ -1226,7 +1226,7 @@ void test_vloxseg2ei64_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf4_tumu( @@ -1239,7 +1239,7 @@ void test_vloxseg2ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf2_tumu( @@ -1252,7 +1252,7 @@ void test_vloxseg2ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8m1_tumu( @@ -1265,7 +1265,7 @@ void test_vloxseg2ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf4_tumu( @@ -1278,7 +1278,7 @@ void test_vloxseg2ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf2_tumu( @@ -1291,7 +1291,7 @@ void test_vloxseg2ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m1_tumu( @@ -1304,7 +1304,7 @@ void test_vloxseg2ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m2_tumu( @@ -1317,7 +1317,7 @@ void test_vloxseg2ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32mf2_tumu( @@ -1330,7 +1330,7 @@ void test_vloxseg2ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m1_tumu( @@ -1343,7 +1343,7 @@ void test_vloxseg2ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m2_tumu( @@ -1356,7 +1356,7 @@ void test_vloxseg2ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m4_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg2ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m1_tumu( @@ -1382,7 +1382,7 @@ void test_vloxseg2ei64_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m2_tumu( @@ -1395,7 +1395,7 @@ void test_vloxseg2ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m4_tumu( @@ -1408,7 +1408,7 @@ void test_vloxseg2ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf8_tumu( @@ -1421,7 +1421,7 @@ void test_vloxseg2ei64_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf4_tumu( @@ -1434,7 +1434,7 @@ void test_vloxseg2ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf2_tumu( @@ -1447,7 +1447,7 @@ void test_vloxseg2ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8m1_tumu( @@ -1460,7 +1460,7 @@ void test_vloxseg2ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf4_tumu( @@ -1473,7 +1473,7 @@ void test_vloxseg2ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf2_tumu( @@ -1486,7 +1486,7 @@ void test_vloxseg2ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vloxseg2ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m2_tumu( @@ -1512,7 +1512,7 @@ void test_vloxseg2ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32mf2_tumu( @@ -1525,7 +1525,7 @@ void test_vloxseg2ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m1_tumu( @@ -1538,7 +1538,7 @@ void test_vloxseg2ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m2_tumu( @@ -1551,7 +1551,7 @@ void test_vloxseg2ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m4_tumu( @@ -1564,7 +1564,7 @@ void test_vloxseg2ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m1_tumu( @@ -1577,7 +1577,7 @@ void test_vloxseg2ei64_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m2_tumu( @@ -1590,7 +1590,7 @@ void test_vloxseg2ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m4_tumu( @@ -1603,7 +1603,7 @@ void test_vloxseg2ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf4_mu( @@ -1616,7 +1616,7 @@ void test_vloxseg2ei64_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16mf2_mu( @@ -1629,7 +1629,7 @@ void test_vloxseg2ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m1_mu( @@ -1642,7 +1642,7 @@ void test_vloxseg2ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f16m2_mu( @@ -1655,7 +1655,7 @@ void test_vloxseg2ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32mf2_mu( @@ -1668,7 +1668,7 @@ void test_vloxseg2ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m1_mu( @@ -1681,7 +1681,7 @@ void test_vloxseg2ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m2_mu( @@ -1694,7 +1694,7 @@ void test_vloxseg2ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f32m4_mu( @@ -1707,7 +1707,7 @@ void test_vloxseg2ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m1_mu( @@ -1720,7 +1720,7 @@ void test_vloxseg2ei64_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m2_mu( @@ -1733,7 +1733,7 @@ void test_vloxseg2ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_f64m4_mu( @@ -1746,7 +1746,7 @@ void test_vloxseg2ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf8_mu( @@ -1759,7 +1759,7 @@ void test_vloxseg2ei64_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf4_mu( @@ -1772,7 +1772,7 @@ void test_vloxseg2ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8mf2_mu( @@ -1785,7 +1785,7 @@ void test_vloxseg2ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i8m1_mu( @@ -1798,7 +1798,7 @@ void test_vloxseg2ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf4_mu( @@ -1811,7 +1811,7 @@ void test_vloxseg2ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16mf2_mu( @@ -1824,7 +1824,7 @@ void test_vloxseg2ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m1_mu( @@ -1837,7 +1837,7 @@ void test_vloxseg2ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i16m2_mu( @@ -1850,7 +1850,7 @@ void test_vloxseg2ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32mf2_mu( @@ -1863,7 +1863,7 @@ void test_vloxseg2ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m1_mu( @@ -1876,7 +1876,7 @@ void test_vloxseg2ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m2_mu( @@ -1889,7 +1889,7 @@ void test_vloxseg2ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i32m4_mu( @@ -1902,7 +1902,7 @@ void test_vloxseg2ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m1_mu( @@ -1915,7 +1915,7 @@ void test_vloxseg2ei64_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m2_mu( @@ -1928,7 +1928,7 @@ void test_vloxseg2ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_i64m4_mu( @@ -1941,7 +1941,7 @@ void test_vloxseg2ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf8_mu( @@ -1954,7 +1954,7 @@ void test_vloxseg2ei64_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf4_mu( @@ -1967,7 +1967,7 @@ void test_vloxseg2ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8mf2_mu( @@ -1980,7 +1980,7 @@ void test_vloxseg2ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u8m1_mu( @@ -1993,7 +1993,7 @@ void test_vloxseg2ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf4_mu( @@ -2006,7 +2006,7 @@ void test_vloxseg2ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16mf2_mu( @@ -2019,7 +2019,7 @@ void test_vloxseg2ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m1_mu( @@ -2032,7 +2032,7 @@ void test_vloxseg2ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u16m2_mu( @@ -2045,7 +2045,7 @@ void test_vloxseg2ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32mf2_mu( @@ -2058,7 +2058,7 @@ void test_vloxseg2ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m1_mu( @@ -2071,7 +2071,7 @@ void test_vloxseg2ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m2_mu( @@ -2084,7 +2084,7 @@ void test_vloxseg2ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u32m4_mu( @@ -2097,7 +2097,7 @@ void test_vloxseg2ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg2ei64_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m1_mu( @@ -2110,7 +2110,7 @@ void test_vloxseg2ei64_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m2_mu( @@ -2123,7 +2123,7 @@ void test_vloxseg2ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei64_v_u64m4_mu( @@ -2136,6 +2136,6 @@ void test_vloxseg2ei64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei64_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg2ei64_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei64_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c index b29dfc60d148d2fb216c3d708dc840895ab707d0..ab44396a46f4ba7e37536fc4d01ac6723a555cd5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg2ei8.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vloxseg2ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vloxseg2ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vloxseg2ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m4_tu( @@ -69,7 +69,7 @@ void test_vloxseg2ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32mf2_tu( @@ -82,7 +82,7 @@ void test_vloxseg2ei8_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m1_tu( @@ -95,7 +95,7 @@ void test_vloxseg2ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m2_tu( @@ -108,7 +108,7 @@ void test_vloxseg2ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m4_tu( @@ -121,7 +121,7 @@ void test_vloxseg2ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m1_tu( @@ -134,7 +134,7 @@ void test_vloxseg2ei8_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m2_tu( @@ -147,7 +147,7 @@ void test_vloxseg2ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m4_tu( @@ -160,7 +160,7 @@ void test_vloxseg2ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf8_tu( @@ -173,7 +173,7 @@ void test_vloxseg2ei8_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf4_tu( @@ -186,7 +186,7 @@ void test_vloxseg2ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf2_tu( @@ -199,7 +199,7 @@ void test_vloxseg2ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m1_tu( @@ -212,7 +212,7 @@ void test_vloxseg2ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m2_tu( @@ -225,7 +225,7 @@ void test_vloxseg2ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedof // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m4_tu( @@ -238,7 +238,7 @@ void test_vloxseg2ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedof // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf4_tu( @@ -251,7 +251,7 @@ void test_vloxseg2ei8_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedof // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf2_tu( @@ -264,7 +264,7 @@ void test_vloxseg2ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vloxseg2ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m2_tu( @@ -290,7 +290,7 @@ void test_vloxseg2ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m4_tu( @@ -303,7 +303,7 @@ void test_vloxseg2ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32mf2_tu( @@ -316,7 +316,7 @@ void test_vloxseg2ei8_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m1_tu( @@ -329,7 +329,7 @@ void test_vloxseg2ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m2_tu( @@ -342,7 +342,7 @@ void test_vloxseg2ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m4_tu( @@ -355,7 +355,7 @@ void test_vloxseg2ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m1_tu( @@ -368,7 +368,7 @@ void test_vloxseg2ei8_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m2_tu( @@ -381,7 +381,7 @@ void test_vloxseg2ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m4_tu( @@ -394,7 +394,7 @@ void test_vloxseg2ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf8_tu( @@ -407,7 +407,7 @@ void test_vloxseg2ei8_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf4_tu( @@ -420,7 +420,7 @@ void test_vloxseg2ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf2_tu( @@ -433,7 +433,7 @@ void test_vloxseg2ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m1_tu( @@ -446,7 +446,7 @@ void test_vloxseg2ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m2_tu( @@ -459,7 +459,7 @@ void test_vloxseg2ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maske // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m4_tu( @@ -472,7 +472,7 @@ void test_vloxseg2ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maske // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf4_tu( @@ -485,7 +485,7 @@ void test_vloxseg2ei8_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maske // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf2_tu( @@ -498,7 +498,7 @@ void test_vloxseg2ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m1_tu( @@ -511,7 +511,7 @@ void test_vloxseg2ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m2_tu( @@ -524,7 +524,7 @@ void test_vloxseg2ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m4_tu( @@ -537,7 +537,7 @@ void test_vloxseg2ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32mf2_tu( @@ -550,7 +550,7 @@ void test_vloxseg2ei8_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m1_tu( @@ -563,7 +563,7 @@ void test_vloxseg2ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m2_tu( @@ -576,7 +576,7 @@ void test_vloxseg2ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m4_tu( @@ -589,7 +589,7 @@ void test_vloxseg2ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vloxseg2ei8_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m2_tu( @@ -615,7 +615,7 @@ void test_vloxseg2ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m4_tu( @@ -628,7 +628,7 @@ void test_vloxseg2ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf4_tum( @@ -641,7 +641,7 @@ void test_vloxseg2ei8_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf2_tum( @@ -654,7 +654,7 @@ void test_vloxseg2ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m1_tum( @@ -667,7 +667,7 @@ void test_vloxseg2ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m2_tum( @@ -680,7 +680,7 @@ void test_vloxseg2ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m4_tum( @@ -693,7 +693,7 @@ void test_vloxseg2ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32mf2_tum( @@ -706,7 +706,7 @@ void test_vloxseg2ei8_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m1_tum( @@ -719,7 +719,7 @@ void test_vloxseg2ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m2_tum( @@ -732,7 +732,7 @@ void test_vloxseg2ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m4_tum( @@ -745,7 +745,7 @@ void test_vloxseg2ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m1_tum( @@ -758,7 +758,7 @@ void test_vloxseg2ei8_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m2_tum( @@ -771,7 +771,7 @@ void test_vloxseg2ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m4_tum( @@ -784,7 +784,7 @@ void test_vloxseg2ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf8_tum( @@ -797,7 +797,7 @@ void test_vloxseg2ei8_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf4_tum( @@ -810,7 +810,7 @@ void test_vloxseg2ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf2_tum( @@ -823,7 +823,7 @@ void test_vloxseg2ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m1_tum( @@ -836,7 +836,7 @@ void test_vloxseg2ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m2_tum( @@ -849,7 +849,7 @@ void test_vloxseg2ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m4_tum( @@ -862,7 +862,7 @@ void test_vloxseg2ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf4_tum( @@ -875,7 +875,7 @@ void test_vloxseg2ei8_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf2_tum( @@ -888,7 +888,7 @@ void test_vloxseg2ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vloxseg2ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m2_tum( @@ -914,7 +914,7 @@ void test_vloxseg2ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m4_tum( @@ -927,7 +927,7 @@ void test_vloxseg2ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32mf2_tum( @@ -940,7 +940,7 @@ void test_vloxseg2ei8_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m1_tum( @@ -953,7 +953,7 @@ void test_vloxseg2ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m2_tum( @@ -966,7 +966,7 @@ void test_vloxseg2ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m4_tum( @@ -979,7 +979,7 @@ void test_vloxseg2ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m1_tum( @@ -992,7 +992,7 @@ void test_vloxseg2ei8_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m2_tum( @@ -1005,7 +1005,7 @@ void test_vloxseg2ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m4_tum( @@ -1018,7 +1018,7 @@ void test_vloxseg2ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf8_tum( @@ -1031,7 +1031,7 @@ void test_vloxseg2ei8_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf4_tum( @@ -1044,7 +1044,7 @@ void test_vloxseg2ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf2_tum( @@ -1057,7 +1057,7 @@ void test_vloxseg2ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m1_tum( @@ -1070,7 +1070,7 @@ void test_vloxseg2ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m2_tum( @@ -1083,7 +1083,7 @@ void test_vloxseg2ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m4_tum( @@ -1096,7 +1096,7 @@ void test_vloxseg2ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf4_tum( @@ -1109,7 +1109,7 @@ void test_vloxseg2ei8_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf2_tum( @@ -1122,7 +1122,7 @@ void test_vloxseg2ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m1_tum( @@ -1135,7 +1135,7 @@ void test_vloxseg2ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m2_tum( @@ -1148,7 +1148,7 @@ void test_vloxseg2ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m4_tum( @@ -1161,7 +1161,7 @@ void test_vloxseg2ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32mf2_tum( @@ -1174,7 +1174,7 @@ void test_vloxseg2ei8_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m1_tum( @@ -1187,7 +1187,7 @@ void test_vloxseg2ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m2_tum( @@ -1200,7 +1200,7 @@ void test_vloxseg2ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m4_tum( @@ -1213,7 +1213,7 @@ void test_vloxseg2ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m1_tum( @@ -1226,7 +1226,7 @@ void test_vloxseg2ei8_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m2_tum( @@ -1239,7 +1239,7 @@ void test_vloxseg2ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m4_tum( @@ -1252,7 +1252,7 @@ void test_vloxseg2ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf4_tumu( @@ -1265,7 +1265,7 @@ void test_vloxseg2ei8_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf2_tumu( @@ -1278,7 +1278,7 @@ void test_vloxseg2ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m1_tumu( @@ -1291,7 +1291,7 @@ void test_vloxseg2ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m2_tumu( @@ -1304,7 +1304,7 @@ void test_vloxseg2ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m4_tumu( @@ -1317,7 +1317,7 @@ void test_vloxseg2ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32mf2_tumu( @@ -1330,7 +1330,7 @@ void test_vloxseg2ei8_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m1_tumu( @@ -1343,7 +1343,7 @@ void test_vloxseg2ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m2_tumu( @@ -1356,7 +1356,7 @@ void test_vloxseg2ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m4_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg2ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m1_tumu( @@ -1382,7 +1382,7 @@ void test_vloxseg2ei8_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m2_tumu( @@ -1395,7 +1395,7 @@ void test_vloxseg2ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m4_tumu( @@ -1408,7 +1408,7 @@ void test_vloxseg2ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf8_tumu( @@ -1421,7 +1421,7 @@ void test_vloxseg2ei8_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf4_tumu( @@ -1434,7 +1434,7 @@ void test_vloxseg2ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf2_tumu( @@ -1447,7 +1447,7 @@ void test_vloxseg2ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m1_tumu( @@ -1460,7 +1460,7 @@ void test_vloxseg2ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m2_tumu( @@ -1473,7 +1473,7 @@ void test_vloxseg2ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m4_tumu( @@ -1486,7 +1486,7 @@ void test_vloxseg2ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf4_tumu( @@ -1499,7 +1499,7 @@ void test_vloxseg2ei8_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf2_tumu( @@ -1512,7 +1512,7 @@ void test_vloxseg2ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m1_tumu( @@ -1525,7 +1525,7 @@ void test_vloxseg2ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m2_tumu( @@ -1538,7 +1538,7 @@ void test_vloxseg2ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m4_tumu( @@ -1551,7 +1551,7 @@ void test_vloxseg2ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vloxseg2ei8_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m1_tumu( @@ -1577,7 +1577,7 @@ void test_vloxseg2ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m2_tumu( @@ -1590,7 +1590,7 @@ void test_vloxseg2ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m4_tumu( @@ -1603,7 +1603,7 @@ void test_vloxseg2ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m1_tumu( @@ -1616,7 +1616,7 @@ void test_vloxseg2ei8_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m2_tumu( @@ -1629,7 +1629,7 @@ void test_vloxseg2ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m4_tumu( @@ -1642,7 +1642,7 @@ void test_vloxseg2ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf8_tumu( @@ -1655,7 +1655,7 @@ void test_vloxseg2ei8_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf4_tumu( @@ -1668,7 +1668,7 @@ void test_vloxseg2ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf2_tumu( @@ -1681,7 +1681,7 @@ void test_vloxseg2ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m1_tumu( @@ -1694,7 +1694,7 @@ void test_vloxseg2ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m2_tumu( @@ -1707,7 +1707,7 @@ void test_vloxseg2ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m4_tumu( @@ -1720,7 +1720,7 @@ void test_vloxseg2ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf4_tumu( @@ -1733,7 +1733,7 @@ void test_vloxseg2ei8_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf2_tumu( @@ -1746,7 +1746,7 @@ void test_vloxseg2ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m1_tumu( @@ -1759,7 +1759,7 @@ void test_vloxseg2ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m2_tumu( @@ -1772,7 +1772,7 @@ void test_vloxseg2ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m4_tumu( @@ -1785,7 +1785,7 @@ void test_vloxseg2ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32mf2_tumu( @@ -1798,7 +1798,7 @@ void test_vloxseg2ei8_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m1_tumu( @@ -1811,7 +1811,7 @@ void test_vloxseg2ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m2_tumu( @@ -1824,7 +1824,7 @@ void test_vloxseg2ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m4_tumu( @@ -1837,7 +1837,7 @@ void test_vloxseg2ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m1_tumu( @@ -1850,7 +1850,7 @@ void test_vloxseg2ei8_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m2_tumu( @@ -1863,7 +1863,7 @@ void test_vloxseg2ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m4_tumu( @@ -1876,7 +1876,7 @@ void test_vloxseg2ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf4_mu( @@ -1889,7 +1889,7 @@ void test_vloxseg2ei8_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16mf2_mu( @@ -1902,7 +1902,7 @@ void test_vloxseg2ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m1_mu( @@ -1915,7 +1915,7 @@ void test_vloxseg2ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m2_mu( @@ -1928,7 +1928,7 @@ void test_vloxseg2ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f16m4_mu( @@ -1941,7 +1941,7 @@ void test_vloxseg2ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vloxseg2ei8_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m1_mu( @@ -1967,7 +1967,7 @@ void test_vloxseg2ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m2_mu( @@ -1980,7 +1980,7 @@ void test_vloxseg2ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f32m4_mu( @@ -1993,7 +1993,7 @@ void test_vloxseg2ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m1_mu( @@ -2006,7 +2006,7 @@ void test_vloxseg2ei8_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m2_mu( @@ -2019,7 +2019,7 @@ void test_vloxseg2ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_f64m4_mu( @@ -2032,7 +2032,7 @@ void test_vloxseg2ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf8_mu( @@ -2045,7 +2045,7 @@ void test_vloxseg2ei8_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf4_mu( @@ -2058,7 +2058,7 @@ void test_vloxseg2ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8mf2_mu( @@ -2071,7 +2071,7 @@ void test_vloxseg2ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m1_mu( @@ -2084,7 +2084,7 @@ void test_vloxseg2ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m2_mu( @@ -2097,7 +2097,7 @@ void test_vloxseg2ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i8m4_mu( @@ -2110,7 +2110,7 @@ void test_vloxseg2ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf4_mu( @@ -2123,7 +2123,7 @@ void test_vloxseg2ei8_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16mf2_mu( @@ -2136,7 +2136,7 @@ void test_vloxseg2ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m1_mu( @@ -2149,7 +2149,7 @@ void test_vloxseg2ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m2_mu( @@ -2162,7 +2162,7 @@ void test_vloxseg2ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i16m4_mu( @@ -2175,7 +2175,7 @@ void test_vloxseg2ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32mf2_mu( @@ -2188,7 +2188,7 @@ void test_vloxseg2ei8_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m1_mu( @@ -2201,7 +2201,7 @@ void test_vloxseg2ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m2_mu( @@ -2214,7 +2214,7 @@ void test_vloxseg2ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i32m4_mu( @@ -2227,7 +2227,7 @@ void test_vloxseg2ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m1_mu( @@ -2240,7 +2240,7 @@ void test_vloxseg2ei8_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m2_mu( @@ -2253,7 +2253,7 @@ void test_vloxseg2ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_i64m4_mu( @@ -2266,7 +2266,7 @@ void test_vloxseg2ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf8_mu( @@ -2279,7 +2279,7 @@ void test_vloxseg2ei8_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf4_mu( @@ -2292,7 +2292,7 @@ void test_vloxseg2ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8mf2_mu( @@ -2305,7 +2305,7 @@ void test_vloxseg2ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m1_mu( @@ -2318,7 +2318,7 @@ void test_vloxseg2ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m2_mu( @@ -2331,7 +2331,7 @@ void test_vloxseg2ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u8m4_mu( @@ -2344,7 +2344,7 @@ void test_vloxseg2ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vloxseg2ei8_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf4_mu( @@ -2357,7 +2357,7 @@ void test_vloxseg2ei8_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, v // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16mf2_mu( @@ -2370,7 +2370,7 @@ void test_vloxseg2ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m1_mu( @@ -2383,7 +2383,7 @@ void test_vloxseg2ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m2_mu( @@ -2396,7 +2396,7 @@ void test_vloxseg2ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u16m4_mu( @@ -2409,7 +2409,7 @@ void test_vloxseg2ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg2ei8_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32mf2_mu( @@ -2422,7 +2422,7 @@ void test_vloxseg2ei8_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m1_mu( @@ -2435,7 +2435,7 @@ void test_vloxseg2ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m2_mu( @@ -2448,7 +2448,7 @@ void test_vloxseg2ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u32m4_mu( @@ -2461,7 +2461,7 @@ void test_vloxseg2ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg2ei8_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m1_mu( @@ -2474,7 +2474,7 @@ void test_vloxseg2ei8_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m2_mu( @@ -2487,7 +2487,7 @@ void test_vloxseg2ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg2ei8_v_u64m4_mu( @@ -2500,6 +2500,6 @@ void test_vloxseg2ei8_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vloxseg2ei8_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg2ei8_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vloxseg2ei8_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c index 699bf4c1ca4b20bba48244282e53e28c90a4da70..4c1bf1610faae275a2c1259496f79f81b1347673 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei16.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vloxseg3ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vloxseg3ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vloxseg3ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32mf2_tu( @@ -79,7 +79,7 @@ void test_vloxseg3ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m1_tu( @@ -94,7 +94,7 @@ void test_vloxseg3ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m2_tu( @@ -109,7 +109,7 @@ void test_vloxseg3ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m1_tu( @@ -124,7 +124,7 @@ void test_vloxseg3ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m2_tu( @@ -139,7 +139,7 @@ void test_vloxseg3ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf8_tu( @@ -154,7 +154,7 @@ void test_vloxseg3ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf4_tu( @@ -169,7 +169,7 @@ void test_vloxseg3ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf2_tu( @@ -184,7 +184,7 @@ void test_vloxseg3ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vloxseg3ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m2_tu( @@ -214,7 +214,7 @@ void test_vloxseg3ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf4_tu( @@ -229,7 +229,7 @@ void test_vloxseg3ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf2_tu( @@ -244,7 +244,7 @@ void test_vloxseg3ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m1_tu( @@ -259,7 +259,7 @@ void test_vloxseg3ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m2_tu( @@ -274,7 +274,7 @@ void test_vloxseg3ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32mf2_tu( @@ -289,7 +289,7 @@ void test_vloxseg3ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m1_tu( @@ -304,7 +304,7 @@ void test_vloxseg3ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m2_tu( @@ -319,7 +319,7 @@ void test_vloxseg3ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m1_tu( @@ -334,7 +334,7 @@ void test_vloxseg3ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m2_tu( @@ -349,7 +349,7 @@ void test_vloxseg3ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf8_tu( @@ -364,7 +364,7 @@ void test_vloxseg3ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf4_tu( @@ -379,7 +379,7 @@ void test_vloxseg3ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf2_tu( @@ -394,7 +394,7 @@ void test_vloxseg3ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m1_tu( @@ -409,7 +409,7 @@ void test_vloxseg3ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m2_tu( @@ -424,7 +424,7 @@ void test_vloxseg3ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf4_tu( @@ -439,7 +439,7 @@ void test_vloxseg3ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf2_tu( @@ -454,7 +454,7 @@ void test_vloxseg3ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m1_tu( @@ -469,7 +469,7 @@ void test_vloxseg3ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m2_tu( @@ -484,7 +484,7 @@ void test_vloxseg3ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32mf2_tu( @@ -499,7 +499,7 @@ void test_vloxseg3ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m1_tu( @@ -514,7 +514,7 @@ void test_vloxseg3ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m2_tu( @@ -529,7 +529,7 @@ void test_vloxseg3ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m1_tu( @@ -544,7 +544,7 @@ void test_vloxseg3ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m2_tu( @@ -559,7 +559,7 @@ void test_vloxseg3ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf4_tum( @@ -574,7 +574,7 @@ void test_vloxseg3ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf2_tum( @@ -589,7 +589,7 @@ void test_vloxseg3ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m1_tum( @@ -604,7 +604,7 @@ void test_vloxseg3ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m2_tum( @@ -619,7 +619,7 @@ void test_vloxseg3ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vloxseg3ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m1_tum( @@ -649,7 +649,7 @@ void test_vloxseg3ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m2_tum( @@ -664,7 +664,7 @@ void test_vloxseg3ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m1_tum( @@ -679,7 +679,7 @@ void test_vloxseg3ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m2_tum( @@ -694,7 +694,7 @@ void test_vloxseg3ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf8_tum( @@ -709,7 +709,7 @@ void test_vloxseg3ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf4_tum( @@ -724,7 +724,7 @@ void test_vloxseg3ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vloxseg3ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m1_tum( @@ -754,7 +754,7 @@ void test_vloxseg3ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m2_tum( @@ -769,7 +769,7 @@ void test_vloxseg3ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf4_tum( @@ -784,7 +784,7 @@ void test_vloxseg3ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf2_tum( @@ -799,7 +799,7 @@ void test_vloxseg3ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m1_tum( @@ -814,7 +814,7 @@ void test_vloxseg3ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m2_tum( @@ -829,7 +829,7 @@ void test_vloxseg3ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vloxseg3ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m1_tum( @@ -859,7 +859,7 @@ void test_vloxseg3ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m2_tum( @@ -874,7 +874,7 @@ void test_vloxseg3ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m1_tum( @@ -889,7 +889,7 @@ void test_vloxseg3ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m2_tum( @@ -904,7 +904,7 @@ void test_vloxseg3ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf8_tum( @@ -919,7 +919,7 @@ void test_vloxseg3ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf4_tum( @@ -934,7 +934,7 @@ void test_vloxseg3ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vloxseg3ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m1_tum( @@ -964,7 +964,7 @@ void test_vloxseg3ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m2_tum( @@ -979,7 +979,7 @@ void test_vloxseg3ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf4_tum( @@ -994,7 +994,7 @@ void test_vloxseg3ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf2_tum( @@ -1009,7 +1009,7 @@ void test_vloxseg3ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m1_tum( @@ -1024,7 +1024,7 @@ void test_vloxseg3ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m2_tum( @@ -1039,7 +1039,7 @@ void test_vloxseg3ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg3ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m1_tum( @@ -1069,7 +1069,7 @@ void test_vloxseg3ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m2_tum( @@ -1084,7 +1084,7 @@ void test_vloxseg3ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m1_tum( @@ -1099,7 +1099,7 @@ void test_vloxseg3ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m2_tum( @@ -1114,7 +1114,7 @@ void test_vloxseg3ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf4_tumu( @@ -1129,7 +1129,7 @@ void test_vloxseg3ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf2_tumu( @@ -1144,7 +1144,7 @@ void test_vloxseg3ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vloxseg3ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m2_tumu( @@ -1174,7 +1174,7 @@ void test_vloxseg3ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32mf2_tumu( @@ -1189,7 +1189,7 @@ void test_vloxseg3ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m1_tumu( @@ -1204,7 +1204,7 @@ void test_vloxseg3ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m2_tumu( @@ -1219,7 +1219,7 @@ void test_vloxseg3ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m1_tumu( @@ -1234,7 +1234,7 @@ void test_vloxseg3ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m2_tumu( @@ -1249,7 +1249,7 @@ void test_vloxseg3ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf8_tumu( @@ -1264,7 +1264,7 @@ void test_vloxseg3ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vloxseg3ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf2_tumu( @@ -1294,7 +1294,7 @@ void test_vloxseg3ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m1_tumu( @@ -1309,7 +1309,7 @@ void test_vloxseg3ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m2_tumu( @@ -1324,7 +1324,7 @@ void test_vloxseg3ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf4_tumu( @@ -1339,7 +1339,7 @@ void test_vloxseg3ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vloxseg3ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg3ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m2_tumu( @@ -1384,7 +1384,7 @@ void test_vloxseg3ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32mf2_tumu( @@ -1399,7 +1399,7 @@ void test_vloxseg3ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m1_tumu( @@ -1414,7 +1414,7 @@ void test_vloxseg3ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m2_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg3ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m1_tumu( @@ -1444,7 +1444,7 @@ void test_vloxseg3ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m2_tumu( @@ -1459,7 +1459,7 @@ void test_vloxseg3ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf8_tumu( @@ -1474,7 +1474,7 @@ void test_vloxseg3ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf4_tumu( @@ -1489,7 +1489,7 @@ void test_vloxseg3ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf2_tumu( @@ -1504,7 +1504,7 @@ void test_vloxseg3ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m1_tumu( @@ -1519,7 +1519,7 @@ void test_vloxseg3ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m2_tumu( @@ -1534,7 +1534,7 @@ void test_vloxseg3ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf4_tumu( @@ -1549,7 +1549,7 @@ void test_vloxseg3ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vloxseg3ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg3ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m2_tumu( @@ -1594,7 +1594,7 @@ void test_vloxseg3ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32mf2_tumu( @@ -1609,7 +1609,7 @@ void test_vloxseg3ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m1_tumu( @@ -1624,7 +1624,7 @@ void test_vloxseg3ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m2_tumu( @@ -1639,7 +1639,7 @@ void test_vloxseg3ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m1_tumu( @@ -1654,7 +1654,7 @@ void test_vloxseg3ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m2_tumu( @@ -1669,7 +1669,7 @@ void test_vloxseg3ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf4_mu( @@ -1684,7 +1684,7 @@ void test_vloxseg3ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16mf2_mu( @@ -1699,7 +1699,7 @@ void test_vloxseg3ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m1_mu( @@ -1714,7 +1714,7 @@ void test_vloxseg3ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f16m2_mu( @@ -1729,7 +1729,7 @@ void test_vloxseg3ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32mf2_mu( @@ -1744,7 +1744,7 @@ void test_vloxseg3ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m1_mu( @@ -1759,7 +1759,7 @@ void test_vloxseg3ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f32m2_mu( @@ -1774,7 +1774,7 @@ void test_vloxseg3ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m1_mu( @@ -1789,7 +1789,7 @@ void test_vloxseg3ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_f64m2_mu( @@ -1804,7 +1804,7 @@ void test_vloxseg3ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf8_mu( @@ -1819,7 +1819,7 @@ void test_vloxseg3ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf4_mu( @@ -1834,7 +1834,7 @@ void test_vloxseg3ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8mf2_mu( @@ -1849,7 +1849,7 @@ void test_vloxseg3ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m1_mu( @@ -1864,7 +1864,7 @@ void test_vloxseg3ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i8m2_mu( @@ -1879,7 +1879,7 @@ void test_vloxseg3ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf4_mu( @@ -1894,7 +1894,7 @@ void test_vloxseg3ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16mf2_mu( @@ -1909,7 +1909,7 @@ void test_vloxseg3ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m1_mu( @@ -1924,7 +1924,7 @@ void test_vloxseg3ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i16m2_mu( @@ -1939,7 +1939,7 @@ void test_vloxseg3ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vloxseg3ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m1_mu( @@ -1969,7 +1969,7 @@ void test_vloxseg3ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i32m2_mu( @@ -1984,7 +1984,7 @@ void test_vloxseg3ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m1_mu( @@ -1999,7 +1999,7 @@ void test_vloxseg3ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_i64m2_mu( @@ -2014,7 +2014,7 @@ void test_vloxseg3ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf8_mu( @@ -2029,7 +2029,7 @@ void test_vloxseg3ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf4_mu( @@ -2044,7 +2044,7 @@ void test_vloxseg3ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8mf2_mu( @@ -2059,7 +2059,7 @@ void test_vloxseg3ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m1_mu( @@ -2074,7 +2074,7 @@ void test_vloxseg3ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u8m2_mu( @@ -2089,7 +2089,7 @@ void test_vloxseg3ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg3ei16_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf4_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg3ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16mf2_mu( @@ -2119,7 +2119,7 @@ void test_vloxseg3ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m1_mu( @@ -2134,7 +2134,7 @@ void test_vloxseg3ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u16m2_mu( @@ -2149,7 +2149,7 @@ void test_vloxseg3ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg3ei16_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32mf2_mu( @@ -2164,7 +2164,7 @@ void test_vloxseg3ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m1_mu( @@ -2179,7 +2179,7 @@ void test_vloxseg3ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u32m2_mu( @@ -2194,7 +2194,7 @@ void test_vloxseg3ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg3ei16_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m1_mu( @@ -2209,7 +2209,7 @@ void test_vloxseg3ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei16_v_u64m2_mu( @@ -2224,6 +2224,6 @@ void test_vloxseg3ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei16_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg3ei16_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei16_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c index 56b53ad0269dfe2fa9897a8cad5e08cf9af125d6..caa9ac746ea547c3a742b8c7666397c33db953fe 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei32.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vloxseg3ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vloxseg3ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vloxseg3ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32mf2_tu( @@ -79,7 +79,7 @@ void test_vloxseg3ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m1_tu( @@ -94,7 +94,7 @@ void test_vloxseg3ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m2_tu( @@ -109,7 +109,7 @@ void test_vloxseg3ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m1_tu( @@ -124,7 +124,7 @@ void test_vloxseg3ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m2_tu( @@ -139,7 +139,7 @@ void test_vloxseg3ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf8_tu( @@ -154,7 +154,7 @@ void test_vloxseg3ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf4_tu( @@ -169,7 +169,7 @@ void test_vloxseg3ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf2_tu( @@ -184,7 +184,7 @@ void test_vloxseg3ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vloxseg3ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m2_tu( @@ -214,7 +214,7 @@ void test_vloxseg3ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf4_tu( @@ -229,7 +229,7 @@ void test_vloxseg3ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf2_tu( @@ -244,7 +244,7 @@ void test_vloxseg3ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m1_tu( @@ -259,7 +259,7 @@ void test_vloxseg3ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m2_tu( @@ -274,7 +274,7 @@ void test_vloxseg3ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32mf2_tu( @@ -289,7 +289,7 @@ void test_vloxseg3ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m1_tu( @@ -304,7 +304,7 @@ void test_vloxseg3ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m2_tu( @@ -319,7 +319,7 @@ void test_vloxseg3ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m1_tu( @@ -334,7 +334,7 @@ void test_vloxseg3ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m2_tu( @@ -349,7 +349,7 @@ void test_vloxseg3ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf8_tu( @@ -364,7 +364,7 @@ void test_vloxseg3ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf4_tu( @@ -379,7 +379,7 @@ void test_vloxseg3ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf2_tu( @@ -394,7 +394,7 @@ void test_vloxseg3ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m1_tu( @@ -409,7 +409,7 @@ void test_vloxseg3ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m2_tu( @@ -424,7 +424,7 @@ void test_vloxseg3ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf4_tu( @@ -439,7 +439,7 @@ void test_vloxseg3ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf2_tu( @@ -454,7 +454,7 @@ void test_vloxseg3ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m1_tu( @@ -469,7 +469,7 @@ void test_vloxseg3ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m2_tu( @@ -484,7 +484,7 @@ void test_vloxseg3ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32mf2_tu( @@ -499,7 +499,7 @@ void test_vloxseg3ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m1_tu( @@ -514,7 +514,7 @@ void test_vloxseg3ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m2_tu( @@ -529,7 +529,7 @@ void test_vloxseg3ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m1_tu( @@ -544,7 +544,7 @@ void test_vloxseg3ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m2_tu( @@ -559,7 +559,7 @@ void test_vloxseg3ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf4_tum( @@ -574,7 +574,7 @@ void test_vloxseg3ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf2_tum( @@ -589,7 +589,7 @@ void test_vloxseg3ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m1_tum( @@ -604,7 +604,7 @@ void test_vloxseg3ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m2_tum( @@ -619,7 +619,7 @@ void test_vloxseg3ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vloxseg3ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m1_tum( @@ -649,7 +649,7 @@ void test_vloxseg3ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m2_tum( @@ -664,7 +664,7 @@ void test_vloxseg3ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m1_tum( @@ -679,7 +679,7 @@ void test_vloxseg3ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m2_tum( @@ -694,7 +694,7 @@ void test_vloxseg3ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf8_tum( @@ -709,7 +709,7 @@ void test_vloxseg3ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf4_tum( @@ -724,7 +724,7 @@ void test_vloxseg3ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vloxseg3ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m1_tum( @@ -754,7 +754,7 @@ void test_vloxseg3ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m2_tum( @@ -769,7 +769,7 @@ void test_vloxseg3ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf4_tum( @@ -784,7 +784,7 @@ void test_vloxseg3ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf2_tum( @@ -799,7 +799,7 @@ void test_vloxseg3ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m1_tum( @@ -814,7 +814,7 @@ void test_vloxseg3ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m2_tum( @@ -829,7 +829,7 @@ void test_vloxseg3ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vloxseg3ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m1_tum( @@ -859,7 +859,7 @@ void test_vloxseg3ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m2_tum( @@ -874,7 +874,7 @@ void test_vloxseg3ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m1_tum( @@ -889,7 +889,7 @@ void test_vloxseg3ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m2_tum( @@ -904,7 +904,7 @@ void test_vloxseg3ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf8_tum( @@ -919,7 +919,7 @@ void test_vloxseg3ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf4_tum( @@ -934,7 +934,7 @@ void test_vloxseg3ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vloxseg3ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m1_tum( @@ -964,7 +964,7 @@ void test_vloxseg3ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m2_tum( @@ -979,7 +979,7 @@ void test_vloxseg3ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf4_tum( @@ -994,7 +994,7 @@ void test_vloxseg3ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf2_tum( @@ -1009,7 +1009,7 @@ void test_vloxseg3ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m1_tum( @@ -1024,7 +1024,7 @@ void test_vloxseg3ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m2_tum( @@ -1039,7 +1039,7 @@ void test_vloxseg3ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg3ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m1_tum( @@ -1069,7 +1069,7 @@ void test_vloxseg3ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m2_tum( @@ -1084,7 +1084,7 @@ void test_vloxseg3ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m1_tum( @@ -1099,7 +1099,7 @@ void test_vloxseg3ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m2_tum( @@ -1114,7 +1114,7 @@ void test_vloxseg3ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf4_tumu( @@ -1129,7 +1129,7 @@ void test_vloxseg3ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf2_tumu( @@ -1144,7 +1144,7 @@ void test_vloxseg3ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vloxseg3ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m2_tumu( @@ -1174,7 +1174,7 @@ void test_vloxseg3ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32mf2_tumu( @@ -1189,7 +1189,7 @@ void test_vloxseg3ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m1_tumu( @@ -1204,7 +1204,7 @@ void test_vloxseg3ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m2_tumu( @@ -1219,7 +1219,7 @@ void test_vloxseg3ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m1_tumu( @@ -1234,7 +1234,7 @@ void test_vloxseg3ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m2_tumu( @@ -1249,7 +1249,7 @@ void test_vloxseg3ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf8_tumu( @@ -1264,7 +1264,7 @@ void test_vloxseg3ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vloxseg3ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf2_tumu( @@ -1294,7 +1294,7 @@ void test_vloxseg3ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m1_tumu( @@ -1309,7 +1309,7 @@ void test_vloxseg3ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m2_tumu( @@ -1324,7 +1324,7 @@ void test_vloxseg3ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf4_tumu( @@ -1339,7 +1339,7 @@ void test_vloxseg3ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vloxseg3ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg3ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m2_tumu( @@ -1384,7 +1384,7 @@ void test_vloxseg3ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32mf2_tumu( @@ -1399,7 +1399,7 @@ void test_vloxseg3ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m1_tumu( @@ -1414,7 +1414,7 @@ void test_vloxseg3ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m2_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg3ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m1_tumu( @@ -1444,7 +1444,7 @@ void test_vloxseg3ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m2_tumu( @@ -1459,7 +1459,7 @@ void test_vloxseg3ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf8_tumu( @@ -1474,7 +1474,7 @@ void test_vloxseg3ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf4_tumu( @@ -1489,7 +1489,7 @@ void test_vloxseg3ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf2_tumu( @@ -1504,7 +1504,7 @@ void test_vloxseg3ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m1_tumu( @@ -1519,7 +1519,7 @@ void test_vloxseg3ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m2_tumu( @@ -1534,7 +1534,7 @@ void test_vloxseg3ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf4_tumu( @@ -1549,7 +1549,7 @@ void test_vloxseg3ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vloxseg3ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg3ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m2_tumu( @@ -1594,7 +1594,7 @@ void test_vloxseg3ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32mf2_tumu( @@ -1609,7 +1609,7 @@ void test_vloxseg3ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m1_tumu( @@ -1624,7 +1624,7 @@ void test_vloxseg3ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m2_tumu( @@ -1639,7 +1639,7 @@ void test_vloxseg3ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m1_tumu( @@ -1654,7 +1654,7 @@ void test_vloxseg3ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m2_tumu( @@ -1669,7 +1669,7 @@ void test_vloxseg3ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf4_mu( @@ -1684,7 +1684,7 @@ void test_vloxseg3ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16mf2_mu( @@ -1699,7 +1699,7 @@ void test_vloxseg3ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m1_mu( @@ -1714,7 +1714,7 @@ void test_vloxseg3ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f16m2_mu( @@ -1729,7 +1729,7 @@ void test_vloxseg3ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32mf2_mu( @@ -1744,7 +1744,7 @@ void test_vloxseg3ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m1_mu( @@ -1759,7 +1759,7 @@ void test_vloxseg3ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f32m2_mu( @@ -1774,7 +1774,7 @@ void test_vloxseg3ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m1_mu( @@ -1789,7 +1789,7 @@ void test_vloxseg3ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_f64m2_mu( @@ -1804,7 +1804,7 @@ void test_vloxseg3ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf8_mu( @@ -1819,7 +1819,7 @@ void test_vloxseg3ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf4_mu( @@ -1834,7 +1834,7 @@ void test_vloxseg3ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8mf2_mu( @@ -1849,7 +1849,7 @@ void test_vloxseg3ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m1_mu( @@ -1864,7 +1864,7 @@ void test_vloxseg3ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i8m2_mu( @@ -1879,7 +1879,7 @@ void test_vloxseg3ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf4_mu( @@ -1894,7 +1894,7 @@ void test_vloxseg3ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16mf2_mu( @@ -1909,7 +1909,7 @@ void test_vloxseg3ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m1_mu( @@ -1924,7 +1924,7 @@ void test_vloxseg3ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i16m2_mu( @@ -1939,7 +1939,7 @@ void test_vloxseg3ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vloxseg3ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m1_mu( @@ -1969,7 +1969,7 @@ void test_vloxseg3ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i32m2_mu( @@ -1984,7 +1984,7 @@ void test_vloxseg3ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m1_mu( @@ -1999,7 +1999,7 @@ void test_vloxseg3ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_i64m2_mu( @@ -2014,7 +2014,7 @@ void test_vloxseg3ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf8_mu( @@ -2029,7 +2029,7 @@ void test_vloxseg3ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf4_mu( @@ -2044,7 +2044,7 @@ void test_vloxseg3ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8mf2_mu( @@ -2059,7 +2059,7 @@ void test_vloxseg3ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m1_mu( @@ -2074,7 +2074,7 @@ void test_vloxseg3ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u8m2_mu( @@ -2089,7 +2089,7 @@ void test_vloxseg3ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg3ei32_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf4_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg3ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16mf2_mu( @@ -2119,7 +2119,7 @@ void test_vloxseg3ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m1_mu( @@ -2134,7 +2134,7 @@ void test_vloxseg3ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u16m2_mu( @@ -2149,7 +2149,7 @@ void test_vloxseg3ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg3ei32_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32mf2_mu( @@ -2164,7 +2164,7 @@ void test_vloxseg3ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m1_mu( @@ -2179,7 +2179,7 @@ void test_vloxseg3ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u32m2_mu( @@ -2194,7 +2194,7 @@ void test_vloxseg3ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg3ei32_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m1_mu( @@ -2209,7 +2209,7 @@ void test_vloxseg3ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei32_v_u64m2_mu( @@ -2224,6 +2224,6 @@ void test_vloxseg3ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei32_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg3ei32_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei32_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c index 1fde250eb294e4a8677e0b7330b67aa875069db0..96747594a4c5e872b0309ab2db5ff8c12b9b66a6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei64.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vloxseg3ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vloxseg3ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vloxseg3ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32mf2_tu( @@ -79,7 +79,7 @@ void test_vloxseg3ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m1_tu( @@ -94,7 +94,7 @@ void test_vloxseg3ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m2_tu( @@ -109,7 +109,7 @@ void test_vloxseg3ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m1_tu( @@ -124,7 +124,7 @@ void test_vloxseg3ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m2_tu( @@ -139,7 +139,7 @@ void test_vloxseg3ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf8_tu( @@ -154,7 +154,7 @@ void test_vloxseg3ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf4_tu( @@ -169,7 +169,7 @@ void test_vloxseg3ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf2_tu( @@ -184,7 +184,7 @@ void test_vloxseg3ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vloxseg3ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf4_tu( @@ -214,7 +214,7 @@ void test_vloxseg3ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf2_tu( @@ -229,7 +229,7 @@ void test_vloxseg3ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m1_tu( @@ -244,7 +244,7 @@ void test_vloxseg3ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m2_tu( @@ -259,7 +259,7 @@ void test_vloxseg3ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32mf2_tu( @@ -274,7 +274,7 @@ void test_vloxseg3ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vloxseg3ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m2_tu( @@ -304,7 +304,7 @@ void test_vloxseg3ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m1_tu( @@ -319,7 +319,7 @@ void test_vloxseg3ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m2_tu( @@ -334,7 +334,7 @@ void test_vloxseg3ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf8_tu( @@ -349,7 +349,7 @@ void test_vloxseg3ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf4_tu( @@ -364,7 +364,7 @@ void test_vloxseg3ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf2_tu( @@ -379,7 +379,7 @@ void test_vloxseg3ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8m1_tu( @@ -394,7 +394,7 @@ void test_vloxseg3ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf4_tu( @@ -409,7 +409,7 @@ void test_vloxseg3ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf2_tu( @@ -424,7 +424,7 @@ void test_vloxseg3ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m1_tu( @@ -439,7 +439,7 @@ void test_vloxseg3ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m2_tu( @@ -454,7 +454,7 @@ void test_vloxseg3ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32mf2_tu( @@ -469,7 +469,7 @@ void test_vloxseg3ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m1_tu( @@ -484,7 +484,7 @@ void test_vloxseg3ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m2_tu( @@ -499,7 +499,7 @@ void test_vloxseg3ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m1_tu( @@ -514,7 +514,7 @@ void test_vloxseg3ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m2_tu( @@ -529,7 +529,7 @@ void test_vloxseg3ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf4_tum( @@ -544,7 +544,7 @@ void test_vloxseg3ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf2_tum( @@ -559,7 +559,7 @@ void test_vloxseg3ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m1_tum( @@ -574,7 +574,7 @@ void test_vloxseg3ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m2_tum( @@ -589,7 +589,7 @@ void test_vloxseg3ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32mf2_tum( @@ -604,7 +604,7 @@ void test_vloxseg3ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m1_tum( @@ -619,7 +619,7 @@ void test_vloxseg3ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m2_tum( @@ -634,7 +634,7 @@ void test_vloxseg3ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m1_tum( @@ -649,7 +649,7 @@ void test_vloxseg3ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m2_tum( @@ -664,7 +664,7 @@ void test_vloxseg3ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf8_tum( @@ -679,7 +679,7 @@ void test_vloxseg3ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf4_tum( @@ -694,7 +694,7 @@ void test_vloxseg3ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf2_tum( @@ -709,7 +709,7 @@ void test_vloxseg3ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8m1_tum( @@ -724,7 +724,7 @@ void test_vloxseg3ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf4_tum( @@ -739,7 +739,7 @@ void test_vloxseg3ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf2_tum( @@ -754,7 +754,7 @@ void test_vloxseg3ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m1_tum( @@ -769,7 +769,7 @@ void test_vloxseg3ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m2_tum( @@ -784,7 +784,7 @@ void test_vloxseg3ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32mf2_tum( @@ -799,7 +799,7 @@ void test_vloxseg3ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m1_tum( @@ -814,7 +814,7 @@ void test_vloxseg3ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m2_tum( @@ -829,7 +829,7 @@ void test_vloxseg3ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m1_tum( @@ -844,7 +844,7 @@ void test_vloxseg3ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m2_tum( @@ -859,7 +859,7 @@ void test_vloxseg3ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf8_tum( @@ -874,7 +874,7 @@ void test_vloxseg3ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf4_tum( @@ -889,7 +889,7 @@ void test_vloxseg3ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf2_tum( @@ -904,7 +904,7 @@ void test_vloxseg3ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8m1_tum( @@ -919,7 +919,7 @@ void test_vloxseg3ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf4_tum( @@ -934,7 +934,7 @@ void test_vloxseg3ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf2_tum( @@ -949,7 +949,7 @@ void test_vloxseg3ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m1_tum( @@ -964,7 +964,7 @@ void test_vloxseg3ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m2_tum( @@ -979,7 +979,7 @@ void test_vloxseg3ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32mf2_tum( @@ -994,7 +994,7 @@ void test_vloxseg3ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m1_tum( @@ -1009,7 +1009,7 @@ void test_vloxseg3ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m2_tum( @@ -1024,7 +1024,7 @@ void test_vloxseg3ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m1_tum( @@ -1039,7 +1039,7 @@ void test_vloxseg3ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m2_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg3ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf4_tumu( @@ -1069,7 +1069,7 @@ void test_vloxseg3ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf2_tumu( @@ -1084,7 +1084,7 @@ void test_vloxseg3ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m1_tumu( @@ -1099,7 +1099,7 @@ void test_vloxseg3ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m2_tumu( @@ -1114,7 +1114,7 @@ void test_vloxseg3ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32mf2_tumu( @@ -1129,7 +1129,7 @@ void test_vloxseg3ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m1_tumu( @@ -1144,7 +1144,7 @@ void test_vloxseg3ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m2_tumu( @@ -1159,7 +1159,7 @@ void test_vloxseg3ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m1_tumu( @@ -1174,7 +1174,7 @@ void test_vloxseg3ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m2_tumu( @@ -1189,7 +1189,7 @@ void test_vloxseg3ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf8_tumu( @@ -1204,7 +1204,7 @@ void test_vloxseg3ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf4_tumu( @@ -1219,7 +1219,7 @@ void test_vloxseg3ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf2_tumu( @@ -1234,7 +1234,7 @@ void test_vloxseg3ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8m1_tumu( @@ -1249,7 +1249,7 @@ void test_vloxseg3ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vloxseg3ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf2_tumu( @@ -1279,7 +1279,7 @@ void test_vloxseg3ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m1_tumu( @@ -1294,7 +1294,7 @@ void test_vloxseg3ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m2_tumu( @@ -1309,7 +1309,7 @@ void test_vloxseg3ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32mf2_tumu( @@ -1324,7 +1324,7 @@ void test_vloxseg3ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m1_tumu( @@ -1339,7 +1339,7 @@ void test_vloxseg3ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m2_tumu( @@ -1354,7 +1354,7 @@ void test_vloxseg3ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m1_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg3ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m2_tumu( @@ -1384,7 +1384,7 @@ void test_vloxseg3ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf8_tumu( @@ -1399,7 +1399,7 @@ void test_vloxseg3ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf4_tumu( @@ -1414,7 +1414,7 @@ void test_vloxseg3ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf2_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg3ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8m1_tumu( @@ -1444,7 +1444,7 @@ void test_vloxseg3ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf4_tumu( @@ -1459,7 +1459,7 @@ void test_vloxseg3ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf2_tumu( @@ -1474,7 +1474,7 @@ void test_vloxseg3ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m1_tumu( @@ -1489,7 +1489,7 @@ void test_vloxseg3ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m2_tumu( @@ -1504,7 +1504,7 @@ void test_vloxseg3ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32mf2_tumu( @@ -1519,7 +1519,7 @@ void test_vloxseg3ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m1_tumu( @@ -1534,7 +1534,7 @@ void test_vloxseg3ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m2_tumu( @@ -1549,7 +1549,7 @@ void test_vloxseg3ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m1_tumu( @@ -1564,7 +1564,7 @@ void test_vloxseg3ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m2_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg3ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf4_mu( @@ -1594,7 +1594,7 @@ void test_vloxseg3ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16mf2_mu( @@ -1609,7 +1609,7 @@ void test_vloxseg3ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m1_mu( @@ -1624,7 +1624,7 @@ void test_vloxseg3ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f16m2_mu( @@ -1639,7 +1639,7 @@ void test_vloxseg3ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32mf2_mu( @@ -1654,7 +1654,7 @@ void test_vloxseg3ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m1_mu( @@ -1669,7 +1669,7 @@ void test_vloxseg3ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f32m2_mu( @@ -1684,7 +1684,7 @@ void test_vloxseg3ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m1_mu( @@ -1699,7 +1699,7 @@ void test_vloxseg3ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_f64m2_mu( @@ -1714,7 +1714,7 @@ void test_vloxseg3ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf8_mu( @@ -1729,7 +1729,7 @@ void test_vloxseg3ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf4_mu( @@ -1744,7 +1744,7 @@ void test_vloxseg3ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8mf2_mu( @@ -1759,7 +1759,7 @@ void test_vloxseg3ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i8m1_mu( @@ -1774,7 +1774,7 @@ void test_vloxseg3ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf4_mu( @@ -1789,7 +1789,7 @@ void test_vloxseg3ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16mf2_mu( @@ -1804,7 +1804,7 @@ void test_vloxseg3ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m1_mu( @@ -1819,7 +1819,7 @@ void test_vloxseg3ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i16m2_mu( @@ -1834,7 +1834,7 @@ void test_vloxseg3ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32mf2_mu( @@ -1849,7 +1849,7 @@ void test_vloxseg3ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m1_mu( @@ -1864,7 +1864,7 @@ void test_vloxseg3ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i32m2_mu( @@ -1879,7 +1879,7 @@ void test_vloxseg3ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m1_mu( @@ -1894,7 +1894,7 @@ void test_vloxseg3ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_i64m2_mu( @@ -1909,7 +1909,7 @@ void test_vloxseg3ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf8_mu( @@ -1924,7 +1924,7 @@ void test_vloxseg3ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf4_mu( @@ -1939,7 +1939,7 @@ void test_vloxseg3ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8mf2_mu( @@ -1954,7 +1954,7 @@ void test_vloxseg3ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u8m1_mu( @@ -1969,7 +1969,7 @@ void test_vloxseg3ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf4_mu( @@ -1984,7 +1984,7 @@ void test_vloxseg3ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16mf2_mu( @@ -1999,7 +1999,7 @@ void test_vloxseg3ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m1_mu( @@ -2014,7 +2014,7 @@ void test_vloxseg3ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u16m2_mu( @@ -2029,7 +2029,7 @@ void test_vloxseg3ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg3ei64_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32mf2_mu( @@ -2044,7 +2044,7 @@ void test_vloxseg3ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m1_mu( @@ -2059,7 +2059,7 @@ void test_vloxseg3ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u32m2_mu( @@ -2074,7 +2074,7 @@ void test_vloxseg3ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg3ei64_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m1_mu( @@ -2089,7 +2089,7 @@ void test_vloxseg3ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei64_v_u64m2_mu( @@ -2104,6 +2104,6 @@ void test_vloxseg3ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg3ei64_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei64_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c index 858eee7724aa9edde30764a4b1678abfe6ce1d53..b38fc15c7eca107c9c34871b51aa77b3f9b8c2ac 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg3ei8.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vloxseg3ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vloxseg3ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vloxseg3ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32mf2_tu( @@ -79,7 +79,7 @@ void test_vloxseg3ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m1_tu( @@ -94,7 +94,7 @@ void test_vloxseg3ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m2_tu( @@ -109,7 +109,7 @@ void test_vloxseg3ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m1_tu( @@ -124,7 +124,7 @@ void test_vloxseg3ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m2_tu( @@ -139,7 +139,7 @@ void test_vloxseg3ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf8_tu( @@ -154,7 +154,7 @@ void test_vloxseg3ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf4_tu( @@ -169,7 +169,7 @@ void test_vloxseg3ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf2_tu( @@ -184,7 +184,7 @@ void test_vloxseg3ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vloxseg3ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m2_tu( @@ -214,7 +214,7 @@ void test_vloxseg3ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf4_tu( @@ -229,7 +229,7 @@ void test_vloxseg3ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf2_tu( @@ -244,7 +244,7 @@ void test_vloxseg3ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m1_tu( @@ -259,7 +259,7 @@ void test_vloxseg3ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m2_tu( @@ -274,7 +274,7 @@ void test_vloxseg3ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32mf2_tu( @@ -289,7 +289,7 @@ void test_vloxseg3ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m1_tu( @@ -304,7 +304,7 @@ void test_vloxseg3ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m2_tu( @@ -319,7 +319,7 @@ void test_vloxseg3ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m1_tu( @@ -334,7 +334,7 @@ void test_vloxseg3ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m2_tu( @@ -349,7 +349,7 @@ void test_vloxseg3ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf8_tu( @@ -364,7 +364,7 @@ void test_vloxseg3ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf4_tu( @@ -379,7 +379,7 @@ void test_vloxseg3ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf2_tu( @@ -394,7 +394,7 @@ void test_vloxseg3ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m1_tu( @@ -409,7 +409,7 @@ void test_vloxseg3ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m2_tu( @@ -424,7 +424,7 @@ void test_vloxseg3ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf4_tu( @@ -439,7 +439,7 @@ void test_vloxseg3ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf2_tu( @@ -454,7 +454,7 @@ void test_vloxseg3ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m1_tu( @@ -469,7 +469,7 @@ void test_vloxseg3ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m2_tu( @@ -484,7 +484,7 @@ void test_vloxseg3ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32mf2_tu( @@ -499,7 +499,7 @@ void test_vloxseg3ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m1_tu( @@ -514,7 +514,7 @@ void test_vloxseg3ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m2_tu( @@ -529,7 +529,7 @@ void test_vloxseg3ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m1_tu( @@ -544,7 +544,7 @@ void test_vloxseg3ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m2_tu( @@ -559,7 +559,7 @@ void test_vloxseg3ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf4_tum( @@ -574,7 +574,7 @@ void test_vloxseg3ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf2_tum( @@ -589,7 +589,7 @@ void test_vloxseg3ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m1_tum( @@ -604,7 +604,7 @@ void test_vloxseg3ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m2_tum( @@ -619,7 +619,7 @@ void test_vloxseg3ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vloxseg3ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m1_tum( @@ -649,7 +649,7 @@ void test_vloxseg3ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m2_tum( @@ -664,7 +664,7 @@ void test_vloxseg3ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m1_tum( @@ -679,7 +679,7 @@ void test_vloxseg3ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m2_tum( @@ -694,7 +694,7 @@ void test_vloxseg3ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf8_tum( @@ -709,7 +709,7 @@ void test_vloxseg3ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf4_tum( @@ -724,7 +724,7 @@ void test_vloxseg3ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vloxseg3ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m1_tum( @@ -754,7 +754,7 @@ void test_vloxseg3ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m2_tum( @@ -769,7 +769,7 @@ void test_vloxseg3ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf4_tum( @@ -784,7 +784,7 @@ void test_vloxseg3ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf2_tum( @@ -799,7 +799,7 @@ void test_vloxseg3ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m1_tum( @@ -814,7 +814,7 @@ void test_vloxseg3ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m2_tum( @@ -829,7 +829,7 @@ void test_vloxseg3ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vloxseg3ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m1_tum( @@ -859,7 +859,7 @@ void test_vloxseg3ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m2_tum( @@ -874,7 +874,7 @@ void test_vloxseg3ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m1_tum( @@ -889,7 +889,7 @@ void test_vloxseg3ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m2_tum( @@ -904,7 +904,7 @@ void test_vloxseg3ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf8_tum( @@ -919,7 +919,7 @@ void test_vloxseg3ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf4_tum( @@ -934,7 +934,7 @@ void test_vloxseg3ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vloxseg3ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m1_tum( @@ -964,7 +964,7 @@ void test_vloxseg3ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m2_tum( @@ -979,7 +979,7 @@ void test_vloxseg3ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf4_tum( @@ -994,7 +994,7 @@ void test_vloxseg3ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf2_tum( @@ -1009,7 +1009,7 @@ void test_vloxseg3ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m1_tum( @@ -1024,7 +1024,7 @@ void test_vloxseg3ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m2_tum( @@ -1039,7 +1039,7 @@ void test_vloxseg3ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg3ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m1_tum( @@ -1069,7 +1069,7 @@ void test_vloxseg3ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m2_tum( @@ -1084,7 +1084,7 @@ void test_vloxseg3ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m1_tum( @@ -1099,7 +1099,7 @@ void test_vloxseg3ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m2_tum( @@ -1114,7 +1114,7 @@ void test_vloxseg3ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf4_tumu( @@ -1129,7 +1129,7 @@ void test_vloxseg3ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf2_tumu( @@ -1144,7 +1144,7 @@ void test_vloxseg3ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vloxseg3ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m2_tumu( @@ -1174,7 +1174,7 @@ void test_vloxseg3ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32mf2_tumu( @@ -1189,7 +1189,7 @@ void test_vloxseg3ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m1_tumu( @@ -1204,7 +1204,7 @@ void test_vloxseg3ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m2_tumu( @@ -1219,7 +1219,7 @@ void test_vloxseg3ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m1_tumu( @@ -1234,7 +1234,7 @@ void test_vloxseg3ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m2_tumu( @@ -1249,7 +1249,7 @@ void test_vloxseg3ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf8_tumu( @@ -1264,7 +1264,7 @@ void test_vloxseg3ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vloxseg3ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf2_tumu( @@ -1294,7 +1294,7 @@ void test_vloxseg3ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m1_tumu( @@ -1309,7 +1309,7 @@ void test_vloxseg3ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m2_tumu( @@ -1324,7 +1324,7 @@ void test_vloxseg3ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf4_tumu( @@ -1339,7 +1339,7 @@ void test_vloxseg3ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vloxseg3ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg3ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m2_tumu( @@ -1384,7 +1384,7 @@ void test_vloxseg3ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32mf2_tumu( @@ -1399,7 +1399,7 @@ void test_vloxseg3ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m1_tumu( @@ -1414,7 +1414,7 @@ void test_vloxseg3ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m2_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg3ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m1_tumu( @@ -1444,7 +1444,7 @@ void test_vloxseg3ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m2_tumu( @@ -1459,7 +1459,7 @@ void test_vloxseg3ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf8_tumu( @@ -1474,7 +1474,7 @@ void test_vloxseg3ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf4_tumu( @@ -1489,7 +1489,7 @@ void test_vloxseg3ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf2_tumu( @@ -1504,7 +1504,7 @@ void test_vloxseg3ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m1_tumu( @@ -1519,7 +1519,7 @@ void test_vloxseg3ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m2_tumu( @@ -1534,7 +1534,7 @@ void test_vloxseg3ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf4_tumu( @@ -1549,7 +1549,7 @@ void test_vloxseg3ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vloxseg3ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg3ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m2_tumu( @@ -1594,7 +1594,7 @@ void test_vloxseg3ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32mf2_tumu( @@ -1609,7 +1609,7 @@ void test_vloxseg3ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m1_tumu( @@ -1624,7 +1624,7 @@ void test_vloxseg3ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m2_tumu( @@ -1639,7 +1639,7 @@ void test_vloxseg3ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m1_tumu( @@ -1654,7 +1654,7 @@ void test_vloxseg3ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m2_tumu( @@ -1669,7 +1669,7 @@ void test_vloxseg3ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf4_mu( @@ -1684,7 +1684,7 @@ void test_vloxseg3ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16mf2_mu( @@ -1699,7 +1699,7 @@ void test_vloxseg3ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m1_mu( @@ -1714,7 +1714,7 @@ void test_vloxseg3ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f16m2_mu( @@ -1729,7 +1729,7 @@ void test_vloxseg3ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32mf2_mu( @@ -1744,7 +1744,7 @@ void test_vloxseg3ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m1_mu( @@ -1759,7 +1759,7 @@ void test_vloxseg3ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f32m2_mu( @@ -1774,7 +1774,7 @@ void test_vloxseg3ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m1_mu( @@ -1789,7 +1789,7 @@ void test_vloxseg3ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_f64m2_mu( @@ -1804,7 +1804,7 @@ void test_vloxseg3ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf8_mu( @@ -1819,7 +1819,7 @@ void test_vloxseg3ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf4_mu( @@ -1834,7 +1834,7 @@ void test_vloxseg3ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8mf2_mu( @@ -1849,7 +1849,7 @@ void test_vloxseg3ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m1_mu( @@ -1864,7 +1864,7 @@ void test_vloxseg3ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i8m2_mu( @@ -1879,7 +1879,7 @@ void test_vloxseg3ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf4_mu( @@ -1894,7 +1894,7 @@ void test_vloxseg3ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16mf2_mu( @@ -1909,7 +1909,7 @@ void test_vloxseg3ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m1_mu( @@ -1924,7 +1924,7 @@ void test_vloxseg3ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i16m2_mu( @@ -1939,7 +1939,7 @@ void test_vloxseg3ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vloxseg3ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m1_mu( @@ -1969,7 +1969,7 @@ void test_vloxseg3ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i32m2_mu( @@ -1984,7 +1984,7 @@ void test_vloxseg3ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m1_mu( @@ -1999,7 +1999,7 @@ void test_vloxseg3ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_i64m2_mu( @@ -2014,7 +2014,7 @@ void test_vloxseg3ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf8_mu( @@ -2029,7 +2029,7 @@ void test_vloxseg3ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf4_mu( @@ -2044,7 +2044,7 @@ void test_vloxseg3ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8mf2_mu( @@ -2059,7 +2059,7 @@ void test_vloxseg3ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m1_mu( @@ -2074,7 +2074,7 @@ void test_vloxseg3ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u8m2_mu( @@ -2089,7 +2089,7 @@ void test_vloxseg3ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg3ei8_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf4_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg3ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16mf2_mu( @@ -2119,7 +2119,7 @@ void test_vloxseg3ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m1_mu( @@ -2134,7 +2134,7 @@ void test_vloxseg3ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u16m2_mu( @@ -2149,7 +2149,7 @@ void test_vloxseg3ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg3ei8_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32mf2_mu( @@ -2164,7 +2164,7 @@ void test_vloxseg3ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m1_mu( @@ -2179,7 +2179,7 @@ void test_vloxseg3ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u32m2_mu( @@ -2194,7 +2194,7 @@ void test_vloxseg3ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg3ei8_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m1_mu( @@ -2209,7 +2209,7 @@ void test_vloxseg3ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg3ei8_v_u64m2_mu( @@ -2224,6 +2224,6 @@ void test_vloxseg3ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg3ei8_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg3ei8_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vloxseg3ei8_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c index 9266a675e6eaffecfc2d364b1d00c8bb77bc5dd6..4d004b8eb5947d5c5775f41c0d1861846ecdecd4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei16.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vloxseg4ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vloxseg4ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vloxseg4ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32mf2_tu( @@ -89,7 +89,7 @@ void test_vloxseg4ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m1_tu( @@ -106,7 +106,7 @@ void test_vloxseg4ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m2_tu( @@ -123,7 +123,7 @@ void test_vloxseg4ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m1_tu( @@ -140,7 +140,7 @@ void test_vloxseg4ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m2_tu( @@ -157,7 +157,7 @@ void test_vloxseg4ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf8_tu( @@ -174,7 +174,7 @@ void test_vloxseg4ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf4_tu( @@ -191,7 +191,7 @@ void test_vloxseg4ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf2_tu( @@ -208,7 +208,7 @@ void test_vloxseg4ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m1_tu( @@ -225,7 +225,7 @@ void test_vloxseg4ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m2_tu( @@ -242,7 +242,7 @@ void test_vloxseg4ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf4_tu( @@ -259,7 +259,7 @@ void test_vloxseg4ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf2_tu( @@ -276,7 +276,7 @@ void test_vloxseg4ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m1_tu( @@ -293,7 +293,7 @@ void test_vloxseg4ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m2_tu( @@ -310,7 +310,7 @@ void test_vloxseg4ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32mf2_tu( @@ -327,7 +327,7 @@ void test_vloxseg4ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m1_tu( @@ -344,7 +344,7 @@ void test_vloxseg4ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m2_tu( @@ -361,7 +361,7 @@ void test_vloxseg4ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m1_tu( @@ -378,7 +378,7 @@ void test_vloxseg4ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m2_tu( @@ -395,7 +395,7 @@ void test_vloxseg4ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf8_tu( @@ -412,7 +412,7 @@ void test_vloxseg4ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf4_tu( @@ -429,7 +429,7 @@ void test_vloxseg4ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf2_tu( @@ -446,7 +446,7 @@ void test_vloxseg4ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m1_tu( @@ -463,7 +463,7 @@ void test_vloxseg4ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m2_tu( @@ -480,7 +480,7 @@ void test_vloxseg4ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf4_tu( @@ -497,7 +497,7 @@ void test_vloxseg4ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf2_tu( @@ -514,7 +514,7 @@ void test_vloxseg4ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m1_tu( @@ -531,7 +531,7 @@ void test_vloxseg4ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m2_tu( @@ -548,7 +548,7 @@ void test_vloxseg4ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32mf2_tu( @@ -565,7 +565,7 @@ void test_vloxseg4ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m1_tu( @@ -582,7 +582,7 @@ void test_vloxseg4ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m2_tu( @@ -599,7 +599,7 @@ void test_vloxseg4ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m1_tu( @@ -616,7 +616,7 @@ void test_vloxseg4ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m2_tu( @@ -633,7 +633,7 @@ void test_vloxseg4ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf4_tum( @@ -650,7 +650,7 @@ void test_vloxseg4ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf2_tum( @@ -667,7 +667,7 @@ void test_vloxseg4ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m1_tum( @@ -684,7 +684,7 @@ void test_vloxseg4ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m2_tum( @@ -701,7 +701,7 @@ void test_vloxseg4ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32mf2_tum( @@ -718,7 +718,7 @@ void test_vloxseg4ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m1_tum( @@ -735,7 +735,7 @@ void test_vloxseg4ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m2_tum( @@ -752,7 +752,7 @@ void test_vloxseg4ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m1_tum( @@ -769,7 +769,7 @@ void test_vloxseg4ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m2_tum( @@ -786,7 +786,7 @@ void test_vloxseg4ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf8_tum( @@ -803,7 +803,7 @@ void test_vloxseg4ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf4_tum( @@ -820,7 +820,7 @@ void test_vloxseg4ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf2_tum( @@ -837,7 +837,7 @@ void test_vloxseg4ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m1_tum( @@ -854,7 +854,7 @@ void test_vloxseg4ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m2_tum( @@ -871,7 +871,7 @@ void test_vloxseg4ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf4_tum( @@ -888,7 +888,7 @@ void test_vloxseg4ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf2_tum( @@ -905,7 +905,7 @@ void test_vloxseg4ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m1_tum( @@ -922,7 +922,7 @@ void test_vloxseg4ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m2_tum( @@ -939,7 +939,7 @@ void test_vloxseg4ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32mf2_tum( @@ -956,7 +956,7 @@ void test_vloxseg4ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m1_tum( @@ -973,7 +973,7 @@ void test_vloxseg4ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m2_tum( @@ -990,7 +990,7 @@ void test_vloxseg4ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m1_tum( @@ -1007,7 +1007,7 @@ void test_vloxseg4ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m2_tum( @@ -1024,7 +1024,7 @@ void test_vloxseg4ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf8_tum( @@ -1041,7 +1041,7 @@ void test_vloxseg4ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf4_tum( @@ -1058,7 +1058,7 @@ void test_vloxseg4ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf2_tum( @@ -1075,7 +1075,7 @@ void test_vloxseg4ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m1_tum( @@ -1092,7 +1092,7 @@ void test_vloxseg4ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m2_tum( @@ -1109,7 +1109,7 @@ void test_vloxseg4ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf4_tum( @@ -1126,7 +1126,7 @@ void test_vloxseg4ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf2_tum( @@ -1143,7 +1143,7 @@ void test_vloxseg4ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m1_tum( @@ -1160,7 +1160,7 @@ void test_vloxseg4ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m2_tum( @@ -1177,7 +1177,7 @@ void test_vloxseg4ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32mf2_tum( @@ -1194,7 +1194,7 @@ void test_vloxseg4ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m1_tum( @@ -1211,7 +1211,7 @@ void test_vloxseg4ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m2_tum( @@ -1228,7 +1228,7 @@ void test_vloxseg4ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m1_tum( @@ -1245,7 +1245,7 @@ void test_vloxseg4ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m2_tum( @@ -1262,7 +1262,7 @@ void test_vloxseg4ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vloxseg4ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf2_tumu( @@ -1296,7 +1296,7 @@ void test_vloxseg4ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m1_tumu( @@ -1313,7 +1313,7 @@ void test_vloxseg4ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m2_tumu( @@ -1330,7 +1330,7 @@ void test_vloxseg4ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32mf2_tumu( @@ -1347,7 +1347,7 @@ void test_vloxseg4ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m1_tumu( @@ -1364,7 +1364,7 @@ void test_vloxseg4ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m2_tumu( @@ -1381,7 +1381,7 @@ void test_vloxseg4ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m1_tumu( @@ -1398,7 +1398,7 @@ void test_vloxseg4ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m2_tumu( @@ -1415,7 +1415,7 @@ void test_vloxseg4ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf8_tumu( @@ -1432,7 +1432,7 @@ void test_vloxseg4ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf4_tumu( @@ -1449,7 +1449,7 @@ void test_vloxseg4ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf2_tumu( @@ -1466,7 +1466,7 @@ void test_vloxseg4ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m1_tumu( @@ -1483,7 +1483,7 @@ void test_vloxseg4ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m2_tumu( @@ -1500,7 +1500,7 @@ void test_vloxseg4ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf4_tumu( @@ -1517,7 +1517,7 @@ void test_vloxseg4ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf2_tumu( @@ -1534,7 +1534,7 @@ void test_vloxseg4ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m1_tumu( @@ -1551,7 +1551,7 @@ void test_vloxseg4ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m2_tumu( @@ -1568,7 +1568,7 @@ void test_vloxseg4ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32mf2_tumu( @@ -1585,7 +1585,7 @@ void test_vloxseg4ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m1_tumu( @@ -1602,7 +1602,7 @@ void test_vloxseg4ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m2_tumu( @@ -1619,7 +1619,7 @@ void test_vloxseg4ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m1_tumu( @@ -1636,7 +1636,7 @@ void test_vloxseg4ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m2_tumu( @@ -1653,7 +1653,7 @@ void test_vloxseg4ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf8_tumu( @@ -1670,7 +1670,7 @@ void test_vloxseg4ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf4_tumu( @@ -1687,7 +1687,7 @@ void test_vloxseg4ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf2_tumu( @@ -1704,7 +1704,7 @@ void test_vloxseg4ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m1_tumu( @@ -1721,7 +1721,7 @@ void test_vloxseg4ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m2_tumu( @@ -1738,7 +1738,7 @@ void test_vloxseg4ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf4_tumu( @@ -1755,7 +1755,7 @@ void test_vloxseg4ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf2_tumu( @@ -1772,7 +1772,7 @@ void test_vloxseg4ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m1_tumu( @@ -1789,7 +1789,7 @@ void test_vloxseg4ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m2_tumu( @@ -1806,7 +1806,7 @@ void test_vloxseg4ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32mf2_tumu( @@ -1823,7 +1823,7 @@ void test_vloxseg4ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m1_tumu( @@ -1840,7 +1840,7 @@ void test_vloxseg4ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m2_tumu( @@ -1857,7 +1857,7 @@ void test_vloxseg4ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m1_tumu( @@ -1874,7 +1874,7 @@ void test_vloxseg4ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m2_tumu( @@ -1891,7 +1891,7 @@ void test_vloxseg4ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf4_mu( @@ -1908,7 +1908,7 @@ void test_vloxseg4ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16mf2_mu( @@ -1925,7 +1925,7 @@ void test_vloxseg4ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m1_mu( @@ -1942,7 +1942,7 @@ void test_vloxseg4ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f16m2_mu( @@ -1959,7 +1959,7 @@ void test_vloxseg4ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32mf2_mu( @@ -1976,7 +1976,7 @@ void test_vloxseg4ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m1_mu( @@ -1993,7 +1993,7 @@ void test_vloxseg4ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f32m2_mu( @@ -2010,7 +2010,7 @@ void test_vloxseg4ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m1_mu( @@ -2027,7 +2027,7 @@ void test_vloxseg4ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_f64m2_mu( @@ -2044,7 +2044,7 @@ void test_vloxseg4ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf8_mu( @@ -2061,7 +2061,7 @@ void test_vloxseg4ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf4_mu( @@ -2078,7 +2078,7 @@ void test_vloxseg4ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8mf2_mu( @@ -2095,7 +2095,7 @@ void test_vloxseg4ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m1_mu( @@ -2112,7 +2112,7 @@ void test_vloxseg4ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i8m2_mu( @@ -2129,7 +2129,7 @@ void test_vloxseg4ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf4_mu( @@ -2146,7 +2146,7 @@ void test_vloxseg4ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16mf2_mu( @@ -2163,7 +2163,7 @@ void test_vloxseg4ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m1_mu( @@ -2180,7 +2180,7 @@ void test_vloxseg4ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i16m2_mu( @@ -2197,7 +2197,7 @@ void test_vloxseg4ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32mf2_mu( @@ -2214,7 +2214,7 @@ void test_vloxseg4ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m1_mu( @@ -2231,7 +2231,7 @@ void test_vloxseg4ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i32m2_mu( @@ -2248,7 +2248,7 @@ void test_vloxseg4ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m1_mu( @@ -2265,7 +2265,7 @@ void test_vloxseg4ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_i64m2_mu( @@ -2282,7 +2282,7 @@ void test_vloxseg4ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf8_mu( @@ -2299,7 +2299,7 @@ void test_vloxseg4ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf4_mu( @@ -2316,7 +2316,7 @@ void test_vloxseg4ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8mf2_mu( @@ -2333,7 +2333,7 @@ void test_vloxseg4ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m1_mu( @@ -2350,7 +2350,7 @@ void test_vloxseg4ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u8m2_mu( @@ -2367,7 +2367,7 @@ void test_vloxseg4ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vloxseg4ei16_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf4_mu( @@ -2384,7 +2384,7 @@ void test_vloxseg4ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16mf2_mu( @@ -2401,7 +2401,7 @@ void test_vloxseg4ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m1_mu( @@ -2418,7 +2418,7 @@ void test_vloxseg4ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u16m2_mu( @@ -2435,7 +2435,7 @@ void test_vloxseg4ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg4ei16_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32mf2_mu( @@ -2452,7 +2452,7 @@ void test_vloxseg4ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m1_mu( @@ -2469,7 +2469,7 @@ void test_vloxseg4ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u32m2_mu( @@ -2486,7 +2486,7 @@ void test_vloxseg4ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg4ei16_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m1_mu( @@ -2503,7 +2503,7 @@ void test_vloxseg4ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei16_v_u64m2_mu( @@ -2520,6 +2520,6 @@ void test_vloxseg4ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei16_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg4ei16_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei16_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c index 60254f337bd2c49a8328663928548bac552d7a23..a12fa8d2f4f2d86c603ded926eea4e5b1ff2e856 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei32.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vloxseg4ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vloxseg4ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vloxseg4ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32mf2_tu( @@ -89,7 +89,7 @@ void test_vloxseg4ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m1_tu( @@ -106,7 +106,7 @@ void test_vloxseg4ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m2_tu( @@ -123,7 +123,7 @@ void test_vloxseg4ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m1_tu( @@ -140,7 +140,7 @@ void test_vloxseg4ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m2_tu( @@ -157,7 +157,7 @@ void test_vloxseg4ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf8_tu( @@ -174,7 +174,7 @@ void test_vloxseg4ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf4_tu( @@ -191,7 +191,7 @@ void test_vloxseg4ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf2_tu( @@ -208,7 +208,7 @@ void test_vloxseg4ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m1_tu( @@ -225,7 +225,7 @@ void test_vloxseg4ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m2_tu( @@ -242,7 +242,7 @@ void test_vloxseg4ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf4_tu( @@ -259,7 +259,7 @@ void test_vloxseg4ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf2_tu( @@ -276,7 +276,7 @@ void test_vloxseg4ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m1_tu( @@ -293,7 +293,7 @@ void test_vloxseg4ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m2_tu( @@ -310,7 +310,7 @@ void test_vloxseg4ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32mf2_tu( @@ -327,7 +327,7 @@ void test_vloxseg4ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m1_tu( @@ -344,7 +344,7 @@ void test_vloxseg4ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m2_tu( @@ -361,7 +361,7 @@ void test_vloxseg4ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m1_tu( @@ -378,7 +378,7 @@ void test_vloxseg4ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m2_tu( @@ -395,7 +395,7 @@ void test_vloxseg4ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf8_tu( @@ -412,7 +412,7 @@ void test_vloxseg4ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf4_tu( @@ -429,7 +429,7 @@ void test_vloxseg4ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf2_tu( @@ -446,7 +446,7 @@ void test_vloxseg4ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m1_tu( @@ -463,7 +463,7 @@ void test_vloxseg4ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m2_tu( @@ -480,7 +480,7 @@ void test_vloxseg4ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf4_tu( @@ -497,7 +497,7 @@ void test_vloxseg4ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf2_tu( @@ -514,7 +514,7 @@ void test_vloxseg4ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m1_tu( @@ -531,7 +531,7 @@ void test_vloxseg4ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m2_tu( @@ -548,7 +548,7 @@ void test_vloxseg4ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32mf2_tu( @@ -565,7 +565,7 @@ void test_vloxseg4ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m1_tu( @@ -582,7 +582,7 @@ void test_vloxseg4ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m2_tu( @@ -599,7 +599,7 @@ void test_vloxseg4ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m1_tu( @@ -616,7 +616,7 @@ void test_vloxseg4ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m2_tu( @@ -633,7 +633,7 @@ void test_vloxseg4ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf4_tum( @@ -650,7 +650,7 @@ void test_vloxseg4ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf2_tum( @@ -667,7 +667,7 @@ void test_vloxseg4ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m1_tum( @@ -684,7 +684,7 @@ void test_vloxseg4ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m2_tum( @@ -701,7 +701,7 @@ void test_vloxseg4ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32mf2_tum( @@ -718,7 +718,7 @@ void test_vloxseg4ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m1_tum( @@ -735,7 +735,7 @@ void test_vloxseg4ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m2_tum( @@ -752,7 +752,7 @@ void test_vloxseg4ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m1_tum( @@ -769,7 +769,7 @@ void test_vloxseg4ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m2_tum( @@ -786,7 +786,7 @@ void test_vloxseg4ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf8_tum( @@ -803,7 +803,7 @@ void test_vloxseg4ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf4_tum( @@ -820,7 +820,7 @@ void test_vloxseg4ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf2_tum( @@ -837,7 +837,7 @@ void test_vloxseg4ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m1_tum( @@ -854,7 +854,7 @@ void test_vloxseg4ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m2_tum( @@ -871,7 +871,7 @@ void test_vloxseg4ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf4_tum( @@ -888,7 +888,7 @@ void test_vloxseg4ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf2_tum( @@ -905,7 +905,7 @@ void test_vloxseg4ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m1_tum( @@ -922,7 +922,7 @@ void test_vloxseg4ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m2_tum( @@ -939,7 +939,7 @@ void test_vloxseg4ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32mf2_tum( @@ -956,7 +956,7 @@ void test_vloxseg4ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m1_tum( @@ -973,7 +973,7 @@ void test_vloxseg4ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m2_tum( @@ -990,7 +990,7 @@ void test_vloxseg4ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m1_tum( @@ -1007,7 +1007,7 @@ void test_vloxseg4ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m2_tum( @@ -1024,7 +1024,7 @@ void test_vloxseg4ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf8_tum( @@ -1041,7 +1041,7 @@ void test_vloxseg4ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf4_tum( @@ -1058,7 +1058,7 @@ void test_vloxseg4ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf2_tum( @@ -1075,7 +1075,7 @@ void test_vloxseg4ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m1_tum( @@ -1092,7 +1092,7 @@ void test_vloxseg4ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m2_tum( @@ -1109,7 +1109,7 @@ void test_vloxseg4ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf4_tum( @@ -1126,7 +1126,7 @@ void test_vloxseg4ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf2_tum( @@ -1143,7 +1143,7 @@ void test_vloxseg4ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m1_tum( @@ -1160,7 +1160,7 @@ void test_vloxseg4ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m2_tum( @@ -1177,7 +1177,7 @@ void test_vloxseg4ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32mf2_tum( @@ -1194,7 +1194,7 @@ void test_vloxseg4ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m1_tum( @@ -1211,7 +1211,7 @@ void test_vloxseg4ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m2_tum( @@ -1228,7 +1228,7 @@ void test_vloxseg4ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m1_tum( @@ -1245,7 +1245,7 @@ void test_vloxseg4ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m2_tum( @@ -1262,7 +1262,7 @@ void test_vloxseg4ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vloxseg4ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf2_tumu( @@ -1296,7 +1296,7 @@ void test_vloxseg4ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m1_tumu( @@ -1313,7 +1313,7 @@ void test_vloxseg4ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m2_tumu( @@ -1330,7 +1330,7 @@ void test_vloxseg4ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32mf2_tumu( @@ -1347,7 +1347,7 @@ void test_vloxseg4ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m1_tumu( @@ -1364,7 +1364,7 @@ void test_vloxseg4ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m2_tumu( @@ -1381,7 +1381,7 @@ void test_vloxseg4ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m1_tumu( @@ -1398,7 +1398,7 @@ void test_vloxseg4ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m2_tumu( @@ -1415,7 +1415,7 @@ void test_vloxseg4ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf8_tumu( @@ -1432,7 +1432,7 @@ void test_vloxseg4ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf4_tumu( @@ -1449,7 +1449,7 @@ void test_vloxseg4ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf2_tumu( @@ -1466,7 +1466,7 @@ void test_vloxseg4ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m1_tumu( @@ -1483,7 +1483,7 @@ void test_vloxseg4ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m2_tumu( @@ -1500,7 +1500,7 @@ void test_vloxseg4ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf4_tumu( @@ -1517,7 +1517,7 @@ void test_vloxseg4ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf2_tumu( @@ -1534,7 +1534,7 @@ void test_vloxseg4ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m1_tumu( @@ -1551,7 +1551,7 @@ void test_vloxseg4ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m2_tumu( @@ -1568,7 +1568,7 @@ void test_vloxseg4ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32mf2_tumu( @@ -1585,7 +1585,7 @@ void test_vloxseg4ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m1_tumu( @@ -1602,7 +1602,7 @@ void test_vloxseg4ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m2_tumu( @@ -1619,7 +1619,7 @@ void test_vloxseg4ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m1_tumu( @@ -1636,7 +1636,7 @@ void test_vloxseg4ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m2_tumu( @@ -1653,7 +1653,7 @@ void test_vloxseg4ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf8_tumu( @@ -1670,7 +1670,7 @@ void test_vloxseg4ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf4_tumu( @@ -1687,7 +1687,7 @@ void test_vloxseg4ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf2_tumu( @@ -1704,7 +1704,7 @@ void test_vloxseg4ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m1_tumu( @@ -1721,7 +1721,7 @@ void test_vloxseg4ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m2_tumu( @@ -1738,7 +1738,7 @@ void test_vloxseg4ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf4_tumu( @@ -1755,7 +1755,7 @@ void test_vloxseg4ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf2_tumu( @@ -1772,7 +1772,7 @@ void test_vloxseg4ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m1_tumu( @@ -1789,7 +1789,7 @@ void test_vloxseg4ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m2_tumu( @@ -1806,7 +1806,7 @@ void test_vloxseg4ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32mf2_tumu( @@ -1823,7 +1823,7 @@ void test_vloxseg4ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m1_tumu( @@ -1840,7 +1840,7 @@ void test_vloxseg4ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m2_tumu( @@ -1857,7 +1857,7 @@ void test_vloxseg4ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m1_tumu( @@ -1874,7 +1874,7 @@ void test_vloxseg4ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m2_tumu( @@ -1891,7 +1891,7 @@ void test_vloxseg4ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf4_mu( @@ -1908,7 +1908,7 @@ void test_vloxseg4ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16mf2_mu( @@ -1925,7 +1925,7 @@ void test_vloxseg4ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m1_mu( @@ -1942,7 +1942,7 @@ void test_vloxseg4ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f16m2_mu( @@ -1959,7 +1959,7 @@ void test_vloxseg4ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32mf2_mu( @@ -1976,7 +1976,7 @@ void test_vloxseg4ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m1_mu( @@ -1993,7 +1993,7 @@ void test_vloxseg4ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f32m2_mu( @@ -2010,7 +2010,7 @@ void test_vloxseg4ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m1_mu( @@ -2027,7 +2027,7 @@ void test_vloxseg4ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_f64m2_mu( @@ -2044,7 +2044,7 @@ void test_vloxseg4ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf8_mu( @@ -2061,7 +2061,7 @@ void test_vloxseg4ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf4_mu( @@ -2078,7 +2078,7 @@ void test_vloxseg4ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8mf2_mu( @@ -2095,7 +2095,7 @@ void test_vloxseg4ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m1_mu( @@ -2112,7 +2112,7 @@ void test_vloxseg4ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i8m2_mu( @@ -2129,7 +2129,7 @@ void test_vloxseg4ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf4_mu( @@ -2146,7 +2146,7 @@ void test_vloxseg4ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16mf2_mu( @@ -2163,7 +2163,7 @@ void test_vloxseg4ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m1_mu( @@ -2180,7 +2180,7 @@ void test_vloxseg4ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i16m2_mu( @@ -2197,7 +2197,7 @@ void test_vloxseg4ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32mf2_mu( @@ -2214,7 +2214,7 @@ void test_vloxseg4ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m1_mu( @@ -2231,7 +2231,7 @@ void test_vloxseg4ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i32m2_mu( @@ -2248,7 +2248,7 @@ void test_vloxseg4ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m1_mu( @@ -2265,7 +2265,7 @@ void test_vloxseg4ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_i64m2_mu( @@ -2282,7 +2282,7 @@ void test_vloxseg4ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf8_mu( @@ -2299,7 +2299,7 @@ void test_vloxseg4ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf4_mu( @@ -2316,7 +2316,7 @@ void test_vloxseg4ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8mf2_mu( @@ -2333,7 +2333,7 @@ void test_vloxseg4ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m1_mu( @@ -2350,7 +2350,7 @@ void test_vloxseg4ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u8m2_mu( @@ -2367,7 +2367,7 @@ void test_vloxseg4ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vloxseg4ei32_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf4_mu( @@ -2384,7 +2384,7 @@ void test_vloxseg4ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16mf2_mu( @@ -2401,7 +2401,7 @@ void test_vloxseg4ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m1_mu( @@ -2418,7 +2418,7 @@ void test_vloxseg4ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u16m2_mu( @@ -2435,7 +2435,7 @@ void test_vloxseg4ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg4ei32_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32mf2_mu( @@ -2452,7 +2452,7 @@ void test_vloxseg4ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m1_mu( @@ -2469,7 +2469,7 @@ void test_vloxseg4ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u32m2_mu( @@ -2486,7 +2486,7 @@ void test_vloxseg4ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg4ei32_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m1_mu( @@ -2503,7 +2503,7 @@ void test_vloxseg4ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei32_v_u64m2_mu( @@ -2520,6 +2520,6 @@ void test_vloxseg4ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei32_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg4ei32_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei32_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c index e4944fd92c7eca5343eda6397c7747ed9a1fcd9a..ec0012b2643afe2956fd61f6423ec45bd4731432 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei64.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vloxseg4ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vloxseg4ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vloxseg4ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32mf2_tu( @@ -89,7 +89,7 @@ void test_vloxseg4ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m1_tu( @@ -106,7 +106,7 @@ void test_vloxseg4ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m2_tu( @@ -123,7 +123,7 @@ void test_vloxseg4ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m1_tu( @@ -140,7 +140,7 @@ void test_vloxseg4ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m2_tu( @@ -157,7 +157,7 @@ void test_vloxseg4ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf8_tu( @@ -174,7 +174,7 @@ void test_vloxseg4ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf4_tu( @@ -191,7 +191,7 @@ void test_vloxseg4ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf2_tu( @@ -208,7 +208,7 @@ void test_vloxseg4ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8m1_tu( @@ -225,7 +225,7 @@ void test_vloxseg4ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf4_tu( @@ -242,7 +242,7 @@ void test_vloxseg4ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf2_tu( @@ -259,7 +259,7 @@ void test_vloxseg4ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m1_tu( @@ -276,7 +276,7 @@ void test_vloxseg4ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m2_tu( @@ -293,7 +293,7 @@ void test_vloxseg4ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32mf2_tu( @@ -310,7 +310,7 @@ void test_vloxseg4ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m1_tu( @@ -327,7 +327,7 @@ void test_vloxseg4ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m2_tu( @@ -344,7 +344,7 @@ void test_vloxseg4ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m1_tu( @@ -361,7 +361,7 @@ void test_vloxseg4ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m2_tu( @@ -378,7 +378,7 @@ void test_vloxseg4ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vloxseg4ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf4_tu( @@ -412,7 +412,7 @@ void test_vloxseg4ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf2_tu( @@ -429,7 +429,7 @@ void test_vloxseg4ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8m1_tu( @@ -446,7 +446,7 @@ void test_vloxseg4ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf4_tu( @@ -463,7 +463,7 @@ void test_vloxseg4ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf2_tu( @@ -480,7 +480,7 @@ void test_vloxseg4ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m1_tu( @@ -497,7 +497,7 @@ void test_vloxseg4ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m2_tu( @@ -514,7 +514,7 @@ void test_vloxseg4ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32mf2_tu( @@ -531,7 +531,7 @@ void test_vloxseg4ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m1_tu( @@ -548,7 +548,7 @@ void test_vloxseg4ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m2_tu( @@ -565,7 +565,7 @@ void test_vloxseg4ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m1_tu( @@ -582,7 +582,7 @@ void test_vloxseg4ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m2_tu( @@ -599,7 +599,7 @@ void test_vloxseg4ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf4_tum( @@ -616,7 +616,7 @@ void test_vloxseg4ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf2_tum( @@ -633,7 +633,7 @@ void test_vloxseg4ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m1_tum( @@ -650,7 +650,7 @@ void test_vloxseg4ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m2_tum( @@ -667,7 +667,7 @@ void test_vloxseg4ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32mf2_tum( @@ -684,7 +684,7 @@ void test_vloxseg4ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m1_tum( @@ -701,7 +701,7 @@ void test_vloxseg4ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m2_tum( @@ -718,7 +718,7 @@ void test_vloxseg4ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m1_tum( @@ -735,7 +735,7 @@ void test_vloxseg4ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m2_tum( @@ -752,7 +752,7 @@ void test_vloxseg4ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf8_tum( @@ -769,7 +769,7 @@ void test_vloxseg4ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vloxseg4ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf2_tum( @@ -803,7 +803,7 @@ void test_vloxseg4ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8m1_tum( @@ -820,7 +820,7 @@ void test_vloxseg4ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf4_tum( @@ -837,7 +837,7 @@ void test_vloxseg4ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf2_tum( @@ -854,7 +854,7 @@ void test_vloxseg4ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m1_tum( @@ -871,7 +871,7 @@ void test_vloxseg4ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m2_tum( @@ -888,7 +888,7 @@ void test_vloxseg4ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32mf2_tum( @@ -905,7 +905,7 @@ void test_vloxseg4ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m1_tum( @@ -922,7 +922,7 @@ void test_vloxseg4ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m2_tum( @@ -939,7 +939,7 @@ void test_vloxseg4ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m1_tum( @@ -956,7 +956,7 @@ void test_vloxseg4ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m2_tum( @@ -973,7 +973,7 @@ void test_vloxseg4ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf8_tum( @@ -990,7 +990,7 @@ void test_vloxseg4ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf4_tum( @@ -1007,7 +1007,7 @@ void test_vloxseg4ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf2_tum( @@ -1024,7 +1024,7 @@ void test_vloxseg4ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8m1_tum( @@ -1041,7 +1041,7 @@ void test_vloxseg4ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf4_tum( @@ -1058,7 +1058,7 @@ void test_vloxseg4ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf2_tum( @@ -1075,7 +1075,7 @@ void test_vloxseg4ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m1_tum( @@ -1092,7 +1092,7 @@ void test_vloxseg4ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m2_tum( @@ -1109,7 +1109,7 @@ void test_vloxseg4ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32mf2_tum( @@ -1126,7 +1126,7 @@ void test_vloxseg4ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m1_tum( @@ -1143,7 +1143,7 @@ void test_vloxseg4ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m2_tum( @@ -1160,7 +1160,7 @@ void test_vloxseg4ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m1_tum( @@ -1177,7 +1177,7 @@ void test_vloxseg4ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m2_tum( @@ -1194,7 +1194,7 @@ void test_vloxseg4ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf4_tumu( @@ -1211,7 +1211,7 @@ void test_vloxseg4ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf2_tumu( @@ -1228,7 +1228,7 @@ void test_vloxseg4ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m1_tumu( @@ -1245,7 +1245,7 @@ void test_vloxseg4ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m2_tumu( @@ -1262,7 +1262,7 @@ void test_vloxseg4ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32mf2_tumu( @@ -1279,7 +1279,7 @@ void test_vloxseg4ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m1_tumu( @@ -1296,7 +1296,7 @@ void test_vloxseg4ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m2_tumu( @@ -1313,7 +1313,7 @@ void test_vloxseg4ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m1_tumu( @@ -1330,7 +1330,7 @@ void test_vloxseg4ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m2_tumu( @@ -1347,7 +1347,7 @@ void test_vloxseg4ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf8_tumu( @@ -1364,7 +1364,7 @@ void test_vloxseg4ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf4_tumu( @@ -1381,7 +1381,7 @@ void test_vloxseg4ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf2_tumu( @@ -1398,7 +1398,7 @@ void test_vloxseg4ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8m1_tumu( @@ -1415,7 +1415,7 @@ void test_vloxseg4ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf4_tumu( @@ -1432,7 +1432,7 @@ void test_vloxseg4ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf2_tumu( @@ -1449,7 +1449,7 @@ void test_vloxseg4ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m1_tumu( @@ -1466,7 +1466,7 @@ void test_vloxseg4ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m2_tumu( @@ -1483,7 +1483,7 @@ void test_vloxseg4ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32mf2_tumu( @@ -1500,7 +1500,7 @@ void test_vloxseg4ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m1_tumu( @@ -1517,7 +1517,7 @@ void test_vloxseg4ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m2_tumu( @@ -1534,7 +1534,7 @@ void test_vloxseg4ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m1_tumu( @@ -1551,7 +1551,7 @@ void test_vloxseg4ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m2_tumu( @@ -1568,7 +1568,7 @@ void test_vloxseg4ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf8_tumu( @@ -1585,7 +1585,7 @@ void test_vloxseg4ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf4_tumu( @@ -1602,7 +1602,7 @@ void test_vloxseg4ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf2_tumu( @@ -1619,7 +1619,7 @@ void test_vloxseg4ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8m1_tumu( @@ -1636,7 +1636,7 @@ void test_vloxseg4ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf4_tumu( @@ -1653,7 +1653,7 @@ void test_vloxseg4ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf2_tumu( @@ -1670,7 +1670,7 @@ void test_vloxseg4ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m1_tumu( @@ -1687,7 +1687,7 @@ void test_vloxseg4ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m2_tumu( @@ -1704,7 +1704,7 @@ void test_vloxseg4ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32mf2_tumu( @@ -1721,7 +1721,7 @@ void test_vloxseg4ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m1_tumu( @@ -1738,7 +1738,7 @@ void test_vloxseg4ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m2_tumu( @@ -1755,7 +1755,7 @@ void test_vloxseg4ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m1_tumu( @@ -1772,7 +1772,7 @@ void test_vloxseg4ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m2_tumu( @@ -1789,7 +1789,7 @@ void test_vloxseg4ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf4_mu( @@ -1806,7 +1806,7 @@ void test_vloxseg4ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16mf2_mu( @@ -1823,7 +1823,7 @@ void test_vloxseg4ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m1_mu( @@ -1840,7 +1840,7 @@ void test_vloxseg4ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f16m2_mu( @@ -1857,7 +1857,7 @@ void test_vloxseg4ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32mf2_mu( @@ -1874,7 +1874,7 @@ void test_vloxseg4ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m1_mu( @@ -1891,7 +1891,7 @@ void test_vloxseg4ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f32m2_mu( @@ -1908,7 +1908,7 @@ void test_vloxseg4ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m1_mu( @@ -1925,7 +1925,7 @@ void test_vloxseg4ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_f64m2_mu( @@ -1942,7 +1942,7 @@ void test_vloxseg4ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vloxseg4ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf4_mu( @@ -1976,7 +1976,7 @@ void test_vloxseg4ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8mf2_mu( @@ -1993,7 +1993,7 @@ void test_vloxseg4ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i8m1_mu( @@ -2010,7 +2010,7 @@ void test_vloxseg4ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf4_mu( @@ -2027,7 +2027,7 @@ void test_vloxseg4ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16mf2_mu( @@ -2044,7 +2044,7 @@ void test_vloxseg4ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m1_mu( @@ -2061,7 +2061,7 @@ void test_vloxseg4ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i16m2_mu( @@ -2078,7 +2078,7 @@ void test_vloxseg4ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32mf2_mu( @@ -2095,7 +2095,7 @@ void test_vloxseg4ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m1_mu( @@ -2112,7 +2112,7 @@ void test_vloxseg4ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i32m2_mu( @@ -2129,7 +2129,7 @@ void test_vloxseg4ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m1_mu( @@ -2146,7 +2146,7 @@ void test_vloxseg4ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_i64m2_mu( @@ -2163,7 +2163,7 @@ void test_vloxseg4ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf8_mu( @@ -2180,7 +2180,7 @@ void test_vloxseg4ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf4_mu( @@ -2197,7 +2197,7 @@ void test_vloxseg4ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8mf2_mu( @@ -2214,7 +2214,7 @@ void test_vloxseg4ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u8m1_mu( @@ -2231,7 +2231,7 @@ void test_vloxseg4ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf4_mu( @@ -2248,7 +2248,7 @@ void test_vloxseg4ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16mf2_mu( @@ -2265,7 +2265,7 @@ void test_vloxseg4ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m1_mu( @@ -2282,7 +2282,7 @@ void test_vloxseg4ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u16m2_mu( @@ -2299,7 +2299,7 @@ void test_vloxseg4ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg4ei64_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32mf2_mu( @@ -2316,7 +2316,7 @@ void test_vloxseg4ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m1_mu( @@ -2333,7 +2333,7 @@ void test_vloxseg4ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u32m2_mu( @@ -2350,7 +2350,7 @@ void test_vloxseg4ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg4ei64_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m1_mu( @@ -2367,7 +2367,7 @@ void test_vloxseg4ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei64_v_u64m2_mu( @@ -2384,6 +2384,6 @@ void test_vloxseg4ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg4ei64_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei64_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c index 5eb8b57dbc00611fd8087d0083865706b335f4d3..baf8c560b74043835139a387ca467ced9ecc9d81 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg4ei8.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vloxseg4ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vloxseg4ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vloxseg4ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32mf2_tu( @@ -89,7 +89,7 @@ void test_vloxseg4ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m1_tu( @@ -106,7 +106,7 @@ void test_vloxseg4ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m2_tu( @@ -123,7 +123,7 @@ void test_vloxseg4ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m1_tu( @@ -140,7 +140,7 @@ void test_vloxseg4ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m2_tu( @@ -157,7 +157,7 @@ void test_vloxseg4ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf8_tu( @@ -174,7 +174,7 @@ void test_vloxseg4ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf4_tu( @@ -191,7 +191,7 @@ void test_vloxseg4ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf2_tu( @@ -208,7 +208,7 @@ void test_vloxseg4ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m1_tu( @@ -225,7 +225,7 @@ void test_vloxseg4ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m2_tu( @@ -242,7 +242,7 @@ void test_vloxseg4ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf4_tu( @@ -259,7 +259,7 @@ void test_vloxseg4ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf2_tu( @@ -276,7 +276,7 @@ void test_vloxseg4ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m1_tu( @@ -293,7 +293,7 @@ void test_vloxseg4ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m2_tu( @@ -310,7 +310,7 @@ void test_vloxseg4ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32mf2_tu( @@ -327,7 +327,7 @@ void test_vloxseg4ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m1_tu( @@ -344,7 +344,7 @@ void test_vloxseg4ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m2_tu( @@ -361,7 +361,7 @@ void test_vloxseg4ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m1_tu( @@ -378,7 +378,7 @@ void test_vloxseg4ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m2_tu( @@ -395,7 +395,7 @@ void test_vloxseg4ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf8_tu( @@ -412,7 +412,7 @@ void test_vloxseg4ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf4_tu( @@ -429,7 +429,7 @@ void test_vloxseg4ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf2_tu( @@ -446,7 +446,7 @@ void test_vloxseg4ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m1_tu( @@ -463,7 +463,7 @@ void test_vloxseg4ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m2_tu( @@ -480,7 +480,7 @@ void test_vloxseg4ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf4_tu( @@ -497,7 +497,7 @@ void test_vloxseg4ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf2_tu( @@ -514,7 +514,7 @@ void test_vloxseg4ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m1_tu( @@ -531,7 +531,7 @@ void test_vloxseg4ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m2_tu( @@ -548,7 +548,7 @@ void test_vloxseg4ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32mf2_tu( @@ -565,7 +565,7 @@ void test_vloxseg4ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m1_tu( @@ -582,7 +582,7 @@ void test_vloxseg4ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m2_tu( @@ -599,7 +599,7 @@ void test_vloxseg4ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m1_tu( @@ -616,7 +616,7 @@ void test_vloxseg4ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m2_tu( @@ -633,7 +633,7 @@ void test_vloxseg4ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf4_tum( @@ -650,7 +650,7 @@ void test_vloxseg4ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf2_tum( @@ -667,7 +667,7 @@ void test_vloxseg4ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m1_tum( @@ -684,7 +684,7 @@ void test_vloxseg4ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m2_tum( @@ -701,7 +701,7 @@ void test_vloxseg4ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32mf2_tum( @@ -718,7 +718,7 @@ void test_vloxseg4ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m1_tum( @@ -735,7 +735,7 @@ void test_vloxseg4ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m2_tum( @@ -752,7 +752,7 @@ void test_vloxseg4ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m1_tum( @@ -769,7 +769,7 @@ void test_vloxseg4ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m2_tum( @@ -786,7 +786,7 @@ void test_vloxseg4ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf8_tum( @@ -803,7 +803,7 @@ void test_vloxseg4ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf4_tum( @@ -820,7 +820,7 @@ void test_vloxseg4ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf2_tum( @@ -837,7 +837,7 @@ void test_vloxseg4ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m1_tum( @@ -854,7 +854,7 @@ void test_vloxseg4ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m2_tum( @@ -871,7 +871,7 @@ void test_vloxseg4ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf4_tum( @@ -888,7 +888,7 @@ void test_vloxseg4ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf2_tum( @@ -905,7 +905,7 @@ void test_vloxseg4ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m1_tum( @@ -922,7 +922,7 @@ void test_vloxseg4ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m2_tum( @@ -939,7 +939,7 @@ void test_vloxseg4ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32mf2_tum( @@ -956,7 +956,7 @@ void test_vloxseg4ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m1_tum( @@ -973,7 +973,7 @@ void test_vloxseg4ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m2_tum( @@ -990,7 +990,7 @@ void test_vloxseg4ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m1_tum( @@ -1007,7 +1007,7 @@ void test_vloxseg4ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m2_tum( @@ -1024,7 +1024,7 @@ void test_vloxseg4ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf8_tum( @@ -1041,7 +1041,7 @@ void test_vloxseg4ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf4_tum( @@ -1058,7 +1058,7 @@ void test_vloxseg4ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf2_tum( @@ -1075,7 +1075,7 @@ void test_vloxseg4ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m1_tum( @@ -1092,7 +1092,7 @@ void test_vloxseg4ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m2_tum( @@ -1109,7 +1109,7 @@ void test_vloxseg4ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf4_tum( @@ -1126,7 +1126,7 @@ void test_vloxseg4ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf2_tum( @@ -1143,7 +1143,7 @@ void test_vloxseg4ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m1_tum( @@ -1160,7 +1160,7 @@ void test_vloxseg4ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m2_tum( @@ -1177,7 +1177,7 @@ void test_vloxseg4ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32mf2_tum( @@ -1194,7 +1194,7 @@ void test_vloxseg4ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m1_tum( @@ -1211,7 +1211,7 @@ void test_vloxseg4ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m2_tum( @@ -1228,7 +1228,7 @@ void test_vloxseg4ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m1_tum( @@ -1245,7 +1245,7 @@ void test_vloxseg4ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m2_tum( @@ -1262,7 +1262,7 @@ void test_vloxseg4ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vloxseg4ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf2_tumu( @@ -1296,7 +1296,7 @@ void test_vloxseg4ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m1_tumu( @@ -1313,7 +1313,7 @@ void test_vloxseg4ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m2_tumu( @@ -1330,7 +1330,7 @@ void test_vloxseg4ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32mf2_tumu( @@ -1347,7 +1347,7 @@ void test_vloxseg4ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m1_tumu( @@ -1364,7 +1364,7 @@ void test_vloxseg4ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m2_tumu( @@ -1381,7 +1381,7 @@ void test_vloxseg4ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m1_tumu( @@ -1398,7 +1398,7 @@ void test_vloxseg4ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m2_tumu( @@ -1415,7 +1415,7 @@ void test_vloxseg4ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf8_tumu( @@ -1432,7 +1432,7 @@ void test_vloxseg4ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf4_tumu( @@ -1449,7 +1449,7 @@ void test_vloxseg4ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf2_tumu( @@ -1466,7 +1466,7 @@ void test_vloxseg4ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m1_tumu( @@ -1483,7 +1483,7 @@ void test_vloxseg4ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m2_tumu( @@ -1500,7 +1500,7 @@ void test_vloxseg4ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf4_tumu( @@ -1517,7 +1517,7 @@ void test_vloxseg4ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf2_tumu( @@ -1534,7 +1534,7 @@ void test_vloxseg4ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m1_tumu( @@ -1551,7 +1551,7 @@ void test_vloxseg4ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m2_tumu( @@ -1568,7 +1568,7 @@ void test_vloxseg4ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32mf2_tumu( @@ -1585,7 +1585,7 @@ void test_vloxseg4ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m1_tumu( @@ -1602,7 +1602,7 @@ void test_vloxseg4ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m2_tumu( @@ -1619,7 +1619,7 @@ void test_vloxseg4ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m1_tumu( @@ -1636,7 +1636,7 @@ void test_vloxseg4ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m2_tumu( @@ -1653,7 +1653,7 @@ void test_vloxseg4ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf8_tumu( @@ -1670,7 +1670,7 @@ void test_vloxseg4ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf4_tumu( @@ -1687,7 +1687,7 @@ void test_vloxseg4ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf2_tumu( @@ -1704,7 +1704,7 @@ void test_vloxseg4ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m1_tumu( @@ -1721,7 +1721,7 @@ void test_vloxseg4ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m2_tumu( @@ -1738,7 +1738,7 @@ void test_vloxseg4ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf4_tumu( @@ -1755,7 +1755,7 @@ void test_vloxseg4ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf2_tumu( @@ -1772,7 +1772,7 @@ void test_vloxseg4ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m1_tumu( @@ -1789,7 +1789,7 @@ void test_vloxseg4ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m2_tumu( @@ -1806,7 +1806,7 @@ void test_vloxseg4ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32mf2_tumu( @@ -1823,7 +1823,7 @@ void test_vloxseg4ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m1_tumu( @@ -1840,7 +1840,7 @@ void test_vloxseg4ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m2_tumu( @@ -1857,7 +1857,7 @@ void test_vloxseg4ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m1_tumu( @@ -1874,7 +1874,7 @@ void test_vloxseg4ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m2_tumu( @@ -1891,7 +1891,7 @@ void test_vloxseg4ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf4_mu( @@ -1908,7 +1908,7 @@ void test_vloxseg4ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16mf2_mu( @@ -1925,7 +1925,7 @@ void test_vloxseg4ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m1_mu( @@ -1942,7 +1942,7 @@ void test_vloxseg4ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f16m2_mu( @@ -1959,7 +1959,7 @@ void test_vloxseg4ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32mf2_mu( @@ -1976,7 +1976,7 @@ void test_vloxseg4ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m1_mu( @@ -1993,7 +1993,7 @@ void test_vloxseg4ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f32m2_mu( @@ -2010,7 +2010,7 @@ void test_vloxseg4ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m1_mu( @@ -2027,7 +2027,7 @@ void test_vloxseg4ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_f64m2_mu( @@ -2044,7 +2044,7 @@ void test_vloxseg4ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf8_mu( @@ -2061,7 +2061,7 @@ void test_vloxseg4ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf4_mu( @@ -2078,7 +2078,7 @@ void test_vloxseg4ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8mf2_mu( @@ -2095,7 +2095,7 @@ void test_vloxseg4ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m1_mu( @@ -2112,7 +2112,7 @@ void test_vloxseg4ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i8m2_mu( @@ -2129,7 +2129,7 @@ void test_vloxseg4ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf4_mu( @@ -2146,7 +2146,7 @@ void test_vloxseg4ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16mf2_mu( @@ -2163,7 +2163,7 @@ void test_vloxseg4ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m1_mu( @@ -2180,7 +2180,7 @@ void test_vloxseg4ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i16m2_mu( @@ -2197,7 +2197,7 @@ void test_vloxseg4ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32mf2_mu( @@ -2214,7 +2214,7 @@ void test_vloxseg4ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m1_mu( @@ -2231,7 +2231,7 @@ void test_vloxseg4ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i32m2_mu( @@ -2248,7 +2248,7 @@ void test_vloxseg4ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m1_mu( @@ -2265,7 +2265,7 @@ void test_vloxseg4ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_i64m2_mu( @@ -2282,7 +2282,7 @@ void test_vloxseg4ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf8_mu( @@ -2299,7 +2299,7 @@ void test_vloxseg4ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf4_mu( @@ -2316,7 +2316,7 @@ void test_vloxseg4ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8mf2_mu( @@ -2333,7 +2333,7 @@ void test_vloxseg4ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m1_mu( @@ -2350,7 +2350,7 @@ void test_vloxseg4ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u8m2_mu( @@ -2367,7 +2367,7 @@ void test_vloxseg4ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vloxseg4ei8_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf4_mu( @@ -2384,7 +2384,7 @@ void test_vloxseg4ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16mf2_mu( @@ -2401,7 +2401,7 @@ void test_vloxseg4ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m1_mu( @@ -2418,7 +2418,7 @@ void test_vloxseg4ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u16m2_mu( @@ -2435,7 +2435,7 @@ void test_vloxseg4ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg4ei8_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32mf2_mu( @@ -2452,7 +2452,7 @@ void test_vloxseg4ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m1_mu( @@ -2469,7 +2469,7 @@ void test_vloxseg4ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u32m2_mu( @@ -2486,7 +2486,7 @@ void test_vloxseg4ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg4ei8_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m1_mu( @@ -2503,7 +2503,7 @@ void test_vloxseg4ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg4ei8_v_u64m2_mu( @@ -2520,6 +2520,6 @@ void test_vloxseg4ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg4ei8_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg4ei8_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vloxseg4ei8_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c index daa3e42cdbb419a0c3c3dbd2bf35282e0f993522..7f5ce1c512ca5e7d26f5e05d85a5ba4f4e147fbb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei16.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vloxseg5ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vloxseg5ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32mf2_tu( @@ -80,7 +80,7 @@ void test_vloxseg5ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32m1_tu( @@ -99,7 +99,7 @@ void test_vloxseg5ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f64m1_tu( @@ -118,7 +118,7 @@ void test_vloxseg5ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf8_tu( @@ -137,7 +137,7 @@ void test_vloxseg5ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf4_tu( @@ -156,7 +156,7 @@ void test_vloxseg5ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf2_tu( @@ -175,7 +175,7 @@ void test_vloxseg5ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8m1_tu( @@ -194,7 +194,7 @@ void test_vloxseg5ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf4_tu( @@ -213,7 +213,7 @@ void test_vloxseg5ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf2_tu( @@ -232,7 +232,7 @@ void test_vloxseg5ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16m1_tu( @@ -251,7 +251,7 @@ void test_vloxseg5ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32mf2_tu( @@ -270,7 +270,7 @@ void test_vloxseg5ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vloxseg5ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i64m1_tu( @@ -308,7 +308,7 @@ void test_vloxseg5ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf8_tu( @@ -327,7 +327,7 @@ void test_vloxseg5ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf4_tu( @@ -346,7 +346,7 @@ void test_vloxseg5ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf2_tu( @@ -365,7 +365,7 @@ void test_vloxseg5ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8m1_tu( @@ -384,7 +384,7 @@ void test_vloxseg5ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf4_tu( @@ -403,7 +403,7 @@ void test_vloxseg5ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf2_tu( @@ -422,7 +422,7 @@ void test_vloxseg5ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16m1_tu( @@ -441,7 +441,7 @@ void test_vloxseg5ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32mf2_tu( @@ -460,7 +460,7 @@ void test_vloxseg5ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32m1_tu( @@ -479,7 +479,7 @@ void test_vloxseg5ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u64m1_tu( @@ -498,7 +498,7 @@ void test_vloxseg5ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf4_tum( @@ -517,7 +517,7 @@ void test_vloxseg5ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf2_tum( @@ -536,7 +536,7 @@ void test_vloxseg5ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16m1_tum( @@ -555,7 +555,7 @@ void test_vloxseg5ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32mf2_tum( @@ -574,7 +574,7 @@ void test_vloxseg5ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32m1_tum( @@ -593,7 +593,7 @@ void test_vloxseg5ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f64m1_tum( @@ -612,7 +612,7 @@ void test_vloxseg5ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf8_tum( @@ -631,7 +631,7 @@ void test_vloxseg5ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf4_tum( @@ -650,7 +650,7 @@ void test_vloxseg5ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf2_tum( @@ -669,7 +669,7 @@ void test_vloxseg5ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8m1_tum( @@ -688,7 +688,7 @@ void test_vloxseg5ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf4_tum( @@ -707,7 +707,7 @@ void test_vloxseg5ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf2_tum( @@ -726,7 +726,7 @@ void test_vloxseg5ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16m1_tum( @@ -745,7 +745,7 @@ void test_vloxseg5ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32mf2_tum( @@ -764,7 +764,7 @@ void test_vloxseg5ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32m1_tum( @@ -783,7 +783,7 @@ void test_vloxseg5ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i64m1_tum( @@ -802,7 +802,7 @@ void test_vloxseg5ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf8_tum( @@ -821,7 +821,7 @@ void test_vloxseg5ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf4_tum( @@ -840,7 +840,7 @@ void test_vloxseg5ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf2_tum( @@ -859,7 +859,7 @@ void test_vloxseg5ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8m1_tum( @@ -878,7 +878,7 @@ void test_vloxseg5ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf4_tum( @@ -897,7 +897,7 @@ void test_vloxseg5ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf2_tum( @@ -916,7 +916,7 @@ void test_vloxseg5ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16m1_tum( @@ -935,7 +935,7 @@ void test_vloxseg5ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32mf2_tum( @@ -954,7 +954,7 @@ void test_vloxseg5ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32m1_tum( @@ -973,7 +973,7 @@ void test_vloxseg5ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u64m1_tum( @@ -992,7 +992,7 @@ void test_vloxseg5ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf4_tumu( @@ -1011,7 +1011,7 @@ void test_vloxseg5ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf2_tumu( @@ -1030,7 +1030,7 @@ void test_vloxseg5ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16m1_tumu( @@ -1049,7 +1049,7 @@ void test_vloxseg5ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32mf2_tumu( @@ -1068,7 +1068,7 @@ void test_vloxseg5ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32m1_tumu( @@ -1087,7 +1087,7 @@ void test_vloxseg5ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f64m1_tumu( @@ -1106,7 +1106,7 @@ void test_vloxseg5ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf8_tumu( @@ -1125,7 +1125,7 @@ void test_vloxseg5ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf4_tumu( @@ -1144,7 +1144,7 @@ void test_vloxseg5ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf2_tumu( @@ -1163,7 +1163,7 @@ void test_vloxseg5ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8m1_tumu( @@ -1182,7 +1182,7 @@ void test_vloxseg5ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf4_tumu( @@ -1201,7 +1201,7 @@ void test_vloxseg5ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf2_tumu( @@ -1220,7 +1220,7 @@ void test_vloxseg5ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vloxseg5ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32mf2_tumu( @@ -1258,7 +1258,7 @@ void test_vloxseg5ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32m1_tumu( @@ -1277,7 +1277,7 @@ void test_vloxseg5ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i64m1_tumu( @@ -1296,7 +1296,7 @@ void test_vloxseg5ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf8_tumu( @@ -1315,7 +1315,7 @@ void test_vloxseg5ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf4_tumu( @@ -1334,7 +1334,7 @@ void test_vloxseg5ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf2_tumu( @@ -1353,7 +1353,7 @@ void test_vloxseg5ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8m1_tumu( @@ -1372,7 +1372,7 @@ void test_vloxseg5ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf4_tumu( @@ -1391,7 +1391,7 @@ void test_vloxseg5ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf2_tumu( @@ -1410,7 +1410,7 @@ void test_vloxseg5ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16m1_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg5ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32mf2_tumu( @@ -1448,7 +1448,7 @@ void test_vloxseg5ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32m1_tumu( @@ -1467,7 +1467,7 @@ void test_vloxseg5ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u64m1_tumu( @@ -1486,7 +1486,7 @@ void test_vloxseg5ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf4_mu( @@ -1505,7 +1505,7 @@ void test_vloxseg5ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16mf2_mu( @@ -1524,7 +1524,7 @@ void test_vloxseg5ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f16m1_mu( @@ -1543,7 +1543,7 @@ void test_vloxseg5ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32mf2_mu( @@ -1562,7 +1562,7 @@ void test_vloxseg5ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f32m1_mu( @@ -1581,7 +1581,7 @@ void test_vloxseg5ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_f64m1_mu( @@ -1600,7 +1600,7 @@ void test_vloxseg5ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf8_mu( @@ -1619,7 +1619,7 @@ void test_vloxseg5ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf4_mu( @@ -1638,7 +1638,7 @@ void test_vloxseg5ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8mf2_mu( @@ -1657,7 +1657,7 @@ void test_vloxseg5ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i8m1_mu( @@ -1676,7 +1676,7 @@ void test_vloxseg5ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf4_mu( @@ -1695,7 +1695,7 @@ void test_vloxseg5ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16mf2_mu( @@ -1714,7 +1714,7 @@ void test_vloxseg5ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i16m1_mu( @@ -1733,7 +1733,7 @@ void test_vloxseg5ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32mf2_mu( @@ -1752,7 +1752,7 @@ void test_vloxseg5ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i32m1_mu( @@ -1771,7 +1771,7 @@ void test_vloxseg5ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_i64m1_mu( @@ -1790,7 +1790,7 @@ void test_vloxseg5ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf8_mu( @@ -1809,7 +1809,7 @@ void test_vloxseg5ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf4_mu( @@ -1828,7 +1828,7 @@ void test_vloxseg5ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8mf2_mu( @@ -1847,7 +1847,7 @@ void test_vloxseg5ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u8m1_mu( @@ -1866,7 +1866,7 @@ void test_vloxseg5ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg5ei16_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf4_mu( @@ -1885,7 +1885,7 @@ void test_vloxseg5ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16mf2_mu( @@ -1904,7 +1904,7 @@ void test_vloxseg5ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u16m1_mu( @@ -1923,7 +1923,7 @@ void test_vloxseg5ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg5ei16_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32mf2_mu( @@ -1942,7 +1942,7 @@ void test_vloxseg5ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u32m1_mu( @@ -1961,7 +1961,7 @@ void test_vloxseg5ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg5ei16_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei16_v_u64m1_mu( @@ -1980,6 +1980,6 @@ void test_vloxseg5ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg5ei16_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei16_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c index 9de419110b8db267c97aa76821d95c210cf603b8..cdb2eafcc583972f45f3c0812d452a970df60692 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei32.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vloxseg5ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vloxseg5ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32mf2_tu( @@ -80,7 +80,7 @@ void test_vloxseg5ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32m1_tu( @@ -99,7 +99,7 @@ void test_vloxseg5ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f64m1_tu( @@ -118,7 +118,7 @@ void test_vloxseg5ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf8_tu( @@ -137,7 +137,7 @@ void test_vloxseg5ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf4_tu( @@ -156,7 +156,7 @@ void test_vloxseg5ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf2_tu( @@ -175,7 +175,7 @@ void test_vloxseg5ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8m1_tu( @@ -194,7 +194,7 @@ void test_vloxseg5ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf4_tu( @@ -213,7 +213,7 @@ void test_vloxseg5ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf2_tu( @@ -232,7 +232,7 @@ void test_vloxseg5ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16m1_tu( @@ -251,7 +251,7 @@ void test_vloxseg5ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32mf2_tu( @@ -270,7 +270,7 @@ void test_vloxseg5ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vloxseg5ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i64m1_tu( @@ -308,7 +308,7 @@ void test_vloxseg5ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf8_tu( @@ -327,7 +327,7 @@ void test_vloxseg5ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf4_tu( @@ -346,7 +346,7 @@ void test_vloxseg5ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf2_tu( @@ -365,7 +365,7 @@ void test_vloxseg5ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8m1_tu( @@ -384,7 +384,7 @@ void test_vloxseg5ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf4_tu( @@ -403,7 +403,7 @@ void test_vloxseg5ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf2_tu( @@ -422,7 +422,7 @@ void test_vloxseg5ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16m1_tu( @@ -441,7 +441,7 @@ void test_vloxseg5ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32mf2_tu( @@ -460,7 +460,7 @@ void test_vloxseg5ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32m1_tu( @@ -479,7 +479,7 @@ void test_vloxseg5ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u64m1_tu( @@ -498,7 +498,7 @@ void test_vloxseg5ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf4_tum( @@ -517,7 +517,7 @@ void test_vloxseg5ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf2_tum( @@ -536,7 +536,7 @@ void test_vloxseg5ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16m1_tum( @@ -555,7 +555,7 @@ void test_vloxseg5ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32mf2_tum( @@ -574,7 +574,7 @@ void test_vloxseg5ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32m1_tum( @@ -593,7 +593,7 @@ void test_vloxseg5ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f64m1_tum( @@ -612,7 +612,7 @@ void test_vloxseg5ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf8_tum( @@ -631,7 +631,7 @@ void test_vloxseg5ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf4_tum( @@ -650,7 +650,7 @@ void test_vloxseg5ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf2_tum( @@ -669,7 +669,7 @@ void test_vloxseg5ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8m1_tum( @@ -688,7 +688,7 @@ void test_vloxseg5ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf4_tum( @@ -707,7 +707,7 @@ void test_vloxseg5ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf2_tum( @@ -726,7 +726,7 @@ void test_vloxseg5ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16m1_tum( @@ -745,7 +745,7 @@ void test_vloxseg5ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32mf2_tum( @@ -764,7 +764,7 @@ void test_vloxseg5ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32m1_tum( @@ -783,7 +783,7 @@ void test_vloxseg5ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i64m1_tum( @@ -802,7 +802,7 @@ void test_vloxseg5ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf8_tum( @@ -821,7 +821,7 @@ void test_vloxseg5ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf4_tum( @@ -840,7 +840,7 @@ void test_vloxseg5ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf2_tum( @@ -859,7 +859,7 @@ void test_vloxseg5ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8m1_tum( @@ -878,7 +878,7 @@ void test_vloxseg5ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf4_tum( @@ -897,7 +897,7 @@ void test_vloxseg5ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf2_tum( @@ -916,7 +916,7 @@ void test_vloxseg5ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16m1_tum( @@ -935,7 +935,7 @@ void test_vloxseg5ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32mf2_tum( @@ -954,7 +954,7 @@ void test_vloxseg5ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32m1_tum( @@ -973,7 +973,7 @@ void test_vloxseg5ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u64m1_tum( @@ -992,7 +992,7 @@ void test_vloxseg5ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf4_tumu( @@ -1011,7 +1011,7 @@ void test_vloxseg5ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf2_tumu( @@ -1030,7 +1030,7 @@ void test_vloxseg5ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16m1_tumu( @@ -1049,7 +1049,7 @@ void test_vloxseg5ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32mf2_tumu( @@ -1068,7 +1068,7 @@ void test_vloxseg5ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32m1_tumu( @@ -1087,7 +1087,7 @@ void test_vloxseg5ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f64m1_tumu( @@ -1106,7 +1106,7 @@ void test_vloxseg5ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf8_tumu( @@ -1125,7 +1125,7 @@ void test_vloxseg5ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf4_tumu( @@ -1144,7 +1144,7 @@ void test_vloxseg5ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf2_tumu( @@ -1163,7 +1163,7 @@ void test_vloxseg5ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8m1_tumu( @@ -1182,7 +1182,7 @@ void test_vloxseg5ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf4_tumu( @@ -1201,7 +1201,7 @@ void test_vloxseg5ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf2_tumu( @@ -1220,7 +1220,7 @@ void test_vloxseg5ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vloxseg5ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32mf2_tumu( @@ -1258,7 +1258,7 @@ void test_vloxseg5ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32m1_tumu( @@ -1277,7 +1277,7 @@ void test_vloxseg5ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i64m1_tumu( @@ -1296,7 +1296,7 @@ void test_vloxseg5ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf8_tumu( @@ -1315,7 +1315,7 @@ void test_vloxseg5ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf4_tumu( @@ -1334,7 +1334,7 @@ void test_vloxseg5ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf2_tumu( @@ -1353,7 +1353,7 @@ void test_vloxseg5ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8m1_tumu( @@ -1372,7 +1372,7 @@ void test_vloxseg5ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf4_tumu( @@ -1391,7 +1391,7 @@ void test_vloxseg5ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf2_tumu( @@ -1410,7 +1410,7 @@ void test_vloxseg5ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16m1_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg5ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32mf2_tumu( @@ -1448,7 +1448,7 @@ void test_vloxseg5ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32m1_tumu( @@ -1467,7 +1467,7 @@ void test_vloxseg5ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u64m1_tumu( @@ -1486,7 +1486,7 @@ void test_vloxseg5ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf4_mu( @@ -1505,7 +1505,7 @@ void test_vloxseg5ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16mf2_mu( @@ -1524,7 +1524,7 @@ void test_vloxseg5ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f16m1_mu( @@ -1543,7 +1543,7 @@ void test_vloxseg5ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32mf2_mu( @@ -1562,7 +1562,7 @@ void test_vloxseg5ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f32m1_mu( @@ -1581,7 +1581,7 @@ void test_vloxseg5ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_f64m1_mu( @@ -1600,7 +1600,7 @@ void test_vloxseg5ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf8_mu( @@ -1619,7 +1619,7 @@ void test_vloxseg5ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf4_mu( @@ -1638,7 +1638,7 @@ void test_vloxseg5ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8mf2_mu( @@ -1657,7 +1657,7 @@ void test_vloxseg5ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i8m1_mu( @@ -1676,7 +1676,7 @@ void test_vloxseg5ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf4_mu( @@ -1695,7 +1695,7 @@ void test_vloxseg5ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16mf2_mu( @@ -1714,7 +1714,7 @@ void test_vloxseg5ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i16m1_mu( @@ -1733,7 +1733,7 @@ void test_vloxseg5ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32mf2_mu( @@ -1752,7 +1752,7 @@ void test_vloxseg5ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i32m1_mu( @@ -1771,7 +1771,7 @@ void test_vloxseg5ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_i64m1_mu( @@ -1790,7 +1790,7 @@ void test_vloxseg5ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf8_mu( @@ -1809,7 +1809,7 @@ void test_vloxseg5ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf4_mu( @@ -1828,7 +1828,7 @@ void test_vloxseg5ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8mf2_mu( @@ -1847,7 +1847,7 @@ void test_vloxseg5ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u8m1_mu( @@ -1866,7 +1866,7 @@ void test_vloxseg5ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg5ei32_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf4_mu( @@ -1885,7 +1885,7 @@ void test_vloxseg5ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16mf2_mu( @@ -1904,7 +1904,7 @@ void test_vloxseg5ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u16m1_mu( @@ -1923,7 +1923,7 @@ void test_vloxseg5ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg5ei32_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32mf2_mu( @@ -1942,7 +1942,7 @@ void test_vloxseg5ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u32m1_mu( @@ -1961,7 +1961,7 @@ void test_vloxseg5ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg5ei32_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei32_v_u64m1_mu( @@ -1980,6 +1980,6 @@ void test_vloxseg5ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg5ei32_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei32_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c index ae47fde5bc59a727e8cd6a4eba07e4f0094a80ac..69261659bbac455bb6650e416723851e380007cb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei64.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vloxseg5ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vloxseg5ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32mf2_tu( @@ -80,7 +80,7 @@ void test_vloxseg5ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32m1_tu( @@ -99,7 +99,7 @@ void test_vloxseg5ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f64m1_tu( @@ -118,7 +118,7 @@ void test_vloxseg5ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf8_tu( @@ -137,7 +137,7 @@ void test_vloxseg5ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf4_tu( @@ -156,7 +156,7 @@ void test_vloxseg5ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf2_tu( @@ -175,7 +175,7 @@ void test_vloxseg5ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8m1_tu( @@ -194,7 +194,7 @@ void test_vloxseg5ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf4_tu( @@ -213,7 +213,7 @@ void test_vloxseg5ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf2_tu( @@ -232,7 +232,7 @@ void test_vloxseg5ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16m1_tu( @@ -251,7 +251,7 @@ void test_vloxseg5ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32mf2_tu( @@ -270,7 +270,7 @@ void test_vloxseg5ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vloxseg5ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i64m1_tu( @@ -308,7 +308,7 @@ void test_vloxseg5ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf8_tu( @@ -327,7 +327,7 @@ void test_vloxseg5ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf4_tu( @@ -346,7 +346,7 @@ void test_vloxseg5ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf2_tu( @@ -365,7 +365,7 @@ void test_vloxseg5ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8m1_tu( @@ -384,7 +384,7 @@ void test_vloxseg5ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf4_tu( @@ -403,7 +403,7 @@ void test_vloxseg5ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf2_tu( @@ -422,7 +422,7 @@ void test_vloxseg5ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16m1_tu( @@ -441,7 +441,7 @@ void test_vloxseg5ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32mf2_tu( @@ -460,7 +460,7 @@ void test_vloxseg5ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32m1_tu( @@ -479,7 +479,7 @@ void test_vloxseg5ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u64m1_tu( @@ -498,7 +498,7 @@ void test_vloxseg5ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf4_tum( @@ -517,7 +517,7 @@ void test_vloxseg5ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf2_tum( @@ -536,7 +536,7 @@ void test_vloxseg5ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16m1_tum( @@ -555,7 +555,7 @@ void test_vloxseg5ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32mf2_tum( @@ -574,7 +574,7 @@ void test_vloxseg5ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32m1_tum( @@ -593,7 +593,7 @@ void test_vloxseg5ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f64m1_tum( @@ -612,7 +612,7 @@ void test_vloxseg5ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf8_tum( @@ -631,7 +631,7 @@ void test_vloxseg5ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf4_tum( @@ -650,7 +650,7 @@ void test_vloxseg5ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf2_tum( @@ -669,7 +669,7 @@ void test_vloxseg5ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8m1_tum( @@ -688,7 +688,7 @@ void test_vloxseg5ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf4_tum( @@ -707,7 +707,7 @@ void test_vloxseg5ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf2_tum( @@ -726,7 +726,7 @@ void test_vloxseg5ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16m1_tum( @@ -745,7 +745,7 @@ void test_vloxseg5ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32mf2_tum( @@ -764,7 +764,7 @@ void test_vloxseg5ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32m1_tum( @@ -783,7 +783,7 @@ void test_vloxseg5ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i64m1_tum( @@ -802,7 +802,7 @@ void test_vloxseg5ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf8_tum( @@ -821,7 +821,7 @@ void test_vloxseg5ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf4_tum( @@ -840,7 +840,7 @@ void test_vloxseg5ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf2_tum( @@ -859,7 +859,7 @@ void test_vloxseg5ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8m1_tum( @@ -878,7 +878,7 @@ void test_vloxseg5ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf4_tum( @@ -897,7 +897,7 @@ void test_vloxseg5ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf2_tum( @@ -916,7 +916,7 @@ void test_vloxseg5ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16m1_tum( @@ -935,7 +935,7 @@ void test_vloxseg5ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32mf2_tum( @@ -954,7 +954,7 @@ void test_vloxseg5ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32m1_tum( @@ -973,7 +973,7 @@ void test_vloxseg5ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u64m1_tum( @@ -992,7 +992,7 @@ void test_vloxseg5ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf4_tumu( @@ -1011,7 +1011,7 @@ void test_vloxseg5ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf2_tumu( @@ -1030,7 +1030,7 @@ void test_vloxseg5ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16m1_tumu( @@ -1049,7 +1049,7 @@ void test_vloxseg5ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32mf2_tumu( @@ -1068,7 +1068,7 @@ void test_vloxseg5ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32m1_tumu( @@ -1087,7 +1087,7 @@ void test_vloxseg5ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f64m1_tumu( @@ -1106,7 +1106,7 @@ void test_vloxseg5ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf8_tumu( @@ -1125,7 +1125,7 @@ void test_vloxseg5ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf4_tumu( @@ -1144,7 +1144,7 @@ void test_vloxseg5ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf2_tumu( @@ -1163,7 +1163,7 @@ void test_vloxseg5ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8m1_tumu( @@ -1182,7 +1182,7 @@ void test_vloxseg5ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf4_tumu( @@ -1201,7 +1201,7 @@ void test_vloxseg5ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf2_tumu( @@ -1220,7 +1220,7 @@ void test_vloxseg5ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vloxseg5ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32mf2_tumu( @@ -1258,7 +1258,7 @@ void test_vloxseg5ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32m1_tumu( @@ -1277,7 +1277,7 @@ void test_vloxseg5ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i64m1_tumu( @@ -1296,7 +1296,7 @@ void test_vloxseg5ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf8_tumu( @@ -1315,7 +1315,7 @@ void test_vloxseg5ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf4_tumu( @@ -1334,7 +1334,7 @@ void test_vloxseg5ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf2_tumu( @@ -1353,7 +1353,7 @@ void test_vloxseg5ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8m1_tumu( @@ -1372,7 +1372,7 @@ void test_vloxseg5ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf4_tumu( @@ -1391,7 +1391,7 @@ void test_vloxseg5ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf2_tumu( @@ -1410,7 +1410,7 @@ void test_vloxseg5ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16m1_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg5ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32mf2_tumu( @@ -1448,7 +1448,7 @@ void test_vloxseg5ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32m1_tumu( @@ -1467,7 +1467,7 @@ void test_vloxseg5ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u64m1_tumu( @@ -1486,7 +1486,7 @@ void test_vloxseg5ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf4_mu( @@ -1505,7 +1505,7 @@ void test_vloxseg5ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16mf2_mu( @@ -1524,7 +1524,7 @@ void test_vloxseg5ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f16m1_mu( @@ -1543,7 +1543,7 @@ void test_vloxseg5ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32mf2_mu( @@ -1562,7 +1562,7 @@ void test_vloxseg5ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f32m1_mu( @@ -1581,7 +1581,7 @@ void test_vloxseg5ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_f64m1_mu( @@ -1600,7 +1600,7 @@ void test_vloxseg5ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf8_mu( @@ -1619,7 +1619,7 @@ void test_vloxseg5ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf4_mu( @@ -1638,7 +1638,7 @@ void test_vloxseg5ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8mf2_mu( @@ -1657,7 +1657,7 @@ void test_vloxseg5ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i8m1_mu( @@ -1676,7 +1676,7 @@ void test_vloxseg5ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf4_mu( @@ -1695,7 +1695,7 @@ void test_vloxseg5ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16mf2_mu( @@ -1714,7 +1714,7 @@ void test_vloxseg5ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i16m1_mu( @@ -1733,7 +1733,7 @@ void test_vloxseg5ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32mf2_mu( @@ -1752,7 +1752,7 @@ void test_vloxseg5ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i32m1_mu( @@ -1771,7 +1771,7 @@ void test_vloxseg5ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_i64m1_mu( @@ -1790,7 +1790,7 @@ void test_vloxseg5ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf8_mu( @@ -1809,7 +1809,7 @@ void test_vloxseg5ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf4_mu( @@ -1828,7 +1828,7 @@ void test_vloxseg5ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8mf2_mu( @@ -1847,7 +1847,7 @@ void test_vloxseg5ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u8m1_mu( @@ -1866,7 +1866,7 @@ void test_vloxseg5ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg5ei64_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf4_mu( @@ -1885,7 +1885,7 @@ void test_vloxseg5ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16mf2_mu( @@ -1904,7 +1904,7 @@ void test_vloxseg5ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u16m1_mu( @@ -1923,7 +1923,7 @@ void test_vloxseg5ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg5ei64_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32mf2_mu( @@ -1942,7 +1942,7 @@ void test_vloxseg5ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u32m1_mu( @@ -1961,7 +1961,7 @@ void test_vloxseg5ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg5ei64_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei64_v_u64m1_mu( @@ -1980,6 +1980,6 @@ void test_vloxseg5ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg5ei64_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei64_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c index 76931a548a713ac71caf205916bba67ee1689afd..d64363986a3be60b40e9732f6d58213d33a0d1f0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg5ei8.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vloxseg5ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vloxseg5ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32mf2_tu( @@ -80,7 +80,7 @@ void test_vloxseg5ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32m1_tu( @@ -99,7 +99,7 @@ void test_vloxseg5ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f64m1_tu( @@ -118,7 +118,7 @@ void test_vloxseg5ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf8_tu( @@ -137,7 +137,7 @@ void test_vloxseg5ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf4_tu( @@ -156,7 +156,7 @@ void test_vloxseg5ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf2_tu( @@ -175,7 +175,7 @@ void test_vloxseg5ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8m1_tu( @@ -194,7 +194,7 @@ void test_vloxseg5ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf4_tu( @@ -213,7 +213,7 @@ void test_vloxseg5ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf2_tu( @@ -232,7 +232,7 @@ void test_vloxseg5ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16m1_tu( @@ -251,7 +251,7 @@ void test_vloxseg5ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32mf2_tu( @@ -270,7 +270,7 @@ void test_vloxseg5ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vloxseg5ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i64m1_tu( @@ -308,7 +308,7 @@ void test_vloxseg5ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf8_tu( @@ -327,7 +327,7 @@ void test_vloxseg5ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf4_tu( @@ -346,7 +346,7 @@ void test_vloxseg5ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf2_tu( @@ -365,7 +365,7 @@ void test_vloxseg5ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8m1_tu( @@ -384,7 +384,7 @@ void test_vloxseg5ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf4_tu( @@ -403,7 +403,7 @@ void test_vloxseg5ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf2_tu( @@ -422,7 +422,7 @@ void test_vloxseg5ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16m1_tu( @@ -441,7 +441,7 @@ void test_vloxseg5ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32mf2_tu( @@ -460,7 +460,7 @@ void test_vloxseg5ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32m1_tu( @@ -479,7 +479,7 @@ void test_vloxseg5ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u64m1_tu( @@ -498,7 +498,7 @@ void test_vloxseg5ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf4_tum( @@ -517,7 +517,7 @@ void test_vloxseg5ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf2_tum( @@ -536,7 +536,7 @@ void test_vloxseg5ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16m1_tum( @@ -555,7 +555,7 @@ void test_vloxseg5ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32mf2_tum( @@ -574,7 +574,7 @@ void test_vloxseg5ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32m1_tum( @@ -593,7 +593,7 @@ void test_vloxseg5ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f64m1_tum( @@ -612,7 +612,7 @@ void test_vloxseg5ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf8_tum( @@ -631,7 +631,7 @@ void test_vloxseg5ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf4_tum( @@ -650,7 +650,7 @@ void test_vloxseg5ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf2_tum( @@ -669,7 +669,7 @@ void test_vloxseg5ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8m1_tum( @@ -688,7 +688,7 @@ void test_vloxseg5ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf4_tum( @@ -707,7 +707,7 @@ void test_vloxseg5ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf2_tum( @@ -726,7 +726,7 @@ void test_vloxseg5ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16m1_tum( @@ -745,7 +745,7 @@ void test_vloxseg5ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32mf2_tum( @@ -764,7 +764,7 @@ void test_vloxseg5ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32m1_tum( @@ -783,7 +783,7 @@ void test_vloxseg5ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i64m1_tum( @@ -802,7 +802,7 @@ void test_vloxseg5ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf8_tum( @@ -821,7 +821,7 @@ void test_vloxseg5ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf4_tum( @@ -840,7 +840,7 @@ void test_vloxseg5ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf2_tum( @@ -859,7 +859,7 @@ void test_vloxseg5ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8m1_tum( @@ -878,7 +878,7 @@ void test_vloxseg5ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf4_tum( @@ -897,7 +897,7 @@ void test_vloxseg5ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf2_tum( @@ -916,7 +916,7 @@ void test_vloxseg5ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16m1_tum( @@ -935,7 +935,7 @@ void test_vloxseg5ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32mf2_tum( @@ -954,7 +954,7 @@ void test_vloxseg5ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32m1_tum( @@ -973,7 +973,7 @@ void test_vloxseg5ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u64m1_tum( @@ -992,7 +992,7 @@ void test_vloxseg5ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf4_tumu( @@ -1011,7 +1011,7 @@ void test_vloxseg5ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf2_tumu( @@ -1030,7 +1030,7 @@ void test_vloxseg5ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16m1_tumu( @@ -1049,7 +1049,7 @@ void test_vloxseg5ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32mf2_tumu( @@ -1068,7 +1068,7 @@ void test_vloxseg5ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32m1_tumu( @@ -1087,7 +1087,7 @@ void test_vloxseg5ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f64m1_tumu( @@ -1106,7 +1106,7 @@ void test_vloxseg5ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf8_tumu( @@ -1125,7 +1125,7 @@ void test_vloxseg5ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf4_tumu( @@ -1144,7 +1144,7 @@ void test_vloxseg5ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf2_tumu( @@ -1163,7 +1163,7 @@ void test_vloxseg5ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8m1_tumu( @@ -1182,7 +1182,7 @@ void test_vloxseg5ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf4_tumu( @@ -1201,7 +1201,7 @@ void test_vloxseg5ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf2_tumu( @@ -1220,7 +1220,7 @@ void test_vloxseg5ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vloxseg5ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32mf2_tumu( @@ -1258,7 +1258,7 @@ void test_vloxseg5ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32m1_tumu( @@ -1277,7 +1277,7 @@ void test_vloxseg5ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i64m1_tumu( @@ -1296,7 +1296,7 @@ void test_vloxseg5ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf8_tumu( @@ -1315,7 +1315,7 @@ void test_vloxseg5ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf4_tumu( @@ -1334,7 +1334,7 @@ void test_vloxseg5ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf2_tumu( @@ -1353,7 +1353,7 @@ void test_vloxseg5ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8m1_tumu( @@ -1372,7 +1372,7 @@ void test_vloxseg5ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf4_tumu( @@ -1391,7 +1391,7 @@ void test_vloxseg5ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf2_tumu( @@ -1410,7 +1410,7 @@ void test_vloxseg5ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16m1_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg5ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32mf2_tumu( @@ -1448,7 +1448,7 @@ void test_vloxseg5ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32m1_tumu( @@ -1467,7 +1467,7 @@ void test_vloxseg5ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u64m1_tumu( @@ -1486,7 +1486,7 @@ void test_vloxseg5ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf4_mu( @@ -1505,7 +1505,7 @@ void test_vloxseg5ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16mf2_mu( @@ -1524,7 +1524,7 @@ void test_vloxseg5ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f16m1_mu( @@ -1543,7 +1543,7 @@ void test_vloxseg5ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32mf2_mu( @@ -1562,7 +1562,7 @@ void test_vloxseg5ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f32m1_mu( @@ -1581,7 +1581,7 @@ void test_vloxseg5ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_f64m1_mu( @@ -1600,7 +1600,7 @@ void test_vloxseg5ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf8_mu( @@ -1619,7 +1619,7 @@ void test_vloxseg5ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf4_mu( @@ -1638,7 +1638,7 @@ void test_vloxseg5ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8mf2_mu( @@ -1657,7 +1657,7 @@ void test_vloxseg5ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i8m1_mu( @@ -1676,7 +1676,7 @@ void test_vloxseg5ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf4_mu( @@ -1695,7 +1695,7 @@ void test_vloxseg5ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16mf2_mu( @@ -1714,7 +1714,7 @@ void test_vloxseg5ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i16m1_mu( @@ -1733,7 +1733,7 @@ void test_vloxseg5ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32mf2_mu( @@ -1752,7 +1752,7 @@ void test_vloxseg5ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i32m1_mu( @@ -1771,7 +1771,7 @@ void test_vloxseg5ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_i64m1_mu( @@ -1790,7 +1790,7 @@ void test_vloxseg5ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf8_mu( @@ -1809,7 +1809,7 @@ void test_vloxseg5ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf4_mu( @@ -1828,7 +1828,7 @@ void test_vloxseg5ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8mf2_mu( @@ -1847,7 +1847,7 @@ void test_vloxseg5ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u8m1_mu( @@ -1866,7 +1866,7 @@ void test_vloxseg5ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg5ei8_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf4_mu( @@ -1885,7 +1885,7 @@ void test_vloxseg5ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16mf2_mu( @@ -1904,7 +1904,7 @@ void test_vloxseg5ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u16m1_mu( @@ -1923,7 +1923,7 @@ void test_vloxseg5ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg5ei8_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32mf2_mu( @@ -1942,7 +1942,7 @@ void test_vloxseg5ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u32m1_mu( @@ -1961,7 +1961,7 @@ void test_vloxseg5ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg5ei8_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg5ei8_v_u64m1_mu( @@ -1980,6 +1980,6 @@ void test_vloxseg5ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg5ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg5ei8_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vloxseg5ei8_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei16.c index fb637425fc2900b3d8411a5021146db626e67c20..63bdd28a19f43d91ad799850d2b4d40598283375 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei16.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vloxseg6ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vloxseg6ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32mf2_tu( @@ -88,7 +88,7 @@ void test_vloxseg6ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32m1_tu( @@ -109,7 +109,7 @@ void test_vloxseg6ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f64m1_tu( @@ -130,7 +130,7 @@ void test_vloxseg6ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf8_tu( @@ -151,7 +151,7 @@ void test_vloxseg6ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf4_tu( @@ -172,7 +172,7 @@ void test_vloxseg6ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf2_tu( @@ -193,7 +193,7 @@ void test_vloxseg6ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8m1_tu( @@ -214,7 +214,7 @@ void test_vloxseg6ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf4_tu( @@ -235,7 +235,7 @@ void test_vloxseg6ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf2_tu( @@ -256,7 +256,7 @@ void test_vloxseg6ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vloxseg6ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32mf2_tu( @@ -298,7 +298,7 @@ void test_vloxseg6ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32m1_tu( @@ -319,7 +319,7 @@ void test_vloxseg6ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i64m1_tu( @@ -340,7 +340,7 @@ void test_vloxseg6ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf8_tu( @@ -361,7 +361,7 @@ void test_vloxseg6ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf4_tu( @@ -382,7 +382,7 @@ void test_vloxseg6ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf2_tu( @@ -403,7 +403,7 @@ void test_vloxseg6ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8m1_tu( @@ -424,7 +424,7 @@ void test_vloxseg6ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf4_tu( @@ -445,7 +445,7 @@ void test_vloxseg6ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf2_tu( @@ -466,7 +466,7 @@ void test_vloxseg6ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16m1_tu( @@ -487,7 +487,7 @@ void test_vloxseg6ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32mf2_tu( @@ -508,7 +508,7 @@ void test_vloxseg6ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32m1_tu( @@ -529,7 +529,7 @@ void test_vloxseg6ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u64m1_tu( @@ -550,7 +550,7 @@ void test_vloxseg6ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf4_tum( @@ -571,7 +571,7 @@ void test_vloxseg6ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf2_tum( @@ -592,7 +592,7 @@ void test_vloxseg6ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16m1_tum( @@ -613,7 +613,7 @@ void test_vloxseg6ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vloxseg6ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32m1_tum( @@ -655,7 +655,7 @@ void test_vloxseg6ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f64m1_tum( @@ -676,7 +676,7 @@ void test_vloxseg6ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf8_tum( @@ -697,7 +697,7 @@ void test_vloxseg6ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf4_tum( @@ -718,7 +718,7 @@ void test_vloxseg6ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vloxseg6ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8m1_tum( @@ -760,7 +760,7 @@ void test_vloxseg6ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf4_tum( @@ -781,7 +781,7 @@ void test_vloxseg6ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf2_tum( @@ -802,7 +802,7 @@ void test_vloxseg6ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16m1_tum( @@ -823,7 +823,7 @@ void test_vloxseg6ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vloxseg6ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32m1_tum( @@ -865,7 +865,7 @@ void test_vloxseg6ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i64m1_tum( @@ -886,7 +886,7 @@ void test_vloxseg6ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf8_tum( @@ -907,7 +907,7 @@ void test_vloxseg6ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf4_tum( @@ -928,7 +928,7 @@ void test_vloxseg6ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vloxseg6ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8m1_tum( @@ -970,7 +970,7 @@ void test_vloxseg6ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf4_tum( @@ -991,7 +991,7 @@ void test_vloxseg6ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf2_tum( @@ -1012,7 +1012,7 @@ void test_vloxseg6ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16m1_tum( @@ -1033,7 +1033,7 @@ void test_vloxseg6ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg6ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32m1_tum( @@ -1075,7 +1075,7 @@ void test_vloxseg6ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u64m1_tum( @@ -1096,7 +1096,7 @@ void test_vloxseg6ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf4_tumu( @@ -1117,7 +1117,7 @@ void test_vloxseg6ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf2_tumu( @@ -1138,7 +1138,7 @@ void test_vloxseg6ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vloxseg6ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32mf2_tumu( @@ -1180,7 +1180,7 @@ void test_vloxseg6ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32m1_tumu( @@ -1201,7 +1201,7 @@ void test_vloxseg6ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f64m1_tumu( @@ -1222,7 +1222,7 @@ void test_vloxseg6ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf8_tumu( @@ -1243,7 +1243,7 @@ void test_vloxseg6ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vloxseg6ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf2_tumu( @@ -1285,7 +1285,7 @@ void test_vloxseg6ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8m1_tumu( @@ -1306,7 +1306,7 @@ void test_vloxseg6ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf4_tumu( @@ -1327,7 +1327,7 @@ void test_vloxseg6ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf2_tumu( @@ -1348,7 +1348,7 @@ void test_vloxseg6ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg6ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32mf2_tumu( @@ -1390,7 +1390,7 @@ void test_vloxseg6ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32m1_tumu( @@ -1411,7 +1411,7 @@ void test_vloxseg6ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i64m1_tumu( @@ -1432,7 +1432,7 @@ void test_vloxseg6ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf8_tumu( @@ -1453,7 +1453,7 @@ void test_vloxseg6ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf4_tumu( @@ -1474,7 +1474,7 @@ void test_vloxseg6ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf2_tumu( @@ -1495,7 +1495,7 @@ void test_vloxseg6ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8m1_tumu( @@ -1516,7 +1516,7 @@ void test_vloxseg6ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf4_tumu( @@ -1537,7 +1537,7 @@ void test_vloxseg6ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf2_tumu( @@ -1558,7 +1558,7 @@ void test_vloxseg6ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg6ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32mf2_tumu( @@ -1600,7 +1600,7 @@ void test_vloxseg6ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32m1_tumu( @@ -1621,7 +1621,7 @@ void test_vloxseg6ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u64m1_tumu( @@ -1642,7 +1642,7 @@ void test_vloxseg6ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf4_mu( @@ -1663,7 +1663,7 @@ void test_vloxseg6ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16mf2_mu( @@ -1684,7 +1684,7 @@ void test_vloxseg6ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f16m1_mu( @@ -1705,7 +1705,7 @@ void test_vloxseg6ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32mf2_mu( @@ -1726,7 +1726,7 @@ void test_vloxseg6ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f32m1_mu( @@ -1747,7 +1747,7 @@ void test_vloxseg6ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_f64m1_mu( @@ -1768,7 +1768,7 @@ void test_vloxseg6ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf8_mu( @@ -1789,7 +1789,7 @@ void test_vloxseg6ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf4_mu( @@ -1810,7 +1810,7 @@ void test_vloxseg6ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8mf2_mu( @@ -1831,7 +1831,7 @@ void test_vloxseg6ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i8m1_mu( @@ -1852,7 +1852,7 @@ void test_vloxseg6ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf4_mu( @@ -1873,7 +1873,7 @@ void test_vloxseg6ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16mf2_mu( @@ -1894,7 +1894,7 @@ void test_vloxseg6ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i16m1_mu( @@ -1915,7 +1915,7 @@ void test_vloxseg6ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32mf2_mu( @@ -1936,7 +1936,7 @@ void test_vloxseg6ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i32m1_mu( @@ -1957,7 +1957,7 @@ void test_vloxseg6ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_i64m1_mu( @@ -1978,7 +1978,7 @@ void test_vloxseg6ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf8_mu( @@ -1999,7 +1999,7 @@ void test_vloxseg6ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf4_mu( @@ -2020,7 +2020,7 @@ void test_vloxseg6ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8mf2_mu( @@ -2041,7 +2041,7 @@ void test_vloxseg6ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u8m1_mu( @@ -2062,7 +2062,7 @@ void test_vloxseg6ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg6ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf4_mu( @@ -2083,7 +2083,7 @@ void test_vloxseg6ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16mf2_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg6ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u16m1_mu( @@ -2125,7 +2125,7 @@ void test_vloxseg6ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg6ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32mf2_mu( @@ -2146,7 +2146,7 @@ void test_vloxseg6ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u32m1_mu( @@ -2167,7 +2167,7 @@ void test_vloxseg6ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg6ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei16_v_u64m1_mu( @@ -2188,6 +2188,6 @@ void test_vloxseg6ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg6ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c index 270d511ca02515f0c03b665adab9b5c534e56271..96190c48b5f540ecb43a602dc09496e9162d6285 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei32.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vloxseg6ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vloxseg6ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32mf2_tu( @@ -88,7 +88,7 @@ void test_vloxseg6ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32m1_tu( @@ -109,7 +109,7 @@ void test_vloxseg6ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f64m1_tu( @@ -130,7 +130,7 @@ void test_vloxseg6ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf8_tu( @@ -151,7 +151,7 @@ void test_vloxseg6ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf4_tu( @@ -172,7 +172,7 @@ void test_vloxseg6ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf2_tu( @@ -193,7 +193,7 @@ void test_vloxseg6ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8m1_tu( @@ -214,7 +214,7 @@ void test_vloxseg6ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf4_tu( @@ -235,7 +235,7 @@ void test_vloxseg6ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf2_tu( @@ -256,7 +256,7 @@ void test_vloxseg6ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vloxseg6ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32mf2_tu( @@ -298,7 +298,7 @@ void test_vloxseg6ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32m1_tu( @@ -319,7 +319,7 @@ void test_vloxseg6ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i64m1_tu( @@ -340,7 +340,7 @@ void test_vloxseg6ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf8_tu( @@ -361,7 +361,7 @@ void test_vloxseg6ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf4_tu( @@ -382,7 +382,7 @@ void test_vloxseg6ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf2_tu( @@ -403,7 +403,7 @@ void test_vloxseg6ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8m1_tu( @@ -424,7 +424,7 @@ void test_vloxseg6ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf4_tu( @@ -445,7 +445,7 @@ void test_vloxseg6ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf2_tu( @@ -466,7 +466,7 @@ void test_vloxseg6ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16m1_tu( @@ -487,7 +487,7 @@ void test_vloxseg6ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32mf2_tu( @@ -508,7 +508,7 @@ void test_vloxseg6ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32m1_tu( @@ -529,7 +529,7 @@ void test_vloxseg6ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u64m1_tu( @@ -550,7 +550,7 @@ void test_vloxseg6ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf4_tum( @@ -571,7 +571,7 @@ void test_vloxseg6ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf2_tum( @@ -592,7 +592,7 @@ void test_vloxseg6ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16m1_tum( @@ -613,7 +613,7 @@ void test_vloxseg6ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vloxseg6ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32m1_tum( @@ -655,7 +655,7 @@ void test_vloxseg6ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f64m1_tum( @@ -676,7 +676,7 @@ void test_vloxseg6ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf8_tum( @@ -697,7 +697,7 @@ void test_vloxseg6ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf4_tum( @@ -718,7 +718,7 @@ void test_vloxseg6ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vloxseg6ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8m1_tum( @@ -760,7 +760,7 @@ void test_vloxseg6ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf4_tum( @@ -781,7 +781,7 @@ void test_vloxseg6ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf2_tum( @@ -802,7 +802,7 @@ void test_vloxseg6ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16m1_tum( @@ -823,7 +823,7 @@ void test_vloxseg6ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vloxseg6ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32m1_tum( @@ -865,7 +865,7 @@ void test_vloxseg6ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i64m1_tum( @@ -886,7 +886,7 @@ void test_vloxseg6ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf8_tum( @@ -907,7 +907,7 @@ void test_vloxseg6ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf4_tum( @@ -928,7 +928,7 @@ void test_vloxseg6ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vloxseg6ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8m1_tum( @@ -970,7 +970,7 @@ void test_vloxseg6ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf4_tum( @@ -991,7 +991,7 @@ void test_vloxseg6ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf2_tum( @@ -1012,7 +1012,7 @@ void test_vloxseg6ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16m1_tum( @@ -1033,7 +1033,7 @@ void test_vloxseg6ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg6ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32m1_tum( @@ -1075,7 +1075,7 @@ void test_vloxseg6ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u64m1_tum( @@ -1096,7 +1096,7 @@ void test_vloxseg6ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf4_tumu( @@ -1117,7 +1117,7 @@ void test_vloxseg6ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf2_tumu( @@ -1138,7 +1138,7 @@ void test_vloxseg6ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vloxseg6ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32mf2_tumu( @@ -1180,7 +1180,7 @@ void test_vloxseg6ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32m1_tumu( @@ -1201,7 +1201,7 @@ void test_vloxseg6ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f64m1_tumu( @@ -1222,7 +1222,7 @@ void test_vloxseg6ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf8_tumu( @@ -1243,7 +1243,7 @@ void test_vloxseg6ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vloxseg6ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf2_tumu( @@ -1285,7 +1285,7 @@ void test_vloxseg6ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8m1_tumu( @@ -1306,7 +1306,7 @@ void test_vloxseg6ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf4_tumu( @@ -1327,7 +1327,7 @@ void test_vloxseg6ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf2_tumu( @@ -1348,7 +1348,7 @@ void test_vloxseg6ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg6ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32mf2_tumu( @@ -1390,7 +1390,7 @@ void test_vloxseg6ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32m1_tumu( @@ -1411,7 +1411,7 @@ void test_vloxseg6ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i64m1_tumu( @@ -1432,7 +1432,7 @@ void test_vloxseg6ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf8_tumu( @@ -1453,7 +1453,7 @@ void test_vloxseg6ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf4_tumu( @@ -1474,7 +1474,7 @@ void test_vloxseg6ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf2_tumu( @@ -1495,7 +1495,7 @@ void test_vloxseg6ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8m1_tumu( @@ -1516,7 +1516,7 @@ void test_vloxseg6ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf4_tumu( @@ -1537,7 +1537,7 @@ void test_vloxseg6ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf2_tumu( @@ -1558,7 +1558,7 @@ void test_vloxseg6ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg6ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32mf2_tumu( @@ -1600,7 +1600,7 @@ void test_vloxseg6ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32m1_tumu( @@ -1621,7 +1621,7 @@ void test_vloxseg6ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u64m1_tumu( @@ -1642,7 +1642,7 @@ void test_vloxseg6ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf4_mu( @@ -1663,7 +1663,7 @@ void test_vloxseg6ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16mf2_mu( @@ -1684,7 +1684,7 @@ void test_vloxseg6ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f16m1_mu( @@ -1705,7 +1705,7 @@ void test_vloxseg6ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32mf2_mu( @@ -1726,7 +1726,7 @@ void test_vloxseg6ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f32m1_mu( @@ -1747,7 +1747,7 @@ void test_vloxseg6ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_f64m1_mu( @@ -1768,7 +1768,7 @@ void test_vloxseg6ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf8_mu( @@ -1789,7 +1789,7 @@ void test_vloxseg6ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf4_mu( @@ -1810,7 +1810,7 @@ void test_vloxseg6ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8mf2_mu( @@ -1831,7 +1831,7 @@ void test_vloxseg6ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i8m1_mu( @@ -1852,7 +1852,7 @@ void test_vloxseg6ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf4_mu( @@ -1873,7 +1873,7 @@ void test_vloxseg6ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16mf2_mu( @@ -1894,7 +1894,7 @@ void test_vloxseg6ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i16m1_mu( @@ -1915,7 +1915,7 @@ void test_vloxseg6ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32mf2_mu( @@ -1936,7 +1936,7 @@ void test_vloxseg6ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i32m1_mu( @@ -1957,7 +1957,7 @@ void test_vloxseg6ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_i64m1_mu( @@ -1978,7 +1978,7 @@ void test_vloxseg6ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf8_mu( @@ -1999,7 +1999,7 @@ void test_vloxseg6ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf4_mu( @@ -2020,7 +2020,7 @@ void test_vloxseg6ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8mf2_mu( @@ -2041,7 +2041,7 @@ void test_vloxseg6ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u8m1_mu( @@ -2062,7 +2062,7 @@ void test_vloxseg6ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg6ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf4_mu( @@ -2083,7 +2083,7 @@ void test_vloxseg6ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16mf2_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg6ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u16m1_mu( @@ -2125,7 +2125,7 @@ void test_vloxseg6ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg6ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32mf2_mu( @@ -2146,7 +2146,7 @@ void test_vloxseg6ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u32m1_mu( @@ -2167,7 +2167,7 @@ void test_vloxseg6ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg6ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei32_v_u64m1_mu( @@ -2188,6 +2188,6 @@ void test_vloxseg6ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg6ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c index 5d87b9b276b2dc39b5225201e1cb2fe7849d02c6..07bbd76c7f4cbbfef3608d4bf30bd5bed6da4506 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei64.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vloxseg6ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vloxseg6ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32mf2_tu( @@ -88,7 +88,7 @@ void test_vloxseg6ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32m1_tu( @@ -109,7 +109,7 @@ void test_vloxseg6ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f64m1_tu( @@ -130,7 +130,7 @@ void test_vloxseg6ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf8_tu( @@ -151,7 +151,7 @@ void test_vloxseg6ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf4_tu( @@ -172,7 +172,7 @@ void test_vloxseg6ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf2_tu( @@ -193,7 +193,7 @@ void test_vloxseg6ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8m1_tu( @@ -214,7 +214,7 @@ void test_vloxseg6ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf4_tu( @@ -235,7 +235,7 @@ void test_vloxseg6ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf2_tu( @@ -256,7 +256,7 @@ void test_vloxseg6ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vloxseg6ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32mf2_tu( @@ -298,7 +298,7 @@ void test_vloxseg6ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32m1_tu( @@ -319,7 +319,7 @@ void test_vloxseg6ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i64m1_tu( @@ -340,7 +340,7 @@ void test_vloxseg6ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf8_tu( @@ -361,7 +361,7 @@ void test_vloxseg6ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf4_tu( @@ -382,7 +382,7 @@ void test_vloxseg6ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf2_tu( @@ -403,7 +403,7 @@ void test_vloxseg6ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8m1_tu( @@ -424,7 +424,7 @@ void test_vloxseg6ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf4_tu( @@ -445,7 +445,7 @@ void test_vloxseg6ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf2_tu( @@ -466,7 +466,7 @@ void test_vloxseg6ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16m1_tu( @@ -487,7 +487,7 @@ void test_vloxseg6ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32mf2_tu( @@ -508,7 +508,7 @@ void test_vloxseg6ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32m1_tu( @@ -529,7 +529,7 @@ void test_vloxseg6ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u64m1_tu( @@ -550,7 +550,7 @@ void test_vloxseg6ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf4_tum( @@ -571,7 +571,7 @@ void test_vloxseg6ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf2_tum( @@ -592,7 +592,7 @@ void test_vloxseg6ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16m1_tum( @@ -613,7 +613,7 @@ void test_vloxseg6ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vloxseg6ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32m1_tum( @@ -655,7 +655,7 @@ void test_vloxseg6ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f64m1_tum( @@ -676,7 +676,7 @@ void test_vloxseg6ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf8_tum( @@ -697,7 +697,7 @@ void test_vloxseg6ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf4_tum( @@ -718,7 +718,7 @@ void test_vloxseg6ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vloxseg6ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8m1_tum( @@ -760,7 +760,7 @@ void test_vloxseg6ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf4_tum( @@ -781,7 +781,7 @@ void test_vloxseg6ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf2_tum( @@ -802,7 +802,7 @@ void test_vloxseg6ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16m1_tum( @@ -823,7 +823,7 @@ void test_vloxseg6ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vloxseg6ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32m1_tum( @@ -865,7 +865,7 @@ void test_vloxseg6ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i64m1_tum( @@ -886,7 +886,7 @@ void test_vloxseg6ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf8_tum( @@ -907,7 +907,7 @@ void test_vloxseg6ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf4_tum( @@ -928,7 +928,7 @@ void test_vloxseg6ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vloxseg6ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8m1_tum( @@ -970,7 +970,7 @@ void test_vloxseg6ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf4_tum( @@ -991,7 +991,7 @@ void test_vloxseg6ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf2_tum( @@ -1012,7 +1012,7 @@ void test_vloxseg6ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16m1_tum( @@ -1033,7 +1033,7 @@ void test_vloxseg6ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg6ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32m1_tum( @@ -1075,7 +1075,7 @@ void test_vloxseg6ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u64m1_tum( @@ -1096,7 +1096,7 @@ void test_vloxseg6ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf4_tumu( @@ -1117,7 +1117,7 @@ void test_vloxseg6ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf2_tumu( @@ -1138,7 +1138,7 @@ void test_vloxseg6ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vloxseg6ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32mf2_tumu( @@ -1180,7 +1180,7 @@ void test_vloxseg6ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32m1_tumu( @@ -1201,7 +1201,7 @@ void test_vloxseg6ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f64m1_tumu( @@ -1222,7 +1222,7 @@ void test_vloxseg6ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf8_tumu( @@ -1243,7 +1243,7 @@ void test_vloxseg6ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vloxseg6ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf2_tumu( @@ -1285,7 +1285,7 @@ void test_vloxseg6ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8m1_tumu( @@ -1306,7 +1306,7 @@ void test_vloxseg6ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf4_tumu( @@ -1327,7 +1327,7 @@ void test_vloxseg6ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf2_tumu( @@ -1348,7 +1348,7 @@ void test_vloxseg6ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg6ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32mf2_tumu( @@ -1390,7 +1390,7 @@ void test_vloxseg6ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32m1_tumu( @@ -1411,7 +1411,7 @@ void test_vloxseg6ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i64m1_tumu( @@ -1432,7 +1432,7 @@ void test_vloxseg6ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf8_tumu( @@ -1453,7 +1453,7 @@ void test_vloxseg6ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf4_tumu( @@ -1474,7 +1474,7 @@ void test_vloxseg6ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf2_tumu( @@ -1495,7 +1495,7 @@ void test_vloxseg6ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8m1_tumu( @@ -1516,7 +1516,7 @@ void test_vloxseg6ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf4_tumu( @@ -1537,7 +1537,7 @@ void test_vloxseg6ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf2_tumu( @@ -1558,7 +1558,7 @@ void test_vloxseg6ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg6ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32mf2_tumu( @@ -1600,7 +1600,7 @@ void test_vloxseg6ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32m1_tumu( @@ -1621,7 +1621,7 @@ void test_vloxseg6ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u64m1_tumu( @@ -1642,7 +1642,7 @@ void test_vloxseg6ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf4_mu( @@ -1663,7 +1663,7 @@ void test_vloxseg6ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16mf2_mu( @@ -1684,7 +1684,7 @@ void test_vloxseg6ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f16m1_mu( @@ -1705,7 +1705,7 @@ void test_vloxseg6ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32mf2_mu( @@ -1726,7 +1726,7 @@ void test_vloxseg6ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f32m1_mu( @@ -1747,7 +1747,7 @@ void test_vloxseg6ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_f64m1_mu( @@ -1768,7 +1768,7 @@ void test_vloxseg6ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf8_mu( @@ -1789,7 +1789,7 @@ void test_vloxseg6ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf4_mu( @@ -1810,7 +1810,7 @@ void test_vloxseg6ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8mf2_mu( @@ -1831,7 +1831,7 @@ void test_vloxseg6ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i8m1_mu( @@ -1852,7 +1852,7 @@ void test_vloxseg6ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf4_mu( @@ -1873,7 +1873,7 @@ void test_vloxseg6ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16mf2_mu( @@ -1894,7 +1894,7 @@ void test_vloxseg6ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i16m1_mu( @@ -1915,7 +1915,7 @@ void test_vloxseg6ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32mf2_mu( @@ -1936,7 +1936,7 @@ void test_vloxseg6ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i32m1_mu( @@ -1957,7 +1957,7 @@ void test_vloxseg6ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_i64m1_mu( @@ -1978,7 +1978,7 @@ void test_vloxseg6ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf8_mu( @@ -1999,7 +1999,7 @@ void test_vloxseg6ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf4_mu( @@ -2020,7 +2020,7 @@ void test_vloxseg6ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8mf2_mu( @@ -2041,7 +2041,7 @@ void test_vloxseg6ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u8m1_mu( @@ -2062,7 +2062,7 @@ void test_vloxseg6ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg6ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf4_mu( @@ -2083,7 +2083,7 @@ void test_vloxseg6ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16mf2_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg6ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u16m1_mu( @@ -2125,7 +2125,7 @@ void test_vloxseg6ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg6ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32mf2_mu( @@ -2146,7 +2146,7 @@ void test_vloxseg6ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u32m1_mu( @@ -2167,7 +2167,7 @@ void test_vloxseg6ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg6ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei64_v_u64m1_mu( @@ -2188,6 +2188,6 @@ void test_vloxseg6ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg6ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c index ad7956e63fba54deb80dd0a1ba6c7905b0631f29..cf0cc36dbcc73a56103f040ee6e08690768d421e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg6ei8.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vloxseg6ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vloxseg6ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32mf2_tu( @@ -88,7 +88,7 @@ void test_vloxseg6ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32m1_tu( @@ -109,7 +109,7 @@ void test_vloxseg6ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f64m1_tu( @@ -130,7 +130,7 @@ void test_vloxseg6ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf8_tu( @@ -151,7 +151,7 @@ void test_vloxseg6ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf4_tu( @@ -172,7 +172,7 @@ void test_vloxseg6ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf2_tu( @@ -193,7 +193,7 @@ void test_vloxseg6ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8m1_tu( @@ -214,7 +214,7 @@ void test_vloxseg6ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf4_tu( @@ -235,7 +235,7 @@ void test_vloxseg6ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf2_tu( @@ -256,7 +256,7 @@ void test_vloxseg6ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vloxseg6ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32mf2_tu( @@ -298,7 +298,7 @@ void test_vloxseg6ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32m1_tu( @@ -319,7 +319,7 @@ void test_vloxseg6ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i64m1_tu( @@ -340,7 +340,7 @@ void test_vloxseg6ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf8_tu( @@ -361,7 +361,7 @@ void test_vloxseg6ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf4_tu( @@ -382,7 +382,7 @@ void test_vloxseg6ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf2_tu( @@ -403,7 +403,7 @@ void test_vloxseg6ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8m1_tu( @@ -424,7 +424,7 @@ void test_vloxseg6ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf4_tu( @@ -445,7 +445,7 @@ void test_vloxseg6ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf2_tu( @@ -466,7 +466,7 @@ void test_vloxseg6ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16m1_tu( @@ -487,7 +487,7 @@ void test_vloxseg6ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32mf2_tu( @@ -508,7 +508,7 @@ void test_vloxseg6ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32m1_tu( @@ -529,7 +529,7 @@ void test_vloxseg6ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u64m1_tu( @@ -550,7 +550,7 @@ void test_vloxseg6ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf4_tum( @@ -571,7 +571,7 @@ void test_vloxseg6ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf2_tum( @@ -592,7 +592,7 @@ void test_vloxseg6ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16m1_tum( @@ -613,7 +613,7 @@ void test_vloxseg6ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vloxseg6ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32m1_tum( @@ -655,7 +655,7 @@ void test_vloxseg6ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f64m1_tum( @@ -676,7 +676,7 @@ void test_vloxseg6ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf8_tum( @@ -697,7 +697,7 @@ void test_vloxseg6ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf4_tum( @@ -718,7 +718,7 @@ void test_vloxseg6ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vloxseg6ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8m1_tum( @@ -760,7 +760,7 @@ void test_vloxseg6ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf4_tum( @@ -781,7 +781,7 @@ void test_vloxseg6ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf2_tum( @@ -802,7 +802,7 @@ void test_vloxseg6ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16m1_tum( @@ -823,7 +823,7 @@ void test_vloxseg6ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vloxseg6ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32m1_tum( @@ -865,7 +865,7 @@ void test_vloxseg6ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i64m1_tum( @@ -886,7 +886,7 @@ void test_vloxseg6ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf8_tum( @@ -907,7 +907,7 @@ void test_vloxseg6ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf4_tum( @@ -928,7 +928,7 @@ void test_vloxseg6ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vloxseg6ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8m1_tum( @@ -970,7 +970,7 @@ void test_vloxseg6ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf4_tum( @@ -991,7 +991,7 @@ void test_vloxseg6ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf2_tum( @@ -1012,7 +1012,7 @@ void test_vloxseg6ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16m1_tum( @@ -1033,7 +1033,7 @@ void test_vloxseg6ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg6ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32m1_tum( @@ -1075,7 +1075,7 @@ void test_vloxseg6ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u64m1_tum( @@ -1096,7 +1096,7 @@ void test_vloxseg6ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf4_tumu( @@ -1117,7 +1117,7 @@ void test_vloxseg6ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf2_tumu( @@ -1138,7 +1138,7 @@ void test_vloxseg6ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vloxseg6ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32mf2_tumu( @@ -1180,7 +1180,7 @@ void test_vloxseg6ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32m1_tumu( @@ -1201,7 +1201,7 @@ void test_vloxseg6ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f64m1_tumu( @@ -1222,7 +1222,7 @@ void test_vloxseg6ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf8_tumu( @@ -1243,7 +1243,7 @@ void test_vloxseg6ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vloxseg6ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf2_tumu( @@ -1285,7 +1285,7 @@ void test_vloxseg6ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8m1_tumu( @@ -1306,7 +1306,7 @@ void test_vloxseg6ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf4_tumu( @@ -1327,7 +1327,7 @@ void test_vloxseg6ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf2_tumu( @@ -1348,7 +1348,7 @@ void test_vloxseg6ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vloxseg6ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32mf2_tumu( @@ -1390,7 +1390,7 @@ void test_vloxseg6ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32m1_tumu( @@ -1411,7 +1411,7 @@ void test_vloxseg6ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i64m1_tumu( @@ -1432,7 +1432,7 @@ void test_vloxseg6ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf8_tumu( @@ -1453,7 +1453,7 @@ void test_vloxseg6ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf4_tumu( @@ -1474,7 +1474,7 @@ void test_vloxseg6ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf2_tumu( @@ -1495,7 +1495,7 @@ void test_vloxseg6ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8m1_tumu( @@ -1516,7 +1516,7 @@ void test_vloxseg6ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf4_tumu( @@ -1537,7 +1537,7 @@ void test_vloxseg6ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf2_tumu( @@ -1558,7 +1558,7 @@ void test_vloxseg6ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg6ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32mf2_tumu( @@ -1600,7 +1600,7 @@ void test_vloxseg6ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32m1_tumu( @@ -1621,7 +1621,7 @@ void test_vloxseg6ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u64m1_tumu( @@ -1642,7 +1642,7 @@ void test_vloxseg6ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf4_mu( @@ -1663,7 +1663,7 @@ void test_vloxseg6ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16mf2_mu( @@ -1684,7 +1684,7 @@ void test_vloxseg6ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f16m1_mu( @@ -1705,7 +1705,7 @@ void test_vloxseg6ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32mf2_mu( @@ -1726,7 +1726,7 @@ void test_vloxseg6ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f32m1_mu( @@ -1747,7 +1747,7 @@ void test_vloxseg6ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_f64m1_mu( @@ -1768,7 +1768,7 @@ void test_vloxseg6ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf8_mu( @@ -1789,7 +1789,7 @@ void test_vloxseg6ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf4_mu( @@ -1810,7 +1810,7 @@ void test_vloxseg6ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8mf2_mu( @@ -1831,7 +1831,7 @@ void test_vloxseg6ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i8m1_mu( @@ -1852,7 +1852,7 @@ void test_vloxseg6ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf4_mu( @@ -1873,7 +1873,7 @@ void test_vloxseg6ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16mf2_mu( @@ -1894,7 +1894,7 @@ void test_vloxseg6ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i16m1_mu( @@ -1915,7 +1915,7 @@ void test_vloxseg6ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32mf2_mu( @@ -1936,7 +1936,7 @@ void test_vloxseg6ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i32m1_mu( @@ -1957,7 +1957,7 @@ void test_vloxseg6ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_i64m1_mu( @@ -1978,7 +1978,7 @@ void test_vloxseg6ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf8_mu( @@ -1999,7 +1999,7 @@ void test_vloxseg6ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf4_mu( @@ -2020,7 +2020,7 @@ void test_vloxseg6ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8mf2_mu( @@ -2041,7 +2041,7 @@ void test_vloxseg6ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u8m1_mu( @@ -2062,7 +2062,7 @@ void test_vloxseg6ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg6ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf4_mu( @@ -2083,7 +2083,7 @@ void test_vloxseg6ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16mf2_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg6ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u16m1_mu( @@ -2125,7 +2125,7 @@ void test_vloxseg6ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg6ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32mf2_mu( @@ -2146,7 +2146,7 @@ void test_vloxseg6ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u32m1_mu( @@ -2167,7 +2167,7 @@ void test_vloxseg6ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg6ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg6ei8_v_u64m1_mu( @@ -2188,6 +2188,6 @@ void test_vloxseg6ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg6ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg6ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vloxseg6ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei16.c index ed3415c86243959f7a457c21c1351c9552294e7e..9a24e5abbff1da9c6bbddd210cfe523d67cb1c58 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei16.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vloxseg7ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vloxseg7ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32mf2_tu( @@ -96,7 +96,7 @@ void test_vloxseg7ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32m1_tu( @@ -119,7 +119,7 @@ void test_vloxseg7ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f64m1_tu( @@ -142,7 +142,7 @@ void test_vloxseg7ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf8_tu( @@ -165,7 +165,7 @@ void test_vloxseg7ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf4_tu( @@ -188,7 +188,7 @@ void test_vloxseg7ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf2_tu( @@ -211,7 +211,7 @@ void test_vloxseg7ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8m1_tu( @@ -234,7 +234,7 @@ void test_vloxseg7ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf4_tu( @@ -257,7 +257,7 @@ void test_vloxseg7ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf2_tu( @@ -280,7 +280,7 @@ void test_vloxseg7ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16m1_tu( @@ -303,7 +303,7 @@ void test_vloxseg7ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32mf2_tu( @@ -326,7 +326,7 @@ void test_vloxseg7ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32m1_tu( @@ -349,7 +349,7 @@ void test_vloxseg7ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i64m1_tu( @@ -372,7 +372,7 @@ void test_vloxseg7ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vloxseg7ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf4_tu( @@ -418,7 +418,7 @@ void test_vloxseg7ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf2_tu( @@ -441,7 +441,7 @@ void test_vloxseg7ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8m1_tu( @@ -464,7 +464,7 @@ void test_vloxseg7ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf4_tu( @@ -487,7 +487,7 @@ void test_vloxseg7ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf2_tu( @@ -510,7 +510,7 @@ void test_vloxseg7ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16m1_tu( @@ -533,7 +533,7 @@ void test_vloxseg7ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32mf2_tu( @@ -556,7 +556,7 @@ void test_vloxseg7ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32m1_tu( @@ -579,7 +579,7 @@ void test_vloxseg7ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vloxseg7ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf4_tum( @@ -625,7 +625,7 @@ void test_vloxseg7ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf2_tum( @@ -648,7 +648,7 @@ void test_vloxseg7ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16m1_tum( @@ -671,7 +671,7 @@ void test_vloxseg7ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32mf2_tum( @@ -694,7 +694,7 @@ void test_vloxseg7ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32m1_tum( @@ -717,7 +717,7 @@ void test_vloxseg7ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f64m1_tum( @@ -740,7 +740,7 @@ void test_vloxseg7ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf8_tum( @@ -763,7 +763,7 @@ void test_vloxseg7ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vloxseg7ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf2_tum( @@ -809,7 +809,7 @@ void test_vloxseg7ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8m1_tum( @@ -832,7 +832,7 @@ void test_vloxseg7ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf4_tum( @@ -855,7 +855,7 @@ void test_vloxseg7ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf2_tum( @@ -878,7 +878,7 @@ void test_vloxseg7ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vloxseg7ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32mf2_tum( @@ -924,7 +924,7 @@ void test_vloxseg7ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32m1_tum( @@ -947,7 +947,7 @@ void test_vloxseg7ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i64m1_tum( @@ -970,7 +970,7 @@ void test_vloxseg7ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf8_tum( @@ -993,7 +993,7 @@ void test_vloxseg7ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf4_tum( @@ -1016,7 +1016,7 @@ void test_vloxseg7ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf2_tum( @@ -1039,7 +1039,7 @@ void test_vloxseg7ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8m1_tum( @@ -1062,7 +1062,7 @@ void test_vloxseg7ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf4_tum( @@ -1085,7 +1085,7 @@ void test_vloxseg7ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf2_tum( @@ -1108,7 +1108,7 @@ void test_vloxseg7ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16m1_tum( @@ -1131,7 +1131,7 @@ void test_vloxseg7ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32mf2_tum( @@ -1154,7 +1154,7 @@ void test_vloxseg7ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32m1_tum( @@ -1177,7 +1177,7 @@ void test_vloxseg7ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u64m1_tum( @@ -1200,7 +1200,7 @@ void test_vloxseg7ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf4_tumu( @@ -1223,7 +1223,7 @@ void test_vloxseg7ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf2_tumu( @@ -1246,7 +1246,7 @@ void test_vloxseg7ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16m1_tumu( @@ -1269,7 +1269,7 @@ void test_vloxseg7ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32mf2_tumu( @@ -1292,7 +1292,7 @@ void test_vloxseg7ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32m1_tumu( @@ -1315,7 +1315,7 @@ void test_vloxseg7ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f64m1_tumu( @@ -1338,7 +1338,7 @@ void test_vloxseg7ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf8_tumu( @@ -1361,7 +1361,7 @@ void test_vloxseg7ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf4_tumu( @@ -1384,7 +1384,7 @@ void test_vloxseg7ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf2_tumu( @@ -1407,7 +1407,7 @@ void test_vloxseg7ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8m1_tumu( @@ -1430,7 +1430,7 @@ void test_vloxseg7ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf4_tumu( @@ -1453,7 +1453,7 @@ void test_vloxseg7ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf2_tumu( @@ -1476,7 +1476,7 @@ void test_vloxseg7ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vloxseg7ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32mf2_tumu( @@ -1522,7 +1522,7 @@ void test_vloxseg7ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32m1_tumu( @@ -1545,7 +1545,7 @@ void test_vloxseg7ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i64m1_tumu( @@ -1568,7 +1568,7 @@ void test_vloxseg7ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf8_tumu( @@ -1591,7 +1591,7 @@ void test_vloxseg7ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf4_tumu( @@ -1614,7 +1614,7 @@ void test_vloxseg7ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf2_tumu( @@ -1637,7 +1637,7 @@ void test_vloxseg7ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8m1_tumu( @@ -1660,7 +1660,7 @@ void test_vloxseg7ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf4_tumu( @@ -1683,7 +1683,7 @@ void test_vloxseg7ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf2_tumu( @@ -1706,7 +1706,7 @@ void test_vloxseg7ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16m1_tumu( @@ -1729,7 +1729,7 @@ void test_vloxseg7ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32mf2_tumu( @@ -1752,7 +1752,7 @@ void test_vloxseg7ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32m1_tumu( @@ -1775,7 +1775,7 @@ void test_vloxseg7ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u64m1_tumu( @@ -1798,7 +1798,7 @@ void test_vloxseg7ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf4_mu( @@ -1821,7 +1821,7 @@ void test_vloxseg7ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16mf2_mu( @@ -1844,7 +1844,7 @@ void test_vloxseg7ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f16m1_mu( @@ -1867,7 +1867,7 @@ void test_vloxseg7ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32mf2_mu( @@ -1890,7 +1890,7 @@ void test_vloxseg7ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f32m1_mu( @@ -1913,7 +1913,7 @@ void test_vloxseg7ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_f64m1_mu( @@ -1936,7 +1936,7 @@ void test_vloxseg7ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vloxseg7ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf4_mu( @@ -1982,7 +1982,7 @@ void test_vloxseg7ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8mf2_mu( @@ -2005,7 +2005,7 @@ void test_vloxseg7ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i8m1_mu( @@ -2028,7 +2028,7 @@ void test_vloxseg7ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf4_mu( @@ -2051,7 +2051,7 @@ void test_vloxseg7ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16mf2_mu( @@ -2074,7 +2074,7 @@ void test_vloxseg7ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i16m1_mu( @@ -2097,7 +2097,7 @@ void test_vloxseg7ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32mf2_mu( @@ -2120,7 +2120,7 @@ void test_vloxseg7ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i32m1_mu( @@ -2143,7 +2143,7 @@ void test_vloxseg7ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_i64m1_mu( @@ -2166,7 +2166,7 @@ void test_vloxseg7ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf8_mu( @@ -2189,7 +2189,7 @@ void test_vloxseg7ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf4_mu( @@ -2212,7 +2212,7 @@ void test_vloxseg7ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8mf2_mu( @@ -2235,7 +2235,7 @@ void test_vloxseg7ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u8m1_mu( @@ -2258,7 +2258,7 @@ void test_vloxseg7ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg7ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf4_mu( @@ -2281,7 +2281,7 @@ void test_vloxseg7ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16mf2_mu( @@ -2304,7 +2304,7 @@ void test_vloxseg7ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u16m1_mu( @@ -2327,7 +2327,7 @@ void test_vloxseg7ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg7ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32mf2_mu( @@ -2350,7 +2350,7 @@ void test_vloxseg7ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u32m1_mu( @@ -2373,7 +2373,7 @@ void test_vloxseg7ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg7ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei16_v_u64m1_mu( @@ -2396,6 +2396,6 @@ void test_vloxseg7ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg7ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c index f3b119a531685e008115cb6b39ec1d25ee991c04..6f9379c2e0a25c3e395c7711828cae002d2f6b5a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei32.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vloxseg7ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vloxseg7ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32mf2_tu( @@ -96,7 +96,7 @@ void test_vloxseg7ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32m1_tu( @@ -119,7 +119,7 @@ void test_vloxseg7ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f64m1_tu( @@ -142,7 +142,7 @@ void test_vloxseg7ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf8_tu( @@ -165,7 +165,7 @@ void test_vloxseg7ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf4_tu( @@ -188,7 +188,7 @@ void test_vloxseg7ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf2_tu( @@ -211,7 +211,7 @@ void test_vloxseg7ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8m1_tu( @@ -234,7 +234,7 @@ void test_vloxseg7ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf4_tu( @@ -257,7 +257,7 @@ void test_vloxseg7ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf2_tu( @@ -280,7 +280,7 @@ void test_vloxseg7ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16m1_tu( @@ -303,7 +303,7 @@ void test_vloxseg7ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32mf2_tu( @@ -326,7 +326,7 @@ void test_vloxseg7ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32m1_tu( @@ -349,7 +349,7 @@ void test_vloxseg7ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i64m1_tu( @@ -372,7 +372,7 @@ void test_vloxseg7ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vloxseg7ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf4_tu( @@ -418,7 +418,7 @@ void test_vloxseg7ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf2_tu( @@ -441,7 +441,7 @@ void test_vloxseg7ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8m1_tu( @@ -464,7 +464,7 @@ void test_vloxseg7ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf4_tu( @@ -487,7 +487,7 @@ void test_vloxseg7ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf2_tu( @@ -510,7 +510,7 @@ void test_vloxseg7ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16m1_tu( @@ -533,7 +533,7 @@ void test_vloxseg7ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32mf2_tu( @@ -556,7 +556,7 @@ void test_vloxseg7ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32m1_tu( @@ -579,7 +579,7 @@ void test_vloxseg7ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vloxseg7ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf4_tum( @@ -625,7 +625,7 @@ void test_vloxseg7ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf2_tum( @@ -648,7 +648,7 @@ void test_vloxseg7ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16m1_tum( @@ -671,7 +671,7 @@ void test_vloxseg7ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32mf2_tum( @@ -694,7 +694,7 @@ void test_vloxseg7ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32m1_tum( @@ -717,7 +717,7 @@ void test_vloxseg7ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f64m1_tum( @@ -740,7 +740,7 @@ void test_vloxseg7ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf8_tum( @@ -763,7 +763,7 @@ void test_vloxseg7ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vloxseg7ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf2_tum( @@ -809,7 +809,7 @@ void test_vloxseg7ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8m1_tum( @@ -832,7 +832,7 @@ void test_vloxseg7ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf4_tum( @@ -855,7 +855,7 @@ void test_vloxseg7ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf2_tum( @@ -878,7 +878,7 @@ void test_vloxseg7ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vloxseg7ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32mf2_tum( @@ -924,7 +924,7 @@ void test_vloxseg7ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32m1_tum( @@ -947,7 +947,7 @@ void test_vloxseg7ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i64m1_tum( @@ -970,7 +970,7 @@ void test_vloxseg7ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf8_tum( @@ -993,7 +993,7 @@ void test_vloxseg7ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf4_tum( @@ -1016,7 +1016,7 @@ void test_vloxseg7ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf2_tum( @@ -1039,7 +1039,7 @@ void test_vloxseg7ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8m1_tum( @@ -1062,7 +1062,7 @@ void test_vloxseg7ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf4_tum( @@ -1085,7 +1085,7 @@ void test_vloxseg7ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf2_tum( @@ -1108,7 +1108,7 @@ void test_vloxseg7ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16m1_tum( @@ -1131,7 +1131,7 @@ void test_vloxseg7ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32mf2_tum( @@ -1154,7 +1154,7 @@ void test_vloxseg7ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32m1_tum( @@ -1177,7 +1177,7 @@ void test_vloxseg7ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u64m1_tum( @@ -1200,7 +1200,7 @@ void test_vloxseg7ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf4_tumu( @@ -1223,7 +1223,7 @@ void test_vloxseg7ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf2_tumu( @@ -1246,7 +1246,7 @@ void test_vloxseg7ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16m1_tumu( @@ -1269,7 +1269,7 @@ void test_vloxseg7ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32mf2_tumu( @@ -1292,7 +1292,7 @@ void test_vloxseg7ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32m1_tumu( @@ -1315,7 +1315,7 @@ void test_vloxseg7ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f64m1_tumu( @@ -1338,7 +1338,7 @@ void test_vloxseg7ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf8_tumu( @@ -1361,7 +1361,7 @@ void test_vloxseg7ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf4_tumu( @@ -1384,7 +1384,7 @@ void test_vloxseg7ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf2_tumu( @@ -1407,7 +1407,7 @@ void test_vloxseg7ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8m1_tumu( @@ -1430,7 +1430,7 @@ void test_vloxseg7ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf4_tumu( @@ -1453,7 +1453,7 @@ void test_vloxseg7ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf2_tumu( @@ -1476,7 +1476,7 @@ void test_vloxseg7ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vloxseg7ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32mf2_tumu( @@ -1522,7 +1522,7 @@ void test_vloxseg7ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32m1_tumu( @@ -1545,7 +1545,7 @@ void test_vloxseg7ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i64m1_tumu( @@ -1568,7 +1568,7 @@ void test_vloxseg7ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf8_tumu( @@ -1591,7 +1591,7 @@ void test_vloxseg7ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf4_tumu( @@ -1614,7 +1614,7 @@ void test_vloxseg7ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf2_tumu( @@ -1637,7 +1637,7 @@ void test_vloxseg7ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8m1_tumu( @@ -1660,7 +1660,7 @@ void test_vloxseg7ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf4_tumu( @@ -1683,7 +1683,7 @@ void test_vloxseg7ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf2_tumu( @@ -1706,7 +1706,7 @@ void test_vloxseg7ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16m1_tumu( @@ -1729,7 +1729,7 @@ void test_vloxseg7ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32mf2_tumu( @@ -1752,7 +1752,7 @@ void test_vloxseg7ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32m1_tumu( @@ -1775,7 +1775,7 @@ void test_vloxseg7ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u64m1_tumu( @@ -1798,7 +1798,7 @@ void test_vloxseg7ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf4_mu( @@ -1821,7 +1821,7 @@ void test_vloxseg7ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16mf2_mu( @@ -1844,7 +1844,7 @@ void test_vloxseg7ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f16m1_mu( @@ -1867,7 +1867,7 @@ void test_vloxseg7ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32mf2_mu( @@ -1890,7 +1890,7 @@ void test_vloxseg7ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f32m1_mu( @@ -1913,7 +1913,7 @@ void test_vloxseg7ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_f64m1_mu( @@ -1936,7 +1936,7 @@ void test_vloxseg7ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vloxseg7ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf4_mu( @@ -1982,7 +1982,7 @@ void test_vloxseg7ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8mf2_mu( @@ -2005,7 +2005,7 @@ void test_vloxseg7ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i8m1_mu( @@ -2028,7 +2028,7 @@ void test_vloxseg7ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf4_mu( @@ -2051,7 +2051,7 @@ void test_vloxseg7ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16mf2_mu( @@ -2074,7 +2074,7 @@ void test_vloxseg7ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i16m1_mu( @@ -2097,7 +2097,7 @@ void test_vloxseg7ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32mf2_mu( @@ -2120,7 +2120,7 @@ void test_vloxseg7ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i32m1_mu( @@ -2143,7 +2143,7 @@ void test_vloxseg7ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_i64m1_mu( @@ -2166,7 +2166,7 @@ void test_vloxseg7ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf8_mu( @@ -2189,7 +2189,7 @@ void test_vloxseg7ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf4_mu( @@ -2212,7 +2212,7 @@ void test_vloxseg7ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8mf2_mu( @@ -2235,7 +2235,7 @@ void test_vloxseg7ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u8m1_mu( @@ -2258,7 +2258,7 @@ void test_vloxseg7ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg7ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf4_mu( @@ -2281,7 +2281,7 @@ void test_vloxseg7ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16mf2_mu( @@ -2304,7 +2304,7 @@ void test_vloxseg7ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u16m1_mu( @@ -2327,7 +2327,7 @@ void test_vloxseg7ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg7ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32mf2_mu( @@ -2350,7 +2350,7 @@ void test_vloxseg7ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u32m1_mu( @@ -2373,7 +2373,7 @@ void test_vloxseg7ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg7ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei32_v_u64m1_mu( @@ -2396,6 +2396,6 @@ void test_vloxseg7ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg7ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c index bd54233ce614919c79b0b2efb22be2cb7be8976f..a6ddec2fc1133ad169da115d001ca778e246591c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei64.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vloxseg7ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vloxseg7ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32mf2_tu( @@ -96,7 +96,7 @@ void test_vloxseg7ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32m1_tu( @@ -119,7 +119,7 @@ void test_vloxseg7ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f64m1_tu( @@ -142,7 +142,7 @@ void test_vloxseg7ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf8_tu( @@ -165,7 +165,7 @@ void test_vloxseg7ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf4_tu( @@ -188,7 +188,7 @@ void test_vloxseg7ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf2_tu( @@ -211,7 +211,7 @@ void test_vloxseg7ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8m1_tu( @@ -234,7 +234,7 @@ void test_vloxseg7ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf4_tu( @@ -257,7 +257,7 @@ void test_vloxseg7ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf2_tu( @@ -280,7 +280,7 @@ void test_vloxseg7ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16m1_tu( @@ -303,7 +303,7 @@ void test_vloxseg7ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32mf2_tu( @@ -326,7 +326,7 @@ void test_vloxseg7ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32m1_tu( @@ -349,7 +349,7 @@ void test_vloxseg7ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i64m1_tu( @@ -372,7 +372,7 @@ void test_vloxseg7ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vloxseg7ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf4_tu( @@ -418,7 +418,7 @@ void test_vloxseg7ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf2_tu( @@ -441,7 +441,7 @@ void test_vloxseg7ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8m1_tu( @@ -464,7 +464,7 @@ void test_vloxseg7ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf4_tu( @@ -487,7 +487,7 @@ void test_vloxseg7ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf2_tu( @@ -510,7 +510,7 @@ void test_vloxseg7ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16m1_tu( @@ -533,7 +533,7 @@ void test_vloxseg7ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32mf2_tu( @@ -556,7 +556,7 @@ void test_vloxseg7ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32m1_tu( @@ -579,7 +579,7 @@ void test_vloxseg7ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vloxseg7ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf4_tum( @@ -625,7 +625,7 @@ void test_vloxseg7ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf2_tum( @@ -648,7 +648,7 @@ void test_vloxseg7ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16m1_tum( @@ -671,7 +671,7 @@ void test_vloxseg7ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32mf2_tum( @@ -694,7 +694,7 @@ void test_vloxseg7ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32m1_tum( @@ -717,7 +717,7 @@ void test_vloxseg7ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f64m1_tum( @@ -740,7 +740,7 @@ void test_vloxseg7ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf8_tum( @@ -763,7 +763,7 @@ void test_vloxseg7ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vloxseg7ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf2_tum( @@ -809,7 +809,7 @@ void test_vloxseg7ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8m1_tum( @@ -832,7 +832,7 @@ void test_vloxseg7ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf4_tum( @@ -855,7 +855,7 @@ void test_vloxseg7ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf2_tum( @@ -878,7 +878,7 @@ void test_vloxseg7ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vloxseg7ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32mf2_tum( @@ -924,7 +924,7 @@ void test_vloxseg7ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32m1_tum( @@ -947,7 +947,7 @@ void test_vloxseg7ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i64m1_tum( @@ -970,7 +970,7 @@ void test_vloxseg7ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf8_tum( @@ -993,7 +993,7 @@ void test_vloxseg7ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf4_tum( @@ -1016,7 +1016,7 @@ void test_vloxseg7ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf2_tum( @@ -1039,7 +1039,7 @@ void test_vloxseg7ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8m1_tum( @@ -1062,7 +1062,7 @@ void test_vloxseg7ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf4_tum( @@ -1085,7 +1085,7 @@ void test_vloxseg7ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf2_tum( @@ -1108,7 +1108,7 @@ void test_vloxseg7ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16m1_tum( @@ -1131,7 +1131,7 @@ void test_vloxseg7ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32mf2_tum( @@ -1154,7 +1154,7 @@ void test_vloxseg7ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32m1_tum( @@ -1177,7 +1177,7 @@ void test_vloxseg7ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u64m1_tum( @@ -1200,7 +1200,7 @@ void test_vloxseg7ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf4_tumu( @@ -1223,7 +1223,7 @@ void test_vloxseg7ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf2_tumu( @@ -1246,7 +1246,7 @@ void test_vloxseg7ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16m1_tumu( @@ -1269,7 +1269,7 @@ void test_vloxseg7ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32mf2_tumu( @@ -1292,7 +1292,7 @@ void test_vloxseg7ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32m1_tumu( @@ -1315,7 +1315,7 @@ void test_vloxseg7ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f64m1_tumu( @@ -1338,7 +1338,7 @@ void test_vloxseg7ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf8_tumu( @@ -1361,7 +1361,7 @@ void test_vloxseg7ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf4_tumu( @@ -1384,7 +1384,7 @@ void test_vloxseg7ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf2_tumu( @@ -1407,7 +1407,7 @@ void test_vloxseg7ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8m1_tumu( @@ -1430,7 +1430,7 @@ void test_vloxseg7ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf4_tumu( @@ -1453,7 +1453,7 @@ void test_vloxseg7ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf2_tumu( @@ -1476,7 +1476,7 @@ void test_vloxseg7ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vloxseg7ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32mf2_tumu( @@ -1522,7 +1522,7 @@ void test_vloxseg7ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32m1_tumu( @@ -1545,7 +1545,7 @@ void test_vloxseg7ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i64m1_tumu( @@ -1568,7 +1568,7 @@ void test_vloxseg7ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf8_tumu( @@ -1591,7 +1591,7 @@ void test_vloxseg7ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf4_tumu( @@ -1614,7 +1614,7 @@ void test_vloxseg7ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf2_tumu( @@ -1637,7 +1637,7 @@ void test_vloxseg7ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8m1_tumu( @@ -1660,7 +1660,7 @@ void test_vloxseg7ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf4_tumu( @@ -1683,7 +1683,7 @@ void test_vloxseg7ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf2_tumu( @@ -1706,7 +1706,7 @@ void test_vloxseg7ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16m1_tumu( @@ -1729,7 +1729,7 @@ void test_vloxseg7ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32mf2_tumu( @@ -1752,7 +1752,7 @@ void test_vloxseg7ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32m1_tumu( @@ -1775,7 +1775,7 @@ void test_vloxseg7ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u64m1_tumu( @@ -1798,7 +1798,7 @@ void test_vloxseg7ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf4_mu( @@ -1821,7 +1821,7 @@ void test_vloxseg7ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16mf2_mu( @@ -1844,7 +1844,7 @@ void test_vloxseg7ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f16m1_mu( @@ -1867,7 +1867,7 @@ void test_vloxseg7ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32mf2_mu( @@ -1890,7 +1890,7 @@ void test_vloxseg7ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f32m1_mu( @@ -1913,7 +1913,7 @@ void test_vloxseg7ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_f64m1_mu( @@ -1936,7 +1936,7 @@ void test_vloxseg7ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vloxseg7ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf4_mu( @@ -1982,7 +1982,7 @@ void test_vloxseg7ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8mf2_mu( @@ -2005,7 +2005,7 @@ void test_vloxseg7ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i8m1_mu( @@ -2028,7 +2028,7 @@ void test_vloxseg7ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf4_mu( @@ -2051,7 +2051,7 @@ void test_vloxseg7ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16mf2_mu( @@ -2074,7 +2074,7 @@ void test_vloxseg7ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i16m1_mu( @@ -2097,7 +2097,7 @@ void test_vloxseg7ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32mf2_mu( @@ -2120,7 +2120,7 @@ void test_vloxseg7ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i32m1_mu( @@ -2143,7 +2143,7 @@ void test_vloxseg7ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_i64m1_mu( @@ -2166,7 +2166,7 @@ void test_vloxseg7ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf8_mu( @@ -2189,7 +2189,7 @@ void test_vloxseg7ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf4_mu( @@ -2212,7 +2212,7 @@ void test_vloxseg7ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8mf2_mu( @@ -2235,7 +2235,7 @@ void test_vloxseg7ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u8m1_mu( @@ -2258,7 +2258,7 @@ void test_vloxseg7ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg7ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf4_mu( @@ -2281,7 +2281,7 @@ void test_vloxseg7ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16mf2_mu( @@ -2304,7 +2304,7 @@ void test_vloxseg7ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u16m1_mu( @@ -2327,7 +2327,7 @@ void test_vloxseg7ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg7ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32mf2_mu( @@ -2350,7 +2350,7 @@ void test_vloxseg7ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u32m1_mu( @@ -2373,7 +2373,7 @@ void test_vloxseg7ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg7ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei64_v_u64m1_mu( @@ -2396,6 +2396,6 @@ void test_vloxseg7ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg7ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c index 703089241448bf403175ea733a523ef542708ca0..d4563a0515cfb38cee666102e1343b373dad1382 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg7ei8.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vloxseg7ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vloxseg7ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32mf2_tu( @@ -96,7 +96,7 @@ void test_vloxseg7ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32m1_tu( @@ -119,7 +119,7 @@ void test_vloxseg7ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f64m1_tu( @@ -142,7 +142,7 @@ void test_vloxseg7ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf8_tu( @@ -165,7 +165,7 @@ void test_vloxseg7ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf4_tu( @@ -188,7 +188,7 @@ void test_vloxseg7ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf2_tu( @@ -211,7 +211,7 @@ void test_vloxseg7ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8m1_tu( @@ -234,7 +234,7 @@ void test_vloxseg7ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf4_tu( @@ -257,7 +257,7 @@ void test_vloxseg7ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf2_tu( @@ -280,7 +280,7 @@ void test_vloxseg7ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16m1_tu( @@ -303,7 +303,7 @@ void test_vloxseg7ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32mf2_tu( @@ -326,7 +326,7 @@ void test_vloxseg7ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32m1_tu( @@ -349,7 +349,7 @@ void test_vloxseg7ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i64m1_tu( @@ -372,7 +372,7 @@ void test_vloxseg7ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vloxseg7ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf4_tu( @@ -418,7 +418,7 @@ void test_vloxseg7ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf2_tu( @@ -441,7 +441,7 @@ void test_vloxseg7ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8m1_tu( @@ -464,7 +464,7 @@ void test_vloxseg7ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf4_tu( @@ -487,7 +487,7 @@ void test_vloxseg7ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf2_tu( @@ -510,7 +510,7 @@ void test_vloxseg7ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16m1_tu( @@ -533,7 +533,7 @@ void test_vloxseg7ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32mf2_tu( @@ -556,7 +556,7 @@ void test_vloxseg7ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32m1_tu( @@ -579,7 +579,7 @@ void test_vloxseg7ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vloxseg7ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf4_tum( @@ -625,7 +625,7 @@ void test_vloxseg7ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf2_tum( @@ -648,7 +648,7 @@ void test_vloxseg7ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16m1_tum( @@ -671,7 +671,7 @@ void test_vloxseg7ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32mf2_tum( @@ -694,7 +694,7 @@ void test_vloxseg7ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32m1_tum( @@ -717,7 +717,7 @@ void test_vloxseg7ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f64m1_tum( @@ -740,7 +740,7 @@ void test_vloxseg7ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf8_tum( @@ -763,7 +763,7 @@ void test_vloxseg7ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vloxseg7ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf2_tum( @@ -809,7 +809,7 @@ void test_vloxseg7ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8m1_tum( @@ -832,7 +832,7 @@ void test_vloxseg7ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf4_tum( @@ -855,7 +855,7 @@ void test_vloxseg7ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf2_tum( @@ -878,7 +878,7 @@ void test_vloxseg7ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vloxseg7ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32mf2_tum( @@ -924,7 +924,7 @@ void test_vloxseg7ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32m1_tum( @@ -947,7 +947,7 @@ void test_vloxseg7ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i64m1_tum( @@ -970,7 +970,7 @@ void test_vloxseg7ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf8_tum( @@ -993,7 +993,7 @@ void test_vloxseg7ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf4_tum( @@ -1016,7 +1016,7 @@ void test_vloxseg7ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf2_tum( @@ -1039,7 +1039,7 @@ void test_vloxseg7ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8m1_tum( @@ -1062,7 +1062,7 @@ void test_vloxseg7ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf4_tum( @@ -1085,7 +1085,7 @@ void test_vloxseg7ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf2_tum( @@ -1108,7 +1108,7 @@ void test_vloxseg7ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16m1_tum( @@ -1131,7 +1131,7 @@ void test_vloxseg7ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32mf2_tum( @@ -1154,7 +1154,7 @@ void test_vloxseg7ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32m1_tum( @@ -1177,7 +1177,7 @@ void test_vloxseg7ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u64m1_tum( @@ -1200,7 +1200,7 @@ void test_vloxseg7ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf4_tumu( @@ -1223,7 +1223,7 @@ void test_vloxseg7ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf2_tumu( @@ -1246,7 +1246,7 @@ void test_vloxseg7ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16m1_tumu( @@ -1269,7 +1269,7 @@ void test_vloxseg7ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32mf2_tumu( @@ -1292,7 +1292,7 @@ void test_vloxseg7ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32m1_tumu( @@ -1315,7 +1315,7 @@ void test_vloxseg7ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f64m1_tumu( @@ -1338,7 +1338,7 @@ void test_vloxseg7ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf8_tumu( @@ -1361,7 +1361,7 @@ void test_vloxseg7ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf4_tumu( @@ -1384,7 +1384,7 @@ void test_vloxseg7ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf2_tumu( @@ -1407,7 +1407,7 @@ void test_vloxseg7ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8m1_tumu( @@ -1430,7 +1430,7 @@ void test_vloxseg7ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf4_tumu( @@ -1453,7 +1453,7 @@ void test_vloxseg7ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf2_tumu( @@ -1476,7 +1476,7 @@ void test_vloxseg7ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vloxseg7ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32mf2_tumu( @@ -1522,7 +1522,7 @@ void test_vloxseg7ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32m1_tumu( @@ -1545,7 +1545,7 @@ void test_vloxseg7ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i64m1_tumu( @@ -1568,7 +1568,7 @@ void test_vloxseg7ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf8_tumu( @@ -1591,7 +1591,7 @@ void test_vloxseg7ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf4_tumu( @@ -1614,7 +1614,7 @@ void test_vloxseg7ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf2_tumu( @@ -1637,7 +1637,7 @@ void test_vloxseg7ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8m1_tumu( @@ -1660,7 +1660,7 @@ void test_vloxseg7ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf4_tumu( @@ -1683,7 +1683,7 @@ void test_vloxseg7ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf2_tumu( @@ -1706,7 +1706,7 @@ void test_vloxseg7ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16m1_tumu( @@ -1729,7 +1729,7 @@ void test_vloxseg7ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32mf2_tumu( @@ -1752,7 +1752,7 @@ void test_vloxseg7ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32m1_tumu( @@ -1775,7 +1775,7 @@ void test_vloxseg7ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u64m1_tumu( @@ -1798,7 +1798,7 @@ void test_vloxseg7ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf4_mu( @@ -1821,7 +1821,7 @@ void test_vloxseg7ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16mf2_mu( @@ -1844,7 +1844,7 @@ void test_vloxseg7ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f16m1_mu( @@ -1867,7 +1867,7 @@ void test_vloxseg7ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32mf2_mu( @@ -1890,7 +1890,7 @@ void test_vloxseg7ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f32m1_mu( @@ -1913,7 +1913,7 @@ void test_vloxseg7ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_f64m1_mu( @@ -1936,7 +1936,7 @@ void test_vloxseg7ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vloxseg7ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf4_mu( @@ -1982,7 +1982,7 @@ void test_vloxseg7ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8mf2_mu( @@ -2005,7 +2005,7 @@ void test_vloxseg7ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i8m1_mu( @@ -2028,7 +2028,7 @@ void test_vloxseg7ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf4_mu( @@ -2051,7 +2051,7 @@ void test_vloxseg7ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16mf2_mu( @@ -2074,7 +2074,7 @@ void test_vloxseg7ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i16m1_mu( @@ -2097,7 +2097,7 @@ void test_vloxseg7ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32mf2_mu( @@ -2120,7 +2120,7 @@ void test_vloxseg7ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i32m1_mu( @@ -2143,7 +2143,7 @@ void test_vloxseg7ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_i64m1_mu( @@ -2166,7 +2166,7 @@ void test_vloxseg7ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf8_mu( @@ -2189,7 +2189,7 @@ void test_vloxseg7ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf4_mu( @@ -2212,7 +2212,7 @@ void test_vloxseg7ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8mf2_mu( @@ -2235,7 +2235,7 @@ void test_vloxseg7ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u8m1_mu( @@ -2258,7 +2258,7 @@ void test_vloxseg7ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg7ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf4_mu( @@ -2281,7 +2281,7 @@ void test_vloxseg7ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16mf2_mu( @@ -2304,7 +2304,7 @@ void test_vloxseg7ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u16m1_mu( @@ -2327,7 +2327,7 @@ void test_vloxseg7ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg7ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32mf2_mu( @@ -2350,7 +2350,7 @@ void test_vloxseg7ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u32m1_mu( @@ -2373,7 +2373,7 @@ void test_vloxseg7ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg7ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg7ei8_v_u64m1_mu( @@ -2396,6 +2396,6 @@ void test_vloxseg7ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg7ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg7ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vloxseg7ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei16.c index d431c59e5415cd9e5525f7cf0ab8aab32477ba5a..bd410617870b53b15c53af3a87ca292ad1ebb5d3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei16.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vloxseg8ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vloxseg8ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32mf2_tu( @@ -104,7 +104,7 @@ void test_vloxseg8ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32m1_tu( @@ -129,7 +129,7 @@ void test_vloxseg8ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f64m1_tu( @@ -154,7 +154,7 @@ void test_vloxseg8ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf8_tu( @@ -179,7 +179,7 @@ void test_vloxseg8ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf4_tu( @@ -204,7 +204,7 @@ void test_vloxseg8ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf2_tu( @@ -229,7 +229,7 @@ void test_vloxseg8ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8m1_tu( @@ -254,7 +254,7 @@ void test_vloxseg8ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf4_tu( @@ -279,7 +279,7 @@ void test_vloxseg8ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf2_tu( @@ -304,7 +304,7 @@ void test_vloxseg8ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16m1_tu( @@ -329,7 +329,7 @@ void test_vloxseg8ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32mf2_tu( @@ -354,7 +354,7 @@ void test_vloxseg8ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32m1_tu( @@ -379,7 +379,7 @@ void test_vloxseg8ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i64m1_tu( @@ -404,7 +404,7 @@ void test_vloxseg8ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf8_tu( @@ -429,7 +429,7 @@ void test_vloxseg8ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf4_tu( @@ -454,7 +454,7 @@ void test_vloxseg8ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf2_tu( @@ -479,7 +479,7 @@ void test_vloxseg8ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8m1_tu( @@ -504,7 +504,7 @@ void test_vloxseg8ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf4_tu( @@ -529,7 +529,7 @@ void test_vloxseg8ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf2_tu( @@ -554,7 +554,7 @@ void test_vloxseg8ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16m1_tu( @@ -579,7 +579,7 @@ void test_vloxseg8ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32mf2_tu( @@ -604,7 +604,7 @@ void test_vloxseg8ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32m1_tu( @@ -629,7 +629,7 @@ void test_vloxseg8ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u64m1_tu( @@ -654,7 +654,7 @@ void test_vloxseg8ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf4_tum( @@ -679,7 +679,7 @@ void test_vloxseg8ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf2_tum( @@ -704,7 +704,7 @@ void test_vloxseg8ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16m1_tum( @@ -729,7 +729,7 @@ void test_vloxseg8ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32mf2_tum( @@ -754,7 +754,7 @@ void test_vloxseg8ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32m1_tum( @@ -779,7 +779,7 @@ void test_vloxseg8ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f64m1_tum( @@ -804,7 +804,7 @@ void test_vloxseg8ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf8_tum( @@ -829,7 +829,7 @@ void test_vloxseg8ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf4_tum( @@ -854,7 +854,7 @@ void test_vloxseg8ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf2_tum( @@ -879,7 +879,7 @@ void test_vloxseg8ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8m1_tum( @@ -904,7 +904,7 @@ void test_vloxseg8ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf4_tum( @@ -929,7 +929,7 @@ void test_vloxseg8ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf2_tum( @@ -954,7 +954,7 @@ void test_vloxseg8ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16m1_tum( @@ -979,7 +979,7 @@ void test_vloxseg8ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32mf2_tum( @@ -1004,7 +1004,7 @@ void test_vloxseg8ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32m1_tum( @@ -1029,7 +1029,7 @@ void test_vloxseg8ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i64m1_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg8ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf8_tum( @@ -1079,7 +1079,7 @@ void test_vloxseg8ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf4_tum( @@ -1104,7 +1104,7 @@ void test_vloxseg8ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf2_tum( @@ -1129,7 +1129,7 @@ void test_vloxseg8ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8m1_tum( @@ -1154,7 +1154,7 @@ void test_vloxseg8ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf4_tum( @@ -1179,7 +1179,7 @@ void test_vloxseg8ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf2_tum( @@ -1204,7 +1204,7 @@ void test_vloxseg8ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16m1_tum( @@ -1229,7 +1229,7 @@ void test_vloxseg8ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32mf2_tum( @@ -1254,7 +1254,7 @@ void test_vloxseg8ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32m1_tum( @@ -1279,7 +1279,7 @@ void test_vloxseg8ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u64m1_tum( @@ -1304,7 +1304,7 @@ void test_vloxseg8ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf4_tumu( @@ -1329,7 +1329,7 @@ void test_vloxseg8ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vloxseg8ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16m1_tumu( @@ -1379,7 +1379,7 @@ void test_vloxseg8ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32mf2_tumu( @@ -1404,7 +1404,7 @@ void test_vloxseg8ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32m1_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg8ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f64m1_tumu( @@ -1454,7 +1454,7 @@ void test_vloxseg8ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf8_tumu( @@ -1479,7 +1479,7 @@ void test_vloxseg8ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf4_tumu( @@ -1504,7 +1504,7 @@ void test_vloxseg8ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf2_tumu( @@ -1529,7 +1529,7 @@ void test_vloxseg8ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8m1_tumu( @@ -1554,7 +1554,7 @@ void test_vloxseg8ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf4_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg8ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf2_tumu( @@ -1604,7 +1604,7 @@ void test_vloxseg8ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16m1_tumu( @@ -1629,7 +1629,7 @@ void test_vloxseg8ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32mf2_tumu( @@ -1654,7 +1654,7 @@ void test_vloxseg8ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32m1_tumu( @@ -1679,7 +1679,7 @@ void test_vloxseg8ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i64m1_tumu( @@ -1704,7 +1704,7 @@ void test_vloxseg8ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf8_tumu( @@ -1729,7 +1729,7 @@ void test_vloxseg8ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf4_tumu( @@ -1754,7 +1754,7 @@ void test_vloxseg8ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf2_tumu( @@ -1779,7 +1779,7 @@ void test_vloxseg8ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8m1_tumu( @@ -1804,7 +1804,7 @@ void test_vloxseg8ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf4_tumu( @@ -1829,7 +1829,7 @@ void test_vloxseg8ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf2_tumu( @@ -1854,7 +1854,7 @@ void test_vloxseg8ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16m1_tumu( @@ -1879,7 +1879,7 @@ void test_vloxseg8ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32mf2_tumu( @@ -1904,7 +1904,7 @@ void test_vloxseg8ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32m1_tumu( @@ -1929,7 +1929,7 @@ void test_vloxseg8ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u64m1_tumu( @@ -1954,7 +1954,7 @@ void test_vloxseg8ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf4_mu( @@ -1979,7 +1979,7 @@ void test_vloxseg8ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16mf2_mu( @@ -2004,7 +2004,7 @@ void test_vloxseg8ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f16m1_mu( @@ -2029,7 +2029,7 @@ void test_vloxseg8ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32mf2_mu( @@ -2054,7 +2054,7 @@ void test_vloxseg8ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f32m1_mu( @@ -2079,7 +2079,7 @@ void test_vloxseg8ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_f64m1_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg8ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf8_mu( @@ -2129,7 +2129,7 @@ void test_vloxseg8ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf4_mu( @@ -2154,7 +2154,7 @@ void test_vloxseg8ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8mf2_mu( @@ -2179,7 +2179,7 @@ void test_vloxseg8ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i8m1_mu( @@ -2204,7 +2204,7 @@ void test_vloxseg8ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf4_mu( @@ -2229,7 +2229,7 @@ void test_vloxseg8ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16mf2_mu( @@ -2254,7 +2254,7 @@ void test_vloxseg8ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i16m1_mu( @@ -2279,7 +2279,7 @@ void test_vloxseg8ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32mf2_mu( @@ -2304,7 +2304,7 @@ void test_vloxseg8ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i32m1_mu( @@ -2329,7 +2329,7 @@ void test_vloxseg8ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_i64m1_mu( @@ -2354,7 +2354,7 @@ void test_vloxseg8ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf8_mu( @@ -2379,7 +2379,7 @@ void test_vloxseg8ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf4_mu( @@ -2404,7 +2404,7 @@ void test_vloxseg8ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8mf2_mu( @@ -2429,7 +2429,7 @@ void test_vloxseg8ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u8m1_mu( @@ -2454,7 +2454,7 @@ void test_vloxseg8ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vloxseg8ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf4_mu( @@ -2479,7 +2479,7 @@ void test_vloxseg8ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16mf2_mu( @@ -2504,7 +2504,7 @@ void test_vloxseg8ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u16m1_mu( @@ -2529,7 +2529,7 @@ void test_vloxseg8ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vloxseg8ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32mf2_mu( @@ -2554,7 +2554,7 @@ void test_vloxseg8ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u32m1_mu( @@ -2579,7 +2579,7 @@ void test_vloxseg8ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vloxseg8ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei16_v_u64m1_mu( @@ -2604,6 +2604,6 @@ void test_vloxseg8ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vloxseg8ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c index d084443b453fca15d96e60f5b0e13c072d51f460..dbeb7465b64788f15050aa214859188a21c77aa9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei32.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vloxseg8ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vloxseg8ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32mf2_tu( @@ -104,7 +104,7 @@ void test_vloxseg8ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32m1_tu( @@ -129,7 +129,7 @@ void test_vloxseg8ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f64m1_tu( @@ -154,7 +154,7 @@ void test_vloxseg8ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf8_tu( @@ -179,7 +179,7 @@ void test_vloxseg8ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf4_tu( @@ -204,7 +204,7 @@ void test_vloxseg8ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf2_tu( @@ -229,7 +229,7 @@ void test_vloxseg8ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8m1_tu( @@ -254,7 +254,7 @@ void test_vloxseg8ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf4_tu( @@ -279,7 +279,7 @@ void test_vloxseg8ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf2_tu( @@ -304,7 +304,7 @@ void test_vloxseg8ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16m1_tu( @@ -329,7 +329,7 @@ void test_vloxseg8ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32mf2_tu( @@ -354,7 +354,7 @@ void test_vloxseg8ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32m1_tu( @@ -379,7 +379,7 @@ void test_vloxseg8ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i64m1_tu( @@ -404,7 +404,7 @@ void test_vloxseg8ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf8_tu( @@ -429,7 +429,7 @@ void test_vloxseg8ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf4_tu( @@ -454,7 +454,7 @@ void test_vloxseg8ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf2_tu( @@ -479,7 +479,7 @@ void test_vloxseg8ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8m1_tu( @@ -504,7 +504,7 @@ void test_vloxseg8ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf4_tu( @@ -529,7 +529,7 @@ void test_vloxseg8ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf2_tu( @@ -554,7 +554,7 @@ void test_vloxseg8ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16m1_tu( @@ -579,7 +579,7 @@ void test_vloxseg8ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32mf2_tu( @@ -604,7 +604,7 @@ void test_vloxseg8ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32m1_tu( @@ -629,7 +629,7 @@ void test_vloxseg8ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u64m1_tu( @@ -654,7 +654,7 @@ void test_vloxseg8ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf4_tum( @@ -679,7 +679,7 @@ void test_vloxseg8ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf2_tum( @@ -704,7 +704,7 @@ void test_vloxseg8ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16m1_tum( @@ -729,7 +729,7 @@ void test_vloxseg8ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32mf2_tum( @@ -754,7 +754,7 @@ void test_vloxseg8ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32m1_tum( @@ -779,7 +779,7 @@ void test_vloxseg8ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f64m1_tum( @@ -804,7 +804,7 @@ void test_vloxseg8ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf8_tum( @@ -829,7 +829,7 @@ void test_vloxseg8ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf4_tum( @@ -854,7 +854,7 @@ void test_vloxseg8ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf2_tum( @@ -879,7 +879,7 @@ void test_vloxseg8ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8m1_tum( @@ -904,7 +904,7 @@ void test_vloxseg8ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf4_tum( @@ -929,7 +929,7 @@ void test_vloxseg8ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf2_tum( @@ -954,7 +954,7 @@ void test_vloxseg8ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16m1_tum( @@ -979,7 +979,7 @@ void test_vloxseg8ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32mf2_tum( @@ -1004,7 +1004,7 @@ void test_vloxseg8ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32m1_tum( @@ -1029,7 +1029,7 @@ void test_vloxseg8ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i64m1_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg8ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf8_tum( @@ -1079,7 +1079,7 @@ void test_vloxseg8ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf4_tum( @@ -1104,7 +1104,7 @@ void test_vloxseg8ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf2_tum( @@ -1129,7 +1129,7 @@ void test_vloxseg8ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8m1_tum( @@ -1154,7 +1154,7 @@ void test_vloxseg8ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf4_tum( @@ -1179,7 +1179,7 @@ void test_vloxseg8ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf2_tum( @@ -1204,7 +1204,7 @@ void test_vloxseg8ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16m1_tum( @@ -1229,7 +1229,7 @@ void test_vloxseg8ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32mf2_tum( @@ -1254,7 +1254,7 @@ void test_vloxseg8ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32m1_tum( @@ -1279,7 +1279,7 @@ void test_vloxseg8ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u64m1_tum( @@ -1304,7 +1304,7 @@ void test_vloxseg8ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf4_tumu( @@ -1329,7 +1329,7 @@ void test_vloxseg8ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vloxseg8ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16m1_tumu( @@ -1379,7 +1379,7 @@ void test_vloxseg8ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32mf2_tumu( @@ -1404,7 +1404,7 @@ void test_vloxseg8ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32m1_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg8ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f64m1_tumu( @@ -1454,7 +1454,7 @@ void test_vloxseg8ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf8_tumu( @@ -1479,7 +1479,7 @@ void test_vloxseg8ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf4_tumu( @@ -1504,7 +1504,7 @@ void test_vloxseg8ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf2_tumu( @@ -1529,7 +1529,7 @@ void test_vloxseg8ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8m1_tumu( @@ -1554,7 +1554,7 @@ void test_vloxseg8ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf4_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg8ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf2_tumu( @@ -1604,7 +1604,7 @@ void test_vloxseg8ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16m1_tumu( @@ -1629,7 +1629,7 @@ void test_vloxseg8ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32mf2_tumu( @@ -1654,7 +1654,7 @@ void test_vloxseg8ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32m1_tumu( @@ -1679,7 +1679,7 @@ void test_vloxseg8ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i64m1_tumu( @@ -1704,7 +1704,7 @@ void test_vloxseg8ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf8_tumu( @@ -1729,7 +1729,7 @@ void test_vloxseg8ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf4_tumu( @@ -1754,7 +1754,7 @@ void test_vloxseg8ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf2_tumu( @@ -1779,7 +1779,7 @@ void test_vloxseg8ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8m1_tumu( @@ -1804,7 +1804,7 @@ void test_vloxseg8ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf4_tumu( @@ -1829,7 +1829,7 @@ void test_vloxseg8ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf2_tumu( @@ -1854,7 +1854,7 @@ void test_vloxseg8ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16m1_tumu( @@ -1879,7 +1879,7 @@ void test_vloxseg8ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32mf2_tumu( @@ -1904,7 +1904,7 @@ void test_vloxseg8ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32m1_tumu( @@ -1929,7 +1929,7 @@ void test_vloxseg8ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u64m1_tumu( @@ -1954,7 +1954,7 @@ void test_vloxseg8ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf4_mu( @@ -1979,7 +1979,7 @@ void test_vloxseg8ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16mf2_mu( @@ -2004,7 +2004,7 @@ void test_vloxseg8ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f16m1_mu( @@ -2029,7 +2029,7 @@ void test_vloxseg8ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32mf2_mu( @@ -2054,7 +2054,7 @@ void test_vloxseg8ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f32m1_mu( @@ -2079,7 +2079,7 @@ void test_vloxseg8ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_f64m1_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg8ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf8_mu( @@ -2129,7 +2129,7 @@ void test_vloxseg8ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf4_mu( @@ -2154,7 +2154,7 @@ void test_vloxseg8ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8mf2_mu( @@ -2179,7 +2179,7 @@ void test_vloxseg8ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i8m1_mu( @@ -2204,7 +2204,7 @@ void test_vloxseg8ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf4_mu( @@ -2229,7 +2229,7 @@ void test_vloxseg8ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16mf2_mu( @@ -2254,7 +2254,7 @@ void test_vloxseg8ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i16m1_mu( @@ -2279,7 +2279,7 @@ void test_vloxseg8ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32mf2_mu( @@ -2304,7 +2304,7 @@ void test_vloxseg8ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i32m1_mu( @@ -2329,7 +2329,7 @@ void test_vloxseg8ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_i64m1_mu( @@ -2354,7 +2354,7 @@ void test_vloxseg8ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf8_mu( @@ -2379,7 +2379,7 @@ void test_vloxseg8ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf4_mu( @@ -2404,7 +2404,7 @@ void test_vloxseg8ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8mf2_mu( @@ -2429,7 +2429,7 @@ void test_vloxseg8ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u8m1_mu( @@ -2454,7 +2454,7 @@ void test_vloxseg8ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vloxseg8ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf4_mu( @@ -2479,7 +2479,7 @@ void test_vloxseg8ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16mf2_mu( @@ -2504,7 +2504,7 @@ void test_vloxseg8ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u16m1_mu( @@ -2529,7 +2529,7 @@ void test_vloxseg8ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vloxseg8ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32mf2_mu( @@ -2554,7 +2554,7 @@ void test_vloxseg8ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u32m1_mu( @@ -2579,7 +2579,7 @@ void test_vloxseg8ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vloxseg8ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei32_v_u64m1_mu( @@ -2604,6 +2604,6 @@ void test_vloxseg8ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vloxseg8ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c index 7034521166cf7ed51c8655faf431158ade15c3d9..900bbc827ba5a1d0261858b9a661eb16e529defb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei64.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vloxseg8ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vloxseg8ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32mf2_tu( @@ -104,7 +104,7 @@ void test_vloxseg8ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32m1_tu( @@ -129,7 +129,7 @@ void test_vloxseg8ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f64m1_tu( @@ -154,7 +154,7 @@ void test_vloxseg8ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf8_tu( @@ -179,7 +179,7 @@ void test_vloxseg8ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf4_tu( @@ -204,7 +204,7 @@ void test_vloxseg8ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf2_tu( @@ -229,7 +229,7 @@ void test_vloxseg8ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8m1_tu( @@ -254,7 +254,7 @@ void test_vloxseg8ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf4_tu( @@ -279,7 +279,7 @@ void test_vloxseg8ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf2_tu( @@ -304,7 +304,7 @@ void test_vloxseg8ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16m1_tu( @@ -329,7 +329,7 @@ void test_vloxseg8ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32mf2_tu( @@ -354,7 +354,7 @@ void test_vloxseg8ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32m1_tu( @@ -379,7 +379,7 @@ void test_vloxseg8ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i64m1_tu( @@ -404,7 +404,7 @@ void test_vloxseg8ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf8_tu( @@ -429,7 +429,7 @@ void test_vloxseg8ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf4_tu( @@ -454,7 +454,7 @@ void test_vloxseg8ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf2_tu( @@ -479,7 +479,7 @@ void test_vloxseg8ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8m1_tu( @@ -504,7 +504,7 @@ void test_vloxseg8ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf4_tu( @@ -529,7 +529,7 @@ void test_vloxseg8ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf2_tu( @@ -554,7 +554,7 @@ void test_vloxseg8ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16m1_tu( @@ -579,7 +579,7 @@ void test_vloxseg8ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32mf2_tu( @@ -604,7 +604,7 @@ void test_vloxseg8ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32m1_tu( @@ -629,7 +629,7 @@ void test_vloxseg8ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u64m1_tu( @@ -654,7 +654,7 @@ void test_vloxseg8ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf4_tum( @@ -679,7 +679,7 @@ void test_vloxseg8ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf2_tum( @@ -704,7 +704,7 @@ void test_vloxseg8ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16m1_tum( @@ -729,7 +729,7 @@ void test_vloxseg8ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32mf2_tum( @@ -754,7 +754,7 @@ void test_vloxseg8ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32m1_tum( @@ -779,7 +779,7 @@ void test_vloxseg8ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f64m1_tum( @@ -804,7 +804,7 @@ void test_vloxseg8ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf8_tum( @@ -829,7 +829,7 @@ void test_vloxseg8ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf4_tum( @@ -854,7 +854,7 @@ void test_vloxseg8ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf2_tum( @@ -879,7 +879,7 @@ void test_vloxseg8ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8m1_tum( @@ -904,7 +904,7 @@ void test_vloxseg8ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf4_tum( @@ -929,7 +929,7 @@ void test_vloxseg8ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf2_tum( @@ -954,7 +954,7 @@ void test_vloxseg8ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16m1_tum( @@ -979,7 +979,7 @@ void test_vloxseg8ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32mf2_tum( @@ -1004,7 +1004,7 @@ void test_vloxseg8ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32m1_tum( @@ -1029,7 +1029,7 @@ void test_vloxseg8ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i64m1_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg8ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf8_tum( @@ -1079,7 +1079,7 @@ void test_vloxseg8ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf4_tum( @@ -1104,7 +1104,7 @@ void test_vloxseg8ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf2_tum( @@ -1129,7 +1129,7 @@ void test_vloxseg8ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8m1_tum( @@ -1154,7 +1154,7 @@ void test_vloxseg8ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf4_tum( @@ -1179,7 +1179,7 @@ void test_vloxseg8ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf2_tum( @@ -1204,7 +1204,7 @@ void test_vloxseg8ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16m1_tum( @@ -1229,7 +1229,7 @@ void test_vloxseg8ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32mf2_tum( @@ -1254,7 +1254,7 @@ void test_vloxseg8ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32m1_tum( @@ -1279,7 +1279,7 @@ void test_vloxseg8ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u64m1_tum( @@ -1304,7 +1304,7 @@ void test_vloxseg8ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf4_tumu( @@ -1329,7 +1329,7 @@ void test_vloxseg8ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vloxseg8ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16m1_tumu( @@ -1379,7 +1379,7 @@ void test_vloxseg8ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32mf2_tumu( @@ -1404,7 +1404,7 @@ void test_vloxseg8ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32m1_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg8ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f64m1_tumu( @@ -1454,7 +1454,7 @@ void test_vloxseg8ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf8_tumu( @@ -1479,7 +1479,7 @@ void test_vloxseg8ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf4_tumu( @@ -1504,7 +1504,7 @@ void test_vloxseg8ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf2_tumu( @@ -1529,7 +1529,7 @@ void test_vloxseg8ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8m1_tumu( @@ -1554,7 +1554,7 @@ void test_vloxseg8ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf4_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg8ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf2_tumu( @@ -1604,7 +1604,7 @@ void test_vloxseg8ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16m1_tumu( @@ -1629,7 +1629,7 @@ void test_vloxseg8ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32mf2_tumu( @@ -1654,7 +1654,7 @@ void test_vloxseg8ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32m1_tumu( @@ -1679,7 +1679,7 @@ void test_vloxseg8ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i64m1_tumu( @@ -1704,7 +1704,7 @@ void test_vloxseg8ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf8_tumu( @@ -1729,7 +1729,7 @@ void test_vloxseg8ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf4_tumu( @@ -1754,7 +1754,7 @@ void test_vloxseg8ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf2_tumu( @@ -1779,7 +1779,7 @@ void test_vloxseg8ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8m1_tumu( @@ -1804,7 +1804,7 @@ void test_vloxseg8ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf4_tumu( @@ -1829,7 +1829,7 @@ void test_vloxseg8ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf2_tumu( @@ -1854,7 +1854,7 @@ void test_vloxseg8ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16m1_tumu( @@ -1879,7 +1879,7 @@ void test_vloxseg8ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32mf2_tumu( @@ -1904,7 +1904,7 @@ void test_vloxseg8ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32m1_tumu( @@ -1929,7 +1929,7 @@ void test_vloxseg8ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u64m1_tumu( @@ -1954,7 +1954,7 @@ void test_vloxseg8ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf4_mu( @@ -1979,7 +1979,7 @@ void test_vloxseg8ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16mf2_mu( @@ -2004,7 +2004,7 @@ void test_vloxseg8ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f16m1_mu( @@ -2029,7 +2029,7 @@ void test_vloxseg8ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32mf2_mu( @@ -2054,7 +2054,7 @@ void test_vloxseg8ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f32m1_mu( @@ -2079,7 +2079,7 @@ void test_vloxseg8ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_f64m1_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg8ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf8_mu( @@ -2129,7 +2129,7 @@ void test_vloxseg8ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf4_mu( @@ -2154,7 +2154,7 @@ void test_vloxseg8ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8mf2_mu( @@ -2179,7 +2179,7 @@ void test_vloxseg8ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i8m1_mu( @@ -2204,7 +2204,7 @@ void test_vloxseg8ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf4_mu( @@ -2229,7 +2229,7 @@ void test_vloxseg8ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16mf2_mu( @@ -2254,7 +2254,7 @@ void test_vloxseg8ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i16m1_mu( @@ -2279,7 +2279,7 @@ void test_vloxseg8ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32mf2_mu( @@ -2304,7 +2304,7 @@ void test_vloxseg8ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i32m1_mu( @@ -2329,7 +2329,7 @@ void test_vloxseg8ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_i64m1_mu( @@ -2354,7 +2354,7 @@ void test_vloxseg8ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf8_mu( @@ -2379,7 +2379,7 @@ void test_vloxseg8ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf4_mu( @@ -2404,7 +2404,7 @@ void test_vloxseg8ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8mf2_mu( @@ -2429,7 +2429,7 @@ void test_vloxseg8ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u8m1_mu( @@ -2454,7 +2454,7 @@ void test_vloxseg8ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vloxseg8ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf4_mu( @@ -2479,7 +2479,7 @@ void test_vloxseg8ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16mf2_mu( @@ -2504,7 +2504,7 @@ void test_vloxseg8ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u16m1_mu( @@ -2529,7 +2529,7 @@ void test_vloxseg8ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vloxseg8ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32mf2_mu( @@ -2554,7 +2554,7 @@ void test_vloxseg8ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u32m1_mu( @@ -2579,7 +2579,7 @@ void test_vloxseg8ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vloxseg8ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei64_v_u64m1_mu( @@ -2604,6 +2604,6 @@ void test_vloxseg8ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vloxseg8ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c index 7db880670d643abfe7a80c35fea782cdd49ee539..323a1e8bdde2a052a5d85f6ccbbe2ff2d1a7a5b2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vloxseg8ei8.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vloxseg8ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vloxseg8ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32mf2_tu( @@ -104,7 +104,7 @@ void test_vloxseg8ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32m1_tu( @@ -129,7 +129,7 @@ void test_vloxseg8ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f64m1_tu( @@ -154,7 +154,7 @@ void test_vloxseg8ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf8_tu( @@ -179,7 +179,7 @@ void test_vloxseg8ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf4_tu( @@ -204,7 +204,7 @@ void test_vloxseg8ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf2_tu( @@ -229,7 +229,7 @@ void test_vloxseg8ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8m1_tu( @@ -254,7 +254,7 @@ void test_vloxseg8ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf4_tu( @@ -279,7 +279,7 @@ void test_vloxseg8ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf2_tu( @@ -304,7 +304,7 @@ void test_vloxseg8ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16m1_tu( @@ -329,7 +329,7 @@ void test_vloxseg8ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32mf2_tu( @@ -354,7 +354,7 @@ void test_vloxseg8ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32m1_tu( @@ -379,7 +379,7 @@ void test_vloxseg8ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i64m1_tu( @@ -404,7 +404,7 @@ void test_vloxseg8ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf8_tu( @@ -429,7 +429,7 @@ void test_vloxseg8ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf4_tu( @@ -454,7 +454,7 @@ void test_vloxseg8ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf2_tu( @@ -479,7 +479,7 @@ void test_vloxseg8ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8m1_tu( @@ -504,7 +504,7 @@ void test_vloxseg8ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf4_tu( @@ -529,7 +529,7 @@ void test_vloxseg8ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf2_tu( @@ -554,7 +554,7 @@ void test_vloxseg8ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16m1_tu( @@ -579,7 +579,7 @@ void test_vloxseg8ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32mf2_tu( @@ -604,7 +604,7 @@ void test_vloxseg8ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32m1_tu( @@ -629,7 +629,7 @@ void test_vloxseg8ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u64m1_tu( @@ -654,7 +654,7 @@ void test_vloxseg8ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf4_tum( @@ -679,7 +679,7 @@ void test_vloxseg8ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf2_tum( @@ -704,7 +704,7 @@ void test_vloxseg8ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16m1_tum( @@ -729,7 +729,7 @@ void test_vloxseg8ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32mf2_tum( @@ -754,7 +754,7 @@ void test_vloxseg8ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32m1_tum( @@ -779,7 +779,7 @@ void test_vloxseg8ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f64m1_tum( @@ -804,7 +804,7 @@ void test_vloxseg8ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf8_tum( @@ -829,7 +829,7 @@ void test_vloxseg8ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf4_tum( @@ -854,7 +854,7 @@ void test_vloxseg8ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf2_tum( @@ -879,7 +879,7 @@ void test_vloxseg8ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8m1_tum( @@ -904,7 +904,7 @@ void test_vloxseg8ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf4_tum( @@ -929,7 +929,7 @@ void test_vloxseg8ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf2_tum( @@ -954,7 +954,7 @@ void test_vloxseg8ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16m1_tum( @@ -979,7 +979,7 @@ void test_vloxseg8ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32mf2_tum( @@ -1004,7 +1004,7 @@ void test_vloxseg8ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32m1_tum( @@ -1029,7 +1029,7 @@ void test_vloxseg8ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i64m1_tum( @@ -1054,7 +1054,7 @@ void test_vloxseg8ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf8_tum( @@ -1079,7 +1079,7 @@ void test_vloxseg8ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf4_tum( @@ -1104,7 +1104,7 @@ void test_vloxseg8ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf2_tum( @@ -1129,7 +1129,7 @@ void test_vloxseg8ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8m1_tum( @@ -1154,7 +1154,7 @@ void test_vloxseg8ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf4_tum( @@ -1179,7 +1179,7 @@ void test_vloxseg8ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf2_tum( @@ -1204,7 +1204,7 @@ void test_vloxseg8ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16m1_tum( @@ -1229,7 +1229,7 @@ void test_vloxseg8ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32mf2_tum( @@ -1254,7 +1254,7 @@ void test_vloxseg8ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32m1_tum( @@ -1279,7 +1279,7 @@ void test_vloxseg8ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u64m1_tum( @@ -1304,7 +1304,7 @@ void test_vloxseg8ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf4_tumu( @@ -1329,7 +1329,7 @@ void test_vloxseg8ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vloxseg8ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16m1_tumu( @@ -1379,7 +1379,7 @@ void test_vloxseg8ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32mf2_tumu( @@ -1404,7 +1404,7 @@ void test_vloxseg8ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32m1_tumu( @@ -1429,7 +1429,7 @@ void test_vloxseg8ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f64m1_tumu( @@ -1454,7 +1454,7 @@ void test_vloxseg8ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf8_tumu( @@ -1479,7 +1479,7 @@ void test_vloxseg8ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf4_tumu( @@ -1504,7 +1504,7 @@ void test_vloxseg8ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf2_tumu( @@ -1529,7 +1529,7 @@ void test_vloxseg8ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8m1_tumu( @@ -1554,7 +1554,7 @@ void test_vloxseg8ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf4_tumu( @@ -1579,7 +1579,7 @@ void test_vloxseg8ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf2_tumu( @@ -1604,7 +1604,7 @@ void test_vloxseg8ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16m1_tumu( @@ -1629,7 +1629,7 @@ void test_vloxseg8ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32mf2_tumu( @@ -1654,7 +1654,7 @@ void test_vloxseg8ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32m1_tumu( @@ -1679,7 +1679,7 @@ void test_vloxseg8ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i64m1_tumu( @@ -1704,7 +1704,7 @@ void test_vloxseg8ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf8_tumu( @@ -1729,7 +1729,7 @@ void test_vloxseg8ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf4_tumu( @@ -1754,7 +1754,7 @@ void test_vloxseg8ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf2_tumu( @@ -1779,7 +1779,7 @@ void test_vloxseg8ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8m1_tumu( @@ -1804,7 +1804,7 @@ void test_vloxseg8ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf4_tumu( @@ -1829,7 +1829,7 @@ void test_vloxseg8ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf2_tumu( @@ -1854,7 +1854,7 @@ void test_vloxseg8ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16m1_tumu( @@ -1879,7 +1879,7 @@ void test_vloxseg8ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32mf2_tumu( @@ -1904,7 +1904,7 @@ void test_vloxseg8ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32m1_tumu( @@ -1929,7 +1929,7 @@ void test_vloxseg8ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u64m1_tumu( @@ -1954,7 +1954,7 @@ void test_vloxseg8ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf4_mu( @@ -1979,7 +1979,7 @@ void test_vloxseg8ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16mf2_mu( @@ -2004,7 +2004,7 @@ void test_vloxseg8ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f16m1_mu( @@ -2029,7 +2029,7 @@ void test_vloxseg8ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32mf2_mu( @@ -2054,7 +2054,7 @@ void test_vloxseg8ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f32m1_mu( @@ -2079,7 +2079,7 @@ void test_vloxseg8ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_f64m1_mu( @@ -2104,7 +2104,7 @@ void test_vloxseg8ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf8_mu( @@ -2129,7 +2129,7 @@ void test_vloxseg8ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf4_mu( @@ -2154,7 +2154,7 @@ void test_vloxseg8ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8mf2_mu( @@ -2179,7 +2179,7 @@ void test_vloxseg8ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i8m1_mu( @@ -2204,7 +2204,7 @@ void test_vloxseg8ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf4_mu( @@ -2229,7 +2229,7 @@ void test_vloxseg8ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16mf2_mu( @@ -2254,7 +2254,7 @@ void test_vloxseg8ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i16m1_mu( @@ -2279,7 +2279,7 @@ void test_vloxseg8ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32mf2_mu( @@ -2304,7 +2304,7 @@ void test_vloxseg8ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i32m1_mu( @@ -2329,7 +2329,7 @@ void test_vloxseg8ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_i64m1_mu( @@ -2354,7 +2354,7 @@ void test_vloxseg8ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf8_mu( @@ -2379,7 +2379,7 @@ void test_vloxseg8ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf4_mu( @@ -2404,7 +2404,7 @@ void test_vloxseg8ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8mf2_mu( @@ -2429,7 +2429,7 @@ void test_vloxseg8ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u8m1_mu( @@ -2454,7 +2454,7 @@ void test_vloxseg8ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vloxseg8ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf4_mu( @@ -2479,7 +2479,7 @@ void test_vloxseg8ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16mf2_mu( @@ -2504,7 +2504,7 @@ void test_vloxseg8ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u16m1_mu( @@ -2529,7 +2529,7 @@ void test_vloxseg8ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vloxseg8ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32mf2_mu( @@ -2554,7 +2554,7 @@ void test_vloxseg8ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u32m1_mu( @@ -2579,7 +2579,7 @@ void test_vloxseg8ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vloxseg8ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vloxseg8ei8_v_u64m1_mu( @@ -2604,6 +2604,6 @@ void test_vloxseg8ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vloxseg8ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vloxseg8ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vloxseg8ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse16.c index 1bd8c50ab29c5cb87bc827f37157053419cfb650..a829305a0e038e38317dd1c46e930ec6706cdca6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlse16_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16mf4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vlse16_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *b // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlse16_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16mf2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vlse16_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *b // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlse16_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vlse16_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlse16_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vlse16_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlse16_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vlse16_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlse16_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf4_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vlse16_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlse16_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16mf4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf2_tu( @@ -76,7 +76,7 @@ vint16mf4_t test_vlse16_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlse16_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16mf2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m1_tu( @@ -85,7 +85,7 @@ vint16mf2_t test_vlse16_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlse16_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m2_tu( @@ -94,7 +94,7 @@ vint16m1_t test_vlse16_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlse16_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m4_tu( @@ -103,7 +103,7 @@ vint16m2_t test_vlse16_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlse16_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m8_tu( @@ -112,7 +112,7 @@ vint16m4_t test_vlse16_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlse16_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf4_tu( @@ -121,7 +121,7 @@ vint16m8_t test_vlse16_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlse16_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16mf4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf2_tu( @@ -130,7 +130,7 @@ vuint16mf4_t test_vlse16_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlse16_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16mf2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m1_tu( @@ -139,7 +139,7 @@ vuint16mf2_t test_vlse16_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlse16_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m2_tu( @@ -148,7 +148,7 @@ vuint16m1_t test_vlse16_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlse16_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m4_tu( @@ -157,7 +157,7 @@ vuint16m2_t test_vlse16_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlse16_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m8_tu( @@ -166,7 +166,7 @@ vuint16m4_t test_vlse16_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlse16_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf4_tum( @@ -175,7 +175,7 @@ vuint16m8_t test_vlse16_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlse16_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16mf4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf2_tum( @@ -184,7 +184,7 @@ vfloat16mf4_t test_vlse16_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlse16_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16mf2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m1_tum( @@ -193,7 +193,7 @@ vfloat16mf2_t test_vlse16_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlse16_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m2_tum( @@ -202,7 +202,7 @@ vfloat16m1_t test_vlse16_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlse16_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m4_tum( @@ -211,7 +211,7 @@ vfloat16m2_t test_vlse16_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlse16_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m8_tum( @@ -220,7 +220,7 @@ vfloat16m4_t test_vlse16_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlse16_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf4_tum( @@ -229,7 +229,7 @@ vfloat16m8_t test_vlse16_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlse16_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16mf4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf2_tum( @@ -238,7 +238,7 @@ vint16mf4_t test_vlse16_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlse16_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16mf2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m1_tum( @@ -247,7 +247,7 @@ vint16mf2_t test_vlse16_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlse16_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m2_tum( @@ -256,7 +256,7 @@ vint16m1_t test_vlse16_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlse16_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m4_tum( @@ -265,7 +265,7 @@ vint16m2_t test_vlse16_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlse16_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m8_tum( @@ -274,7 +274,7 @@ vint16m4_t test_vlse16_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlse16_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf4_tum( @@ -283,7 +283,7 @@ vint16m8_t test_vlse16_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlse16_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16mf4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf2_tum( @@ -292,7 +292,7 @@ vuint16mf4_t test_vlse16_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlse16_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16mf2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m1_tum( @@ -301,7 +301,7 @@ vuint16mf2_t test_vlse16_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlse16_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m2_tum( @@ -310,7 +310,7 @@ vuint16m1_t test_vlse16_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlse16_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m4_tum( @@ -319,7 +319,7 @@ vuint16m2_t test_vlse16_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlse16_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m8_tum( @@ -328,7 +328,7 @@ vuint16m4_t test_vlse16_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlse16_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf4_tumu( @@ -337,7 +337,7 @@ vuint16m8_t test_vlse16_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlse16_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16mf4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf2_tumu( @@ -346,7 +346,7 @@ vfloat16mf4_t test_vlse16_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlse16_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16mf2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m1_tumu( @@ -355,7 +355,7 @@ vfloat16mf2_t test_vlse16_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlse16_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m2_tumu( @@ -364,7 +364,7 @@ vfloat16m1_t test_vlse16_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlse16_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m4_tumu( @@ -373,7 +373,7 @@ vfloat16m2_t test_vlse16_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlse16_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m8_tumu( @@ -382,7 +382,7 @@ vfloat16m4_t test_vlse16_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlse16_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf4_tumu( @@ -391,7 +391,7 @@ vfloat16m8_t test_vlse16_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlse16_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16mf4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf2_tumu( @@ -400,7 +400,7 @@ vint16mf4_t test_vlse16_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlse16_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16mf2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m1_tumu( @@ -409,7 +409,7 @@ vint16mf2_t test_vlse16_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlse16_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m2_tumu( @@ -418,7 +418,7 @@ vint16m1_t test_vlse16_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlse16_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m4_tumu( @@ -427,7 +427,7 @@ vint16m2_t test_vlse16_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlse16_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m8_tumu( @@ -436,7 +436,7 @@ vint16m4_t test_vlse16_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlse16_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf4_tumu( @@ -445,7 +445,7 @@ vint16m8_t test_vlse16_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlse16_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16mf4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf2_tumu( @@ -454,7 +454,7 @@ vuint16mf4_t test_vlse16_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlse16_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16mf2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m1_tumu( @@ -463,7 +463,7 @@ vuint16mf2_t test_vlse16_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlse16_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m2_tumu( @@ -472,7 +472,7 @@ vuint16m1_t test_vlse16_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlse16_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m4_tumu( @@ -481,7 +481,7 @@ vuint16m2_t test_vlse16_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlse16_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m8_tumu( @@ -490,7 +490,7 @@ vuint16m4_t test_vlse16_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlse16_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf4_mu( @@ -499,7 +499,7 @@ vuint16m8_t test_vlse16_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vlse16_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16mf4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16mf2_mu( @@ -508,7 +508,7 @@ vfloat16mf4_t test_vlse16_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vlse16_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16mf2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16mf2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m1_mu( @@ -517,7 +517,7 @@ vfloat16mf2_t test_vlse16_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vlse16_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m2_mu( @@ -526,7 +526,7 @@ vfloat16m1_t test_vlse16_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vlse16_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m4_mu( @@ -535,7 +535,7 @@ vfloat16m2_t test_vlse16_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vlse16_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_f16m8_mu( @@ -544,7 +544,7 @@ vfloat16m4_t test_vlse16_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vlse16_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_f16m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_f16m8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf4_mu( @@ -553,7 +553,7 @@ vfloat16m8_t test_vlse16_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vlse16_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16mf4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16mf2_mu( @@ -562,7 +562,7 @@ vint16mf4_t test_vlse16_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vlse16_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16mf2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16mf2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m1_mu( @@ -571,7 +571,7 @@ vint16mf2_t test_vlse16_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vlse16_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m2_mu( @@ -580,7 +580,7 @@ vint16m1_t test_vlse16_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vlse16_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m4_mu( @@ -589,7 +589,7 @@ vint16m2_t test_vlse16_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vlse16_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_i16m8_mu( @@ -598,7 +598,7 @@ vint16m4_t test_vlse16_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vlse16_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_i16m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_i16m8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf4_mu( @@ -607,7 +607,7 @@ vint16m8_t test_vlse16_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vlse16_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16mf4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16mf2_mu( @@ -616,7 +616,7 @@ vuint16mf4_t test_vlse16_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vlse16_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16mf2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16mf2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m1_mu( @@ -625,7 +625,7 @@ vuint16mf2_t test_vlse16_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vlse16_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m2_mu( @@ -634,7 +634,7 @@ vuint16m1_t test_vlse16_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vlse16_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m4_mu( @@ -643,7 +643,7 @@ vuint16m2_t test_vlse16_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vlse16_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse16_v_u16m8_mu( @@ -652,6 +652,6 @@ vuint16m4_t test_vlse16_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vlse16_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlse16_v_u16m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse16_v_u16m8_mu(mask, maskedoff, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse32.c index e3d59fa60c29dd0d0d959f5a77fb8d01ee9b2b94..5671f3f9efa0c02dadea87e1ee9422a3bd1194ac 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlse32_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32mf2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32mf2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m1_tu( @@ -22,7 +22,7 @@ vfloat32mf2_t test_vlse32_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlse32_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m2_tu( @@ -31,7 +31,7 @@ vfloat32m1_t test_vlse32_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, p // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlse32_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m4_tu( @@ -40,7 +40,7 @@ vfloat32m2_t test_vlse32_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, p // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlse32_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m8_tu( @@ -49,7 +49,7 @@ vfloat32m4_t test_vlse32_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, p // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlse32_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32mf2_tu( @@ -58,7 +58,7 @@ vfloat32m8_t test_vlse32_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, p // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlse32_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32mf2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32mf2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m1_tu( @@ -67,7 +67,7 @@ vint32mf2_t test_vlse32_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlse32_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m2_tu( @@ -76,7 +76,7 @@ vint32m1_t test_vlse32_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlse32_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m4_tu( @@ -85,7 +85,7 @@ vint32m2_t test_vlse32_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlse32_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m8_tu( @@ -94,7 +94,7 @@ vint32m4_t test_vlse32_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlse32_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32mf2_tu( @@ -103,7 +103,7 @@ vint32m8_t test_vlse32_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlse32_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32mf2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32mf2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m1_tu( @@ -112,7 +112,7 @@ vuint32mf2_t test_vlse32_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlse32_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m2_tu( @@ -121,7 +121,7 @@ vuint32m1_t test_vlse32_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlse32_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m4_tu( @@ -130,7 +130,7 @@ vuint32m2_t test_vlse32_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlse32_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m8_tu( @@ -139,7 +139,7 @@ vuint32m4_t test_vlse32_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlse32_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32mf2_tum( @@ -148,7 +148,7 @@ vuint32m8_t test_vlse32_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlse32_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32mf2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32mf2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m1_tum( @@ -157,7 +157,7 @@ vfloat32mf2_t test_vlse32_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlse32_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m2_tum( @@ -166,7 +166,7 @@ vfloat32m1_t test_vlse32_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlse32_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m4_tum( @@ -175,7 +175,7 @@ vfloat32m2_t test_vlse32_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlse32_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m8_tum( @@ -184,7 +184,7 @@ vfloat32m4_t test_vlse32_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlse32_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32mf2_tum( @@ -193,7 +193,7 @@ vfloat32m8_t test_vlse32_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlse32_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32mf2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32mf2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m1_tum( @@ -202,7 +202,7 @@ vint32mf2_t test_vlse32_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlse32_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m2_tum( @@ -211,7 +211,7 @@ vint32m1_t test_vlse32_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlse32_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m4_tum( @@ -220,7 +220,7 @@ vint32m2_t test_vlse32_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlse32_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m8_tum( @@ -229,7 +229,7 @@ vint32m4_t test_vlse32_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlse32_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32mf2_tum( @@ -238,7 +238,7 @@ vint32m8_t test_vlse32_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlse32_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32mf2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32mf2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m1_tum( @@ -247,7 +247,7 @@ vuint32mf2_t test_vlse32_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlse32_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m2_tum( @@ -256,7 +256,7 @@ vuint32m1_t test_vlse32_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlse32_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m4_tum( @@ -265,7 +265,7 @@ vuint32m2_t test_vlse32_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlse32_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m8_tum( @@ -274,7 +274,7 @@ vuint32m4_t test_vlse32_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlse32_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32mf2_tumu( @@ -283,7 +283,7 @@ vuint32m8_t test_vlse32_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlse32_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32mf2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32mf2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m1_tumu( @@ -292,7 +292,7 @@ vfloat32mf2_t test_vlse32_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlse32_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m2_tumu( @@ -301,7 +301,7 @@ vfloat32m1_t test_vlse32_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlse32_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m4_tumu( @@ -310,7 +310,7 @@ vfloat32m2_t test_vlse32_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlse32_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m8_tumu( @@ -319,7 +319,7 @@ vfloat32m4_t test_vlse32_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlse32_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32mf2_tumu( @@ -328,7 +328,7 @@ vfloat32m8_t test_vlse32_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlse32_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32mf2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32mf2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m1_tumu( @@ -337,7 +337,7 @@ vint32mf2_t test_vlse32_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlse32_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m2_tumu( @@ -346,7 +346,7 @@ vint32m1_t test_vlse32_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlse32_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m4_tumu( @@ -355,7 +355,7 @@ vint32m2_t test_vlse32_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlse32_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m8_tumu( @@ -364,7 +364,7 @@ vint32m4_t test_vlse32_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlse32_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32mf2_tumu( @@ -373,7 +373,7 @@ vint32m8_t test_vlse32_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlse32_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32mf2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32mf2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m1_tumu( @@ -382,7 +382,7 @@ vuint32mf2_t test_vlse32_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlse32_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m2_tumu( @@ -391,7 +391,7 @@ vuint32m1_t test_vlse32_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlse32_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m4_tumu( @@ -400,7 +400,7 @@ vuint32m2_t test_vlse32_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlse32_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m8_tumu( @@ -409,7 +409,7 @@ vuint32m4_t test_vlse32_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlse32_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32mf2_mu( @@ -418,7 +418,7 @@ vuint32m8_t test_vlse32_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vlse32_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32mf2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32mf2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m1_mu( @@ -427,7 +427,7 @@ vfloat32mf2_t test_vlse32_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vlse32_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m2_mu( @@ -436,7 +436,7 @@ vfloat32m1_t test_vlse32_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vlse32_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m4_mu( @@ -445,7 +445,7 @@ vfloat32m2_t test_vlse32_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vlse32_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_f32m8_mu( @@ -454,7 +454,7 @@ vfloat32m4_t test_vlse32_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vlse32_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_f32m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_f32m8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32mf2_mu( @@ -463,7 +463,7 @@ vfloat32m8_t test_vlse32_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vlse32_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32mf2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32mf2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m1_mu( @@ -472,7 +472,7 @@ vint32mf2_t test_vlse32_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vlse32_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m2_mu( @@ -481,7 +481,7 @@ vint32m1_t test_vlse32_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vlse32_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m4_mu( @@ -490,7 +490,7 @@ vint32m2_t test_vlse32_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vlse32_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_i32m8_mu( @@ -499,7 +499,7 @@ vint32m4_t test_vlse32_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vlse32_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_i32m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_i32m8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32mf2_mu( @@ -508,7 +508,7 @@ vint32m8_t test_vlse32_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vlse32_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32mf2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32mf2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m1_mu( @@ -517,7 +517,7 @@ vuint32mf2_t test_vlse32_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vlse32_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m2_mu( @@ -526,7 +526,7 @@ vuint32m1_t test_vlse32_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vlse32_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m4_mu( @@ -535,7 +535,7 @@ vuint32m2_t test_vlse32_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vlse32_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse32_v_u32m8_mu( @@ -544,6 +544,6 @@ vuint32m4_t test_vlse32_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vlse32_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlse32_v_u32m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse32_v_u32m8_mu(mask, maskedoff, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse64.c index dc5b5bec137e3bcafc529aeb2bc42068dd19f1be..6e09776f860c8621237503d8e1b34ad7e058faa1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlse64_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m2_tu( @@ -22,7 +22,7 @@ vfloat64m1_t test_vlse64_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlse64_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m4_tu( @@ -31,7 +31,7 @@ vfloat64m2_t test_vlse64_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlse64_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m8_tu( @@ -40,7 +40,7 @@ vfloat64m4_t test_vlse64_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlse64_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m1_tu( @@ -49,7 +49,7 @@ vfloat64m8_t test_vlse64_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlse64_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m2_tu( @@ -58,7 +58,7 @@ vint64m1_t test_vlse64_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlse64_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m4_tu( @@ -67,7 +67,7 @@ vint64m2_t test_vlse64_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlse64_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m8_tu( @@ -76,7 +76,7 @@ vint64m4_t test_vlse64_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlse64_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m1_tu( @@ -85,7 +85,7 @@ vint64m8_t test_vlse64_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, ptr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlse64_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m2_tu( @@ -94,7 +94,7 @@ vuint64m1_t test_vlse64_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlse64_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m4_tu( @@ -103,7 +103,7 @@ vuint64m2_t test_vlse64_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlse64_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m8_tu( @@ -112,7 +112,7 @@ vuint64m4_t test_vlse64_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlse64_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m1_tum( @@ -121,7 +121,7 @@ vuint64m8_t test_vlse64_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlse64_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m2_tum( @@ -130,7 +130,7 @@ vfloat64m1_t test_vlse64_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlse64_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m4_tum( @@ -139,7 +139,7 @@ vfloat64m2_t test_vlse64_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlse64_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m8_tum( @@ -148,7 +148,7 @@ vfloat64m4_t test_vlse64_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlse64_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m1_tum( @@ -157,7 +157,7 @@ vfloat64m8_t test_vlse64_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlse64_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m2_tum( @@ -166,7 +166,7 @@ vint64m1_t test_vlse64_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlse64_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m4_tum( @@ -175,7 +175,7 @@ vint64m2_t test_vlse64_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlse64_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m8_tum( @@ -184,7 +184,7 @@ vint64m4_t test_vlse64_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlse64_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m1_tum( @@ -193,7 +193,7 @@ vint64m8_t test_vlse64_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlse64_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m2_tum( @@ -202,7 +202,7 @@ vuint64m1_t test_vlse64_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlse64_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m4_tum( @@ -211,7 +211,7 @@ vuint64m2_t test_vlse64_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlse64_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m8_tum( @@ -220,7 +220,7 @@ vuint64m4_t test_vlse64_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlse64_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m1_tumu( @@ -229,7 +229,7 @@ vuint64m8_t test_vlse64_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlse64_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m2_tumu( @@ -238,7 +238,7 @@ vfloat64m1_t test_vlse64_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlse64_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m4_tumu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vlse64_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlse64_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m8_tumu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vlse64_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlse64_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m1_tumu( @@ -265,7 +265,7 @@ vfloat64m8_t test_vlse64_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlse64_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m2_tumu( @@ -274,7 +274,7 @@ vint64m1_t test_vlse64_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlse64_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m4_tumu( @@ -283,7 +283,7 @@ vint64m2_t test_vlse64_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlse64_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m8_tumu( @@ -292,7 +292,7 @@ vint64m4_t test_vlse64_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlse64_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m1_tumu( @@ -301,7 +301,7 @@ vint64m8_t test_vlse64_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlse64_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m2_tumu( @@ -310,7 +310,7 @@ vuint64m1_t test_vlse64_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlse64_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m4_tumu( @@ -319,7 +319,7 @@ vuint64m2_t test_vlse64_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlse64_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m8_tumu( @@ -328,7 +328,7 @@ vuint64m4_t test_vlse64_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlse64_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m1_mu( @@ -337,7 +337,7 @@ vuint64m8_t test_vlse64_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vlse64_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m2_mu( @@ -346,7 +346,7 @@ vfloat64m1_t test_vlse64_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vlse64_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m4_mu( @@ -355,7 +355,7 @@ vfloat64m2_t test_vlse64_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vlse64_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_f64m8_mu( @@ -364,7 +364,7 @@ vfloat64m4_t test_vlse64_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vlse64_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_f64m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_f64m8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m1_mu( @@ -373,7 +373,7 @@ vfloat64m8_t test_vlse64_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vlse64_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m2_mu( @@ -382,7 +382,7 @@ vint64m1_t test_vlse64_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vlse64_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m4_mu( @@ -391,7 +391,7 @@ vint64m2_t test_vlse64_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vlse64_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_i64m8_mu( @@ -400,7 +400,7 @@ vint64m4_t test_vlse64_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vlse64_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_i64m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_i64m8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m1_mu( @@ -409,7 +409,7 @@ vint64m8_t test_vlse64_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vlse64_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m2_mu( @@ -418,7 +418,7 @@ vuint64m1_t test_vlse64_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vlse64_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m4_mu( @@ -427,7 +427,7 @@ vuint64m2_t test_vlse64_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vlse64_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse64_v_u64m8_mu( @@ -436,6 +436,6 @@ vuint64m4_t test_vlse64_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vlse64_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlse64_v_u64m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse64_v_u64m8_mu(mask, maskedoff, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse8.c index c89e6f87695833aded85d5ea7fceab42179c3d33..974fb444f8672e39b52fadeaa88e353ea68f9e72 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlse8.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlse8_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf4_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vlse8_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlse8_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf2_tu( @@ -30,7 +30,7 @@ vint8mf4_t test_vlse8_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlse8_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m1_tu( @@ -39,7 +39,7 @@ vint8mf2_t test_vlse8_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlse8_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m2_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vlse8_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlse8_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m4_tu( @@ -57,7 +57,7 @@ vint8m2_t test_vlse8_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlse8_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m8_tu( @@ -66,7 +66,7 @@ vint8m4_t test_vlse8_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlse8_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf8_tu( @@ -75,7 +75,7 @@ vint8m8_t test_vlse8_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, ptrdiff_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlse8_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf4_tu( @@ -84,7 +84,7 @@ vuint8mf8_t test_vlse8_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, pt // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlse8_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf2_tu( @@ -93,7 +93,7 @@ vuint8mf4_t test_vlse8_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, pt // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlse8_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m1_tu( @@ -102,7 +102,7 @@ vuint8mf2_t test_vlse8_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, pt // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlse8_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m1_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m1_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m2_tu( @@ -111,7 +111,7 @@ vuint8m1_t test_vlse8_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlse8_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m2_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m2_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m4_tu( @@ -120,7 +120,7 @@ vuint8m2_t test_vlse8_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlse8_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m4_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m4_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m4_t test_vlse8_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlse8_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m8_tu(maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m8_tu(maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf8_tum( @@ -138,7 +138,7 @@ vuint8m8_t test_vlse8_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, ptrdi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlse8_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf4_tum( @@ -147,7 +147,7 @@ vint8mf8_t test_vlse8_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlse8_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf2_tum( @@ -156,7 +156,7 @@ vint8mf4_t test_vlse8_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlse8_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m1_tum( @@ -165,7 +165,7 @@ vint8mf2_t test_vlse8_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlse8_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m2_tum( @@ -174,7 +174,7 @@ vint8m1_t test_vlse8_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlse8_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m4_tum( @@ -183,7 +183,7 @@ vint8m2_t test_vlse8_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlse8_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m8_tum( @@ -192,7 +192,7 @@ vint8m4_t test_vlse8_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlse8_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf8_tum( @@ -201,7 +201,7 @@ vint8m8_t test_vlse8_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlse8_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf4_tum( @@ -210,7 +210,7 @@ vuint8mf8_t test_vlse8_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlse8_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf2_tum( @@ -219,7 +219,7 @@ vuint8mf4_t test_vlse8_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlse8_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m1_tum( @@ -228,7 +228,7 @@ vuint8mf2_t test_vlse8_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlse8_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m1_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m1_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m2_tum( @@ -237,7 +237,7 @@ vuint8m1_t test_vlse8_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlse8_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m2_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m2_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m4_tum( @@ -246,7 +246,7 @@ vuint8m2_t test_vlse8_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlse8_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m4_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m4_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m8_tum( @@ -255,7 +255,7 @@ vuint8m4_t test_vlse8_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlse8_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m8_tum(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m8_tum(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf8_tumu( @@ -264,7 +264,7 @@ vuint8m8_t test_vlse8_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const uint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlse8_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf4_tumu( @@ -273,7 +273,7 @@ vint8mf8_t test_vlse8_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlse8_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf2_tumu( @@ -282,7 +282,7 @@ vint8mf4_t test_vlse8_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlse8_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m1_tumu( @@ -291,7 +291,7 @@ vint8mf2_t test_vlse8_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlse8_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m2_tumu( @@ -300,7 +300,7 @@ vint8m1_t test_vlse8_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlse8_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m4_tumu( @@ -309,7 +309,7 @@ vint8m2_t test_vlse8_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlse8_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m8_tumu( @@ -318,7 +318,7 @@ vint8m4_t test_vlse8_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlse8_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf8_tumu( @@ -327,7 +327,7 @@ vint8m8_t test_vlse8_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlse8_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf4_tumu( @@ -336,7 +336,7 @@ vuint8mf8_t test_vlse8_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlse8_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf2_tumu( @@ -345,7 +345,7 @@ vuint8mf4_t test_vlse8_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlse8_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m1_tumu( @@ -354,7 +354,7 @@ vuint8mf2_t test_vlse8_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlse8_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m1_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m1_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m2_tumu( @@ -363,7 +363,7 @@ vuint8m1_t test_vlse8_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlse8_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m2_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m2_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m4_tumu( @@ -372,7 +372,7 @@ vuint8m2_t test_vlse8_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlse8_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m4_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m4_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m8_tumu( @@ -381,7 +381,7 @@ vuint8m4_t test_vlse8_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlse8_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m8_tumu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m8_tumu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf8_mu( @@ -390,7 +390,7 @@ vuint8m8_t test_vlse8_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vlse8_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf4_mu( @@ -399,7 +399,7 @@ vint8mf8_t test_vlse8_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vlse8_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8mf2_mu( @@ -408,7 +408,7 @@ vint8mf4_t test_vlse8_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vlse8_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8mf2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8mf2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m1_mu( @@ -417,7 +417,7 @@ vint8mf2_t test_vlse8_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vlse8_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m2_mu( @@ -426,7 +426,7 @@ vint8m1_t test_vlse8_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vlse8_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m4_mu( @@ -435,7 +435,7 @@ vint8m2_t test_vlse8_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vlse8_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_i8m8_mu( @@ -444,7 +444,7 @@ vint8m4_t test_vlse8_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vlse8_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_i8m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_i8m8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf8_mu( @@ -453,7 +453,7 @@ vint8m8_t test_vlse8_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vlse8_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf8_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf4_mu( @@ -462,7 +462,7 @@ vuint8mf8_t test_vlse8_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vlse8_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8mf2_mu( @@ -471,7 +471,7 @@ vuint8mf4_t test_vlse8_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vlse8_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8mf2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8mf2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m1_mu( @@ -480,7 +480,7 @@ vuint8mf2_t test_vlse8_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vlse8_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m1_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m1_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m2_mu( @@ -489,7 +489,7 @@ vuint8m1_t test_vlse8_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vlse8_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m2_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m2_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m4_mu( @@ -498,7 +498,7 @@ vuint8m2_t test_vlse8_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vlse8_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m4_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m4_mu(mask, maskedoff, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlse8_v_u8m8_mu( @@ -507,6 +507,6 @@ vuint8m4_t test_vlse8_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vlse8_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlse8_v_u8m8_mu(mask, maskedoff, base, bstride, vl); + return __riscv_vlse8_v_u8m8_mu(mask, maskedoff, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16.c index c3ec6f0b2ead9f76464a58538428f9988b6bb8ab..a97de2450aed878c9c0f2a4818907df312047051 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vlseg2e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vlseg2e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vlseg2e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m4_tu( @@ -69,7 +69,7 @@ void test_vlseg2e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf4_tu( @@ -82,7 +82,7 @@ void test_vlseg2e16_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf2_tu( @@ -95,7 +95,7 @@ void test_vlseg2e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m1_tu( @@ -108,7 +108,7 @@ void test_vlseg2e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m2_tu( @@ -121,7 +121,7 @@ void test_vlseg2e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m4_tu( @@ -134,7 +134,7 @@ void test_vlseg2e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf4_tu( @@ -147,7 +147,7 @@ void test_vlseg2e16_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf2_tu( @@ -160,7 +160,7 @@ void test_vlseg2e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m1_tu( @@ -173,7 +173,7 @@ void test_vlseg2e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m2_tu( @@ -186,7 +186,7 @@ void test_vlseg2e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m4_tu( @@ -199,7 +199,7 @@ void test_vlseg2e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf4_tum( @@ -212,7 +212,7 @@ void test_vlseg2e16_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf2_tum( @@ -225,7 +225,7 @@ void test_vlseg2e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m1_tum( @@ -238,7 +238,7 @@ void test_vlseg2e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m2_tum( @@ -251,7 +251,7 @@ void test_vlseg2e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m4_tum( @@ -264,7 +264,7 @@ void test_vlseg2e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf4_tum( @@ -277,7 +277,7 @@ void test_vlseg2e16_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf2_tum( @@ -290,7 +290,7 @@ void test_vlseg2e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m1_tum( @@ -303,7 +303,7 @@ void test_vlseg2e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m2_tum( @@ -316,7 +316,7 @@ void test_vlseg2e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m4_tum( @@ -329,7 +329,7 @@ void test_vlseg2e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf4_tum( @@ -342,7 +342,7 @@ void test_vlseg2e16_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf2_tum( @@ -355,7 +355,7 @@ void test_vlseg2e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m1_tum( @@ -368,7 +368,7 @@ void test_vlseg2e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m2_tum( @@ -381,7 +381,7 @@ void test_vlseg2e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m4_tum( @@ -394,7 +394,7 @@ void test_vlseg2e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf4_tumu( @@ -407,7 +407,7 @@ void test_vlseg2e16_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf2_tumu( @@ -420,7 +420,7 @@ void test_vlseg2e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m1_tumu( @@ -433,7 +433,7 @@ void test_vlseg2e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m2_tumu( @@ -446,7 +446,7 @@ void test_vlseg2e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m4_tumu( @@ -459,7 +459,7 @@ void test_vlseg2e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf4_tumu( @@ -472,7 +472,7 @@ void test_vlseg2e16_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf2_tumu( @@ -485,7 +485,7 @@ void test_vlseg2e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m1_tumu( @@ -498,7 +498,7 @@ void test_vlseg2e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m2_tumu( @@ -511,7 +511,7 @@ void test_vlseg2e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m4_tumu( @@ -524,7 +524,7 @@ void test_vlseg2e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf4_tumu( @@ -537,7 +537,7 @@ void test_vlseg2e16_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf2_tumu( @@ -550,7 +550,7 @@ void test_vlseg2e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m1_tumu( @@ -563,7 +563,7 @@ void test_vlseg2e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m2_tumu( @@ -576,7 +576,7 @@ void test_vlseg2e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m4_tumu( @@ -589,7 +589,7 @@ void test_vlseg2e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf4_mu( @@ -602,7 +602,7 @@ void test_vlseg2e16_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16mf2_mu( @@ -615,7 +615,7 @@ void test_vlseg2e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m1_mu( @@ -628,7 +628,7 @@ void test_vlseg2e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m2_mu( @@ -641,7 +641,7 @@ void test_vlseg2e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_f16m4_mu( @@ -654,7 +654,7 @@ void test_vlseg2e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, size_t vl) { - return vlseg2e16_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf4_mu( @@ -667,7 +667,7 @@ void test_vlseg2e16_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16mf2_mu( @@ -680,7 +680,7 @@ void test_vlseg2e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m1_mu( @@ -693,7 +693,7 @@ void test_vlseg2e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m2_mu( @@ -706,7 +706,7 @@ void test_vlseg2e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_i16m4_mu( @@ -719,7 +719,7 @@ void test_vlseg2e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, size_t vl) { - return vlseg2e16_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf4_mu( @@ -732,7 +732,7 @@ void test_vlseg2e16_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16mf2_mu( @@ -745,7 +745,7 @@ void test_vlseg2e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m1_mu( @@ -758,7 +758,7 @@ void test_vlseg2e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m2_mu( @@ -771,7 +771,7 @@ void test_vlseg2e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16_v_u16m4_mu( @@ -784,6 +784,6 @@ void test_vlseg2e16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, size_t vl) { - return vlseg2e16_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e16_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c index 27045cabf7ee7ce76cb1eabdd60795c1ce1145d5..8d1616b7710e78ac778926a073c75740586d8b7b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e16ff.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vlseg2e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vlseg2e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vlseg2e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m4_tu( @@ -79,7 +79,7 @@ void test_vlseg2e16ff_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf4_tu( @@ -94,7 +94,7 @@ void test_vlseg2e16ff_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf2_tu( @@ -109,7 +109,7 @@ void test_vlseg2e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m1_tu( @@ -124,7 +124,7 @@ void test_vlseg2e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m2_tu( @@ -139,7 +139,7 @@ void test_vlseg2e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m4_tu( @@ -154,7 +154,7 @@ void test_vlseg2e16ff_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf4_tu( @@ -169,7 +169,7 @@ void test_vlseg2e16ff_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf2_tu( @@ -184,7 +184,7 @@ void test_vlseg2e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m1_tu( @@ -199,7 +199,7 @@ void test_vlseg2e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m2_tu( @@ -214,7 +214,7 @@ void test_vlseg2e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m4_tu( @@ -229,7 +229,7 @@ void test_vlseg2e16ff_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf4_tum( @@ -244,7 +244,7 @@ void test_vlseg2e16ff_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf2_tum( @@ -259,7 +259,7 @@ void test_vlseg2e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m1_tum( @@ -274,7 +274,7 @@ void test_vlseg2e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m2_tum( @@ -289,7 +289,7 @@ void test_vlseg2e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m4_tum( @@ -304,7 +304,7 @@ void test_vlseg2e16ff_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf4_tum( @@ -319,7 +319,7 @@ void test_vlseg2e16ff_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf2_tum( @@ -334,7 +334,7 @@ void test_vlseg2e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m1_tum( @@ -349,7 +349,7 @@ void test_vlseg2e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m2_tum( @@ -364,7 +364,7 @@ void test_vlseg2e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m4_tum( @@ -379,7 +379,7 @@ void test_vlseg2e16ff_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf4_tum( @@ -394,7 +394,7 @@ void test_vlseg2e16ff_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf2_tum( @@ -409,7 +409,7 @@ void test_vlseg2e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m1_tum( @@ -424,7 +424,7 @@ void test_vlseg2e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m2_tum( @@ -439,7 +439,7 @@ void test_vlseg2e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m4_tum( @@ -454,7 +454,7 @@ void test_vlseg2e16ff_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf4_tumu( @@ -469,7 +469,7 @@ void test_vlseg2e16ff_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf2_tumu( @@ -484,7 +484,7 @@ void test_vlseg2e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m1_tumu( @@ -499,7 +499,7 @@ void test_vlseg2e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m2_tumu( @@ -514,7 +514,7 @@ void test_vlseg2e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m4_tumu( @@ -529,7 +529,7 @@ void test_vlseg2e16ff_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf4_tumu( @@ -544,7 +544,7 @@ void test_vlseg2e16ff_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf2_tumu( @@ -559,7 +559,7 @@ void test_vlseg2e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m1_tumu( @@ -574,7 +574,7 @@ void test_vlseg2e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m2_tumu( @@ -589,7 +589,7 @@ void test_vlseg2e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m4_tumu( @@ -604,7 +604,7 @@ void test_vlseg2e16ff_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf4_tumu( @@ -619,7 +619,7 @@ void test_vlseg2e16ff_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf2_tumu( @@ -634,7 +634,7 @@ void test_vlseg2e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m1_tumu( @@ -649,7 +649,7 @@ void test_vlseg2e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m2_tumu( @@ -664,7 +664,7 @@ void test_vlseg2e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m4_tumu( @@ -679,7 +679,7 @@ void test_vlseg2e16ff_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf4_mu( @@ -694,7 +694,7 @@ void test_vlseg2e16ff_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16mf2_mu( @@ -709,7 +709,7 @@ void test_vlseg2e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m1_mu( @@ -724,7 +724,7 @@ void test_vlseg2e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m2_mu( @@ -739,7 +739,7 @@ void test_vlseg2e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_f16m4_mu( @@ -754,7 +754,7 @@ void test_vlseg2e16ff_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf4_mu( @@ -769,7 +769,7 @@ void test_vlseg2e16ff_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16mf2_mu( @@ -784,7 +784,7 @@ void test_vlseg2e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m1_mu( @@ -799,7 +799,7 @@ void test_vlseg2e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m2_mu( @@ -814,7 +814,7 @@ void test_vlseg2e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_i16m4_mu( @@ -829,7 +829,7 @@ void test_vlseg2e16ff_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf4_mu( @@ -844,7 +844,7 @@ void test_vlseg2e16ff_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16mf2_mu( @@ -859,7 +859,7 @@ void test_vlseg2e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m1_mu( @@ -874,7 +874,7 @@ void test_vlseg2e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m2_mu( @@ -889,7 +889,7 @@ void test_vlseg2e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e16ff_v_u16m4_mu( @@ -904,6 +904,6 @@ void test_vlseg2e16ff_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e16ff_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg2e16ff_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e16ff_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32.c index 754f216f856fa821ca21793eb7a1ecdacd9fc384..f96de9ce878c6f1eff72aa96faf3c74328115203 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m1_tu( @@ -30,7 +30,7 @@ void test_vlseg2e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m2_tu( @@ -43,7 +43,7 @@ void test_vlseg2e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m4_tu( @@ -56,7 +56,7 @@ void test_vlseg2e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32mf2_tu( @@ -69,7 +69,7 @@ void test_vlseg2e32_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m1_tu( @@ -82,7 +82,7 @@ void test_vlseg2e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m2_tu( @@ -95,7 +95,7 @@ void test_vlseg2e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m4_tu( @@ -108,7 +108,7 @@ void test_vlseg2e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32mf2_tu( @@ -121,7 +121,7 @@ void test_vlseg2e32_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m1_tu( @@ -134,7 +134,7 @@ void test_vlseg2e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m2_tu( @@ -147,7 +147,7 @@ void test_vlseg2e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m4_tu( @@ -160,7 +160,7 @@ void test_vlseg2e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32mf2_tum( @@ -173,7 +173,7 @@ void test_vlseg2e32_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m1_tum( @@ -186,7 +186,7 @@ void test_vlseg2e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m2_tum( @@ -199,7 +199,7 @@ void test_vlseg2e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m4_tum( @@ -212,7 +212,7 @@ void test_vlseg2e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32mf2_tum( @@ -225,7 +225,7 @@ void test_vlseg2e32_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m1_tum( @@ -238,7 +238,7 @@ void test_vlseg2e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m2_tum( @@ -251,7 +251,7 @@ void test_vlseg2e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m4_tum( @@ -264,7 +264,7 @@ void test_vlseg2e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32mf2_tum( @@ -277,7 +277,7 @@ void test_vlseg2e32_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m1_tum( @@ -290,7 +290,7 @@ void test_vlseg2e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m2_tum( @@ -303,7 +303,7 @@ void test_vlseg2e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m4_tum( @@ -316,7 +316,7 @@ void test_vlseg2e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32mf2_tumu( @@ -329,7 +329,7 @@ void test_vlseg2e32_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m1_tumu( @@ -342,7 +342,7 @@ void test_vlseg2e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m2_tumu( @@ -355,7 +355,7 @@ void test_vlseg2e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m4_tumu( @@ -368,7 +368,7 @@ void test_vlseg2e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32mf2_tumu( @@ -381,7 +381,7 @@ void test_vlseg2e32_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m1_tumu( @@ -394,7 +394,7 @@ void test_vlseg2e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m2_tumu( @@ -407,7 +407,7 @@ void test_vlseg2e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m4_tumu( @@ -420,7 +420,7 @@ void test_vlseg2e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32mf2_tumu( @@ -433,7 +433,7 @@ void test_vlseg2e32_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m1_tumu( @@ -446,7 +446,7 @@ void test_vlseg2e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m2_tumu( @@ -459,7 +459,7 @@ void test_vlseg2e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m4_tumu( @@ -472,7 +472,7 @@ void test_vlseg2e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32mf2_mu( @@ -485,7 +485,7 @@ void test_vlseg2e32_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m1_mu( @@ -498,7 +498,7 @@ void test_vlseg2e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m2_mu( @@ -511,7 +511,7 @@ void test_vlseg2e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_f32m4_mu( @@ -524,7 +524,7 @@ void test_vlseg2e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, size_t vl) { - return vlseg2e32_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32mf2_mu( @@ -537,7 +537,7 @@ void test_vlseg2e32_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m1_mu( @@ -550,7 +550,7 @@ void test_vlseg2e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m2_mu( @@ -563,7 +563,7 @@ void test_vlseg2e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_i32m4_mu( @@ -576,7 +576,7 @@ void test_vlseg2e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, size_t vl) { - return vlseg2e32_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32mf2_mu( @@ -589,7 +589,7 @@ void test_vlseg2e32_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m1_mu( @@ -602,7 +602,7 @@ void test_vlseg2e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m2_mu( @@ -615,7 +615,7 @@ void test_vlseg2e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32_v_u32m4_mu( @@ -628,6 +628,6 @@ void test_vlseg2e32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, size_t vl) { - return vlseg2e32_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e32_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32ff.c index 9b7957443b2cb815993b72a187b44c3218bc0bf1..0bb12e43e03714fb93ddf52ea8fa4b885e742cc1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32ff.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m1_tu( @@ -34,7 +34,7 @@ void test_vlseg2e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m2_tu( @@ -49,7 +49,7 @@ void test_vlseg2e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m4_tu( @@ -64,7 +64,7 @@ void test_vlseg2e32ff_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32mf2_tu( @@ -79,7 +79,7 @@ void test_vlseg2e32ff_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m1_tu( @@ -94,7 +94,7 @@ void test_vlseg2e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m2_tu( @@ -109,7 +109,7 @@ void test_vlseg2e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m4_tu( @@ -124,7 +124,7 @@ void test_vlseg2e32ff_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32mf2_tu( @@ -139,7 +139,7 @@ void test_vlseg2e32ff_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m1_tu( @@ -154,7 +154,7 @@ void test_vlseg2e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m2_tu( @@ -169,7 +169,7 @@ void test_vlseg2e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m4_tu( @@ -184,7 +184,7 @@ void test_vlseg2e32ff_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32mf2_tum( @@ -199,7 +199,7 @@ void test_vlseg2e32ff_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m1_tum( @@ -214,7 +214,7 @@ void test_vlseg2e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m2_tum( @@ -229,7 +229,7 @@ void test_vlseg2e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m4_tum( @@ -244,7 +244,7 @@ void test_vlseg2e32ff_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32mf2_tum( @@ -259,7 +259,7 @@ void test_vlseg2e32ff_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m1_tum( @@ -274,7 +274,7 @@ void test_vlseg2e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m2_tum( @@ -289,7 +289,7 @@ void test_vlseg2e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m4_tum( @@ -304,7 +304,7 @@ void test_vlseg2e32ff_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32mf2_tum( @@ -319,7 +319,7 @@ void test_vlseg2e32ff_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m1_tum( @@ -334,7 +334,7 @@ void test_vlseg2e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m2_tum( @@ -349,7 +349,7 @@ void test_vlseg2e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m4_tum( @@ -364,7 +364,7 @@ void test_vlseg2e32ff_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32mf2_tumu( @@ -379,7 +379,7 @@ void test_vlseg2e32ff_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m1_tumu( @@ -394,7 +394,7 @@ void test_vlseg2e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m2_tumu( @@ -409,7 +409,7 @@ void test_vlseg2e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m4_tumu( @@ -424,7 +424,7 @@ void test_vlseg2e32ff_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32mf2_tumu( @@ -439,7 +439,7 @@ void test_vlseg2e32ff_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m1_tumu( @@ -454,7 +454,7 @@ void test_vlseg2e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m2_tumu( @@ -469,7 +469,7 @@ void test_vlseg2e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m4_tumu( @@ -484,7 +484,7 @@ void test_vlseg2e32ff_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32mf2_tumu( @@ -499,7 +499,7 @@ void test_vlseg2e32ff_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m1_tumu( @@ -514,7 +514,7 @@ void test_vlseg2e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m2_tumu( @@ -529,7 +529,7 @@ void test_vlseg2e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m4_tumu( @@ -544,7 +544,7 @@ void test_vlseg2e32ff_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32mf2_mu( @@ -559,7 +559,7 @@ void test_vlseg2e32ff_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m1_mu( @@ -574,7 +574,7 @@ void test_vlseg2e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m2_mu( @@ -589,7 +589,7 @@ void test_vlseg2e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_f32m4_mu( @@ -604,7 +604,7 @@ void test_vlseg2e32ff_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32mf2_mu( @@ -619,7 +619,7 @@ void test_vlseg2e32ff_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m1_mu( @@ -634,7 +634,7 @@ void test_vlseg2e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m2_mu( @@ -649,7 +649,7 @@ void test_vlseg2e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_i32m4_mu( @@ -664,7 +664,7 @@ void test_vlseg2e32ff_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32mf2_mu( @@ -679,7 +679,7 @@ void test_vlseg2e32ff_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m1_mu( @@ -694,7 +694,7 @@ void test_vlseg2e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m2_mu( @@ -709,7 +709,7 @@ void test_vlseg2e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e32ff_v_u32m4_mu( @@ -724,6 +724,6 @@ void test_vlseg2e32ff_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e32ff_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg2e32ff_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e32ff_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64.c index aa7c9e678fb057bf9f4ae272a997a63f5b8a1476..eac699a25d3f963c9e3a9c0461dd561143470141 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m2_tu( @@ -30,7 +30,7 @@ void test_vlseg2e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m4_tu( @@ -43,7 +43,7 @@ void test_vlseg2e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m1_tu( @@ -56,7 +56,7 @@ void test_vlseg2e64_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m2_tu( @@ -69,7 +69,7 @@ void test_vlseg2e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m4_tu( @@ -82,7 +82,7 @@ void test_vlseg2e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m1_tu( @@ -95,7 +95,7 @@ void test_vlseg2e64_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m2_tu( @@ -108,7 +108,7 @@ void test_vlseg2e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m4_tu( @@ -121,7 +121,7 @@ void test_vlseg2e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m1_tum( @@ -134,7 +134,7 @@ void test_vlseg2e64_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m2_tum( @@ -147,7 +147,7 @@ void test_vlseg2e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m4_tum( @@ -160,7 +160,7 @@ void test_vlseg2e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m1_tum( @@ -173,7 +173,7 @@ void test_vlseg2e64_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m2_tum( @@ -186,7 +186,7 @@ void test_vlseg2e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m4_tum( @@ -199,7 +199,7 @@ void test_vlseg2e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m1_tum( @@ -212,7 +212,7 @@ void test_vlseg2e64_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m2_tum( @@ -225,7 +225,7 @@ void test_vlseg2e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m4_tum( @@ -238,7 +238,7 @@ void test_vlseg2e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m1_tumu( @@ -251,7 +251,7 @@ void test_vlseg2e64_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m2_tumu( @@ -264,7 +264,7 @@ void test_vlseg2e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m4_tumu( @@ -277,7 +277,7 @@ void test_vlseg2e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m1_tumu( @@ -290,7 +290,7 @@ void test_vlseg2e64_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m2_tumu( @@ -303,7 +303,7 @@ void test_vlseg2e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m4_tumu( @@ -316,7 +316,7 @@ void test_vlseg2e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m1_tumu( @@ -329,7 +329,7 @@ void test_vlseg2e64_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m2_tumu( @@ -342,7 +342,7 @@ void test_vlseg2e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m4_tumu( @@ -355,7 +355,7 @@ void test_vlseg2e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m1_mu( @@ -368,7 +368,7 @@ void test_vlseg2e64_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m2_mu( @@ -381,7 +381,7 @@ void test_vlseg2e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_f64m4_mu( @@ -394,7 +394,7 @@ void test_vlseg2e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, size_t vl) { - return vlseg2e64_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m1_mu( @@ -407,7 +407,7 @@ void test_vlseg2e64_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m2_mu( @@ -420,7 +420,7 @@ void test_vlseg2e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_i64m4_mu( @@ -433,7 +433,7 @@ void test_vlseg2e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, size_t vl) { - return vlseg2e64_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m1_mu( @@ -446,7 +446,7 @@ void test_vlseg2e64_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m2_mu( @@ -459,7 +459,7 @@ void test_vlseg2e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64_v_u64m4_mu( @@ -472,6 +472,6 @@ void test_vlseg2e64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, size_t vl) { - return vlseg2e64_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e64_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64ff.c index 62f08bdf19e9238472f3b81f78cfe8a4cb9d3daf..d6e5fa903d5ce59a1a5c34a4e5d30fb8f09431e6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e64ff.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m2_tu( @@ -34,7 +34,7 @@ void test_vlseg2e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m4_tu( @@ -49,7 +49,7 @@ void test_vlseg2e64ff_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m1_tu( @@ -64,7 +64,7 @@ void test_vlseg2e64ff_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_ // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m2_tu( @@ -79,7 +79,7 @@ void test_vlseg2e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m4_tu( @@ -94,7 +94,7 @@ void test_vlseg2e64ff_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m1_tu( @@ -109,7 +109,7 @@ void test_vlseg2e64ff_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m2_tu( @@ -124,7 +124,7 @@ void test_vlseg2e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m4_tu( @@ -139,7 +139,7 @@ void test_vlseg2e64ff_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m1_tum( @@ -154,7 +154,7 @@ void test_vlseg2e64ff_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m2_tum( @@ -169,7 +169,7 @@ void test_vlseg2e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m4_tum( @@ -184,7 +184,7 @@ void test_vlseg2e64ff_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m1_tum( @@ -199,7 +199,7 @@ void test_vlseg2e64ff_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m2_tum( @@ -214,7 +214,7 @@ void test_vlseg2e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m4_tum( @@ -229,7 +229,7 @@ void test_vlseg2e64ff_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m1_tum( @@ -244,7 +244,7 @@ void test_vlseg2e64ff_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m2_tum( @@ -259,7 +259,7 @@ void test_vlseg2e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m4_tum( @@ -274,7 +274,7 @@ void test_vlseg2e64ff_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m1_tumu( @@ -289,7 +289,7 @@ void test_vlseg2e64ff_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m2_tumu( @@ -304,7 +304,7 @@ void test_vlseg2e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m4_tumu( @@ -319,7 +319,7 @@ void test_vlseg2e64ff_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m1_tumu( @@ -334,7 +334,7 @@ void test_vlseg2e64ff_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m2_tumu( @@ -349,7 +349,7 @@ void test_vlseg2e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m4_tumu( @@ -364,7 +364,7 @@ void test_vlseg2e64ff_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m1_tumu( @@ -379,7 +379,7 @@ void test_vlseg2e64ff_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m2_tumu( @@ -394,7 +394,7 @@ void test_vlseg2e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m4_tumu( @@ -409,7 +409,7 @@ void test_vlseg2e64ff_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m1_mu( @@ -424,7 +424,7 @@ void test_vlseg2e64ff_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m2_mu( @@ -439,7 +439,7 @@ void test_vlseg2e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_f64m4_mu( @@ -454,7 +454,7 @@ void test_vlseg2e64ff_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m1_mu( @@ -469,7 +469,7 @@ void test_vlseg2e64ff_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m2_mu( @@ -484,7 +484,7 @@ void test_vlseg2e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_i64m4_mu( @@ -499,7 +499,7 @@ void test_vlseg2e64ff_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m1_mu( @@ -514,7 +514,7 @@ void test_vlseg2e64ff_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m2_mu( @@ -529,7 +529,7 @@ void test_vlseg2e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e64ff_v_u64m4_mu( @@ -544,6 +544,6 @@ void test_vlseg2e64ff_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e64ff_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg2e64ff_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e64ff_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8.c index 1fad72e94d40cfb3106b4d5ca4670c3d12727853..235effa4f09e8ecbd82fd6c707c9505dbe65dfbe 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf4_tu( @@ -29,7 +29,7 @@ void test_vlseg2e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedo // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf2_tu( @@ -42,7 +42,7 @@ void test_vlseg2e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedo // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m1_tu( @@ -55,7 +55,7 @@ void test_vlseg2e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedo // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m2_tu( @@ -68,7 +68,7 @@ void test_vlseg2e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m4_tu( @@ -81,7 +81,7 @@ void test_vlseg2e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf8_tu( @@ -94,7 +94,7 @@ void test_vlseg2e8_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf4_tu( @@ -107,7 +107,7 @@ void test_vlseg2e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf2_tu( @@ -120,7 +120,7 @@ void test_vlseg2e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m1_tu( @@ -133,7 +133,7 @@ void test_vlseg2e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m2_tu( @@ -146,7 +146,7 @@ void test_vlseg2e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedof // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m4_tu( @@ -159,7 +159,7 @@ void test_vlseg2e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedof // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf8_tum( @@ -172,7 +172,7 @@ void test_vlseg2e8_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedof // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf4_tum( @@ -185,7 +185,7 @@ void test_vlseg2e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf2_tum( @@ -198,7 +198,7 @@ void test_vlseg2e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m1_tum( @@ -211,7 +211,7 @@ void test_vlseg2e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m2_tum( @@ -224,7 +224,7 @@ void test_vlseg2e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m4_tum( @@ -237,7 +237,7 @@ void test_vlseg2e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf8_tum( @@ -250,7 +250,7 @@ void test_vlseg2e8_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf4_tum( @@ -263,7 +263,7 @@ void test_vlseg2e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf2_tum( @@ -276,7 +276,7 @@ void test_vlseg2e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m1_tum( @@ -289,7 +289,7 @@ void test_vlseg2e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m2_tum( @@ -302,7 +302,7 @@ void test_vlseg2e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vui // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m4_tum( @@ -315,7 +315,7 @@ void test_vlseg2e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vui // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf8_tumu( @@ -328,7 +328,7 @@ void test_vlseg2e8_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vui // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf4_tumu( @@ -341,7 +341,7 @@ void test_vlseg2e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf2_tumu( @@ -354,7 +354,7 @@ void test_vlseg2e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m1_tumu( @@ -367,7 +367,7 @@ void test_vlseg2e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m2_tumu( @@ -380,7 +380,7 @@ void test_vlseg2e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m4_tumu( @@ -393,7 +393,7 @@ void test_vlseg2e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf8_tumu( @@ -406,7 +406,7 @@ void test_vlseg2e8_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf4_tumu( @@ -419,7 +419,7 @@ void test_vlseg2e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf2_tumu( @@ -432,7 +432,7 @@ void test_vlseg2e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m1_tumu( @@ -445,7 +445,7 @@ void test_vlseg2e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m2_tumu( @@ -458,7 +458,7 @@ void test_vlseg2e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vu // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m4_tumu( @@ -471,7 +471,7 @@ void test_vlseg2e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vu // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf8_mu( @@ -484,7 +484,7 @@ void test_vlseg2e8_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vu // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf4_mu( @@ -497,7 +497,7 @@ void test_vlseg2e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8mf2_mu( @@ -510,7 +510,7 @@ void test_vlseg2e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m1_mu( @@ -523,7 +523,7 @@ void test_vlseg2e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m2_mu( @@ -536,7 +536,7 @@ void test_vlseg2e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_i8m4_mu( @@ -549,7 +549,7 @@ void test_vlseg2e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, size_t vl) { - return vlseg2e8_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf8_mu( @@ -562,7 +562,7 @@ void test_vlseg2e8_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf4_mu( @@ -575,7 +575,7 @@ void test_vlseg2e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8mf2_mu( @@ -588,7 +588,7 @@ void test_vlseg2e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m1_mu( @@ -601,7 +601,7 @@ void test_vlseg2e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m2_mu( @@ -614,7 +614,7 @@ void test_vlseg2e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8_v_u8m4_mu( @@ -627,6 +627,6 @@ void test_vlseg2e8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuin // CHECK-RV64-NEXT: ret void // void test_vlseg2e8_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, size_t vl) { - return vlseg2e8_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); + return __riscv_vlseg2e8_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8ff.c index f079659e24299d8cab51264f707364abd5c35dfb..04271c00b186e2cb97cff34e4b70f20eb408822c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e8ff.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf4_tu( @@ -34,7 +34,7 @@ void test_vlseg2e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maske // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf2_tu( @@ -49,7 +49,7 @@ void test_vlseg2e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maske // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m1_tu( @@ -64,7 +64,7 @@ void test_vlseg2e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maske // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m2_tu( @@ -79,7 +79,7 @@ void test_vlseg2e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m4_tu( @@ -94,7 +94,7 @@ void test_vlseg2e8ff_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf8_tu( @@ -109,7 +109,7 @@ void test_vlseg2e8ff_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf4_tu( @@ -124,7 +124,7 @@ void test_vlseg2e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf2_tu( @@ -139,7 +139,7 @@ void test_vlseg2e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m1_tu( @@ -154,7 +154,7 @@ void test_vlseg2e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m2_tu( @@ -169,7 +169,7 @@ void test_vlseg2e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m4_tu( @@ -184,7 +184,7 @@ void test_vlseg2e8ff_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf8_tum( @@ -199,7 +199,7 @@ void test_vlseg2e8ff_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t masked // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf4_tum( @@ -214,7 +214,7 @@ void test_vlseg2e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf2_tum( @@ -229,7 +229,7 @@ void test_vlseg2e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m1_tum( @@ -244,7 +244,7 @@ void test_vlseg2e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m2_tum( @@ -259,7 +259,7 @@ void test_vlseg2e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m4_tum( @@ -274,7 +274,7 @@ void test_vlseg2e8ff_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf8_tum( @@ -289,7 +289,7 @@ void test_vlseg2e8ff_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf4_tum( @@ -304,7 +304,7 @@ void test_vlseg2e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf2_tum( @@ -319,7 +319,7 @@ void test_vlseg2e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m1_tum( @@ -334,7 +334,7 @@ void test_vlseg2e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m2_tum( @@ -349,7 +349,7 @@ void test_vlseg2e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m4_tum( @@ -364,7 +364,7 @@ void test_vlseg2e8ff_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf8_tumu( @@ -379,7 +379,7 @@ void test_vlseg2e8ff_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf4_tumu( @@ -394,7 +394,7 @@ void test_vlseg2e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf2_tumu( @@ -409,7 +409,7 @@ void test_vlseg2e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m1_tumu( @@ -424,7 +424,7 @@ void test_vlseg2e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m2_tumu( @@ -439,7 +439,7 @@ void test_vlseg2e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m4_tumu( @@ -454,7 +454,7 @@ void test_vlseg2e8ff_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf8_tumu( @@ -469,7 +469,7 @@ void test_vlseg2e8ff_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf4_tumu( @@ -484,7 +484,7 @@ void test_vlseg2e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf2_tumu( @@ -499,7 +499,7 @@ void test_vlseg2e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m1_tumu( @@ -514,7 +514,7 @@ void test_vlseg2e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m2_tumu( @@ -529,7 +529,7 @@ void test_vlseg2e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m4_tumu( @@ -544,7 +544,7 @@ void test_vlseg2e8ff_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf8_mu( @@ -559,7 +559,7 @@ void test_vlseg2e8ff_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf4_mu( @@ -574,7 +574,7 @@ void test_vlseg2e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8mf2_mu( @@ -589,7 +589,7 @@ void test_vlseg2e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m1_mu( @@ -604,7 +604,7 @@ void test_vlseg2e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m2_mu( @@ -619,7 +619,7 @@ void test_vlseg2e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_i8m4_mu( @@ -634,7 +634,7 @@ void test_vlseg2e8ff_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf8_mu( @@ -649,7 +649,7 @@ void test_vlseg2e8ff_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf4_mu( @@ -664,7 +664,7 @@ void test_vlseg2e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8mf2_mu( @@ -679,7 +679,7 @@ void test_vlseg2e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m1_mu( @@ -694,7 +694,7 @@ void test_vlseg2e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m2_mu( @@ -709,7 +709,7 @@ void test_vlseg2e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vu // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg2e8ff_v_u8m4_mu( @@ -724,6 +724,6 @@ void test_vlseg2e8ff_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vu // CHECK-RV64-NEXT: ret void // void test_vlseg2e8ff_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg2e8ff_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); + return __riscv_vlseg2e8ff_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16.c index 5f5d3c8981ff4de3930f6ec2c09567ef64eb6dde..9febc1297e491c5d3e8cab5e0a3d8f6aca34cee2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vlseg3e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vlseg3e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vlseg3e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf4_tu( @@ -79,7 +79,7 @@ void test_vlseg3e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf2_tu( @@ -94,7 +94,7 @@ void test_vlseg3e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m1_tu( @@ -109,7 +109,7 @@ void test_vlseg3e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m2_tu( @@ -124,7 +124,7 @@ void test_vlseg3e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf4_tu( @@ -139,7 +139,7 @@ void test_vlseg3e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf2_tu( @@ -154,7 +154,7 @@ void test_vlseg3e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m1_tu( @@ -169,7 +169,7 @@ void test_vlseg3e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m2_tu( @@ -184,7 +184,7 @@ void test_vlseg3e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf4_tum( @@ -199,7 +199,7 @@ void test_vlseg3e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf2_tum( @@ -214,7 +214,7 @@ void test_vlseg3e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m1_tum( @@ -229,7 +229,7 @@ void test_vlseg3e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m2_tum( @@ -244,7 +244,7 @@ void test_vlseg3e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf4_tum( @@ -259,7 +259,7 @@ void test_vlseg3e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf2_tum( @@ -274,7 +274,7 @@ void test_vlseg3e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m1_tum( @@ -289,7 +289,7 @@ void test_vlseg3e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m2_tum( @@ -304,7 +304,7 @@ void test_vlseg3e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf4_tum( @@ -319,7 +319,7 @@ void test_vlseg3e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf2_tum( @@ -334,7 +334,7 @@ void test_vlseg3e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m1_tum( @@ -349,7 +349,7 @@ void test_vlseg3e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m2_tum( @@ -364,7 +364,7 @@ void test_vlseg3e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf4_tumu( @@ -379,7 +379,7 @@ void test_vlseg3e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf2_tumu( @@ -394,7 +394,7 @@ void test_vlseg3e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m1_tumu( @@ -409,7 +409,7 @@ void test_vlseg3e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m2_tumu( @@ -424,7 +424,7 @@ void test_vlseg3e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf4_tumu( @@ -439,7 +439,7 @@ void test_vlseg3e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf2_tumu( @@ -454,7 +454,7 @@ void test_vlseg3e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m1_tumu( @@ -469,7 +469,7 @@ void test_vlseg3e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m2_tumu( @@ -484,7 +484,7 @@ void test_vlseg3e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf4_tumu( @@ -499,7 +499,7 @@ void test_vlseg3e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf2_tumu( @@ -514,7 +514,7 @@ void test_vlseg3e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m1_tumu( @@ -529,7 +529,7 @@ void test_vlseg3e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m2_tumu( @@ -544,7 +544,7 @@ void test_vlseg3e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf4_mu( @@ -559,7 +559,7 @@ void test_vlseg3e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16mf2_mu( @@ -574,7 +574,7 @@ void test_vlseg3e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m1_mu( @@ -589,7 +589,7 @@ void test_vlseg3e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_f16m2_mu( @@ -604,7 +604,7 @@ void test_vlseg3e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, size_t vl) { - return vlseg3e16_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf4_mu( @@ -619,7 +619,7 @@ void test_vlseg3e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16mf2_mu( @@ -634,7 +634,7 @@ void test_vlseg3e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m1_mu( @@ -649,7 +649,7 @@ void test_vlseg3e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_i16m2_mu( @@ -664,7 +664,7 @@ void test_vlseg3e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, size_t vl) { - return vlseg3e16_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf4_mu( @@ -679,7 +679,7 @@ void test_vlseg3e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16mf2_mu( @@ -694,7 +694,7 @@ void test_vlseg3e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m1_mu( @@ -709,7 +709,7 @@ void test_vlseg3e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16_v_u16m2_mu( @@ -724,6 +724,6 @@ void test_vlseg3e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, size_t vl) { - return vlseg3e16_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e16_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c index 587f4385cb94d86ba33f535e102a9cd8ba4a3bee..a89ac22350b38efa792d488d44ea7e1120e12532 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e16ff.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vlseg3e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vlseg3e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vlseg3e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf4_tu( @@ -89,7 +89,7 @@ void test_vlseg3e16ff_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf2_tu( @@ -106,7 +106,7 @@ void test_vlseg3e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m1_tu( @@ -123,7 +123,7 @@ void test_vlseg3e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m2_tu( @@ -140,7 +140,7 @@ void test_vlseg3e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf4_tu( @@ -157,7 +157,7 @@ void test_vlseg3e16ff_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf2_tu( @@ -174,7 +174,7 @@ void test_vlseg3e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m1_tu( @@ -191,7 +191,7 @@ void test_vlseg3e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m2_tu( @@ -208,7 +208,7 @@ void test_vlseg3e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf4_tum( @@ -225,7 +225,7 @@ void test_vlseg3e16ff_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf2_tum( @@ -242,7 +242,7 @@ void test_vlseg3e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m1_tum( @@ -259,7 +259,7 @@ void test_vlseg3e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m2_tum( @@ -276,7 +276,7 @@ void test_vlseg3e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf4_tum( @@ -293,7 +293,7 @@ void test_vlseg3e16ff_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf2_tum( @@ -310,7 +310,7 @@ void test_vlseg3e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m1_tum( @@ -327,7 +327,7 @@ void test_vlseg3e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m2_tum( @@ -344,7 +344,7 @@ void test_vlseg3e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf4_tum( @@ -361,7 +361,7 @@ void test_vlseg3e16ff_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf2_tum( @@ -378,7 +378,7 @@ void test_vlseg3e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m1_tum( @@ -395,7 +395,7 @@ void test_vlseg3e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m2_tum( @@ -412,7 +412,7 @@ void test_vlseg3e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf4_tumu( @@ -429,7 +429,7 @@ void test_vlseg3e16ff_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf2_tumu( @@ -446,7 +446,7 @@ void test_vlseg3e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m1_tumu( @@ -463,7 +463,7 @@ void test_vlseg3e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m2_tumu( @@ -480,7 +480,7 @@ void test_vlseg3e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf4_tumu( @@ -497,7 +497,7 @@ void test_vlseg3e16ff_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf2_tumu( @@ -514,7 +514,7 @@ void test_vlseg3e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m1_tumu( @@ -531,7 +531,7 @@ void test_vlseg3e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m2_tumu( @@ -548,7 +548,7 @@ void test_vlseg3e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf4_tumu( @@ -565,7 +565,7 @@ void test_vlseg3e16ff_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf2_tumu( @@ -582,7 +582,7 @@ void test_vlseg3e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m1_tumu( @@ -599,7 +599,7 @@ void test_vlseg3e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m2_tumu( @@ -616,7 +616,7 @@ void test_vlseg3e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf4_mu( @@ -633,7 +633,7 @@ void test_vlseg3e16ff_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16mf2_mu( @@ -650,7 +650,7 @@ void test_vlseg3e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m1_mu( @@ -667,7 +667,7 @@ void test_vlseg3e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_f16m2_mu( @@ -684,7 +684,7 @@ void test_vlseg3e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf4_mu( @@ -701,7 +701,7 @@ void test_vlseg3e16ff_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16mf2_mu( @@ -718,7 +718,7 @@ void test_vlseg3e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m1_mu( @@ -735,7 +735,7 @@ void test_vlseg3e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_i16m2_mu( @@ -752,7 +752,7 @@ void test_vlseg3e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf4_mu( @@ -769,7 +769,7 @@ void test_vlseg3e16ff_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16mf2_mu( @@ -786,7 +786,7 @@ void test_vlseg3e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m1_mu( @@ -803,7 +803,7 @@ void test_vlseg3e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e16ff_v_u16m2_mu( @@ -820,6 +820,6 @@ void test_vlseg3e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e16ff_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg3e16ff_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e16ff_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32.c index ec6b22b9a4e0572ac90640f4f79d33b6f582d4be..b76e4c8c45fc06cdf0390f524b19c3c14610b1ac 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m1_tu( @@ -34,7 +34,7 @@ void test_vlseg3e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m2_tu( @@ -49,7 +49,7 @@ void test_vlseg3e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32mf2_tu( @@ -64,7 +64,7 @@ void test_vlseg3e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m1_tu( @@ -79,7 +79,7 @@ void test_vlseg3e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m2_tu( @@ -94,7 +94,7 @@ void test_vlseg3e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32mf2_tu( @@ -109,7 +109,7 @@ void test_vlseg3e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m1_tu( @@ -124,7 +124,7 @@ void test_vlseg3e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m2_tu( @@ -139,7 +139,7 @@ void test_vlseg3e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32mf2_tum( @@ -154,7 +154,7 @@ void test_vlseg3e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m1_tum( @@ -169,7 +169,7 @@ void test_vlseg3e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m2_tum( @@ -184,7 +184,7 @@ void test_vlseg3e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32mf2_tum( @@ -199,7 +199,7 @@ void test_vlseg3e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m1_tum( @@ -214,7 +214,7 @@ void test_vlseg3e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m2_tum( @@ -229,7 +229,7 @@ void test_vlseg3e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32mf2_tum( @@ -244,7 +244,7 @@ void test_vlseg3e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m1_tum( @@ -259,7 +259,7 @@ void test_vlseg3e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m2_tum( @@ -274,7 +274,7 @@ void test_vlseg3e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32mf2_tumu( @@ -289,7 +289,7 @@ void test_vlseg3e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m1_tumu( @@ -304,7 +304,7 @@ void test_vlseg3e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m2_tumu( @@ -319,7 +319,7 @@ void test_vlseg3e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32mf2_tumu( @@ -334,7 +334,7 @@ void test_vlseg3e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m1_tumu( @@ -349,7 +349,7 @@ void test_vlseg3e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m2_tumu( @@ -364,7 +364,7 @@ void test_vlseg3e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32mf2_tumu( @@ -379,7 +379,7 @@ void test_vlseg3e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m1_tumu( @@ -394,7 +394,7 @@ void test_vlseg3e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m2_tumu( @@ -409,7 +409,7 @@ void test_vlseg3e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32mf2_mu( @@ -424,7 +424,7 @@ void test_vlseg3e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m1_mu( @@ -439,7 +439,7 @@ void test_vlseg3e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_f32m2_mu( @@ -454,7 +454,7 @@ void test_vlseg3e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, size_t vl) { - return vlseg3e32_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32mf2_mu( @@ -469,7 +469,7 @@ void test_vlseg3e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m1_mu( @@ -484,7 +484,7 @@ void test_vlseg3e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_i32m2_mu( @@ -499,7 +499,7 @@ void test_vlseg3e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, size_t vl) { - return vlseg3e32_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32mf2_mu( @@ -514,7 +514,7 @@ void test_vlseg3e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m1_mu( @@ -529,7 +529,7 @@ void test_vlseg3e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32_v_u32m2_mu( @@ -544,6 +544,6 @@ void test_vlseg3e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, size_t vl) { - return vlseg3e32_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e32_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32ff.c index 1ff1e4ecae407f6b868ec8d598b1082d854a98cc..2dc17a1c17877d191478cf81c8b43e112bbb6dba 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e32ff.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m1_tu( @@ -38,7 +38,7 @@ void test_vlseg3e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m2_tu( @@ -55,7 +55,7 @@ void test_vlseg3e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32mf2_tu( @@ -72,7 +72,7 @@ void test_vlseg3e32ff_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m1_tu( @@ -89,7 +89,7 @@ void test_vlseg3e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m2_tu( @@ -106,7 +106,7 @@ void test_vlseg3e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32mf2_tu( @@ -123,7 +123,7 @@ void test_vlseg3e32ff_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m1_tu( @@ -140,7 +140,7 @@ void test_vlseg3e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m2_tu( @@ -157,7 +157,7 @@ void test_vlseg3e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32mf2_tum( @@ -174,7 +174,7 @@ void test_vlseg3e32ff_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m1_tum( @@ -191,7 +191,7 @@ void test_vlseg3e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m2_tum( @@ -208,7 +208,7 @@ void test_vlseg3e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32mf2_tum( @@ -225,7 +225,7 @@ void test_vlseg3e32ff_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m1_tum( @@ -242,7 +242,7 @@ void test_vlseg3e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m2_tum( @@ -259,7 +259,7 @@ void test_vlseg3e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32mf2_tum( @@ -276,7 +276,7 @@ void test_vlseg3e32ff_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m1_tum( @@ -293,7 +293,7 @@ void test_vlseg3e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m2_tum( @@ -310,7 +310,7 @@ void test_vlseg3e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32mf2_tumu( @@ -327,7 +327,7 @@ void test_vlseg3e32ff_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m1_tumu( @@ -344,7 +344,7 @@ void test_vlseg3e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m2_tumu( @@ -361,7 +361,7 @@ void test_vlseg3e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32mf2_tumu( @@ -378,7 +378,7 @@ void test_vlseg3e32ff_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m1_tumu( @@ -395,7 +395,7 @@ void test_vlseg3e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m2_tumu( @@ -412,7 +412,7 @@ void test_vlseg3e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32mf2_tumu( @@ -429,7 +429,7 @@ void test_vlseg3e32ff_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m1_tumu( @@ -446,7 +446,7 @@ void test_vlseg3e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m2_tumu( @@ -463,7 +463,7 @@ void test_vlseg3e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32mf2_mu( @@ -480,7 +480,7 @@ void test_vlseg3e32ff_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m1_mu( @@ -497,7 +497,7 @@ void test_vlseg3e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_f32m2_mu( @@ -514,7 +514,7 @@ void test_vlseg3e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32mf2_mu( @@ -531,7 +531,7 @@ void test_vlseg3e32ff_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m1_mu( @@ -548,7 +548,7 @@ void test_vlseg3e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_i32m2_mu( @@ -565,7 +565,7 @@ void test_vlseg3e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32mf2_mu( @@ -582,7 +582,7 @@ void test_vlseg3e32ff_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m1_mu( @@ -599,7 +599,7 @@ void test_vlseg3e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e32ff_v_u32m2_mu( @@ -616,6 +616,6 @@ void test_vlseg3e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e32ff_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg3e32ff_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e32ff_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64.c index 72754049587d16410699b3462c24bd918ae39eb3..4be1ad590ddbf80dbc24a3884522a95de772e608 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, size_t vl) { - return vlseg3e64_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m2_tu( @@ -34,7 +34,7 @@ void test_vlseg3e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, size_t vl) { - return vlseg3e64_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m1_tu( @@ -49,7 +49,7 @@ void test_vlseg3e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m2_tu( @@ -64,7 +64,7 @@ void test_vlseg3e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m1_tu( @@ -79,7 +79,7 @@ void test_vlseg3e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m2_tu( @@ -94,7 +94,7 @@ void test_vlseg3e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m1_tum( @@ -109,7 +109,7 @@ void test_vlseg3e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, size_t vl) { - return vlseg3e64_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m2_tum( @@ -124,7 +124,7 @@ void test_vlseg3e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, size_t vl) { - return vlseg3e64_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m1_tum( @@ -139,7 +139,7 @@ void test_vlseg3e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m2_tum( @@ -154,7 +154,7 @@ void test_vlseg3e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m1_tum( @@ -169,7 +169,7 @@ void test_vlseg3e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m2_tum( @@ -184,7 +184,7 @@ void test_vlseg3e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m1_tumu( @@ -199,7 +199,7 @@ void test_vlseg3e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, size_t vl) { - return vlseg3e64_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m2_tumu( @@ -214,7 +214,7 @@ void test_vlseg3e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, size_t vl) { - return vlseg3e64_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m1_tumu( @@ -229,7 +229,7 @@ void test_vlseg3e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m2_tumu( @@ -244,7 +244,7 @@ void test_vlseg3e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m1_tumu( @@ -259,7 +259,7 @@ void test_vlseg3e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m2_tumu( @@ -274,7 +274,7 @@ void test_vlseg3e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m1_mu( @@ -289,7 +289,7 @@ void test_vlseg3e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, size_t vl) { - return vlseg3e64_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_f64m2_mu( @@ -304,7 +304,7 @@ void test_vlseg3e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, size_t vl) { - return vlseg3e64_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m1_mu( @@ -319,7 +319,7 @@ void test_vlseg3e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_i64m2_mu( @@ -334,7 +334,7 @@ void test_vlseg3e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, size_t vl) { - return vlseg3e64_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m1_mu( @@ -349,7 +349,7 @@ void test_vlseg3e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64_v_u64m2_mu( @@ -364,6 +364,6 @@ void test_vlseg3e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, size_t vl) { - return vlseg3e64_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e64_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64ff.c index 2652ba64b596b9660e5ba5df89a52017a44673fa..f441d5e8c9ce5b22877774bd319e85563f0f8805 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e64ff.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m2_tu( @@ -38,7 +38,7 @@ void test_vlseg3e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m1_tu( @@ -55,7 +55,7 @@ void test_vlseg3e64ff_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m2_tu( @@ -72,7 +72,7 @@ void test_vlseg3e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m1_tu( @@ -89,7 +89,7 @@ void test_vlseg3e64ff_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m2_tu( @@ -106,7 +106,7 @@ void test_vlseg3e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m1_tum( @@ -123,7 +123,7 @@ void test_vlseg3e64ff_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m2_tum( @@ -140,7 +140,7 @@ void test_vlseg3e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m1_tum( @@ -157,7 +157,7 @@ void test_vlseg3e64ff_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m2_tum( @@ -174,7 +174,7 @@ void test_vlseg3e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m1_tum( @@ -191,7 +191,7 @@ void test_vlseg3e64ff_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m2_tum( @@ -208,7 +208,7 @@ void test_vlseg3e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m1_tumu( @@ -225,7 +225,7 @@ void test_vlseg3e64ff_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m2_tumu( @@ -242,7 +242,7 @@ void test_vlseg3e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m1_tumu( @@ -259,7 +259,7 @@ void test_vlseg3e64ff_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m2_tumu( @@ -276,7 +276,7 @@ void test_vlseg3e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m1_tumu( @@ -293,7 +293,7 @@ void test_vlseg3e64ff_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m2_tumu( @@ -310,7 +310,7 @@ void test_vlseg3e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m1_mu( @@ -327,7 +327,7 @@ void test_vlseg3e64ff_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_f64m2_mu( @@ -344,7 +344,7 @@ void test_vlseg3e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m1_mu( @@ -361,7 +361,7 @@ void test_vlseg3e64ff_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_i64m2_mu( @@ -378,7 +378,7 @@ void test_vlseg3e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m1_mu( @@ -395,7 +395,7 @@ void test_vlseg3e64ff_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e64ff_v_u64m2_mu( @@ -412,6 +412,6 @@ void test_vlseg3e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e64ff_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg3e64ff_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e64ff_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8.c index f5b6d68aaa1a94308663d2b79714f31364fd2470..9bddd8420e317c7fd1de9380d6d5ccee991e8bc9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8.c @@ -18,7 +18,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf4_tu( @@ -33,7 +33,7 @@ void test_vlseg3e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf2_tu( @@ -48,7 +48,7 @@ void test_vlseg3e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m1_tu( @@ -63,7 +63,7 @@ void test_vlseg3e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m2_tu( @@ -78,7 +78,7 @@ void test_vlseg3e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf8_tu( @@ -93,7 +93,7 @@ void test_vlseg3e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf4_tu( @@ -108,7 +108,7 @@ void test_vlseg3e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf2_tu( @@ -123,7 +123,7 @@ void test_vlseg3e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m1_tu( @@ -138,7 +138,7 @@ void test_vlseg3e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m2_tu( @@ -153,7 +153,7 @@ void test_vlseg3e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf8_tum( @@ -168,7 +168,7 @@ void test_vlseg3e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf4_tum( @@ -183,7 +183,7 @@ void test_vlseg3e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf2_tum( @@ -198,7 +198,7 @@ void test_vlseg3e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m1_tum( @@ -213,7 +213,7 @@ void test_vlseg3e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m2_tum( @@ -228,7 +228,7 @@ void test_vlseg3e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf8_tum( @@ -243,7 +243,7 @@ void test_vlseg3e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf4_tum( @@ -258,7 +258,7 @@ void test_vlseg3e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf2_tum( @@ -273,7 +273,7 @@ void test_vlseg3e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m1_tum( @@ -288,7 +288,7 @@ void test_vlseg3e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m2_tum( @@ -303,7 +303,7 @@ void test_vlseg3e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf8_tumu( @@ -318,7 +318,7 @@ void test_vlseg3e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf4_tumu( @@ -333,7 +333,7 @@ void test_vlseg3e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf2_tumu( @@ -348,7 +348,7 @@ void test_vlseg3e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m1_tumu( @@ -363,7 +363,7 @@ void test_vlseg3e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m2_tumu( @@ -378,7 +378,7 @@ void test_vlseg3e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf8_tumu( @@ -393,7 +393,7 @@ void test_vlseg3e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf4_tumu( @@ -408,7 +408,7 @@ void test_vlseg3e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf2_tumu( @@ -423,7 +423,7 @@ void test_vlseg3e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m1_tumu( @@ -438,7 +438,7 @@ void test_vlseg3e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m2_tumu( @@ -453,7 +453,7 @@ void test_vlseg3e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf8_mu( @@ -468,7 +468,7 @@ void test_vlseg3e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf4_mu( @@ -483,7 +483,7 @@ void test_vlseg3e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8mf2_mu( @@ -498,7 +498,7 @@ void test_vlseg3e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m1_mu( @@ -513,7 +513,7 @@ void test_vlseg3e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_i8m2_mu( @@ -528,7 +528,7 @@ void test_vlseg3e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, size_t vl) { - return vlseg3e8_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf8_mu( @@ -543,7 +543,7 @@ void test_vlseg3e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf4_mu( @@ -558,7 +558,7 @@ void test_vlseg3e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8mf2_mu( @@ -573,7 +573,7 @@ void test_vlseg3e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m1_mu( @@ -588,7 +588,7 @@ void test_vlseg3e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8_v_u8m2_mu( @@ -603,6 +603,6 @@ void test_vlseg3e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, size_t vl) { - return vlseg3e8_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); + return __riscv_vlseg3e8_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8ff.c index da85e8dbbb6d70b9d79d01842946ea544857a1aa..4e198b2a3ab580faf700d8f74bf7d875a4f9931e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg3e8ff.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf4_tu( @@ -38,7 +38,7 @@ void test_vlseg3e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf2_tu( @@ -55,7 +55,7 @@ void test_vlseg3e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m1_tu( @@ -72,7 +72,7 @@ void test_vlseg3e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m2_tu( @@ -89,7 +89,7 @@ void test_vlseg3e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf8_tu( @@ -106,7 +106,7 @@ void test_vlseg3e8ff_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf4_tu( @@ -123,7 +123,7 @@ void test_vlseg3e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf2_tu( @@ -140,7 +140,7 @@ void test_vlseg3e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m1_tu( @@ -157,7 +157,7 @@ void test_vlseg3e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m2_tu( @@ -174,7 +174,7 @@ void test_vlseg3e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf8_tum( @@ -191,7 +191,7 @@ void test_vlseg3e8ff_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf4_tum( @@ -208,7 +208,7 @@ void test_vlseg3e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf2_tum( @@ -225,7 +225,7 @@ void test_vlseg3e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m1_tum( @@ -242,7 +242,7 @@ void test_vlseg3e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m2_tum( @@ -259,7 +259,7 @@ void test_vlseg3e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf8_tum( @@ -276,7 +276,7 @@ void test_vlseg3e8ff_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf4_tum( @@ -293,7 +293,7 @@ void test_vlseg3e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf2_tum( @@ -310,7 +310,7 @@ void test_vlseg3e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m1_tum( @@ -327,7 +327,7 @@ void test_vlseg3e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m2_tum( @@ -344,7 +344,7 @@ void test_vlseg3e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf8_tumu( @@ -361,7 +361,7 @@ void test_vlseg3e8ff_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf4_tumu( @@ -378,7 +378,7 @@ void test_vlseg3e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf2_tumu( @@ -395,7 +395,7 @@ void test_vlseg3e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m1_tumu( @@ -412,7 +412,7 @@ void test_vlseg3e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m2_tumu( @@ -429,7 +429,7 @@ void test_vlseg3e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf8_tumu( @@ -446,7 +446,7 @@ void test_vlseg3e8ff_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf4_tumu( @@ -463,7 +463,7 @@ void test_vlseg3e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf2_tumu( @@ -480,7 +480,7 @@ void test_vlseg3e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m1_tumu( @@ -497,7 +497,7 @@ void test_vlseg3e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m2_tumu( @@ -514,7 +514,7 @@ void test_vlseg3e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf8_mu( @@ -531,7 +531,7 @@ void test_vlseg3e8ff_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf4_mu( @@ -548,7 +548,7 @@ void test_vlseg3e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8mf2_mu( @@ -565,7 +565,7 @@ void test_vlseg3e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m1_mu( @@ -582,7 +582,7 @@ void test_vlseg3e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_i8m2_mu( @@ -599,7 +599,7 @@ void test_vlseg3e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf8_mu( @@ -616,7 +616,7 @@ void test_vlseg3e8ff_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf4_mu( @@ -633,7 +633,7 @@ void test_vlseg3e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8mf2_mu( @@ -650,7 +650,7 @@ void test_vlseg3e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m1_mu( @@ -667,7 +667,7 @@ void test_vlseg3e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg3e8ff_v_u8m2_mu( @@ -684,6 +684,6 @@ void test_vlseg3e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg3e8ff_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg3e8ff_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); + return __riscv_vlseg3e8ff_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16.c index 03690f9c41cfcbeeb20058ec6c4337266591301f..1edb36bfcffb42c38d52a073927c986b514292a1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vlseg4e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vlseg4e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vlseg4e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf4_tu( @@ -89,7 +89,7 @@ void test_vlseg4e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf2_tu( @@ -106,7 +106,7 @@ void test_vlseg4e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m1_tu( @@ -123,7 +123,7 @@ void test_vlseg4e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m2_tu( @@ -140,7 +140,7 @@ void test_vlseg4e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf4_tu( @@ -157,7 +157,7 @@ void test_vlseg4e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf2_tu( @@ -174,7 +174,7 @@ void test_vlseg4e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m1_tu( @@ -191,7 +191,7 @@ void test_vlseg4e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m2_tu( @@ -208,7 +208,7 @@ void test_vlseg4e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf4_tum( @@ -225,7 +225,7 @@ void test_vlseg4e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf2_tum( @@ -242,7 +242,7 @@ void test_vlseg4e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m1_tum( @@ -259,7 +259,7 @@ void test_vlseg4e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m2_tum( @@ -276,7 +276,7 @@ void test_vlseg4e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf4_tum( @@ -293,7 +293,7 @@ void test_vlseg4e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf2_tum( @@ -310,7 +310,7 @@ void test_vlseg4e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m1_tum( @@ -327,7 +327,7 @@ void test_vlseg4e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m2_tum( @@ -344,7 +344,7 @@ void test_vlseg4e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf4_tum( @@ -361,7 +361,7 @@ void test_vlseg4e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf2_tum( @@ -378,7 +378,7 @@ void test_vlseg4e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m1_tum( @@ -395,7 +395,7 @@ void test_vlseg4e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m2_tum( @@ -412,7 +412,7 @@ void test_vlseg4e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf4_tumu( @@ -429,7 +429,7 @@ void test_vlseg4e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf2_tumu( @@ -446,7 +446,7 @@ void test_vlseg4e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m1_tumu( @@ -463,7 +463,7 @@ void test_vlseg4e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m2_tumu( @@ -480,7 +480,7 @@ void test_vlseg4e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf4_tumu( @@ -497,7 +497,7 @@ void test_vlseg4e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf2_tumu( @@ -514,7 +514,7 @@ void test_vlseg4e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m1_tumu( @@ -531,7 +531,7 @@ void test_vlseg4e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m2_tumu( @@ -548,7 +548,7 @@ void test_vlseg4e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf4_tumu( @@ -565,7 +565,7 @@ void test_vlseg4e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf2_tumu( @@ -582,7 +582,7 @@ void test_vlseg4e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m1_tumu( @@ -599,7 +599,7 @@ void test_vlseg4e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m2_tumu( @@ -616,7 +616,7 @@ void test_vlseg4e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf4_mu( @@ -633,7 +633,7 @@ void test_vlseg4e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16mf2_mu( @@ -650,7 +650,7 @@ void test_vlseg4e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m1_mu( @@ -667,7 +667,7 @@ void test_vlseg4e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_f16m2_mu( @@ -684,7 +684,7 @@ void test_vlseg4e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, size_t vl) { - return vlseg4e16_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf4_mu( @@ -701,7 +701,7 @@ void test_vlseg4e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16mf2_mu( @@ -718,7 +718,7 @@ void test_vlseg4e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m1_mu( @@ -735,7 +735,7 @@ void test_vlseg4e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_i16m2_mu( @@ -752,7 +752,7 @@ void test_vlseg4e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, size_t vl) { - return vlseg4e16_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf4_mu( @@ -769,7 +769,7 @@ void test_vlseg4e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16mf2_mu( @@ -786,7 +786,7 @@ void test_vlseg4e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m1_mu( @@ -803,7 +803,7 @@ void test_vlseg4e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16_v_u16m2_mu( @@ -820,6 +820,6 @@ void test_vlseg4e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, size_t vl) { - return vlseg4e16_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e16_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c index 05f70849922c82e0fb7e1f77be5048d0a423d9b7..21c24e1cfa5be5d9d012268f79119f9d33fff822 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e16ff.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vlseg4e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vlseg4e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m2_tu( @@ -80,7 +80,7 @@ void test_vlseg4e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf4_tu( @@ -99,7 +99,7 @@ void test_vlseg4e16ff_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf2_tu( @@ -118,7 +118,7 @@ void test_vlseg4e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m1_tu( @@ -137,7 +137,7 @@ void test_vlseg4e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m2_tu( @@ -156,7 +156,7 @@ void test_vlseg4e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf4_tu( @@ -175,7 +175,7 @@ void test_vlseg4e16ff_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf2_tu( @@ -194,7 +194,7 @@ void test_vlseg4e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m1_tu( @@ -213,7 +213,7 @@ void test_vlseg4e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m2_tu( @@ -232,7 +232,7 @@ void test_vlseg4e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf4_tum( @@ -251,7 +251,7 @@ void test_vlseg4e16ff_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf2_tum( @@ -270,7 +270,7 @@ void test_vlseg4e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m1_tum( @@ -289,7 +289,7 @@ void test_vlseg4e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m2_tum( @@ -308,7 +308,7 @@ void test_vlseg4e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf4_tum( @@ -327,7 +327,7 @@ void test_vlseg4e16ff_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf2_tum( @@ -346,7 +346,7 @@ void test_vlseg4e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m1_tum( @@ -365,7 +365,7 @@ void test_vlseg4e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m2_tum( @@ -384,7 +384,7 @@ void test_vlseg4e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf4_tum( @@ -403,7 +403,7 @@ void test_vlseg4e16ff_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf2_tum( @@ -422,7 +422,7 @@ void test_vlseg4e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m1_tum( @@ -441,7 +441,7 @@ void test_vlseg4e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m2_tum( @@ -460,7 +460,7 @@ void test_vlseg4e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf4_tumu( @@ -479,7 +479,7 @@ void test_vlseg4e16ff_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf2_tumu( @@ -498,7 +498,7 @@ void test_vlseg4e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m1_tumu( @@ -517,7 +517,7 @@ void test_vlseg4e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m2_tumu( @@ -536,7 +536,7 @@ void test_vlseg4e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf4_tumu( @@ -555,7 +555,7 @@ void test_vlseg4e16ff_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf2_tumu( @@ -574,7 +574,7 @@ void test_vlseg4e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m1_tumu( @@ -593,7 +593,7 @@ void test_vlseg4e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m2_tumu( @@ -612,7 +612,7 @@ void test_vlseg4e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf4_tumu( @@ -631,7 +631,7 @@ void test_vlseg4e16ff_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf2_tumu( @@ -650,7 +650,7 @@ void test_vlseg4e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m1_tumu( @@ -669,7 +669,7 @@ void test_vlseg4e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m2_tumu( @@ -688,7 +688,7 @@ void test_vlseg4e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf4_mu( @@ -707,7 +707,7 @@ void test_vlseg4e16ff_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16mf2_mu( @@ -726,7 +726,7 @@ void test_vlseg4e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m1_mu( @@ -745,7 +745,7 @@ void test_vlseg4e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_f16m2_mu( @@ -764,7 +764,7 @@ void test_vlseg4e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf4_mu( @@ -783,7 +783,7 @@ void test_vlseg4e16ff_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16mf2_mu( @@ -802,7 +802,7 @@ void test_vlseg4e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m1_mu( @@ -821,7 +821,7 @@ void test_vlseg4e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_i16m2_mu( @@ -840,7 +840,7 @@ void test_vlseg4e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf4_mu( @@ -859,7 +859,7 @@ void test_vlseg4e16ff_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16mf2_mu( @@ -878,7 +878,7 @@ void test_vlseg4e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m1_mu( @@ -897,7 +897,7 @@ void test_vlseg4e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e16ff_v_u16m2_mu( @@ -916,6 +916,6 @@ void test_vlseg4e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e16ff_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg4e16ff_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e16ff_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32.c index d8320069299b72e426f19cef2538306625520208..748a96aeb5b359f7628c8b28034df0c40bb71cf4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m1_tu( @@ -38,7 +38,7 @@ void test_vlseg4e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m2_tu( @@ -55,7 +55,7 @@ void test_vlseg4e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32mf2_tu( @@ -72,7 +72,7 @@ void test_vlseg4e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m1_tu( @@ -89,7 +89,7 @@ void test_vlseg4e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m2_tu( @@ -106,7 +106,7 @@ void test_vlseg4e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32mf2_tu( @@ -123,7 +123,7 @@ void test_vlseg4e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m1_tu( @@ -140,7 +140,7 @@ void test_vlseg4e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m2_tu( @@ -157,7 +157,7 @@ void test_vlseg4e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32mf2_tum( @@ -174,7 +174,7 @@ void test_vlseg4e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m1_tum( @@ -191,7 +191,7 @@ void test_vlseg4e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m2_tum( @@ -208,7 +208,7 @@ void test_vlseg4e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32mf2_tum( @@ -225,7 +225,7 @@ void test_vlseg4e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m1_tum( @@ -242,7 +242,7 @@ void test_vlseg4e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m2_tum( @@ -259,7 +259,7 @@ void test_vlseg4e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32mf2_tum( @@ -276,7 +276,7 @@ void test_vlseg4e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m1_tum( @@ -293,7 +293,7 @@ void test_vlseg4e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m2_tum( @@ -310,7 +310,7 @@ void test_vlseg4e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32mf2_tumu( @@ -327,7 +327,7 @@ void test_vlseg4e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m1_tumu( @@ -344,7 +344,7 @@ void test_vlseg4e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m2_tumu( @@ -361,7 +361,7 @@ void test_vlseg4e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32mf2_tumu( @@ -378,7 +378,7 @@ void test_vlseg4e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m1_tumu( @@ -395,7 +395,7 @@ void test_vlseg4e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m2_tumu( @@ -412,7 +412,7 @@ void test_vlseg4e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32mf2_tumu( @@ -429,7 +429,7 @@ void test_vlseg4e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m1_tumu( @@ -446,7 +446,7 @@ void test_vlseg4e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m2_tumu( @@ -463,7 +463,7 @@ void test_vlseg4e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32mf2_mu( @@ -480,7 +480,7 @@ void test_vlseg4e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m1_mu( @@ -497,7 +497,7 @@ void test_vlseg4e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_f32m2_mu( @@ -514,7 +514,7 @@ void test_vlseg4e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, size_t vl) { - return vlseg4e32_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32mf2_mu( @@ -531,7 +531,7 @@ void test_vlseg4e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m1_mu( @@ -548,7 +548,7 @@ void test_vlseg4e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_i32m2_mu( @@ -565,7 +565,7 @@ void test_vlseg4e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, size_t vl) { - return vlseg4e32_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32mf2_mu( @@ -582,7 +582,7 @@ void test_vlseg4e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m1_mu( @@ -599,7 +599,7 @@ void test_vlseg4e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32_v_u32m2_mu( @@ -616,6 +616,6 @@ void test_vlseg4e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, size_t vl) { - return vlseg4e32_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e32_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32ff.c index 95426e8881547d992b74fb1c78e5651bc4d9915d..80777fb7ab0ace3dab7e6c0e426a7280e8bf9ee1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e32ff.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m1_tu( @@ -42,7 +42,7 @@ void test_vlseg4e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m2_tu( @@ -61,7 +61,7 @@ void test_vlseg4e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32mf2_tu( @@ -80,7 +80,7 @@ void test_vlseg4e32ff_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m1_tu( @@ -99,7 +99,7 @@ void test_vlseg4e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m2_tu( @@ -118,7 +118,7 @@ void test_vlseg4e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32mf2_tu( @@ -137,7 +137,7 @@ void test_vlseg4e32ff_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m1_tu( @@ -156,7 +156,7 @@ void test_vlseg4e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m2_tu( @@ -175,7 +175,7 @@ void test_vlseg4e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32mf2_tum( @@ -194,7 +194,7 @@ void test_vlseg4e32ff_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m1_tum( @@ -213,7 +213,7 @@ void test_vlseg4e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m2_tum( @@ -232,7 +232,7 @@ void test_vlseg4e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32mf2_tum( @@ -251,7 +251,7 @@ void test_vlseg4e32ff_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m1_tum( @@ -270,7 +270,7 @@ void test_vlseg4e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m2_tum( @@ -289,7 +289,7 @@ void test_vlseg4e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32mf2_tum( @@ -308,7 +308,7 @@ void test_vlseg4e32ff_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m1_tum( @@ -327,7 +327,7 @@ void test_vlseg4e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m2_tum( @@ -346,7 +346,7 @@ void test_vlseg4e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32mf2_tumu( @@ -365,7 +365,7 @@ void test_vlseg4e32ff_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m1_tumu( @@ -384,7 +384,7 @@ void test_vlseg4e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m2_tumu( @@ -403,7 +403,7 @@ void test_vlseg4e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32mf2_tumu( @@ -422,7 +422,7 @@ void test_vlseg4e32ff_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m1_tumu( @@ -441,7 +441,7 @@ void test_vlseg4e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m2_tumu( @@ -460,7 +460,7 @@ void test_vlseg4e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32mf2_tumu( @@ -479,7 +479,7 @@ void test_vlseg4e32ff_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m1_tumu( @@ -498,7 +498,7 @@ void test_vlseg4e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m2_tumu( @@ -517,7 +517,7 @@ void test_vlseg4e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32mf2_mu( @@ -536,7 +536,7 @@ void test_vlseg4e32ff_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m1_mu( @@ -555,7 +555,7 @@ void test_vlseg4e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_f32m2_mu( @@ -574,7 +574,7 @@ void test_vlseg4e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32mf2_mu( @@ -593,7 +593,7 @@ void test_vlseg4e32ff_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m1_mu( @@ -612,7 +612,7 @@ void test_vlseg4e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_i32m2_mu( @@ -631,7 +631,7 @@ void test_vlseg4e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32mf2_mu( @@ -650,7 +650,7 @@ void test_vlseg4e32ff_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m1_mu( @@ -669,7 +669,7 @@ void test_vlseg4e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e32ff_v_u32m2_mu( @@ -688,6 +688,6 @@ void test_vlseg4e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e32ff_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg4e32ff_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e32ff_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64.c index 38b8b75f454faf94d042307a5f78d28bc3fd7542..2be60fb222079d17f4906eb1e3e345bf94dd506c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, size_t vl) { - return vlseg4e64_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m2_tu( @@ -38,7 +38,7 @@ void test_vlseg4e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, size_t vl) { - return vlseg4e64_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m1_tu( @@ -55,7 +55,7 @@ void test_vlseg4e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m2_tu( @@ -72,7 +72,7 @@ void test_vlseg4e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m1_tu( @@ -89,7 +89,7 @@ void test_vlseg4e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m2_tu( @@ -106,7 +106,7 @@ void test_vlseg4e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m1_tum( @@ -123,7 +123,7 @@ void test_vlseg4e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, size_t vl) { - return vlseg4e64_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m2_tum( @@ -140,7 +140,7 @@ void test_vlseg4e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, size_t vl) { - return vlseg4e64_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m1_tum( @@ -157,7 +157,7 @@ void test_vlseg4e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m2_tum( @@ -174,7 +174,7 @@ void test_vlseg4e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m1_tum( @@ -191,7 +191,7 @@ void test_vlseg4e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m2_tum( @@ -208,7 +208,7 @@ void test_vlseg4e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m1_tumu( @@ -225,7 +225,7 @@ void test_vlseg4e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, size_t vl) { - return vlseg4e64_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m2_tumu( @@ -242,7 +242,7 @@ void test_vlseg4e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, size_t vl) { - return vlseg4e64_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m1_tumu( @@ -259,7 +259,7 @@ void test_vlseg4e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m2_tumu( @@ -276,7 +276,7 @@ void test_vlseg4e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m1_tumu( @@ -293,7 +293,7 @@ void test_vlseg4e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m2_tumu( @@ -310,7 +310,7 @@ void test_vlseg4e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m1_mu( @@ -327,7 +327,7 @@ void test_vlseg4e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, size_t vl) { - return vlseg4e64_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_f64m2_mu( @@ -344,7 +344,7 @@ void test_vlseg4e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, size_t vl) { - return vlseg4e64_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m1_mu( @@ -361,7 +361,7 @@ void test_vlseg4e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_i64m2_mu( @@ -378,7 +378,7 @@ void test_vlseg4e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, size_t vl) { - return vlseg4e64_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m1_mu( @@ -395,7 +395,7 @@ void test_vlseg4e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64_v_u64m2_mu( @@ -412,6 +412,6 @@ void test_vlseg4e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, size_t vl) { - return vlseg4e64_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e64_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64ff.c index 654ce9be0f79e7053cd26f26903201b40ea6d7b3..13541197def942d5ce124af99e75a5db21bb29f5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e64ff.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m2_tu( @@ -42,7 +42,7 @@ void test_vlseg4e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m1_tu( @@ -61,7 +61,7 @@ void test_vlseg4e64ff_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m2_tu( @@ -80,7 +80,7 @@ void test_vlseg4e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m1_tu( @@ -99,7 +99,7 @@ void test_vlseg4e64ff_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m2_tu( @@ -118,7 +118,7 @@ void test_vlseg4e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m1_tum( @@ -137,7 +137,7 @@ void test_vlseg4e64ff_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m2_tum( @@ -156,7 +156,7 @@ void test_vlseg4e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m1_tum( @@ -175,7 +175,7 @@ void test_vlseg4e64ff_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m2_tum( @@ -194,7 +194,7 @@ void test_vlseg4e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m1_tum( @@ -213,7 +213,7 @@ void test_vlseg4e64ff_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m2_tum( @@ -232,7 +232,7 @@ void test_vlseg4e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m1_tumu( @@ -251,7 +251,7 @@ void test_vlseg4e64ff_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m2_tumu( @@ -270,7 +270,7 @@ void test_vlseg4e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m1_tumu( @@ -289,7 +289,7 @@ void test_vlseg4e64ff_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m2_tumu( @@ -308,7 +308,7 @@ void test_vlseg4e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m1_tumu( @@ -327,7 +327,7 @@ void test_vlseg4e64ff_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m2_tumu( @@ -346,7 +346,7 @@ void test_vlseg4e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m1_mu( @@ -365,7 +365,7 @@ void test_vlseg4e64ff_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_f64m2_mu( @@ -384,7 +384,7 @@ void test_vlseg4e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m1_mu( @@ -403,7 +403,7 @@ void test_vlseg4e64ff_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_i64m2_mu( @@ -422,7 +422,7 @@ void test_vlseg4e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m1_mu( @@ -441,7 +441,7 @@ void test_vlseg4e64ff_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e64ff_v_u64m2_mu( @@ -460,6 +460,6 @@ void test_vlseg4e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e64ff_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg4e64ff_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e64ff_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8.c index 69d9e9f097dfcdb5e290f04b067a33c7bdc980ad..85ef88531ea759f724b8f6ac943c397c68f70c6f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8.c @@ -20,7 +20,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf4_tu( @@ -37,7 +37,7 @@ void test_vlseg4e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf2_tu( @@ -54,7 +54,7 @@ void test_vlseg4e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m1_tu( @@ -71,7 +71,7 @@ void test_vlseg4e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m2_tu( @@ -88,7 +88,7 @@ void test_vlseg4e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf8_tu( @@ -105,7 +105,7 @@ void test_vlseg4e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf4_tu( @@ -122,7 +122,7 @@ void test_vlseg4e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf2_tu( @@ -139,7 +139,7 @@ void test_vlseg4e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m1_tu( @@ -156,7 +156,7 @@ void test_vlseg4e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m2_tu( @@ -173,7 +173,7 @@ void test_vlseg4e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf8_tum( @@ -190,7 +190,7 @@ void test_vlseg4e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf4_tum( @@ -207,7 +207,7 @@ void test_vlseg4e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf2_tum( @@ -224,7 +224,7 @@ void test_vlseg4e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m1_tum( @@ -241,7 +241,7 @@ void test_vlseg4e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m2_tum( @@ -258,7 +258,7 @@ void test_vlseg4e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf8_tum( @@ -275,7 +275,7 @@ void test_vlseg4e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf4_tum( @@ -292,7 +292,7 @@ void test_vlseg4e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf2_tum( @@ -309,7 +309,7 @@ void test_vlseg4e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m1_tum( @@ -326,7 +326,7 @@ void test_vlseg4e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m2_tum( @@ -343,7 +343,7 @@ void test_vlseg4e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf8_tumu( @@ -360,7 +360,7 @@ void test_vlseg4e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf4_tumu( @@ -377,7 +377,7 @@ void test_vlseg4e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf2_tumu( @@ -394,7 +394,7 @@ void test_vlseg4e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m1_tumu( @@ -411,7 +411,7 @@ void test_vlseg4e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m2_tumu( @@ -428,7 +428,7 @@ void test_vlseg4e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf8_tumu( @@ -445,7 +445,7 @@ void test_vlseg4e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf4_tumu( @@ -462,7 +462,7 @@ void test_vlseg4e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf2_tumu( @@ -479,7 +479,7 @@ void test_vlseg4e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m1_tumu( @@ -496,7 +496,7 @@ void test_vlseg4e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m2_tumu( @@ -513,7 +513,7 @@ void test_vlseg4e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf8_mu( @@ -530,7 +530,7 @@ void test_vlseg4e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf4_mu( @@ -547,7 +547,7 @@ void test_vlseg4e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8mf2_mu( @@ -564,7 +564,7 @@ void test_vlseg4e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m1_mu( @@ -581,7 +581,7 @@ void test_vlseg4e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_i8m2_mu( @@ -598,7 +598,7 @@ void test_vlseg4e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, size_t vl) { - return vlseg4e8_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf8_mu( @@ -615,7 +615,7 @@ void test_vlseg4e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf4_mu( @@ -632,7 +632,7 @@ void test_vlseg4e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8mf2_mu( @@ -649,7 +649,7 @@ void test_vlseg4e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m1_mu( @@ -666,7 +666,7 @@ void test_vlseg4e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8_v_u8m2_mu( @@ -683,6 +683,6 @@ void test_vlseg4e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg4e8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, size_t vl) { - return vlseg4e8_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); + return __riscv_vlseg4e8_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8ff.c index 3094ea1a3a7718d60084217b59c3065031597e89..91ed238c4227023bea4eaabc7e86edad94f1c47f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg4e8ff.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf4_tu( @@ -42,7 +42,7 @@ void test_vlseg4e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf2_tu( @@ -61,7 +61,7 @@ void test_vlseg4e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m1_tu( @@ -80,7 +80,7 @@ void test_vlseg4e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m2_tu( @@ -99,7 +99,7 @@ void test_vlseg4e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf8_tu( @@ -118,7 +118,7 @@ void test_vlseg4e8ff_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf4_tu( @@ -137,7 +137,7 @@ void test_vlseg4e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf2_tu( @@ -156,7 +156,7 @@ void test_vlseg4e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m1_tu( @@ -175,7 +175,7 @@ void test_vlseg4e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m2_tu( @@ -194,7 +194,7 @@ void test_vlseg4e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf8_tum( @@ -213,7 +213,7 @@ void test_vlseg4e8ff_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf4_tum( @@ -232,7 +232,7 @@ void test_vlseg4e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf2_tum( @@ -251,7 +251,7 @@ void test_vlseg4e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m1_tum( @@ -270,7 +270,7 @@ void test_vlseg4e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m2_tum( @@ -289,7 +289,7 @@ void test_vlseg4e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf8_tum( @@ -308,7 +308,7 @@ void test_vlseg4e8ff_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf4_tum( @@ -327,7 +327,7 @@ void test_vlseg4e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf2_tum( @@ -346,7 +346,7 @@ void test_vlseg4e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m1_tum( @@ -365,7 +365,7 @@ void test_vlseg4e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m2_tum( @@ -384,7 +384,7 @@ void test_vlseg4e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf8_tumu( @@ -403,7 +403,7 @@ void test_vlseg4e8ff_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf4_tumu( @@ -422,7 +422,7 @@ void test_vlseg4e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf2_tumu( @@ -441,7 +441,7 @@ void test_vlseg4e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m1_tumu( @@ -460,7 +460,7 @@ void test_vlseg4e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m2_tumu( @@ -479,7 +479,7 @@ void test_vlseg4e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf8_tumu( @@ -498,7 +498,7 @@ void test_vlseg4e8ff_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf4_tumu( @@ -517,7 +517,7 @@ void test_vlseg4e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf2_tumu( @@ -536,7 +536,7 @@ void test_vlseg4e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m1_tumu( @@ -555,7 +555,7 @@ void test_vlseg4e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m2_tumu( @@ -574,7 +574,7 @@ void test_vlseg4e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf8_mu( @@ -593,7 +593,7 @@ void test_vlseg4e8ff_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf4_mu( @@ -612,7 +612,7 @@ void test_vlseg4e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8mf2_mu( @@ -631,7 +631,7 @@ void test_vlseg4e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m1_mu( @@ -650,7 +650,7 @@ void test_vlseg4e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_i8m2_mu( @@ -669,7 +669,7 @@ void test_vlseg4e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf8_mu( @@ -688,7 +688,7 @@ void test_vlseg4e8ff_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf4_mu( @@ -707,7 +707,7 @@ void test_vlseg4e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8mf2_mu( @@ -726,7 +726,7 @@ void test_vlseg4e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m1_mu( @@ -745,7 +745,7 @@ void test_vlseg4e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg4e8ff_v_u8m2_mu( @@ -764,6 +764,6 @@ void test_vlseg4e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg4e8ff_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg4e8ff_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); + return __riscv_vlseg4e8ff_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16.c index d4387258e16f821d1ec2c7e7738ae0c1dc6caaef..3f1e54ae898b99eb1b7dcc08646c0fbec3d7bd3b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vlseg5e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vlseg5e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf4_tu( @@ -80,7 +80,7 @@ void test_vlseg5e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf2_tu( @@ -99,7 +99,7 @@ void test_vlseg5e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16m1_tu( @@ -118,7 +118,7 @@ void test_vlseg5e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf4_tu( @@ -137,7 +137,7 @@ void test_vlseg5e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf2_tu( @@ -156,7 +156,7 @@ void test_vlseg5e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16m1_tu( @@ -175,7 +175,7 @@ void test_vlseg5e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf4_tum( @@ -194,7 +194,7 @@ void test_vlseg5e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf2_tum( @@ -213,7 +213,7 @@ void test_vlseg5e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16m1_tum( @@ -232,7 +232,7 @@ void test_vlseg5e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf4_tum( @@ -251,7 +251,7 @@ void test_vlseg5e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf2_tum( @@ -270,7 +270,7 @@ void test_vlseg5e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16m1_tum( @@ -289,7 +289,7 @@ void test_vlseg5e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf4_tum( @@ -308,7 +308,7 @@ void test_vlseg5e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf2_tum( @@ -327,7 +327,7 @@ void test_vlseg5e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16m1_tum( @@ -346,7 +346,7 @@ void test_vlseg5e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf4_tumu( @@ -365,7 +365,7 @@ void test_vlseg5e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf2_tumu( @@ -384,7 +384,7 @@ void test_vlseg5e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16m1_tumu( @@ -403,7 +403,7 @@ void test_vlseg5e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf4_tumu( @@ -422,7 +422,7 @@ void test_vlseg5e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf2_tumu( @@ -441,7 +441,7 @@ void test_vlseg5e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16m1_tumu( @@ -460,7 +460,7 @@ void test_vlseg5e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf4_tumu( @@ -479,7 +479,7 @@ void test_vlseg5e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf2_tumu( @@ -498,7 +498,7 @@ void test_vlseg5e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16m1_tumu( @@ -517,7 +517,7 @@ void test_vlseg5e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf4_mu( @@ -536,7 +536,7 @@ void test_vlseg5e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16mf2_mu( @@ -555,7 +555,7 @@ void test_vlseg5e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_f16m1_mu( @@ -574,7 +574,7 @@ void test_vlseg5e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, size_t vl) { - return vlseg5e16_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf4_mu( @@ -593,7 +593,7 @@ void test_vlseg5e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16mf2_mu( @@ -612,7 +612,7 @@ void test_vlseg5e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_i16m1_mu( @@ -631,7 +631,7 @@ void test_vlseg5e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, size_t vl) { - return vlseg5e16_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf4_mu( @@ -650,7 +650,7 @@ void test_vlseg5e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16mf2_mu( @@ -669,7 +669,7 @@ void test_vlseg5e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16_v_u16m1_mu( @@ -688,6 +688,6 @@ void test_vlseg5e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, size_t vl) { - return vlseg5e16_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e16_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16ff.c index f274e71db538ff6a9a65b31a933b5704b62ed0b0..6a676f89c562f66fbea4857c8037fba426718e89 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e16ff.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vlseg5e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vlseg5e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf4_tu( @@ -88,7 +88,7 @@ void test_vlseg5e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf2_tu( @@ -109,7 +109,7 @@ void test_vlseg5e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16m1_tu( @@ -130,7 +130,7 @@ void test_vlseg5e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf4_tu( @@ -151,7 +151,7 @@ void test_vlseg5e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf2_tu( @@ -172,7 +172,7 @@ void test_vlseg5e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16m1_tu( @@ -193,7 +193,7 @@ void test_vlseg5e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf4_tum( @@ -214,7 +214,7 @@ void test_vlseg5e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf2_tum( @@ -235,7 +235,7 @@ void test_vlseg5e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16m1_tum( @@ -256,7 +256,7 @@ void test_vlseg5e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf4_tum( @@ -277,7 +277,7 @@ void test_vlseg5e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf2_tum( @@ -298,7 +298,7 @@ void test_vlseg5e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16m1_tum( @@ -319,7 +319,7 @@ void test_vlseg5e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf4_tum( @@ -340,7 +340,7 @@ void test_vlseg5e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf2_tum( @@ -361,7 +361,7 @@ void test_vlseg5e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16m1_tum( @@ -382,7 +382,7 @@ void test_vlseg5e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf4_tumu( @@ -403,7 +403,7 @@ void test_vlseg5e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf2_tumu( @@ -424,7 +424,7 @@ void test_vlseg5e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16m1_tumu( @@ -445,7 +445,7 @@ void test_vlseg5e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf4_tumu( @@ -466,7 +466,7 @@ void test_vlseg5e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf2_tumu( @@ -487,7 +487,7 @@ void test_vlseg5e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16m1_tumu( @@ -508,7 +508,7 @@ void test_vlseg5e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf4_tumu( @@ -529,7 +529,7 @@ void test_vlseg5e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf2_tumu( @@ -550,7 +550,7 @@ void test_vlseg5e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16m1_tumu( @@ -571,7 +571,7 @@ void test_vlseg5e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf4_mu( @@ -592,7 +592,7 @@ void test_vlseg5e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16mf2_mu( @@ -613,7 +613,7 @@ void test_vlseg5e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_f16m1_mu( @@ -634,7 +634,7 @@ void test_vlseg5e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf4_mu( @@ -655,7 +655,7 @@ void test_vlseg5e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16mf2_mu( @@ -676,7 +676,7 @@ void test_vlseg5e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_i16m1_mu( @@ -697,7 +697,7 @@ void test_vlseg5e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf4_mu( @@ -718,7 +718,7 @@ void test_vlseg5e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16mf2_mu( @@ -739,7 +739,7 @@ void test_vlseg5e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e16ff_v_u16m1_mu( @@ -760,6 +760,6 @@ void test_vlseg5e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg5e16ff_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e16ff_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32.c index 47ef593e5170b75ba216a475271535d1ec41512a..b8c636f4c2a5c940d90a345bc2722ade84f65c7b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, size_t vl) { - return vlseg5e32_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32m1_tu( @@ -42,7 +42,7 @@ void test_vlseg5e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, size_t vl) { - return vlseg5e32_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32mf2_tu( @@ -61,7 +61,7 @@ void test_vlseg5e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32m1_tu( @@ -80,7 +80,7 @@ void test_vlseg5e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32mf2_tu( @@ -99,7 +99,7 @@ void test_vlseg5e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32m1_tu( @@ -118,7 +118,7 @@ void test_vlseg5e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32mf2_tum( @@ -137,7 +137,7 @@ void test_vlseg5e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, size_t vl) { - return vlseg5e32_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32m1_tum( @@ -156,7 +156,7 @@ void test_vlseg5e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, size_t vl) { - return vlseg5e32_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32mf2_tum( @@ -175,7 +175,7 @@ void test_vlseg5e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32m1_tum( @@ -194,7 +194,7 @@ void test_vlseg5e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32mf2_tum( @@ -213,7 +213,7 @@ void test_vlseg5e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32m1_tum( @@ -232,7 +232,7 @@ void test_vlseg5e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32mf2_tumu( @@ -251,7 +251,7 @@ void test_vlseg5e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, size_t vl) { - return vlseg5e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32m1_tumu( @@ -270,7 +270,7 @@ void test_vlseg5e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, size_t vl) { - return vlseg5e32_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32mf2_tumu( @@ -289,7 +289,7 @@ void test_vlseg5e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32m1_tumu( @@ -308,7 +308,7 @@ void test_vlseg5e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32mf2_tumu( @@ -327,7 +327,7 @@ void test_vlseg5e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32m1_tumu( @@ -346,7 +346,7 @@ void test_vlseg5e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32mf2_mu( @@ -365,7 +365,7 @@ void test_vlseg5e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, size_t vl) { - return vlseg5e32_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_f32m1_mu( @@ -384,7 +384,7 @@ void test_vlseg5e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, size_t vl) { - return vlseg5e32_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32mf2_mu( @@ -403,7 +403,7 @@ void test_vlseg5e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_i32m1_mu( @@ -422,7 +422,7 @@ void test_vlseg5e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, size_t vl) { - return vlseg5e32_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32mf2_mu( @@ -441,7 +441,7 @@ void test_vlseg5e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32_v_u32m1_mu( @@ -460,6 +460,6 @@ void test_vlseg5e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, size_t vl) { - return vlseg5e32_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e32_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32ff.c index f69f920b673b1ee91373ac5c6aa598278458334c..d2502c1eabd61a30a212f60a8b281621b8cf1784 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e32ff.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32m1_tu( @@ -46,7 +46,7 @@ void test_vlseg5e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32mf2_tu( @@ -67,7 +67,7 @@ void test_vlseg5e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32m1_tu( @@ -88,7 +88,7 @@ void test_vlseg5e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32mf2_tu( @@ -109,7 +109,7 @@ void test_vlseg5e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32m1_tu( @@ -130,7 +130,7 @@ void test_vlseg5e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32mf2_tum( @@ -151,7 +151,7 @@ void test_vlseg5e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32m1_tum( @@ -172,7 +172,7 @@ void test_vlseg5e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32mf2_tum( @@ -193,7 +193,7 @@ void test_vlseg5e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32m1_tum( @@ -214,7 +214,7 @@ void test_vlseg5e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32mf2_tum( @@ -235,7 +235,7 @@ void test_vlseg5e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32m1_tum( @@ -256,7 +256,7 @@ void test_vlseg5e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32mf2_tumu( @@ -277,7 +277,7 @@ void test_vlseg5e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32m1_tumu( @@ -298,7 +298,7 @@ void test_vlseg5e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32mf2_tumu( @@ -319,7 +319,7 @@ void test_vlseg5e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32m1_tumu( @@ -340,7 +340,7 @@ void test_vlseg5e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32mf2_tumu( @@ -361,7 +361,7 @@ void test_vlseg5e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32m1_tumu( @@ -382,7 +382,7 @@ void test_vlseg5e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32mf2_mu( @@ -403,7 +403,7 @@ void test_vlseg5e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_f32m1_mu( @@ -424,7 +424,7 @@ void test_vlseg5e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32mf2_mu( @@ -445,7 +445,7 @@ void test_vlseg5e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_i32m1_mu( @@ -466,7 +466,7 @@ void test_vlseg5e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32mf2_mu( @@ -487,7 +487,7 @@ void test_vlseg5e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e32ff_v_u32m1_mu( @@ -508,6 +508,6 @@ void test_vlseg5e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg5e32ff_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e32ff_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64.c index 6351b3cdcd017e67b11219c63f6c026fb802c9f1..e52818ee0a8b8ab4302e97f22c9ce34406263bd6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, size_t vl) { - return vlseg5e64_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_i64m1_tu( @@ -42,7 +42,7 @@ void test_vlseg5e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, size_t vl) { - return vlseg5e64_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_u64m1_tu( @@ -61,7 +61,7 @@ void test_vlseg5e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, size_t vl) { - return vlseg5e64_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_f64m1_tum( @@ -80,7 +80,7 @@ void test_vlseg5e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, size_t vl) { - return vlseg5e64_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_i64m1_tum( @@ -99,7 +99,7 @@ void test_vlseg5e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, size_t vl) { - return vlseg5e64_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_u64m1_tum( @@ -118,7 +118,7 @@ void test_vlseg5e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, size_t vl) { - return vlseg5e64_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_f64m1_tumu( @@ -137,7 +137,7 @@ void test_vlseg5e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, size_t vl) { - return vlseg5e64_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_i64m1_tumu( @@ -156,7 +156,7 @@ void test_vlseg5e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, size_t vl) { - return vlseg5e64_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_u64m1_tumu( @@ -175,7 +175,7 @@ void test_vlseg5e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, size_t vl) { - return vlseg5e64_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_f64m1_mu( @@ -194,7 +194,7 @@ void test_vlseg5e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, size_t vl) { - return vlseg5e64_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_i64m1_mu( @@ -213,7 +213,7 @@ void test_vlseg5e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, size_t vl) { - return vlseg5e64_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64_v_u64m1_mu( @@ -232,6 +232,6 @@ void test_vlseg5e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, size_t vl) { - return vlseg5e64_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e64_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64ff.c index 05c23ad651cec5618c589dbb7ac729c68bc84ad5..d6de316c4f0d5efd1d73fbd705df884a9a6c18aa 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e64ff.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_i64m1_tu( @@ -46,7 +46,7 @@ void test_vlseg5e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_u64m1_tu( @@ -67,7 +67,7 @@ void test_vlseg5e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_f64m1_tum( @@ -88,7 +88,7 @@ void test_vlseg5e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_i64m1_tum( @@ -109,7 +109,7 @@ void test_vlseg5e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_u64m1_tum( @@ -130,7 +130,7 @@ void test_vlseg5e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_f64m1_tumu( @@ -151,7 +151,7 @@ void test_vlseg5e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_i64m1_tumu( @@ -172,7 +172,7 @@ void test_vlseg5e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_u64m1_tumu( @@ -193,7 +193,7 @@ void test_vlseg5e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_f64m1_mu( @@ -214,7 +214,7 @@ void test_vlseg5e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_i64m1_mu( @@ -235,7 +235,7 @@ void test_vlseg5e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e64ff_v_u64m1_mu( @@ -256,6 +256,6 @@ void test_vlseg5e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg5e64ff_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e64ff_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8.c index c8cd90cc7a9c688a45cc10054dfcdb7f4636c9f7..e74180c8ae6463767e69b0d718f3773b7a4f112d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8.c @@ -22,7 +22,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf4_tu( @@ -41,7 +41,7 @@ void test_vlseg5e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf2_tu( @@ -60,7 +60,7 @@ void test_vlseg5e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8m1_tu( @@ -79,7 +79,7 @@ void test_vlseg5e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf8_tu( @@ -98,7 +98,7 @@ void test_vlseg5e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf4_tu( @@ -117,7 +117,7 @@ void test_vlseg5e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf2_tu( @@ -136,7 +136,7 @@ void test_vlseg5e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8m1_tu( @@ -155,7 +155,7 @@ void test_vlseg5e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf8_tum( @@ -174,7 +174,7 @@ void test_vlseg5e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf4_tum( @@ -193,7 +193,7 @@ void test_vlseg5e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf2_tum( @@ -212,7 +212,7 @@ void test_vlseg5e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8m1_tum( @@ -231,7 +231,7 @@ void test_vlseg5e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf8_tum( @@ -250,7 +250,7 @@ void test_vlseg5e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf4_tum( @@ -269,7 +269,7 @@ void test_vlseg5e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf2_tum( @@ -288,7 +288,7 @@ void test_vlseg5e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8m1_tum( @@ -307,7 +307,7 @@ void test_vlseg5e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf8_tumu( @@ -326,7 +326,7 @@ void test_vlseg5e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf4_tumu( @@ -345,7 +345,7 @@ void test_vlseg5e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf2_tumu( @@ -364,7 +364,7 @@ void test_vlseg5e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8m1_tumu( @@ -383,7 +383,7 @@ void test_vlseg5e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf8_tumu( @@ -402,7 +402,7 @@ void test_vlseg5e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf4_tumu( @@ -421,7 +421,7 @@ void test_vlseg5e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf2_tumu( @@ -440,7 +440,7 @@ void test_vlseg5e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8m1_tumu( @@ -459,7 +459,7 @@ void test_vlseg5e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf8_mu( @@ -478,7 +478,7 @@ void test_vlseg5e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf4_mu( @@ -497,7 +497,7 @@ void test_vlseg5e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8mf2_mu( @@ -516,7 +516,7 @@ void test_vlseg5e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_i8m1_mu( @@ -535,7 +535,7 @@ void test_vlseg5e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, size_t vl) { - return vlseg5e8_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf8_mu( @@ -554,7 +554,7 @@ void test_vlseg5e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf4_mu( @@ -573,7 +573,7 @@ void test_vlseg5e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8mf2_mu( @@ -592,7 +592,7 @@ void test_vlseg5e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8_v_u8m1_mu( @@ -611,6 +611,6 @@ void test_vlseg5e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, size_t vl) { - return vlseg5e8_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); + return __riscv_vlseg5e8_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8ff.c index 19d1069d455cc423521a481f70b68ab1ddc4ef3e..0d10e1bbf0bd75fdba67415f4cfbcfed5deeee56 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg5e8ff.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf4_tu( @@ -46,7 +46,7 @@ void test_vlseg5e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf2_tu( @@ -67,7 +67,7 @@ void test_vlseg5e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8m1_tu( @@ -88,7 +88,7 @@ void test_vlseg5e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf8_tu( @@ -109,7 +109,7 @@ void test_vlseg5e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf4_tu( @@ -130,7 +130,7 @@ void test_vlseg5e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf2_tu( @@ -151,7 +151,7 @@ void test_vlseg5e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8m1_tu( @@ -172,7 +172,7 @@ void test_vlseg5e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf8_tum( @@ -193,7 +193,7 @@ void test_vlseg5e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf4_tum( @@ -214,7 +214,7 @@ void test_vlseg5e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf2_tum( @@ -235,7 +235,7 @@ void test_vlseg5e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8m1_tum( @@ -256,7 +256,7 @@ void test_vlseg5e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf8_tum( @@ -277,7 +277,7 @@ void test_vlseg5e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf4_tum( @@ -298,7 +298,7 @@ void test_vlseg5e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf2_tum( @@ -319,7 +319,7 @@ void test_vlseg5e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8m1_tum( @@ -340,7 +340,7 @@ void test_vlseg5e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf8_tumu( @@ -361,7 +361,7 @@ void test_vlseg5e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf4_tumu( @@ -382,7 +382,7 @@ void test_vlseg5e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf2_tumu( @@ -403,7 +403,7 @@ void test_vlseg5e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8m1_tumu( @@ -424,7 +424,7 @@ void test_vlseg5e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf8_tumu( @@ -445,7 +445,7 @@ void test_vlseg5e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf4_tumu( @@ -466,7 +466,7 @@ void test_vlseg5e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf2_tumu( @@ -487,7 +487,7 @@ void test_vlseg5e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8m1_tumu( @@ -508,7 +508,7 @@ void test_vlseg5e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf8_mu( @@ -529,7 +529,7 @@ void test_vlseg5e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf4_mu( @@ -550,7 +550,7 @@ void test_vlseg5e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8mf2_mu( @@ -571,7 +571,7 @@ void test_vlseg5e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_i8m1_mu( @@ -592,7 +592,7 @@ void test_vlseg5e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf8_mu( @@ -613,7 +613,7 @@ void test_vlseg5e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf4_mu( @@ -634,7 +634,7 @@ void test_vlseg5e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8mf2_mu( @@ -655,7 +655,7 @@ void test_vlseg5e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg5e8ff_v_u8m1_mu( @@ -676,6 +676,6 @@ void test_vlseg5e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg5e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg5e8ff_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); + return __riscv_vlseg5e8ff_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16.c index 705a2f032566e7879b7982fa22c4ba798b1d1131..2b7179e6c0cfb9d9228ddc683a0cb2cf705361b3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vlseg6e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vlseg6e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf4_tu( @@ -88,7 +88,7 @@ void test_vlseg6e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf2_tu( @@ -109,7 +109,7 @@ void test_vlseg6e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16m1_tu( @@ -130,7 +130,7 @@ void test_vlseg6e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf4_tu( @@ -151,7 +151,7 @@ void test_vlseg6e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf2_tu( @@ -172,7 +172,7 @@ void test_vlseg6e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16m1_tu( @@ -193,7 +193,7 @@ void test_vlseg6e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf4_tum( @@ -214,7 +214,7 @@ void test_vlseg6e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf2_tum( @@ -235,7 +235,7 @@ void test_vlseg6e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16m1_tum( @@ -256,7 +256,7 @@ void test_vlseg6e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf4_tum( @@ -277,7 +277,7 @@ void test_vlseg6e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf2_tum( @@ -298,7 +298,7 @@ void test_vlseg6e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16m1_tum( @@ -319,7 +319,7 @@ void test_vlseg6e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf4_tum( @@ -340,7 +340,7 @@ void test_vlseg6e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf2_tum( @@ -361,7 +361,7 @@ void test_vlseg6e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16m1_tum( @@ -382,7 +382,7 @@ void test_vlseg6e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf4_tumu( @@ -403,7 +403,7 @@ void test_vlseg6e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf2_tumu( @@ -424,7 +424,7 @@ void test_vlseg6e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16m1_tumu( @@ -445,7 +445,7 @@ void test_vlseg6e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf4_tumu( @@ -466,7 +466,7 @@ void test_vlseg6e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf2_tumu( @@ -487,7 +487,7 @@ void test_vlseg6e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16m1_tumu( @@ -508,7 +508,7 @@ void test_vlseg6e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf4_tumu( @@ -529,7 +529,7 @@ void test_vlseg6e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf2_tumu( @@ -550,7 +550,7 @@ void test_vlseg6e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16m1_tumu( @@ -571,7 +571,7 @@ void test_vlseg6e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf4_mu( @@ -592,7 +592,7 @@ void test_vlseg6e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16mf2_mu( @@ -613,7 +613,7 @@ void test_vlseg6e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_f16m1_mu( @@ -634,7 +634,7 @@ void test_vlseg6e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, size_t vl) { - return vlseg6e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf4_mu( @@ -655,7 +655,7 @@ void test_vlseg6e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16mf2_mu( @@ -676,7 +676,7 @@ void test_vlseg6e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_i16m1_mu( @@ -697,7 +697,7 @@ void test_vlseg6e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, size_t vl) { - return vlseg6e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf4_mu( @@ -718,7 +718,7 @@ void test_vlseg6e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16mf2_mu( @@ -739,7 +739,7 @@ void test_vlseg6e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16_v_u16m1_mu( @@ -760,6 +760,6 @@ void test_vlseg6e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, size_t vl) { - return vlseg6e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c index 01124127d8f24c636ada506867cc95bbfbfb6f70..f5531e20e60d153608d5c1ee2a19cc81843835ae 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e16ff.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vlseg6e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vlseg6e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf4_tu( @@ -96,7 +96,7 @@ void test_vlseg6e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf2_tu( @@ -119,7 +119,7 @@ void test_vlseg6e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16m1_tu( @@ -142,7 +142,7 @@ void test_vlseg6e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf4_tu( @@ -165,7 +165,7 @@ void test_vlseg6e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf2_tu( @@ -188,7 +188,7 @@ void test_vlseg6e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16m1_tu( @@ -211,7 +211,7 @@ void test_vlseg6e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf4_tum( @@ -234,7 +234,7 @@ void test_vlseg6e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf2_tum( @@ -257,7 +257,7 @@ void test_vlseg6e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16m1_tum( @@ -280,7 +280,7 @@ void test_vlseg6e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf4_tum( @@ -303,7 +303,7 @@ void test_vlseg6e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf2_tum( @@ -326,7 +326,7 @@ void test_vlseg6e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16m1_tum( @@ -349,7 +349,7 @@ void test_vlseg6e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf4_tum( @@ -372,7 +372,7 @@ void test_vlseg6e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf2_tum( @@ -395,7 +395,7 @@ void test_vlseg6e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16m1_tum( @@ -418,7 +418,7 @@ void test_vlseg6e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf4_tumu( @@ -441,7 +441,7 @@ void test_vlseg6e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf2_tumu( @@ -464,7 +464,7 @@ void test_vlseg6e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16m1_tumu( @@ -487,7 +487,7 @@ void test_vlseg6e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf4_tumu( @@ -510,7 +510,7 @@ void test_vlseg6e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf2_tumu( @@ -533,7 +533,7 @@ void test_vlseg6e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16m1_tumu( @@ -556,7 +556,7 @@ void test_vlseg6e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf4_tumu( @@ -579,7 +579,7 @@ void test_vlseg6e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf2_tumu( @@ -602,7 +602,7 @@ void test_vlseg6e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16m1_tumu( @@ -625,7 +625,7 @@ void test_vlseg6e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf4_mu( @@ -648,7 +648,7 @@ void test_vlseg6e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16mf2_mu( @@ -671,7 +671,7 @@ void test_vlseg6e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_f16m1_mu( @@ -694,7 +694,7 @@ void test_vlseg6e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf4_mu( @@ -717,7 +717,7 @@ void test_vlseg6e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16mf2_mu( @@ -740,7 +740,7 @@ void test_vlseg6e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_i16m1_mu( @@ -763,7 +763,7 @@ void test_vlseg6e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf4_mu( @@ -786,7 +786,7 @@ void test_vlseg6e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16mf2_mu( @@ -809,7 +809,7 @@ void test_vlseg6e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e16ff_v_u16m1_mu( @@ -832,6 +832,6 @@ void test_vlseg6e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg6e16ff_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e16ff_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32.c index 07f469aca7bf9847096e71bad45fbfa158b4baed..224d0a239cda2c1620445cd9ca2bc5d9490c3dee 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, size_t vl) { - return vlseg6e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32m1_tu( @@ -46,7 +46,7 @@ void test_vlseg6e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, size_t vl) { - return vlseg6e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32mf2_tu( @@ -67,7 +67,7 @@ void test_vlseg6e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32m1_tu( @@ -88,7 +88,7 @@ void test_vlseg6e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32mf2_tu( @@ -109,7 +109,7 @@ void test_vlseg6e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32m1_tu( @@ -130,7 +130,7 @@ void test_vlseg6e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32mf2_tum( @@ -151,7 +151,7 @@ void test_vlseg6e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, size_t vl) { - return vlseg6e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32m1_tum( @@ -172,7 +172,7 @@ void test_vlseg6e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, size_t vl) { - return vlseg6e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32mf2_tum( @@ -193,7 +193,7 @@ void test_vlseg6e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32m1_tum( @@ -214,7 +214,7 @@ void test_vlseg6e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32mf2_tum( @@ -235,7 +235,7 @@ void test_vlseg6e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32m1_tum( @@ -256,7 +256,7 @@ void test_vlseg6e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32mf2_tumu( @@ -277,7 +277,7 @@ void test_vlseg6e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, size_t vl) { - return vlseg6e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32m1_tumu( @@ -298,7 +298,7 @@ void test_vlseg6e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, size_t vl) { - return vlseg6e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32mf2_tumu( @@ -319,7 +319,7 @@ void test_vlseg6e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32m1_tumu( @@ -340,7 +340,7 @@ void test_vlseg6e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32mf2_tumu( @@ -361,7 +361,7 @@ void test_vlseg6e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32m1_tumu( @@ -382,7 +382,7 @@ void test_vlseg6e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32mf2_mu( @@ -403,7 +403,7 @@ void test_vlseg6e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, size_t vl) { - return vlseg6e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_f32m1_mu( @@ -424,7 +424,7 @@ void test_vlseg6e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, size_t vl) { - return vlseg6e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32mf2_mu( @@ -445,7 +445,7 @@ void test_vlseg6e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_i32m1_mu( @@ -466,7 +466,7 @@ void test_vlseg6e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, size_t vl) { - return vlseg6e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32mf2_mu( @@ -487,7 +487,7 @@ void test_vlseg6e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32_v_u32m1_mu( @@ -508,6 +508,6 @@ void test_vlseg6e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, size_t vl) { - return vlseg6e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32ff.c index f8127630932b82b8b5c050b0d774d34cbe42eabb..f02db224a3b9a4d627f4e7be4c7858ebfc4412ad 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e32ff.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32m1_tu( @@ -50,7 +50,7 @@ void test_vlseg6e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32mf2_tu( @@ -73,7 +73,7 @@ void test_vlseg6e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32m1_tu( @@ -96,7 +96,7 @@ void test_vlseg6e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32mf2_tu( @@ -119,7 +119,7 @@ void test_vlseg6e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32m1_tu( @@ -142,7 +142,7 @@ void test_vlseg6e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32mf2_tum( @@ -165,7 +165,7 @@ void test_vlseg6e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32m1_tum( @@ -188,7 +188,7 @@ void test_vlseg6e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32mf2_tum( @@ -211,7 +211,7 @@ void test_vlseg6e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32m1_tum( @@ -234,7 +234,7 @@ void test_vlseg6e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32mf2_tum( @@ -257,7 +257,7 @@ void test_vlseg6e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32m1_tum( @@ -280,7 +280,7 @@ void test_vlseg6e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32mf2_tumu( @@ -303,7 +303,7 @@ void test_vlseg6e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32m1_tumu( @@ -326,7 +326,7 @@ void test_vlseg6e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32mf2_tumu( @@ -349,7 +349,7 @@ void test_vlseg6e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32m1_tumu( @@ -372,7 +372,7 @@ void test_vlseg6e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32mf2_tumu( @@ -395,7 +395,7 @@ void test_vlseg6e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32m1_tumu( @@ -418,7 +418,7 @@ void test_vlseg6e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32mf2_mu( @@ -441,7 +441,7 @@ void test_vlseg6e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_f32m1_mu( @@ -464,7 +464,7 @@ void test_vlseg6e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32mf2_mu( @@ -487,7 +487,7 @@ void test_vlseg6e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_i32m1_mu( @@ -510,7 +510,7 @@ void test_vlseg6e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32mf2_mu( @@ -533,7 +533,7 @@ void test_vlseg6e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e32ff_v_u32m1_mu( @@ -556,6 +556,6 @@ void test_vlseg6e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg6e32ff_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e32ff_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64.c index 70e814f7bc33f5732a91b6ea4547e44a319f560d..8a143d620ee53bc1767619ff875969b85e7b530a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, size_t vl) { - return vlseg6e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_i64m1_tu( @@ -46,7 +46,7 @@ void test_vlseg6e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, size_t vl) { - return vlseg6e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_u64m1_tu( @@ -67,7 +67,7 @@ void test_vlseg6e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, size_t vl) { - return vlseg6e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_f64m1_tum( @@ -88,7 +88,7 @@ void test_vlseg6e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, size_t vl) { - return vlseg6e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_i64m1_tum( @@ -109,7 +109,7 @@ void test_vlseg6e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, size_t vl) { - return vlseg6e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_u64m1_tum( @@ -130,7 +130,7 @@ void test_vlseg6e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, size_t vl) { - return vlseg6e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_f64m1_tumu( @@ -151,7 +151,7 @@ void test_vlseg6e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, size_t vl) { - return vlseg6e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_i64m1_tumu( @@ -172,7 +172,7 @@ void test_vlseg6e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, size_t vl) { - return vlseg6e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_u64m1_tumu( @@ -193,7 +193,7 @@ void test_vlseg6e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, size_t vl) { - return vlseg6e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_f64m1_mu( @@ -214,7 +214,7 @@ void test_vlseg6e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, size_t vl) { - return vlseg6e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_i64m1_mu( @@ -235,7 +235,7 @@ void test_vlseg6e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, size_t vl) { - return vlseg6e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64_v_u64m1_mu( @@ -256,6 +256,6 @@ void test_vlseg6e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, size_t vl) { - return vlseg6e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64ff.c index 996432bc26501f95189cc00535d8b875c2ca6657..01082ca81b203897fd256741edbad24d0467a83c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e64ff.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_i64m1_tu( @@ -50,7 +50,7 @@ void test_vlseg6e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_u64m1_tu( @@ -73,7 +73,7 @@ void test_vlseg6e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_f64m1_tum( @@ -96,7 +96,7 @@ void test_vlseg6e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_i64m1_tum( @@ -119,7 +119,7 @@ void test_vlseg6e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_u64m1_tum( @@ -142,7 +142,7 @@ void test_vlseg6e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_f64m1_tumu( @@ -165,7 +165,7 @@ void test_vlseg6e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_i64m1_tumu( @@ -188,7 +188,7 @@ void test_vlseg6e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_u64m1_tumu( @@ -211,7 +211,7 @@ void test_vlseg6e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_f64m1_mu( @@ -234,7 +234,7 @@ void test_vlseg6e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_i64m1_mu( @@ -257,7 +257,7 @@ void test_vlseg6e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e64ff_v_u64m1_mu( @@ -280,6 +280,6 @@ void test_vlseg6e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg6e64ff_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e64ff_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8.c index 498e6b2459a390ada392a4cdd7bf9bc52e2e854d..779925ea7eda7b893aaa415a9b4a493d9a24d7d2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8.c @@ -24,7 +24,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf4_tu( @@ -45,7 +45,7 @@ void test_vlseg6e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf2_tu( @@ -66,7 +66,7 @@ void test_vlseg6e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8m1_tu( @@ -87,7 +87,7 @@ void test_vlseg6e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf8_tu( @@ -108,7 +108,7 @@ void test_vlseg6e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf4_tu( @@ -129,7 +129,7 @@ void test_vlseg6e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf2_tu( @@ -150,7 +150,7 @@ void test_vlseg6e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8m1_tu( @@ -171,7 +171,7 @@ void test_vlseg6e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf8_tum( @@ -192,7 +192,7 @@ void test_vlseg6e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf4_tum( @@ -213,7 +213,7 @@ void test_vlseg6e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf2_tum( @@ -234,7 +234,7 @@ void test_vlseg6e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8m1_tum( @@ -255,7 +255,7 @@ void test_vlseg6e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf8_tum( @@ -276,7 +276,7 @@ void test_vlseg6e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf4_tum( @@ -297,7 +297,7 @@ void test_vlseg6e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf2_tum( @@ -318,7 +318,7 @@ void test_vlseg6e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8m1_tum( @@ -339,7 +339,7 @@ void test_vlseg6e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf8_tumu( @@ -360,7 +360,7 @@ void test_vlseg6e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf4_tumu( @@ -381,7 +381,7 @@ void test_vlseg6e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf2_tumu( @@ -402,7 +402,7 @@ void test_vlseg6e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8m1_tumu( @@ -423,7 +423,7 @@ void test_vlseg6e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf8_tumu( @@ -444,7 +444,7 @@ void test_vlseg6e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf4_tumu( @@ -465,7 +465,7 @@ void test_vlseg6e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf2_tumu( @@ -486,7 +486,7 @@ void test_vlseg6e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8m1_tumu( @@ -507,7 +507,7 @@ void test_vlseg6e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf8_mu( @@ -528,7 +528,7 @@ void test_vlseg6e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf4_mu( @@ -549,7 +549,7 @@ void test_vlseg6e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8mf2_mu( @@ -570,7 +570,7 @@ void test_vlseg6e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_i8m1_mu( @@ -591,7 +591,7 @@ void test_vlseg6e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, size_t vl) { - return vlseg6e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf8_mu( @@ -612,7 +612,7 @@ void test_vlseg6e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf4_mu( @@ -633,7 +633,7 @@ void test_vlseg6e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8mf2_mu( @@ -654,7 +654,7 @@ void test_vlseg6e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8_v_u8m1_mu( @@ -675,6 +675,6 @@ void test_vlseg6e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, size_t vl) { - return vlseg6e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); + return __riscv_vlseg6e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8ff.c index b5e20ad1f1b0814c4a688e4bc15e1d6846952fff..025da3f1f7aa2beef87d47fcb74e5428f3388e04 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg6e8ff.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf4_tu( @@ -50,7 +50,7 @@ void test_vlseg6e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf2_tu( @@ -73,7 +73,7 @@ void test_vlseg6e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8m1_tu( @@ -96,7 +96,7 @@ void test_vlseg6e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf8_tu( @@ -119,7 +119,7 @@ void test_vlseg6e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf4_tu( @@ -142,7 +142,7 @@ void test_vlseg6e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf2_tu( @@ -165,7 +165,7 @@ void test_vlseg6e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8m1_tu( @@ -188,7 +188,7 @@ void test_vlseg6e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf8_tum( @@ -211,7 +211,7 @@ void test_vlseg6e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf4_tum( @@ -234,7 +234,7 @@ void test_vlseg6e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf2_tum( @@ -257,7 +257,7 @@ void test_vlseg6e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8m1_tum( @@ -280,7 +280,7 @@ void test_vlseg6e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf8_tum( @@ -303,7 +303,7 @@ void test_vlseg6e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf4_tum( @@ -326,7 +326,7 @@ void test_vlseg6e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf2_tum( @@ -349,7 +349,7 @@ void test_vlseg6e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8m1_tum( @@ -372,7 +372,7 @@ void test_vlseg6e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf8_tumu( @@ -395,7 +395,7 @@ void test_vlseg6e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf4_tumu( @@ -418,7 +418,7 @@ void test_vlseg6e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf2_tumu( @@ -441,7 +441,7 @@ void test_vlseg6e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8m1_tumu( @@ -464,7 +464,7 @@ void test_vlseg6e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf8_tumu( @@ -487,7 +487,7 @@ void test_vlseg6e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf4_tumu( @@ -510,7 +510,7 @@ void test_vlseg6e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf2_tumu( @@ -533,7 +533,7 @@ void test_vlseg6e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8m1_tumu( @@ -556,7 +556,7 @@ void test_vlseg6e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf8_mu( @@ -579,7 +579,7 @@ void test_vlseg6e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf4_mu( @@ -602,7 +602,7 @@ void test_vlseg6e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8mf2_mu( @@ -625,7 +625,7 @@ void test_vlseg6e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_i8m1_mu( @@ -648,7 +648,7 @@ void test_vlseg6e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf8_mu( @@ -671,7 +671,7 @@ void test_vlseg6e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf4_mu( @@ -694,7 +694,7 @@ void test_vlseg6e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8mf2_mu( @@ -717,7 +717,7 @@ void test_vlseg6e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg6e8ff_v_u8m1_mu( @@ -740,6 +740,6 @@ void test_vlseg6e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg6e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg6e8ff_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); + return __riscv_vlseg6e8ff_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16.c index 46cfd9970fd897c7b432eb29a51e9e7ba7fa1b9d..b84e63774c8b42200e859cee7e3b88d05e6e2aaa 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vlseg7e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vlseg7e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf4_tu( @@ -96,7 +96,7 @@ void test_vlseg7e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf2_tu( @@ -119,7 +119,7 @@ void test_vlseg7e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16m1_tu( @@ -142,7 +142,7 @@ void test_vlseg7e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf4_tu( @@ -165,7 +165,7 @@ void test_vlseg7e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf2_tu( @@ -188,7 +188,7 @@ void test_vlseg7e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16m1_tu( @@ -211,7 +211,7 @@ void test_vlseg7e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf4_tum( @@ -234,7 +234,7 @@ void test_vlseg7e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf2_tum( @@ -257,7 +257,7 @@ void test_vlseg7e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16m1_tum( @@ -280,7 +280,7 @@ void test_vlseg7e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf4_tum( @@ -303,7 +303,7 @@ void test_vlseg7e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf2_tum( @@ -326,7 +326,7 @@ void test_vlseg7e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16m1_tum( @@ -349,7 +349,7 @@ void test_vlseg7e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf4_tum( @@ -372,7 +372,7 @@ void test_vlseg7e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf2_tum( @@ -395,7 +395,7 @@ void test_vlseg7e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16m1_tum( @@ -418,7 +418,7 @@ void test_vlseg7e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf4_tumu( @@ -441,7 +441,7 @@ void test_vlseg7e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf2_tumu( @@ -464,7 +464,7 @@ void test_vlseg7e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16m1_tumu( @@ -487,7 +487,7 @@ void test_vlseg7e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf4_tumu( @@ -510,7 +510,7 @@ void test_vlseg7e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf2_tumu( @@ -533,7 +533,7 @@ void test_vlseg7e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16m1_tumu( @@ -556,7 +556,7 @@ void test_vlseg7e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf4_tumu( @@ -579,7 +579,7 @@ void test_vlseg7e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf2_tumu( @@ -602,7 +602,7 @@ void test_vlseg7e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16m1_tumu( @@ -625,7 +625,7 @@ void test_vlseg7e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf4_mu( @@ -648,7 +648,7 @@ void test_vlseg7e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16mf2_mu( @@ -671,7 +671,7 @@ void test_vlseg7e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_f16m1_mu( @@ -694,7 +694,7 @@ void test_vlseg7e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, size_t vl) { - return vlseg7e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf4_mu( @@ -717,7 +717,7 @@ void test_vlseg7e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16mf2_mu( @@ -740,7 +740,7 @@ void test_vlseg7e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_i16m1_mu( @@ -763,7 +763,7 @@ void test_vlseg7e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, size_t vl) { - return vlseg7e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf4_mu( @@ -786,7 +786,7 @@ void test_vlseg7e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16mf2_mu( @@ -809,7 +809,7 @@ void test_vlseg7e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16_v_u16m1_mu( @@ -832,6 +832,6 @@ void test_vlseg7e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, size_t vl) { - return vlseg7e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c index 6985447d1a127d5a43c20a08004a6d95a7ee94f8..3a7900ce2f4bb813c858ec8f78cc9f99ce6ee67e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e16ff.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vlseg7e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vlseg7e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf4_tu( @@ -104,7 +104,7 @@ void test_vlseg7e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf2_tu( @@ -129,7 +129,7 @@ void test_vlseg7e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16m1_tu( @@ -154,7 +154,7 @@ void test_vlseg7e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf4_tu( @@ -179,7 +179,7 @@ void test_vlseg7e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf2_tu( @@ -204,7 +204,7 @@ void test_vlseg7e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16m1_tu( @@ -229,7 +229,7 @@ void test_vlseg7e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf4_tum( @@ -254,7 +254,7 @@ void test_vlseg7e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf2_tum( @@ -279,7 +279,7 @@ void test_vlseg7e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16m1_tum( @@ -304,7 +304,7 @@ void test_vlseg7e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf4_tum( @@ -329,7 +329,7 @@ void test_vlseg7e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf2_tum( @@ -354,7 +354,7 @@ void test_vlseg7e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16m1_tum( @@ -379,7 +379,7 @@ void test_vlseg7e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf4_tum( @@ -404,7 +404,7 @@ void test_vlseg7e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf2_tum( @@ -429,7 +429,7 @@ void test_vlseg7e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16m1_tum( @@ -454,7 +454,7 @@ void test_vlseg7e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf4_tumu( @@ -479,7 +479,7 @@ void test_vlseg7e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf2_tumu( @@ -504,7 +504,7 @@ void test_vlseg7e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16m1_tumu( @@ -529,7 +529,7 @@ void test_vlseg7e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf4_tumu( @@ -554,7 +554,7 @@ void test_vlseg7e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf2_tumu( @@ -579,7 +579,7 @@ void test_vlseg7e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16m1_tumu( @@ -604,7 +604,7 @@ void test_vlseg7e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf4_tumu( @@ -629,7 +629,7 @@ void test_vlseg7e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf2_tumu( @@ -654,7 +654,7 @@ void test_vlseg7e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16m1_tumu( @@ -679,7 +679,7 @@ void test_vlseg7e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf4_mu( @@ -704,7 +704,7 @@ void test_vlseg7e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16mf2_mu( @@ -729,7 +729,7 @@ void test_vlseg7e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_f16m1_mu( @@ -754,7 +754,7 @@ void test_vlseg7e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf4_mu( @@ -779,7 +779,7 @@ void test_vlseg7e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16mf2_mu( @@ -804,7 +804,7 @@ void test_vlseg7e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_i16m1_mu( @@ -829,7 +829,7 @@ void test_vlseg7e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf4_mu( @@ -854,7 +854,7 @@ void test_vlseg7e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16mf2_mu( @@ -879,7 +879,7 @@ void test_vlseg7e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e16ff_v_u16m1_mu( @@ -904,6 +904,6 @@ void test_vlseg7e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg7e16ff_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e16ff_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32.c index 16204899398a37e6122d10a54927dfd618e73cc4..2f0220bfd7c2e855d129f203d65ee5c2f3b0be68 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, size_t vl) { - return vlseg7e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32m1_tu( @@ -50,7 +50,7 @@ void test_vlseg7e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, size_t vl) { - return vlseg7e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32mf2_tu( @@ -73,7 +73,7 @@ void test_vlseg7e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32m1_tu( @@ -96,7 +96,7 @@ void test_vlseg7e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32mf2_tu( @@ -119,7 +119,7 @@ void test_vlseg7e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32m1_tu( @@ -142,7 +142,7 @@ void test_vlseg7e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32mf2_tum( @@ -165,7 +165,7 @@ void test_vlseg7e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, size_t vl) { - return vlseg7e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32m1_tum( @@ -188,7 +188,7 @@ void test_vlseg7e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, size_t vl) { - return vlseg7e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32mf2_tum( @@ -211,7 +211,7 @@ void test_vlseg7e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32m1_tum( @@ -234,7 +234,7 @@ void test_vlseg7e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32mf2_tum( @@ -257,7 +257,7 @@ void test_vlseg7e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32m1_tum( @@ -280,7 +280,7 @@ void test_vlseg7e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32mf2_tumu( @@ -303,7 +303,7 @@ void test_vlseg7e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, size_t vl) { - return vlseg7e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32m1_tumu( @@ -326,7 +326,7 @@ void test_vlseg7e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, size_t vl) { - return vlseg7e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32mf2_tumu( @@ -349,7 +349,7 @@ void test_vlseg7e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32m1_tumu( @@ -372,7 +372,7 @@ void test_vlseg7e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32mf2_tumu( @@ -395,7 +395,7 @@ void test_vlseg7e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32m1_tumu( @@ -418,7 +418,7 @@ void test_vlseg7e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32mf2_mu( @@ -441,7 +441,7 @@ void test_vlseg7e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, size_t vl) { - return vlseg7e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_f32m1_mu( @@ -464,7 +464,7 @@ void test_vlseg7e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, size_t vl) { - return vlseg7e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32mf2_mu( @@ -487,7 +487,7 @@ void test_vlseg7e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_i32m1_mu( @@ -510,7 +510,7 @@ void test_vlseg7e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, size_t vl) { - return vlseg7e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32mf2_mu( @@ -533,7 +533,7 @@ void test_vlseg7e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32_v_u32m1_mu( @@ -556,6 +556,6 @@ void test_vlseg7e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, size_t vl) { - return vlseg7e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32ff.c index 2c93c5769322be879bd8da78f96f1cf197647cc9..e1992870743b6942f73ab81216ad88ae818a9879 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e32ff.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32m1_tu( @@ -54,7 +54,7 @@ void test_vlseg7e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32mf2_tu( @@ -79,7 +79,7 @@ void test_vlseg7e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32m1_tu( @@ -104,7 +104,7 @@ void test_vlseg7e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32mf2_tu( @@ -129,7 +129,7 @@ void test_vlseg7e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32m1_tu( @@ -154,7 +154,7 @@ void test_vlseg7e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32mf2_tum( @@ -179,7 +179,7 @@ void test_vlseg7e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32m1_tum( @@ -204,7 +204,7 @@ void test_vlseg7e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32mf2_tum( @@ -229,7 +229,7 @@ void test_vlseg7e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32m1_tum( @@ -254,7 +254,7 @@ void test_vlseg7e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32mf2_tum( @@ -279,7 +279,7 @@ void test_vlseg7e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32m1_tum( @@ -304,7 +304,7 @@ void test_vlseg7e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32mf2_tumu( @@ -329,7 +329,7 @@ void test_vlseg7e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32m1_tumu( @@ -354,7 +354,7 @@ void test_vlseg7e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32mf2_tumu( @@ -379,7 +379,7 @@ void test_vlseg7e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32m1_tumu( @@ -404,7 +404,7 @@ void test_vlseg7e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32mf2_tumu( @@ -429,7 +429,7 @@ void test_vlseg7e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32m1_tumu( @@ -454,7 +454,7 @@ void test_vlseg7e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32mf2_mu( @@ -479,7 +479,7 @@ void test_vlseg7e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_f32m1_mu( @@ -504,7 +504,7 @@ void test_vlseg7e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32mf2_mu( @@ -529,7 +529,7 @@ void test_vlseg7e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_i32m1_mu( @@ -554,7 +554,7 @@ void test_vlseg7e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32mf2_mu( @@ -579,7 +579,7 @@ void test_vlseg7e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e32ff_v_u32m1_mu( @@ -604,6 +604,6 @@ void test_vlseg7e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg7e32ff_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e32ff_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64.c index d62af5b266e21166386b5fe92482234eb5523ccd..7455dc25cdb929ad179876247252f494d2d2a168 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, size_t vl) { - return vlseg7e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_i64m1_tu( @@ -50,7 +50,7 @@ void test_vlseg7e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, size_t vl) { - return vlseg7e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_u64m1_tu( @@ -73,7 +73,7 @@ void test_vlseg7e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, size_t vl) { - return vlseg7e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_f64m1_tum( @@ -96,7 +96,7 @@ void test_vlseg7e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, size_t vl) { - return vlseg7e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_i64m1_tum( @@ -119,7 +119,7 @@ void test_vlseg7e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, size_t vl) { - return vlseg7e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_u64m1_tum( @@ -142,7 +142,7 @@ void test_vlseg7e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, size_t vl) { - return vlseg7e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_f64m1_tumu( @@ -165,7 +165,7 @@ void test_vlseg7e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, size_t vl) { - return vlseg7e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_i64m1_tumu( @@ -188,7 +188,7 @@ void test_vlseg7e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, size_t vl) { - return vlseg7e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_u64m1_tumu( @@ -211,7 +211,7 @@ void test_vlseg7e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, size_t vl) { - return vlseg7e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_f64m1_mu( @@ -234,7 +234,7 @@ void test_vlseg7e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, size_t vl) { - return vlseg7e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_i64m1_mu( @@ -257,7 +257,7 @@ void test_vlseg7e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, size_t vl) { - return vlseg7e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64_v_u64m1_mu( @@ -280,6 +280,6 @@ void test_vlseg7e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, size_t vl) { - return vlseg7e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64ff.c index ffa3a20501d2e936782252261fedac6e0a27037e..20ed4797082e36f52ba84a5d055a0332811f6815 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e64ff.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_i64m1_tu( @@ -54,7 +54,7 @@ void test_vlseg7e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_u64m1_tu( @@ -79,7 +79,7 @@ void test_vlseg7e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_f64m1_tum( @@ -104,7 +104,7 @@ void test_vlseg7e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_i64m1_tum( @@ -129,7 +129,7 @@ void test_vlseg7e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_u64m1_tum( @@ -154,7 +154,7 @@ void test_vlseg7e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_f64m1_tumu( @@ -179,7 +179,7 @@ void test_vlseg7e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_i64m1_tumu( @@ -204,7 +204,7 @@ void test_vlseg7e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_u64m1_tumu( @@ -229,7 +229,7 @@ void test_vlseg7e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_f64m1_mu( @@ -254,7 +254,7 @@ void test_vlseg7e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_i64m1_mu( @@ -279,7 +279,7 @@ void test_vlseg7e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e64ff_v_u64m1_mu( @@ -304,6 +304,6 @@ void test_vlseg7e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg7e64ff_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e64ff_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8.c index df0a095cecde0d007766b31809c6655e7770945d..bacb1f85b02f0e04a86a43aeaa67c9cdf6939d7f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8.c @@ -26,7 +26,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf4_tu( @@ -49,7 +49,7 @@ void test_vlseg7e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf2_tu( @@ -72,7 +72,7 @@ void test_vlseg7e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8m1_tu( @@ -95,7 +95,7 @@ void test_vlseg7e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf8_tu( @@ -118,7 +118,7 @@ void test_vlseg7e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf4_tu( @@ -141,7 +141,7 @@ void test_vlseg7e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf2_tu( @@ -164,7 +164,7 @@ void test_vlseg7e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8m1_tu( @@ -187,7 +187,7 @@ void test_vlseg7e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf8_tum( @@ -210,7 +210,7 @@ void test_vlseg7e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf4_tum( @@ -233,7 +233,7 @@ void test_vlseg7e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf2_tum( @@ -256,7 +256,7 @@ void test_vlseg7e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8m1_tum( @@ -279,7 +279,7 @@ void test_vlseg7e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf8_tum( @@ -302,7 +302,7 @@ void test_vlseg7e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf4_tum( @@ -325,7 +325,7 @@ void test_vlseg7e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf2_tum( @@ -348,7 +348,7 @@ void test_vlseg7e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8m1_tum( @@ -371,7 +371,7 @@ void test_vlseg7e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf8_tumu( @@ -394,7 +394,7 @@ void test_vlseg7e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf4_tumu( @@ -417,7 +417,7 @@ void test_vlseg7e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf2_tumu( @@ -440,7 +440,7 @@ void test_vlseg7e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8m1_tumu( @@ -463,7 +463,7 @@ void test_vlseg7e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf8_tumu( @@ -486,7 +486,7 @@ void test_vlseg7e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf4_tumu( @@ -509,7 +509,7 @@ void test_vlseg7e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf2_tumu( @@ -532,7 +532,7 @@ void test_vlseg7e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8m1_tumu( @@ -555,7 +555,7 @@ void test_vlseg7e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf8_mu( @@ -578,7 +578,7 @@ void test_vlseg7e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf4_mu( @@ -601,7 +601,7 @@ void test_vlseg7e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8mf2_mu( @@ -624,7 +624,7 @@ void test_vlseg7e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_i8m1_mu( @@ -647,7 +647,7 @@ void test_vlseg7e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, size_t vl) { - return vlseg7e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf8_mu( @@ -670,7 +670,7 @@ void test_vlseg7e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf4_mu( @@ -693,7 +693,7 @@ void test_vlseg7e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8mf2_mu( @@ -716,7 +716,7 @@ void test_vlseg7e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8_v_u8m1_mu( @@ -739,6 +739,6 @@ void test_vlseg7e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, size_t vl) { - return vlseg7e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); + return __riscv_vlseg7e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8ff.c index 2841b0606afd5a3bf6ce090e6a90faa39bbfa7c8..872470af6130a536826540d8cc99e5f5026621c5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg7e8ff.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf4_tu( @@ -54,7 +54,7 @@ void test_vlseg7e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf2_tu( @@ -79,7 +79,7 @@ void test_vlseg7e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8m1_tu( @@ -104,7 +104,7 @@ void test_vlseg7e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf8_tu( @@ -129,7 +129,7 @@ void test_vlseg7e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf4_tu( @@ -154,7 +154,7 @@ void test_vlseg7e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf2_tu( @@ -179,7 +179,7 @@ void test_vlseg7e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8m1_tu( @@ -204,7 +204,7 @@ void test_vlseg7e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf8_tum( @@ -229,7 +229,7 @@ void test_vlseg7e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf4_tum( @@ -254,7 +254,7 @@ void test_vlseg7e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf2_tum( @@ -279,7 +279,7 @@ void test_vlseg7e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8m1_tum( @@ -304,7 +304,7 @@ void test_vlseg7e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf8_tum( @@ -329,7 +329,7 @@ void test_vlseg7e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf4_tum( @@ -354,7 +354,7 @@ void test_vlseg7e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf2_tum( @@ -379,7 +379,7 @@ void test_vlseg7e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8m1_tum( @@ -404,7 +404,7 @@ void test_vlseg7e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf8_tumu( @@ -429,7 +429,7 @@ void test_vlseg7e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf4_tumu( @@ -454,7 +454,7 @@ void test_vlseg7e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf2_tumu( @@ -479,7 +479,7 @@ void test_vlseg7e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8m1_tumu( @@ -504,7 +504,7 @@ void test_vlseg7e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf8_tumu( @@ -529,7 +529,7 @@ void test_vlseg7e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf4_tumu( @@ -554,7 +554,7 @@ void test_vlseg7e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf2_tumu( @@ -579,7 +579,7 @@ void test_vlseg7e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8m1_tumu( @@ -604,7 +604,7 @@ void test_vlseg7e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf8_mu( @@ -629,7 +629,7 @@ void test_vlseg7e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf4_mu( @@ -654,7 +654,7 @@ void test_vlseg7e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8mf2_mu( @@ -679,7 +679,7 @@ void test_vlseg7e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_i8m1_mu( @@ -704,7 +704,7 @@ void test_vlseg7e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf8_mu( @@ -729,7 +729,7 @@ void test_vlseg7e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf4_mu( @@ -754,7 +754,7 @@ void test_vlseg7e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8mf2_mu( @@ -779,7 +779,7 @@ void test_vlseg7e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg7e8ff_v_u8m1_mu( @@ -804,6 +804,6 @@ void test_vlseg7e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg7e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg7e8ff_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); + return __riscv_vlseg7e8ff_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16.c index 05f4ad9645e2587055dbf0c5546be26e5d667411..915e48c5b5f93bd1a1ed47152b421caf24215fe7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vlseg8e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vlseg8e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf4_tu( @@ -104,7 +104,7 @@ void test_vlseg8e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf2_tu( @@ -129,7 +129,7 @@ void test_vlseg8e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16m1_tu( @@ -154,7 +154,7 @@ void test_vlseg8e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf4_tu( @@ -179,7 +179,7 @@ void test_vlseg8e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf2_tu( @@ -204,7 +204,7 @@ void test_vlseg8e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16m1_tu( @@ -229,7 +229,7 @@ void test_vlseg8e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf4_tum( @@ -254,7 +254,7 @@ void test_vlseg8e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf2_tum( @@ -279,7 +279,7 @@ void test_vlseg8e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16m1_tum( @@ -304,7 +304,7 @@ void test_vlseg8e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf4_tum( @@ -329,7 +329,7 @@ void test_vlseg8e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf2_tum( @@ -354,7 +354,7 @@ void test_vlseg8e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16m1_tum( @@ -379,7 +379,7 @@ void test_vlseg8e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf4_tum( @@ -404,7 +404,7 @@ void test_vlseg8e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf2_tum( @@ -429,7 +429,7 @@ void test_vlseg8e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16m1_tum( @@ -454,7 +454,7 @@ void test_vlseg8e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf4_tumu( @@ -479,7 +479,7 @@ void test_vlseg8e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf2_tumu( @@ -504,7 +504,7 @@ void test_vlseg8e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16m1_tumu( @@ -529,7 +529,7 @@ void test_vlseg8e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf4_tumu( @@ -554,7 +554,7 @@ void test_vlseg8e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf2_tumu( @@ -579,7 +579,7 @@ void test_vlseg8e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16m1_tumu( @@ -604,7 +604,7 @@ void test_vlseg8e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf4_tumu( @@ -629,7 +629,7 @@ void test_vlseg8e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf2_tumu( @@ -654,7 +654,7 @@ void test_vlseg8e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16m1_tumu( @@ -679,7 +679,7 @@ void test_vlseg8e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf4_mu( @@ -704,7 +704,7 @@ void test_vlseg8e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16mf2_mu( @@ -729,7 +729,7 @@ void test_vlseg8e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_f16m1_mu( @@ -754,7 +754,7 @@ void test_vlseg8e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, size_t vl) { - return vlseg8e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf4_mu( @@ -779,7 +779,7 @@ void test_vlseg8e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16mf2_mu( @@ -804,7 +804,7 @@ void test_vlseg8e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_i16m1_mu( @@ -829,7 +829,7 @@ void test_vlseg8e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, size_t vl) { - return vlseg8e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf4_mu( @@ -854,7 +854,7 @@ void test_vlseg8e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16mf2_mu( @@ -879,7 +879,7 @@ void test_vlseg8e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16_v_u16m1_mu( @@ -904,6 +904,6 @@ void test_vlseg8e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, size_t vl) { - return vlseg8e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c index 7bcb292b058ec5ff81ac88a21bd3764902370178..ac7dc7f382c0d261fdcda073898f39fa580d7a5e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e16ff.c @@ -31,7 +31,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf2_tu( @@ -58,7 +58,7 @@ void test_vlseg8e16ff_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16m1_tu( @@ -85,7 +85,7 @@ void test_vlseg8e16ff_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf4_tu( @@ -112,7 +112,7 @@ void test_vlseg8e16ff_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf2_tu( @@ -139,7 +139,7 @@ void test_vlseg8e16ff_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16m1_tu( @@ -166,7 +166,7 @@ void test_vlseg8e16ff_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf4_tu( @@ -193,7 +193,7 @@ void test_vlseg8e16ff_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf2_tu( @@ -220,7 +220,7 @@ void test_vlseg8e16ff_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16m1_tu( @@ -247,7 +247,7 @@ void test_vlseg8e16ff_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf4_tum( @@ -274,7 +274,7 @@ void test_vlseg8e16ff_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf2_tum( @@ -301,7 +301,7 @@ void test_vlseg8e16ff_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16m1_tum( @@ -328,7 +328,7 @@ void test_vlseg8e16ff_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf4_tum( @@ -355,7 +355,7 @@ void test_vlseg8e16ff_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf2_tum( @@ -382,7 +382,7 @@ void test_vlseg8e16ff_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16m1_tum( @@ -409,7 +409,7 @@ void test_vlseg8e16ff_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf4_tum( @@ -436,7 +436,7 @@ void test_vlseg8e16ff_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf2_tum( @@ -463,7 +463,7 @@ void test_vlseg8e16ff_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16m1_tum( @@ -490,7 +490,7 @@ void test_vlseg8e16ff_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf4_tumu( @@ -517,7 +517,7 @@ void test_vlseg8e16ff_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf2_tumu( @@ -544,7 +544,7 @@ void test_vlseg8e16ff_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16m1_tumu( @@ -571,7 +571,7 @@ void test_vlseg8e16ff_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf4_tumu( @@ -598,7 +598,7 @@ void test_vlseg8e16ff_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf2_tumu( @@ -625,7 +625,7 @@ void test_vlseg8e16ff_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16m1_tumu( @@ -652,7 +652,7 @@ void test_vlseg8e16ff_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf4_tumu( @@ -679,7 +679,7 @@ void test_vlseg8e16ff_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf2_tumu( @@ -706,7 +706,7 @@ void test_vlseg8e16ff_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16m1_tumu( @@ -733,7 +733,7 @@ void test_vlseg8e16ff_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf4_mu( @@ -760,7 +760,7 @@ void test_vlseg8e16ff_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16mf2_mu( @@ -787,7 +787,7 @@ void test_vlseg8e16ff_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_f16m1_mu( @@ -814,7 +814,7 @@ void test_vlseg8e16ff_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf4_mu( @@ -841,7 +841,7 @@ void test_vlseg8e16ff_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16mf2_mu( @@ -868,7 +868,7 @@ void test_vlseg8e16ff_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_i16m1_mu( @@ -895,7 +895,7 @@ void test_vlseg8e16ff_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf4_mu( @@ -922,7 +922,7 @@ void test_vlseg8e16ff_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16mf2_mu( @@ -949,7 +949,7 @@ void test_vlseg8e16ff_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e16ff_v_u16m1_mu( @@ -976,6 +976,6 @@ void test_vlseg8e16ff_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e16ff_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, size_t *new_vl, size_t vl) { - return vlseg8e16ff_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e16ff_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32.c index 86ade4caf189d64d51d1b31f29dbfd76efdfeac5..f375335ee8c779dcdcfb65280141592460cf6a16 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, size_t vl) { - return vlseg8e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32m1_tu( @@ -54,7 +54,7 @@ void test_vlseg8e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, size_t vl) { - return vlseg8e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32mf2_tu( @@ -79,7 +79,7 @@ void test_vlseg8e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32m1_tu( @@ -104,7 +104,7 @@ void test_vlseg8e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32mf2_tu( @@ -129,7 +129,7 @@ void test_vlseg8e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32m1_tu( @@ -154,7 +154,7 @@ void test_vlseg8e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32mf2_tum( @@ -179,7 +179,7 @@ void test_vlseg8e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, size_t vl) { - return vlseg8e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32m1_tum( @@ -204,7 +204,7 @@ void test_vlseg8e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, size_t vl) { - return vlseg8e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32mf2_tum( @@ -229,7 +229,7 @@ void test_vlseg8e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32m1_tum( @@ -254,7 +254,7 @@ void test_vlseg8e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32mf2_tum( @@ -279,7 +279,7 @@ void test_vlseg8e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32m1_tum( @@ -304,7 +304,7 @@ void test_vlseg8e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32mf2_tumu( @@ -329,7 +329,7 @@ void test_vlseg8e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, size_t vl) { - return vlseg8e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32m1_tumu( @@ -354,7 +354,7 @@ void test_vlseg8e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, size_t vl) { - return vlseg8e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32mf2_tumu( @@ -379,7 +379,7 @@ void test_vlseg8e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32m1_tumu( @@ -404,7 +404,7 @@ void test_vlseg8e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32mf2_tumu( @@ -429,7 +429,7 @@ void test_vlseg8e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32m1_tumu( @@ -454,7 +454,7 @@ void test_vlseg8e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32mf2_mu( @@ -479,7 +479,7 @@ void test_vlseg8e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, size_t vl) { - return vlseg8e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_f32m1_mu( @@ -504,7 +504,7 @@ void test_vlseg8e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, size_t vl) { - return vlseg8e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32mf2_mu( @@ -529,7 +529,7 @@ void test_vlseg8e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_i32m1_mu( @@ -554,7 +554,7 @@ void test_vlseg8e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, size_t vl) { - return vlseg8e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32mf2_mu( @@ -579,7 +579,7 @@ void test_vlseg8e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32_v_u32m1_mu( @@ -604,6 +604,6 @@ void test_vlseg8e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, size_t vl) { - return vlseg8e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32ff.c index 69389c10817f2c147e2045257e51c0e8b85e1eed..db1003af224d2636e8b44fbf82850b03d6ce41b7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e32ff.c @@ -31,7 +31,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32m1_tu( @@ -58,7 +58,7 @@ void test_vlseg8e32ff_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32mf2_tu( @@ -85,7 +85,7 @@ void test_vlseg8e32ff_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32m1_tu( @@ -112,7 +112,7 @@ void test_vlseg8e32ff_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32mf2_tu( @@ -139,7 +139,7 @@ void test_vlseg8e32ff_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32m1_tu( @@ -166,7 +166,7 @@ void test_vlseg8e32ff_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32mf2_tum( @@ -193,7 +193,7 @@ void test_vlseg8e32ff_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32m1_tum( @@ -220,7 +220,7 @@ void test_vlseg8e32ff_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32mf2_tum( @@ -247,7 +247,7 @@ void test_vlseg8e32ff_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32m1_tum( @@ -274,7 +274,7 @@ void test_vlseg8e32ff_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32mf2_tum( @@ -301,7 +301,7 @@ void test_vlseg8e32ff_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32m1_tum( @@ -328,7 +328,7 @@ void test_vlseg8e32ff_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32mf2_tumu( @@ -355,7 +355,7 @@ void test_vlseg8e32ff_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32m1_tumu( @@ -382,7 +382,7 @@ void test_vlseg8e32ff_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32mf2_tumu( @@ -409,7 +409,7 @@ void test_vlseg8e32ff_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32m1_tumu( @@ -436,7 +436,7 @@ void test_vlseg8e32ff_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32mf2_tumu( @@ -463,7 +463,7 @@ void test_vlseg8e32ff_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32m1_tumu( @@ -490,7 +490,7 @@ void test_vlseg8e32ff_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32mf2_mu( @@ -517,7 +517,7 @@ void test_vlseg8e32ff_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_f32m1_mu( @@ -544,7 +544,7 @@ void test_vlseg8e32ff_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32mf2_mu( @@ -571,7 +571,7 @@ void test_vlseg8e32ff_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_i32m1_mu( @@ -598,7 +598,7 @@ void test_vlseg8e32ff_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32mf2_mu( @@ -625,7 +625,7 @@ void test_vlseg8e32ff_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e32ff_v_u32m1_mu( @@ -652,6 +652,6 @@ void test_vlseg8e32ff_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e32ff_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, size_t *new_vl, size_t vl) { - return vlseg8e32ff_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e32ff_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64.c index 1c5eba5890186cfa57f3436c08345c77b2f42ff5..b6d7db2358fd7a686da0e81302c465fd46c50ff3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, size_t vl) { - return vlseg8e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_i64m1_tu( @@ -54,7 +54,7 @@ void test_vlseg8e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, size_t vl) { - return vlseg8e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_u64m1_tu( @@ -79,7 +79,7 @@ void test_vlseg8e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, size_t vl) { - return vlseg8e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_f64m1_tum( @@ -104,7 +104,7 @@ void test_vlseg8e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, size_t vl) { - return vlseg8e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_i64m1_tum( @@ -129,7 +129,7 @@ void test_vlseg8e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, size_t vl) { - return vlseg8e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_u64m1_tum( @@ -154,7 +154,7 @@ void test_vlseg8e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, size_t vl) { - return vlseg8e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_f64m1_tumu( @@ -179,7 +179,7 @@ void test_vlseg8e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, size_t vl) { - return vlseg8e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_i64m1_tumu( @@ -204,7 +204,7 @@ void test_vlseg8e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, size_t vl) { - return vlseg8e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_u64m1_tumu( @@ -229,7 +229,7 @@ void test_vlseg8e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, size_t vl) { - return vlseg8e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_f64m1_mu( @@ -254,7 +254,7 @@ void test_vlseg8e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, size_t vl) { - return vlseg8e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_i64m1_mu( @@ -279,7 +279,7 @@ void test_vlseg8e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, size_t vl) { - return vlseg8e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64_v_u64m1_mu( @@ -304,6 +304,6 @@ void test_vlseg8e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, size_t vl) { - return vlseg8e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64ff.c index 359eac8c14235d2faefc25043b4fc7ce1e0bc00c..0282f8a0b9047109434c8bfa9afaf03b43fbb21b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e64ff.c @@ -31,7 +31,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_i64m1_tu( @@ -58,7 +58,7 @@ void test_vlseg8e64ff_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_u64m1_tu( @@ -85,7 +85,7 @@ void test_vlseg8e64ff_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_f64m1_tum( @@ -112,7 +112,7 @@ void test_vlseg8e64ff_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_i64m1_tum( @@ -139,7 +139,7 @@ void test_vlseg8e64ff_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_u64m1_tum( @@ -166,7 +166,7 @@ void test_vlseg8e64ff_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_f64m1_tumu( @@ -193,7 +193,7 @@ void test_vlseg8e64ff_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_i64m1_tumu( @@ -220,7 +220,7 @@ void test_vlseg8e64ff_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_u64m1_tumu( @@ -247,7 +247,7 @@ void test_vlseg8e64ff_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_f64m1_mu( @@ -274,7 +274,7 @@ void test_vlseg8e64ff_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_i64m1_mu( @@ -301,7 +301,7 @@ void test_vlseg8e64ff_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e64ff_v_u64m1_mu( @@ -328,6 +328,6 @@ void test_vlseg8e64ff_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e64ff_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, size_t *new_vl, size_t vl) { - return vlseg8e64ff_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e64ff_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8.c index 43304cbf0c66c321dcb188f19c0afeb78527223c..f251fc600b989d345b4c4fcaef755b08a09d5a6c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8.c @@ -28,7 +28,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf4_tu( @@ -53,7 +53,7 @@ void test_vlseg8e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf2_tu( @@ -78,7 +78,7 @@ void test_vlseg8e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8m1_tu( @@ -103,7 +103,7 @@ void test_vlseg8e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf8_tu( @@ -128,7 +128,7 @@ void test_vlseg8e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf4_tu( @@ -153,7 +153,7 @@ void test_vlseg8e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf2_tu( @@ -178,7 +178,7 @@ void test_vlseg8e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8m1_tu( @@ -203,7 +203,7 @@ void test_vlseg8e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf8_tum( @@ -228,7 +228,7 @@ void test_vlseg8e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vui // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf4_tum( @@ -253,7 +253,7 @@ void test_vlseg8e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf2_tum( @@ -278,7 +278,7 @@ void test_vlseg8e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8m1_tum( @@ -303,7 +303,7 @@ void test_vlseg8e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf8_tum( @@ -328,7 +328,7 @@ void test_vlseg8e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf4_tum( @@ -353,7 +353,7 @@ void test_vlseg8e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf2_tum( @@ -378,7 +378,7 @@ void test_vlseg8e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8m1_tum( @@ -403,7 +403,7 @@ void test_vlseg8e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf8_tumu( @@ -428,7 +428,7 @@ void test_vlseg8e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf4_tumu( @@ -453,7 +453,7 @@ void test_vlseg8e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf2_tumu( @@ -478,7 +478,7 @@ void test_vlseg8e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8m1_tumu( @@ -503,7 +503,7 @@ void test_vlseg8e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf8_tumu( @@ -528,7 +528,7 @@ void test_vlseg8e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf4_tumu( @@ -553,7 +553,7 @@ void test_vlseg8e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf2_tumu( @@ -578,7 +578,7 @@ void test_vlseg8e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8m1_tumu( @@ -603,7 +603,7 @@ void test_vlseg8e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf8_mu( @@ -628,7 +628,7 @@ void test_vlseg8e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf4_mu( @@ -653,7 +653,7 @@ void test_vlseg8e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8mf2_mu( @@ -678,7 +678,7 @@ void test_vlseg8e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_i8m1_mu( @@ -703,7 +703,7 @@ void test_vlseg8e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, size_t vl) { - return vlseg8e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf8_mu( @@ -728,7 +728,7 @@ void test_vlseg8e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf4_mu( @@ -753,7 +753,7 @@ void test_vlseg8e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8mf2_mu( @@ -778,7 +778,7 @@ void test_vlseg8e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8_v_u8m1_mu( @@ -803,6 +803,6 @@ void test_vlseg8e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, size_t vl) { - return vlseg8e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); + return __riscv_vlseg8e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8ff.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8ff.c index 4d5556f6e22f421c6289591782ab7025cac7b97e..15cadec9278bf9cf44111c04354d5cfdd6ae3915 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8ff.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg8e8ff.c @@ -31,7 +31,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf4_tu( @@ -58,7 +58,7 @@ void test_vlseg8e8ff_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf2_tu( @@ -85,7 +85,7 @@ void test_vlseg8e8ff_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8m1_tu( @@ -112,7 +112,7 @@ void test_vlseg8e8ff_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf8_tu( @@ -139,7 +139,7 @@ void test_vlseg8e8ff_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf4_tu( @@ -166,7 +166,7 @@ void test_vlseg8e8ff_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf2_tu( @@ -193,7 +193,7 @@ void test_vlseg8e8ff_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8m1_tu( @@ -220,7 +220,7 @@ void test_vlseg8e8ff_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf8_tum( @@ -247,7 +247,7 @@ void test_vlseg8e8ff_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf4_tum( @@ -274,7 +274,7 @@ void test_vlseg8e8ff_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf2_tum( @@ -301,7 +301,7 @@ void test_vlseg8e8ff_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8m1_tum( @@ -328,7 +328,7 @@ void test_vlseg8e8ff_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf8_tum( @@ -355,7 +355,7 @@ void test_vlseg8e8ff_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf4_tum( @@ -382,7 +382,7 @@ void test_vlseg8e8ff_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf2_tum( @@ -409,7 +409,7 @@ void test_vlseg8e8ff_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8m1_tum( @@ -436,7 +436,7 @@ void test_vlseg8e8ff_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf8_tumu( @@ -463,7 +463,7 @@ void test_vlseg8e8ff_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf4_tumu( @@ -490,7 +490,7 @@ void test_vlseg8e8ff_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf2_tumu( @@ -517,7 +517,7 @@ void test_vlseg8e8ff_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8m1_tumu( @@ -544,7 +544,7 @@ void test_vlseg8e8ff_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf8_tumu( @@ -571,7 +571,7 @@ void test_vlseg8e8ff_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf4_tumu( @@ -598,7 +598,7 @@ void test_vlseg8e8ff_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf2_tumu( @@ -625,7 +625,7 @@ void test_vlseg8e8ff_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8m1_tumu( @@ -652,7 +652,7 @@ void test_vlseg8e8ff_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf8_mu( @@ -679,7 +679,7 @@ void test_vlseg8e8ff_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf4_mu( @@ -706,7 +706,7 @@ void test_vlseg8e8ff_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8mf2_mu( @@ -733,7 +733,7 @@ void test_vlseg8e8ff_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_i8m1_mu( @@ -760,7 +760,7 @@ void test_vlseg8e8ff_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf8_mu( @@ -787,7 +787,7 @@ void test_vlseg8e8ff_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf4_mu( @@ -814,7 +814,7 @@ void test_vlseg8e8ff_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8mf2_mu( @@ -841,7 +841,7 @@ void test_vlseg8e8ff_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } // CHECK-RV64-LABEL: @test_vlseg8e8ff_v_u8m1_mu( @@ -868,6 +868,6 @@ void test_vlseg8e8ff_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlseg8e8ff_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, size_t *new_vl, size_t vl) { - return vlseg8e8ff_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); + return __riscv_vlseg8e8ff_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, new_vl, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e16.c index 74eaba72824414c09fc5609ea5324ffeda6a66c1..5610ab7c41b3a78d24e84dff1be095f87ccbb5c8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e16.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vlsseg2e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vlsseg2e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vlsseg2e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m4_tu( @@ -69,7 +69,7 @@ void test_vlsseg2e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf4_tu( @@ -82,7 +82,7 @@ void test_vlsseg2e16_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf2_tu( @@ -95,7 +95,7 @@ void test_vlsseg2e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m1_tu( @@ -108,7 +108,7 @@ void test_vlsseg2e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m2_tu( @@ -121,7 +121,7 @@ void test_vlsseg2e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m4_tu( @@ -134,7 +134,7 @@ void test_vlsseg2e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf4_tu( @@ -147,7 +147,7 @@ void test_vlsseg2e16_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf2_tu( @@ -160,7 +160,7 @@ void test_vlsseg2e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m1_tu( @@ -173,7 +173,7 @@ void test_vlsseg2e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m2_tu( @@ -186,7 +186,7 @@ void test_vlsseg2e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m4_tu( @@ -199,7 +199,7 @@ void test_vlsseg2e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf4_tum( @@ -212,7 +212,7 @@ void test_vlsseg2e16_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf2_tum( @@ -225,7 +225,7 @@ void test_vlsseg2e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m1_tum( @@ -238,7 +238,7 @@ void test_vlsseg2e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m2_tum( @@ -251,7 +251,7 @@ void test_vlsseg2e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m4_tum( @@ -264,7 +264,7 @@ void test_vlsseg2e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf4_tum( @@ -277,7 +277,7 @@ void test_vlsseg2e16_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf2_tum( @@ -290,7 +290,7 @@ void test_vlsseg2e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m1_tum( @@ -303,7 +303,7 @@ void test_vlsseg2e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m2_tum( @@ -316,7 +316,7 @@ void test_vlsseg2e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m4_tum( @@ -329,7 +329,7 @@ void test_vlsseg2e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf4_tum( @@ -342,7 +342,7 @@ void test_vlsseg2e16_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf2_tum( @@ -355,7 +355,7 @@ void test_vlsseg2e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m1_tum( @@ -368,7 +368,7 @@ void test_vlsseg2e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m2_tum( @@ -381,7 +381,7 @@ void test_vlsseg2e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m4_tum( @@ -394,7 +394,7 @@ void test_vlsseg2e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf4_tumu( @@ -407,7 +407,7 @@ void test_vlsseg2e16_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf2_tumu( @@ -420,7 +420,7 @@ void test_vlsseg2e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m1_tumu( @@ -433,7 +433,7 @@ void test_vlsseg2e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m2_tumu( @@ -446,7 +446,7 @@ void test_vlsseg2e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m4_tumu( @@ -459,7 +459,7 @@ void test_vlsseg2e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf4_tumu( @@ -472,7 +472,7 @@ void test_vlsseg2e16_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf2_tumu( @@ -485,7 +485,7 @@ void test_vlsseg2e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m1_tumu( @@ -498,7 +498,7 @@ void test_vlsseg2e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m2_tumu( @@ -511,7 +511,7 @@ void test_vlsseg2e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m4_tumu( @@ -524,7 +524,7 @@ void test_vlsseg2e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf4_tumu( @@ -537,7 +537,7 @@ void test_vlsseg2e16_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf2_tumu( @@ -550,7 +550,7 @@ void test_vlsseg2e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m1_tumu( @@ -563,7 +563,7 @@ void test_vlsseg2e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m2_tumu( @@ -576,7 +576,7 @@ void test_vlsseg2e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m4_tumu( @@ -589,7 +589,7 @@ void test_vlsseg2e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf4_mu( @@ -602,7 +602,7 @@ void test_vlsseg2e16_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16mf2_mu( @@ -615,7 +615,7 @@ void test_vlsseg2e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m1_mu( @@ -628,7 +628,7 @@ void test_vlsseg2e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m2_mu( @@ -641,7 +641,7 @@ void test_vlsseg2e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_f16m4_mu( @@ -654,7 +654,7 @@ void test_vlsseg2e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf4_mu( @@ -667,7 +667,7 @@ void test_vlsseg2e16_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16mf2_mu( @@ -680,7 +680,7 @@ void test_vlsseg2e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m1_mu( @@ -693,7 +693,7 @@ void test_vlsseg2e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m2_mu( @@ -706,7 +706,7 @@ void test_vlsseg2e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_i16m4_mu( @@ -719,7 +719,7 @@ void test_vlsseg2e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf4_mu( @@ -732,7 +732,7 @@ void test_vlsseg2e16_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16mf2_mu( @@ -745,7 +745,7 @@ void test_vlsseg2e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m1_mu( @@ -758,7 +758,7 @@ void test_vlsseg2e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m2_mu( @@ -771,7 +771,7 @@ void test_vlsseg2e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e16_v_u16m4_mu( @@ -784,6 +784,6 @@ void test_vlsseg2e16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e16_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e16_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e16_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e32.c index 5972b2aa3c00b7c8c13801a4d503a54d6a594e2d..cb52756a7b1212218d2c8c29f6b18abfd35c6e81 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e32.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m1_tu( @@ -30,7 +30,7 @@ void test_vlsseg2e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m2_tu( @@ -43,7 +43,7 @@ void test_vlsseg2e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m4_tu( @@ -56,7 +56,7 @@ void test_vlsseg2e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32mf2_tu( @@ -69,7 +69,7 @@ void test_vlsseg2e32_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m1_tu( @@ -82,7 +82,7 @@ void test_vlsseg2e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m2_tu( @@ -95,7 +95,7 @@ void test_vlsseg2e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m4_tu( @@ -108,7 +108,7 @@ void test_vlsseg2e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32mf2_tu( @@ -121,7 +121,7 @@ void test_vlsseg2e32_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m1_tu( @@ -134,7 +134,7 @@ void test_vlsseg2e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m2_tu( @@ -147,7 +147,7 @@ void test_vlsseg2e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m4_tu( @@ -160,7 +160,7 @@ void test_vlsseg2e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32mf2_tum( @@ -173,7 +173,7 @@ void test_vlsseg2e32_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m1_tum( @@ -186,7 +186,7 @@ void test_vlsseg2e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m2_tum( @@ -199,7 +199,7 @@ void test_vlsseg2e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m4_tum( @@ -212,7 +212,7 @@ void test_vlsseg2e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32mf2_tum( @@ -225,7 +225,7 @@ void test_vlsseg2e32_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m1_tum( @@ -238,7 +238,7 @@ void test_vlsseg2e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m2_tum( @@ -251,7 +251,7 @@ void test_vlsseg2e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m4_tum( @@ -264,7 +264,7 @@ void test_vlsseg2e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32mf2_tum( @@ -277,7 +277,7 @@ void test_vlsseg2e32_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m1_tum( @@ -290,7 +290,7 @@ void test_vlsseg2e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m2_tum( @@ -303,7 +303,7 @@ void test_vlsseg2e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m4_tum( @@ -316,7 +316,7 @@ void test_vlsseg2e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32mf2_tumu( @@ -329,7 +329,7 @@ void test_vlsseg2e32_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m1_tumu( @@ -342,7 +342,7 @@ void test_vlsseg2e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m2_tumu( @@ -355,7 +355,7 @@ void test_vlsseg2e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m4_tumu( @@ -368,7 +368,7 @@ void test_vlsseg2e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32mf2_tumu( @@ -381,7 +381,7 @@ void test_vlsseg2e32_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m1_tumu( @@ -394,7 +394,7 @@ void test_vlsseg2e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m2_tumu( @@ -407,7 +407,7 @@ void test_vlsseg2e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m4_tumu( @@ -420,7 +420,7 @@ void test_vlsseg2e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32mf2_tumu( @@ -433,7 +433,7 @@ void test_vlsseg2e32_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m1_tumu( @@ -446,7 +446,7 @@ void test_vlsseg2e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m2_tumu( @@ -459,7 +459,7 @@ void test_vlsseg2e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m4_tumu( @@ -472,7 +472,7 @@ void test_vlsseg2e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32mf2_mu( @@ -485,7 +485,7 @@ void test_vlsseg2e32_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m1_mu( @@ -498,7 +498,7 @@ void test_vlsseg2e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m2_mu( @@ -511,7 +511,7 @@ void test_vlsseg2e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_f32m4_mu( @@ -524,7 +524,7 @@ void test_vlsseg2e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32mf2_mu( @@ -537,7 +537,7 @@ void test_vlsseg2e32_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m1_mu( @@ -550,7 +550,7 @@ void test_vlsseg2e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m2_mu( @@ -563,7 +563,7 @@ void test_vlsseg2e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_i32m4_mu( @@ -576,7 +576,7 @@ void test_vlsseg2e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32mf2_mu( @@ -589,7 +589,7 @@ void test_vlsseg2e32_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m1_mu( @@ -602,7 +602,7 @@ void test_vlsseg2e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m2_mu( @@ -615,7 +615,7 @@ void test_vlsseg2e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e32_v_u32m4_mu( @@ -628,6 +628,6 @@ void test_vlsseg2e32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e32_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e32_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e32_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e64.c index 61525d1216da648119ac492ad7939d3c0b9add8f..a70a4cb65f168935b0217746fa63958f7d3dd08d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e64.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m2_tu( @@ -30,7 +30,7 @@ void test_vlsseg2e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m4_tu( @@ -43,7 +43,7 @@ void test_vlsseg2e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m1_tu( @@ -56,7 +56,7 @@ void test_vlsseg2e64_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m2_tu( @@ -69,7 +69,7 @@ void test_vlsseg2e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m4_tu( @@ -82,7 +82,7 @@ void test_vlsseg2e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m1_tu( @@ -95,7 +95,7 @@ void test_vlsseg2e64_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maske // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m2_tu( @@ -108,7 +108,7 @@ void test_vlsseg2e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m4_tu( @@ -121,7 +121,7 @@ void test_vlsseg2e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m1_tum( @@ -134,7 +134,7 @@ void test_vlsseg2e64_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m2_tum( @@ -147,7 +147,7 @@ void test_vlsseg2e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m4_tum( @@ -160,7 +160,7 @@ void test_vlsseg2e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m1_tum( @@ -173,7 +173,7 @@ void test_vlsseg2e64_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m2_tum( @@ -186,7 +186,7 @@ void test_vlsseg2e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m4_tum( @@ -199,7 +199,7 @@ void test_vlsseg2e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m1_tum( @@ -212,7 +212,7 @@ void test_vlsseg2e64_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m2_tum( @@ -225,7 +225,7 @@ void test_vlsseg2e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m4_tum( @@ -238,7 +238,7 @@ void test_vlsseg2e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m1_tumu( @@ -251,7 +251,7 @@ void test_vlsseg2e64_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m2_tumu( @@ -264,7 +264,7 @@ void test_vlsseg2e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m4_tumu( @@ -277,7 +277,7 @@ void test_vlsseg2e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m1_tumu( @@ -290,7 +290,7 @@ void test_vlsseg2e64_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m2_tumu( @@ -303,7 +303,7 @@ void test_vlsseg2e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m4_tumu( @@ -316,7 +316,7 @@ void test_vlsseg2e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m1_tumu( @@ -329,7 +329,7 @@ void test_vlsseg2e64_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m2_tumu( @@ -342,7 +342,7 @@ void test_vlsseg2e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m4_tumu( @@ -355,7 +355,7 @@ void test_vlsseg2e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m1_mu( @@ -368,7 +368,7 @@ void test_vlsseg2e64_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m2_mu( @@ -381,7 +381,7 @@ void test_vlsseg2e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_f64m4_mu( @@ -394,7 +394,7 @@ void test_vlsseg2e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m1_mu( @@ -407,7 +407,7 @@ void test_vlsseg2e64_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m2_mu( @@ -420,7 +420,7 @@ void test_vlsseg2e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_i64m4_mu( @@ -433,7 +433,7 @@ void test_vlsseg2e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m1_mu( @@ -446,7 +446,7 @@ void test_vlsseg2e64_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m2_mu( @@ -459,7 +459,7 @@ void test_vlsseg2e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e64_v_u64m4_mu( @@ -472,6 +472,6 @@ void test_vlsseg2e64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e64_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e64_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e64_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e8.c index 24de371a386b3fbe4e2cbc1b027ba0655a59d2e9..41cac9f3e9b826700ef19de9c7d536ff2abd9abc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg2e8.c @@ -16,7 +16,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf4_tu( @@ -29,7 +29,7 @@ void test_vlsseg2e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t masked // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf2_tu( @@ -42,7 +42,7 @@ void test_vlsseg2e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t masked // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m1_tu( @@ -55,7 +55,7 @@ void test_vlsseg2e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t masked // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m2_tu( @@ -68,7 +68,7 @@ void test_vlsseg2e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m4_tu( @@ -81,7 +81,7 @@ void test_vlsseg2e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf8_tu( @@ -94,7 +94,7 @@ void test_vlsseg2e8_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf4_tu( @@ -107,7 +107,7 @@ void test_vlsseg2e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf2_tu( @@ -120,7 +120,7 @@ void test_vlsseg2e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m1_tu( @@ -133,7 +133,7 @@ void test_vlsseg2e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m2_tu( @@ -146,7 +146,7 @@ void test_vlsseg2e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedo // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m4_tu( @@ -159,7 +159,7 @@ void test_vlsseg2e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedo // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf8_tum( @@ -172,7 +172,7 @@ void test_vlsseg2e8_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedo // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf4_tum( @@ -185,7 +185,7 @@ void test_vlsseg2e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf2_tum( @@ -198,7 +198,7 @@ void test_vlsseg2e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m1_tum( @@ -211,7 +211,7 @@ void test_vlsseg2e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m2_tum( @@ -224,7 +224,7 @@ void test_vlsseg2e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m4_tum( @@ -237,7 +237,7 @@ void test_vlsseg2e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf8_tum( @@ -250,7 +250,7 @@ void test_vlsseg2e8_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf4_tum( @@ -263,7 +263,7 @@ void test_vlsseg2e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf2_tum( @@ -276,7 +276,7 @@ void test_vlsseg2e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m1_tum( @@ -289,7 +289,7 @@ void test_vlsseg2e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m2_tum( @@ -302,7 +302,7 @@ void test_vlsseg2e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m4_tum( @@ -315,7 +315,7 @@ void test_vlsseg2e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf8_tumu( @@ -328,7 +328,7 @@ void test_vlsseg2e8_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf4_tumu( @@ -341,7 +341,7 @@ void test_vlsseg2e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf2_tumu( @@ -354,7 +354,7 @@ void test_vlsseg2e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m1_tumu( @@ -367,7 +367,7 @@ void test_vlsseg2e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m2_tumu( @@ -380,7 +380,7 @@ void test_vlsseg2e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m4_tumu( @@ -393,7 +393,7 @@ void test_vlsseg2e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf8_tumu( @@ -406,7 +406,7 @@ void test_vlsseg2e8_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf4_tumu( @@ -419,7 +419,7 @@ void test_vlsseg2e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf2_tumu( @@ -432,7 +432,7 @@ void test_vlsseg2e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m1_tumu( @@ -445,7 +445,7 @@ void test_vlsseg2e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m2_tumu( @@ -458,7 +458,7 @@ void test_vlsseg2e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m4_tumu( @@ -471,7 +471,7 @@ void test_vlsseg2e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf8_mu( @@ -484,7 +484,7 @@ void test_vlsseg2e8_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf4_mu( @@ -497,7 +497,7 @@ void test_vlsseg2e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8mf2_mu( @@ -510,7 +510,7 @@ void test_vlsseg2e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m1_mu( @@ -523,7 +523,7 @@ void test_vlsseg2e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, v // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m2_mu( @@ -536,7 +536,7 @@ void test_vlsseg2e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_i8m4_mu( @@ -549,7 +549,7 @@ void test_vlsseg2e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf8_mu( @@ -562,7 +562,7 @@ void test_vlsseg2e8_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf4_mu( @@ -575,7 +575,7 @@ void test_vlsseg2e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8mf2_mu( @@ -588,7 +588,7 @@ void test_vlsseg2e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m1_mu( @@ -601,7 +601,7 @@ void test_vlsseg2e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m2_mu( @@ -614,7 +614,7 @@ void test_vlsseg2e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vui // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg2e8_v_u8m4_mu( @@ -627,6 +627,6 @@ void test_vlsseg2e8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vui // CHECK-RV64-NEXT: ret void // void test_vlsseg2e8_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg2e8_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); + return __riscv_vlsseg2e8_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e16.c index c56a6bfd99c51c0e6229c1c88bfec641fb39ce14..ccf183b883a886e2c24a88c43a780f9acb220719 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e16.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vlsseg3e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vlsseg3e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vlsseg3e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf4_tu( @@ -79,7 +79,7 @@ void test_vlsseg3e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf2_tu( @@ -94,7 +94,7 @@ void test_vlsseg3e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m1_tu( @@ -109,7 +109,7 @@ void test_vlsseg3e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m2_tu( @@ -124,7 +124,7 @@ void test_vlsseg3e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf4_tu( @@ -139,7 +139,7 @@ void test_vlsseg3e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf2_tu( @@ -154,7 +154,7 @@ void test_vlsseg3e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m1_tu( @@ -169,7 +169,7 @@ void test_vlsseg3e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m2_tu( @@ -184,7 +184,7 @@ void test_vlsseg3e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf4_tum( @@ -199,7 +199,7 @@ void test_vlsseg3e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf2_tum( @@ -214,7 +214,7 @@ void test_vlsseg3e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m1_tum( @@ -229,7 +229,7 @@ void test_vlsseg3e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m2_tum( @@ -244,7 +244,7 @@ void test_vlsseg3e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf4_tum( @@ -259,7 +259,7 @@ void test_vlsseg3e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf2_tum( @@ -274,7 +274,7 @@ void test_vlsseg3e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m1_tum( @@ -289,7 +289,7 @@ void test_vlsseg3e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m2_tum( @@ -304,7 +304,7 @@ void test_vlsseg3e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf4_tum( @@ -319,7 +319,7 @@ void test_vlsseg3e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf2_tum( @@ -334,7 +334,7 @@ void test_vlsseg3e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m1_tum( @@ -349,7 +349,7 @@ void test_vlsseg3e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m2_tum( @@ -364,7 +364,7 @@ void test_vlsseg3e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf4_tumu( @@ -379,7 +379,7 @@ void test_vlsseg3e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf2_tumu( @@ -394,7 +394,7 @@ void test_vlsseg3e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m1_tumu( @@ -409,7 +409,7 @@ void test_vlsseg3e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m2_tumu( @@ -424,7 +424,7 @@ void test_vlsseg3e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf4_tumu( @@ -439,7 +439,7 @@ void test_vlsseg3e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf2_tumu( @@ -454,7 +454,7 @@ void test_vlsseg3e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m1_tumu( @@ -469,7 +469,7 @@ void test_vlsseg3e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m2_tumu( @@ -484,7 +484,7 @@ void test_vlsseg3e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf4_tumu( @@ -499,7 +499,7 @@ void test_vlsseg3e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf2_tumu( @@ -514,7 +514,7 @@ void test_vlsseg3e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m1_tumu( @@ -529,7 +529,7 @@ void test_vlsseg3e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m2_tumu( @@ -544,7 +544,7 @@ void test_vlsseg3e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf4_mu( @@ -559,7 +559,7 @@ void test_vlsseg3e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16mf2_mu( @@ -574,7 +574,7 @@ void test_vlsseg3e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m1_mu( @@ -589,7 +589,7 @@ void test_vlsseg3e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_f16m2_mu( @@ -604,7 +604,7 @@ void test_vlsseg3e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf4_mu( @@ -619,7 +619,7 @@ void test_vlsseg3e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16mf2_mu( @@ -634,7 +634,7 @@ void test_vlsseg3e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m1_mu( @@ -649,7 +649,7 @@ void test_vlsseg3e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_i16m2_mu( @@ -664,7 +664,7 @@ void test_vlsseg3e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf4_mu( @@ -679,7 +679,7 @@ void test_vlsseg3e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16mf2_mu( @@ -694,7 +694,7 @@ void test_vlsseg3e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m1_mu( @@ -709,7 +709,7 @@ void test_vlsseg3e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e16_v_u16m2_mu( @@ -724,6 +724,6 @@ void test_vlsseg3e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e16_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e16_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e32.c index 69e86c4e71f5076eb72be6dcb06236ab02bac8e8..f91e26bb441364888fe8d985f7f153b4b7809e2f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e32.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m1_tu( @@ -34,7 +34,7 @@ void test_vlsseg3e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m2_tu( @@ -49,7 +49,7 @@ void test_vlsseg3e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32mf2_tu( @@ -64,7 +64,7 @@ void test_vlsseg3e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m1_tu( @@ -79,7 +79,7 @@ void test_vlsseg3e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m2_tu( @@ -94,7 +94,7 @@ void test_vlsseg3e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32mf2_tu( @@ -109,7 +109,7 @@ void test_vlsseg3e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m1_tu( @@ -124,7 +124,7 @@ void test_vlsseg3e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m2_tu( @@ -139,7 +139,7 @@ void test_vlsseg3e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32mf2_tum( @@ -154,7 +154,7 @@ void test_vlsseg3e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m1_tum( @@ -169,7 +169,7 @@ void test_vlsseg3e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m2_tum( @@ -184,7 +184,7 @@ void test_vlsseg3e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32mf2_tum( @@ -199,7 +199,7 @@ void test_vlsseg3e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m1_tum( @@ -214,7 +214,7 @@ void test_vlsseg3e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m2_tum( @@ -229,7 +229,7 @@ void test_vlsseg3e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32mf2_tum( @@ -244,7 +244,7 @@ void test_vlsseg3e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m1_tum( @@ -259,7 +259,7 @@ void test_vlsseg3e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m2_tum( @@ -274,7 +274,7 @@ void test_vlsseg3e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32mf2_tumu( @@ -289,7 +289,7 @@ void test_vlsseg3e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m1_tumu( @@ -304,7 +304,7 @@ void test_vlsseg3e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m2_tumu( @@ -319,7 +319,7 @@ void test_vlsseg3e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32mf2_tumu( @@ -334,7 +334,7 @@ void test_vlsseg3e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m1_tumu( @@ -349,7 +349,7 @@ void test_vlsseg3e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m2_tumu( @@ -364,7 +364,7 @@ void test_vlsseg3e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32mf2_tumu( @@ -379,7 +379,7 @@ void test_vlsseg3e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m1_tumu( @@ -394,7 +394,7 @@ void test_vlsseg3e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m2_tumu( @@ -409,7 +409,7 @@ void test_vlsseg3e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32mf2_mu( @@ -424,7 +424,7 @@ void test_vlsseg3e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m1_mu( @@ -439,7 +439,7 @@ void test_vlsseg3e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_f32m2_mu( @@ -454,7 +454,7 @@ void test_vlsseg3e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32mf2_mu( @@ -469,7 +469,7 @@ void test_vlsseg3e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m1_mu( @@ -484,7 +484,7 @@ void test_vlsseg3e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_i32m2_mu( @@ -499,7 +499,7 @@ void test_vlsseg3e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32mf2_mu( @@ -514,7 +514,7 @@ void test_vlsseg3e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m1_mu( @@ -529,7 +529,7 @@ void test_vlsseg3e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e32_v_u32m2_mu( @@ -544,6 +544,6 @@ void test_vlsseg3e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e32_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e32_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e64.c index b2518295fcd238d14118209b47e73b8c53711ac3..0b770c815aba099027fe09fb777eedbf06dda202 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e64.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m2_tu( @@ -34,7 +34,7 @@ void test_vlsseg3e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m1_tu( @@ -49,7 +49,7 @@ void test_vlsseg3e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m2_tu( @@ -64,7 +64,7 @@ void test_vlsseg3e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m1_tu( @@ -79,7 +79,7 @@ void test_vlsseg3e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m2_tu( @@ -94,7 +94,7 @@ void test_vlsseg3e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m1_tum( @@ -109,7 +109,7 @@ void test_vlsseg3e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m2_tum( @@ -124,7 +124,7 @@ void test_vlsseg3e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m1_tum( @@ -139,7 +139,7 @@ void test_vlsseg3e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m2_tum( @@ -154,7 +154,7 @@ void test_vlsseg3e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m1_tum( @@ -169,7 +169,7 @@ void test_vlsseg3e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m2_tum( @@ -184,7 +184,7 @@ void test_vlsseg3e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m1_tumu( @@ -199,7 +199,7 @@ void test_vlsseg3e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m2_tumu( @@ -214,7 +214,7 @@ void test_vlsseg3e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m1_tumu( @@ -229,7 +229,7 @@ void test_vlsseg3e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m2_tumu( @@ -244,7 +244,7 @@ void test_vlsseg3e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m1_tumu( @@ -259,7 +259,7 @@ void test_vlsseg3e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m2_tumu( @@ -274,7 +274,7 @@ void test_vlsseg3e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m1_mu( @@ -289,7 +289,7 @@ void test_vlsseg3e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_f64m2_mu( @@ -304,7 +304,7 @@ void test_vlsseg3e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m1_mu( @@ -319,7 +319,7 @@ void test_vlsseg3e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_i64m2_mu( @@ -334,7 +334,7 @@ void test_vlsseg3e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m1_mu( @@ -349,7 +349,7 @@ void test_vlsseg3e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e64_v_u64m2_mu( @@ -364,6 +364,6 @@ void test_vlsseg3e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e64_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e64_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e8.c index 86b994919ffd4e6f97251fac9e5a7222f26e17af..16ec0ccd8ee0b3109371e6b69041afc7536ed099 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg3e8.c @@ -18,7 +18,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf4_tu( @@ -33,7 +33,7 @@ void test_vlsseg3e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf2_tu( @@ -48,7 +48,7 @@ void test_vlsseg3e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m1_tu( @@ -63,7 +63,7 @@ void test_vlsseg3e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m2_tu( @@ -78,7 +78,7 @@ void test_vlsseg3e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf8_tu( @@ -93,7 +93,7 @@ void test_vlsseg3e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf4_tu( @@ -108,7 +108,7 @@ void test_vlsseg3e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf2_tu( @@ -123,7 +123,7 @@ void test_vlsseg3e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m1_tu( @@ -138,7 +138,7 @@ void test_vlsseg3e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m2_tu( @@ -153,7 +153,7 @@ void test_vlsseg3e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf8_tum( @@ -168,7 +168,7 @@ void test_vlsseg3e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf4_tum( @@ -183,7 +183,7 @@ void test_vlsseg3e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf2_tum( @@ -198,7 +198,7 @@ void test_vlsseg3e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m1_tum( @@ -213,7 +213,7 @@ void test_vlsseg3e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m2_tum( @@ -228,7 +228,7 @@ void test_vlsseg3e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf8_tum( @@ -243,7 +243,7 @@ void test_vlsseg3e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vboo // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf4_tum( @@ -258,7 +258,7 @@ void test_vlsseg3e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf2_tum( @@ -273,7 +273,7 @@ void test_vlsseg3e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m1_tum( @@ -288,7 +288,7 @@ void test_vlsseg3e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m2_tum( @@ -303,7 +303,7 @@ void test_vlsseg3e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf8_tumu( @@ -318,7 +318,7 @@ void test_vlsseg3e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf4_tumu( @@ -333,7 +333,7 @@ void test_vlsseg3e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf2_tumu( @@ -348,7 +348,7 @@ void test_vlsseg3e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m1_tumu( @@ -363,7 +363,7 @@ void test_vlsseg3e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m2_tumu( @@ -378,7 +378,7 @@ void test_vlsseg3e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf8_tumu( @@ -393,7 +393,7 @@ void test_vlsseg3e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf4_tumu( @@ -408,7 +408,7 @@ void test_vlsseg3e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf2_tumu( @@ -423,7 +423,7 @@ void test_vlsseg3e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m1_tumu( @@ -438,7 +438,7 @@ void test_vlsseg3e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m2_tumu( @@ -453,7 +453,7 @@ void test_vlsseg3e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf8_mu( @@ -468,7 +468,7 @@ void test_vlsseg3e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf4_mu( @@ -483,7 +483,7 @@ void test_vlsseg3e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8mf2_mu( @@ -498,7 +498,7 @@ void test_vlsseg3e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m1_mu( @@ -513,7 +513,7 @@ void test_vlsseg3e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_i8m2_mu( @@ -528,7 +528,7 @@ void test_vlsseg3e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf8_mu( @@ -543,7 +543,7 @@ void test_vlsseg3e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf4_mu( @@ -558,7 +558,7 @@ void test_vlsseg3e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8mf2_mu( @@ -573,7 +573,7 @@ void test_vlsseg3e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m1_mu( @@ -588,7 +588,7 @@ void test_vlsseg3e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg3e8_v_u8m2_mu( @@ -603,6 +603,6 @@ void test_vlsseg3e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vlsseg3e8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg3e8_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); + return __riscv_vlsseg3e8_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e16.c index 8850b892bc96101d04e56093c08ff50845e67ae8..04b0460528e5ec647b424064b15fdb61f414ede3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e16.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vlsseg4e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vlsseg4e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vlsseg4e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf4_tu( @@ -89,7 +89,7 @@ void test_vlsseg4e16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf2_tu( @@ -106,7 +106,7 @@ void test_vlsseg4e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m1_tu( @@ -123,7 +123,7 @@ void test_vlsseg4e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m2_tu( @@ -140,7 +140,7 @@ void test_vlsseg4e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf4_tu( @@ -157,7 +157,7 @@ void test_vlsseg4e16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf2_tu( @@ -174,7 +174,7 @@ void test_vlsseg4e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m1_tu( @@ -191,7 +191,7 @@ void test_vlsseg4e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m2_tu( @@ -208,7 +208,7 @@ void test_vlsseg4e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf4_tum( @@ -225,7 +225,7 @@ void test_vlsseg4e16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf2_tum( @@ -242,7 +242,7 @@ void test_vlsseg4e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m1_tum( @@ -259,7 +259,7 @@ void test_vlsseg4e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m2_tum( @@ -276,7 +276,7 @@ void test_vlsseg4e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf4_tum( @@ -293,7 +293,7 @@ void test_vlsseg4e16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf2_tum( @@ -310,7 +310,7 @@ void test_vlsseg4e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m1_tum( @@ -327,7 +327,7 @@ void test_vlsseg4e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m2_tum( @@ -344,7 +344,7 @@ void test_vlsseg4e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf4_tum( @@ -361,7 +361,7 @@ void test_vlsseg4e16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf2_tum( @@ -378,7 +378,7 @@ void test_vlsseg4e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m1_tum( @@ -395,7 +395,7 @@ void test_vlsseg4e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m2_tum( @@ -412,7 +412,7 @@ void test_vlsseg4e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf4_tumu( @@ -429,7 +429,7 @@ void test_vlsseg4e16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf2_tumu( @@ -446,7 +446,7 @@ void test_vlsseg4e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m1_tumu( @@ -463,7 +463,7 @@ void test_vlsseg4e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m2_tumu( @@ -480,7 +480,7 @@ void test_vlsseg4e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf4_tumu( @@ -497,7 +497,7 @@ void test_vlsseg4e16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf2_tumu( @@ -514,7 +514,7 @@ void test_vlsseg4e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m1_tumu( @@ -531,7 +531,7 @@ void test_vlsseg4e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m2_tumu( @@ -548,7 +548,7 @@ void test_vlsseg4e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf4_tumu( @@ -565,7 +565,7 @@ void test_vlsseg4e16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf2_tumu( @@ -582,7 +582,7 @@ void test_vlsseg4e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m1_tumu( @@ -599,7 +599,7 @@ void test_vlsseg4e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m2_tumu( @@ -616,7 +616,7 @@ void test_vlsseg4e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf4_mu( @@ -633,7 +633,7 @@ void test_vlsseg4e16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16mf2_mu( @@ -650,7 +650,7 @@ void test_vlsseg4e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m1_mu( @@ -667,7 +667,7 @@ void test_vlsseg4e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_f16m2_mu( @@ -684,7 +684,7 @@ void test_vlsseg4e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf4_mu( @@ -701,7 +701,7 @@ void test_vlsseg4e16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16mf2_mu( @@ -718,7 +718,7 @@ void test_vlsseg4e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m1_mu( @@ -735,7 +735,7 @@ void test_vlsseg4e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_i16m2_mu( @@ -752,7 +752,7 @@ void test_vlsseg4e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf4_mu( @@ -769,7 +769,7 @@ void test_vlsseg4e16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16mf2_mu( @@ -786,7 +786,7 @@ void test_vlsseg4e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m1_mu( @@ -803,7 +803,7 @@ void test_vlsseg4e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e16_v_u16m2_mu( @@ -820,6 +820,6 @@ void test_vlsseg4e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e16_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e16_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e32.c index 7b6b7d89f45625b22ce5d6936c8e296fbcebb7bd..4ecf26f609dbdecd18e436c641a45a875409b709 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e32.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m1_tu( @@ -38,7 +38,7 @@ void test_vlsseg4e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m2_tu( @@ -55,7 +55,7 @@ void test_vlsseg4e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32mf2_tu( @@ -72,7 +72,7 @@ void test_vlsseg4e32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m1_tu( @@ -89,7 +89,7 @@ void test_vlsseg4e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m2_tu( @@ -106,7 +106,7 @@ void test_vlsseg4e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32mf2_tu( @@ -123,7 +123,7 @@ void test_vlsseg4e32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m1_tu( @@ -140,7 +140,7 @@ void test_vlsseg4e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m2_tu( @@ -157,7 +157,7 @@ void test_vlsseg4e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32mf2_tum( @@ -174,7 +174,7 @@ void test_vlsseg4e32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m1_tum( @@ -191,7 +191,7 @@ void test_vlsseg4e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m2_tum( @@ -208,7 +208,7 @@ void test_vlsseg4e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32mf2_tum( @@ -225,7 +225,7 @@ void test_vlsseg4e32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m1_tum( @@ -242,7 +242,7 @@ void test_vlsseg4e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m2_tum( @@ -259,7 +259,7 @@ void test_vlsseg4e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32mf2_tum( @@ -276,7 +276,7 @@ void test_vlsseg4e32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m1_tum( @@ -293,7 +293,7 @@ void test_vlsseg4e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m2_tum( @@ -310,7 +310,7 @@ void test_vlsseg4e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32mf2_tumu( @@ -327,7 +327,7 @@ void test_vlsseg4e32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m1_tumu( @@ -344,7 +344,7 @@ void test_vlsseg4e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m2_tumu( @@ -361,7 +361,7 @@ void test_vlsseg4e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32mf2_tumu( @@ -378,7 +378,7 @@ void test_vlsseg4e32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m1_tumu( @@ -395,7 +395,7 @@ void test_vlsseg4e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m2_tumu( @@ -412,7 +412,7 @@ void test_vlsseg4e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32mf2_tumu( @@ -429,7 +429,7 @@ void test_vlsseg4e32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m1_tumu( @@ -446,7 +446,7 @@ void test_vlsseg4e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m2_tumu( @@ -463,7 +463,7 @@ void test_vlsseg4e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32mf2_mu( @@ -480,7 +480,7 @@ void test_vlsseg4e32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m1_mu( @@ -497,7 +497,7 @@ void test_vlsseg4e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_f32m2_mu( @@ -514,7 +514,7 @@ void test_vlsseg4e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32mf2_mu( @@ -531,7 +531,7 @@ void test_vlsseg4e32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m1_mu( @@ -548,7 +548,7 @@ void test_vlsseg4e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_i32m2_mu( @@ -565,7 +565,7 @@ void test_vlsseg4e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32mf2_mu( @@ -582,7 +582,7 @@ void test_vlsseg4e32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m1_mu( @@ -599,7 +599,7 @@ void test_vlsseg4e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e32_v_u32m2_mu( @@ -616,6 +616,6 @@ void test_vlsseg4e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e32_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e32_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e64.c index 3e6044b085cff4bae7ae31e4b87bed6985aaf044..f38c80fccb54e84535cf4b6ca2bc5ac4135dc1db 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e64.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m2_tu( @@ -38,7 +38,7 @@ void test_vlsseg4e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m1_tu( @@ -55,7 +55,7 @@ void test_vlsseg4e64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m2_tu( @@ -72,7 +72,7 @@ void test_vlsseg4e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m1_tu( @@ -89,7 +89,7 @@ void test_vlsseg4e64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m2_tu( @@ -106,7 +106,7 @@ void test_vlsseg4e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m1_tum( @@ -123,7 +123,7 @@ void test_vlsseg4e64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m2_tum( @@ -140,7 +140,7 @@ void test_vlsseg4e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m1_tum( @@ -157,7 +157,7 @@ void test_vlsseg4e64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m2_tum( @@ -174,7 +174,7 @@ void test_vlsseg4e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m1_tum( @@ -191,7 +191,7 @@ void test_vlsseg4e64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m2_tum( @@ -208,7 +208,7 @@ void test_vlsseg4e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m1_tumu( @@ -225,7 +225,7 @@ void test_vlsseg4e64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m2_tumu( @@ -242,7 +242,7 @@ void test_vlsseg4e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m1_tumu( @@ -259,7 +259,7 @@ void test_vlsseg4e64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m2_tumu( @@ -276,7 +276,7 @@ void test_vlsseg4e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m1_tumu( @@ -293,7 +293,7 @@ void test_vlsseg4e64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m2_tumu( @@ -310,7 +310,7 @@ void test_vlsseg4e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m1_mu( @@ -327,7 +327,7 @@ void test_vlsseg4e64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_f64m2_mu( @@ -344,7 +344,7 @@ void test_vlsseg4e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m1_mu( @@ -361,7 +361,7 @@ void test_vlsseg4e64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_i64m2_mu( @@ -378,7 +378,7 @@ void test_vlsseg4e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m1_mu( @@ -395,7 +395,7 @@ void test_vlsseg4e64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e64_v_u64m2_mu( @@ -412,6 +412,6 @@ void test_vlsseg4e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e64_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e64_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e8.c index d7b3c0e9be9117e806511a1941257949fc4c2607..d86dbec0f7297b7e81f6240f68955e5c6f4c02c1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg4e8.c @@ -20,7 +20,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf4_tu( @@ -37,7 +37,7 @@ void test_vlsseg4e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf2_tu( @@ -54,7 +54,7 @@ void test_vlsseg4e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m1_tu( @@ -71,7 +71,7 @@ void test_vlsseg4e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m2_tu( @@ -88,7 +88,7 @@ void test_vlsseg4e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf8_tu( @@ -105,7 +105,7 @@ void test_vlsseg4e8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf4_tu( @@ -122,7 +122,7 @@ void test_vlsseg4e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf2_tu( @@ -139,7 +139,7 @@ void test_vlsseg4e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m1_tu( @@ -156,7 +156,7 @@ void test_vlsseg4e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m2_tu( @@ -173,7 +173,7 @@ void test_vlsseg4e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf8_tum( @@ -190,7 +190,7 @@ void test_vlsseg4e8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf4_tum( @@ -207,7 +207,7 @@ void test_vlsseg4e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf2_tum( @@ -224,7 +224,7 @@ void test_vlsseg4e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m1_tum( @@ -241,7 +241,7 @@ void test_vlsseg4e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m2_tum( @@ -258,7 +258,7 @@ void test_vlsseg4e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf8_tum( @@ -275,7 +275,7 @@ void test_vlsseg4e8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf4_tum( @@ -292,7 +292,7 @@ void test_vlsseg4e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf2_tum( @@ -309,7 +309,7 @@ void test_vlsseg4e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m1_tum( @@ -326,7 +326,7 @@ void test_vlsseg4e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m2_tum( @@ -343,7 +343,7 @@ void test_vlsseg4e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf8_tumu( @@ -360,7 +360,7 @@ void test_vlsseg4e8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf4_tumu( @@ -377,7 +377,7 @@ void test_vlsseg4e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf2_tumu( @@ -394,7 +394,7 @@ void test_vlsseg4e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m1_tumu( @@ -411,7 +411,7 @@ void test_vlsseg4e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m2_tumu( @@ -428,7 +428,7 @@ void test_vlsseg4e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf8_tumu( @@ -445,7 +445,7 @@ void test_vlsseg4e8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf4_tumu( @@ -462,7 +462,7 @@ void test_vlsseg4e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf2_tumu( @@ -479,7 +479,7 @@ void test_vlsseg4e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m1_tumu( @@ -496,7 +496,7 @@ void test_vlsseg4e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m2_tumu( @@ -513,7 +513,7 @@ void test_vlsseg4e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf8_mu( @@ -530,7 +530,7 @@ void test_vlsseg4e8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf4_mu( @@ -547,7 +547,7 @@ void test_vlsseg4e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8mf2_mu( @@ -564,7 +564,7 @@ void test_vlsseg4e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m1_mu( @@ -581,7 +581,7 @@ void test_vlsseg4e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_i8m2_mu( @@ -598,7 +598,7 @@ void test_vlsseg4e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf8_mu( @@ -615,7 +615,7 @@ void test_vlsseg4e8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf4_mu( @@ -632,7 +632,7 @@ void test_vlsseg4e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8mf2_mu( @@ -649,7 +649,7 @@ void test_vlsseg4e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m1_mu( @@ -666,7 +666,7 @@ void test_vlsseg4e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg4e8_v_u8m2_mu( @@ -683,6 +683,6 @@ void test_vlsseg4e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg4e8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg4e8_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); + return __riscv_vlsseg4e8_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e16.c index ea12fbeb72e2857c62fa4be4c7436bbcaaecc3e7..c55dc2d03449154ba8dca0a1c3f3ebee987a3462 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e16.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vlsseg5e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vlsseg5e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf4_tu( @@ -80,7 +80,7 @@ void test_vlsseg5e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf2_tu( @@ -99,7 +99,7 @@ void test_vlsseg5e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16m1_tu( @@ -118,7 +118,7 @@ void test_vlsseg5e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf4_tu( @@ -137,7 +137,7 @@ void test_vlsseg5e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf2_tu( @@ -156,7 +156,7 @@ void test_vlsseg5e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16m1_tu( @@ -175,7 +175,7 @@ void test_vlsseg5e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf4_tum( @@ -194,7 +194,7 @@ void test_vlsseg5e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf2_tum( @@ -213,7 +213,7 @@ void test_vlsseg5e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16m1_tum( @@ -232,7 +232,7 @@ void test_vlsseg5e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf4_tum( @@ -251,7 +251,7 @@ void test_vlsseg5e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf2_tum( @@ -270,7 +270,7 @@ void test_vlsseg5e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16m1_tum( @@ -289,7 +289,7 @@ void test_vlsseg5e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf4_tum( @@ -308,7 +308,7 @@ void test_vlsseg5e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf2_tum( @@ -327,7 +327,7 @@ void test_vlsseg5e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16m1_tum( @@ -346,7 +346,7 @@ void test_vlsseg5e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf4_tumu( @@ -365,7 +365,7 @@ void test_vlsseg5e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf2_tumu( @@ -384,7 +384,7 @@ void test_vlsseg5e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16m1_tumu( @@ -403,7 +403,7 @@ void test_vlsseg5e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf4_tumu( @@ -422,7 +422,7 @@ void test_vlsseg5e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf2_tumu( @@ -441,7 +441,7 @@ void test_vlsseg5e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16m1_tumu( @@ -460,7 +460,7 @@ void test_vlsseg5e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf4_tumu( @@ -479,7 +479,7 @@ void test_vlsseg5e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf2_tumu( @@ -498,7 +498,7 @@ void test_vlsseg5e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16m1_tumu( @@ -517,7 +517,7 @@ void test_vlsseg5e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf4_mu( @@ -536,7 +536,7 @@ void test_vlsseg5e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16mf2_mu( @@ -555,7 +555,7 @@ void test_vlsseg5e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_f16m1_mu( @@ -574,7 +574,7 @@ void test_vlsseg5e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf4_mu( @@ -593,7 +593,7 @@ void test_vlsseg5e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16mf2_mu( @@ -612,7 +612,7 @@ void test_vlsseg5e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_i16m1_mu( @@ -631,7 +631,7 @@ void test_vlsseg5e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf4_mu( @@ -650,7 +650,7 @@ void test_vlsseg5e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16mf2_mu( @@ -669,7 +669,7 @@ void test_vlsseg5e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e16_v_u16m1_mu( @@ -688,6 +688,6 @@ void test_vlsseg5e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e16_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e16_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e32.c index 95eb79f10e9f2b55f6baaa411baba1f6bd964d8f..dc6bf8a72013c05c3896cd76014161e154ce3a61 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e32.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32m1_tu( @@ -42,7 +42,7 @@ void test_vlsseg5e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32mf2_tu( @@ -61,7 +61,7 @@ void test_vlsseg5e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32m1_tu( @@ -80,7 +80,7 @@ void test_vlsseg5e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32mf2_tu( @@ -99,7 +99,7 @@ void test_vlsseg5e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32m1_tu( @@ -118,7 +118,7 @@ void test_vlsseg5e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32mf2_tum( @@ -137,7 +137,7 @@ void test_vlsseg5e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32m1_tum( @@ -156,7 +156,7 @@ void test_vlsseg5e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32mf2_tum( @@ -175,7 +175,7 @@ void test_vlsseg5e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32m1_tum( @@ -194,7 +194,7 @@ void test_vlsseg5e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32mf2_tum( @@ -213,7 +213,7 @@ void test_vlsseg5e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32m1_tum( @@ -232,7 +232,7 @@ void test_vlsseg5e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32mf2_tumu( @@ -251,7 +251,7 @@ void test_vlsseg5e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32m1_tumu( @@ -270,7 +270,7 @@ void test_vlsseg5e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32mf2_tumu( @@ -289,7 +289,7 @@ void test_vlsseg5e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32m1_tumu( @@ -308,7 +308,7 @@ void test_vlsseg5e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32mf2_tumu( @@ -327,7 +327,7 @@ void test_vlsseg5e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32m1_tumu( @@ -346,7 +346,7 @@ void test_vlsseg5e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32mf2_mu( @@ -365,7 +365,7 @@ void test_vlsseg5e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_f32m1_mu( @@ -384,7 +384,7 @@ void test_vlsseg5e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32mf2_mu( @@ -403,7 +403,7 @@ void test_vlsseg5e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_i32m1_mu( @@ -422,7 +422,7 @@ void test_vlsseg5e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32mf2_mu( @@ -441,7 +441,7 @@ void test_vlsseg5e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e32_v_u32m1_mu( @@ -460,6 +460,6 @@ void test_vlsseg5e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e32_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e32_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e64.c index 168345bde751572be9d5b8e3102d13289f918519..7427377e2be0f0671fb8a676ab830a5f8ed0a32d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e64.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_i64m1_tu( @@ -42,7 +42,7 @@ void test_vlsseg5e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_u64m1_tu( @@ -61,7 +61,7 @@ void test_vlsseg5e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_f64m1_tum( @@ -80,7 +80,7 @@ void test_vlsseg5e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_i64m1_tum( @@ -99,7 +99,7 @@ void test_vlsseg5e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_u64m1_tum( @@ -118,7 +118,7 @@ void test_vlsseg5e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_f64m1_tumu( @@ -137,7 +137,7 @@ void test_vlsseg5e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_i64m1_tumu( @@ -156,7 +156,7 @@ void test_vlsseg5e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_u64m1_tumu( @@ -175,7 +175,7 @@ void test_vlsseg5e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_f64m1_mu( @@ -194,7 +194,7 @@ void test_vlsseg5e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_i64m1_mu( @@ -213,7 +213,7 @@ void test_vlsseg5e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e64_v_u64m1_mu( @@ -232,6 +232,6 @@ void test_vlsseg5e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e64_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e64_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e8.c index d73b2466f3d5142aa3343cd9bbee563abfb42944..c0d196bc45095d95bfe9dfbc5d251518a509921f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg5e8.c @@ -22,7 +22,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf4_tu( @@ -41,7 +41,7 @@ void test_vlsseg5e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf2_tu( @@ -60,7 +60,7 @@ void test_vlsseg5e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8m1_tu( @@ -79,7 +79,7 @@ void test_vlsseg5e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf8_tu( @@ -98,7 +98,7 @@ void test_vlsseg5e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf4_tu( @@ -117,7 +117,7 @@ void test_vlsseg5e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf2_tu( @@ -136,7 +136,7 @@ void test_vlsseg5e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8m1_tu( @@ -155,7 +155,7 @@ void test_vlsseg5e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf8_tum( @@ -174,7 +174,7 @@ void test_vlsseg5e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf4_tum( @@ -193,7 +193,7 @@ void test_vlsseg5e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf2_tum( @@ -212,7 +212,7 @@ void test_vlsseg5e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8m1_tum( @@ -231,7 +231,7 @@ void test_vlsseg5e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf8_tum( @@ -250,7 +250,7 @@ void test_vlsseg5e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf4_tum( @@ -269,7 +269,7 @@ void test_vlsseg5e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf2_tum( @@ -288,7 +288,7 @@ void test_vlsseg5e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8m1_tum( @@ -307,7 +307,7 @@ void test_vlsseg5e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf8_tumu( @@ -326,7 +326,7 @@ void test_vlsseg5e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf4_tumu( @@ -345,7 +345,7 @@ void test_vlsseg5e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf2_tumu( @@ -364,7 +364,7 @@ void test_vlsseg5e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8m1_tumu( @@ -383,7 +383,7 @@ void test_vlsseg5e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf8_tumu( @@ -402,7 +402,7 @@ void test_vlsseg5e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf4_tumu( @@ -421,7 +421,7 @@ void test_vlsseg5e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf2_tumu( @@ -440,7 +440,7 @@ void test_vlsseg5e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8m1_tumu( @@ -459,7 +459,7 @@ void test_vlsseg5e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf8_mu( @@ -478,7 +478,7 @@ void test_vlsseg5e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf4_mu( @@ -497,7 +497,7 @@ void test_vlsseg5e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8mf2_mu( @@ -516,7 +516,7 @@ void test_vlsseg5e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_i8m1_mu( @@ -535,7 +535,7 @@ void test_vlsseg5e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf8_mu( @@ -554,7 +554,7 @@ void test_vlsseg5e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf4_mu( @@ -573,7 +573,7 @@ void test_vlsseg5e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8mf2_mu( @@ -592,7 +592,7 @@ void test_vlsseg5e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg5e8_v_u8m1_mu( @@ -611,6 +611,6 @@ void test_vlsseg5e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg5e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg5e8_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); + return __riscv_vlsseg5e8_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e16.c index c74f3ee0f90b541bf4ec80becbfce99a2d060dbc..b242586ce104d51c9ffc87b9d87577e4815d9515 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e16.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vlsseg6e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vlsseg6e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf4_tu( @@ -88,7 +88,7 @@ void test_vlsseg6e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf2_tu( @@ -109,7 +109,7 @@ void test_vlsseg6e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16m1_tu( @@ -130,7 +130,7 @@ void test_vlsseg6e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf4_tu( @@ -151,7 +151,7 @@ void test_vlsseg6e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf2_tu( @@ -172,7 +172,7 @@ void test_vlsseg6e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16m1_tu( @@ -193,7 +193,7 @@ void test_vlsseg6e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf4_tum( @@ -214,7 +214,7 @@ void test_vlsseg6e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf2_tum( @@ -235,7 +235,7 @@ void test_vlsseg6e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16m1_tum( @@ -256,7 +256,7 @@ void test_vlsseg6e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf4_tum( @@ -277,7 +277,7 @@ void test_vlsseg6e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf2_tum( @@ -298,7 +298,7 @@ void test_vlsseg6e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16m1_tum( @@ -319,7 +319,7 @@ void test_vlsseg6e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf4_tum( @@ -340,7 +340,7 @@ void test_vlsseg6e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf2_tum( @@ -361,7 +361,7 @@ void test_vlsseg6e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16m1_tum( @@ -382,7 +382,7 @@ void test_vlsseg6e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf4_tumu( @@ -403,7 +403,7 @@ void test_vlsseg6e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf2_tumu( @@ -424,7 +424,7 @@ void test_vlsseg6e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16m1_tumu( @@ -445,7 +445,7 @@ void test_vlsseg6e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf4_tumu( @@ -466,7 +466,7 @@ void test_vlsseg6e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf2_tumu( @@ -487,7 +487,7 @@ void test_vlsseg6e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16m1_tumu( @@ -508,7 +508,7 @@ void test_vlsseg6e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf4_tumu( @@ -529,7 +529,7 @@ void test_vlsseg6e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf2_tumu( @@ -550,7 +550,7 @@ void test_vlsseg6e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16m1_tumu( @@ -571,7 +571,7 @@ void test_vlsseg6e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf4_mu( @@ -592,7 +592,7 @@ void test_vlsseg6e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16mf2_mu( @@ -613,7 +613,7 @@ void test_vlsseg6e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_f16m1_mu( @@ -634,7 +634,7 @@ void test_vlsseg6e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf4_mu( @@ -655,7 +655,7 @@ void test_vlsseg6e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16mf2_mu( @@ -676,7 +676,7 @@ void test_vlsseg6e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_i16m1_mu( @@ -697,7 +697,7 @@ void test_vlsseg6e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf4_mu( @@ -718,7 +718,7 @@ void test_vlsseg6e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16mf2_mu( @@ -739,7 +739,7 @@ void test_vlsseg6e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e16_v_u16m1_mu( @@ -760,6 +760,6 @@ void test_vlsseg6e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e32.c index 3c912ad87ca682183e26d3a671a5a6f617001ae1..01c2478f5150fd5bad8ea55c61446b5d4fe98ba5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e32.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32m1_tu( @@ -46,7 +46,7 @@ void test_vlsseg6e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32mf2_tu( @@ -67,7 +67,7 @@ void test_vlsseg6e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32m1_tu( @@ -88,7 +88,7 @@ void test_vlsseg6e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32mf2_tu( @@ -109,7 +109,7 @@ void test_vlsseg6e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32m1_tu( @@ -130,7 +130,7 @@ void test_vlsseg6e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32mf2_tum( @@ -151,7 +151,7 @@ void test_vlsseg6e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32m1_tum( @@ -172,7 +172,7 @@ void test_vlsseg6e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32mf2_tum( @@ -193,7 +193,7 @@ void test_vlsseg6e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32m1_tum( @@ -214,7 +214,7 @@ void test_vlsseg6e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32mf2_tum( @@ -235,7 +235,7 @@ void test_vlsseg6e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32m1_tum( @@ -256,7 +256,7 @@ void test_vlsseg6e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32mf2_tumu( @@ -277,7 +277,7 @@ void test_vlsseg6e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32m1_tumu( @@ -298,7 +298,7 @@ void test_vlsseg6e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32mf2_tumu( @@ -319,7 +319,7 @@ void test_vlsseg6e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32m1_tumu( @@ -340,7 +340,7 @@ void test_vlsseg6e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32mf2_tumu( @@ -361,7 +361,7 @@ void test_vlsseg6e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32m1_tumu( @@ -382,7 +382,7 @@ void test_vlsseg6e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32mf2_mu( @@ -403,7 +403,7 @@ void test_vlsseg6e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_f32m1_mu( @@ -424,7 +424,7 @@ void test_vlsseg6e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32mf2_mu( @@ -445,7 +445,7 @@ void test_vlsseg6e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_i32m1_mu( @@ -466,7 +466,7 @@ void test_vlsseg6e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32mf2_mu( @@ -487,7 +487,7 @@ void test_vlsseg6e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e32_v_u32m1_mu( @@ -508,6 +508,6 @@ void test_vlsseg6e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e64.c index 555b0f44896a158f4b7fdff38d043f9959f79a85..8994f2e7e795d6c026996187e292359280f1f645 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e64.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_i64m1_tu( @@ -46,7 +46,7 @@ void test_vlsseg6e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_u64m1_tu( @@ -67,7 +67,7 @@ void test_vlsseg6e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_f64m1_tum( @@ -88,7 +88,7 @@ void test_vlsseg6e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_i64m1_tum( @@ -109,7 +109,7 @@ void test_vlsseg6e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_u64m1_tum( @@ -130,7 +130,7 @@ void test_vlsseg6e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_f64m1_tumu( @@ -151,7 +151,7 @@ void test_vlsseg6e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_i64m1_tumu( @@ -172,7 +172,7 @@ void test_vlsseg6e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_u64m1_tumu( @@ -193,7 +193,7 @@ void test_vlsseg6e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_f64m1_mu( @@ -214,7 +214,7 @@ void test_vlsseg6e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_i64m1_mu( @@ -235,7 +235,7 @@ void test_vlsseg6e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e64_v_u64m1_mu( @@ -256,6 +256,6 @@ void test_vlsseg6e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e8.c index ba249221ef90b8ce5910b00c70d75ccc509e7b4a..fba3545bac528ee19b7e11a1257cafb6277dc507 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg6e8.c @@ -24,7 +24,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf4_tu( @@ -45,7 +45,7 @@ void test_vlsseg6e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf2_tu( @@ -66,7 +66,7 @@ void test_vlsseg6e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8m1_tu( @@ -87,7 +87,7 @@ void test_vlsseg6e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf8_tu( @@ -108,7 +108,7 @@ void test_vlsseg6e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf4_tu( @@ -129,7 +129,7 @@ void test_vlsseg6e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf2_tu( @@ -150,7 +150,7 @@ void test_vlsseg6e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8m1_tu( @@ -171,7 +171,7 @@ void test_vlsseg6e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf8_tum( @@ -192,7 +192,7 @@ void test_vlsseg6e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf4_tum( @@ -213,7 +213,7 @@ void test_vlsseg6e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf2_tum( @@ -234,7 +234,7 @@ void test_vlsseg6e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8m1_tum( @@ -255,7 +255,7 @@ void test_vlsseg6e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf8_tum( @@ -276,7 +276,7 @@ void test_vlsseg6e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf4_tum( @@ -297,7 +297,7 @@ void test_vlsseg6e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf2_tum( @@ -318,7 +318,7 @@ void test_vlsseg6e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8m1_tum( @@ -339,7 +339,7 @@ void test_vlsseg6e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf8_tumu( @@ -360,7 +360,7 @@ void test_vlsseg6e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf4_tumu( @@ -381,7 +381,7 @@ void test_vlsseg6e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf2_tumu( @@ -402,7 +402,7 @@ void test_vlsseg6e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8m1_tumu( @@ -423,7 +423,7 @@ void test_vlsseg6e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf8_tumu( @@ -444,7 +444,7 @@ void test_vlsseg6e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf4_tumu( @@ -465,7 +465,7 @@ void test_vlsseg6e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf2_tumu( @@ -486,7 +486,7 @@ void test_vlsseg6e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8m1_tumu( @@ -507,7 +507,7 @@ void test_vlsseg6e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf8_mu( @@ -528,7 +528,7 @@ void test_vlsseg6e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf4_mu( @@ -549,7 +549,7 @@ void test_vlsseg6e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8mf2_mu( @@ -570,7 +570,7 @@ void test_vlsseg6e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_i8m1_mu( @@ -591,7 +591,7 @@ void test_vlsseg6e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf8_mu( @@ -612,7 +612,7 @@ void test_vlsseg6e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf4_mu( @@ -633,7 +633,7 @@ void test_vlsseg6e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8mf2_mu( @@ -654,7 +654,7 @@ void test_vlsseg6e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg6e8_v_u8m1_mu( @@ -675,6 +675,6 @@ void test_vlsseg6e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg6e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg6e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); + return __riscv_vlsseg6e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e16.c index 3546a83d7f4b3170a380067fe713cd577e37546f..27751e99b9fd9dd2af73444983c84dc44e4fb294 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e16.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vlsseg7e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vlsseg7e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf4_tu( @@ -96,7 +96,7 @@ void test_vlsseg7e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf2_tu( @@ -119,7 +119,7 @@ void test_vlsseg7e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16m1_tu( @@ -142,7 +142,7 @@ void test_vlsseg7e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf4_tu( @@ -165,7 +165,7 @@ void test_vlsseg7e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf2_tu( @@ -188,7 +188,7 @@ void test_vlsseg7e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16m1_tu( @@ -211,7 +211,7 @@ void test_vlsseg7e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf4_tum( @@ -234,7 +234,7 @@ void test_vlsseg7e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf2_tum( @@ -257,7 +257,7 @@ void test_vlsseg7e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16m1_tum( @@ -280,7 +280,7 @@ void test_vlsseg7e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf4_tum( @@ -303,7 +303,7 @@ void test_vlsseg7e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf2_tum( @@ -326,7 +326,7 @@ void test_vlsseg7e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16m1_tum( @@ -349,7 +349,7 @@ void test_vlsseg7e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf4_tum( @@ -372,7 +372,7 @@ void test_vlsseg7e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf2_tum( @@ -395,7 +395,7 @@ void test_vlsseg7e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16m1_tum( @@ -418,7 +418,7 @@ void test_vlsseg7e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf4_tumu( @@ -441,7 +441,7 @@ void test_vlsseg7e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf2_tumu( @@ -464,7 +464,7 @@ void test_vlsseg7e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16m1_tumu( @@ -487,7 +487,7 @@ void test_vlsseg7e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf4_tumu( @@ -510,7 +510,7 @@ void test_vlsseg7e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf2_tumu( @@ -533,7 +533,7 @@ void test_vlsseg7e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16m1_tumu( @@ -556,7 +556,7 @@ void test_vlsseg7e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf4_tumu( @@ -579,7 +579,7 @@ void test_vlsseg7e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf2_tumu( @@ -602,7 +602,7 @@ void test_vlsseg7e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16m1_tumu( @@ -625,7 +625,7 @@ void test_vlsseg7e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf4_mu( @@ -648,7 +648,7 @@ void test_vlsseg7e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16mf2_mu( @@ -671,7 +671,7 @@ void test_vlsseg7e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_f16m1_mu( @@ -694,7 +694,7 @@ void test_vlsseg7e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf4_mu( @@ -717,7 +717,7 @@ void test_vlsseg7e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16mf2_mu( @@ -740,7 +740,7 @@ void test_vlsseg7e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_i16m1_mu( @@ -763,7 +763,7 @@ void test_vlsseg7e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf4_mu( @@ -786,7 +786,7 @@ void test_vlsseg7e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16mf2_mu( @@ -809,7 +809,7 @@ void test_vlsseg7e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e16_v_u16m1_mu( @@ -832,6 +832,6 @@ void test_vlsseg7e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e32.c index 46774d0cb1d7ea6a57863f96058cf3ca6ee77891..ca979fe60c729dc566b5f08d21c80299ab459836 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e32.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32m1_tu( @@ -50,7 +50,7 @@ void test_vlsseg7e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32mf2_tu( @@ -73,7 +73,7 @@ void test_vlsseg7e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32m1_tu( @@ -96,7 +96,7 @@ void test_vlsseg7e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32mf2_tu( @@ -119,7 +119,7 @@ void test_vlsseg7e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32m1_tu( @@ -142,7 +142,7 @@ void test_vlsseg7e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32mf2_tum( @@ -165,7 +165,7 @@ void test_vlsseg7e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32m1_tum( @@ -188,7 +188,7 @@ void test_vlsseg7e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32mf2_tum( @@ -211,7 +211,7 @@ void test_vlsseg7e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32m1_tum( @@ -234,7 +234,7 @@ void test_vlsseg7e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32mf2_tum( @@ -257,7 +257,7 @@ void test_vlsseg7e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32m1_tum( @@ -280,7 +280,7 @@ void test_vlsseg7e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32mf2_tumu( @@ -303,7 +303,7 @@ void test_vlsseg7e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32m1_tumu( @@ -326,7 +326,7 @@ void test_vlsseg7e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32mf2_tumu( @@ -349,7 +349,7 @@ void test_vlsseg7e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32m1_tumu( @@ -372,7 +372,7 @@ void test_vlsseg7e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32mf2_tumu( @@ -395,7 +395,7 @@ void test_vlsseg7e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32m1_tumu( @@ -418,7 +418,7 @@ void test_vlsseg7e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32mf2_mu( @@ -441,7 +441,7 @@ void test_vlsseg7e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_f32m1_mu( @@ -464,7 +464,7 @@ void test_vlsseg7e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32mf2_mu( @@ -487,7 +487,7 @@ void test_vlsseg7e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_i32m1_mu( @@ -510,7 +510,7 @@ void test_vlsseg7e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32mf2_mu( @@ -533,7 +533,7 @@ void test_vlsseg7e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e32_v_u32m1_mu( @@ -556,6 +556,6 @@ void test_vlsseg7e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e64.c index cc0e88da28d0259f0c5a7357aa1d87484be1d55d..c07b0d01d28c3b229b114685171b3a0a9e7b4c80 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e64.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_i64m1_tu( @@ -50,7 +50,7 @@ void test_vlsseg7e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_u64m1_tu( @@ -73,7 +73,7 @@ void test_vlsseg7e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_f64m1_tum( @@ -96,7 +96,7 @@ void test_vlsseg7e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_i64m1_tum( @@ -119,7 +119,7 @@ void test_vlsseg7e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_u64m1_tum( @@ -142,7 +142,7 @@ void test_vlsseg7e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_f64m1_tumu( @@ -165,7 +165,7 @@ void test_vlsseg7e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_i64m1_tumu( @@ -188,7 +188,7 @@ void test_vlsseg7e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_u64m1_tumu( @@ -211,7 +211,7 @@ void test_vlsseg7e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_f64m1_mu( @@ -234,7 +234,7 @@ void test_vlsseg7e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_i64m1_mu( @@ -257,7 +257,7 @@ void test_vlsseg7e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e64_v_u64m1_mu( @@ -280,6 +280,6 @@ void test_vlsseg7e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e8.c index 8169a3a38ae40f17e3e470f1b6fd374dea216a07..50ce948862b0d6e40149bae3847a619df6548420 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg7e8.c @@ -26,7 +26,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf4_tu( @@ -49,7 +49,7 @@ void test_vlsseg7e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf2_tu( @@ -72,7 +72,7 @@ void test_vlsseg7e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8m1_tu( @@ -95,7 +95,7 @@ void test_vlsseg7e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf8_tu( @@ -118,7 +118,7 @@ void test_vlsseg7e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf4_tu( @@ -141,7 +141,7 @@ void test_vlsseg7e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf2_tu( @@ -164,7 +164,7 @@ void test_vlsseg7e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8m1_tu( @@ -187,7 +187,7 @@ void test_vlsseg7e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf8_tum( @@ -210,7 +210,7 @@ void test_vlsseg7e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf4_tum( @@ -233,7 +233,7 @@ void test_vlsseg7e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf2_tum( @@ -256,7 +256,7 @@ void test_vlsseg7e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8m1_tum( @@ -279,7 +279,7 @@ void test_vlsseg7e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf8_tum( @@ -302,7 +302,7 @@ void test_vlsseg7e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf4_tum( @@ -325,7 +325,7 @@ void test_vlsseg7e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf2_tum( @@ -348,7 +348,7 @@ void test_vlsseg7e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8m1_tum( @@ -371,7 +371,7 @@ void test_vlsseg7e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf8_tumu( @@ -394,7 +394,7 @@ void test_vlsseg7e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf4_tumu( @@ -417,7 +417,7 @@ void test_vlsseg7e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf2_tumu( @@ -440,7 +440,7 @@ void test_vlsseg7e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8m1_tumu( @@ -463,7 +463,7 @@ void test_vlsseg7e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf8_tumu( @@ -486,7 +486,7 @@ void test_vlsseg7e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf4_tumu( @@ -509,7 +509,7 @@ void test_vlsseg7e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf2_tumu( @@ -532,7 +532,7 @@ void test_vlsseg7e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8m1_tumu( @@ -555,7 +555,7 @@ void test_vlsseg7e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf8_mu( @@ -578,7 +578,7 @@ void test_vlsseg7e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf4_mu( @@ -601,7 +601,7 @@ void test_vlsseg7e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8mf2_mu( @@ -624,7 +624,7 @@ void test_vlsseg7e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_i8m1_mu( @@ -647,7 +647,7 @@ void test_vlsseg7e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf8_mu( @@ -670,7 +670,7 @@ void test_vlsseg7e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf4_mu( @@ -693,7 +693,7 @@ void test_vlsseg7e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8mf2_mu( @@ -716,7 +716,7 @@ void test_vlsseg7e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg7e8_v_u8m1_mu( @@ -739,6 +739,6 @@ void test_vlsseg7e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg7e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg7e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); + return __riscv_vlsseg7e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e16.c index e9cd79ca88e9b37fc2261234fd847146ac78ec85..3c4113f61adb6f380ffab769edcd0fd95e50c55c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e16.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vlsseg8e16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vlsseg8e16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf4_tu( @@ -104,7 +104,7 @@ void test_vlsseg8e16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf2_tu( @@ -129,7 +129,7 @@ void test_vlsseg8e16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16m1_tu( @@ -154,7 +154,7 @@ void test_vlsseg8e16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf4_tu( @@ -179,7 +179,7 @@ void test_vlsseg8e16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf2_tu( @@ -204,7 +204,7 @@ void test_vlsseg8e16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16m1_tu( @@ -229,7 +229,7 @@ void test_vlsseg8e16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf4_tum( @@ -254,7 +254,7 @@ void test_vlsseg8e16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf2_tum( @@ -279,7 +279,7 @@ void test_vlsseg8e16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16m1_tum( @@ -304,7 +304,7 @@ void test_vlsseg8e16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf4_tum( @@ -329,7 +329,7 @@ void test_vlsseg8e16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf2_tum( @@ -354,7 +354,7 @@ void test_vlsseg8e16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16m1_tum( @@ -379,7 +379,7 @@ void test_vlsseg8e16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf4_tum( @@ -404,7 +404,7 @@ void test_vlsseg8e16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf2_tum( @@ -429,7 +429,7 @@ void test_vlsseg8e16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16m1_tum( @@ -454,7 +454,7 @@ void test_vlsseg8e16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf4_tumu( @@ -479,7 +479,7 @@ void test_vlsseg8e16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf2_tumu( @@ -504,7 +504,7 @@ void test_vlsseg8e16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16m1_tumu( @@ -529,7 +529,7 @@ void test_vlsseg8e16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf4_tumu( @@ -554,7 +554,7 @@ void test_vlsseg8e16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf2_tumu( @@ -579,7 +579,7 @@ void test_vlsseg8e16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16m1_tumu( @@ -604,7 +604,7 @@ void test_vlsseg8e16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf4_tumu( @@ -629,7 +629,7 @@ void test_vlsseg8e16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf2_tumu( @@ -654,7 +654,7 @@ void test_vlsseg8e16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16m1_tumu( @@ -679,7 +679,7 @@ void test_vlsseg8e16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf4_mu( @@ -704,7 +704,7 @@ void test_vlsseg8e16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16mf2_mu( @@ -729,7 +729,7 @@ void test_vlsseg8e16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_f16m1_mu( @@ -754,7 +754,7 @@ void test_vlsseg8e16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf4_mu( @@ -779,7 +779,7 @@ void test_vlsseg8e16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16mf2_mu( @@ -804,7 +804,7 @@ void test_vlsseg8e16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_i16m1_mu( @@ -829,7 +829,7 @@ void test_vlsseg8e16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf4_mu( @@ -854,7 +854,7 @@ void test_vlsseg8e16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16mf2_mu( @@ -879,7 +879,7 @@ void test_vlsseg8e16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e16_v_u16m1_mu( @@ -904,6 +904,6 @@ void test_vlsseg8e16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e32.c index 68f4666701b88c41423a57206948dc649b1e0b20..4c51e67452395f8c61cb272e663795aac34399ad 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e32.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32m1_tu( @@ -54,7 +54,7 @@ void test_vlsseg8e32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32mf2_tu( @@ -79,7 +79,7 @@ void test_vlsseg8e32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32m1_tu( @@ -104,7 +104,7 @@ void test_vlsseg8e32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32mf2_tu( @@ -129,7 +129,7 @@ void test_vlsseg8e32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32m1_tu( @@ -154,7 +154,7 @@ void test_vlsseg8e32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32mf2_tum( @@ -179,7 +179,7 @@ void test_vlsseg8e32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32m1_tum( @@ -204,7 +204,7 @@ void test_vlsseg8e32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32mf2_tum( @@ -229,7 +229,7 @@ void test_vlsseg8e32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32m1_tum( @@ -254,7 +254,7 @@ void test_vlsseg8e32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32mf2_tum( @@ -279,7 +279,7 @@ void test_vlsseg8e32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32m1_tum( @@ -304,7 +304,7 @@ void test_vlsseg8e32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32mf2_tumu( @@ -329,7 +329,7 @@ void test_vlsseg8e32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32m1_tumu( @@ -354,7 +354,7 @@ void test_vlsseg8e32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32mf2_tumu( @@ -379,7 +379,7 @@ void test_vlsseg8e32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32m1_tumu( @@ -404,7 +404,7 @@ void test_vlsseg8e32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32mf2_tumu( @@ -429,7 +429,7 @@ void test_vlsseg8e32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32m1_tumu( @@ -454,7 +454,7 @@ void test_vlsseg8e32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32mf2_mu( @@ -479,7 +479,7 @@ void test_vlsseg8e32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_f32m1_mu( @@ -504,7 +504,7 @@ void test_vlsseg8e32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32mf2_mu( @@ -529,7 +529,7 @@ void test_vlsseg8e32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_i32m1_mu( @@ -554,7 +554,7 @@ void test_vlsseg8e32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32mf2_mu( @@ -579,7 +579,7 @@ void test_vlsseg8e32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e32_v_u32m1_mu( @@ -604,6 +604,6 @@ void test_vlsseg8e32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e64.c index f7209d0f8279e59036b1ea256e94f2fbf3cfcff5..bb1e20604fe358c1b0069569f99f192766a1dcbb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e64.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_i64m1_tu( @@ -54,7 +54,7 @@ void test_vlsseg8e64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_u64m1_tu( @@ -79,7 +79,7 @@ void test_vlsseg8e64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_f64m1_tum( @@ -104,7 +104,7 @@ void test_vlsseg8e64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_i64m1_tum( @@ -129,7 +129,7 @@ void test_vlsseg8e64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_u64m1_tum( @@ -154,7 +154,7 @@ void test_vlsseg8e64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_f64m1_tumu( @@ -179,7 +179,7 @@ void test_vlsseg8e64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_i64m1_tumu( @@ -204,7 +204,7 @@ void test_vlsseg8e64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_u64m1_tumu( @@ -229,7 +229,7 @@ void test_vlsseg8e64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_f64m1_mu( @@ -254,7 +254,7 @@ void test_vlsseg8e64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_i64m1_mu( @@ -279,7 +279,7 @@ void test_vlsseg8e64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e64_v_u64m1_mu( @@ -304,6 +304,6 @@ void test_vlsseg8e64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e8.c index 86791574112d389f95dc0dd0d8d36507425dbaec..e96852247165ed6767722accf295a77ace0c601a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlsseg8e8.c @@ -28,7 +28,7 @@ // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf4_tu( @@ -53,7 +53,7 @@ void test_vlsseg8e8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf2_tu( @@ -78,7 +78,7 @@ void test_vlsseg8e8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8m1_tu( @@ -103,7 +103,7 @@ void test_vlsseg8e8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf8_tu( @@ -128,7 +128,7 @@ void test_vlsseg8e8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf4_tu( @@ -153,7 +153,7 @@ void test_vlsseg8e8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf2_tu( @@ -178,7 +178,7 @@ void test_vlsseg8e8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8m1_tu( @@ -203,7 +203,7 @@ void test_vlsseg8e8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf8_tum( @@ -228,7 +228,7 @@ void test_vlsseg8e8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vu // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf4_tum( @@ -253,7 +253,7 @@ void test_vlsseg8e8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf2_tum( @@ -278,7 +278,7 @@ void test_vlsseg8e8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8m1_tum( @@ -303,7 +303,7 @@ void test_vlsseg8e8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf8_tum( @@ -328,7 +328,7 @@ void test_vlsseg8e8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf4_tum( @@ -353,7 +353,7 @@ void test_vlsseg8e8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf2_tum( @@ -378,7 +378,7 @@ void test_vlsseg8e8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8m1_tum( @@ -403,7 +403,7 @@ void test_vlsseg8e8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf8_tumu( @@ -428,7 +428,7 @@ void test_vlsseg8e8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf4_tumu( @@ -453,7 +453,7 @@ void test_vlsseg8e8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf2_tumu( @@ -478,7 +478,7 @@ void test_vlsseg8e8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8m1_tumu( @@ -503,7 +503,7 @@ void test_vlsseg8e8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf8_tumu( @@ -528,7 +528,7 @@ void test_vlsseg8e8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf4_tumu( @@ -553,7 +553,7 @@ void test_vlsseg8e8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf2_tumu( @@ -578,7 +578,7 @@ void test_vlsseg8e8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8m1_tumu( @@ -603,7 +603,7 @@ void test_vlsseg8e8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf8_mu( @@ -628,7 +628,7 @@ void test_vlsseg8e8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf4_mu( @@ -653,7 +653,7 @@ void test_vlsseg8e8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8mf2_mu( @@ -678,7 +678,7 @@ void test_vlsseg8e8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_i8m1_mu( @@ -703,7 +703,7 @@ void test_vlsseg8e8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf8_mu( @@ -728,7 +728,7 @@ void test_vlsseg8e8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf4_mu( @@ -753,7 +753,7 @@ void test_vlsseg8e8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8mf2_mu( @@ -778,7 +778,7 @@ void test_vlsseg8e8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } // CHECK-RV64-LABEL: @test_vlsseg8e8_v_u8m1_mu( @@ -803,6 +803,6 @@ void test_vlsseg8e8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vlsseg8e8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, ptrdiff_t bstride, size_t vl) { - return vlsseg8e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); + return __riscv_vlsseg8e8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bstride, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei16.c index 1f66e9c4306e0df7f6d8c958be064cc988db1d89..c11cebdb72684ea2f33cdde94e14cab76f4b5bc8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei16_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vluxei16_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei16_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vluxei16_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei16_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vluxei16_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei16_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vluxei16_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei16_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vluxei16_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei16_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_f16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vluxei16_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei16_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vluxei16_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei16_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vluxei16_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei16_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vluxei16_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei16_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vluxei16_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei16_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vluxei16_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei16_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vluxei16_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei16_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vluxei16_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei16_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vluxei16_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei16_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf8_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vluxei16_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei16_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf4_tu( @@ -157,7 +157,7 @@ vint8mf8_t test_vluxei16_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei16_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf2_tu( @@ -166,7 +166,7 @@ vint8mf4_t test_vluxei16_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei16_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m1_tu( @@ -175,7 +175,7 @@ vint8mf2_t test_vluxei16_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei16_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m2_tu( @@ -184,7 +184,7 @@ vint8m1_t test_vluxei16_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei16_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m4_tu( @@ -193,7 +193,7 @@ vint8m2_t test_vluxei16_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei16_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i8m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf4_tu( @@ -202,7 +202,7 @@ vint8m4_t test_vluxei16_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei16_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf2_tu( @@ -211,7 +211,7 @@ vint16mf4_t test_vluxei16_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei16_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m1_tu( @@ -220,7 +220,7 @@ vint16mf2_t test_vluxei16_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei16_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m2_tu( @@ -229,7 +229,7 @@ vint16m1_t test_vluxei16_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei16_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m4_tu( @@ -238,7 +238,7 @@ vint16m2_t test_vluxei16_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei16_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m8_tu( @@ -247,7 +247,7 @@ vint16m4_t test_vluxei16_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei16_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32mf2_tu( @@ -256,7 +256,7 @@ vint16m8_t test_vluxei16_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei16_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vluxei16_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei16_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m2_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vluxei16_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei16_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m4_tu( @@ -283,7 +283,7 @@ vint32m2_t test_vluxei16_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei16_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m8_tu( @@ -292,7 +292,7 @@ vint32m4_t test_vluxei16_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei16_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m1_tu( @@ -301,7 +301,7 @@ vint32m8_t test_vluxei16_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei16_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m2_tu( @@ -310,7 +310,7 @@ vint64m1_t test_vluxei16_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei16_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m4_tu( @@ -319,7 +319,7 @@ vint64m2_t test_vluxei16_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei16_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m8_tu( @@ -328,7 +328,7 @@ vint64m4_t test_vluxei16_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei16_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf8_tu( @@ -337,7 +337,7 @@ vint64m8_t test_vluxei16_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei16_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf4_tu( @@ -346,7 +346,7 @@ vuint8mf8_t test_vluxei16_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei16_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf2_tu( @@ -355,7 +355,7 @@ vuint8mf4_t test_vluxei16_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei16_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m1_tu( @@ -364,7 +364,7 @@ vuint8mf2_t test_vluxei16_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei16_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m2_tu( @@ -373,7 +373,7 @@ vuint8m1_t test_vluxei16_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei16_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m4_tu( @@ -382,7 +382,7 @@ vuint8m2_t test_vluxei16_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei16_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u8m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf4_tu( @@ -391,7 +391,7 @@ vuint8m4_t test_vluxei16_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei16_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf2_tu( @@ -400,7 +400,7 @@ vuint16mf4_t test_vluxei16_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei16_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m1_tu( @@ -409,7 +409,7 @@ vuint16mf2_t test_vluxei16_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei16_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m2_tu( @@ -418,7 +418,7 @@ vuint16m1_t test_vluxei16_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei16_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m4_tu( @@ -427,7 +427,7 @@ vuint16m2_t test_vluxei16_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei16_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m8_tu( @@ -436,7 +436,7 @@ vuint16m4_t test_vluxei16_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei16_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32mf2_tu( @@ -445,7 +445,7 @@ vuint16m8_t test_vluxei16_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei16_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m1_tu( @@ -454,7 +454,7 @@ vuint32mf2_t test_vluxei16_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei16_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m2_tu( @@ -463,7 +463,7 @@ vuint32m1_t test_vluxei16_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei16_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m4_tu( @@ -472,7 +472,7 @@ vuint32m2_t test_vluxei16_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei16_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m8_tu( @@ -481,7 +481,7 @@ vuint32m4_t test_vluxei16_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei16_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m1_tu( @@ -490,7 +490,7 @@ vuint32m8_t test_vluxei16_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei16_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m2_tu( @@ -499,7 +499,7 @@ vuint64m1_t test_vluxei16_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei16_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m4_tu( @@ -508,7 +508,7 @@ vuint64m2_t test_vluxei16_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei16_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m8_tu( @@ -517,7 +517,7 @@ vuint64m4_t test_vluxei16_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei16_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf4_tum( @@ -526,7 +526,7 @@ vuint64m8_t test_vluxei16_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei16_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf2_tum( @@ -535,7 +535,7 @@ vfloat16mf4_t test_vluxei16_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei16_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m1_tum( @@ -544,7 +544,7 @@ vfloat16mf2_t test_vluxei16_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei16_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m2_tum( @@ -553,7 +553,7 @@ vfloat16m1_t test_vluxei16_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei16_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m4_tum( @@ -562,7 +562,7 @@ vfloat16m2_t test_vluxei16_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei16_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m8_tum( @@ -571,7 +571,7 @@ vfloat16m4_t test_vluxei16_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei16_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_f16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32mf2_tum( @@ -580,7 +580,7 @@ vfloat16m8_t test_vluxei16_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei16_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m1_tum( @@ -589,7 +589,7 @@ vfloat32mf2_t test_vluxei16_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei16_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m2_tum( @@ -598,7 +598,7 @@ vfloat32m1_t test_vluxei16_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei16_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m4_tum( @@ -607,7 +607,7 @@ vfloat32m2_t test_vluxei16_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei16_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m8_tum( @@ -616,7 +616,7 @@ vfloat32m4_t test_vluxei16_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei16_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m1_tum( @@ -625,7 +625,7 @@ vfloat32m8_t test_vluxei16_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei16_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m2_tum( @@ -634,7 +634,7 @@ vfloat64m1_t test_vluxei16_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei16_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m4_tum( @@ -643,7 +643,7 @@ vfloat64m2_t test_vluxei16_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei16_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m8_tum( @@ -652,7 +652,7 @@ vfloat64m4_t test_vluxei16_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei16_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf8_tum( @@ -661,7 +661,7 @@ vfloat64m8_t test_vluxei16_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei16_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf4_tum( @@ -670,7 +670,7 @@ vint8mf8_t test_vluxei16_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei16_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf2_tum( @@ -679,7 +679,7 @@ vint8mf4_t test_vluxei16_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei16_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m1_tum( @@ -688,7 +688,7 @@ vint8mf2_t test_vluxei16_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei16_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m2_tum( @@ -697,7 +697,7 @@ vint8m1_t test_vluxei16_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei16_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m4_tum( @@ -706,7 +706,7 @@ vint8m2_t test_vluxei16_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei16_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i8m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf4_tum( @@ -715,7 +715,7 @@ vint8m4_t test_vluxei16_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei16_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf2_tum( @@ -724,7 +724,7 @@ vint16mf4_t test_vluxei16_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei16_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m1_tum( @@ -733,7 +733,7 @@ vint16mf2_t test_vluxei16_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei16_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m2_tum( @@ -742,7 +742,7 @@ vint16m1_t test_vluxei16_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei16_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m4_tum( @@ -751,7 +751,7 @@ vint16m2_t test_vluxei16_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei16_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m8_tum( @@ -760,7 +760,7 @@ vint16m4_t test_vluxei16_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei16_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32mf2_tum( @@ -769,7 +769,7 @@ vint16m8_t test_vluxei16_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei16_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m1_tum( @@ -778,7 +778,7 @@ vint32mf2_t test_vluxei16_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei16_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m2_tum( @@ -787,7 +787,7 @@ vint32m1_t test_vluxei16_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei16_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m4_tum( @@ -796,7 +796,7 @@ vint32m2_t test_vluxei16_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei16_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m8_tum( @@ -805,7 +805,7 @@ vint32m4_t test_vluxei16_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei16_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m1_tum( @@ -814,7 +814,7 @@ vint32m8_t test_vluxei16_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei16_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m2_tum( @@ -823,7 +823,7 @@ vint64m1_t test_vluxei16_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei16_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m4_tum( @@ -832,7 +832,7 @@ vint64m2_t test_vluxei16_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei16_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m8_tum( @@ -841,7 +841,7 @@ vint64m4_t test_vluxei16_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei16_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf8_tum( @@ -850,7 +850,7 @@ vint64m8_t test_vluxei16_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei16_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf4_tum( @@ -859,7 +859,7 @@ vuint8mf8_t test_vluxei16_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei16_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf2_tum( @@ -868,7 +868,7 @@ vuint8mf4_t test_vluxei16_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei16_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m1_tum( @@ -877,7 +877,7 @@ vuint8mf2_t test_vluxei16_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei16_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m2_tum( @@ -886,7 +886,7 @@ vuint8m1_t test_vluxei16_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei16_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m4_tum( @@ -895,7 +895,7 @@ vuint8m2_t test_vluxei16_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei16_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u8m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf4_tum( @@ -904,7 +904,7 @@ vuint8m4_t test_vluxei16_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei16_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf2_tum( @@ -913,7 +913,7 @@ vuint16mf4_t test_vluxei16_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei16_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m1_tum( @@ -922,7 +922,7 @@ vuint16mf2_t test_vluxei16_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei16_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m2_tum( @@ -931,7 +931,7 @@ vuint16m1_t test_vluxei16_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei16_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m4_tum( @@ -940,7 +940,7 @@ vuint16m2_t test_vluxei16_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei16_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m8_tum( @@ -949,7 +949,7 @@ vuint16m4_t test_vluxei16_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei16_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32mf2_tum( @@ -958,7 +958,7 @@ vuint16m8_t test_vluxei16_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei16_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m1_tum( @@ -967,7 +967,7 @@ vuint32mf2_t test_vluxei16_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei16_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m2_tum( @@ -976,7 +976,7 @@ vuint32m1_t test_vluxei16_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei16_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m4_tum( @@ -985,7 +985,7 @@ vuint32m2_t test_vluxei16_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei16_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m8_tum( @@ -994,7 +994,7 @@ vuint32m4_t test_vluxei16_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei16_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m1_tum( @@ -1003,7 +1003,7 @@ vuint32m8_t test_vluxei16_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei16_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m2_tum( @@ -1012,7 +1012,7 @@ vuint64m1_t test_vluxei16_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei16_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m4_tum( @@ -1021,7 +1021,7 @@ vuint64m2_t test_vluxei16_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei16_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m8_tum( @@ -1030,7 +1030,7 @@ vuint64m4_t test_vluxei16_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei16_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf4_tumu( @@ -1039,7 +1039,7 @@ vuint64m8_t test_vluxei16_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei16_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf2_tumu( @@ -1048,7 +1048,7 @@ vfloat16mf4_t test_vluxei16_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei16_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m1_tumu( @@ -1057,7 +1057,7 @@ vfloat16mf2_t test_vluxei16_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei16_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m2_tumu( @@ -1066,7 +1066,7 @@ vfloat16m1_t test_vluxei16_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei16_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m4_tumu( @@ -1075,7 +1075,7 @@ vfloat16m2_t test_vluxei16_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei16_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m8_tumu( @@ -1084,7 +1084,7 @@ vfloat16m4_t test_vluxei16_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei16_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_f16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32mf2_tumu( @@ -1093,7 +1093,7 @@ vfloat16m8_t test_vluxei16_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei16_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m1_tumu( @@ -1102,7 +1102,7 @@ vfloat32mf2_t test_vluxei16_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei16_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m2_tumu( @@ -1111,7 +1111,7 @@ vfloat32m1_t test_vluxei16_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei16_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m4_tumu( @@ -1120,7 +1120,7 @@ vfloat32m2_t test_vluxei16_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei16_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m8_tumu( @@ -1129,7 +1129,7 @@ vfloat32m4_t test_vluxei16_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei16_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m1_tumu( @@ -1138,7 +1138,7 @@ vfloat32m8_t test_vluxei16_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei16_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m2_tumu( @@ -1147,7 +1147,7 @@ vfloat64m1_t test_vluxei16_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei16_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m4_tumu( @@ -1156,7 +1156,7 @@ vfloat64m2_t test_vluxei16_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei16_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m8_tumu( @@ -1165,7 +1165,7 @@ vfloat64m4_t test_vluxei16_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei16_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf8_tumu( @@ -1174,7 +1174,7 @@ vfloat64m8_t test_vluxei16_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei16_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf4_tumu( @@ -1183,7 +1183,7 @@ vint8mf8_t test_vluxei16_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei16_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf2_tumu( @@ -1192,7 +1192,7 @@ vint8mf4_t test_vluxei16_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei16_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m1_tumu( @@ -1201,7 +1201,7 @@ vint8mf2_t test_vluxei16_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei16_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m2_tumu( @@ -1210,7 +1210,7 @@ vint8m1_t test_vluxei16_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei16_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m4_tumu( @@ -1219,7 +1219,7 @@ vint8m2_t test_vluxei16_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei16_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i8m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf4_tumu( @@ -1228,7 +1228,7 @@ vint8m4_t test_vluxei16_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei16_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf2_tumu( @@ -1237,7 +1237,7 @@ vint16mf4_t test_vluxei16_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei16_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m1_tumu( @@ -1246,7 +1246,7 @@ vint16mf2_t test_vluxei16_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei16_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m2_tumu( @@ -1255,7 +1255,7 @@ vint16m1_t test_vluxei16_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei16_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m4_tumu( @@ -1264,7 +1264,7 @@ vint16m2_t test_vluxei16_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei16_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m8_tumu( @@ -1273,7 +1273,7 @@ vint16m4_t test_vluxei16_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei16_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32mf2_tumu( @@ -1282,7 +1282,7 @@ vint16m8_t test_vluxei16_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei16_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m1_tumu( @@ -1291,7 +1291,7 @@ vint32mf2_t test_vluxei16_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei16_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m2_tumu( @@ -1300,7 +1300,7 @@ vint32m1_t test_vluxei16_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei16_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m4_tumu( @@ -1309,7 +1309,7 @@ vint32m2_t test_vluxei16_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei16_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m8_tumu( @@ -1318,7 +1318,7 @@ vint32m4_t test_vluxei16_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei16_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m1_tumu( @@ -1327,7 +1327,7 @@ vint32m8_t test_vluxei16_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei16_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m2_tumu( @@ -1336,7 +1336,7 @@ vint64m1_t test_vluxei16_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei16_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m4_tumu( @@ -1345,7 +1345,7 @@ vint64m2_t test_vluxei16_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei16_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m8_tumu( @@ -1354,7 +1354,7 @@ vint64m4_t test_vluxei16_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei16_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf8_tumu( @@ -1363,7 +1363,7 @@ vint64m8_t test_vluxei16_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei16_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf4_tumu( @@ -1372,7 +1372,7 @@ vuint8mf8_t test_vluxei16_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei16_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf2_tumu( @@ -1381,7 +1381,7 @@ vuint8mf4_t test_vluxei16_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei16_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m1_tumu( @@ -1390,7 +1390,7 @@ vuint8mf2_t test_vluxei16_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei16_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m2_tumu( @@ -1399,7 +1399,7 @@ vuint8m1_t test_vluxei16_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei16_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m4_tumu( @@ -1408,7 +1408,7 @@ vuint8m2_t test_vluxei16_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei16_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u8m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf4_tumu( @@ -1417,7 +1417,7 @@ vuint8m4_t test_vluxei16_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei16_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf2_tumu( @@ -1426,7 +1426,7 @@ vuint16mf4_t test_vluxei16_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei16_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m1_tumu( @@ -1435,7 +1435,7 @@ vuint16mf2_t test_vluxei16_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei16_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m2_tumu( @@ -1444,7 +1444,7 @@ vuint16m1_t test_vluxei16_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei16_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m4_tumu( @@ -1453,7 +1453,7 @@ vuint16m2_t test_vluxei16_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei16_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m8_tumu( @@ -1462,7 +1462,7 @@ vuint16m4_t test_vluxei16_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei16_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32mf2_tumu( @@ -1471,7 +1471,7 @@ vuint16m8_t test_vluxei16_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei16_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m1_tumu( @@ -1480,7 +1480,7 @@ vuint32mf2_t test_vluxei16_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei16_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m2_tumu( @@ -1489,7 +1489,7 @@ vuint32m1_t test_vluxei16_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei16_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m4_tumu( @@ -1498,7 +1498,7 @@ vuint32m2_t test_vluxei16_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei16_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m8_tumu( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vluxei16_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei16_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m1_tumu( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vluxei16_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei16_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m2_tumu( @@ -1525,7 +1525,7 @@ vuint64m1_t test_vluxei16_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei16_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m4_tumu( @@ -1534,7 +1534,7 @@ vuint64m2_t test_vluxei16_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei16_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m8_tumu( @@ -1543,7 +1543,7 @@ vuint64m4_t test_vluxei16_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei16_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf4_mu( @@ -1552,7 +1552,7 @@ vuint64m8_t test_vluxei16_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei16_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16mf2_mu( @@ -1561,7 +1561,7 @@ vfloat16mf4_t test_vluxei16_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei16_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m1_mu( @@ -1570,7 +1570,7 @@ vfloat16mf2_t test_vluxei16_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei16_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m2_mu( @@ -1579,7 +1579,7 @@ vfloat16m1_t test_vluxei16_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei16_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m4_mu( @@ -1588,7 +1588,7 @@ vfloat16m2_t test_vluxei16_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei16_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f16m8_mu( @@ -1597,7 +1597,7 @@ vfloat16m4_t test_vluxei16_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei16_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_f16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32mf2_mu( @@ -1606,7 +1606,7 @@ vfloat16m8_t test_vluxei16_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei16_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m1_mu( @@ -1615,7 +1615,7 @@ vfloat32mf2_t test_vluxei16_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei16_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m2_mu( @@ -1624,7 +1624,7 @@ vfloat32m1_t test_vluxei16_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei16_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m4_mu( @@ -1633,7 +1633,7 @@ vfloat32m2_t test_vluxei16_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei16_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f32m8_mu( @@ -1642,7 +1642,7 @@ vfloat32m4_t test_vluxei16_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei16_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_f32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m1_mu( @@ -1651,7 +1651,7 @@ vfloat32m8_t test_vluxei16_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei16_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_f64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m2_mu( @@ -1660,7 +1660,7 @@ vfloat64m1_t test_vluxei16_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei16_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_f64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m4_mu( @@ -1669,7 +1669,7 @@ vfloat64m2_t test_vluxei16_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei16_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_f64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_f64m8_mu( @@ -1678,7 +1678,7 @@ vfloat64m4_t test_vluxei16_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei16_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_f64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_f64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf8_mu( @@ -1687,7 +1687,7 @@ vfloat64m8_t test_vluxei16_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei16_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf4_mu( @@ -1696,7 +1696,7 @@ vint8mf8_t test_vluxei16_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei16_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8mf2_mu( @@ -1705,7 +1705,7 @@ vint8mf4_t test_vluxei16_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei16_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m1_mu( @@ -1714,7 +1714,7 @@ vint8mf2_t test_vluxei16_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei16_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m2_mu( @@ -1723,7 +1723,7 @@ vint8m1_t test_vluxei16_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei16_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i8m4_mu( @@ -1732,7 +1732,7 @@ vint8m2_t test_vluxei16_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei16_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i8m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i8m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf4_mu( @@ -1741,7 +1741,7 @@ vint8m4_t test_vluxei16_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei16_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16mf2_mu( @@ -1750,7 +1750,7 @@ vint16mf4_t test_vluxei16_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei16_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m1_mu( @@ -1759,7 +1759,7 @@ vint16mf2_t test_vluxei16_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei16_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m2_mu( @@ -1768,7 +1768,7 @@ vint16m1_t test_vluxei16_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei16_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m4_mu( @@ -1777,7 +1777,7 @@ vint16m2_t test_vluxei16_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei16_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i16m8_mu( @@ -1786,7 +1786,7 @@ vint16m4_t test_vluxei16_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei16_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_i16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32mf2_mu( @@ -1795,7 +1795,7 @@ vint16m8_t test_vluxei16_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei16_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m1_mu( @@ -1804,7 +1804,7 @@ vint32mf2_t test_vluxei16_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei16_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m2_mu( @@ -1813,7 +1813,7 @@ vint32m1_t test_vluxei16_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei16_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m4_mu( @@ -1822,7 +1822,7 @@ vint32m2_t test_vluxei16_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei16_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i32m8_mu( @@ -1831,7 +1831,7 @@ vint32m4_t test_vluxei16_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei16_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_i32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m1_mu( @@ -1840,7 +1840,7 @@ vint32m8_t test_vluxei16_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei16_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_i64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m2_mu( @@ -1849,7 +1849,7 @@ vint64m1_t test_vluxei16_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei16_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_i64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m4_mu( @@ -1858,7 +1858,7 @@ vint64m2_t test_vluxei16_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei16_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_i64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_i64m8_mu( @@ -1867,7 +1867,7 @@ vint64m4_t test_vluxei16_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei16_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_i64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_i64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf8_mu( @@ -1876,7 +1876,7 @@ vint64m8_t test_vluxei16_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei16_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf4_mu( @@ -1885,7 +1885,7 @@ vuint8mf8_t test_vluxei16_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei16_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8mf2_mu( @@ -1894,7 +1894,7 @@ vuint8mf4_t test_vluxei16_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei16_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m1_mu( @@ -1903,7 +1903,7 @@ vuint8mf2_t test_vluxei16_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei16_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m2_mu( @@ -1912,7 +1912,7 @@ vuint8m1_t test_vluxei16_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei16_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u8m4_mu( @@ -1921,7 +1921,7 @@ vuint8m2_t test_vluxei16_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei16_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u8m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u8m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf4_mu( @@ -1930,7 +1930,7 @@ vuint8m4_t test_vluxei16_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei16_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16mf2_mu( @@ -1939,7 +1939,7 @@ vuint16mf4_t test_vluxei16_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei16_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m1_mu( @@ -1948,7 +1948,7 @@ vuint16mf2_t test_vluxei16_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei16_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m2_mu( @@ -1957,7 +1957,7 @@ vuint16m1_t test_vluxei16_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei16_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m4_mu( @@ -1966,7 +1966,7 @@ vuint16m2_t test_vluxei16_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei16_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u16m8_mu( @@ -1975,7 +1975,7 @@ vuint16m4_t test_vluxei16_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei16_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint16m8_t bindex, size_t vl) { - return vluxei16_v_u16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32mf2_mu( @@ -1984,7 +1984,7 @@ vuint16m8_t test_vluxei16_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei16_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m1_mu( @@ -1993,7 +1993,7 @@ vuint32mf2_t test_vluxei16_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei16_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m2_mu( @@ -2002,7 +2002,7 @@ vuint32m1_t test_vluxei16_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei16_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m4_mu( @@ -2011,7 +2011,7 @@ vuint32m2_t test_vluxei16_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei16_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u32m8_mu( @@ -2020,7 +2020,7 @@ vuint32m4_t test_vluxei16_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei16_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint16m4_t bindex, size_t vl) { - return vluxei16_v_u32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m1_mu( @@ -2029,7 +2029,7 @@ vuint32m8_t test_vluxei16_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei16_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxei16_v_u64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m2_mu( @@ -2038,7 +2038,7 @@ vuint64m1_t test_vluxei16_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei16_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxei16_v_u64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m4_mu( @@ -2047,7 +2047,7 @@ vuint64m2_t test_vluxei16_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei16_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxei16_v_u64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei16_v_u64m8_mu( @@ -2056,6 +2056,6 @@ vuint64m4_t test_vluxei16_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei16_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint16m2_t bindex, size_t vl) { - return vluxei16_v_u64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei16_v_u64m8_mu(mask, maskedoff, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei32.c index 0b9d4a6fe290d2d096bc3e7e12339a967d0be259..4ad555ec58f43aaeae676ee63c2da0f5e080f0f9 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei32.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei32_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vluxei32_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei32_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vluxei32_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei32_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vluxei32_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei32_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vluxei32_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei32_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32mf2_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vluxei32_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei32_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m1_tu( @@ -67,7 +67,7 @@ vfloat32mf2_t test_vluxei32_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei32_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m2_tu( @@ -76,7 +76,7 @@ vfloat32m1_t test_vluxei32_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei32_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m4_tu( @@ -85,7 +85,7 @@ vfloat32m2_t test_vluxei32_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei32_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m8_tu( @@ -94,7 +94,7 @@ vfloat32m4_t test_vluxei32_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei32_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m1_tu( @@ -103,7 +103,7 @@ vfloat32m8_t test_vluxei32_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei32_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m2_tu( @@ -112,7 +112,7 @@ vfloat64m1_t test_vluxei32_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei32_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m4_tu( @@ -121,7 +121,7 @@ vfloat64m2_t test_vluxei32_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei32_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m8_tu( @@ -130,7 +130,7 @@ vfloat64m4_t test_vluxei32_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei32_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf8_tu( @@ -139,7 +139,7 @@ vfloat64m8_t test_vluxei32_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei32_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf4_tu( @@ -148,7 +148,7 @@ vint8mf8_t test_vluxei32_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei32_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf2_tu( @@ -157,7 +157,7 @@ vint8mf4_t test_vluxei32_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei32_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m1_tu( @@ -166,7 +166,7 @@ vint8mf2_t test_vluxei32_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei32_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m2_tu( @@ -175,7 +175,7 @@ vint8m1_t test_vluxei32_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei32_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf4_tu( @@ -184,7 +184,7 @@ vint8m2_t test_vluxei32_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei32_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf2_tu( @@ -193,7 +193,7 @@ vint16mf4_t test_vluxei32_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei32_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m1_tu( @@ -202,7 +202,7 @@ vint16mf2_t test_vluxei32_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei32_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m2_tu( @@ -211,7 +211,7 @@ vint16m1_t test_vluxei32_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei32_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m4_tu( @@ -220,7 +220,7 @@ vint16m2_t test_vluxei32_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei32_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32mf2_tu( @@ -229,7 +229,7 @@ vint16m4_t test_vluxei32_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei32_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m1_tu( @@ -238,7 +238,7 @@ vint32mf2_t test_vluxei32_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei32_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m2_tu( @@ -247,7 +247,7 @@ vint32m1_t test_vluxei32_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei32_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m4_tu( @@ -256,7 +256,7 @@ vint32m2_t test_vluxei32_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei32_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m8_tu( @@ -265,7 +265,7 @@ vint32m4_t test_vluxei32_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei32_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m1_tu( @@ -274,7 +274,7 @@ vint32m8_t test_vluxei32_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei32_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m2_tu( @@ -283,7 +283,7 @@ vint64m1_t test_vluxei32_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei32_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m4_tu( @@ -292,7 +292,7 @@ vint64m2_t test_vluxei32_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei32_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m8_tu( @@ -301,7 +301,7 @@ vint64m4_t test_vluxei32_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei32_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf8_tu( @@ -310,7 +310,7 @@ vint64m8_t test_vluxei32_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei32_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf4_tu( @@ -319,7 +319,7 @@ vuint8mf8_t test_vluxei32_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei32_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf2_tu( @@ -328,7 +328,7 @@ vuint8mf4_t test_vluxei32_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei32_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m1_tu( @@ -337,7 +337,7 @@ vuint8mf2_t test_vluxei32_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei32_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m2_tu( @@ -346,7 +346,7 @@ vuint8m1_t test_vluxei32_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei32_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf4_tu( @@ -355,7 +355,7 @@ vuint8m2_t test_vluxei32_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei32_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf2_tu( @@ -364,7 +364,7 @@ vuint16mf4_t test_vluxei32_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei32_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m1_tu( @@ -373,7 +373,7 @@ vuint16mf2_t test_vluxei32_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei32_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m2_tu( @@ -382,7 +382,7 @@ vuint16m1_t test_vluxei32_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei32_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m4_tu( @@ -391,7 +391,7 @@ vuint16m2_t test_vluxei32_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei32_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32mf2_tu( @@ -400,7 +400,7 @@ vuint16m4_t test_vluxei32_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei32_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m1_tu( @@ -409,7 +409,7 @@ vuint32mf2_t test_vluxei32_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei32_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m2_tu( @@ -418,7 +418,7 @@ vuint32m1_t test_vluxei32_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei32_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m4_tu( @@ -427,7 +427,7 @@ vuint32m2_t test_vluxei32_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei32_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m8_tu( @@ -436,7 +436,7 @@ vuint32m4_t test_vluxei32_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei32_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m1_tu( @@ -445,7 +445,7 @@ vuint32m8_t test_vluxei32_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei32_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m2_tu( @@ -454,7 +454,7 @@ vuint64m1_t test_vluxei32_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei32_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m4_tu( @@ -463,7 +463,7 @@ vuint64m2_t test_vluxei32_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei32_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m8_tu( @@ -472,7 +472,7 @@ vuint64m4_t test_vluxei32_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei32_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf4_tum( @@ -481,7 +481,7 @@ vuint64m8_t test_vluxei32_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei32_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf2_tum( @@ -490,7 +490,7 @@ vfloat16mf4_t test_vluxei32_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei32_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m1_tum( @@ -499,7 +499,7 @@ vfloat16mf2_t test_vluxei32_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei32_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m2_tum( @@ -508,7 +508,7 @@ vfloat16m1_t test_vluxei32_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei32_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m4_tum( @@ -517,7 +517,7 @@ vfloat16m2_t test_vluxei32_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei32_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32mf2_tum( @@ -526,7 +526,7 @@ vfloat16m4_t test_vluxei32_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei32_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m1_tum( @@ -535,7 +535,7 @@ vfloat32mf2_t test_vluxei32_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei32_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m2_tum( @@ -544,7 +544,7 @@ vfloat32m1_t test_vluxei32_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei32_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m4_tum( @@ -553,7 +553,7 @@ vfloat32m2_t test_vluxei32_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei32_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m8_tum( @@ -562,7 +562,7 @@ vfloat32m4_t test_vluxei32_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei32_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m1_tum( @@ -571,7 +571,7 @@ vfloat32m8_t test_vluxei32_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei32_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m2_tum( @@ -580,7 +580,7 @@ vfloat64m1_t test_vluxei32_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei32_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m4_tum( @@ -589,7 +589,7 @@ vfloat64m2_t test_vluxei32_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei32_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m8_tum( @@ -598,7 +598,7 @@ vfloat64m4_t test_vluxei32_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei32_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf8_tum( @@ -607,7 +607,7 @@ vfloat64m8_t test_vluxei32_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei32_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf4_tum( @@ -616,7 +616,7 @@ vint8mf8_t test_vluxei32_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei32_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf2_tum( @@ -625,7 +625,7 @@ vint8mf4_t test_vluxei32_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei32_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m1_tum( @@ -634,7 +634,7 @@ vint8mf2_t test_vluxei32_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei32_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m2_tum( @@ -643,7 +643,7 @@ vint8m1_t test_vluxei32_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei32_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf4_tum( @@ -652,7 +652,7 @@ vint8m2_t test_vluxei32_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei32_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf2_tum( @@ -661,7 +661,7 @@ vint16mf4_t test_vluxei32_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei32_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m1_tum( @@ -670,7 +670,7 @@ vint16mf2_t test_vluxei32_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei32_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m2_tum( @@ -679,7 +679,7 @@ vint16m1_t test_vluxei32_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei32_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m4_tum( @@ -688,7 +688,7 @@ vint16m2_t test_vluxei32_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei32_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32mf2_tum( @@ -697,7 +697,7 @@ vint16m4_t test_vluxei32_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei32_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m1_tum( @@ -706,7 +706,7 @@ vint32mf2_t test_vluxei32_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei32_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m2_tum( @@ -715,7 +715,7 @@ vint32m1_t test_vluxei32_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei32_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m4_tum( @@ -724,7 +724,7 @@ vint32m2_t test_vluxei32_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei32_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m8_tum( @@ -733,7 +733,7 @@ vint32m4_t test_vluxei32_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei32_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m1_tum( @@ -742,7 +742,7 @@ vint32m8_t test_vluxei32_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei32_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m2_tum( @@ -751,7 +751,7 @@ vint64m1_t test_vluxei32_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei32_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m4_tum( @@ -760,7 +760,7 @@ vint64m2_t test_vluxei32_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei32_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m8_tum( @@ -769,7 +769,7 @@ vint64m4_t test_vluxei32_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei32_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf8_tum( @@ -778,7 +778,7 @@ vint64m8_t test_vluxei32_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei32_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf4_tum( @@ -787,7 +787,7 @@ vuint8mf8_t test_vluxei32_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei32_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf2_tum( @@ -796,7 +796,7 @@ vuint8mf4_t test_vluxei32_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei32_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m1_tum( @@ -805,7 +805,7 @@ vuint8mf2_t test_vluxei32_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei32_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m2_tum( @@ -814,7 +814,7 @@ vuint8m1_t test_vluxei32_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei32_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf4_tum( @@ -823,7 +823,7 @@ vuint8m2_t test_vluxei32_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei32_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf2_tum( @@ -832,7 +832,7 @@ vuint16mf4_t test_vluxei32_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei32_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m1_tum( @@ -841,7 +841,7 @@ vuint16mf2_t test_vluxei32_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei32_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m2_tum( @@ -850,7 +850,7 @@ vuint16m1_t test_vluxei32_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei32_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m4_tum( @@ -859,7 +859,7 @@ vuint16m2_t test_vluxei32_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei32_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32mf2_tum( @@ -868,7 +868,7 @@ vuint16m4_t test_vluxei32_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei32_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m1_tum( @@ -877,7 +877,7 @@ vuint32mf2_t test_vluxei32_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei32_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m2_tum( @@ -886,7 +886,7 @@ vuint32m1_t test_vluxei32_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei32_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m4_tum( @@ -895,7 +895,7 @@ vuint32m2_t test_vluxei32_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei32_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m8_tum( @@ -904,7 +904,7 @@ vuint32m4_t test_vluxei32_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei32_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m1_tum( @@ -913,7 +913,7 @@ vuint32m8_t test_vluxei32_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei32_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m2_tum( @@ -922,7 +922,7 @@ vuint64m1_t test_vluxei32_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei32_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m4_tum( @@ -931,7 +931,7 @@ vuint64m2_t test_vluxei32_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei32_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m8_tum( @@ -940,7 +940,7 @@ vuint64m4_t test_vluxei32_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei32_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf4_tumu( @@ -949,7 +949,7 @@ vuint64m8_t test_vluxei32_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei32_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf2_tumu( @@ -958,7 +958,7 @@ vfloat16mf4_t test_vluxei32_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei32_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m1_tumu( @@ -967,7 +967,7 @@ vfloat16mf2_t test_vluxei32_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei32_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m2_tumu( @@ -976,7 +976,7 @@ vfloat16m1_t test_vluxei32_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei32_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m4_tumu( @@ -985,7 +985,7 @@ vfloat16m2_t test_vluxei32_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei32_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32mf2_tumu( @@ -994,7 +994,7 @@ vfloat16m4_t test_vluxei32_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei32_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m1_tumu( @@ -1003,7 +1003,7 @@ vfloat32mf2_t test_vluxei32_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei32_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m2_tumu( @@ -1012,7 +1012,7 @@ vfloat32m1_t test_vluxei32_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei32_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m4_tumu( @@ -1021,7 +1021,7 @@ vfloat32m2_t test_vluxei32_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei32_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m8_tumu( @@ -1030,7 +1030,7 @@ vfloat32m4_t test_vluxei32_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei32_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m1_tumu( @@ -1039,7 +1039,7 @@ vfloat32m8_t test_vluxei32_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei32_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m2_tumu( @@ -1048,7 +1048,7 @@ vfloat64m1_t test_vluxei32_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei32_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m4_tumu( @@ -1057,7 +1057,7 @@ vfloat64m2_t test_vluxei32_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei32_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m8_tumu( @@ -1066,7 +1066,7 @@ vfloat64m4_t test_vluxei32_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei32_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf8_tumu( @@ -1075,7 +1075,7 @@ vfloat64m8_t test_vluxei32_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei32_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf4_tumu( @@ -1084,7 +1084,7 @@ vint8mf8_t test_vluxei32_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei32_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf2_tumu( @@ -1093,7 +1093,7 @@ vint8mf4_t test_vluxei32_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei32_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m1_tumu( @@ -1102,7 +1102,7 @@ vint8mf2_t test_vluxei32_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei32_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m2_tumu( @@ -1111,7 +1111,7 @@ vint8m1_t test_vluxei32_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei32_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf4_tumu( @@ -1120,7 +1120,7 @@ vint8m2_t test_vluxei32_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei32_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf2_tumu( @@ -1129,7 +1129,7 @@ vint16mf4_t test_vluxei32_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei32_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m1_tumu( @@ -1138,7 +1138,7 @@ vint16mf2_t test_vluxei32_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei32_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m2_tumu( @@ -1147,7 +1147,7 @@ vint16m1_t test_vluxei32_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei32_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m4_tumu( @@ -1156,7 +1156,7 @@ vint16m2_t test_vluxei32_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei32_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32mf2_tumu( @@ -1165,7 +1165,7 @@ vint16m4_t test_vluxei32_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei32_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m1_tumu( @@ -1174,7 +1174,7 @@ vint32mf2_t test_vluxei32_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei32_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m2_tumu( @@ -1183,7 +1183,7 @@ vint32m1_t test_vluxei32_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei32_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m4_tumu( @@ -1192,7 +1192,7 @@ vint32m2_t test_vluxei32_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei32_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m8_tumu( @@ -1201,7 +1201,7 @@ vint32m4_t test_vluxei32_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei32_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m1_tumu( @@ -1210,7 +1210,7 @@ vint32m8_t test_vluxei32_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei32_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m2_tumu( @@ -1219,7 +1219,7 @@ vint64m1_t test_vluxei32_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei32_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m4_tumu( @@ -1228,7 +1228,7 @@ vint64m2_t test_vluxei32_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei32_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m8_tumu( @@ -1237,7 +1237,7 @@ vint64m4_t test_vluxei32_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei32_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf8_tumu( @@ -1246,7 +1246,7 @@ vint64m8_t test_vluxei32_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei32_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf4_tumu( @@ -1255,7 +1255,7 @@ vuint8mf8_t test_vluxei32_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei32_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf2_tumu( @@ -1264,7 +1264,7 @@ vuint8mf4_t test_vluxei32_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei32_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m1_tumu( @@ -1273,7 +1273,7 @@ vuint8mf2_t test_vluxei32_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei32_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m2_tumu( @@ -1282,7 +1282,7 @@ vuint8m1_t test_vluxei32_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei32_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf4_tumu( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vluxei32_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei32_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf2_tumu( @@ -1300,7 +1300,7 @@ vuint16mf4_t test_vluxei32_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei32_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m1_tumu( @@ -1309,7 +1309,7 @@ vuint16mf2_t test_vluxei32_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei32_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m2_tumu( @@ -1318,7 +1318,7 @@ vuint16m1_t test_vluxei32_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei32_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m4_tumu( @@ -1327,7 +1327,7 @@ vuint16m2_t test_vluxei32_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei32_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32mf2_tumu( @@ -1336,7 +1336,7 @@ vuint16m4_t test_vluxei32_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei32_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m1_tumu( @@ -1345,7 +1345,7 @@ vuint32mf2_t test_vluxei32_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei32_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m2_tumu( @@ -1354,7 +1354,7 @@ vuint32m1_t test_vluxei32_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei32_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m4_tumu( @@ -1363,7 +1363,7 @@ vuint32m2_t test_vluxei32_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei32_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m8_tumu( @@ -1372,7 +1372,7 @@ vuint32m4_t test_vluxei32_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei32_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m1_tumu( @@ -1381,7 +1381,7 @@ vuint32m8_t test_vluxei32_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei32_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m2_tumu( @@ -1390,7 +1390,7 @@ vuint64m1_t test_vluxei32_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei32_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m4_tumu( @@ -1399,7 +1399,7 @@ vuint64m2_t test_vluxei32_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei32_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m8_tumu( @@ -1408,7 +1408,7 @@ vuint64m4_t test_vluxei32_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei32_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf4_mu( @@ -1417,7 +1417,7 @@ vuint64m8_t test_vluxei32_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei32_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16mf2_mu( @@ -1426,7 +1426,7 @@ vfloat16mf4_t test_vluxei32_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei32_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m1_mu( @@ -1435,7 +1435,7 @@ vfloat16mf2_t test_vluxei32_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei32_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m2_mu( @@ -1444,7 +1444,7 @@ vfloat16m1_t test_vluxei32_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei32_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f16m4_mu( @@ -1453,7 +1453,7 @@ vfloat16m2_t test_vluxei32_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei32_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32mf2_mu( @@ -1462,7 +1462,7 @@ vfloat16m4_t test_vluxei32_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei32_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m1_mu( @@ -1471,7 +1471,7 @@ vfloat32mf2_t test_vluxei32_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei32_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m2_mu( @@ -1480,7 +1480,7 @@ vfloat32m1_t test_vluxei32_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei32_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m4_mu( @@ -1489,7 +1489,7 @@ vfloat32m2_t test_vluxei32_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei32_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f32m8_mu( @@ -1498,7 +1498,7 @@ vfloat32m4_t test_vluxei32_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei32_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_f32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m1_mu( @@ -1507,7 +1507,7 @@ vfloat32m8_t test_vluxei32_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei32_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_f64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m2_mu( @@ -1516,7 +1516,7 @@ vfloat64m1_t test_vluxei32_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei32_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_f64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m4_mu( @@ -1525,7 +1525,7 @@ vfloat64m2_t test_vluxei32_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei32_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_f64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_f64m8_mu( @@ -1534,7 +1534,7 @@ vfloat64m4_t test_vluxei32_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei32_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_f64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_f64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf8_mu( @@ -1543,7 +1543,7 @@ vfloat64m8_t test_vluxei32_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei32_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf4_mu( @@ -1552,7 +1552,7 @@ vint8mf8_t test_vluxei32_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei32_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8mf2_mu( @@ -1561,7 +1561,7 @@ vint8mf4_t test_vluxei32_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei32_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m1_mu( @@ -1570,7 +1570,7 @@ vint8mf2_t test_vluxei32_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei32_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i8m2_mu( @@ -1579,7 +1579,7 @@ vint8m1_t test_vluxei32_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei32_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf4_mu( @@ -1588,7 +1588,7 @@ vint8m2_t test_vluxei32_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei32_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16mf2_mu( @@ -1597,7 +1597,7 @@ vint16mf4_t test_vluxei32_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei32_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m1_mu( @@ -1606,7 +1606,7 @@ vint16mf2_t test_vluxei32_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei32_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m2_mu( @@ -1615,7 +1615,7 @@ vint16m1_t test_vluxei32_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei32_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i16m4_mu( @@ -1624,7 +1624,7 @@ vint16m2_t test_vluxei32_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei32_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32mf2_mu( @@ -1633,7 +1633,7 @@ vint16m4_t test_vluxei32_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei32_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m1_mu( @@ -1642,7 +1642,7 @@ vint32mf2_t test_vluxei32_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei32_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m2_mu( @@ -1651,7 +1651,7 @@ vint32m1_t test_vluxei32_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei32_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m4_mu( @@ -1660,7 +1660,7 @@ vint32m2_t test_vluxei32_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei32_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i32m8_mu( @@ -1669,7 +1669,7 @@ vint32m4_t test_vluxei32_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei32_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_i32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m1_mu( @@ -1678,7 +1678,7 @@ vint32m8_t test_vluxei32_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei32_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_i64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m2_mu( @@ -1687,7 +1687,7 @@ vint64m1_t test_vluxei32_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei32_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_i64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m4_mu( @@ -1696,7 +1696,7 @@ vint64m2_t test_vluxei32_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei32_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_i64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_i64m8_mu( @@ -1705,7 +1705,7 @@ vint64m4_t test_vluxei32_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei32_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_i64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_i64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf8_mu( @@ -1714,7 +1714,7 @@ vint64m8_t test_vluxei32_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei32_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf4_mu( @@ -1723,7 +1723,7 @@ vuint8mf8_t test_vluxei32_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei32_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8mf2_mu( @@ -1732,7 +1732,7 @@ vuint8mf4_t test_vluxei32_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei32_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m1_mu( @@ -1741,7 +1741,7 @@ vuint8mf2_t test_vluxei32_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei32_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u8m2_mu( @@ -1750,7 +1750,7 @@ vuint8m1_t test_vluxei32_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei32_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf4_mu( @@ -1759,7 +1759,7 @@ vuint8m2_t test_vluxei32_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei32_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16mf2_mu( @@ -1768,7 +1768,7 @@ vuint16mf4_t test_vluxei32_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei32_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m1_mu( @@ -1777,7 +1777,7 @@ vuint16mf2_t test_vluxei32_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei32_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m2_mu( @@ -1786,7 +1786,7 @@ vuint16m1_t test_vluxei32_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei32_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u16m4_mu( @@ -1795,7 +1795,7 @@ vuint16m2_t test_vluxei32_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei32_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32mf2_mu( @@ -1804,7 +1804,7 @@ vuint16m4_t test_vluxei32_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei32_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m1_mu( @@ -1813,7 +1813,7 @@ vuint32mf2_t test_vluxei32_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei32_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m2_mu( @@ -1822,7 +1822,7 @@ vuint32m1_t test_vluxei32_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei32_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m4_mu( @@ -1831,7 +1831,7 @@ vuint32m2_t test_vluxei32_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei32_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u32m8_mu( @@ -1840,7 +1840,7 @@ vuint32m4_t test_vluxei32_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei32_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint32m8_t bindex, size_t vl) { - return vluxei32_v_u32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m1_mu( @@ -1849,7 +1849,7 @@ vuint32m8_t test_vluxei32_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei32_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxei32_v_u64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m2_mu( @@ -1858,7 +1858,7 @@ vuint64m1_t test_vluxei32_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei32_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxei32_v_u64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m4_mu( @@ -1867,7 +1867,7 @@ vuint64m2_t test_vluxei32_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei32_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxei32_v_u64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei32_v_u64m8_mu( @@ -1876,6 +1876,6 @@ vuint64m4_t test_vluxei32_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei32_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint32m4_t bindex, size_t vl) { - return vluxei32_v_u64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei32_v_u64m8_mu(mask, maskedoff, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei64.c index d8ffa22485f426a2176482be36f4bdaa6b73c55c..c6e2417045fa88d39d9239bd3d457dfda0f8c4fb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei64_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vluxei64_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei64_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vluxei64_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei64_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vluxei64_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei64_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32mf2_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vluxei64_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei64_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m1_tu( @@ -58,7 +58,7 @@ vfloat32mf2_t test_vluxei64_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei64_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m2_tu( @@ -67,7 +67,7 @@ vfloat32m1_t test_vluxei64_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei64_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m4_tu( @@ -76,7 +76,7 @@ vfloat32m2_t test_vluxei64_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei64_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m1_tu( @@ -85,7 +85,7 @@ vfloat32m4_t test_vluxei64_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei64_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m2_tu( @@ -94,7 +94,7 @@ vfloat64m1_t test_vluxei64_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei64_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m4_tu( @@ -103,7 +103,7 @@ vfloat64m2_t test_vluxei64_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei64_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m8_tu( @@ -112,7 +112,7 @@ vfloat64m4_t test_vluxei64_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei64_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf8_tu( @@ -121,7 +121,7 @@ vfloat64m8_t test_vluxei64_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei64_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf4_tu( @@ -130,7 +130,7 @@ vint8mf8_t test_vluxei64_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei64_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf2_tu( @@ -139,7 +139,7 @@ vint8mf4_t test_vluxei64_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei64_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8m1_tu( @@ -148,7 +148,7 @@ vint8mf2_t test_vluxei64_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei64_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf4_tu( @@ -157,7 +157,7 @@ vint8m1_t test_vluxei64_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei64_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf2_tu( @@ -166,7 +166,7 @@ vint16mf4_t test_vluxei64_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei64_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m1_tu( @@ -175,7 +175,7 @@ vint16mf2_t test_vluxei64_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei64_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m2_tu( @@ -184,7 +184,7 @@ vint16m1_t test_vluxei64_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei64_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32mf2_tu( @@ -193,7 +193,7 @@ vint16m2_t test_vluxei64_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei64_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m1_tu( @@ -202,7 +202,7 @@ vint32mf2_t test_vluxei64_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei64_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m2_tu( @@ -211,7 +211,7 @@ vint32m1_t test_vluxei64_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei64_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m4_tu( @@ -220,7 +220,7 @@ vint32m2_t test_vluxei64_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei64_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m1_tu( @@ -229,7 +229,7 @@ vint32m4_t test_vluxei64_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei64_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m2_tu( @@ -238,7 +238,7 @@ vint64m1_t test_vluxei64_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei64_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m4_tu( @@ -247,7 +247,7 @@ vint64m2_t test_vluxei64_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei64_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m8_tu( @@ -256,7 +256,7 @@ vint64m4_t test_vluxei64_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei64_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf8_tu( @@ -265,7 +265,7 @@ vint64m8_t test_vluxei64_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei64_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf4_tu( @@ -274,7 +274,7 @@ vuint8mf8_t test_vluxei64_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei64_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf2_tu( @@ -283,7 +283,7 @@ vuint8mf4_t test_vluxei64_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei64_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8m1_tu( @@ -292,7 +292,7 @@ vuint8mf2_t test_vluxei64_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei64_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf4_tu( @@ -301,7 +301,7 @@ vuint8m1_t test_vluxei64_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei64_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf2_tu( @@ -310,7 +310,7 @@ vuint16mf4_t test_vluxei64_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei64_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m1_tu( @@ -319,7 +319,7 @@ vuint16mf2_t test_vluxei64_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei64_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m2_tu( @@ -328,7 +328,7 @@ vuint16m1_t test_vluxei64_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei64_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32mf2_tu( @@ -337,7 +337,7 @@ vuint16m2_t test_vluxei64_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei64_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m1_tu( @@ -346,7 +346,7 @@ vuint32mf2_t test_vluxei64_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *b // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei64_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m2_tu( @@ -355,7 +355,7 @@ vuint32m1_t test_vluxei64_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei64_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m4_tu( @@ -364,7 +364,7 @@ vuint32m2_t test_vluxei64_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei64_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m1_tu( @@ -373,7 +373,7 @@ vuint32m4_t test_vluxei64_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei64_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m2_tu( @@ -382,7 +382,7 @@ vuint64m1_t test_vluxei64_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei64_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m4_tu( @@ -391,7 +391,7 @@ vuint64m2_t test_vluxei64_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei64_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m8_tu( @@ -400,7 +400,7 @@ vuint64m4_t test_vluxei64_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei64_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf4_tum( @@ -409,7 +409,7 @@ vuint64m8_t test_vluxei64_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei64_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf2_tum( @@ -418,7 +418,7 @@ vfloat16mf4_t test_vluxei64_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei64_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m1_tum( @@ -427,7 +427,7 @@ vfloat16mf2_t test_vluxei64_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei64_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m2_tum( @@ -436,7 +436,7 @@ vfloat16m1_t test_vluxei64_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei64_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32mf2_tum( @@ -445,7 +445,7 @@ vfloat16m2_t test_vluxei64_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei64_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m1_tum( @@ -454,7 +454,7 @@ vfloat32mf2_t test_vluxei64_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei64_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m2_tum( @@ -463,7 +463,7 @@ vfloat32m1_t test_vluxei64_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei64_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m4_tum( @@ -472,7 +472,7 @@ vfloat32m2_t test_vluxei64_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei64_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m1_tum( @@ -481,7 +481,7 @@ vfloat32m4_t test_vluxei64_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei64_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m2_tum( @@ -490,7 +490,7 @@ vfloat64m1_t test_vluxei64_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei64_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m4_tum( @@ -499,7 +499,7 @@ vfloat64m2_t test_vluxei64_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei64_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m8_tum( @@ -508,7 +508,7 @@ vfloat64m4_t test_vluxei64_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei64_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf8_tum( @@ -517,7 +517,7 @@ vfloat64m8_t test_vluxei64_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei64_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf4_tum( @@ -526,7 +526,7 @@ vint8mf8_t test_vluxei64_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei64_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf2_tum( @@ -535,7 +535,7 @@ vint8mf4_t test_vluxei64_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei64_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8m1_tum( @@ -544,7 +544,7 @@ vint8mf2_t test_vluxei64_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei64_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf4_tum( @@ -553,7 +553,7 @@ vint8m1_t test_vluxei64_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei64_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf2_tum( @@ -562,7 +562,7 @@ vint16mf4_t test_vluxei64_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei64_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m1_tum( @@ -571,7 +571,7 @@ vint16mf2_t test_vluxei64_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei64_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m2_tum( @@ -580,7 +580,7 @@ vint16m1_t test_vluxei64_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei64_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32mf2_tum( @@ -589,7 +589,7 @@ vint16m2_t test_vluxei64_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei64_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m1_tum( @@ -598,7 +598,7 @@ vint32mf2_t test_vluxei64_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei64_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m2_tum( @@ -607,7 +607,7 @@ vint32m1_t test_vluxei64_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei64_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m4_tum( @@ -616,7 +616,7 @@ vint32m2_t test_vluxei64_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei64_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m1_tum( @@ -625,7 +625,7 @@ vint32m4_t test_vluxei64_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei64_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m2_tum( @@ -634,7 +634,7 @@ vint64m1_t test_vluxei64_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei64_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m4_tum( @@ -643,7 +643,7 @@ vint64m2_t test_vluxei64_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei64_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m8_tum( @@ -652,7 +652,7 @@ vint64m4_t test_vluxei64_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei64_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf8_tum( @@ -661,7 +661,7 @@ vint64m8_t test_vluxei64_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei64_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf4_tum( @@ -670,7 +670,7 @@ vuint8mf8_t test_vluxei64_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei64_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf2_tum( @@ -679,7 +679,7 @@ vuint8mf4_t test_vluxei64_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei64_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8m1_tum( @@ -688,7 +688,7 @@ vuint8mf2_t test_vluxei64_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei64_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf4_tum( @@ -697,7 +697,7 @@ vuint8m1_t test_vluxei64_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei64_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf2_tum( @@ -706,7 +706,7 @@ vuint16mf4_t test_vluxei64_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei64_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m1_tum( @@ -715,7 +715,7 @@ vuint16mf2_t test_vluxei64_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei64_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m2_tum( @@ -724,7 +724,7 @@ vuint16m1_t test_vluxei64_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei64_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32mf2_tum( @@ -733,7 +733,7 @@ vuint16m2_t test_vluxei64_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei64_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m1_tum( @@ -742,7 +742,7 @@ vuint32mf2_t test_vluxei64_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei64_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m2_tum( @@ -751,7 +751,7 @@ vuint32m1_t test_vluxei64_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei64_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m4_tum( @@ -760,7 +760,7 @@ vuint32m2_t test_vluxei64_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei64_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m1_tum( @@ -769,7 +769,7 @@ vuint32m4_t test_vluxei64_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei64_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m2_tum( @@ -778,7 +778,7 @@ vuint64m1_t test_vluxei64_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei64_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m4_tum( @@ -787,7 +787,7 @@ vuint64m2_t test_vluxei64_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei64_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m8_tum( @@ -796,7 +796,7 @@ vuint64m4_t test_vluxei64_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei64_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf4_tumu( @@ -805,7 +805,7 @@ vuint64m8_t test_vluxei64_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei64_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf2_tumu( @@ -814,7 +814,7 @@ vfloat16mf4_t test_vluxei64_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei64_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m1_tumu( @@ -823,7 +823,7 @@ vfloat16mf2_t test_vluxei64_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei64_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m2_tumu( @@ -832,7 +832,7 @@ vfloat16m1_t test_vluxei64_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei64_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32mf2_tumu( @@ -841,7 +841,7 @@ vfloat16m2_t test_vluxei64_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei64_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m1_tumu( @@ -850,7 +850,7 @@ vfloat32mf2_t test_vluxei64_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei64_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m2_tumu( @@ -859,7 +859,7 @@ vfloat32m1_t test_vluxei64_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei64_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m4_tumu( @@ -868,7 +868,7 @@ vfloat32m2_t test_vluxei64_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei64_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m1_tumu( @@ -877,7 +877,7 @@ vfloat32m4_t test_vluxei64_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei64_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m2_tumu( @@ -886,7 +886,7 @@ vfloat64m1_t test_vluxei64_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei64_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m4_tumu( @@ -895,7 +895,7 @@ vfloat64m2_t test_vluxei64_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei64_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m8_tumu( @@ -904,7 +904,7 @@ vfloat64m4_t test_vluxei64_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei64_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf8_tumu( @@ -913,7 +913,7 @@ vfloat64m8_t test_vluxei64_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei64_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf4_tumu( @@ -922,7 +922,7 @@ vint8mf8_t test_vluxei64_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei64_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf2_tumu( @@ -931,7 +931,7 @@ vint8mf4_t test_vluxei64_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei64_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8m1_tumu( @@ -940,7 +940,7 @@ vint8mf2_t test_vluxei64_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei64_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf4_tumu( @@ -949,7 +949,7 @@ vint8m1_t test_vluxei64_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei64_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf2_tumu( @@ -958,7 +958,7 @@ vint16mf4_t test_vluxei64_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei64_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m1_tumu( @@ -967,7 +967,7 @@ vint16mf2_t test_vluxei64_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei64_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m2_tumu( @@ -976,7 +976,7 @@ vint16m1_t test_vluxei64_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei64_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32mf2_tumu( @@ -985,7 +985,7 @@ vint16m2_t test_vluxei64_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei64_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m1_tumu( @@ -994,7 +994,7 @@ vint32mf2_t test_vluxei64_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei64_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m2_tumu( @@ -1003,7 +1003,7 @@ vint32m1_t test_vluxei64_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei64_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m4_tumu( @@ -1012,7 +1012,7 @@ vint32m2_t test_vluxei64_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei64_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m1_tumu( @@ -1021,7 +1021,7 @@ vint32m4_t test_vluxei64_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei64_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m2_tumu( @@ -1030,7 +1030,7 @@ vint64m1_t test_vluxei64_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei64_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m4_tumu( @@ -1039,7 +1039,7 @@ vint64m2_t test_vluxei64_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei64_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m8_tumu( @@ -1048,7 +1048,7 @@ vint64m4_t test_vluxei64_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei64_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf8_tumu( @@ -1057,7 +1057,7 @@ vint64m8_t test_vluxei64_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei64_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf4_tumu( @@ -1066,7 +1066,7 @@ vuint8mf8_t test_vluxei64_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei64_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf2_tumu( @@ -1075,7 +1075,7 @@ vuint8mf4_t test_vluxei64_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei64_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8m1_tumu( @@ -1084,7 +1084,7 @@ vuint8mf2_t test_vluxei64_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei64_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf4_tumu( @@ -1093,7 +1093,7 @@ vuint8m1_t test_vluxei64_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei64_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf2_tumu( @@ -1102,7 +1102,7 @@ vuint16mf4_t test_vluxei64_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei64_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m1_tumu( @@ -1111,7 +1111,7 @@ vuint16mf2_t test_vluxei64_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei64_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m2_tumu( @@ -1120,7 +1120,7 @@ vuint16m1_t test_vluxei64_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei64_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32mf2_tumu( @@ -1129,7 +1129,7 @@ vuint16m2_t test_vluxei64_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei64_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m1_tumu( @@ -1138,7 +1138,7 @@ vuint32mf2_t test_vluxei64_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei64_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m2_tumu( @@ -1147,7 +1147,7 @@ vuint32m1_t test_vluxei64_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei64_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m4_tumu( @@ -1156,7 +1156,7 @@ vuint32m2_t test_vluxei64_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei64_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m1_tumu( @@ -1165,7 +1165,7 @@ vuint32m4_t test_vluxei64_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei64_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m2_tumu( @@ -1174,7 +1174,7 @@ vuint64m1_t test_vluxei64_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei64_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m4_tumu( @@ -1183,7 +1183,7 @@ vuint64m2_t test_vluxei64_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei64_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m8_tumu( @@ -1192,7 +1192,7 @@ vuint64m4_t test_vluxei64_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei64_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf4_mu( @@ -1201,7 +1201,7 @@ vuint64m8_t test_vluxei64_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei64_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16mf2_mu( @@ -1210,7 +1210,7 @@ vfloat16mf4_t test_vluxei64_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei64_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m1_mu( @@ -1219,7 +1219,7 @@ vfloat16mf2_t test_vluxei64_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei64_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f16m2_mu( @@ -1228,7 +1228,7 @@ vfloat16m1_t test_vluxei64_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei64_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32mf2_mu( @@ -1237,7 +1237,7 @@ vfloat16m2_t test_vluxei64_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei64_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m1_mu( @@ -1246,7 +1246,7 @@ vfloat32mf2_t test_vluxei64_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei64_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m2_mu( @@ -1255,7 +1255,7 @@ vfloat32m1_t test_vluxei64_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei64_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f32m4_mu( @@ -1264,7 +1264,7 @@ vfloat32m2_t test_vluxei64_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei64_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m1_mu( @@ -1273,7 +1273,7 @@ vfloat32m4_t test_vluxei64_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei64_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_f64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m2_mu( @@ -1282,7 +1282,7 @@ vfloat64m1_t test_vluxei64_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei64_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_f64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m4_mu( @@ -1291,7 +1291,7 @@ vfloat64m2_t test_vluxei64_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei64_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_f64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_f64m8_mu( @@ -1300,7 +1300,7 @@ vfloat64m4_t test_vluxei64_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei64_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_f64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_f64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf8_mu( @@ -1309,7 +1309,7 @@ vfloat64m8_t test_vluxei64_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei64_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf4_mu( @@ -1318,7 +1318,7 @@ vint8mf8_t test_vluxei64_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei64_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8mf2_mu( @@ -1327,7 +1327,7 @@ vint8mf4_t test_vluxei64_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei64_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i8m1_mu( @@ -1336,7 +1336,7 @@ vint8mf2_t test_vluxei64_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei64_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf4_mu( @@ -1345,7 +1345,7 @@ vint8m1_t test_vluxei64_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei64_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16mf2_mu( @@ -1354,7 +1354,7 @@ vint16mf4_t test_vluxei64_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei64_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m1_mu( @@ -1363,7 +1363,7 @@ vint16mf2_t test_vluxei64_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei64_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i16m2_mu( @@ -1372,7 +1372,7 @@ vint16m1_t test_vluxei64_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei64_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32mf2_mu( @@ -1381,7 +1381,7 @@ vint16m2_t test_vluxei64_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei64_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m1_mu( @@ -1390,7 +1390,7 @@ vint32mf2_t test_vluxei64_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei64_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m2_mu( @@ -1399,7 +1399,7 @@ vint32m1_t test_vluxei64_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei64_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i32m4_mu( @@ -1408,7 +1408,7 @@ vint32m2_t test_vluxei64_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei64_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m1_mu( @@ -1417,7 +1417,7 @@ vint32m4_t test_vluxei64_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei64_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_i64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m2_mu( @@ -1426,7 +1426,7 @@ vint64m1_t test_vluxei64_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei64_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_i64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m4_mu( @@ -1435,7 +1435,7 @@ vint64m2_t test_vluxei64_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei64_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_i64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_i64m8_mu( @@ -1444,7 +1444,7 @@ vint64m4_t test_vluxei64_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei64_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_i64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_i64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf8_mu( @@ -1453,7 +1453,7 @@ vint64m8_t test_vluxei64_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei64_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf4_mu( @@ -1462,7 +1462,7 @@ vuint8mf8_t test_vluxei64_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei64_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8mf2_mu( @@ -1471,7 +1471,7 @@ vuint8mf4_t test_vluxei64_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei64_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u8m1_mu( @@ -1480,7 +1480,7 @@ vuint8mf2_t test_vluxei64_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei64_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf4_mu( @@ -1489,7 +1489,7 @@ vuint8m1_t test_vluxei64_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei64_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16mf2_mu( @@ -1498,7 +1498,7 @@ vuint16mf4_t test_vluxei64_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei64_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m1_mu( @@ -1507,7 +1507,7 @@ vuint16mf2_t test_vluxei64_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei64_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u16m2_mu( @@ -1516,7 +1516,7 @@ vuint16m1_t test_vluxei64_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei64_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32mf2_mu( @@ -1525,7 +1525,7 @@ vuint16m2_t test_vluxei64_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei64_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m1_mu( @@ -1534,7 +1534,7 @@ vuint32mf2_t test_vluxei64_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei64_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m2_mu( @@ -1543,7 +1543,7 @@ vuint32m1_t test_vluxei64_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei64_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u32m4_mu( @@ -1552,7 +1552,7 @@ vuint32m2_t test_vluxei64_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei64_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m1_mu( @@ -1561,7 +1561,7 @@ vuint32m4_t test_vluxei64_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei64_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxei64_v_u64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m2_mu( @@ -1570,7 +1570,7 @@ vuint64m1_t test_vluxei64_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei64_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxei64_v_u64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m4_mu( @@ -1579,7 +1579,7 @@ vuint64m2_t test_vluxei64_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei64_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxei64_v_u64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei64_v_u64m8_mu( @@ -1588,6 +1588,6 @@ vuint64m4_t test_vluxei64_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei64_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint64m8_t bindex, size_t vl) { - return vluxei64_v_u64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei64_v_u64m8_mu(mask, maskedoff, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei8.c index ee0b84c2cac50c03b6c972d5308937aa89090795..679b80ebf92b6de4f6c7159ecc7483fa71cf4449 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxei8.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei8_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vluxei8_v_f16mf4_tu(vfloat16mf4_t maskedoff, const _Float16 * // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei8_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vluxei8_v_f16mf2_tu(vfloat16mf2_t maskedoff, const _Float16 * // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei8_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vluxei8_v_f16m1_tu(vfloat16m1_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei8_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vluxei8_v_f16m2_tu(vfloat16m2_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei8_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vluxei8_v_f16m4_tu(vfloat16m4_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei8_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_f16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vluxei8_v_f16m8_tu(vfloat16m8_t maskedoff, const _Float16 *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei8_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vluxei8_v_f32mf2_tu(vfloat32mf2_t maskedoff, const float *bas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei8_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vluxei8_v_f32m1_tu(vfloat32m1_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei8_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vluxei8_v_f32m2_tu(vfloat32m2_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei8_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vluxei8_v_f32m4_tu(vfloat32m4_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei8_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vluxei8_v_f32m8_tu(vfloat32m8_t maskedoff, const float *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei8_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vluxei8_v_f64m1_tu(vfloat64m1_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei8_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vluxei8_v_f64m2_tu(vfloat64m2_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei8_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vluxei8_v_f64m4_tu(vfloat64m4_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei8_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf8_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vluxei8_v_f64m8_tu(vfloat64m8_t maskedoff, const double *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei8_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf4_tu( @@ -157,7 +157,7 @@ vint8mf8_t test_vluxei8_v_i8mf8_tu(vint8mf8_t maskedoff, const int8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei8_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf2_tu( @@ -166,7 +166,7 @@ vint8mf4_t test_vluxei8_v_i8mf4_tu(vint8mf4_t maskedoff, const int8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei8_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m1_tu( @@ -175,7 +175,7 @@ vint8mf2_t test_vluxei8_v_i8mf2_tu(vint8mf2_t maskedoff, const int8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei8_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m2_tu( @@ -184,7 +184,7 @@ vint8m1_t test_vluxei8_v_i8m1_tu(vint8m1_t maskedoff, const int8_t *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei8_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m4_tu( @@ -193,7 +193,7 @@ vint8m2_t test_vluxei8_v_i8m2_tu(vint8m2_t maskedoff, const int8_t *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei8_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i8m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m8_tu( @@ -202,7 +202,7 @@ vint8m4_t test_vluxei8_v_i8m4_tu(vint8m4_t maskedoff, const int8_t *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vluxei8_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_i8m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf4_tu( @@ -211,7 +211,7 @@ vint8m8_t test_vluxei8_v_i8m8_tu(vint8m8_t maskedoff, const int8_t *base, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei8_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf2_tu( @@ -220,7 +220,7 @@ vint16mf4_t test_vluxei8_v_i16mf4_tu(vint16mf4_t maskedoff, const int16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei8_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m1_tu( @@ -229,7 +229,7 @@ vint16mf2_t test_vluxei8_v_i16mf2_tu(vint16mf2_t maskedoff, const int16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei8_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m2_tu( @@ -238,7 +238,7 @@ vint16m1_t test_vluxei8_v_i16m1_tu(vint16m1_t maskedoff, const int16_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei8_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m4_tu( @@ -247,7 +247,7 @@ vint16m2_t test_vluxei8_v_i16m2_tu(vint16m2_t maskedoff, const int16_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei8_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m8_tu( @@ -256,7 +256,7 @@ vint16m4_t test_vluxei8_v_i16m4_tu(vint16m4_t maskedoff, const int16_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei8_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32mf2_tu( @@ -265,7 +265,7 @@ vint16m8_t test_vluxei8_v_i16m8_tu(vint16m8_t maskedoff, const int16_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei8_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m1_tu( @@ -274,7 +274,7 @@ vint32mf2_t test_vluxei8_v_i32mf2_tu(vint32mf2_t maskedoff, const int32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei8_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vluxei8_v_i32m1_tu(vint32m1_t maskedoff, const int32_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei8_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m4_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vluxei8_v_i32m2_tu(vint32m2_t maskedoff, const int32_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei8_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m8_tu( @@ -301,7 +301,7 @@ vint32m4_t test_vluxei8_v_i32m4_tu(vint32m4_t maskedoff, const int32_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei8_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m1_tu( @@ -310,7 +310,7 @@ vint32m8_t test_vluxei8_v_i32m8_tu(vint32m8_t maskedoff, const int32_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei8_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m2_tu( @@ -319,7 +319,7 @@ vint64m1_t test_vluxei8_v_i64m1_tu(vint64m1_t maskedoff, const int64_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei8_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m4_tu( @@ -328,7 +328,7 @@ vint64m2_t test_vluxei8_v_i64m2_tu(vint64m2_t maskedoff, const int64_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei8_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m8_tu( @@ -337,7 +337,7 @@ vint64m4_t test_vluxei8_v_i64m4_tu(vint64m4_t maskedoff, const int64_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei8_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf8_tu( @@ -346,7 +346,7 @@ vint64m8_t test_vluxei8_v_i64m8_tu(vint64m8_t maskedoff, const int64_t *base, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei8_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u8mf8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf4_tu( @@ -355,7 +355,7 @@ vuint8mf8_t test_vluxei8_v_u8mf8_tu(vuint8mf8_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei8_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u8mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf2_tu( @@ -364,7 +364,7 @@ vuint8mf4_t test_vluxei8_v_u8mf4_tu(vuint8mf4_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei8_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u8mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m1_tu( @@ -373,7 +373,7 @@ vuint8mf2_t test_vluxei8_v_u8mf2_tu(vuint8mf2_t maskedoff, const uint8_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei8_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u8m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m2_tu( @@ -382,7 +382,7 @@ vuint8m1_t test_vluxei8_v_u8m1_tu(vuint8m1_t maskedoff, const uint8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei8_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u8m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m4_tu( @@ -391,7 +391,7 @@ vuint8m2_t test_vluxei8_v_u8m2_tu(vuint8m2_t maskedoff, const uint8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei8_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u8m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m8_tu( @@ -400,7 +400,7 @@ vuint8m4_t test_vluxei8_v_u8m4_tu(vuint8m4_t maskedoff, const uint8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vluxei8_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_u8m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf4_tu( @@ -409,7 +409,7 @@ vuint8m8_t test_vluxei8_v_u8m8_tu(vuint8m8_t maskedoff, const uint8_t *base, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei8_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u16mf4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16mf4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf2_tu( @@ -418,7 +418,7 @@ vuint16mf4_t test_vluxei8_v_u16mf4_tu(vuint16mf4_t maskedoff, const uint16_t *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei8_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u16mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m1_tu( @@ -427,7 +427,7 @@ vuint16mf2_t test_vluxei8_v_u16mf2_tu(vuint16mf2_t maskedoff, const uint16_t *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei8_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u16m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m2_tu( @@ -436,7 +436,7 @@ vuint16m1_t test_vluxei8_v_u16m1_tu(vuint16m1_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei8_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u16m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m4_tu( @@ -445,7 +445,7 @@ vuint16m2_t test_vluxei8_v_u16m2_tu(vuint16m2_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei8_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u16m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m8_tu( @@ -454,7 +454,7 @@ vuint16m4_t test_vluxei8_v_u16m4_tu(vuint16m4_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei8_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u16m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32mf2_tu( @@ -463,7 +463,7 @@ vuint16m8_t test_vluxei8_v_u16m8_tu(vuint16m8_t maskedoff, const uint16_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei8_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u32mf2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32mf2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m1_tu( @@ -472,7 +472,7 @@ vuint32mf2_t test_vluxei8_v_u32mf2_tu(vuint32mf2_t maskedoff, const uint32_t *ba // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei8_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u32m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m2_tu( @@ -481,7 +481,7 @@ vuint32m1_t test_vluxei8_v_u32m1_tu(vuint32m1_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei8_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u32m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m4_tu( @@ -490,7 +490,7 @@ vuint32m2_t test_vluxei8_v_u32m2_tu(vuint32m2_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei8_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u32m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m8_tu( @@ -499,7 +499,7 @@ vuint32m4_t test_vluxei8_v_u32m4_tu(vuint32m4_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei8_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u32m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m1_tu( @@ -508,7 +508,7 @@ vuint32m8_t test_vluxei8_v_u32m8_tu(vuint32m8_t maskedoff, const uint32_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei8_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u64m1_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m1_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m2_tu( @@ -517,7 +517,7 @@ vuint64m1_t test_vluxei8_v_u64m1_tu(vuint64m1_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei8_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u64m2_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m2_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m4_tu( @@ -526,7 +526,7 @@ vuint64m2_t test_vluxei8_v_u64m2_tu(vuint64m2_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei8_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u64m4_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m4_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m8_tu( @@ -535,7 +535,7 @@ vuint64m4_t test_vluxei8_v_u64m4_tu(vuint64m4_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei8_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u64m8_tu(maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m8_tu(maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf4_tum( @@ -544,7 +544,7 @@ vuint64m8_t test_vluxei8_v_u64m8_tu(vuint64m8_t maskedoff, const uint64_t *base, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei8_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf2_tum( @@ -553,7 +553,7 @@ vfloat16mf4_t test_vluxei8_v_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei8_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m1_tum( @@ -562,7 +562,7 @@ vfloat16mf2_t test_vluxei8_v_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei8_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m2_tum( @@ -571,7 +571,7 @@ vfloat16m1_t test_vluxei8_v_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei8_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m4_tum( @@ -580,7 +580,7 @@ vfloat16m2_t test_vluxei8_v_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei8_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m8_tum( @@ -589,7 +589,7 @@ vfloat16m4_t test_vluxei8_v_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei8_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_f16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32mf2_tum( @@ -598,7 +598,7 @@ vfloat16m8_t test_vluxei8_v_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei8_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m1_tum( @@ -607,7 +607,7 @@ vfloat32mf2_t test_vluxei8_v_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei8_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m2_tum( @@ -616,7 +616,7 @@ vfloat32m1_t test_vluxei8_v_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei8_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m4_tum( @@ -625,7 +625,7 @@ vfloat32m2_t test_vluxei8_v_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei8_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m8_tum( @@ -634,7 +634,7 @@ vfloat32m4_t test_vluxei8_v_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei8_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m1_tum( @@ -643,7 +643,7 @@ vfloat32m8_t test_vluxei8_v_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei8_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m2_tum( @@ -652,7 +652,7 @@ vfloat64m1_t test_vluxei8_v_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei8_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m4_tum( @@ -661,7 +661,7 @@ vfloat64m2_t test_vluxei8_v_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei8_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m8_tum( @@ -670,7 +670,7 @@ vfloat64m4_t test_vluxei8_v_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei8_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf8_tum( @@ -679,7 +679,7 @@ vfloat64m8_t test_vluxei8_v_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei8_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf4_tum( @@ -688,7 +688,7 @@ vint8mf8_t test_vluxei8_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei8_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf2_tum( @@ -697,7 +697,7 @@ vint8mf4_t test_vluxei8_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei8_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m1_tum( @@ -706,7 +706,7 @@ vint8mf2_t test_vluxei8_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei8_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m2_tum( @@ -715,7 +715,7 @@ vint8m1_t test_vluxei8_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei8_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m4_tum( @@ -724,7 +724,7 @@ vint8m2_t test_vluxei8_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei8_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i8m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m8_tum( @@ -733,7 +733,7 @@ vint8m4_t test_vluxei8_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vluxei8_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_i8m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf4_tum( @@ -742,7 +742,7 @@ vint8m8_t test_vluxei8_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, const int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei8_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf2_tum( @@ -751,7 +751,7 @@ vint16mf4_t test_vluxei8_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei8_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m1_tum( @@ -760,7 +760,7 @@ vint16mf2_t test_vluxei8_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei8_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m2_tum( @@ -769,7 +769,7 @@ vint16m1_t test_vluxei8_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei8_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m4_tum( @@ -778,7 +778,7 @@ vint16m2_t test_vluxei8_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei8_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m8_tum( @@ -787,7 +787,7 @@ vint16m4_t test_vluxei8_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei8_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32mf2_tum( @@ -796,7 +796,7 @@ vint16m8_t test_vluxei8_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei8_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m1_tum( @@ -805,7 +805,7 @@ vint32mf2_t test_vluxei8_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei8_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m2_tum( @@ -814,7 +814,7 @@ vint32m1_t test_vluxei8_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei8_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m4_tum( @@ -823,7 +823,7 @@ vint32m2_t test_vluxei8_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei8_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m8_tum( @@ -832,7 +832,7 @@ vint32m4_t test_vluxei8_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei8_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m1_tum( @@ -841,7 +841,7 @@ vint32m8_t test_vluxei8_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei8_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m2_tum( @@ -850,7 +850,7 @@ vint64m1_t test_vluxei8_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei8_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m4_tum( @@ -859,7 +859,7 @@ vint64m2_t test_vluxei8_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei8_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m8_tum( @@ -868,7 +868,7 @@ vint64m4_t test_vluxei8_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei8_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf8_tum( @@ -877,7 +877,7 @@ vint64m8_t test_vluxei8_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei8_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf4_tum( @@ -886,7 +886,7 @@ vuint8mf8_t test_vluxei8_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei8_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf2_tum( @@ -895,7 +895,7 @@ vuint8mf4_t test_vluxei8_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei8_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m1_tum( @@ -904,7 +904,7 @@ vuint8mf2_t test_vluxei8_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei8_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u8m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m2_tum( @@ -913,7 +913,7 @@ vuint8m1_t test_vluxei8_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei8_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u8m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m4_tum( @@ -922,7 +922,7 @@ vuint8m2_t test_vluxei8_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei8_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u8m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m8_tum( @@ -931,7 +931,7 @@ vuint8m4_t test_vluxei8_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vluxei8_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_u8m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf4_tum( @@ -940,7 +940,7 @@ vuint8m8_t test_vluxei8_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, const ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei8_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16mf4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf2_tum( @@ -949,7 +949,7 @@ vuint16mf4_t test_vluxei8_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei8_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m1_tum( @@ -958,7 +958,7 @@ vuint16mf2_t test_vluxei8_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei8_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u16m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m2_tum( @@ -967,7 +967,7 @@ vuint16m1_t test_vluxei8_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei8_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u16m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m4_tum( @@ -976,7 +976,7 @@ vuint16m2_t test_vluxei8_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei8_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u16m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m8_tum( @@ -985,7 +985,7 @@ vuint16m4_t test_vluxei8_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei8_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u16m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32mf2_tum( @@ -994,7 +994,7 @@ vuint16m8_t test_vluxei8_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei8_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32mf2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m1_tum( @@ -1003,7 +1003,7 @@ vuint32mf2_t test_vluxei8_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei8_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u32m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m2_tum( @@ -1012,7 +1012,7 @@ vuint32m1_t test_vluxei8_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei8_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u32m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m4_tum( @@ -1021,7 +1021,7 @@ vuint32m2_t test_vluxei8_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei8_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u32m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m8_tum( @@ -1030,7 +1030,7 @@ vuint32m4_t test_vluxei8_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei8_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u32m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m1_tum( @@ -1039,7 +1039,7 @@ vuint32m8_t test_vluxei8_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei8_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u64m1_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m1_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m2_tum( @@ -1048,7 +1048,7 @@ vuint64m1_t test_vluxei8_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei8_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u64m2_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m2_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m4_tum( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vluxei8_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei8_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u64m4_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m4_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m8_tum( @@ -1066,7 +1066,7 @@ vuint64m4_t test_vluxei8_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei8_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u64m8_tum(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m8_tum(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf4_tumu( @@ -1075,7 +1075,7 @@ vuint64m8_t test_vluxei8_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei8_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf2_tumu( @@ -1084,7 +1084,7 @@ vfloat16mf4_t test_vluxei8_v_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei8_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m1_tumu( @@ -1093,7 +1093,7 @@ vfloat16mf2_t test_vluxei8_v_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei8_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m2_tumu( @@ -1102,7 +1102,7 @@ vfloat16m1_t test_vluxei8_v_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei8_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m4_tumu( @@ -1111,7 +1111,7 @@ vfloat16m2_t test_vluxei8_v_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei8_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m8_tumu( @@ -1120,7 +1120,7 @@ vfloat16m4_t test_vluxei8_v_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei8_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_f16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32mf2_tumu( @@ -1129,7 +1129,7 @@ vfloat16m8_t test_vluxei8_v_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei8_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m1_tumu( @@ -1138,7 +1138,7 @@ vfloat32mf2_t test_vluxei8_v_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei8_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m2_tumu( @@ -1147,7 +1147,7 @@ vfloat32m1_t test_vluxei8_v_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei8_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m4_tumu( @@ -1156,7 +1156,7 @@ vfloat32m2_t test_vluxei8_v_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei8_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m8_tumu( @@ -1165,7 +1165,7 @@ vfloat32m4_t test_vluxei8_v_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei8_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m1_tumu( @@ -1174,7 +1174,7 @@ vfloat32m8_t test_vluxei8_v_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei8_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m2_tumu( @@ -1183,7 +1183,7 @@ vfloat64m1_t test_vluxei8_v_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei8_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m4_tumu( @@ -1192,7 +1192,7 @@ vfloat64m2_t test_vluxei8_v_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei8_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m8_tumu( @@ -1201,7 +1201,7 @@ vfloat64m4_t test_vluxei8_v_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, c // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei8_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf8_tumu( @@ -1210,7 +1210,7 @@ vfloat64m8_t test_vluxei8_v_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei8_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf4_tumu( @@ -1219,7 +1219,7 @@ vint8mf8_t test_vluxei8_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei8_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf2_tumu( @@ -1228,7 +1228,7 @@ vint8mf4_t test_vluxei8_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei8_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m1_tumu( @@ -1237,7 +1237,7 @@ vint8mf2_t test_vluxei8_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei8_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m2_tumu( @@ -1246,7 +1246,7 @@ vint8m1_t test_vluxei8_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei8_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m4_tumu( @@ -1255,7 +1255,7 @@ vint8m2_t test_vluxei8_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei8_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i8m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m8_tumu( @@ -1264,7 +1264,7 @@ vint8m4_t test_vluxei8_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vluxei8_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_i8m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf4_tumu( @@ -1273,7 +1273,7 @@ vint8m8_t test_vluxei8_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, const int // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei8_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf2_tumu( @@ -1282,7 +1282,7 @@ vint16mf4_t test_vluxei8_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei8_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m1_tumu( @@ -1291,7 +1291,7 @@ vint16mf2_t test_vluxei8_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei8_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m2_tumu( @@ -1300,7 +1300,7 @@ vint16m1_t test_vluxei8_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei8_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m4_tumu( @@ -1309,7 +1309,7 @@ vint16m2_t test_vluxei8_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei8_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m8_tumu( @@ -1318,7 +1318,7 @@ vint16m4_t test_vluxei8_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei8_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32mf2_tumu( @@ -1327,7 +1327,7 @@ vint16m8_t test_vluxei8_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei8_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m1_tumu( @@ -1336,7 +1336,7 @@ vint32mf2_t test_vluxei8_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei8_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m2_tumu( @@ -1345,7 +1345,7 @@ vint32m1_t test_vluxei8_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei8_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m4_tumu( @@ -1354,7 +1354,7 @@ vint32m2_t test_vluxei8_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei8_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m8_tumu( @@ -1363,7 +1363,7 @@ vint32m4_t test_vluxei8_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei8_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m1_tumu( @@ -1372,7 +1372,7 @@ vint32m8_t test_vluxei8_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei8_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m2_tumu( @@ -1381,7 +1381,7 @@ vint64m1_t test_vluxei8_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei8_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m4_tumu( @@ -1390,7 +1390,7 @@ vint64m2_t test_vluxei8_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei8_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m8_tumu( @@ -1399,7 +1399,7 @@ vint64m4_t test_vluxei8_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei8_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf8_tumu( @@ -1408,7 +1408,7 @@ vint64m8_t test_vluxei8_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei8_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf4_tumu( @@ -1417,7 +1417,7 @@ vuint8mf8_t test_vluxei8_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei8_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf2_tumu( @@ -1426,7 +1426,7 @@ vuint8mf4_t test_vluxei8_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei8_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m1_tumu( @@ -1435,7 +1435,7 @@ vuint8mf2_t test_vluxei8_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei8_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m2_tumu( @@ -1444,7 +1444,7 @@ vuint8m1_t test_vluxei8_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei8_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m4_tumu( @@ -1453,7 +1453,7 @@ vuint8m2_t test_vluxei8_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei8_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u8m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m8_tumu( @@ -1462,7 +1462,7 @@ vuint8m4_t test_vluxei8_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vluxei8_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_u8m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf4_tumu( @@ -1471,7 +1471,7 @@ vuint8m8_t test_vluxei8_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, const u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei8_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16mf4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf2_tumu( @@ -1480,7 +1480,7 @@ vuint16mf4_t test_vluxei8_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei8_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m1_tumu( @@ -1489,7 +1489,7 @@ vuint16mf2_t test_vluxei8_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei8_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m2_tumu( @@ -1498,7 +1498,7 @@ vuint16m1_t test_vluxei8_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei8_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m4_tumu( @@ -1507,7 +1507,7 @@ vuint16m2_t test_vluxei8_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei8_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m8_tumu( @@ -1516,7 +1516,7 @@ vuint16m4_t test_vluxei8_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei8_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u16m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32mf2_tumu( @@ -1525,7 +1525,7 @@ vuint16m8_t test_vluxei8_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei8_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32mf2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m1_tumu( @@ -1534,7 +1534,7 @@ vuint32mf2_t test_vluxei8_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei8_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m2_tumu( @@ -1543,7 +1543,7 @@ vuint32m1_t test_vluxei8_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei8_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m4_tumu( @@ -1552,7 +1552,7 @@ vuint32m2_t test_vluxei8_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei8_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m8_tumu( @@ -1561,7 +1561,7 @@ vuint32m4_t test_vluxei8_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei8_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m1_tumu( @@ -1570,7 +1570,7 @@ vuint32m8_t test_vluxei8_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei8_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m1_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m2_tumu( @@ -1579,7 +1579,7 @@ vuint64m1_t test_vluxei8_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei8_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m2_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m4_tumu( @@ -1588,7 +1588,7 @@ vuint64m2_t test_vluxei8_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei8_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m4_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m8_tumu( @@ -1597,7 +1597,7 @@ vuint64m4_t test_vluxei8_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei8_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m8_tumu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf4_mu( @@ -1606,7 +1606,7 @@ vuint64m8_t test_vluxei8_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vluxei8_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16mf2_mu( @@ -1615,7 +1615,7 @@ vfloat16mf4_t test_vluxei8_v_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vluxei8_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m1_mu( @@ -1624,7 +1624,7 @@ vfloat16mf2_t test_vluxei8_v_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vluxei8_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m2_mu( @@ -1633,7 +1633,7 @@ vfloat16m1_t test_vluxei8_v_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vluxei8_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m4_mu( @@ -1642,7 +1642,7 @@ vfloat16m2_t test_vluxei8_v_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vluxei8_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f16m8_mu( @@ -1651,7 +1651,7 @@ vfloat16m4_t test_vluxei8_v_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vluxei8_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, const _Float16 *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_f16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32mf2_mu( @@ -1660,7 +1660,7 @@ vfloat16m8_t test_vluxei8_v_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vluxei8_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m1_mu( @@ -1669,7 +1669,7 @@ vfloat32mf2_t test_vluxei8_v_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vluxei8_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m2_mu( @@ -1678,7 +1678,7 @@ vfloat32m1_t test_vluxei8_v_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vluxei8_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m4_mu( @@ -1687,7 +1687,7 @@ vfloat32m2_t test_vluxei8_v_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vluxei8_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f32m8_mu( @@ -1696,7 +1696,7 @@ vfloat32m4_t test_vluxei8_v_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vluxei8_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, const float *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_f32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m1_mu( @@ -1705,7 +1705,7 @@ vfloat32m8_t test_vluxei8_v_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vluxei8_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_f64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m2_mu( @@ -1714,7 +1714,7 @@ vfloat64m1_t test_vluxei8_v_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vluxei8_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_f64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m4_mu( @@ -1723,7 +1723,7 @@ vfloat64m2_t test_vluxei8_v_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vluxei8_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_f64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_f64m8_mu( @@ -1732,7 +1732,7 @@ vfloat64m4_t test_vluxei8_v_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, con // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vluxei8_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, const double *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_f64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_f64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf8_mu( @@ -1741,7 +1741,7 @@ vfloat64m8_t test_vluxei8_v_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vluxei8_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf4_mu( @@ -1750,7 +1750,7 @@ vint8mf8_t test_vluxei8_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vluxei8_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8mf2_mu( @@ -1759,7 +1759,7 @@ vint8mf4_t test_vluxei8_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vluxei8_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m1_mu( @@ -1768,7 +1768,7 @@ vint8mf2_t test_vluxei8_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vluxei8_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m2_mu( @@ -1777,7 +1777,7 @@ vint8m1_t test_vluxei8_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vluxei8_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m4_mu( @@ -1786,7 +1786,7 @@ vint8m2_t test_vluxei8_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vluxei8_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i8m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i8m8_mu( @@ -1795,7 +1795,7 @@ vint8m4_t test_vluxei8_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vluxei8_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_i8m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i8m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf4_mu( @@ -1804,7 +1804,7 @@ vint8m8_t test_vluxei8_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, const int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vluxei8_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16mf2_mu( @@ -1813,7 +1813,7 @@ vint16mf4_t test_vluxei8_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vluxei8_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m1_mu( @@ -1822,7 +1822,7 @@ vint16mf2_t test_vluxei8_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vluxei8_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m2_mu( @@ -1831,7 +1831,7 @@ vint16m1_t test_vluxei8_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vluxei8_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m4_mu( @@ -1840,7 +1840,7 @@ vint16m2_t test_vluxei8_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vluxei8_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i16m8_mu( @@ -1849,7 +1849,7 @@ vint16m4_t test_vluxei8_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vluxei8_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const int16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_i16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32mf2_mu( @@ -1858,7 +1858,7 @@ vint16m8_t test_vluxei8_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vluxei8_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m1_mu( @@ -1867,7 +1867,7 @@ vint32mf2_t test_vluxei8_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, cons // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vluxei8_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m2_mu( @@ -1876,7 +1876,7 @@ vint32m1_t test_vluxei8_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vluxei8_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m4_mu( @@ -1885,7 +1885,7 @@ vint32m2_t test_vluxei8_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vluxei8_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i32m8_mu( @@ -1894,7 +1894,7 @@ vint32m4_t test_vluxei8_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vluxei8_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const int32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_i32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m1_mu( @@ -1903,7 +1903,7 @@ vint32m8_t test_vluxei8_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vluxei8_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_i64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m2_mu( @@ -1912,7 +1912,7 @@ vint64m1_t test_vluxei8_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vluxei8_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_i64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m4_mu( @@ -1921,7 +1921,7 @@ vint64m2_t test_vluxei8_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vluxei8_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_i64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_i64m8_mu( @@ -1930,7 +1930,7 @@ vint64m4_t test_vluxei8_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, const i // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vluxei8_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const int64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_i64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_i64m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf8_mu( @@ -1939,7 +1939,7 @@ vint64m8_t test_vluxei8_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, const in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vluxei8_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf4_mu( @@ -1948,7 +1948,7 @@ vuint8mf8_t test_vluxei8_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vluxei8_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8mf2_mu( @@ -1957,7 +1957,7 @@ vuint8mf4_t test_vluxei8_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vluxei8_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m1_mu( @@ -1966,7 +1966,7 @@ vuint8mf2_t test_vluxei8_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vluxei8_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u8m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m2_mu( @@ -1975,7 +1975,7 @@ vuint8m1_t test_vluxei8_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vluxei8_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u8m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m4_mu( @@ -1984,7 +1984,7 @@ vuint8m2_t test_vluxei8_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vluxei8_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u8m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u8m8_mu( @@ -1993,7 +1993,7 @@ vuint8m4_t test_vluxei8_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vluxei8_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, const uint8_t *base, vuint8m8_t bindex, size_t vl) { - return vluxei8_v_u8m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u8m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf4_mu( @@ -2002,7 +2002,7 @@ vuint8m8_t test_vluxei8_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, const uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vluxei8_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16mf4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16mf2_mu( @@ -2011,7 +2011,7 @@ vuint16mf4_t test_vluxei8_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vluxei8_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m1_mu( @@ -2020,7 +2020,7 @@ vuint16mf2_t test_vluxei8_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vluxei8_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u16m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m2_mu( @@ -2029,7 +2029,7 @@ vuint16m1_t test_vluxei8_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vluxei8_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u16m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m4_mu( @@ -2038,7 +2038,7 @@ vuint16m2_t test_vluxei8_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vluxei8_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u16m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u16m8_mu( @@ -2047,7 +2047,7 @@ vuint16m4_t test_vluxei8_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vluxei8_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const uint16_t *base, vuint8m4_t bindex, size_t vl) { - return vluxei8_v_u16m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u16m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32mf2_mu( @@ -2056,7 +2056,7 @@ vuint16m8_t test_vluxei8_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vluxei8_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32mf2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m1_mu( @@ -2065,7 +2065,7 @@ vuint32mf2_t test_vluxei8_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, co // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vluxei8_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u32m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m2_mu( @@ -2074,7 +2074,7 @@ vuint32m1_t test_vluxei8_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vluxei8_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u32m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m4_mu( @@ -2083,7 +2083,7 @@ vuint32m2_t test_vluxei8_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vluxei8_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u32m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u32m8_mu( @@ -2092,7 +2092,7 @@ vuint32m4_t test_vluxei8_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vluxei8_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const uint32_t *base, vuint8m2_t bindex, size_t vl) { - return vluxei8_v_u32m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u32m8_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m1_mu( @@ -2101,7 +2101,7 @@ vuint32m8_t test_vluxei8_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vluxei8_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxei8_v_u64m1_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m1_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m2_mu( @@ -2110,7 +2110,7 @@ vuint64m1_t test_vluxei8_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vluxei8_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxei8_v_u64m2_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m2_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m4_mu( @@ -2119,7 +2119,7 @@ vuint64m2_t test_vluxei8_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vluxei8_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxei8_v_u64m4_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m4_mu(mask, maskedoff, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxei8_v_u64m8_mu( @@ -2128,6 +2128,6 @@ vuint64m4_t test_vluxei8_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, const // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vluxei8_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, const uint64_t *base, vuint8m1_t bindex, size_t vl) { - return vluxei8_v_u64m8_mu(mask, maskedoff, base, bindex, vl); + return __riscv_vluxei8_v_u64m8_mu(mask, maskedoff, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c index 506c053a1a7a585663699482ff51601822d9a6fb..893c6d0e64113f88b7b20159c36f273b03341e56 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei16.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vluxseg2ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vluxseg2ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vluxseg2ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m4_tu( @@ -69,7 +69,7 @@ void test_vluxseg2ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32mf2_tu( @@ -82,7 +82,7 @@ void test_vluxseg2ei16_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m1_tu( @@ -95,7 +95,7 @@ void test_vluxseg2ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m2_tu( @@ -108,7 +108,7 @@ void test_vluxseg2ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m4_tu( @@ -121,7 +121,7 @@ void test_vluxseg2ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m1_tu( @@ -134,7 +134,7 @@ void test_vluxseg2ei16_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m2_tu( @@ -147,7 +147,7 @@ void test_vluxseg2ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m4_tu( @@ -160,7 +160,7 @@ void test_vluxseg2ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf8_tu( @@ -173,7 +173,7 @@ void test_vluxseg2ei16_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf4_tu( @@ -186,7 +186,7 @@ void test_vluxseg2ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf2_tu( @@ -199,7 +199,7 @@ void test_vluxseg2ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m1_tu( @@ -212,7 +212,7 @@ void test_vluxseg2ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m2_tu( @@ -225,7 +225,7 @@ void test_vluxseg2ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m4_tu( @@ -238,7 +238,7 @@ void test_vluxseg2ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf4_tu( @@ -251,7 +251,7 @@ void test_vluxseg2ei16_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf2_tu( @@ -264,7 +264,7 @@ void test_vluxseg2ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vluxseg2ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m2_tu( @@ -290,7 +290,7 @@ void test_vluxseg2ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m4_tu( @@ -303,7 +303,7 @@ void test_vluxseg2ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32mf2_tu( @@ -316,7 +316,7 @@ void test_vluxseg2ei16_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m1_tu( @@ -329,7 +329,7 @@ void test_vluxseg2ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m2_tu( @@ -342,7 +342,7 @@ void test_vluxseg2ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m4_tu( @@ -355,7 +355,7 @@ void test_vluxseg2ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m1_tu( @@ -368,7 +368,7 @@ void test_vluxseg2ei16_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m2_tu( @@ -381,7 +381,7 @@ void test_vluxseg2ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m4_tu( @@ -394,7 +394,7 @@ void test_vluxseg2ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf8_tu( @@ -407,7 +407,7 @@ void test_vluxseg2ei16_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf4_tu( @@ -420,7 +420,7 @@ void test_vluxseg2ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf2_tu( @@ -433,7 +433,7 @@ void test_vluxseg2ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m1_tu( @@ -446,7 +446,7 @@ void test_vluxseg2ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m2_tu( @@ -459,7 +459,7 @@ void test_vluxseg2ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m4_tu( @@ -472,7 +472,7 @@ void test_vluxseg2ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf4_tu( @@ -485,7 +485,7 @@ void test_vluxseg2ei16_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf2_tu( @@ -498,7 +498,7 @@ void test_vluxseg2ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m1_tu( @@ -511,7 +511,7 @@ void test_vluxseg2ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m2_tu( @@ -524,7 +524,7 @@ void test_vluxseg2ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m4_tu( @@ -537,7 +537,7 @@ void test_vluxseg2ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32mf2_tu( @@ -550,7 +550,7 @@ void test_vluxseg2ei16_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m1_tu( @@ -563,7 +563,7 @@ void test_vluxseg2ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m2_tu( @@ -576,7 +576,7 @@ void test_vluxseg2ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m4_tu( @@ -589,7 +589,7 @@ void test_vluxseg2ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vluxseg2ei16_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m2_tu( @@ -615,7 +615,7 @@ void test_vluxseg2ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m4_tu( @@ -628,7 +628,7 @@ void test_vluxseg2ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf4_tum( @@ -641,7 +641,7 @@ void test_vluxseg2ei16_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf2_tum( @@ -654,7 +654,7 @@ void test_vluxseg2ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m1_tum( @@ -667,7 +667,7 @@ void test_vluxseg2ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m2_tum( @@ -680,7 +680,7 @@ void test_vluxseg2ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m4_tum( @@ -693,7 +693,7 @@ void test_vluxseg2ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32mf2_tum( @@ -706,7 +706,7 @@ void test_vluxseg2ei16_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m1_tum( @@ -719,7 +719,7 @@ void test_vluxseg2ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m2_tum( @@ -732,7 +732,7 @@ void test_vluxseg2ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m4_tum( @@ -745,7 +745,7 @@ void test_vluxseg2ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m1_tum( @@ -758,7 +758,7 @@ void test_vluxseg2ei16_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m2_tum( @@ -771,7 +771,7 @@ void test_vluxseg2ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m4_tum( @@ -784,7 +784,7 @@ void test_vluxseg2ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf8_tum( @@ -797,7 +797,7 @@ void test_vluxseg2ei16_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf4_tum( @@ -810,7 +810,7 @@ void test_vluxseg2ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf2_tum( @@ -823,7 +823,7 @@ void test_vluxseg2ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m1_tum( @@ -836,7 +836,7 @@ void test_vluxseg2ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m2_tum( @@ -849,7 +849,7 @@ void test_vluxseg2ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m4_tum( @@ -862,7 +862,7 @@ void test_vluxseg2ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf4_tum( @@ -875,7 +875,7 @@ void test_vluxseg2ei16_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf2_tum( @@ -888,7 +888,7 @@ void test_vluxseg2ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vluxseg2ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m2_tum( @@ -914,7 +914,7 @@ void test_vluxseg2ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m4_tum( @@ -927,7 +927,7 @@ void test_vluxseg2ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32mf2_tum( @@ -940,7 +940,7 @@ void test_vluxseg2ei16_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m1_tum( @@ -953,7 +953,7 @@ void test_vluxseg2ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m2_tum( @@ -966,7 +966,7 @@ void test_vluxseg2ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m4_tum( @@ -979,7 +979,7 @@ void test_vluxseg2ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m1_tum( @@ -992,7 +992,7 @@ void test_vluxseg2ei16_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m2_tum( @@ -1005,7 +1005,7 @@ void test_vluxseg2ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m4_tum( @@ -1018,7 +1018,7 @@ void test_vluxseg2ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf8_tum( @@ -1031,7 +1031,7 @@ void test_vluxseg2ei16_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf4_tum( @@ -1044,7 +1044,7 @@ void test_vluxseg2ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf2_tum( @@ -1057,7 +1057,7 @@ void test_vluxseg2ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m1_tum( @@ -1070,7 +1070,7 @@ void test_vluxseg2ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m2_tum( @@ -1083,7 +1083,7 @@ void test_vluxseg2ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m4_tum( @@ -1096,7 +1096,7 @@ void test_vluxseg2ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf4_tum( @@ -1109,7 +1109,7 @@ void test_vluxseg2ei16_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf2_tum( @@ -1122,7 +1122,7 @@ void test_vluxseg2ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m1_tum( @@ -1135,7 +1135,7 @@ void test_vluxseg2ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m2_tum( @@ -1148,7 +1148,7 @@ void test_vluxseg2ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m4_tum( @@ -1161,7 +1161,7 @@ void test_vluxseg2ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32mf2_tum( @@ -1174,7 +1174,7 @@ void test_vluxseg2ei16_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m1_tum( @@ -1187,7 +1187,7 @@ void test_vluxseg2ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m2_tum( @@ -1200,7 +1200,7 @@ void test_vluxseg2ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m4_tum( @@ -1213,7 +1213,7 @@ void test_vluxseg2ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m1_tum( @@ -1226,7 +1226,7 @@ void test_vluxseg2ei16_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m2_tum( @@ -1239,7 +1239,7 @@ void test_vluxseg2ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m4_tum( @@ -1252,7 +1252,7 @@ void test_vluxseg2ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf4_tumu( @@ -1265,7 +1265,7 @@ void test_vluxseg2ei16_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf2_tumu( @@ -1278,7 +1278,7 @@ void test_vluxseg2ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m1_tumu( @@ -1291,7 +1291,7 @@ void test_vluxseg2ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m2_tumu( @@ -1304,7 +1304,7 @@ void test_vluxseg2ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m4_tumu( @@ -1317,7 +1317,7 @@ void test_vluxseg2ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32mf2_tumu( @@ -1330,7 +1330,7 @@ void test_vluxseg2ei16_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m1_tumu( @@ -1343,7 +1343,7 @@ void test_vluxseg2ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m2_tumu( @@ -1356,7 +1356,7 @@ void test_vluxseg2ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m4_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg2ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m1_tumu( @@ -1382,7 +1382,7 @@ void test_vluxseg2ei16_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m2_tumu( @@ -1395,7 +1395,7 @@ void test_vluxseg2ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m4_tumu( @@ -1408,7 +1408,7 @@ void test_vluxseg2ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf8_tumu( @@ -1421,7 +1421,7 @@ void test_vluxseg2ei16_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf4_tumu( @@ -1434,7 +1434,7 @@ void test_vluxseg2ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf2_tumu( @@ -1447,7 +1447,7 @@ void test_vluxseg2ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m1_tumu( @@ -1460,7 +1460,7 @@ void test_vluxseg2ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m2_tumu( @@ -1473,7 +1473,7 @@ void test_vluxseg2ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m4_tumu( @@ -1486,7 +1486,7 @@ void test_vluxseg2ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf4_tumu( @@ -1499,7 +1499,7 @@ void test_vluxseg2ei16_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf2_tumu( @@ -1512,7 +1512,7 @@ void test_vluxseg2ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m1_tumu( @@ -1525,7 +1525,7 @@ void test_vluxseg2ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m2_tumu( @@ -1538,7 +1538,7 @@ void test_vluxseg2ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m4_tumu( @@ -1551,7 +1551,7 @@ void test_vluxseg2ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vluxseg2ei16_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m1_tumu( @@ -1577,7 +1577,7 @@ void test_vluxseg2ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m2_tumu( @@ -1590,7 +1590,7 @@ void test_vluxseg2ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m4_tumu( @@ -1603,7 +1603,7 @@ void test_vluxseg2ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m1_tumu( @@ -1616,7 +1616,7 @@ void test_vluxseg2ei16_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m2_tumu( @@ -1629,7 +1629,7 @@ void test_vluxseg2ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m4_tumu( @@ -1642,7 +1642,7 @@ void test_vluxseg2ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf8_tumu( @@ -1655,7 +1655,7 @@ void test_vluxseg2ei16_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf4_tumu( @@ -1668,7 +1668,7 @@ void test_vluxseg2ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf2_tumu( @@ -1681,7 +1681,7 @@ void test_vluxseg2ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m1_tumu( @@ -1694,7 +1694,7 @@ void test_vluxseg2ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m2_tumu( @@ -1707,7 +1707,7 @@ void test_vluxseg2ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m4_tumu( @@ -1720,7 +1720,7 @@ void test_vluxseg2ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf4_tumu( @@ -1733,7 +1733,7 @@ void test_vluxseg2ei16_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf2_tumu( @@ -1746,7 +1746,7 @@ void test_vluxseg2ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m1_tumu( @@ -1759,7 +1759,7 @@ void test_vluxseg2ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m2_tumu( @@ -1772,7 +1772,7 @@ void test_vluxseg2ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m4_tumu( @@ -1785,7 +1785,7 @@ void test_vluxseg2ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32mf2_tumu( @@ -1798,7 +1798,7 @@ void test_vluxseg2ei16_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m1_tumu( @@ -1811,7 +1811,7 @@ void test_vluxseg2ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m2_tumu( @@ -1824,7 +1824,7 @@ void test_vluxseg2ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m4_tumu( @@ -1837,7 +1837,7 @@ void test_vluxseg2ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m1_tumu( @@ -1850,7 +1850,7 @@ void test_vluxseg2ei16_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m2_tumu( @@ -1863,7 +1863,7 @@ void test_vluxseg2ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m4_tumu( @@ -1876,7 +1876,7 @@ void test_vluxseg2ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf4_mu( @@ -1889,7 +1889,7 @@ void test_vluxseg2ei16_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16mf2_mu( @@ -1902,7 +1902,7 @@ void test_vluxseg2ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m1_mu( @@ -1915,7 +1915,7 @@ void test_vluxseg2ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m2_mu( @@ -1928,7 +1928,7 @@ void test_vluxseg2ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f16m4_mu( @@ -1941,7 +1941,7 @@ void test_vluxseg2ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vluxseg2ei16_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m1_mu( @@ -1967,7 +1967,7 @@ void test_vluxseg2ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m2_mu( @@ -1980,7 +1980,7 @@ void test_vluxseg2ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f32m4_mu( @@ -1993,7 +1993,7 @@ void test_vluxseg2ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m1_mu( @@ -2006,7 +2006,7 @@ void test_vluxseg2ei16_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m2_mu( @@ -2019,7 +2019,7 @@ void test_vluxseg2ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_f64m4_mu( @@ -2032,7 +2032,7 @@ void test_vluxseg2ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf8_mu( @@ -2045,7 +2045,7 @@ void test_vluxseg2ei16_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf4_mu( @@ -2058,7 +2058,7 @@ void test_vluxseg2ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8mf2_mu( @@ -2071,7 +2071,7 @@ void test_vluxseg2ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m1_mu( @@ -2084,7 +2084,7 @@ void test_vluxseg2ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m2_mu( @@ -2097,7 +2097,7 @@ void test_vluxseg2ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i8m4_mu( @@ -2110,7 +2110,7 @@ void test_vluxseg2ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf4_mu( @@ -2123,7 +2123,7 @@ void test_vluxseg2ei16_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16mf2_mu( @@ -2136,7 +2136,7 @@ void test_vluxseg2ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m1_mu( @@ -2149,7 +2149,7 @@ void test_vluxseg2ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m2_mu( @@ -2162,7 +2162,7 @@ void test_vluxseg2ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i16m4_mu( @@ -2175,7 +2175,7 @@ void test_vluxseg2ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32mf2_mu( @@ -2188,7 +2188,7 @@ void test_vluxseg2ei16_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m1_mu( @@ -2201,7 +2201,7 @@ void test_vluxseg2ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m2_mu( @@ -2214,7 +2214,7 @@ void test_vluxseg2ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i32m4_mu( @@ -2227,7 +2227,7 @@ void test_vluxseg2ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m1_mu( @@ -2240,7 +2240,7 @@ void test_vluxseg2ei16_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m2_mu( @@ -2253,7 +2253,7 @@ void test_vluxseg2ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_i64m4_mu( @@ -2266,7 +2266,7 @@ void test_vluxseg2ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf8_mu( @@ -2279,7 +2279,7 @@ void test_vluxseg2ei16_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf4_mu( @@ -2292,7 +2292,7 @@ void test_vluxseg2ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8mf2_mu( @@ -2305,7 +2305,7 @@ void test_vluxseg2ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m1_mu( @@ -2318,7 +2318,7 @@ void test_vluxseg2ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m2_mu( @@ -2331,7 +2331,7 @@ void test_vluxseg2ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u8m4_mu( @@ -2344,7 +2344,7 @@ void test_vluxseg2ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint16m8_t bindex, size_t vl) { - return vluxseg2ei16_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf4_mu( @@ -2357,7 +2357,7 @@ void test_vluxseg2ei16_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16mf2_mu( @@ -2370,7 +2370,7 @@ void test_vluxseg2ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m1_mu( @@ -2383,7 +2383,7 @@ void test_vluxseg2ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m2_mu( @@ -2396,7 +2396,7 @@ void test_vluxseg2ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u16m4_mu( @@ -2409,7 +2409,7 @@ void test_vluxseg2ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg2ei16_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32mf2_mu( @@ -2422,7 +2422,7 @@ void test_vluxseg2ei16_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m1_mu( @@ -2435,7 +2435,7 @@ void test_vluxseg2ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m2_mu( @@ -2448,7 +2448,7 @@ void test_vluxseg2ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u32m4_mu( @@ -2461,7 +2461,7 @@ void test_vluxseg2ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg2ei16_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m1_mu( @@ -2474,7 +2474,7 @@ void test_vluxseg2ei16_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m2_mu( @@ -2487,7 +2487,7 @@ void test_vluxseg2ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei16_v_u64m4_mu( @@ -2500,6 +2500,6 @@ void test_vluxseg2ei16_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei16_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg2ei16_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei16_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c index a3679cee4057280015f0e8a228c5308a973e3343..5ea59a775c5cc4fb1262c26abcf51a4432d1661b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei32.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vluxseg2ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vluxseg2ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vluxseg2ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m4_tu( @@ -69,7 +69,7 @@ void test_vluxseg2ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32mf2_tu( @@ -82,7 +82,7 @@ void test_vluxseg2ei32_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m1_tu( @@ -95,7 +95,7 @@ void test_vluxseg2ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m2_tu( @@ -108,7 +108,7 @@ void test_vluxseg2ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m4_tu( @@ -121,7 +121,7 @@ void test_vluxseg2ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m1_tu( @@ -134,7 +134,7 @@ void test_vluxseg2ei32_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m2_tu( @@ -147,7 +147,7 @@ void test_vluxseg2ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m4_tu( @@ -160,7 +160,7 @@ void test_vluxseg2ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf8_tu( @@ -173,7 +173,7 @@ void test_vluxseg2ei32_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf4_tu( @@ -186,7 +186,7 @@ void test_vluxseg2ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf2_tu( @@ -199,7 +199,7 @@ void test_vluxseg2ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m1_tu( @@ -212,7 +212,7 @@ void test_vluxseg2ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m2_tu( @@ -225,7 +225,7 @@ void test_vluxseg2ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf4_tu( @@ -238,7 +238,7 @@ void test_vluxseg2ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf2_tu( @@ -251,7 +251,7 @@ void test_vluxseg2ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m1_tu( @@ -264,7 +264,7 @@ void test_vluxseg2ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m2_tu( @@ -277,7 +277,7 @@ void test_vluxseg2ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m4_tu( @@ -290,7 +290,7 @@ void test_vluxseg2ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32mf2_tu( @@ -303,7 +303,7 @@ void test_vluxseg2ei32_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m1_tu( @@ -316,7 +316,7 @@ void test_vluxseg2ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m2_tu( @@ -329,7 +329,7 @@ void test_vluxseg2ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m4_tu( @@ -342,7 +342,7 @@ void test_vluxseg2ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m1_tu( @@ -355,7 +355,7 @@ void test_vluxseg2ei32_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m2_tu( @@ -368,7 +368,7 @@ void test_vluxseg2ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m4_tu( @@ -381,7 +381,7 @@ void test_vluxseg2ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf8_tu( @@ -394,7 +394,7 @@ void test_vluxseg2ei32_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf4_tu( @@ -407,7 +407,7 @@ void test_vluxseg2ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf2_tu( @@ -420,7 +420,7 @@ void test_vluxseg2ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m1_tu( @@ -433,7 +433,7 @@ void test_vluxseg2ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m2_tu( @@ -446,7 +446,7 @@ void test_vluxseg2ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf4_tu( @@ -459,7 +459,7 @@ void test_vluxseg2ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf2_tu( @@ -472,7 +472,7 @@ void test_vluxseg2ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m1_tu( @@ -485,7 +485,7 @@ void test_vluxseg2ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m2_tu( @@ -498,7 +498,7 @@ void test_vluxseg2ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m4_tu( @@ -511,7 +511,7 @@ void test_vluxseg2ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32mf2_tu( @@ -524,7 +524,7 @@ void test_vluxseg2ei32_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m1_tu( @@ -537,7 +537,7 @@ void test_vluxseg2ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m2_tu( @@ -550,7 +550,7 @@ void test_vluxseg2ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m4_tu( @@ -563,7 +563,7 @@ void test_vluxseg2ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m1_tu( @@ -576,7 +576,7 @@ void test_vluxseg2ei32_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m2_tu( @@ -589,7 +589,7 @@ void test_vluxseg2ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m4_tu( @@ -602,7 +602,7 @@ void test_vluxseg2ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf4_tum( @@ -615,7 +615,7 @@ void test_vluxseg2ei32_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf2_tum( @@ -628,7 +628,7 @@ void test_vluxseg2ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m1_tum( @@ -641,7 +641,7 @@ void test_vluxseg2ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m2_tum( @@ -654,7 +654,7 @@ void test_vluxseg2ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m4_tum( @@ -667,7 +667,7 @@ void test_vluxseg2ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32mf2_tum( @@ -680,7 +680,7 @@ void test_vluxseg2ei32_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m1_tum( @@ -693,7 +693,7 @@ void test_vluxseg2ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m2_tum( @@ -706,7 +706,7 @@ void test_vluxseg2ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m4_tum( @@ -719,7 +719,7 @@ void test_vluxseg2ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m1_tum( @@ -732,7 +732,7 @@ void test_vluxseg2ei32_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m2_tum( @@ -745,7 +745,7 @@ void test_vluxseg2ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m4_tum( @@ -758,7 +758,7 @@ void test_vluxseg2ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf8_tum( @@ -771,7 +771,7 @@ void test_vluxseg2ei32_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf4_tum( @@ -784,7 +784,7 @@ void test_vluxseg2ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf2_tum( @@ -797,7 +797,7 @@ void test_vluxseg2ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m1_tum( @@ -810,7 +810,7 @@ void test_vluxseg2ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m2_tum( @@ -823,7 +823,7 @@ void test_vluxseg2ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf4_tum( @@ -836,7 +836,7 @@ void test_vluxseg2ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf2_tum( @@ -849,7 +849,7 @@ void test_vluxseg2ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m1_tum( @@ -862,7 +862,7 @@ void test_vluxseg2ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m2_tum( @@ -875,7 +875,7 @@ void test_vluxseg2ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m4_tum( @@ -888,7 +888,7 @@ void test_vluxseg2ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32mf2_tum( @@ -901,7 +901,7 @@ void test_vluxseg2ei32_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m1_tum( @@ -914,7 +914,7 @@ void test_vluxseg2ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m2_tum( @@ -927,7 +927,7 @@ void test_vluxseg2ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m4_tum( @@ -940,7 +940,7 @@ void test_vluxseg2ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m1_tum( @@ -953,7 +953,7 @@ void test_vluxseg2ei32_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m2_tum( @@ -966,7 +966,7 @@ void test_vluxseg2ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m4_tum( @@ -979,7 +979,7 @@ void test_vluxseg2ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf8_tum( @@ -992,7 +992,7 @@ void test_vluxseg2ei32_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf4_tum( @@ -1005,7 +1005,7 @@ void test_vluxseg2ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf2_tum( @@ -1018,7 +1018,7 @@ void test_vluxseg2ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m1_tum( @@ -1031,7 +1031,7 @@ void test_vluxseg2ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m2_tum( @@ -1044,7 +1044,7 @@ void test_vluxseg2ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf4_tum( @@ -1057,7 +1057,7 @@ void test_vluxseg2ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf2_tum( @@ -1070,7 +1070,7 @@ void test_vluxseg2ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m1_tum( @@ -1083,7 +1083,7 @@ void test_vluxseg2ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m2_tum( @@ -1096,7 +1096,7 @@ void test_vluxseg2ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m4_tum( @@ -1109,7 +1109,7 @@ void test_vluxseg2ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32mf2_tum( @@ -1122,7 +1122,7 @@ void test_vluxseg2ei32_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m1_tum( @@ -1135,7 +1135,7 @@ void test_vluxseg2ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m2_tum( @@ -1148,7 +1148,7 @@ void test_vluxseg2ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m4_tum( @@ -1161,7 +1161,7 @@ void test_vluxseg2ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m1_tum( @@ -1174,7 +1174,7 @@ void test_vluxseg2ei32_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m2_tum( @@ -1187,7 +1187,7 @@ void test_vluxseg2ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m4_tum( @@ -1200,7 +1200,7 @@ void test_vluxseg2ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf4_tumu( @@ -1213,7 +1213,7 @@ void test_vluxseg2ei32_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf2_tumu( @@ -1226,7 +1226,7 @@ void test_vluxseg2ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vluxseg2ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m2_tumu( @@ -1252,7 +1252,7 @@ void test_vluxseg2ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m4_tumu( @@ -1265,7 +1265,7 @@ void test_vluxseg2ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32mf2_tumu( @@ -1278,7 +1278,7 @@ void test_vluxseg2ei32_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m1_tumu( @@ -1291,7 +1291,7 @@ void test_vluxseg2ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m2_tumu( @@ -1304,7 +1304,7 @@ void test_vluxseg2ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m4_tumu( @@ -1317,7 +1317,7 @@ void test_vluxseg2ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m1_tumu( @@ -1330,7 +1330,7 @@ void test_vluxseg2ei32_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m2_tumu( @@ -1343,7 +1343,7 @@ void test_vluxseg2ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m4_tumu( @@ -1356,7 +1356,7 @@ void test_vluxseg2ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf8_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg2ei32_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf4_tumu( @@ -1382,7 +1382,7 @@ void test_vluxseg2ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf2_tumu( @@ -1395,7 +1395,7 @@ void test_vluxseg2ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m1_tumu( @@ -1408,7 +1408,7 @@ void test_vluxseg2ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m2_tumu( @@ -1421,7 +1421,7 @@ void test_vluxseg2ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf4_tumu( @@ -1434,7 +1434,7 @@ void test_vluxseg2ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf2_tumu( @@ -1447,7 +1447,7 @@ void test_vluxseg2ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m1_tumu( @@ -1460,7 +1460,7 @@ void test_vluxseg2ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m2_tumu( @@ -1473,7 +1473,7 @@ void test_vluxseg2ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m4_tumu( @@ -1486,7 +1486,7 @@ void test_vluxseg2ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32mf2_tumu( @@ -1499,7 +1499,7 @@ void test_vluxseg2ei32_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m1_tumu( @@ -1512,7 +1512,7 @@ void test_vluxseg2ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m2_tumu( @@ -1525,7 +1525,7 @@ void test_vluxseg2ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m4_tumu( @@ -1538,7 +1538,7 @@ void test_vluxseg2ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m1_tumu( @@ -1551,7 +1551,7 @@ void test_vluxseg2ei32_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m2_tumu( @@ -1564,7 +1564,7 @@ void test_vluxseg2ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m4_tumu( @@ -1577,7 +1577,7 @@ void test_vluxseg2ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf8_tumu( @@ -1590,7 +1590,7 @@ void test_vluxseg2ei32_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf4_tumu( @@ -1603,7 +1603,7 @@ void test_vluxseg2ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf2_tumu( @@ -1616,7 +1616,7 @@ void test_vluxseg2ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m1_tumu( @@ -1629,7 +1629,7 @@ void test_vluxseg2ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m2_tumu( @@ -1642,7 +1642,7 @@ void test_vluxseg2ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf4_tumu( @@ -1655,7 +1655,7 @@ void test_vluxseg2ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf2_tumu( @@ -1668,7 +1668,7 @@ void test_vluxseg2ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m1_tumu( @@ -1681,7 +1681,7 @@ void test_vluxseg2ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m2_tumu( @@ -1694,7 +1694,7 @@ void test_vluxseg2ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m4_tumu( @@ -1707,7 +1707,7 @@ void test_vluxseg2ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32mf2_tumu( @@ -1720,7 +1720,7 @@ void test_vluxseg2ei32_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m1_tumu( @@ -1733,7 +1733,7 @@ void test_vluxseg2ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m2_tumu( @@ -1746,7 +1746,7 @@ void test_vluxseg2ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m4_tumu( @@ -1759,7 +1759,7 @@ void test_vluxseg2ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m1_tumu( @@ -1772,7 +1772,7 @@ void test_vluxseg2ei32_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m2_tumu( @@ -1785,7 +1785,7 @@ void test_vluxseg2ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m4_tumu( @@ -1798,7 +1798,7 @@ void test_vluxseg2ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf4_mu( @@ -1811,7 +1811,7 @@ void test_vluxseg2ei32_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16mf2_mu( @@ -1824,7 +1824,7 @@ void test_vluxseg2ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m1_mu( @@ -1837,7 +1837,7 @@ void test_vluxseg2ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m2_mu( @@ -1850,7 +1850,7 @@ void test_vluxseg2ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f16m4_mu( @@ -1863,7 +1863,7 @@ void test_vluxseg2ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32mf2_mu( @@ -1876,7 +1876,7 @@ void test_vluxseg2ei32_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m1_mu( @@ -1889,7 +1889,7 @@ void test_vluxseg2ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m2_mu( @@ -1902,7 +1902,7 @@ void test_vluxseg2ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f32m4_mu( @@ -1915,7 +1915,7 @@ void test_vluxseg2ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m1_mu( @@ -1928,7 +1928,7 @@ void test_vluxseg2ei32_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m2_mu( @@ -1941,7 +1941,7 @@ void test_vluxseg2ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_f64m4_mu( @@ -1954,7 +1954,7 @@ void test_vluxseg2ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf8_mu( @@ -1967,7 +1967,7 @@ void test_vluxseg2ei32_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf4_mu( @@ -1980,7 +1980,7 @@ void test_vluxseg2ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8mf2_mu( @@ -1993,7 +1993,7 @@ void test_vluxseg2ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m1_mu( @@ -2006,7 +2006,7 @@ void test_vluxseg2ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i8m2_mu( @@ -2019,7 +2019,7 @@ void test_vluxseg2ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf4_mu( @@ -2032,7 +2032,7 @@ void test_vluxseg2ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16mf2_mu( @@ -2045,7 +2045,7 @@ void test_vluxseg2ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m1_mu( @@ -2058,7 +2058,7 @@ void test_vluxseg2ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m2_mu( @@ -2071,7 +2071,7 @@ void test_vluxseg2ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i16m4_mu( @@ -2084,7 +2084,7 @@ void test_vluxseg2ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32mf2_mu( @@ -2097,7 +2097,7 @@ void test_vluxseg2ei32_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m1_mu( @@ -2110,7 +2110,7 @@ void test_vluxseg2ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m2_mu( @@ -2123,7 +2123,7 @@ void test_vluxseg2ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i32m4_mu( @@ -2136,7 +2136,7 @@ void test_vluxseg2ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m1_mu( @@ -2149,7 +2149,7 @@ void test_vluxseg2ei32_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m2_mu( @@ -2162,7 +2162,7 @@ void test_vluxseg2ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_i64m4_mu( @@ -2175,7 +2175,7 @@ void test_vluxseg2ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf8_mu( @@ -2188,7 +2188,7 @@ void test_vluxseg2ei32_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf4_mu( @@ -2201,7 +2201,7 @@ void test_vluxseg2ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8mf2_mu( @@ -2214,7 +2214,7 @@ void test_vluxseg2ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m1_mu( @@ -2227,7 +2227,7 @@ void test_vluxseg2ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u8m2_mu( @@ -2240,7 +2240,7 @@ void test_vluxseg2ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf4_mu( @@ -2253,7 +2253,7 @@ void test_vluxseg2ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16mf2_mu( @@ -2266,7 +2266,7 @@ void test_vluxseg2ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m1_mu( @@ -2279,7 +2279,7 @@ void test_vluxseg2ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m2_mu( @@ -2292,7 +2292,7 @@ void test_vluxseg2ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u16m4_mu( @@ -2305,7 +2305,7 @@ void test_vluxseg2ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg2ei32_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32mf2_mu( @@ -2318,7 +2318,7 @@ void test_vluxseg2ei32_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m1_mu( @@ -2331,7 +2331,7 @@ void test_vluxseg2ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m2_mu( @@ -2344,7 +2344,7 @@ void test_vluxseg2ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u32m4_mu( @@ -2357,7 +2357,7 @@ void test_vluxseg2ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg2ei32_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m1_mu( @@ -2370,7 +2370,7 @@ void test_vluxseg2ei32_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m2_mu( @@ -2383,7 +2383,7 @@ void test_vluxseg2ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei32_v_u64m4_mu( @@ -2396,6 +2396,6 @@ void test_vluxseg2ei32_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei32_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg2ei32_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei32_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c index 1b067687bcd9d86f617c7b9f9be595df75e5d629..5ca087f80ce8d6d0f274e78287ad30cdaadd7fa0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei64.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vluxseg2ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vluxseg2ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vluxseg2ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32mf2_tu( @@ -69,7 +69,7 @@ void test_vluxseg2ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m1_tu( @@ -82,7 +82,7 @@ void test_vluxseg2ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m2_tu( @@ -95,7 +95,7 @@ void test_vluxseg2ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m4_tu( @@ -108,7 +108,7 @@ void test_vluxseg2ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m1_tu( @@ -121,7 +121,7 @@ void test_vluxseg2ei64_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m2_tu( @@ -134,7 +134,7 @@ void test_vluxseg2ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m4_tu( @@ -147,7 +147,7 @@ void test_vluxseg2ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf8_tu( @@ -160,7 +160,7 @@ void test_vluxseg2ei64_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf4_tu( @@ -173,7 +173,7 @@ void test_vluxseg2ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf2_tu( @@ -186,7 +186,7 @@ void test_vluxseg2ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vluxseg2ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf4_tu( @@ -212,7 +212,7 @@ void test_vluxseg2ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedo // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf2_tu( @@ -225,7 +225,7 @@ void test_vluxseg2ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m1_tu( @@ -238,7 +238,7 @@ void test_vluxseg2ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m2_tu( @@ -251,7 +251,7 @@ void test_vluxseg2ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32mf2_tu( @@ -264,7 +264,7 @@ void test_vluxseg2ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m1_tu( @@ -277,7 +277,7 @@ void test_vluxseg2ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m2_tu( @@ -290,7 +290,7 @@ void test_vluxseg2ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m4_tu( @@ -303,7 +303,7 @@ void test_vluxseg2ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m1_tu( @@ -316,7 +316,7 @@ void test_vluxseg2ei64_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m2_tu( @@ -329,7 +329,7 @@ void test_vluxseg2ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m4_tu( @@ -342,7 +342,7 @@ void test_vluxseg2ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf8_tu( @@ -355,7 +355,7 @@ void test_vluxseg2ei64_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf4_tu( @@ -368,7 +368,7 @@ void test_vluxseg2ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf2_tu( @@ -381,7 +381,7 @@ void test_vluxseg2ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8m1_tu( @@ -394,7 +394,7 @@ void test_vluxseg2ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf4_tu( @@ -407,7 +407,7 @@ void test_vluxseg2ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf2_tu( @@ -420,7 +420,7 @@ void test_vluxseg2ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m1_tu( @@ -433,7 +433,7 @@ void test_vluxseg2ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m2_tu( @@ -446,7 +446,7 @@ void test_vluxseg2ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32mf2_tu( @@ -459,7 +459,7 @@ void test_vluxseg2ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m1_tu( @@ -472,7 +472,7 @@ void test_vluxseg2ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m2_tu( @@ -485,7 +485,7 @@ void test_vluxseg2ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m4_tu( @@ -498,7 +498,7 @@ void test_vluxseg2ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m1_tu( @@ -511,7 +511,7 @@ void test_vluxseg2ei64_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m2_tu( @@ -524,7 +524,7 @@ void test_vluxseg2ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m4_tu( @@ -537,7 +537,7 @@ void test_vluxseg2ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf4_tum( @@ -550,7 +550,7 @@ void test_vluxseg2ei64_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf2_tum( @@ -563,7 +563,7 @@ void test_vluxseg2ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m1_tum( @@ -576,7 +576,7 @@ void test_vluxseg2ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m2_tum( @@ -589,7 +589,7 @@ void test_vluxseg2ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32mf2_tum( @@ -602,7 +602,7 @@ void test_vluxseg2ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m1_tum( @@ -615,7 +615,7 @@ void test_vluxseg2ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m2_tum( @@ -628,7 +628,7 @@ void test_vluxseg2ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m4_tum( @@ -641,7 +641,7 @@ void test_vluxseg2ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m1_tum( @@ -654,7 +654,7 @@ void test_vluxseg2ei64_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m2_tum( @@ -667,7 +667,7 @@ void test_vluxseg2ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m4_tum( @@ -680,7 +680,7 @@ void test_vluxseg2ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf8_tum( @@ -693,7 +693,7 @@ void test_vluxseg2ei64_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf4_tum( @@ -706,7 +706,7 @@ void test_vluxseg2ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf2_tum( @@ -719,7 +719,7 @@ void test_vluxseg2ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8m1_tum( @@ -732,7 +732,7 @@ void test_vluxseg2ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf4_tum( @@ -745,7 +745,7 @@ void test_vluxseg2ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf2_tum( @@ -758,7 +758,7 @@ void test_vluxseg2ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m1_tum( @@ -771,7 +771,7 @@ void test_vluxseg2ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m2_tum( @@ -784,7 +784,7 @@ void test_vluxseg2ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32mf2_tum( @@ -797,7 +797,7 @@ void test_vluxseg2ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m1_tum( @@ -810,7 +810,7 @@ void test_vluxseg2ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m2_tum( @@ -823,7 +823,7 @@ void test_vluxseg2ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m4_tum( @@ -836,7 +836,7 @@ void test_vluxseg2ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m1_tum( @@ -849,7 +849,7 @@ void test_vluxseg2ei64_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m2_tum( @@ -862,7 +862,7 @@ void test_vluxseg2ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m4_tum( @@ -875,7 +875,7 @@ void test_vluxseg2ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf8_tum( @@ -888,7 +888,7 @@ void test_vluxseg2ei64_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf4_tum( @@ -901,7 +901,7 @@ void test_vluxseg2ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf2_tum( @@ -914,7 +914,7 @@ void test_vluxseg2ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8m1_tum( @@ -927,7 +927,7 @@ void test_vluxseg2ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf4_tum( @@ -940,7 +940,7 @@ void test_vluxseg2ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf2_tum( @@ -953,7 +953,7 @@ void test_vluxseg2ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m1_tum( @@ -966,7 +966,7 @@ void test_vluxseg2ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m2_tum( @@ -979,7 +979,7 @@ void test_vluxseg2ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32mf2_tum( @@ -992,7 +992,7 @@ void test_vluxseg2ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m1_tum( @@ -1005,7 +1005,7 @@ void test_vluxseg2ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m2_tum( @@ -1018,7 +1018,7 @@ void test_vluxseg2ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m4_tum( @@ -1031,7 +1031,7 @@ void test_vluxseg2ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m1_tum( @@ -1044,7 +1044,7 @@ void test_vluxseg2ei64_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m2_tum( @@ -1057,7 +1057,7 @@ void test_vluxseg2ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m4_tum( @@ -1070,7 +1070,7 @@ void test_vluxseg2ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf4_tumu( @@ -1083,7 +1083,7 @@ void test_vluxseg2ei64_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf2_tumu( @@ -1096,7 +1096,7 @@ void test_vluxseg2ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m1_tumu( @@ -1109,7 +1109,7 @@ void test_vluxseg2ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m2_tumu( @@ -1122,7 +1122,7 @@ void test_vluxseg2ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32mf2_tumu( @@ -1135,7 +1135,7 @@ void test_vluxseg2ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m1_tumu( @@ -1148,7 +1148,7 @@ void test_vluxseg2ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m2_tumu( @@ -1161,7 +1161,7 @@ void test_vluxseg2ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m4_tumu( @@ -1174,7 +1174,7 @@ void test_vluxseg2ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m1_tumu( @@ -1187,7 +1187,7 @@ void test_vluxseg2ei64_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m2_tumu( @@ -1200,7 +1200,7 @@ void test_vluxseg2ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m4_tumu( @@ -1213,7 +1213,7 @@ void test_vluxseg2ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf8_tumu( @@ -1226,7 +1226,7 @@ void test_vluxseg2ei64_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf4_tumu( @@ -1239,7 +1239,7 @@ void test_vluxseg2ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf2_tumu( @@ -1252,7 +1252,7 @@ void test_vluxseg2ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8m1_tumu( @@ -1265,7 +1265,7 @@ void test_vluxseg2ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf4_tumu( @@ -1278,7 +1278,7 @@ void test_vluxseg2ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf2_tumu( @@ -1291,7 +1291,7 @@ void test_vluxseg2ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m1_tumu( @@ -1304,7 +1304,7 @@ void test_vluxseg2ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m2_tumu( @@ -1317,7 +1317,7 @@ void test_vluxseg2ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32mf2_tumu( @@ -1330,7 +1330,7 @@ void test_vluxseg2ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m1_tumu( @@ -1343,7 +1343,7 @@ void test_vluxseg2ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m2_tumu( @@ -1356,7 +1356,7 @@ void test_vluxseg2ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m4_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg2ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m1_tumu( @@ -1382,7 +1382,7 @@ void test_vluxseg2ei64_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m2_tumu( @@ -1395,7 +1395,7 @@ void test_vluxseg2ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m4_tumu( @@ -1408,7 +1408,7 @@ void test_vluxseg2ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf8_tumu( @@ -1421,7 +1421,7 @@ void test_vluxseg2ei64_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf4_tumu( @@ -1434,7 +1434,7 @@ void test_vluxseg2ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf2_tumu( @@ -1447,7 +1447,7 @@ void test_vluxseg2ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8m1_tumu( @@ -1460,7 +1460,7 @@ void test_vluxseg2ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf4_tumu( @@ -1473,7 +1473,7 @@ void test_vluxseg2ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf2_tumu( @@ -1486,7 +1486,7 @@ void test_vluxseg2ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vluxseg2ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m2_tumu( @@ -1512,7 +1512,7 @@ void test_vluxseg2ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32mf2_tumu( @@ -1525,7 +1525,7 @@ void test_vluxseg2ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m1_tumu( @@ -1538,7 +1538,7 @@ void test_vluxseg2ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m2_tumu( @@ -1551,7 +1551,7 @@ void test_vluxseg2ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m4_tumu( @@ -1564,7 +1564,7 @@ void test_vluxseg2ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m1_tumu( @@ -1577,7 +1577,7 @@ void test_vluxseg2ei64_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m2_tumu( @@ -1590,7 +1590,7 @@ void test_vluxseg2ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m4_tumu( @@ -1603,7 +1603,7 @@ void test_vluxseg2ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf4_mu( @@ -1616,7 +1616,7 @@ void test_vluxseg2ei64_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16mf2_mu( @@ -1629,7 +1629,7 @@ void test_vluxseg2ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m1_mu( @@ -1642,7 +1642,7 @@ void test_vluxseg2ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f16m2_mu( @@ -1655,7 +1655,7 @@ void test_vluxseg2ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32mf2_mu( @@ -1668,7 +1668,7 @@ void test_vluxseg2ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m1_mu( @@ -1681,7 +1681,7 @@ void test_vluxseg2ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m2_mu( @@ -1694,7 +1694,7 @@ void test_vluxseg2ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f32m4_mu( @@ -1707,7 +1707,7 @@ void test_vluxseg2ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m1_mu( @@ -1720,7 +1720,7 @@ void test_vluxseg2ei64_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m2_mu( @@ -1733,7 +1733,7 @@ void test_vluxseg2ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_f64m4_mu( @@ -1746,7 +1746,7 @@ void test_vluxseg2ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf8_mu( @@ -1759,7 +1759,7 @@ void test_vluxseg2ei64_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf4_mu( @@ -1772,7 +1772,7 @@ void test_vluxseg2ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8mf2_mu( @@ -1785,7 +1785,7 @@ void test_vluxseg2ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i8m1_mu( @@ -1798,7 +1798,7 @@ void test_vluxseg2ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf4_mu( @@ -1811,7 +1811,7 @@ void test_vluxseg2ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16mf2_mu( @@ -1824,7 +1824,7 @@ void test_vluxseg2ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m1_mu( @@ -1837,7 +1837,7 @@ void test_vluxseg2ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i16m2_mu( @@ -1850,7 +1850,7 @@ void test_vluxseg2ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32mf2_mu( @@ -1863,7 +1863,7 @@ void test_vluxseg2ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m1_mu( @@ -1876,7 +1876,7 @@ void test_vluxseg2ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m2_mu( @@ -1889,7 +1889,7 @@ void test_vluxseg2ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i32m4_mu( @@ -1902,7 +1902,7 @@ void test_vluxseg2ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m1_mu( @@ -1915,7 +1915,7 @@ void test_vluxseg2ei64_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m2_mu( @@ -1928,7 +1928,7 @@ void test_vluxseg2ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_i64m4_mu( @@ -1941,7 +1941,7 @@ void test_vluxseg2ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf8_mu( @@ -1954,7 +1954,7 @@ void test_vluxseg2ei64_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf4_mu( @@ -1967,7 +1967,7 @@ void test_vluxseg2ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8mf2_mu( @@ -1980,7 +1980,7 @@ void test_vluxseg2ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u8m1_mu( @@ -1993,7 +1993,7 @@ void test_vluxseg2ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf4_mu( @@ -2006,7 +2006,7 @@ void test_vluxseg2ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16mf2_mu( @@ -2019,7 +2019,7 @@ void test_vluxseg2ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m1_mu( @@ -2032,7 +2032,7 @@ void test_vluxseg2ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u16m2_mu( @@ -2045,7 +2045,7 @@ void test_vluxseg2ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32mf2_mu( @@ -2058,7 +2058,7 @@ void test_vluxseg2ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m1_mu( @@ -2071,7 +2071,7 @@ void test_vluxseg2ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m2_mu( @@ -2084,7 +2084,7 @@ void test_vluxseg2ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u32m4_mu( @@ -2097,7 +2097,7 @@ void test_vluxseg2ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg2ei64_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m1_mu( @@ -2110,7 +2110,7 @@ void test_vluxseg2ei64_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m2_mu( @@ -2123,7 +2123,7 @@ void test_vluxseg2ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei64_v_u64m4_mu( @@ -2136,6 +2136,6 @@ void test_vluxseg2ei64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei64_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg2ei64_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei64_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c index 9fb1a2f180f72f4e67cc6a27104e500fe23b379c..eb3f67c5b7868961a109c63299f57c468023b1b7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg2ei8.c @@ -17,7 +17,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf2_tu( @@ -30,7 +30,7 @@ void test_vluxseg2ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m1_tu( @@ -43,7 +43,7 @@ void test_vluxseg2ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m2_tu( @@ -56,7 +56,7 @@ void test_vluxseg2ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m4_tu( @@ -69,7 +69,7 @@ void test_vluxseg2ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32mf2_tu( @@ -82,7 +82,7 @@ void test_vluxseg2ei8_v_f16m4_tu(vfloat16m4_t *v0, vfloat16m4_t *v1, vfloat16m4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m1_tu( @@ -95,7 +95,7 @@ void test_vluxseg2ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m2_tu( @@ -108,7 +108,7 @@ void test_vluxseg2ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m4_tu( @@ -121,7 +121,7 @@ void test_vluxseg2ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m1_tu( @@ -134,7 +134,7 @@ void test_vluxseg2ei8_v_f32m4_tu(vfloat32m4_t *v0, vfloat32m4_t *v1, vfloat32m4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m2_tu( @@ -147,7 +147,7 @@ void test_vluxseg2ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m4_tu( @@ -160,7 +160,7 @@ void test_vluxseg2ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf8_tu( @@ -173,7 +173,7 @@ void test_vluxseg2ei8_v_f64m4_tu(vfloat64m4_t *v0, vfloat64m4_t *v1, vfloat64m4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf4_tu( @@ -186,7 +186,7 @@ void test_vluxseg2ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf2_tu( @@ -199,7 +199,7 @@ void test_vluxseg2ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m1_tu( @@ -212,7 +212,7 @@ void test_vluxseg2ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m2_tu( @@ -225,7 +225,7 @@ void test_vluxseg2ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t maskedof // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m4_tu( @@ -238,7 +238,7 @@ void test_vluxseg2ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t maskedof // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf4_tu( @@ -251,7 +251,7 @@ void test_vluxseg2ei8_v_i8m4_tu(vint8m4_t *v0, vint8m4_t *v1, vint8m4_t maskedof // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf2_tu( @@ -264,7 +264,7 @@ void test_vluxseg2ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vluxseg2ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m2_tu( @@ -290,7 +290,7 @@ void test_vluxseg2ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m4_tu( @@ -303,7 +303,7 @@ void test_vluxseg2ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32mf2_tu( @@ -316,7 +316,7 @@ void test_vluxseg2ei8_v_i16m4_tu(vint16m4_t *v0, vint16m4_t *v1, vint16m4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m1_tu( @@ -329,7 +329,7 @@ void test_vluxseg2ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m2_tu( @@ -342,7 +342,7 @@ void test_vluxseg2ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m4_tu( @@ -355,7 +355,7 @@ void test_vluxseg2ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m1_tu( @@ -368,7 +368,7 @@ void test_vluxseg2ei8_v_i32m4_tu(vint32m4_t *v0, vint32m4_t *v1, vint32m4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m2_tu( @@ -381,7 +381,7 @@ void test_vluxseg2ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m4_tu( @@ -394,7 +394,7 @@ void test_vluxseg2ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf8_tu( @@ -407,7 +407,7 @@ void test_vluxseg2ei8_v_i64m4_tu(vint64m4_t *v0, vint64m4_t *v1, vint64m4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf8_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf4_tu( @@ -420,7 +420,7 @@ void test_vluxseg2ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf2_tu( @@ -433,7 +433,7 @@ void test_vluxseg2ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m1_tu( @@ -446,7 +446,7 @@ void test_vluxseg2ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m2_tu( @@ -459,7 +459,7 @@ void test_vluxseg2ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t maske // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m4_tu( @@ -472,7 +472,7 @@ void test_vluxseg2ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t maske // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf4_tu( @@ -485,7 +485,7 @@ void test_vluxseg2ei8_v_u8m4_tu(vuint8m4_t *v0, vuint8m4_t *v1, vuint8m4_t maske // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf2_tu( @@ -498,7 +498,7 @@ void test_vluxseg2ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m1_tu( @@ -511,7 +511,7 @@ void test_vluxseg2ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m2_tu( @@ -524,7 +524,7 @@ void test_vluxseg2ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m4_tu( @@ -537,7 +537,7 @@ void test_vluxseg2ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32mf2_tu( @@ -550,7 +550,7 @@ void test_vluxseg2ei8_v_u16m4_tu(vuint16m4_t *v0, vuint16m4_t *v1, vuint16m4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32mf2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m1_tu( @@ -563,7 +563,7 @@ void test_vluxseg2ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m2_tu( @@ -576,7 +576,7 @@ void test_vluxseg2ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m4_tu( @@ -589,7 +589,7 @@ void test_vluxseg2ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vluxseg2ei8_v_u32m4_tu(vuint32m4_t *v0, vuint32m4_t *v1, vuint32m4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m1_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m2_tu( @@ -615,7 +615,7 @@ void test_vluxseg2ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m2_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m4_tu( @@ -628,7 +628,7 @@ void test_vluxseg2ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m4_tu(v0, v1, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf4_tum( @@ -641,7 +641,7 @@ void test_vluxseg2ei8_v_u64m4_tu(vuint64m4_t *v0, vuint64m4_t *v1, vuint64m4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf2_tum( @@ -654,7 +654,7 @@ void test_vluxseg2ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m1_tum( @@ -667,7 +667,7 @@ void test_vluxseg2ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m2_tum( @@ -680,7 +680,7 @@ void test_vluxseg2ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m4_tum( @@ -693,7 +693,7 @@ void test_vluxseg2ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32mf2_tum( @@ -706,7 +706,7 @@ void test_vluxseg2ei8_v_f16m4_tum(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m1_tum( @@ -719,7 +719,7 @@ void test_vluxseg2ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m2_tum( @@ -732,7 +732,7 @@ void test_vluxseg2ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m4_tum( @@ -745,7 +745,7 @@ void test_vluxseg2ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m1_tum( @@ -758,7 +758,7 @@ void test_vluxseg2ei8_v_f32m4_tum(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m2_tum( @@ -771,7 +771,7 @@ void test_vluxseg2ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m4_tum( @@ -784,7 +784,7 @@ void test_vluxseg2ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf8_tum( @@ -797,7 +797,7 @@ void test_vluxseg2ei8_v_f64m4_tum(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf4_tum( @@ -810,7 +810,7 @@ void test_vluxseg2ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf2_tum( @@ -823,7 +823,7 @@ void test_vluxseg2ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m1_tum( @@ -836,7 +836,7 @@ void test_vluxseg2ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m2_tum( @@ -849,7 +849,7 @@ void test_vluxseg2ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m4_tum( @@ -862,7 +862,7 @@ void test_vluxseg2ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf4_tum( @@ -875,7 +875,7 @@ void test_vluxseg2ei8_v_i8m4_tum(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf2_tum( @@ -888,7 +888,7 @@ void test_vluxseg2ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vluxseg2ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m2_tum( @@ -914,7 +914,7 @@ void test_vluxseg2ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m4_tum( @@ -927,7 +927,7 @@ void test_vluxseg2ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32mf2_tum( @@ -940,7 +940,7 @@ void test_vluxseg2ei8_v_i16m4_tum(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m1_tum( @@ -953,7 +953,7 @@ void test_vluxseg2ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m2_tum( @@ -966,7 +966,7 @@ void test_vluxseg2ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m4_tum( @@ -979,7 +979,7 @@ void test_vluxseg2ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m1_tum( @@ -992,7 +992,7 @@ void test_vluxseg2ei8_v_i32m4_tum(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m2_tum( @@ -1005,7 +1005,7 @@ void test_vluxseg2ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m4_tum( @@ -1018,7 +1018,7 @@ void test_vluxseg2ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf8_tum( @@ -1031,7 +1031,7 @@ void test_vluxseg2ei8_v_i64m4_tum(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf8_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf4_tum( @@ -1044,7 +1044,7 @@ void test_vluxseg2ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf2_tum( @@ -1057,7 +1057,7 @@ void test_vluxseg2ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m1_tum( @@ -1070,7 +1070,7 @@ void test_vluxseg2ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m2_tum( @@ -1083,7 +1083,7 @@ void test_vluxseg2ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m4_tum( @@ -1096,7 +1096,7 @@ void test_vluxseg2ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf4_tum( @@ -1109,7 +1109,7 @@ void test_vluxseg2ei8_v_u8m4_tum(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf2_tum( @@ -1122,7 +1122,7 @@ void test_vluxseg2ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m1_tum( @@ -1135,7 +1135,7 @@ void test_vluxseg2ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m2_tum( @@ -1148,7 +1148,7 @@ void test_vluxseg2ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m4_tum( @@ -1161,7 +1161,7 @@ void test_vluxseg2ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32mf2_tum( @@ -1174,7 +1174,7 @@ void test_vluxseg2ei8_v_u16m4_tum(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32mf2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m1_tum( @@ -1187,7 +1187,7 @@ void test_vluxseg2ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m2_tum( @@ -1200,7 +1200,7 @@ void test_vluxseg2ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m4_tum( @@ -1213,7 +1213,7 @@ void test_vluxseg2ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m1_tum( @@ -1226,7 +1226,7 @@ void test_vluxseg2ei8_v_u32m4_tum(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m1_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m2_tum( @@ -1239,7 +1239,7 @@ void test_vluxseg2ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m2_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m4_tum( @@ -1252,7 +1252,7 @@ void test_vluxseg2ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m4_tum(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf4_tumu( @@ -1265,7 +1265,7 @@ void test_vluxseg2ei8_v_u64m4_tum(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf2_tumu( @@ -1278,7 +1278,7 @@ void test_vluxseg2ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m1_tumu( @@ -1291,7 +1291,7 @@ void test_vluxseg2ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool3 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m2_tumu( @@ -1304,7 +1304,7 @@ void test_vluxseg2ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m4_tumu( @@ -1317,7 +1317,7 @@ void test_vluxseg2ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32mf2_tumu( @@ -1330,7 +1330,7 @@ void test_vluxseg2ei8_v_f16m4_tumu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m1_tumu( @@ -1343,7 +1343,7 @@ void test_vluxseg2ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool6 // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m2_tumu( @@ -1356,7 +1356,7 @@ void test_vluxseg2ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m4_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg2ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m1_tumu( @@ -1382,7 +1382,7 @@ void test_vluxseg2ei8_v_f32m4_tumu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m2_tumu( @@ -1395,7 +1395,7 @@ void test_vluxseg2ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m4_tumu( @@ -1408,7 +1408,7 @@ void test_vluxseg2ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf8_tumu( @@ -1421,7 +1421,7 @@ void test_vluxseg2ei8_v_f64m4_tumu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf4_tumu( @@ -1434,7 +1434,7 @@ void test_vluxseg2ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf2_tumu( @@ -1447,7 +1447,7 @@ void test_vluxseg2ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m1_tumu( @@ -1460,7 +1460,7 @@ void test_vluxseg2ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m2_tumu( @@ -1473,7 +1473,7 @@ void test_vluxseg2ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m4_tumu( @@ -1486,7 +1486,7 @@ void test_vluxseg2ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf4_tumu( @@ -1499,7 +1499,7 @@ void test_vluxseg2ei8_v_i8m4_tumu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf2_tumu( @@ -1512,7 +1512,7 @@ void test_vluxseg2ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m1_tumu( @@ -1525,7 +1525,7 @@ void test_vluxseg2ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m2_tumu( @@ -1538,7 +1538,7 @@ void test_vluxseg2ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m4_tumu( @@ -1551,7 +1551,7 @@ void test_vluxseg2ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vluxseg2ei8_v_i16m4_tumu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m1_tumu( @@ -1577,7 +1577,7 @@ void test_vluxseg2ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m2_tumu( @@ -1590,7 +1590,7 @@ void test_vluxseg2ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m4_tumu( @@ -1603,7 +1603,7 @@ void test_vluxseg2ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m1_tumu( @@ -1616,7 +1616,7 @@ void test_vluxseg2ei8_v_i32m4_tumu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m2_tumu( @@ -1629,7 +1629,7 @@ void test_vluxseg2ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m4_tumu( @@ -1642,7 +1642,7 @@ void test_vluxseg2ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf8_tumu( @@ -1655,7 +1655,7 @@ void test_vluxseg2ei8_v_i64m4_tumu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf8_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf4_tumu( @@ -1668,7 +1668,7 @@ void test_vluxseg2ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf2_tumu( @@ -1681,7 +1681,7 @@ void test_vluxseg2ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m1_tumu( @@ -1694,7 +1694,7 @@ void test_vluxseg2ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m2_tumu( @@ -1707,7 +1707,7 @@ void test_vluxseg2ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m4_tumu( @@ -1720,7 +1720,7 @@ void test_vluxseg2ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf4_tumu( @@ -1733,7 +1733,7 @@ void test_vluxseg2ei8_v_u8m4_tumu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf2_tumu( @@ -1746,7 +1746,7 @@ void test_vluxseg2ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m1_tumu( @@ -1759,7 +1759,7 @@ void test_vluxseg2ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m2_tumu( @@ -1772,7 +1772,7 @@ void test_vluxseg2ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m4_tumu( @@ -1785,7 +1785,7 @@ void test_vluxseg2ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32mf2_tumu( @@ -1798,7 +1798,7 @@ void test_vluxseg2ei8_v_u16m4_tumu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32mf2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m1_tumu( @@ -1811,7 +1811,7 @@ void test_vluxseg2ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m2_tumu( @@ -1824,7 +1824,7 @@ void test_vluxseg2ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m4_tumu( @@ -1837,7 +1837,7 @@ void test_vluxseg2ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m1_tumu( @@ -1850,7 +1850,7 @@ void test_vluxseg2ei8_v_u32m4_tumu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m1_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m2_tumu( @@ -1863,7 +1863,7 @@ void test_vluxseg2ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m2_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m4_tumu( @@ -1876,7 +1876,7 @@ void test_vluxseg2ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m4_tumu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf4_mu( @@ -1889,7 +1889,7 @@ void test_vluxseg2ei8_v_u64m4_tumu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16mf2_mu( @@ -1902,7 +1902,7 @@ void test_vluxseg2ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m1_mu( @@ -1915,7 +1915,7 @@ void test_vluxseg2ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vbool32_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m2_mu( @@ -1928,7 +1928,7 @@ void test_vluxseg2ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f16m4_mu( @@ -1941,7 +1941,7 @@ void test_vluxseg2ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t mask, vfloat16m4_t maskedoff0, vfloat16m4_t maskedoff1, const _Float16 *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vluxseg2ei8_v_f16m4_mu(vfloat16m4_t *v0, vfloat16m4_t *v1, vbool4_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m1_mu( @@ -1967,7 +1967,7 @@ void test_vluxseg2ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vbool64_ // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m2_mu( @@ -1980,7 +1980,7 @@ void test_vluxseg2ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f32m4_mu( @@ -1993,7 +1993,7 @@ void test_vluxseg2ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t mask, vfloat32m4_t maskedoff0, vfloat32m4_t maskedoff1, const float *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m1_mu( @@ -2006,7 +2006,7 @@ void test_vluxseg2ei8_v_f32m4_mu(vfloat32m4_t *v0, vfloat32m4_t *v1, vbool8_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m2_mu( @@ -2019,7 +2019,7 @@ void test_vluxseg2ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vbool64_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_f64m4_mu( @@ -2032,7 +2032,7 @@ void test_vluxseg2ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vbool32_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t mask, vfloat64m4_t maskedoff0, vfloat64m4_t maskedoff1, const double *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_f64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf8_mu( @@ -2045,7 +2045,7 @@ void test_vluxseg2ei8_v_f64m4_mu(vfloat64m4_t *v0, vfloat64m4_t *v1, vbool16_t m // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf4_mu( @@ -2058,7 +2058,7 @@ void test_vluxseg2ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8mf2_mu( @@ -2071,7 +2071,7 @@ void test_vluxseg2ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m1_mu( @@ -2084,7 +2084,7 @@ void test_vluxseg2ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m2_mu( @@ -2097,7 +2097,7 @@ void test_vluxseg2ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vbool8_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i8m4_mu( @@ -2110,7 +2110,7 @@ void test_vluxseg2ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vbool4_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vint8m4_t maskedoff0, vint8m4_t maskedoff1, const int8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf4_mu( @@ -2123,7 +2123,7 @@ void test_vluxseg2ei8_v_i8m4_mu(vint8m4_t *v0, vint8m4_t *v1, vbool2_t mask, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16mf2_mu( @@ -2136,7 +2136,7 @@ void test_vluxseg2ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m1_mu( @@ -2149,7 +2149,7 @@ void test_vluxseg2ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vbool32_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m2_mu( @@ -2162,7 +2162,7 @@ void test_vluxseg2ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i16m4_mu( @@ -2175,7 +2175,7 @@ void test_vluxseg2ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, vint16m4_t maskedoff0, vint16m4_t maskedoff1, const int16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32mf2_mu( @@ -2188,7 +2188,7 @@ void test_vluxseg2ei8_v_i16m4_mu(vint16m4_t *v0, vint16m4_t *v1, vbool4_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m1_mu( @@ -2201,7 +2201,7 @@ void test_vluxseg2ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vbool64_t ma // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m2_mu( @@ -2214,7 +2214,7 @@ void test_vluxseg2ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i32m4_mu( @@ -2227,7 +2227,7 @@ void test_vluxseg2ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, vint32m4_t maskedoff0, vint32m4_t maskedoff1, const int32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m1_mu( @@ -2240,7 +2240,7 @@ void test_vluxseg2ei8_v_i32m4_mu(vint32m4_t *v0, vint32m4_t *v1, vbool8_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m2_mu( @@ -2253,7 +2253,7 @@ void test_vluxseg2ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vbool64_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_i64m4_mu( @@ -2266,7 +2266,7 @@ void test_vluxseg2ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vbool32_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, vint64m4_t maskedoff0, vint64m4_t maskedoff1, const int64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_i64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf8_mu( @@ -2279,7 +2279,7 @@ void test_vluxseg2ei8_v_i64m4_mu(vint64m4_t *v0, vint64m4_t *v1, vbool16_t mask, // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf8_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf4_mu( @@ -2292,7 +2292,7 @@ void test_vluxseg2ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8mf2_mu( @@ -2305,7 +2305,7 @@ void test_vluxseg2ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m1_mu( @@ -2318,7 +2318,7 @@ void test_vluxseg2ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m2_mu( @@ -2331,7 +2331,7 @@ void test_vluxseg2ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vbool8_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u8m4_mu( @@ -2344,7 +2344,7 @@ void test_vluxseg2ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vbool4_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, vuint8m4_t maskedoff0, vuint8m4_t maskedoff1, const uint8_t *base, vuint8m4_t bindex, size_t vl) { - return vluxseg2ei8_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u8m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf4_mu( @@ -2357,7 +2357,7 @@ void test_vluxseg2ei8_v_u8m4_mu(vuint8m4_t *v0, vuint8m4_t *v1, vbool2_t mask, v // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16mf2_mu( @@ -2370,7 +2370,7 @@ void test_vluxseg2ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m1_mu( @@ -2383,7 +2383,7 @@ void test_vluxseg2ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vbool32_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m2_mu( @@ -2396,7 +2396,7 @@ void test_vluxseg2ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u16m4_mu( @@ -2409,7 +2409,7 @@ void test_vluxseg2ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask, vuint16m4_t maskedoff0, vuint16m4_t maskedoff1, const uint16_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg2ei8_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u16m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32mf2_mu( @@ -2422,7 +2422,7 @@ void test_vluxseg2ei8_v_u16m4_mu(vuint16m4_t *v0, vuint16m4_t *v1, vbool4_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32mf2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m1_mu( @@ -2435,7 +2435,7 @@ void test_vluxseg2ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vbool64_t // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m2_mu( @@ -2448,7 +2448,7 @@ void test_vluxseg2ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u32m4_mu( @@ -2461,7 +2461,7 @@ void test_vluxseg2ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vbool16_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask, vuint32m4_t maskedoff0, vuint32m4_t maskedoff1, const uint32_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg2ei8_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u32m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m1_mu( @@ -2474,7 +2474,7 @@ void test_vluxseg2ei8_v_u32m4_mu(vuint32m4_t *v0, vuint32m4_t *v1, vbool8_t mask // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m1_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m2_mu( @@ -2487,7 +2487,7 @@ void test_vluxseg2ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vbool64_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m2_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg2ei8_v_u64m4_mu( @@ -2500,6 +2500,6 @@ void test_vluxseg2ei8_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vbool32_t mas // CHECK-RV64-NEXT: ret void // void test_vluxseg2ei8_v_u64m4_mu(vuint64m4_t *v0, vuint64m4_t *v1, vbool16_t mask, vuint64m4_t maskedoff0, vuint64m4_t maskedoff1, const uint64_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg2ei8_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); + return __riscv_vluxseg2ei8_v_u64m4_mu(v0, v1, mask, maskedoff0, maskedoff1, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c index 55fd0c4588ae2319c0440524e8400a16f69bea0f..c9698725fbb327cefe912eb32cd1caab727aaae1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei16.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vluxseg3ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vluxseg3ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vluxseg3ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32mf2_tu( @@ -79,7 +79,7 @@ void test_vluxseg3ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m1_tu( @@ -94,7 +94,7 @@ void test_vluxseg3ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m2_tu( @@ -109,7 +109,7 @@ void test_vluxseg3ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m1_tu( @@ -124,7 +124,7 @@ void test_vluxseg3ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m2_tu( @@ -139,7 +139,7 @@ void test_vluxseg3ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf8_tu( @@ -154,7 +154,7 @@ void test_vluxseg3ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf4_tu( @@ -169,7 +169,7 @@ void test_vluxseg3ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf2_tu( @@ -184,7 +184,7 @@ void test_vluxseg3ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vluxseg3ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m2_tu( @@ -214,7 +214,7 @@ void test_vluxseg3ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf4_tu( @@ -229,7 +229,7 @@ void test_vluxseg3ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf2_tu( @@ -244,7 +244,7 @@ void test_vluxseg3ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m1_tu( @@ -259,7 +259,7 @@ void test_vluxseg3ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m2_tu( @@ -274,7 +274,7 @@ void test_vluxseg3ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32mf2_tu( @@ -289,7 +289,7 @@ void test_vluxseg3ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m1_tu( @@ -304,7 +304,7 @@ void test_vluxseg3ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m2_tu( @@ -319,7 +319,7 @@ void test_vluxseg3ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m1_tu( @@ -334,7 +334,7 @@ void test_vluxseg3ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m2_tu( @@ -349,7 +349,7 @@ void test_vluxseg3ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf8_tu( @@ -364,7 +364,7 @@ void test_vluxseg3ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf4_tu( @@ -379,7 +379,7 @@ void test_vluxseg3ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf2_tu( @@ -394,7 +394,7 @@ void test_vluxseg3ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m1_tu( @@ -409,7 +409,7 @@ void test_vluxseg3ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m2_tu( @@ -424,7 +424,7 @@ void test_vluxseg3ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf4_tu( @@ -439,7 +439,7 @@ void test_vluxseg3ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf2_tu( @@ -454,7 +454,7 @@ void test_vluxseg3ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m1_tu( @@ -469,7 +469,7 @@ void test_vluxseg3ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m2_tu( @@ -484,7 +484,7 @@ void test_vluxseg3ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32mf2_tu( @@ -499,7 +499,7 @@ void test_vluxseg3ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m1_tu( @@ -514,7 +514,7 @@ void test_vluxseg3ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m2_tu( @@ -529,7 +529,7 @@ void test_vluxseg3ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m1_tu( @@ -544,7 +544,7 @@ void test_vluxseg3ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m2_tu( @@ -559,7 +559,7 @@ void test_vluxseg3ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf4_tum( @@ -574,7 +574,7 @@ void test_vluxseg3ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf2_tum( @@ -589,7 +589,7 @@ void test_vluxseg3ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m1_tum( @@ -604,7 +604,7 @@ void test_vluxseg3ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m2_tum( @@ -619,7 +619,7 @@ void test_vluxseg3ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vluxseg3ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m1_tum( @@ -649,7 +649,7 @@ void test_vluxseg3ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m2_tum( @@ -664,7 +664,7 @@ void test_vluxseg3ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m1_tum( @@ -679,7 +679,7 @@ void test_vluxseg3ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m2_tum( @@ -694,7 +694,7 @@ void test_vluxseg3ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf8_tum( @@ -709,7 +709,7 @@ void test_vluxseg3ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf4_tum( @@ -724,7 +724,7 @@ void test_vluxseg3ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vluxseg3ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m1_tum( @@ -754,7 +754,7 @@ void test_vluxseg3ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m2_tum( @@ -769,7 +769,7 @@ void test_vluxseg3ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf4_tum( @@ -784,7 +784,7 @@ void test_vluxseg3ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf2_tum( @@ -799,7 +799,7 @@ void test_vluxseg3ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m1_tum( @@ -814,7 +814,7 @@ void test_vluxseg3ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m2_tum( @@ -829,7 +829,7 @@ void test_vluxseg3ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vluxseg3ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m1_tum( @@ -859,7 +859,7 @@ void test_vluxseg3ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m2_tum( @@ -874,7 +874,7 @@ void test_vluxseg3ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m1_tum( @@ -889,7 +889,7 @@ void test_vluxseg3ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m2_tum( @@ -904,7 +904,7 @@ void test_vluxseg3ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf8_tum( @@ -919,7 +919,7 @@ void test_vluxseg3ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf4_tum( @@ -934,7 +934,7 @@ void test_vluxseg3ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vluxseg3ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m1_tum( @@ -964,7 +964,7 @@ void test_vluxseg3ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m2_tum( @@ -979,7 +979,7 @@ void test_vluxseg3ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf4_tum( @@ -994,7 +994,7 @@ void test_vluxseg3ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf2_tum( @@ -1009,7 +1009,7 @@ void test_vluxseg3ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m1_tum( @@ -1024,7 +1024,7 @@ void test_vluxseg3ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m2_tum( @@ -1039,7 +1039,7 @@ void test_vluxseg3ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg3ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m1_tum( @@ -1069,7 +1069,7 @@ void test_vluxseg3ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m2_tum( @@ -1084,7 +1084,7 @@ void test_vluxseg3ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m1_tum( @@ -1099,7 +1099,7 @@ void test_vluxseg3ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m2_tum( @@ -1114,7 +1114,7 @@ void test_vluxseg3ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf4_tumu( @@ -1129,7 +1129,7 @@ void test_vluxseg3ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf2_tumu( @@ -1144,7 +1144,7 @@ void test_vluxseg3ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vluxseg3ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m2_tumu( @@ -1174,7 +1174,7 @@ void test_vluxseg3ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32mf2_tumu( @@ -1189,7 +1189,7 @@ void test_vluxseg3ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m1_tumu( @@ -1204,7 +1204,7 @@ void test_vluxseg3ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m2_tumu( @@ -1219,7 +1219,7 @@ void test_vluxseg3ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m1_tumu( @@ -1234,7 +1234,7 @@ void test_vluxseg3ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m2_tumu( @@ -1249,7 +1249,7 @@ void test_vluxseg3ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf8_tumu( @@ -1264,7 +1264,7 @@ void test_vluxseg3ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vluxseg3ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf2_tumu( @@ -1294,7 +1294,7 @@ void test_vluxseg3ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m1_tumu( @@ -1309,7 +1309,7 @@ void test_vluxseg3ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m2_tumu( @@ -1324,7 +1324,7 @@ void test_vluxseg3ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf4_tumu( @@ -1339,7 +1339,7 @@ void test_vluxseg3ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vluxseg3ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg3ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m2_tumu( @@ -1384,7 +1384,7 @@ void test_vluxseg3ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32mf2_tumu( @@ -1399,7 +1399,7 @@ void test_vluxseg3ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m1_tumu( @@ -1414,7 +1414,7 @@ void test_vluxseg3ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m2_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg3ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m1_tumu( @@ -1444,7 +1444,7 @@ void test_vluxseg3ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m2_tumu( @@ -1459,7 +1459,7 @@ void test_vluxseg3ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf8_tumu( @@ -1474,7 +1474,7 @@ void test_vluxseg3ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf4_tumu( @@ -1489,7 +1489,7 @@ void test_vluxseg3ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf2_tumu( @@ -1504,7 +1504,7 @@ void test_vluxseg3ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m1_tumu( @@ -1519,7 +1519,7 @@ void test_vluxseg3ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m2_tumu( @@ -1534,7 +1534,7 @@ void test_vluxseg3ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf4_tumu( @@ -1549,7 +1549,7 @@ void test_vluxseg3ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vluxseg3ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg3ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m2_tumu( @@ -1594,7 +1594,7 @@ void test_vluxseg3ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32mf2_tumu( @@ -1609,7 +1609,7 @@ void test_vluxseg3ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m1_tumu( @@ -1624,7 +1624,7 @@ void test_vluxseg3ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m2_tumu( @@ -1639,7 +1639,7 @@ void test_vluxseg3ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m1_tumu( @@ -1654,7 +1654,7 @@ void test_vluxseg3ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m2_tumu( @@ -1669,7 +1669,7 @@ void test_vluxseg3ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf4_mu( @@ -1684,7 +1684,7 @@ void test_vluxseg3ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16mf2_mu( @@ -1699,7 +1699,7 @@ void test_vluxseg3ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m1_mu( @@ -1714,7 +1714,7 @@ void test_vluxseg3ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f16m2_mu( @@ -1729,7 +1729,7 @@ void test_vluxseg3ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32mf2_mu( @@ -1744,7 +1744,7 @@ void test_vluxseg3ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m1_mu( @@ -1759,7 +1759,7 @@ void test_vluxseg3ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f32m2_mu( @@ -1774,7 +1774,7 @@ void test_vluxseg3ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m1_mu( @@ -1789,7 +1789,7 @@ void test_vluxseg3ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_f64m2_mu( @@ -1804,7 +1804,7 @@ void test_vluxseg3ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf8_mu( @@ -1819,7 +1819,7 @@ void test_vluxseg3ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf4_mu( @@ -1834,7 +1834,7 @@ void test_vluxseg3ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8mf2_mu( @@ -1849,7 +1849,7 @@ void test_vluxseg3ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m1_mu( @@ -1864,7 +1864,7 @@ void test_vluxseg3ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i8m2_mu( @@ -1879,7 +1879,7 @@ void test_vluxseg3ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf4_mu( @@ -1894,7 +1894,7 @@ void test_vluxseg3ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16mf2_mu( @@ -1909,7 +1909,7 @@ void test_vluxseg3ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m1_mu( @@ -1924,7 +1924,7 @@ void test_vluxseg3ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i16m2_mu( @@ -1939,7 +1939,7 @@ void test_vluxseg3ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vluxseg3ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m1_mu( @@ -1969,7 +1969,7 @@ void test_vluxseg3ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i32m2_mu( @@ -1984,7 +1984,7 @@ void test_vluxseg3ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m1_mu( @@ -1999,7 +1999,7 @@ void test_vluxseg3ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_i64m2_mu( @@ -2014,7 +2014,7 @@ void test_vluxseg3ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf8_mu( @@ -2029,7 +2029,7 @@ void test_vluxseg3ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf4_mu( @@ -2044,7 +2044,7 @@ void test_vluxseg3ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8mf2_mu( @@ -2059,7 +2059,7 @@ void test_vluxseg3ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m1_mu( @@ -2074,7 +2074,7 @@ void test_vluxseg3ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u8m2_mu( @@ -2089,7 +2089,7 @@ void test_vluxseg3ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg3ei16_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf4_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg3ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16mf2_mu( @@ -2119,7 +2119,7 @@ void test_vluxseg3ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m1_mu( @@ -2134,7 +2134,7 @@ void test_vluxseg3ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u16m2_mu( @@ -2149,7 +2149,7 @@ void test_vluxseg3ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg3ei16_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32mf2_mu( @@ -2164,7 +2164,7 @@ void test_vluxseg3ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m1_mu( @@ -2179,7 +2179,7 @@ void test_vluxseg3ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u32m2_mu( @@ -2194,7 +2194,7 @@ void test_vluxseg3ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg3ei16_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m1_mu( @@ -2209,7 +2209,7 @@ void test_vluxseg3ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei16_v_u64m2_mu( @@ -2224,6 +2224,6 @@ void test_vluxseg3ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei16_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg3ei16_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei16_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c index 29e59a95e5acd6a4b2726d74529e5ae84b590e28..1d3393b0fa5e1f30e002873899a2ddee39fde8c7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei32.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vluxseg3ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vluxseg3ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vluxseg3ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32mf2_tu( @@ -79,7 +79,7 @@ void test_vluxseg3ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m1_tu( @@ -94,7 +94,7 @@ void test_vluxseg3ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m2_tu( @@ -109,7 +109,7 @@ void test_vluxseg3ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m1_tu( @@ -124,7 +124,7 @@ void test_vluxseg3ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m2_tu( @@ -139,7 +139,7 @@ void test_vluxseg3ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf8_tu( @@ -154,7 +154,7 @@ void test_vluxseg3ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf4_tu( @@ -169,7 +169,7 @@ void test_vluxseg3ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf2_tu( @@ -184,7 +184,7 @@ void test_vluxseg3ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vluxseg3ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m2_tu( @@ -214,7 +214,7 @@ void test_vluxseg3ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf4_tu( @@ -229,7 +229,7 @@ void test_vluxseg3ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf2_tu( @@ -244,7 +244,7 @@ void test_vluxseg3ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m1_tu( @@ -259,7 +259,7 @@ void test_vluxseg3ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m2_tu( @@ -274,7 +274,7 @@ void test_vluxseg3ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32mf2_tu( @@ -289,7 +289,7 @@ void test_vluxseg3ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m1_tu( @@ -304,7 +304,7 @@ void test_vluxseg3ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m2_tu( @@ -319,7 +319,7 @@ void test_vluxseg3ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m1_tu( @@ -334,7 +334,7 @@ void test_vluxseg3ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m2_tu( @@ -349,7 +349,7 @@ void test_vluxseg3ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf8_tu( @@ -364,7 +364,7 @@ void test_vluxseg3ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf4_tu( @@ -379,7 +379,7 @@ void test_vluxseg3ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf2_tu( @@ -394,7 +394,7 @@ void test_vluxseg3ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m1_tu( @@ -409,7 +409,7 @@ void test_vluxseg3ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m2_tu( @@ -424,7 +424,7 @@ void test_vluxseg3ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf4_tu( @@ -439,7 +439,7 @@ void test_vluxseg3ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf2_tu( @@ -454,7 +454,7 @@ void test_vluxseg3ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m1_tu( @@ -469,7 +469,7 @@ void test_vluxseg3ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m2_tu( @@ -484,7 +484,7 @@ void test_vluxseg3ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32mf2_tu( @@ -499,7 +499,7 @@ void test_vluxseg3ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m1_tu( @@ -514,7 +514,7 @@ void test_vluxseg3ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m2_tu( @@ -529,7 +529,7 @@ void test_vluxseg3ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m1_tu( @@ -544,7 +544,7 @@ void test_vluxseg3ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m2_tu( @@ -559,7 +559,7 @@ void test_vluxseg3ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf4_tum( @@ -574,7 +574,7 @@ void test_vluxseg3ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf2_tum( @@ -589,7 +589,7 @@ void test_vluxseg3ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m1_tum( @@ -604,7 +604,7 @@ void test_vluxseg3ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m2_tum( @@ -619,7 +619,7 @@ void test_vluxseg3ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vluxseg3ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m1_tum( @@ -649,7 +649,7 @@ void test_vluxseg3ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m2_tum( @@ -664,7 +664,7 @@ void test_vluxseg3ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m1_tum( @@ -679,7 +679,7 @@ void test_vluxseg3ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m2_tum( @@ -694,7 +694,7 @@ void test_vluxseg3ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf8_tum( @@ -709,7 +709,7 @@ void test_vluxseg3ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf4_tum( @@ -724,7 +724,7 @@ void test_vluxseg3ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vluxseg3ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m1_tum( @@ -754,7 +754,7 @@ void test_vluxseg3ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m2_tum( @@ -769,7 +769,7 @@ void test_vluxseg3ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf4_tum( @@ -784,7 +784,7 @@ void test_vluxseg3ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf2_tum( @@ -799,7 +799,7 @@ void test_vluxseg3ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m1_tum( @@ -814,7 +814,7 @@ void test_vluxseg3ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m2_tum( @@ -829,7 +829,7 @@ void test_vluxseg3ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vluxseg3ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m1_tum( @@ -859,7 +859,7 @@ void test_vluxseg3ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m2_tum( @@ -874,7 +874,7 @@ void test_vluxseg3ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m1_tum( @@ -889,7 +889,7 @@ void test_vluxseg3ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m2_tum( @@ -904,7 +904,7 @@ void test_vluxseg3ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf8_tum( @@ -919,7 +919,7 @@ void test_vluxseg3ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf4_tum( @@ -934,7 +934,7 @@ void test_vluxseg3ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vluxseg3ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m1_tum( @@ -964,7 +964,7 @@ void test_vluxseg3ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m2_tum( @@ -979,7 +979,7 @@ void test_vluxseg3ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf4_tum( @@ -994,7 +994,7 @@ void test_vluxseg3ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf2_tum( @@ -1009,7 +1009,7 @@ void test_vluxseg3ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m1_tum( @@ -1024,7 +1024,7 @@ void test_vluxseg3ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m2_tum( @@ -1039,7 +1039,7 @@ void test_vluxseg3ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg3ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m1_tum( @@ -1069,7 +1069,7 @@ void test_vluxseg3ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m2_tum( @@ -1084,7 +1084,7 @@ void test_vluxseg3ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m1_tum( @@ -1099,7 +1099,7 @@ void test_vluxseg3ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m2_tum( @@ -1114,7 +1114,7 @@ void test_vluxseg3ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf4_tumu( @@ -1129,7 +1129,7 @@ void test_vluxseg3ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf2_tumu( @@ -1144,7 +1144,7 @@ void test_vluxseg3ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vluxseg3ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m2_tumu( @@ -1174,7 +1174,7 @@ void test_vluxseg3ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32mf2_tumu( @@ -1189,7 +1189,7 @@ void test_vluxseg3ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m1_tumu( @@ -1204,7 +1204,7 @@ void test_vluxseg3ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m2_tumu( @@ -1219,7 +1219,7 @@ void test_vluxseg3ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m1_tumu( @@ -1234,7 +1234,7 @@ void test_vluxseg3ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m2_tumu( @@ -1249,7 +1249,7 @@ void test_vluxseg3ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf8_tumu( @@ -1264,7 +1264,7 @@ void test_vluxseg3ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vluxseg3ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf2_tumu( @@ -1294,7 +1294,7 @@ void test_vluxseg3ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m1_tumu( @@ -1309,7 +1309,7 @@ void test_vluxseg3ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m2_tumu( @@ -1324,7 +1324,7 @@ void test_vluxseg3ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf4_tumu( @@ -1339,7 +1339,7 @@ void test_vluxseg3ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vluxseg3ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg3ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m2_tumu( @@ -1384,7 +1384,7 @@ void test_vluxseg3ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32mf2_tumu( @@ -1399,7 +1399,7 @@ void test_vluxseg3ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m1_tumu( @@ -1414,7 +1414,7 @@ void test_vluxseg3ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m2_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg3ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m1_tumu( @@ -1444,7 +1444,7 @@ void test_vluxseg3ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m2_tumu( @@ -1459,7 +1459,7 @@ void test_vluxseg3ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf8_tumu( @@ -1474,7 +1474,7 @@ void test_vluxseg3ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf4_tumu( @@ -1489,7 +1489,7 @@ void test_vluxseg3ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf2_tumu( @@ -1504,7 +1504,7 @@ void test_vluxseg3ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m1_tumu( @@ -1519,7 +1519,7 @@ void test_vluxseg3ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m2_tumu( @@ -1534,7 +1534,7 @@ void test_vluxseg3ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf4_tumu( @@ -1549,7 +1549,7 @@ void test_vluxseg3ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vluxseg3ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg3ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m2_tumu( @@ -1594,7 +1594,7 @@ void test_vluxseg3ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32mf2_tumu( @@ -1609,7 +1609,7 @@ void test_vluxseg3ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m1_tumu( @@ -1624,7 +1624,7 @@ void test_vluxseg3ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m2_tumu( @@ -1639,7 +1639,7 @@ void test_vluxseg3ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m1_tumu( @@ -1654,7 +1654,7 @@ void test_vluxseg3ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m2_tumu( @@ -1669,7 +1669,7 @@ void test_vluxseg3ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf4_mu( @@ -1684,7 +1684,7 @@ void test_vluxseg3ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16mf2_mu( @@ -1699,7 +1699,7 @@ void test_vluxseg3ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m1_mu( @@ -1714,7 +1714,7 @@ void test_vluxseg3ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f16m2_mu( @@ -1729,7 +1729,7 @@ void test_vluxseg3ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32mf2_mu( @@ -1744,7 +1744,7 @@ void test_vluxseg3ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m1_mu( @@ -1759,7 +1759,7 @@ void test_vluxseg3ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f32m2_mu( @@ -1774,7 +1774,7 @@ void test_vluxseg3ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m1_mu( @@ -1789,7 +1789,7 @@ void test_vluxseg3ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_f64m2_mu( @@ -1804,7 +1804,7 @@ void test_vluxseg3ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf8_mu( @@ -1819,7 +1819,7 @@ void test_vluxseg3ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf4_mu( @@ -1834,7 +1834,7 @@ void test_vluxseg3ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8mf2_mu( @@ -1849,7 +1849,7 @@ void test_vluxseg3ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m1_mu( @@ -1864,7 +1864,7 @@ void test_vluxseg3ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i8m2_mu( @@ -1879,7 +1879,7 @@ void test_vluxseg3ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf4_mu( @@ -1894,7 +1894,7 @@ void test_vluxseg3ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16mf2_mu( @@ -1909,7 +1909,7 @@ void test_vluxseg3ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m1_mu( @@ -1924,7 +1924,7 @@ void test_vluxseg3ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i16m2_mu( @@ -1939,7 +1939,7 @@ void test_vluxseg3ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vluxseg3ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m1_mu( @@ -1969,7 +1969,7 @@ void test_vluxseg3ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i32m2_mu( @@ -1984,7 +1984,7 @@ void test_vluxseg3ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m1_mu( @@ -1999,7 +1999,7 @@ void test_vluxseg3ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_i64m2_mu( @@ -2014,7 +2014,7 @@ void test_vluxseg3ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf8_mu( @@ -2029,7 +2029,7 @@ void test_vluxseg3ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf4_mu( @@ -2044,7 +2044,7 @@ void test_vluxseg3ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8mf2_mu( @@ -2059,7 +2059,7 @@ void test_vluxseg3ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m1_mu( @@ -2074,7 +2074,7 @@ void test_vluxseg3ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u8m2_mu( @@ -2089,7 +2089,7 @@ void test_vluxseg3ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg3ei32_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf4_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg3ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16mf2_mu( @@ -2119,7 +2119,7 @@ void test_vluxseg3ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m1_mu( @@ -2134,7 +2134,7 @@ void test_vluxseg3ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u16m2_mu( @@ -2149,7 +2149,7 @@ void test_vluxseg3ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg3ei32_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32mf2_mu( @@ -2164,7 +2164,7 @@ void test_vluxseg3ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m1_mu( @@ -2179,7 +2179,7 @@ void test_vluxseg3ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u32m2_mu( @@ -2194,7 +2194,7 @@ void test_vluxseg3ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg3ei32_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m1_mu( @@ -2209,7 +2209,7 @@ void test_vluxseg3ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei32_v_u64m2_mu( @@ -2224,6 +2224,6 @@ void test_vluxseg3ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei32_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg3ei32_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei32_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c index da347515167d38db5f59d1b99f25bc3175aaae06..37d93e95900e9f9b413b7bffc4b67c7cefeaf227 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei64.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vluxseg3ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vluxseg3ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vluxseg3ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32mf2_tu( @@ -79,7 +79,7 @@ void test_vluxseg3ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m1_tu( @@ -94,7 +94,7 @@ void test_vluxseg3ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m2_tu( @@ -109,7 +109,7 @@ void test_vluxseg3ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m1_tu( @@ -124,7 +124,7 @@ void test_vluxseg3ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m2_tu( @@ -139,7 +139,7 @@ void test_vluxseg3ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf8_tu( @@ -154,7 +154,7 @@ void test_vluxseg3ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf4_tu( @@ -169,7 +169,7 @@ void test_vluxseg3ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf2_tu( @@ -184,7 +184,7 @@ void test_vluxseg3ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vluxseg3ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf4_tu( @@ -214,7 +214,7 @@ void test_vluxseg3ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf2_tu( @@ -229,7 +229,7 @@ void test_vluxseg3ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m1_tu( @@ -244,7 +244,7 @@ void test_vluxseg3ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m2_tu( @@ -259,7 +259,7 @@ void test_vluxseg3ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32mf2_tu( @@ -274,7 +274,7 @@ void test_vluxseg3ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vluxseg3ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m2_tu( @@ -304,7 +304,7 @@ void test_vluxseg3ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m1_tu( @@ -319,7 +319,7 @@ void test_vluxseg3ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m2_tu( @@ -334,7 +334,7 @@ void test_vluxseg3ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf8_tu( @@ -349,7 +349,7 @@ void test_vluxseg3ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf4_tu( @@ -364,7 +364,7 @@ void test_vluxseg3ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf2_tu( @@ -379,7 +379,7 @@ void test_vluxseg3ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8m1_tu( @@ -394,7 +394,7 @@ void test_vluxseg3ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf4_tu( @@ -409,7 +409,7 @@ void test_vluxseg3ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf2_tu( @@ -424,7 +424,7 @@ void test_vluxseg3ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m1_tu( @@ -439,7 +439,7 @@ void test_vluxseg3ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m2_tu( @@ -454,7 +454,7 @@ void test_vluxseg3ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32mf2_tu( @@ -469,7 +469,7 @@ void test_vluxseg3ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m1_tu( @@ -484,7 +484,7 @@ void test_vluxseg3ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m2_tu( @@ -499,7 +499,7 @@ void test_vluxseg3ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m1_tu( @@ -514,7 +514,7 @@ void test_vluxseg3ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m2_tu( @@ -529,7 +529,7 @@ void test_vluxseg3ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf4_tum( @@ -544,7 +544,7 @@ void test_vluxseg3ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf2_tum( @@ -559,7 +559,7 @@ void test_vluxseg3ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m1_tum( @@ -574,7 +574,7 @@ void test_vluxseg3ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m2_tum( @@ -589,7 +589,7 @@ void test_vluxseg3ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32mf2_tum( @@ -604,7 +604,7 @@ void test_vluxseg3ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m1_tum( @@ -619,7 +619,7 @@ void test_vluxseg3ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m2_tum( @@ -634,7 +634,7 @@ void test_vluxseg3ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m1_tum( @@ -649,7 +649,7 @@ void test_vluxseg3ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m2_tum( @@ -664,7 +664,7 @@ void test_vluxseg3ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf8_tum( @@ -679,7 +679,7 @@ void test_vluxseg3ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf4_tum( @@ -694,7 +694,7 @@ void test_vluxseg3ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf2_tum( @@ -709,7 +709,7 @@ void test_vluxseg3ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8m1_tum( @@ -724,7 +724,7 @@ void test_vluxseg3ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf4_tum( @@ -739,7 +739,7 @@ void test_vluxseg3ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf2_tum( @@ -754,7 +754,7 @@ void test_vluxseg3ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m1_tum( @@ -769,7 +769,7 @@ void test_vluxseg3ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m2_tum( @@ -784,7 +784,7 @@ void test_vluxseg3ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32mf2_tum( @@ -799,7 +799,7 @@ void test_vluxseg3ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m1_tum( @@ -814,7 +814,7 @@ void test_vluxseg3ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m2_tum( @@ -829,7 +829,7 @@ void test_vluxseg3ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m1_tum( @@ -844,7 +844,7 @@ void test_vluxseg3ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m2_tum( @@ -859,7 +859,7 @@ void test_vluxseg3ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf8_tum( @@ -874,7 +874,7 @@ void test_vluxseg3ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf4_tum( @@ -889,7 +889,7 @@ void test_vluxseg3ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf2_tum( @@ -904,7 +904,7 @@ void test_vluxseg3ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8m1_tum( @@ -919,7 +919,7 @@ void test_vluxseg3ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf4_tum( @@ -934,7 +934,7 @@ void test_vluxseg3ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf2_tum( @@ -949,7 +949,7 @@ void test_vluxseg3ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m1_tum( @@ -964,7 +964,7 @@ void test_vluxseg3ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m2_tum( @@ -979,7 +979,7 @@ void test_vluxseg3ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32mf2_tum( @@ -994,7 +994,7 @@ void test_vluxseg3ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m1_tum( @@ -1009,7 +1009,7 @@ void test_vluxseg3ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m2_tum( @@ -1024,7 +1024,7 @@ void test_vluxseg3ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m1_tum( @@ -1039,7 +1039,7 @@ void test_vluxseg3ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m2_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg3ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf4_tumu( @@ -1069,7 +1069,7 @@ void test_vluxseg3ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf2_tumu( @@ -1084,7 +1084,7 @@ void test_vluxseg3ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m1_tumu( @@ -1099,7 +1099,7 @@ void test_vluxseg3ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m2_tumu( @@ -1114,7 +1114,7 @@ void test_vluxseg3ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32mf2_tumu( @@ -1129,7 +1129,7 @@ void test_vluxseg3ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m1_tumu( @@ -1144,7 +1144,7 @@ void test_vluxseg3ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m2_tumu( @@ -1159,7 +1159,7 @@ void test_vluxseg3ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m1_tumu( @@ -1174,7 +1174,7 @@ void test_vluxseg3ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m2_tumu( @@ -1189,7 +1189,7 @@ void test_vluxseg3ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf8_tumu( @@ -1204,7 +1204,7 @@ void test_vluxseg3ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf4_tumu( @@ -1219,7 +1219,7 @@ void test_vluxseg3ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf2_tumu( @@ -1234,7 +1234,7 @@ void test_vluxseg3ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8m1_tumu( @@ -1249,7 +1249,7 @@ void test_vluxseg3ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vluxseg3ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf2_tumu( @@ -1279,7 +1279,7 @@ void test_vluxseg3ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m1_tumu( @@ -1294,7 +1294,7 @@ void test_vluxseg3ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m2_tumu( @@ -1309,7 +1309,7 @@ void test_vluxseg3ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32mf2_tumu( @@ -1324,7 +1324,7 @@ void test_vluxseg3ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m1_tumu( @@ -1339,7 +1339,7 @@ void test_vluxseg3ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m2_tumu( @@ -1354,7 +1354,7 @@ void test_vluxseg3ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m1_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg3ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m2_tumu( @@ -1384,7 +1384,7 @@ void test_vluxseg3ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf8_tumu( @@ -1399,7 +1399,7 @@ void test_vluxseg3ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf4_tumu( @@ -1414,7 +1414,7 @@ void test_vluxseg3ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf2_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg3ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8m1_tumu( @@ -1444,7 +1444,7 @@ void test_vluxseg3ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf4_tumu( @@ -1459,7 +1459,7 @@ void test_vluxseg3ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf2_tumu( @@ -1474,7 +1474,7 @@ void test_vluxseg3ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m1_tumu( @@ -1489,7 +1489,7 @@ void test_vluxseg3ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m2_tumu( @@ -1504,7 +1504,7 @@ void test_vluxseg3ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32mf2_tumu( @@ -1519,7 +1519,7 @@ void test_vluxseg3ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m1_tumu( @@ -1534,7 +1534,7 @@ void test_vluxseg3ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m2_tumu( @@ -1549,7 +1549,7 @@ void test_vluxseg3ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m1_tumu( @@ -1564,7 +1564,7 @@ void test_vluxseg3ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m2_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg3ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf4_mu( @@ -1594,7 +1594,7 @@ void test_vluxseg3ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16mf2_mu( @@ -1609,7 +1609,7 @@ void test_vluxseg3ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m1_mu( @@ -1624,7 +1624,7 @@ void test_vluxseg3ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f16m2_mu( @@ -1639,7 +1639,7 @@ void test_vluxseg3ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32mf2_mu( @@ -1654,7 +1654,7 @@ void test_vluxseg3ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m1_mu( @@ -1669,7 +1669,7 @@ void test_vluxseg3ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f32m2_mu( @@ -1684,7 +1684,7 @@ void test_vluxseg3ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m1_mu( @@ -1699,7 +1699,7 @@ void test_vluxseg3ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_f64m2_mu( @@ -1714,7 +1714,7 @@ void test_vluxseg3ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf8_mu( @@ -1729,7 +1729,7 @@ void test_vluxseg3ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf4_mu( @@ -1744,7 +1744,7 @@ void test_vluxseg3ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8mf2_mu( @@ -1759,7 +1759,7 @@ void test_vluxseg3ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i8m1_mu( @@ -1774,7 +1774,7 @@ void test_vluxseg3ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf4_mu( @@ -1789,7 +1789,7 @@ void test_vluxseg3ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16mf2_mu( @@ -1804,7 +1804,7 @@ void test_vluxseg3ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m1_mu( @@ -1819,7 +1819,7 @@ void test_vluxseg3ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i16m2_mu( @@ -1834,7 +1834,7 @@ void test_vluxseg3ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32mf2_mu( @@ -1849,7 +1849,7 @@ void test_vluxseg3ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m1_mu( @@ -1864,7 +1864,7 @@ void test_vluxseg3ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i32m2_mu( @@ -1879,7 +1879,7 @@ void test_vluxseg3ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m1_mu( @@ -1894,7 +1894,7 @@ void test_vluxseg3ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_i64m2_mu( @@ -1909,7 +1909,7 @@ void test_vluxseg3ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf8_mu( @@ -1924,7 +1924,7 @@ void test_vluxseg3ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf4_mu( @@ -1939,7 +1939,7 @@ void test_vluxseg3ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8mf2_mu( @@ -1954,7 +1954,7 @@ void test_vluxseg3ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u8m1_mu( @@ -1969,7 +1969,7 @@ void test_vluxseg3ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf4_mu( @@ -1984,7 +1984,7 @@ void test_vluxseg3ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16mf2_mu( @@ -1999,7 +1999,7 @@ void test_vluxseg3ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m1_mu( @@ -2014,7 +2014,7 @@ void test_vluxseg3ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u16m2_mu( @@ -2029,7 +2029,7 @@ void test_vluxseg3ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg3ei64_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32mf2_mu( @@ -2044,7 +2044,7 @@ void test_vluxseg3ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m1_mu( @@ -2059,7 +2059,7 @@ void test_vluxseg3ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u32m2_mu( @@ -2074,7 +2074,7 @@ void test_vluxseg3ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg3ei64_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m1_mu( @@ -2089,7 +2089,7 @@ void test_vluxseg3ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei64_v_u64m2_mu( @@ -2104,6 +2104,6 @@ void test_vluxseg3ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg3ei64_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei64_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c index 4efd22fdb4004b72220553a2295625ae16c6b8e8..4126d9403ad1bb15a35753c8b1b5630d3db8fa07 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg3ei8.c @@ -19,7 +19,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf2_tu( @@ -34,7 +34,7 @@ void test_vluxseg3ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m1_tu( @@ -49,7 +49,7 @@ void test_vluxseg3ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m2_tu( @@ -64,7 +64,7 @@ void test_vluxseg3ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32mf2_tu( @@ -79,7 +79,7 @@ void test_vluxseg3ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m1_tu( @@ -94,7 +94,7 @@ void test_vluxseg3ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m2_tu( @@ -109,7 +109,7 @@ void test_vluxseg3ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m1_tu( @@ -124,7 +124,7 @@ void test_vluxseg3ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m2_tu( @@ -139,7 +139,7 @@ void test_vluxseg3ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf8_tu( @@ -154,7 +154,7 @@ void test_vluxseg3ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf4_tu( @@ -169,7 +169,7 @@ void test_vluxseg3ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf2_tu( @@ -184,7 +184,7 @@ void test_vluxseg3ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m1_tu( @@ -199,7 +199,7 @@ void test_vluxseg3ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m2_tu( @@ -214,7 +214,7 @@ void test_vluxseg3ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf4_tu( @@ -229,7 +229,7 @@ void test_vluxseg3ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf2_tu( @@ -244,7 +244,7 @@ void test_vluxseg3ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m1_tu( @@ -259,7 +259,7 @@ void test_vluxseg3ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m2_tu( @@ -274,7 +274,7 @@ void test_vluxseg3ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32mf2_tu( @@ -289,7 +289,7 @@ void test_vluxseg3ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m1_tu( @@ -304,7 +304,7 @@ void test_vluxseg3ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m2_tu( @@ -319,7 +319,7 @@ void test_vluxseg3ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m1_tu( @@ -334,7 +334,7 @@ void test_vluxseg3ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m2_tu( @@ -349,7 +349,7 @@ void test_vluxseg3ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf8_tu( @@ -364,7 +364,7 @@ void test_vluxseg3ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf8_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf4_tu( @@ -379,7 +379,7 @@ void test_vluxseg3ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf2_tu( @@ -394,7 +394,7 @@ void test_vluxseg3ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m1_tu( @@ -409,7 +409,7 @@ void test_vluxseg3ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m2_tu( @@ -424,7 +424,7 @@ void test_vluxseg3ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf4_tu( @@ -439,7 +439,7 @@ void test_vluxseg3ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf4_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf2_tu( @@ -454,7 +454,7 @@ void test_vluxseg3ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m1_tu( @@ -469,7 +469,7 @@ void test_vluxseg3ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m2_tu( @@ -484,7 +484,7 @@ void test_vluxseg3ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32mf2_tu( @@ -499,7 +499,7 @@ void test_vluxseg3ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32mf2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m1_tu( @@ -514,7 +514,7 @@ void test_vluxseg3ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m2_tu( @@ -529,7 +529,7 @@ void test_vluxseg3ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m1_tu( @@ -544,7 +544,7 @@ void test_vluxseg3ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m1_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m2_tu( @@ -559,7 +559,7 @@ void test_vluxseg3ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m2_tu(v0, v1, v2, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf4_tum( @@ -574,7 +574,7 @@ void test_vluxseg3ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf2_tum( @@ -589,7 +589,7 @@ void test_vluxseg3ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m1_tum( @@ -604,7 +604,7 @@ void test_vluxseg3ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m2_tum( @@ -619,7 +619,7 @@ void test_vluxseg3ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vluxseg3ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m1_tum( @@ -649,7 +649,7 @@ void test_vluxseg3ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m2_tum( @@ -664,7 +664,7 @@ void test_vluxseg3ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m1_tum( @@ -679,7 +679,7 @@ void test_vluxseg3ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m2_tum( @@ -694,7 +694,7 @@ void test_vluxseg3ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf8_tum( @@ -709,7 +709,7 @@ void test_vluxseg3ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf4_tum( @@ -724,7 +724,7 @@ void test_vluxseg3ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vluxseg3ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m1_tum( @@ -754,7 +754,7 @@ void test_vluxseg3ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m2_tum( @@ -769,7 +769,7 @@ void test_vluxseg3ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf4_tum( @@ -784,7 +784,7 @@ void test_vluxseg3ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vb // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf2_tum( @@ -799,7 +799,7 @@ void test_vluxseg3ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m1_tum( @@ -814,7 +814,7 @@ void test_vluxseg3ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m2_tum( @@ -829,7 +829,7 @@ void test_vluxseg3ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vluxseg3ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m1_tum( @@ -859,7 +859,7 @@ void test_vluxseg3ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m2_tum( @@ -874,7 +874,7 @@ void test_vluxseg3ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m1_tum( @@ -889,7 +889,7 @@ void test_vluxseg3ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m2_tum( @@ -904,7 +904,7 @@ void test_vluxseg3ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf8_tum( @@ -919,7 +919,7 @@ void test_vluxseg3ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf8_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf4_tum( @@ -934,7 +934,7 @@ void test_vluxseg3ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vluxseg3ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m1_tum( @@ -964,7 +964,7 @@ void test_vluxseg3ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m2_tum( @@ -979,7 +979,7 @@ void test_vluxseg3ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf4_tum( @@ -994,7 +994,7 @@ void test_vluxseg3ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf4_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf2_tum( @@ -1009,7 +1009,7 @@ void test_vluxseg3ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m1_tum( @@ -1024,7 +1024,7 @@ void test_vluxseg3ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m2_tum( @@ -1039,7 +1039,7 @@ void test_vluxseg3ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg3ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32mf2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m1_tum( @@ -1069,7 +1069,7 @@ void test_vluxseg3ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m2_tum( @@ -1084,7 +1084,7 @@ void test_vluxseg3ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m1_tum( @@ -1099,7 +1099,7 @@ void test_vluxseg3ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m1_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m2_tum( @@ -1114,7 +1114,7 @@ void test_vluxseg3ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m2_tum(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf4_tumu( @@ -1129,7 +1129,7 @@ void test_vluxseg3ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf2_tumu( @@ -1144,7 +1144,7 @@ void test_vluxseg3ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vluxseg3ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m2_tumu( @@ -1174,7 +1174,7 @@ void test_vluxseg3ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32mf2_tumu( @@ -1189,7 +1189,7 @@ void test_vluxseg3ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m1_tumu( @@ -1204,7 +1204,7 @@ void test_vluxseg3ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m2_tumu( @@ -1219,7 +1219,7 @@ void test_vluxseg3ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m1_tumu( @@ -1234,7 +1234,7 @@ void test_vluxseg3ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m2_tumu( @@ -1249,7 +1249,7 @@ void test_vluxseg3ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf8_tumu( @@ -1264,7 +1264,7 @@ void test_vluxseg3ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vluxseg3ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf2_tumu( @@ -1294,7 +1294,7 @@ void test_vluxseg3ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m1_tumu( @@ -1309,7 +1309,7 @@ void test_vluxseg3ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m2_tumu( @@ -1324,7 +1324,7 @@ void test_vluxseg3ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf4_tumu( @@ -1339,7 +1339,7 @@ void test_vluxseg3ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vluxseg3ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg3ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m2_tumu( @@ -1384,7 +1384,7 @@ void test_vluxseg3ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32mf2_tumu( @@ -1399,7 +1399,7 @@ void test_vluxseg3ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m1_tumu( @@ -1414,7 +1414,7 @@ void test_vluxseg3ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m2_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg3ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m1_tumu( @@ -1444,7 +1444,7 @@ void test_vluxseg3ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m2_tumu( @@ -1459,7 +1459,7 @@ void test_vluxseg3ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf8_tumu( @@ -1474,7 +1474,7 @@ void test_vluxseg3ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf8_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf4_tumu( @@ -1489,7 +1489,7 @@ void test_vluxseg3ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf2_tumu( @@ -1504,7 +1504,7 @@ void test_vluxseg3ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m1_tumu( @@ -1519,7 +1519,7 @@ void test_vluxseg3ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m2_tumu( @@ -1534,7 +1534,7 @@ void test_vluxseg3ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf4_tumu( @@ -1549,7 +1549,7 @@ void test_vluxseg3ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf4_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf2_tumu( @@ -1564,7 +1564,7 @@ void test_vluxseg3ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg3ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m2_tumu( @@ -1594,7 +1594,7 @@ void test_vluxseg3ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32mf2_tumu( @@ -1609,7 +1609,7 @@ void test_vluxseg3ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32mf2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m1_tumu( @@ -1624,7 +1624,7 @@ void test_vluxseg3ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m2_tumu( @@ -1639,7 +1639,7 @@ void test_vluxseg3ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m1_tumu( @@ -1654,7 +1654,7 @@ void test_vluxseg3ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m1_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m2_tumu( @@ -1669,7 +1669,7 @@ void test_vluxseg3ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m2_tumu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf4_mu( @@ -1684,7 +1684,7 @@ void test_vluxseg3ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16mf2_mu( @@ -1699,7 +1699,7 @@ void test_vluxseg3ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m1_mu( @@ -1714,7 +1714,7 @@ void test_vluxseg3ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f16m2_mu( @@ -1729,7 +1729,7 @@ void test_vluxseg3ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32mf2_mu( @@ -1744,7 +1744,7 @@ void test_vluxseg3ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m1_mu( @@ -1759,7 +1759,7 @@ void test_vluxseg3ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f32m2_mu( @@ -1774,7 +1774,7 @@ void test_vluxseg3ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m1_mu( @@ -1789,7 +1789,7 @@ void test_vluxseg3ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_f64m2_mu( @@ -1804,7 +1804,7 @@ void test_vluxseg3ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_f64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf8_mu( @@ -1819,7 +1819,7 @@ void test_vluxseg3ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf4_mu( @@ -1834,7 +1834,7 @@ void test_vluxseg3ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8mf2_mu( @@ -1849,7 +1849,7 @@ void test_vluxseg3ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m1_mu( @@ -1864,7 +1864,7 @@ void test_vluxseg3ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i8m2_mu( @@ -1879,7 +1879,7 @@ void test_vluxseg3ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf4_mu( @@ -1894,7 +1894,7 @@ void test_vluxseg3ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vbo // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16mf2_mu( @@ -1909,7 +1909,7 @@ void test_vluxseg3ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m1_mu( @@ -1924,7 +1924,7 @@ void test_vluxseg3ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i16m2_mu( @@ -1939,7 +1939,7 @@ void test_vluxseg3ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32mf2_mu( @@ -1954,7 +1954,7 @@ void test_vluxseg3ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m1_mu( @@ -1969,7 +1969,7 @@ void test_vluxseg3ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i32m2_mu( @@ -1984,7 +1984,7 @@ void test_vluxseg3ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m1_mu( @@ -1999,7 +1999,7 @@ void test_vluxseg3ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_i64m2_mu( @@ -2014,7 +2014,7 @@ void test_vluxseg3ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_i64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf8_mu( @@ -2029,7 +2029,7 @@ void test_vluxseg3ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf8_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf4_mu( @@ -2044,7 +2044,7 @@ void test_vluxseg3ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8mf2_mu( @@ -2059,7 +2059,7 @@ void test_vluxseg3ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m1_mu( @@ -2074,7 +2074,7 @@ void test_vluxseg3ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u8m2_mu( @@ -2089,7 +2089,7 @@ void test_vluxseg3ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg3ei8_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u8m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf4_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg3ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf4_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16mf2_mu( @@ -2119,7 +2119,7 @@ void test_vluxseg3ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m1_mu( @@ -2134,7 +2134,7 @@ void test_vluxseg3ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u16m2_mu( @@ -2149,7 +2149,7 @@ void test_vluxseg3ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg3ei8_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u16m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32mf2_mu( @@ -2164,7 +2164,7 @@ void test_vluxseg3ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32mf2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m1_mu( @@ -2179,7 +2179,7 @@ void test_vluxseg3ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u32m2_mu( @@ -2194,7 +2194,7 @@ void test_vluxseg3ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg3ei8_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u32m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m1_mu( @@ -2209,7 +2209,7 @@ void test_vluxseg3ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m1_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg3ei8_v_u64m2_mu( @@ -2224,6 +2224,6 @@ void test_vluxseg3ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg3ei8_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg3ei8_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); + return __riscv_vluxseg3ei8_v_u64m2_mu(v0, v1, v2, mask, maskedoff0, maskedoff1, maskedoff2, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c index eaec03866e9949ad37cbf0d8f6f5733ce485bd27..61ccb9561a4e2883d8fd5b311025b3497f417624 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei16.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vluxseg4ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vluxseg4ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vluxseg4ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32mf2_tu( @@ -89,7 +89,7 @@ void test_vluxseg4ei16_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m1_tu( @@ -106,7 +106,7 @@ void test_vluxseg4ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m2_tu( @@ -123,7 +123,7 @@ void test_vluxseg4ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m1_tu( @@ -140,7 +140,7 @@ void test_vluxseg4ei16_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m2_tu( @@ -157,7 +157,7 @@ void test_vluxseg4ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf8_tu( @@ -174,7 +174,7 @@ void test_vluxseg4ei16_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf4_tu( @@ -191,7 +191,7 @@ void test_vluxseg4ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf2_tu( @@ -208,7 +208,7 @@ void test_vluxseg4ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m1_tu( @@ -225,7 +225,7 @@ void test_vluxseg4ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m2_tu( @@ -242,7 +242,7 @@ void test_vluxseg4ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf4_tu( @@ -259,7 +259,7 @@ void test_vluxseg4ei16_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf2_tu( @@ -276,7 +276,7 @@ void test_vluxseg4ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m1_tu( @@ -293,7 +293,7 @@ void test_vluxseg4ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m2_tu( @@ -310,7 +310,7 @@ void test_vluxseg4ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32mf2_tu( @@ -327,7 +327,7 @@ void test_vluxseg4ei16_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m1_tu( @@ -344,7 +344,7 @@ void test_vluxseg4ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m2_tu( @@ -361,7 +361,7 @@ void test_vluxseg4ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m1_tu( @@ -378,7 +378,7 @@ void test_vluxseg4ei16_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m2_tu( @@ -395,7 +395,7 @@ void test_vluxseg4ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf8_tu( @@ -412,7 +412,7 @@ void test_vluxseg4ei16_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf4_tu( @@ -429,7 +429,7 @@ void test_vluxseg4ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf2_tu( @@ -446,7 +446,7 @@ void test_vluxseg4ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m1_tu( @@ -463,7 +463,7 @@ void test_vluxseg4ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m2_tu( @@ -480,7 +480,7 @@ void test_vluxseg4ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf4_tu( @@ -497,7 +497,7 @@ void test_vluxseg4ei16_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf2_tu( @@ -514,7 +514,7 @@ void test_vluxseg4ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m1_tu( @@ -531,7 +531,7 @@ void test_vluxseg4ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m2_tu( @@ -548,7 +548,7 @@ void test_vluxseg4ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32mf2_tu( @@ -565,7 +565,7 @@ void test_vluxseg4ei16_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m1_tu( @@ -582,7 +582,7 @@ void test_vluxseg4ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m2_tu( @@ -599,7 +599,7 @@ void test_vluxseg4ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m1_tu( @@ -616,7 +616,7 @@ void test_vluxseg4ei16_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m2_tu( @@ -633,7 +633,7 @@ void test_vluxseg4ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf4_tum( @@ -650,7 +650,7 @@ void test_vluxseg4ei16_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf2_tum( @@ -667,7 +667,7 @@ void test_vluxseg4ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m1_tum( @@ -684,7 +684,7 @@ void test_vluxseg4ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m2_tum( @@ -701,7 +701,7 @@ void test_vluxseg4ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32mf2_tum( @@ -718,7 +718,7 @@ void test_vluxseg4ei16_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m1_tum( @@ -735,7 +735,7 @@ void test_vluxseg4ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m2_tum( @@ -752,7 +752,7 @@ void test_vluxseg4ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m1_tum( @@ -769,7 +769,7 @@ void test_vluxseg4ei16_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m2_tum( @@ -786,7 +786,7 @@ void test_vluxseg4ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf8_tum( @@ -803,7 +803,7 @@ void test_vluxseg4ei16_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf4_tum( @@ -820,7 +820,7 @@ void test_vluxseg4ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf2_tum( @@ -837,7 +837,7 @@ void test_vluxseg4ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m1_tum( @@ -854,7 +854,7 @@ void test_vluxseg4ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m2_tum( @@ -871,7 +871,7 @@ void test_vluxseg4ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf4_tum( @@ -888,7 +888,7 @@ void test_vluxseg4ei16_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf2_tum( @@ -905,7 +905,7 @@ void test_vluxseg4ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m1_tum( @@ -922,7 +922,7 @@ void test_vluxseg4ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m2_tum( @@ -939,7 +939,7 @@ void test_vluxseg4ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32mf2_tum( @@ -956,7 +956,7 @@ void test_vluxseg4ei16_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m1_tum( @@ -973,7 +973,7 @@ void test_vluxseg4ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m2_tum( @@ -990,7 +990,7 @@ void test_vluxseg4ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m1_tum( @@ -1007,7 +1007,7 @@ void test_vluxseg4ei16_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m2_tum( @@ -1024,7 +1024,7 @@ void test_vluxseg4ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf8_tum( @@ -1041,7 +1041,7 @@ void test_vluxseg4ei16_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf4_tum( @@ -1058,7 +1058,7 @@ void test_vluxseg4ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf2_tum( @@ -1075,7 +1075,7 @@ void test_vluxseg4ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m1_tum( @@ -1092,7 +1092,7 @@ void test_vluxseg4ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m2_tum( @@ -1109,7 +1109,7 @@ void test_vluxseg4ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf4_tum( @@ -1126,7 +1126,7 @@ void test_vluxseg4ei16_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf2_tum( @@ -1143,7 +1143,7 @@ void test_vluxseg4ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m1_tum( @@ -1160,7 +1160,7 @@ void test_vluxseg4ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m2_tum( @@ -1177,7 +1177,7 @@ void test_vluxseg4ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32mf2_tum( @@ -1194,7 +1194,7 @@ void test_vluxseg4ei16_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m1_tum( @@ -1211,7 +1211,7 @@ void test_vluxseg4ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m2_tum( @@ -1228,7 +1228,7 @@ void test_vluxseg4ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m1_tum( @@ -1245,7 +1245,7 @@ void test_vluxseg4ei16_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m2_tum( @@ -1262,7 +1262,7 @@ void test_vluxseg4ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vluxseg4ei16_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf2_tumu( @@ -1296,7 +1296,7 @@ void test_vluxseg4ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m1_tumu( @@ -1313,7 +1313,7 @@ void test_vluxseg4ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m2_tumu( @@ -1330,7 +1330,7 @@ void test_vluxseg4ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32mf2_tumu( @@ -1347,7 +1347,7 @@ void test_vluxseg4ei16_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m1_tumu( @@ -1364,7 +1364,7 @@ void test_vluxseg4ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m2_tumu( @@ -1381,7 +1381,7 @@ void test_vluxseg4ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m1_tumu( @@ -1398,7 +1398,7 @@ void test_vluxseg4ei16_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m2_tumu( @@ -1415,7 +1415,7 @@ void test_vluxseg4ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf8_tumu( @@ -1432,7 +1432,7 @@ void test_vluxseg4ei16_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf4_tumu( @@ -1449,7 +1449,7 @@ void test_vluxseg4ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf2_tumu( @@ -1466,7 +1466,7 @@ void test_vluxseg4ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m1_tumu( @@ -1483,7 +1483,7 @@ void test_vluxseg4ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m2_tumu( @@ -1500,7 +1500,7 @@ void test_vluxseg4ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf4_tumu( @@ -1517,7 +1517,7 @@ void test_vluxseg4ei16_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf2_tumu( @@ -1534,7 +1534,7 @@ void test_vluxseg4ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m1_tumu( @@ -1551,7 +1551,7 @@ void test_vluxseg4ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m2_tumu( @@ -1568,7 +1568,7 @@ void test_vluxseg4ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32mf2_tumu( @@ -1585,7 +1585,7 @@ void test_vluxseg4ei16_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m1_tumu( @@ -1602,7 +1602,7 @@ void test_vluxseg4ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m2_tumu( @@ -1619,7 +1619,7 @@ void test_vluxseg4ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m1_tumu( @@ -1636,7 +1636,7 @@ void test_vluxseg4ei16_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m2_tumu( @@ -1653,7 +1653,7 @@ void test_vluxseg4ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf8_tumu( @@ -1670,7 +1670,7 @@ void test_vluxseg4ei16_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf4_tumu( @@ -1687,7 +1687,7 @@ void test_vluxseg4ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf2_tumu( @@ -1704,7 +1704,7 @@ void test_vluxseg4ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m1_tumu( @@ -1721,7 +1721,7 @@ void test_vluxseg4ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m2_tumu( @@ -1738,7 +1738,7 @@ void test_vluxseg4ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf4_tumu( @@ -1755,7 +1755,7 @@ void test_vluxseg4ei16_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf2_tumu( @@ -1772,7 +1772,7 @@ void test_vluxseg4ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m1_tumu( @@ -1789,7 +1789,7 @@ void test_vluxseg4ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m2_tumu( @@ -1806,7 +1806,7 @@ void test_vluxseg4ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32mf2_tumu( @@ -1823,7 +1823,7 @@ void test_vluxseg4ei16_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m1_tumu( @@ -1840,7 +1840,7 @@ void test_vluxseg4ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m2_tumu( @@ -1857,7 +1857,7 @@ void test_vluxseg4ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m1_tumu( @@ -1874,7 +1874,7 @@ void test_vluxseg4ei16_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m2_tumu( @@ -1891,7 +1891,7 @@ void test_vluxseg4ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf4_mu( @@ -1908,7 +1908,7 @@ void test_vluxseg4ei16_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16mf2_mu( @@ -1925,7 +1925,7 @@ void test_vluxseg4ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m1_mu( @@ -1942,7 +1942,7 @@ void test_vluxseg4ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f16m2_mu( @@ -1959,7 +1959,7 @@ void test_vluxseg4ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32mf2_mu( @@ -1976,7 +1976,7 @@ void test_vluxseg4ei16_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m1_mu( @@ -1993,7 +1993,7 @@ void test_vluxseg4ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f32m2_mu( @@ -2010,7 +2010,7 @@ void test_vluxseg4ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m1_mu( @@ -2027,7 +2027,7 @@ void test_vluxseg4ei16_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_f64m2_mu( @@ -2044,7 +2044,7 @@ void test_vluxseg4ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf8_mu( @@ -2061,7 +2061,7 @@ void test_vluxseg4ei16_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf4_mu( @@ -2078,7 +2078,7 @@ void test_vluxseg4ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8mf2_mu( @@ -2095,7 +2095,7 @@ void test_vluxseg4ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m1_mu( @@ -2112,7 +2112,7 @@ void test_vluxseg4ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i8m2_mu( @@ -2129,7 +2129,7 @@ void test_vluxseg4ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf4_mu( @@ -2146,7 +2146,7 @@ void test_vluxseg4ei16_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16mf2_mu( @@ -2163,7 +2163,7 @@ void test_vluxseg4ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m1_mu( @@ -2180,7 +2180,7 @@ void test_vluxseg4ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i16m2_mu( @@ -2197,7 +2197,7 @@ void test_vluxseg4ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32mf2_mu( @@ -2214,7 +2214,7 @@ void test_vluxseg4ei16_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m1_mu( @@ -2231,7 +2231,7 @@ void test_vluxseg4ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i32m2_mu( @@ -2248,7 +2248,7 @@ void test_vluxseg4ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m1_mu( @@ -2265,7 +2265,7 @@ void test_vluxseg4ei16_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_i64m2_mu( @@ -2282,7 +2282,7 @@ void test_vluxseg4ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf8_mu( @@ -2299,7 +2299,7 @@ void test_vluxseg4ei16_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf4_mu( @@ -2316,7 +2316,7 @@ void test_vluxseg4ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8mf2_mu( @@ -2333,7 +2333,7 @@ void test_vluxseg4ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m1_mu( @@ -2350,7 +2350,7 @@ void test_vluxseg4ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u8m2_mu( @@ -2367,7 +2367,7 @@ void test_vluxseg4ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint16m4_t bindex, size_t vl) { - return vluxseg4ei16_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf4_mu( @@ -2384,7 +2384,7 @@ void test_vluxseg4ei16_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16mf2_mu( @@ -2401,7 +2401,7 @@ void test_vluxseg4ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m1_mu( @@ -2418,7 +2418,7 @@ void test_vluxseg4ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u16m2_mu( @@ -2435,7 +2435,7 @@ void test_vluxseg4ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg4ei16_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32mf2_mu( @@ -2452,7 +2452,7 @@ void test_vluxseg4ei16_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m1_mu( @@ -2469,7 +2469,7 @@ void test_vluxseg4ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u32m2_mu( @@ -2486,7 +2486,7 @@ void test_vluxseg4ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg4ei16_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m1_mu( @@ -2503,7 +2503,7 @@ void test_vluxseg4ei16_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei16_v_u64m2_mu( @@ -2520,6 +2520,6 @@ void test_vluxseg4ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei16_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg4ei16_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei16_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c index 5d2aa6a7568e1daced7a17fca49e9a35681fa042..52a9afd8018678ebe3755807c6bab631a0fb7a0c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei32.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vluxseg4ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vluxseg4ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vluxseg4ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32mf2_tu( @@ -89,7 +89,7 @@ void test_vluxseg4ei32_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m1_tu( @@ -106,7 +106,7 @@ void test_vluxseg4ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m2_tu( @@ -123,7 +123,7 @@ void test_vluxseg4ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m1_tu( @@ -140,7 +140,7 @@ void test_vluxseg4ei32_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m2_tu( @@ -157,7 +157,7 @@ void test_vluxseg4ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf8_tu( @@ -174,7 +174,7 @@ void test_vluxseg4ei32_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf4_tu( @@ -191,7 +191,7 @@ void test_vluxseg4ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf2_tu( @@ -208,7 +208,7 @@ void test_vluxseg4ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m1_tu( @@ -225,7 +225,7 @@ void test_vluxseg4ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m2_tu( @@ -242,7 +242,7 @@ void test_vluxseg4ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf4_tu( @@ -259,7 +259,7 @@ void test_vluxseg4ei32_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf2_tu( @@ -276,7 +276,7 @@ void test_vluxseg4ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m1_tu( @@ -293,7 +293,7 @@ void test_vluxseg4ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m2_tu( @@ -310,7 +310,7 @@ void test_vluxseg4ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32mf2_tu( @@ -327,7 +327,7 @@ void test_vluxseg4ei32_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m1_tu( @@ -344,7 +344,7 @@ void test_vluxseg4ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m2_tu( @@ -361,7 +361,7 @@ void test_vluxseg4ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m1_tu( @@ -378,7 +378,7 @@ void test_vluxseg4ei32_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m2_tu( @@ -395,7 +395,7 @@ void test_vluxseg4ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf8_tu( @@ -412,7 +412,7 @@ void test_vluxseg4ei32_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf4_tu( @@ -429,7 +429,7 @@ void test_vluxseg4ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf2_tu( @@ -446,7 +446,7 @@ void test_vluxseg4ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m1_tu( @@ -463,7 +463,7 @@ void test_vluxseg4ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m2_tu( @@ -480,7 +480,7 @@ void test_vluxseg4ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf4_tu( @@ -497,7 +497,7 @@ void test_vluxseg4ei32_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf2_tu( @@ -514,7 +514,7 @@ void test_vluxseg4ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m1_tu( @@ -531,7 +531,7 @@ void test_vluxseg4ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m2_tu( @@ -548,7 +548,7 @@ void test_vluxseg4ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32mf2_tu( @@ -565,7 +565,7 @@ void test_vluxseg4ei32_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m1_tu( @@ -582,7 +582,7 @@ void test_vluxseg4ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m2_tu( @@ -599,7 +599,7 @@ void test_vluxseg4ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m1_tu( @@ -616,7 +616,7 @@ void test_vluxseg4ei32_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m2_tu( @@ -633,7 +633,7 @@ void test_vluxseg4ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf4_tum( @@ -650,7 +650,7 @@ void test_vluxseg4ei32_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf2_tum( @@ -667,7 +667,7 @@ void test_vluxseg4ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m1_tum( @@ -684,7 +684,7 @@ void test_vluxseg4ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m2_tum( @@ -701,7 +701,7 @@ void test_vluxseg4ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32mf2_tum( @@ -718,7 +718,7 @@ void test_vluxseg4ei32_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m1_tum( @@ -735,7 +735,7 @@ void test_vluxseg4ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m2_tum( @@ -752,7 +752,7 @@ void test_vluxseg4ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m1_tum( @@ -769,7 +769,7 @@ void test_vluxseg4ei32_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m2_tum( @@ -786,7 +786,7 @@ void test_vluxseg4ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf8_tum( @@ -803,7 +803,7 @@ void test_vluxseg4ei32_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf4_tum( @@ -820,7 +820,7 @@ void test_vluxseg4ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf2_tum( @@ -837,7 +837,7 @@ void test_vluxseg4ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m1_tum( @@ -854,7 +854,7 @@ void test_vluxseg4ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m2_tum( @@ -871,7 +871,7 @@ void test_vluxseg4ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf4_tum( @@ -888,7 +888,7 @@ void test_vluxseg4ei32_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf2_tum( @@ -905,7 +905,7 @@ void test_vluxseg4ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m1_tum( @@ -922,7 +922,7 @@ void test_vluxseg4ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m2_tum( @@ -939,7 +939,7 @@ void test_vluxseg4ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32mf2_tum( @@ -956,7 +956,7 @@ void test_vluxseg4ei32_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m1_tum( @@ -973,7 +973,7 @@ void test_vluxseg4ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m2_tum( @@ -990,7 +990,7 @@ void test_vluxseg4ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m1_tum( @@ -1007,7 +1007,7 @@ void test_vluxseg4ei32_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m2_tum( @@ -1024,7 +1024,7 @@ void test_vluxseg4ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf8_tum( @@ -1041,7 +1041,7 @@ void test_vluxseg4ei32_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf4_tum( @@ -1058,7 +1058,7 @@ void test_vluxseg4ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf2_tum( @@ -1075,7 +1075,7 @@ void test_vluxseg4ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m1_tum( @@ -1092,7 +1092,7 @@ void test_vluxseg4ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m2_tum( @@ -1109,7 +1109,7 @@ void test_vluxseg4ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf4_tum( @@ -1126,7 +1126,7 @@ void test_vluxseg4ei32_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf2_tum( @@ -1143,7 +1143,7 @@ void test_vluxseg4ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m1_tum( @@ -1160,7 +1160,7 @@ void test_vluxseg4ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m2_tum( @@ -1177,7 +1177,7 @@ void test_vluxseg4ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32mf2_tum( @@ -1194,7 +1194,7 @@ void test_vluxseg4ei32_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m1_tum( @@ -1211,7 +1211,7 @@ void test_vluxseg4ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m2_tum( @@ -1228,7 +1228,7 @@ void test_vluxseg4ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m1_tum( @@ -1245,7 +1245,7 @@ void test_vluxseg4ei32_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m2_tum( @@ -1262,7 +1262,7 @@ void test_vluxseg4ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vluxseg4ei32_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf2_tumu( @@ -1296,7 +1296,7 @@ void test_vluxseg4ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m1_tumu( @@ -1313,7 +1313,7 @@ void test_vluxseg4ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m2_tumu( @@ -1330,7 +1330,7 @@ void test_vluxseg4ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32mf2_tumu( @@ -1347,7 +1347,7 @@ void test_vluxseg4ei32_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m1_tumu( @@ -1364,7 +1364,7 @@ void test_vluxseg4ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m2_tumu( @@ -1381,7 +1381,7 @@ void test_vluxseg4ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m1_tumu( @@ -1398,7 +1398,7 @@ void test_vluxseg4ei32_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m2_tumu( @@ -1415,7 +1415,7 @@ void test_vluxseg4ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf8_tumu( @@ -1432,7 +1432,7 @@ void test_vluxseg4ei32_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf4_tumu( @@ -1449,7 +1449,7 @@ void test_vluxseg4ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf2_tumu( @@ -1466,7 +1466,7 @@ void test_vluxseg4ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m1_tumu( @@ -1483,7 +1483,7 @@ void test_vluxseg4ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m2_tumu( @@ -1500,7 +1500,7 @@ void test_vluxseg4ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf4_tumu( @@ -1517,7 +1517,7 @@ void test_vluxseg4ei32_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf2_tumu( @@ -1534,7 +1534,7 @@ void test_vluxseg4ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m1_tumu( @@ -1551,7 +1551,7 @@ void test_vluxseg4ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m2_tumu( @@ -1568,7 +1568,7 @@ void test_vluxseg4ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32mf2_tumu( @@ -1585,7 +1585,7 @@ void test_vluxseg4ei32_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m1_tumu( @@ -1602,7 +1602,7 @@ void test_vluxseg4ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m2_tumu( @@ -1619,7 +1619,7 @@ void test_vluxseg4ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m1_tumu( @@ -1636,7 +1636,7 @@ void test_vluxseg4ei32_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m2_tumu( @@ -1653,7 +1653,7 @@ void test_vluxseg4ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf8_tumu( @@ -1670,7 +1670,7 @@ void test_vluxseg4ei32_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf4_tumu( @@ -1687,7 +1687,7 @@ void test_vluxseg4ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf2_tumu( @@ -1704,7 +1704,7 @@ void test_vluxseg4ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m1_tumu( @@ -1721,7 +1721,7 @@ void test_vluxseg4ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m2_tumu( @@ -1738,7 +1738,7 @@ void test_vluxseg4ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf4_tumu( @@ -1755,7 +1755,7 @@ void test_vluxseg4ei32_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf2_tumu( @@ -1772,7 +1772,7 @@ void test_vluxseg4ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m1_tumu( @@ -1789,7 +1789,7 @@ void test_vluxseg4ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m2_tumu( @@ -1806,7 +1806,7 @@ void test_vluxseg4ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32mf2_tumu( @@ -1823,7 +1823,7 @@ void test_vluxseg4ei32_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m1_tumu( @@ -1840,7 +1840,7 @@ void test_vluxseg4ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m2_tumu( @@ -1857,7 +1857,7 @@ void test_vluxseg4ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m1_tumu( @@ -1874,7 +1874,7 @@ void test_vluxseg4ei32_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m2_tumu( @@ -1891,7 +1891,7 @@ void test_vluxseg4ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf4_mu( @@ -1908,7 +1908,7 @@ void test_vluxseg4ei32_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16mf2_mu( @@ -1925,7 +1925,7 @@ void test_vluxseg4ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m1_mu( @@ -1942,7 +1942,7 @@ void test_vluxseg4ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f16m2_mu( @@ -1959,7 +1959,7 @@ void test_vluxseg4ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32mf2_mu( @@ -1976,7 +1976,7 @@ void test_vluxseg4ei32_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m1_mu( @@ -1993,7 +1993,7 @@ void test_vluxseg4ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f32m2_mu( @@ -2010,7 +2010,7 @@ void test_vluxseg4ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m1_mu( @@ -2027,7 +2027,7 @@ void test_vluxseg4ei32_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_f64m2_mu( @@ -2044,7 +2044,7 @@ void test_vluxseg4ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf8_mu( @@ -2061,7 +2061,7 @@ void test_vluxseg4ei32_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf4_mu( @@ -2078,7 +2078,7 @@ void test_vluxseg4ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8mf2_mu( @@ -2095,7 +2095,7 @@ void test_vluxseg4ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m1_mu( @@ -2112,7 +2112,7 @@ void test_vluxseg4ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i8m2_mu( @@ -2129,7 +2129,7 @@ void test_vluxseg4ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf4_mu( @@ -2146,7 +2146,7 @@ void test_vluxseg4ei32_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16mf2_mu( @@ -2163,7 +2163,7 @@ void test_vluxseg4ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m1_mu( @@ -2180,7 +2180,7 @@ void test_vluxseg4ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i16m2_mu( @@ -2197,7 +2197,7 @@ void test_vluxseg4ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32mf2_mu( @@ -2214,7 +2214,7 @@ void test_vluxseg4ei32_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m1_mu( @@ -2231,7 +2231,7 @@ void test_vluxseg4ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i32m2_mu( @@ -2248,7 +2248,7 @@ void test_vluxseg4ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m1_mu( @@ -2265,7 +2265,7 @@ void test_vluxseg4ei32_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_i64m2_mu( @@ -2282,7 +2282,7 @@ void test_vluxseg4ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf8_mu( @@ -2299,7 +2299,7 @@ void test_vluxseg4ei32_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf4_mu( @@ -2316,7 +2316,7 @@ void test_vluxseg4ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8mf2_mu( @@ -2333,7 +2333,7 @@ void test_vluxseg4ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m1_mu( @@ -2350,7 +2350,7 @@ void test_vluxseg4ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u8m2_mu( @@ -2367,7 +2367,7 @@ void test_vluxseg4ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint32m8_t bindex, size_t vl) { - return vluxseg4ei32_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf4_mu( @@ -2384,7 +2384,7 @@ void test_vluxseg4ei32_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16mf2_mu( @@ -2401,7 +2401,7 @@ void test_vluxseg4ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m1_mu( @@ -2418,7 +2418,7 @@ void test_vluxseg4ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u16m2_mu( @@ -2435,7 +2435,7 @@ void test_vluxseg4ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg4ei32_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32mf2_mu( @@ -2452,7 +2452,7 @@ void test_vluxseg4ei32_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m1_mu( @@ -2469,7 +2469,7 @@ void test_vluxseg4ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u32m2_mu( @@ -2486,7 +2486,7 @@ void test_vluxseg4ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg4ei32_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m1_mu( @@ -2503,7 +2503,7 @@ void test_vluxseg4ei32_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei32_v_u64m2_mu( @@ -2520,6 +2520,6 @@ void test_vluxseg4ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei32_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg4ei32_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei32_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c index d591e3c0f64b037d45368d63d84824aefad2fd77..678a23b43ab44820b208928902280980d0adb23d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei64.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vluxseg4ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vluxseg4ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vluxseg4ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32mf2_tu( @@ -89,7 +89,7 @@ void test_vluxseg4ei64_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m1_tu( @@ -106,7 +106,7 @@ void test_vluxseg4ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m2_tu( @@ -123,7 +123,7 @@ void test_vluxseg4ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m1_tu( @@ -140,7 +140,7 @@ void test_vluxseg4ei64_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m2_tu( @@ -157,7 +157,7 @@ void test_vluxseg4ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf8_tu( @@ -174,7 +174,7 @@ void test_vluxseg4ei64_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf4_tu( @@ -191,7 +191,7 @@ void test_vluxseg4ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf2_tu( @@ -208,7 +208,7 @@ void test_vluxseg4ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8m1_tu( @@ -225,7 +225,7 @@ void test_vluxseg4ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf4_tu( @@ -242,7 +242,7 @@ void test_vluxseg4ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf2_tu( @@ -259,7 +259,7 @@ void test_vluxseg4ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m1_tu( @@ -276,7 +276,7 @@ void test_vluxseg4ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m2_tu( @@ -293,7 +293,7 @@ void test_vluxseg4ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32mf2_tu( @@ -310,7 +310,7 @@ void test_vluxseg4ei64_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m1_tu( @@ -327,7 +327,7 @@ void test_vluxseg4ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m2_tu( @@ -344,7 +344,7 @@ void test_vluxseg4ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m1_tu( @@ -361,7 +361,7 @@ void test_vluxseg4ei64_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m2_tu( @@ -378,7 +378,7 @@ void test_vluxseg4ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vluxseg4ei64_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf4_tu( @@ -412,7 +412,7 @@ void test_vluxseg4ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf2_tu( @@ -429,7 +429,7 @@ void test_vluxseg4ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8m1_tu( @@ -446,7 +446,7 @@ void test_vluxseg4ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf4_tu( @@ -463,7 +463,7 @@ void test_vluxseg4ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf2_tu( @@ -480,7 +480,7 @@ void test_vluxseg4ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m1_tu( @@ -497,7 +497,7 @@ void test_vluxseg4ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m2_tu( @@ -514,7 +514,7 @@ void test_vluxseg4ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32mf2_tu( @@ -531,7 +531,7 @@ void test_vluxseg4ei64_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m1_tu( @@ -548,7 +548,7 @@ void test_vluxseg4ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m2_tu( @@ -565,7 +565,7 @@ void test_vluxseg4ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m1_tu( @@ -582,7 +582,7 @@ void test_vluxseg4ei64_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m2_tu( @@ -599,7 +599,7 @@ void test_vluxseg4ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf4_tum( @@ -616,7 +616,7 @@ void test_vluxseg4ei64_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf2_tum( @@ -633,7 +633,7 @@ void test_vluxseg4ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m1_tum( @@ -650,7 +650,7 @@ void test_vluxseg4ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m2_tum( @@ -667,7 +667,7 @@ void test_vluxseg4ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32mf2_tum( @@ -684,7 +684,7 @@ void test_vluxseg4ei64_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m1_tum( @@ -701,7 +701,7 @@ void test_vluxseg4ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m2_tum( @@ -718,7 +718,7 @@ void test_vluxseg4ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m1_tum( @@ -735,7 +735,7 @@ void test_vluxseg4ei64_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m2_tum( @@ -752,7 +752,7 @@ void test_vluxseg4ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf8_tum( @@ -769,7 +769,7 @@ void test_vluxseg4ei64_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vluxseg4ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf2_tum( @@ -803,7 +803,7 @@ void test_vluxseg4ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8m1_tum( @@ -820,7 +820,7 @@ void test_vluxseg4ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf4_tum( @@ -837,7 +837,7 @@ void test_vluxseg4ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf2_tum( @@ -854,7 +854,7 @@ void test_vluxseg4ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m1_tum( @@ -871,7 +871,7 @@ void test_vluxseg4ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m2_tum( @@ -888,7 +888,7 @@ void test_vluxseg4ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32mf2_tum( @@ -905,7 +905,7 @@ void test_vluxseg4ei64_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m1_tum( @@ -922,7 +922,7 @@ void test_vluxseg4ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m2_tum( @@ -939,7 +939,7 @@ void test_vluxseg4ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m1_tum( @@ -956,7 +956,7 @@ void test_vluxseg4ei64_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m2_tum( @@ -973,7 +973,7 @@ void test_vluxseg4ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf8_tum( @@ -990,7 +990,7 @@ void test_vluxseg4ei64_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf4_tum( @@ -1007,7 +1007,7 @@ void test_vluxseg4ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf2_tum( @@ -1024,7 +1024,7 @@ void test_vluxseg4ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8m1_tum( @@ -1041,7 +1041,7 @@ void test_vluxseg4ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf4_tum( @@ -1058,7 +1058,7 @@ void test_vluxseg4ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf2_tum( @@ -1075,7 +1075,7 @@ void test_vluxseg4ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m1_tum( @@ -1092,7 +1092,7 @@ void test_vluxseg4ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m2_tum( @@ -1109,7 +1109,7 @@ void test_vluxseg4ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32mf2_tum( @@ -1126,7 +1126,7 @@ void test_vluxseg4ei64_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m1_tum( @@ -1143,7 +1143,7 @@ void test_vluxseg4ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m2_tum( @@ -1160,7 +1160,7 @@ void test_vluxseg4ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m1_tum( @@ -1177,7 +1177,7 @@ void test_vluxseg4ei64_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m2_tum( @@ -1194,7 +1194,7 @@ void test_vluxseg4ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf4_tumu( @@ -1211,7 +1211,7 @@ void test_vluxseg4ei64_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf2_tumu( @@ -1228,7 +1228,7 @@ void test_vluxseg4ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m1_tumu( @@ -1245,7 +1245,7 @@ void test_vluxseg4ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m2_tumu( @@ -1262,7 +1262,7 @@ void test_vluxseg4ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32mf2_tumu( @@ -1279,7 +1279,7 @@ void test_vluxseg4ei64_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m1_tumu( @@ -1296,7 +1296,7 @@ void test_vluxseg4ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m2_tumu( @@ -1313,7 +1313,7 @@ void test_vluxseg4ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m1_tumu( @@ -1330,7 +1330,7 @@ void test_vluxseg4ei64_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m2_tumu( @@ -1347,7 +1347,7 @@ void test_vluxseg4ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf8_tumu( @@ -1364,7 +1364,7 @@ void test_vluxseg4ei64_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf4_tumu( @@ -1381,7 +1381,7 @@ void test_vluxseg4ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf2_tumu( @@ -1398,7 +1398,7 @@ void test_vluxseg4ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8m1_tumu( @@ -1415,7 +1415,7 @@ void test_vluxseg4ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf4_tumu( @@ -1432,7 +1432,7 @@ void test_vluxseg4ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf2_tumu( @@ -1449,7 +1449,7 @@ void test_vluxseg4ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m1_tumu( @@ -1466,7 +1466,7 @@ void test_vluxseg4ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m2_tumu( @@ -1483,7 +1483,7 @@ void test_vluxseg4ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32mf2_tumu( @@ -1500,7 +1500,7 @@ void test_vluxseg4ei64_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m1_tumu( @@ -1517,7 +1517,7 @@ void test_vluxseg4ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m2_tumu( @@ -1534,7 +1534,7 @@ void test_vluxseg4ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m1_tumu( @@ -1551,7 +1551,7 @@ void test_vluxseg4ei64_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m2_tumu( @@ -1568,7 +1568,7 @@ void test_vluxseg4ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf8_tumu( @@ -1585,7 +1585,7 @@ void test_vluxseg4ei64_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf4_tumu( @@ -1602,7 +1602,7 @@ void test_vluxseg4ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf2_tumu( @@ -1619,7 +1619,7 @@ void test_vluxseg4ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8m1_tumu( @@ -1636,7 +1636,7 @@ void test_vluxseg4ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf4_tumu( @@ -1653,7 +1653,7 @@ void test_vluxseg4ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf2_tumu( @@ -1670,7 +1670,7 @@ void test_vluxseg4ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m1_tumu( @@ -1687,7 +1687,7 @@ void test_vluxseg4ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m2_tumu( @@ -1704,7 +1704,7 @@ void test_vluxseg4ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32mf2_tumu( @@ -1721,7 +1721,7 @@ void test_vluxseg4ei64_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m1_tumu( @@ -1738,7 +1738,7 @@ void test_vluxseg4ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m2_tumu( @@ -1755,7 +1755,7 @@ void test_vluxseg4ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m1_tumu( @@ -1772,7 +1772,7 @@ void test_vluxseg4ei64_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m2_tumu( @@ -1789,7 +1789,7 @@ void test_vluxseg4ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf4_mu( @@ -1806,7 +1806,7 @@ void test_vluxseg4ei64_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16mf2_mu( @@ -1823,7 +1823,7 @@ void test_vluxseg4ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m1_mu( @@ -1840,7 +1840,7 @@ void test_vluxseg4ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f16m2_mu( @@ -1857,7 +1857,7 @@ void test_vluxseg4ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32mf2_mu( @@ -1874,7 +1874,7 @@ void test_vluxseg4ei64_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m1_mu( @@ -1891,7 +1891,7 @@ void test_vluxseg4ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f32m2_mu( @@ -1908,7 +1908,7 @@ void test_vluxseg4ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m1_mu( @@ -1925,7 +1925,7 @@ void test_vluxseg4ei64_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_f64m2_mu( @@ -1942,7 +1942,7 @@ void test_vluxseg4ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vluxseg4ei64_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf4_mu( @@ -1976,7 +1976,7 @@ void test_vluxseg4ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8mf2_mu( @@ -1993,7 +1993,7 @@ void test_vluxseg4ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i8m1_mu( @@ -2010,7 +2010,7 @@ void test_vluxseg4ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf4_mu( @@ -2027,7 +2027,7 @@ void test_vluxseg4ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16mf2_mu( @@ -2044,7 +2044,7 @@ void test_vluxseg4ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m1_mu( @@ -2061,7 +2061,7 @@ void test_vluxseg4ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i16m2_mu( @@ -2078,7 +2078,7 @@ void test_vluxseg4ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32mf2_mu( @@ -2095,7 +2095,7 @@ void test_vluxseg4ei64_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m1_mu( @@ -2112,7 +2112,7 @@ void test_vluxseg4ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i32m2_mu( @@ -2129,7 +2129,7 @@ void test_vluxseg4ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m1_mu( @@ -2146,7 +2146,7 @@ void test_vluxseg4ei64_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_i64m2_mu( @@ -2163,7 +2163,7 @@ void test_vluxseg4ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf8_mu( @@ -2180,7 +2180,7 @@ void test_vluxseg4ei64_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf4_mu( @@ -2197,7 +2197,7 @@ void test_vluxseg4ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8mf2_mu( @@ -2214,7 +2214,7 @@ void test_vluxseg4ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u8m1_mu( @@ -2231,7 +2231,7 @@ void test_vluxseg4ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf4_mu( @@ -2248,7 +2248,7 @@ void test_vluxseg4ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16mf2_mu( @@ -2265,7 +2265,7 @@ void test_vluxseg4ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m1_mu( @@ -2282,7 +2282,7 @@ void test_vluxseg4ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u16m2_mu( @@ -2299,7 +2299,7 @@ void test_vluxseg4ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg4ei64_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32mf2_mu( @@ -2316,7 +2316,7 @@ void test_vluxseg4ei64_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m1_mu( @@ -2333,7 +2333,7 @@ void test_vluxseg4ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u32m2_mu( @@ -2350,7 +2350,7 @@ void test_vluxseg4ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg4ei64_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m1_mu( @@ -2367,7 +2367,7 @@ void test_vluxseg4ei64_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei64_v_u64m2_mu( @@ -2384,6 +2384,6 @@ void test_vluxseg4ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei64_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg4ei64_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei64_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c index 106e928ef8f7374a57cf88d5aee119d09b0bc49a..0b5f0d81fcd688141b10093778ee0abe894f465a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg4ei8.c @@ -21,7 +21,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf2_tu( @@ -38,7 +38,7 @@ void test_vluxseg4ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m1_tu( @@ -55,7 +55,7 @@ void test_vluxseg4ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m2_tu( @@ -72,7 +72,7 @@ void test_vluxseg4ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32mf2_tu( @@ -89,7 +89,7 @@ void test_vluxseg4ei8_v_f16m2_tu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m1_tu( @@ -106,7 +106,7 @@ void test_vluxseg4ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m2_tu( @@ -123,7 +123,7 @@ void test_vluxseg4ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m1_tu( @@ -140,7 +140,7 @@ void test_vluxseg4ei8_v_f32m2_tu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m2_tu( @@ -157,7 +157,7 @@ void test_vluxseg4ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf8_tu( @@ -174,7 +174,7 @@ void test_vluxseg4ei8_v_f64m2_tu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf4_tu( @@ -191,7 +191,7 @@ void test_vluxseg4ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf2_tu( @@ -208,7 +208,7 @@ void test_vluxseg4ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m1_tu( @@ -225,7 +225,7 @@ void test_vluxseg4ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m2_tu( @@ -242,7 +242,7 @@ void test_vluxseg4ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf4_tu( @@ -259,7 +259,7 @@ void test_vluxseg4ei8_v_i8m2_tu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf2_tu( @@ -276,7 +276,7 @@ void test_vluxseg4ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m1_tu( @@ -293,7 +293,7 @@ void test_vluxseg4ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m2_tu( @@ -310,7 +310,7 @@ void test_vluxseg4ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32mf2_tu( @@ -327,7 +327,7 @@ void test_vluxseg4ei8_v_i16m2_tu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m1_tu( @@ -344,7 +344,7 @@ void test_vluxseg4ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m2_tu( @@ -361,7 +361,7 @@ void test_vluxseg4ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m1_tu( @@ -378,7 +378,7 @@ void test_vluxseg4ei8_v_i32m2_tu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m2_tu( @@ -395,7 +395,7 @@ void test_vluxseg4ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf8_tu( @@ -412,7 +412,7 @@ void test_vluxseg4ei8_v_i64m2_tu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf8_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf4_tu( @@ -429,7 +429,7 @@ void test_vluxseg4ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf2_tu( @@ -446,7 +446,7 @@ void test_vluxseg4ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m1_tu( @@ -463,7 +463,7 @@ void test_vluxseg4ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m2_tu( @@ -480,7 +480,7 @@ void test_vluxseg4ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf4_tu( @@ -497,7 +497,7 @@ void test_vluxseg4ei8_v_u8m2_tu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf4_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf2_tu( @@ -514,7 +514,7 @@ void test_vluxseg4ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m1_tu( @@ -531,7 +531,7 @@ void test_vluxseg4ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m2_tu( @@ -548,7 +548,7 @@ void test_vluxseg4ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32mf2_tu( @@ -565,7 +565,7 @@ void test_vluxseg4ei8_v_u16m2_tu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32mf2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m1_tu( @@ -582,7 +582,7 @@ void test_vluxseg4ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m2_tu( @@ -599,7 +599,7 @@ void test_vluxseg4ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m1_tu( @@ -616,7 +616,7 @@ void test_vluxseg4ei8_v_u32m2_tu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m1_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m2_tu( @@ -633,7 +633,7 @@ void test_vluxseg4ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m2_tu(v0, v1, v2, v3, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf4_tum( @@ -650,7 +650,7 @@ void test_vluxseg4ei8_v_u64m2_tu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf2_tum( @@ -667,7 +667,7 @@ void test_vluxseg4ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m1_tum( @@ -684,7 +684,7 @@ void test_vluxseg4ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m2_tum( @@ -701,7 +701,7 @@ void test_vluxseg4ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32mf2_tum( @@ -718,7 +718,7 @@ void test_vluxseg4ei8_v_f16m2_tum(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m1_tum( @@ -735,7 +735,7 @@ void test_vluxseg4ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m2_tum( @@ -752,7 +752,7 @@ void test_vluxseg4ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m1_tum( @@ -769,7 +769,7 @@ void test_vluxseg4ei8_v_f32m2_tum(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m2_tum( @@ -786,7 +786,7 @@ void test_vluxseg4ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf8_tum( @@ -803,7 +803,7 @@ void test_vluxseg4ei8_v_f64m2_tum(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf4_tum( @@ -820,7 +820,7 @@ void test_vluxseg4ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf2_tum( @@ -837,7 +837,7 @@ void test_vluxseg4ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m1_tum( @@ -854,7 +854,7 @@ void test_vluxseg4ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m2_tum( @@ -871,7 +871,7 @@ void test_vluxseg4ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf4_tum( @@ -888,7 +888,7 @@ void test_vluxseg4ei8_v_i8m2_tum(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf2_tum( @@ -905,7 +905,7 @@ void test_vluxseg4ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m1_tum( @@ -922,7 +922,7 @@ void test_vluxseg4ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m2_tum( @@ -939,7 +939,7 @@ void test_vluxseg4ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32mf2_tum( @@ -956,7 +956,7 @@ void test_vluxseg4ei8_v_i16m2_tum(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m1_tum( @@ -973,7 +973,7 @@ void test_vluxseg4ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m2_tum( @@ -990,7 +990,7 @@ void test_vluxseg4ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m1_tum( @@ -1007,7 +1007,7 @@ void test_vluxseg4ei8_v_i32m2_tum(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m2_tum( @@ -1024,7 +1024,7 @@ void test_vluxseg4ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf8_tum( @@ -1041,7 +1041,7 @@ void test_vluxseg4ei8_v_i64m2_tum(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf8_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf4_tum( @@ -1058,7 +1058,7 @@ void test_vluxseg4ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf2_tum( @@ -1075,7 +1075,7 @@ void test_vluxseg4ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m1_tum( @@ -1092,7 +1092,7 @@ void test_vluxseg4ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m2_tum( @@ -1109,7 +1109,7 @@ void test_vluxseg4ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf4_tum( @@ -1126,7 +1126,7 @@ void test_vluxseg4ei8_v_u8m2_tum(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf4_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf2_tum( @@ -1143,7 +1143,7 @@ void test_vluxseg4ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m1_tum( @@ -1160,7 +1160,7 @@ void test_vluxseg4ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m2_tum( @@ -1177,7 +1177,7 @@ void test_vluxseg4ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32mf2_tum( @@ -1194,7 +1194,7 @@ void test_vluxseg4ei8_v_u16m2_tum(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32mf2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m1_tum( @@ -1211,7 +1211,7 @@ void test_vluxseg4ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m2_tum( @@ -1228,7 +1228,7 @@ void test_vluxseg4ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m1_tum( @@ -1245,7 +1245,7 @@ void test_vluxseg4ei8_v_u32m2_tum(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m1_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m2_tum( @@ -1262,7 +1262,7 @@ void test_vluxseg4ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m2_tum(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf4_tumu( @@ -1279,7 +1279,7 @@ void test_vluxseg4ei8_v_u64m2_tum(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf2_tumu( @@ -1296,7 +1296,7 @@ void test_vluxseg4ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m1_tumu( @@ -1313,7 +1313,7 @@ void test_vluxseg4ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m2_tumu( @@ -1330,7 +1330,7 @@ void test_vluxseg4ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32mf2_tumu( @@ -1347,7 +1347,7 @@ void test_vluxseg4ei8_v_f16m2_tumu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m1_tumu( @@ -1364,7 +1364,7 @@ void test_vluxseg4ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m2_tumu( @@ -1381,7 +1381,7 @@ void test_vluxseg4ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m1_tumu( @@ -1398,7 +1398,7 @@ void test_vluxseg4ei8_v_f32m2_tumu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m2_tumu( @@ -1415,7 +1415,7 @@ void test_vluxseg4ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf8_tumu( @@ -1432,7 +1432,7 @@ void test_vluxseg4ei8_v_f64m2_tumu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf4_tumu( @@ -1449,7 +1449,7 @@ void test_vluxseg4ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf2_tumu( @@ -1466,7 +1466,7 @@ void test_vluxseg4ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m1_tumu( @@ -1483,7 +1483,7 @@ void test_vluxseg4ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m2_tumu( @@ -1500,7 +1500,7 @@ void test_vluxseg4ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf4_tumu( @@ -1517,7 +1517,7 @@ void test_vluxseg4ei8_v_i8m2_tumu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf2_tumu( @@ -1534,7 +1534,7 @@ void test_vluxseg4ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m1_tumu( @@ -1551,7 +1551,7 @@ void test_vluxseg4ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m2_tumu( @@ -1568,7 +1568,7 @@ void test_vluxseg4ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32mf2_tumu( @@ -1585,7 +1585,7 @@ void test_vluxseg4ei8_v_i16m2_tumu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m1_tumu( @@ -1602,7 +1602,7 @@ void test_vluxseg4ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m2_tumu( @@ -1619,7 +1619,7 @@ void test_vluxseg4ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m1_tumu( @@ -1636,7 +1636,7 @@ void test_vluxseg4ei8_v_i32m2_tumu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m2_tumu( @@ -1653,7 +1653,7 @@ void test_vluxseg4ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf8_tumu( @@ -1670,7 +1670,7 @@ void test_vluxseg4ei8_v_i64m2_tumu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf8_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf4_tumu( @@ -1687,7 +1687,7 @@ void test_vluxseg4ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf2_tumu( @@ -1704,7 +1704,7 @@ void test_vluxseg4ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m1_tumu( @@ -1721,7 +1721,7 @@ void test_vluxseg4ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m2_tumu( @@ -1738,7 +1738,7 @@ void test_vluxseg4ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf4_tumu( @@ -1755,7 +1755,7 @@ void test_vluxseg4ei8_v_u8m2_tumu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf4_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf2_tumu( @@ -1772,7 +1772,7 @@ void test_vluxseg4ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m1_tumu( @@ -1789,7 +1789,7 @@ void test_vluxseg4ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m2_tumu( @@ -1806,7 +1806,7 @@ void test_vluxseg4ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32mf2_tumu( @@ -1823,7 +1823,7 @@ void test_vluxseg4ei8_v_u16m2_tumu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32mf2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m1_tumu( @@ -1840,7 +1840,7 @@ void test_vluxseg4ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m2_tumu( @@ -1857,7 +1857,7 @@ void test_vluxseg4ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m1_tumu( @@ -1874,7 +1874,7 @@ void test_vluxseg4ei8_v_u32m2_tumu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m1_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m2_tumu( @@ -1891,7 +1891,7 @@ void test_vluxseg4ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m2_tumu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf4_mu( @@ -1908,7 +1908,7 @@ void test_vluxseg4ei8_v_u64m2_tumu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16mf2_mu( @@ -1925,7 +1925,7 @@ void test_vluxseg4ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m1_mu( @@ -1942,7 +1942,7 @@ void test_vluxseg4ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f16m2_mu( @@ -1959,7 +1959,7 @@ void test_vluxseg4ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_t *v2, vfloat16m2_t *v3, vbool8_t mask, vfloat16m2_t maskedoff0, vfloat16m2_t maskedoff1, vfloat16m2_t maskedoff2, vfloat16m2_t maskedoff3, const _Float16 *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32mf2_mu( @@ -1976,7 +1976,7 @@ void test_vluxseg4ei8_v_f16m2_mu(vfloat16m2_t *v0, vfloat16m2_t *v1, vfloat16m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m1_mu( @@ -1993,7 +1993,7 @@ void test_vluxseg4ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f32m2_mu( @@ -2010,7 +2010,7 @@ void test_vluxseg4ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_t *v2, vfloat32m2_t *v3, vbool16_t mask, vfloat32m2_t maskedoff0, vfloat32m2_t maskedoff1, vfloat32m2_t maskedoff2, vfloat32m2_t maskedoff3, const float *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m1_mu( @@ -2027,7 +2027,7 @@ void test_vluxseg4ei8_v_f32m2_mu(vfloat32m2_t *v0, vfloat32m2_t *v1, vfloat32m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_f64m2_mu( @@ -2044,7 +2044,7 @@ void test_vluxseg4ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_t *v2, vfloat64m2_t *v3, vbool32_t mask, vfloat64m2_t maskedoff0, vfloat64m2_t maskedoff1, vfloat64m2_t maskedoff2, vfloat64m2_t maskedoff3, const double *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_f64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf8_mu( @@ -2061,7 +2061,7 @@ void test_vluxseg4ei8_v_f64m2_mu(vfloat64m2_t *v0, vfloat64m2_t *v1, vfloat64m2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf4_mu( @@ -2078,7 +2078,7 @@ void test_vluxseg4ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8mf2_mu( @@ -2095,7 +2095,7 @@ void test_vluxseg4ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m1_mu( @@ -2112,7 +2112,7 @@ void test_vluxseg4ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i8m2_mu( @@ -2129,7 +2129,7 @@ void test_vluxseg4ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vint8m2_t *v3, vbool4_t mask, vint8m2_t maskedoff0, vint8m2_t maskedoff1, vint8m2_t maskedoff2, vint8m2_t maskedoff3, const int8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf4_mu( @@ -2146,7 +2146,7 @@ void test_vluxseg4ei8_v_i8m2_mu(vint8m2_t *v0, vint8m2_t *v1, vint8m2_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16mf2_mu( @@ -2163,7 +2163,7 @@ void test_vluxseg4ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m1_mu( @@ -2180,7 +2180,7 @@ void test_vluxseg4ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i16m2_mu( @@ -2197,7 +2197,7 @@ void test_vluxseg4ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, vint16m2_t *v3, vbool8_t mask, vint16m2_t maskedoff0, vint16m2_t maskedoff1, vint16m2_t maskedoff2, vint16m2_t maskedoff3, const int16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32mf2_mu( @@ -2214,7 +2214,7 @@ void test_vluxseg4ei8_v_i16m2_mu(vint16m2_t *v0, vint16m2_t *v1, vint16m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m1_mu( @@ -2231,7 +2231,7 @@ void test_vluxseg4ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i32m2_mu( @@ -2248,7 +2248,7 @@ void test_vluxseg4ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, vint32m2_t *v3, vbool16_t mask, vint32m2_t maskedoff0, vint32m2_t maskedoff1, vint32m2_t maskedoff2, vint32m2_t maskedoff3, const int32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m1_mu( @@ -2265,7 +2265,7 @@ void test_vluxseg4ei8_v_i32m2_mu(vint32m2_t *v0, vint32m2_t *v1, vint32m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_i64m2_mu( @@ -2282,7 +2282,7 @@ void test_vluxseg4ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, vint64m2_t *v3, vbool32_t mask, vint64m2_t maskedoff0, vint64m2_t maskedoff1, vint64m2_t maskedoff2, vint64m2_t maskedoff3, const int64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_i64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf8_mu( @@ -2299,7 +2299,7 @@ void test_vluxseg4ei8_v_i64m2_mu(vint64m2_t *v0, vint64m2_t *v1, vint64m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf8_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf4_mu( @@ -2316,7 +2316,7 @@ void test_vluxseg4ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8mf2_mu( @@ -2333,7 +2333,7 @@ void test_vluxseg4ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m1_mu( @@ -2350,7 +2350,7 @@ void test_vluxseg4ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u8m2_mu( @@ -2367,7 +2367,7 @@ void test_vluxseg4ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, vuint8m2_t *v3, vbool4_t mask, vuint8m2_t maskedoff0, vuint8m2_t maskedoff1, vuint8m2_t maskedoff2, vuint8m2_t maskedoff3, const uint8_t *base, vuint8m2_t bindex, size_t vl) { - return vluxseg4ei8_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u8m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf4_mu( @@ -2384,7 +2384,7 @@ void test_vluxseg4ei8_v_u8m2_mu(vuint8m2_t *v0, vuint8m2_t *v1, vuint8m2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf4_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16mf2_mu( @@ -2401,7 +2401,7 @@ void test_vluxseg4ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m1_mu( @@ -2418,7 +2418,7 @@ void test_vluxseg4ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u16m2_mu( @@ -2435,7 +2435,7 @@ void test_vluxseg4ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t *v2, vuint16m2_t *v3, vbool8_t mask, vuint16m2_t maskedoff0, vuint16m2_t maskedoff1, vuint16m2_t maskedoff2, vuint16m2_t maskedoff3, const uint16_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg4ei8_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u16m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32mf2_mu( @@ -2452,7 +2452,7 @@ void test_vluxseg4ei8_v_u16m2_mu(vuint16m2_t *v0, vuint16m2_t *v1, vuint16m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32mf2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m1_mu( @@ -2469,7 +2469,7 @@ void test_vluxseg4ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u32m2_mu( @@ -2486,7 +2486,7 @@ void test_vluxseg4ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t *v2, vuint32m2_t *v3, vbool16_t mask, vuint32m2_t maskedoff0, vuint32m2_t maskedoff1, vuint32m2_t maskedoff2, vuint32m2_t maskedoff3, const uint32_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg4ei8_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u32m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m1_mu( @@ -2503,7 +2503,7 @@ void test_vluxseg4ei8_v_u32m2_mu(vuint32m2_t *v0, vuint32m2_t *v1, vuint32m2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m1_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg4ei8_v_u64m2_mu( @@ -2520,6 +2520,6 @@ void test_vluxseg4ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg4ei8_v_u64m2_mu(vuint64m2_t *v0, vuint64m2_t *v1, vuint64m2_t *v2, vuint64m2_t *v3, vbool32_t mask, vuint64m2_t maskedoff0, vuint64m2_t maskedoff1, vuint64m2_t maskedoff2, vuint64m2_t maskedoff3, const uint64_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg4ei8_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); + return __riscv_vluxseg4ei8_v_u64m2_mu(v0, v1, v2, v3, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c index d68c645e9f0548cb5f1fb0f7ad5fe4331e7dd957..c48bc62455f1ed197defb781eb712e1f8c0abe8e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei16.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vluxseg5ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vluxseg5ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32mf2_tu( @@ -80,7 +80,7 @@ void test_vluxseg5ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32m1_tu( @@ -99,7 +99,7 @@ void test_vluxseg5ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f64m1_tu( @@ -118,7 +118,7 @@ void test_vluxseg5ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf8_tu( @@ -137,7 +137,7 @@ void test_vluxseg5ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf4_tu( @@ -156,7 +156,7 @@ void test_vluxseg5ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf2_tu( @@ -175,7 +175,7 @@ void test_vluxseg5ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8m1_tu( @@ -194,7 +194,7 @@ void test_vluxseg5ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf4_tu( @@ -213,7 +213,7 @@ void test_vluxseg5ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf2_tu( @@ -232,7 +232,7 @@ void test_vluxseg5ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16m1_tu( @@ -251,7 +251,7 @@ void test_vluxseg5ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32mf2_tu( @@ -270,7 +270,7 @@ void test_vluxseg5ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vluxseg5ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i64m1_tu( @@ -308,7 +308,7 @@ void test_vluxseg5ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf8_tu( @@ -327,7 +327,7 @@ void test_vluxseg5ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf4_tu( @@ -346,7 +346,7 @@ void test_vluxseg5ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf2_tu( @@ -365,7 +365,7 @@ void test_vluxseg5ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8m1_tu( @@ -384,7 +384,7 @@ void test_vluxseg5ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf4_tu( @@ -403,7 +403,7 @@ void test_vluxseg5ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf2_tu( @@ -422,7 +422,7 @@ void test_vluxseg5ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16m1_tu( @@ -441,7 +441,7 @@ void test_vluxseg5ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32mf2_tu( @@ -460,7 +460,7 @@ void test_vluxseg5ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32m1_tu( @@ -479,7 +479,7 @@ void test_vluxseg5ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u64m1_tu( @@ -498,7 +498,7 @@ void test_vluxseg5ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf4_tum( @@ -517,7 +517,7 @@ void test_vluxseg5ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf2_tum( @@ -536,7 +536,7 @@ void test_vluxseg5ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16m1_tum( @@ -555,7 +555,7 @@ void test_vluxseg5ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32mf2_tum( @@ -574,7 +574,7 @@ void test_vluxseg5ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32m1_tum( @@ -593,7 +593,7 @@ void test_vluxseg5ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f64m1_tum( @@ -612,7 +612,7 @@ void test_vluxseg5ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf8_tum( @@ -631,7 +631,7 @@ void test_vluxseg5ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf4_tum( @@ -650,7 +650,7 @@ void test_vluxseg5ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf2_tum( @@ -669,7 +669,7 @@ void test_vluxseg5ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8m1_tum( @@ -688,7 +688,7 @@ void test_vluxseg5ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf4_tum( @@ -707,7 +707,7 @@ void test_vluxseg5ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf2_tum( @@ -726,7 +726,7 @@ void test_vluxseg5ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16m1_tum( @@ -745,7 +745,7 @@ void test_vluxseg5ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32mf2_tum( @@ -764,7 +764,7 @@ void test_vluxseg5ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32m1_tum( @@ -783,7 +783,7 @@ void test_vluxseg5ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i64m1_tum( @@ -802,7 +802,7 @@ void test_vluxseg5ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf8_tum( @@ -821,7 +821,7 @@ void test_vluxseg5ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf4_tum( @@ -840,7 +840,7 @@ void test_vluxseg5ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf2_tum( @@ -859,7 +859,7 @@ void test_vluxseg5ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8m1_tum( @@ -878,7 +878,7 @@ void test_vluxseg5ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf4_tum( @@ -897,7 +897,7 @@ void test_vluxseg5ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf2_tum( @@ -916,7 +916,7 @@ void test_vluxseg5ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16m1_tum( @@ -935,7 +935,7 @@ void test_vluxseg5ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32mf2_tum( @@ -954,7 +954,7 @@ void test_vluxseg5ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32m1_tum( @@ -973,7 +973,7 @@ void test_vluxseg5ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u64m1_tum( @@ -992,7 +992,7 @@ void test_vluxseg5ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf4_tumu( @@ -1011,7 +1011,7 @@ void test_vluxseg5ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf2_tumu( @@ -1030,7 +1030,7 @@ void test_vluxseg5ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16m1_tumu( @@ -1049,7 +1049,7 @@ void test_vluxseg5ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32mf2_tumu( @@ -1068,7 +1068,7 @@ void test_vluxseg5ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32m1_tumu( @@ -1087,7 +1087,7 @@ void test_vluxseg5ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f64m1_tumu( @@ -1106,7 +1106,7 @@ void test_vluxseg5ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf8_tumu( @@ -1125,7 +1125,7 @@ void test_vluxseg5ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf4_tumu( @@ -1144,7 +1144,7 @@ void test_vluxseg5ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf2_tumu( @@ -1163,7 +1163,7 @@ void test_vluxseg5ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8m1_tumu( @@ -1182,7 +1182,7 @@ void test_vluxseg5ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf4_tumu( @@ -1201,7 +1201,7 @@ void test_vluxseg5ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf2_tumu( @@ -1220,7 +1220,7 @@ void test_vluxseg5ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vluxseg5ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32mf2_tumu( @@ -1258,7 +1258,7 @@ void test_vluxseg5ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32m1_tumu( @@ -1277,7 +1277,7 @@ void test_vluxseg5ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i64m1_tumu( @@ -1296,7 +1296,7 @@ void test_vluxseg5ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf8_tumu( @@ -1315,7 +1315,7 @@ void test_vluxseg5ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf4_tumu( @@ -1334,7 +1334,7 @@ void test_vluxseg5ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf2_tumu( @@ -1353,7 +1353,7 @@ void test_vluxseg5ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8m1_tumu( @@ -1372,7 +1372,7 @@ void test_vluxseg5ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf4_tumu( @@ -1391,7 +1391,7 @@ void test_vluxseg5ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf2_tumu( @@ -1410,7 +1410,7 @@ void test_vluxseg5ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16m1_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg5ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32mf2_tumu( @@ -1448,7 +1448,7 @@ void test_vluxseg5ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32m1_tumu( @@ -1467,7 +1467,7 @@ void test_vluxseg5ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u64m1_tumu( @@ -1486,7 +1486,7 @@ void test_vluxseg5ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf4_mu( @@ -1505,7 +1505,7 @@ void test_vluxseg5ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16mf2_mu( @@ -1524,7 +1524,7 @@ void test_vluxseg5ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f16m1_mu( @@ -1543,7 +1543,7 @@ void test_vluxseg5ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32mf2_mu( @@ -1562,7 +1562,7 @@ void test_vluxseg5ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f32m1_mu( @@ -1581,7 +1581,7 @@ void test_vluxseg5ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_f64m1_mu( @@ -1600,7 +1600,7 @@ void test_vluxseg5ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf8_mu( @@ -1619,7 +1619,7 @@ void test_vluxseg5ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf4_mu( @@ -1638,7 +1638,7 @@ void test_vluxseg5ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8mf2_mu( @@ -1657,7 +1657,7 @@ void test_vluxseg5ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i8m1_mu( @@ -1676,7 +1676,7 @@ void test_vluxseg5ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf4_mu( @@ -1695,7 +1695,7 @@ void test_vluxseg5ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16mf2_mu( @@ -1714,7 +1714,7 @@ void test_vluxseg5ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i16m1_mu( @@ -1733,7 +1733,7 @@ void test_vluxseg5ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32mf2_mu( @@ -1752,7 +1752,7 @@ void test_vluxseg5ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i32m1_mu( @@ -1771,7 +1771,7 @@ void test_vluxseg5ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_i64m1_mu( @@ -1790,7 +1790,7 @@ void test_vluxseg5ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf8_mu( @@ -1809,7 +1809,7 @@ void test_vluxseg5ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf4_mu( @@ -1828,7 +1828,7 @@ void test_vluxseg5ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8mf2_mu( @@ -1847,7 +1847,7 @@ void test_vluxseg5ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u8m1_mu( @@ -1866,7 +1866,7 @@ void test_vluxseg5ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg5ei16_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf4_mu( @@ -1885,7 +1885,7 @@ void test_vluxseg5ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16mf2_mu( @@ -1904,7 +1904,7 @@ void test_vluxseg5ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u16m1_mu( @@ -1923,7 +1923,7 @@ void test_vluxseg5ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg5ei16_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32mf2_mu( @@ -1942,7 +1942,7 @@ void test_vluxseg5ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u32m1_mu( @@ -1961,7 +1961,7 @@ void test_vluxseg5ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg5ei16_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei16_v_u64m1_mu( @@ -1980,6 +1980,6 @@ void test_vluxseg5ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg5ei16_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei16_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c index fce2213b50ae86c65d1c064525a7036b61030190..e00e95edb8a93a25ea2675975a00b0cd2c80b1d6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei32.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vluxseg5ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vluxseg5ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32mf2_tu( @@ -80,7 +80,7 @@ void test_vluxseg5ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32m1_tu( @@ -99,7 +99,7 @@ void test_vluxseg5ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f64m1_tu( @@ -118,7 +118,7 @@ void test_vluxseg5ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf8_tu( @@ -137,7 +137,7 @@ void test_vluxseg5ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf4_tu( @@ -156,7 +156,7 @@ void test_vluxseg5ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf2_tu( @@ -175,7 +175,7 @@ void test_vluxseg5ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8m1_tu( @@ -194,7 +194,7 @@ void test_vluxseg5ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf4_tu( @@ -213,7 +213,7 @@ void test_vluxseg5ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf2_tu( @@ -232,7 +232,7 @@ void test_vluxseg5ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16m1_tu( @@ -251,7 +251,7 @@ void test_vluxseg5ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32mf2_tu( @@ -270,7 +270,7 @@ void test_vluxseg5ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vluxseg5ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i64m1_tu( @@ -308,7 +308,7 @@ void test_vluxseg5ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf8_tu( @@ -327,7 +327,7 @@ void test_vluxseg5ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf4_tu( @@ -346,7 +346,7 @@ void test_vluxseg5ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf2_tu( @@ -365,7 +365,7 @@ void test_vluxseg5ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8m1_tu( @@ -384,7 +384,7 @@ void test_vluxseg5ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf4_tu( @@ -403,7 +403,7 @@ void test_vluxseg5ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf2_tu( @@ -422,7 +422,7 @@ void test_vluxseg5ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16m1_tu( @@ -441,7 +441,7 @@ void test_vluxseg5ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32mf2_tu( @@ -460,7 +460,7 @@ void test_vluxseg5ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32m1_tu( @@ -479,7 +479,7 @@ void test_vluxseg5ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u64m1_tu( @@ -498,7 +498,7 @@ void test_vluxseg5ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf4_tum( @@ -517,7 +517,7 @@ void test_vluxseg5ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf2_tum( @@ -536,7 +536,7 @@ void test_vluxseg5ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16m1_tum( @@ -555,7 +555,7 @@ void test_vluxseg5ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32mf2_tum( @@ -574,7 +574,7 @@ void test_vluxseg5ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32m1_tum( @@ -593,7 +593,7 @@ void test_vluxseg5ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f64m1_tum( @@ -612,7 +612,7 @@ void test_vluxseg5ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf8_tum( @@ -631,7 +631,7 @@ void test_vluxseg5ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf4_tum( @@ -650,7 +650,7 @@ void test_vluxseg5ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf2_tum( @@ -669,7 +669,7 @@ void test_vluxseg5ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8m1_tum( @@ -688,7 +688,7 @@ void test_vluxseg5ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf4_tum( @@ -707,7 +707,7 @@ void test_vluxseg5ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf2_tum( @@ -726,7 +726,7 @@ void test_vluxseg5ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16m1_tum( @@ -745,7 +745,7 @@ void test_vluxseg5ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32mf2_tum( @@ -764,7 +764,7 @@ void test_vluxseg5ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32m1_tum( @@ -783,7 +783,7 @@ void test_vluxseg5ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i64m1_tum( @@ -802,7 +802,7 @@ void test_vluxseg5ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf8_tum( @@ -821,7 +821,7 @@ void test_vluxseg5ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf4_tum( @@ -840,7 +840,7 @@ void test_vluxseg5ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf2_tum( @@ -859,7 +859,7 @@ void test_vluxseg5ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8m1_tum( @@ -878,7 +878,7 @@ void test_vluxseg5ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf4_tum( @@ -897,7 +897,7 @@ void test_vluxseg5ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf2_tum( @@ -916,7 +916,7 @@ void test_vluxseg5ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16m1_tum( @@ -935,7 +935,7 @@ void test_vluxseg5ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32mf2_tum( @@ -954,7 +954,7 @@ void test_vluxseg5ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32m1_tum( @@ -973,7 +973,7 @@ void test_vluxseg5ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u64m1_tum( @@ -992,7 +992,7 @@ void test_vluxseg5ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf4_tumu( @@ -1011,7 +1011,7 @@ void test_vluxseg5ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf2_tumu( @@ -1030,7 +1030,7 @@ void test_vluxseg5ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16m1_tumu( @@ -1049,7 +1049,7 @@ void test_vluxseg5ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32mf2_tumu( @@ -1068,7 +1068,7 @@ void test_vluxseg5ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32m1_tumu( @@ -1087,7 +1087,7 @@ void test_vluxseg5ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f64m1_tumu( @@ -1106,7 +1106,7 @@ void test_vluxseg5ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf8_tumu( @@ -1125,7 +1125,7 @@ void test_vluxseg5ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf4_tumu( @@ -1144,7 +1144,7 @@ void test_vluxseg5ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf2_tumu( @@ -1163,7 +1163,7 @@ void test_vluxseg5ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8m1_tumu( @@ -1182,7 +1182,7 @@ void test_vluxseg5ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf4_tumu( @@ -1201,7 +1201,7 @@ void test_vluxseg5ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf2_tumu( @@ -1220,7 +1220,7 @@ void test_vluxseg5ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vluxseg5ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32mf2_tumu( @@ -1258,7 +1258,7 @@ void test_vluxseg5ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32m1_tumu( @@ -1277,7 +1277,7 @@ void test_vluxseg5ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i64m1_tumu( @@ -1296,7 +1296,7 @@ void test_vluxseg5ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf8_tumu( @@ -1315,7 +1315,7 @@ void test_vluxseg5ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf4_tumu( @@ -1334,7 +1334,7 @@ void test_vluxseg5ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf2_tumu( @@ -1353,7 +1353,7 @@ void test_vluxseg5ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8m1_tumu( @@ -1372,7 +1372,7 @@ void test_vluxseg5ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf4_tumu( @@ -1391,7 +1391,7 @@ void test_vluxseg5ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf2_tumu( @@ -1410,7 +1410,7 @@ void test_vluxseg5ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16m1_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg5ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32mf2_tumu( @@ -1448,7 +1448,7 @@ void test_vluxseg5ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32m1_tumu( @@ -1467,7 +1467,7 @@ void test_vluxseg5ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u64m1_tumu( @@ -1486,7 +1486,7 @@ void test_vluxseg5ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf4_mu( @@ -1505,7 +1505,7 @@ void test_vluxseg5ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16mf2_mu( @@ -1524,7 +1524,7 @@ void test_vluxseg5ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f16m1_mu( @@ -1543,7 +1543,7 @@ void test_vluxseg5ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32mf2_mu( @@ -1562,7 +1562,7 @@ void test_vluxseg5ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f32m1_mu( @@ -1581,7 +1581,7 @@ void test_vluxseg5ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_f64m1_mu( @@ -1600,7 +1600,7 @@ void test_vluxseg5ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf8_mu( @@ -1619,7 +1619,7 @@ void test_vluxseg5ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf4_mu( @@ -1638,7 +1638,7 @@ void test_vluxseg5ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8mf2_mu( @@ -1657,7 +1657,7 @@ void test_vluxseg5ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i8m1_mu( @@ -1676,7 +1676,7 @@ void test_vluxseg5ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf4_mu( @@ -1695,7 +1695,7 @@ void test_vluxseg5ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16mf2_mu( @@ -1714,7 +1714,7 @@ void test_vluxseg5ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i16m1_mu( @@ -1733,7 +1733,7 @@ void test_vluxseg5ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32mf2_mu( @@ -1752,7 +1752,7 @@ void test_vluxseg5ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i32m1_mu( @@ -1771,7 +1771,7 @@ void test_vluxseg5ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_i64m1_mu( @@ -1790,7 +1790,7 @@ void test_vluxseg5ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf8_mu( @@ -1809,7 +1809,7 @@ void test_vluxseg5ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf4_mu( @@ -1828,7 +1828,7 @@ void test_vluxseg5ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8mf2_mu( @@ -1847,7 +1847,7 @@ void test_vluxseg5ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u8m1_mu( @@ -1866,7 +1866,7 @@ void test_vluxseg5ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg5ei32_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf4_mu( @@ -1885,7 +1885,7 @@ void test_vluxseg5ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16mf2_mu( @@ -1904,7 +1904,7 @@ void test_vluxseg5ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u16m1_mu( @@ -1923,7 +1923,7 @@ void test_vluxseg5ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg5ei32_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32mf2_mu( @@ -1942,7 +1942,7 @@ void test_vluxseg5ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u32m1_mu( @@ -1961,7 +1961,7 @@ void test_vluxseg5ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg5ei32_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei32_v_u64m1_mu( @@ -1980,6 +1980,6 @@ void test_vluxseg5ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg5ei32_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei32_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c index 4164765a77241326bafa087b32f3c9872a6deff2..5eed867fc988831909577d09ba91e1329837c725 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei64.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vluxseg5ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vluxseg5ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32mf2_tu( @@ -80,7 +80,7 @@ void test_vluxseg5ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32m1_tu( @@ -99,7 +99,7 @@ void test_vluxseg5ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f64m1_tu( @@ -118,7 +118,7 @@ void test_vluxseg5ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf8_tu( @@ -137,7 +137,7 @@ void test_vluxseg5ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf4_tu( @@ -156,7 +156,7 @@ void test_vluxseg5ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf2_tu( @@ -175,7 +175,7 @@ void test_vluxseg5ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8m1_tu( @@ -194,7 +194,7 @@ void test_vluxseg5ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf4_tu( @@ -213,7 +213,7 @@ void test_vluxseg5ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf2_tu( @@ -232,7 +232,7 @@ void test_vluxseg5ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16m1_tu( @@ -251,7 +251,7 @@ void test_vluxseg5ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32mf2_tu( @@ -270,7 +270,7 @@ void test_vluxseg5ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vluxseg5ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i64m1_tu( @@ -308,7 +308,7 @@ void test_vluxseg5ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf8_tu( @@ -327,7 +327,7 @@ void test_vluxseg5ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf4_tu( @@ -346,7 +346,7 @@ void test_vluxseg5ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf2_tu( @@ -365,7 +365,7 @@ void test_vluxseg5ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8m1_tu( @@ -384,7 +384,7 @@ void test_vluxseg5ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf4_tu( @@ -403,7 +403,7 @@ void test_vluxseg5ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf2_tu( @@ -422,7 +422,7 @@ void test_vluxseg5ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16m1_tu( @@ -441,7 +441,7 @@ void test_vluxseg5ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32mf2_tu( @@ -460,7 +460,7 @@ void test_vluxseg5ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32m1_tu( @@ -479,7 +479,7 @@ void test_vluxseg5ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u64m1_tu( @@ -498,7 +498,7 @@ void test_vluxseg5ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf4_tum( @@ -517,7 +517,7 @@ void test_vluxseg5ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf2_tum( @@ -536,7 +536,7 @@ void test_vluxseg5ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16m1_tum( @@ -555,7 +555,7 @@ void test_vluxseg5ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32mf2_tum( @@ -574,7 +574,7 @@ void test_vluxseg5ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32m1_tum( @@ -593,7 +593,7 @@ void test_vluxseg5ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f64m1_tum( @@ -612,7 +612,7 @@ void test_vluxseg5ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf8_tum( @@ -631,7 +631,7 @@ void test_vluxseg5ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf4_tum( @@ -650,7 +650,7 @@ void test_vluxseg5ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf2_tum( @@ -669,7 +669,7 @@ void test_vluxseg5ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8m1_tum( @@ -688,7 +688,7 @@ void test_vluxseg5ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf4_tum( @@ -707,7 +707,7 @@ void test_vluxseg5ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf2_tum( @@ -726,7 +726,7 @@ void test_vluxseg5ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16m1_tum( @@ -745,7 +745,7 @@ void test_vluxseg5ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32mf2_tum( @@ -764,7 +764,7 @@ void test_vluxseg5ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32m1_tum( @@ -783,7 +783,7 @@ void test_vluxseg5ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i64m1_tum( @@ -802,7 +802,7 @@ void test_vluxseg5ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf8_tum( @@ -821,7 +821,7 @@ void test_vluxseg5ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf4_tum( @@ -840,7 +840,7 @@ void test_vluxseg5ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf2_tum( @@ -859,7 +859,7 @@ void test_vluxseg5ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8m1_tum( @@ -878,7 +878,7 @@ void test_vluxseg5ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf4_tum( @@ -897,7 +897,7 @@ void test_vluxseg5ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf2_tum( @@ -916,7 +916,7 @@ void test_vluxseg5ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16m1_tum( @@ -935,7 +935,7 @@ void test_vluxseg5ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32mf2_tum( @@ -954,7 +954,7 @@ void test_vluxseg5ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32m1_tum( @@ -973,7 +973,7 @@ void test_vluxseg5ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u64m1_tum( @@ -992,7 +992,7 @@ void test_vluxseg5ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf4_tumu( @@ -1011,7 +1011,7 @@ void test_vluxseg5ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf2_tumu( @@ -1030,7 +1030,7 @@ void test_vluxseg5ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16m1_tumu( @@ -1049,7 +1049,7 @@ void test_vluxseg5ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32mf2_tumu( @@ -1068,7 +1068,7 @@ void test_vluxseg5ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32m1_tumu( @@ -1087,7 +1087,7 @@ void test_vluxseg5ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f64m1_tumu( @@ -1106,7 +1106,7 @@ void test_vluxseg5ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf8_tumu( @@ -1125,7 +1125,7 @@ void test_vluxseg5ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf4_tumu( @@ -1144,7 +1144,7 @@ void test_vluxseg5ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf2_tumu( @@ -1163,7 +1163,7 @@ void test_vluxseg5ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8m1_tumu( @@ -1182,7 +1182,7 @@ void test_vluxseg5ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf4_tumu( @@ -1201,7 +1201,7 @@ void test_vluxseg5ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf2_tumu( @@ -1220,7 +1220,7 @@ void test_vluxseg5ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vluxseg5ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32mf2_tumu( @@ -1258,7 +1258,7 @@ void test_vluxseg5ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32m1_tumu( @@ -1277,7 +1277,7 @@ void test_vluxseg5ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i64m1_tumu( @@ -1296,7 +1296,7 @@ void test_vluxseg5ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf8_tumu( @@ -1315,7 +1315,7 @@ void test_vluxseg5ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf4_tumu( @@ -1334,7 +1334,7 @@ void test_vluxseg5ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf2_tumu( @@ -1353,7 +1353,7 @@ void test_vluxseg5ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8m1_tumu( @@ -1372,7 +1372,7 @@ void test_vluxseg5ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf4_tumu( @@ -1391,7 +1391,7 @@ void test_vluxseg5ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf2_tumu( @@ -1410,7 +1410,7 @@ void test_vluxseg5ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16m1_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg5ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32mf2_tumu( @@ -1448,7 +1448,7 @@ void test_vluxseg5ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32m1_tumu( @@ -1467,7 +1467,7 @@ void test_vluxseg5ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u64m1_tumu( @@ -1486,7 +1486,7 @@ void test_vluxseg5ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf4_mu( @@ -1505,7 +1505,7 @@ void test_vluxseg5ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16mf2_mu( @@ -1524,7 +1524,7 @@ void test_vluxseg5ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f16m1_mu( @@ -1543,7 +1543,7 @@ void test_vluxseg5ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32mf2_mu( @@ -1562,7 +1562,7 @@ void test_vluxseg5ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f32m1_mu( @@ -1581,7 +1581,7 @@ void test_vluxseg5ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_f64m1_mu( @@ -1600,7 +1600,7 @@ void test_vluxseg5ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf8_mu( @@ -1619,7 +1619,7 @@ void test_vluxseg5ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf4_mu( @@ -1638,7 +1638,7 @@ void test_vluxseg5ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8mf2_mu( @@ -1657,7 +1657,7 @@ void test_vluxseg5ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i8m1_mu( @@ -1676,7 +1676,7 @@ void test_vluxseg5ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf4_mu( @@ -1695,7 +1695,7 @@ void test_vluxseg5ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16mf2_mu( @@ -1714,7 +1714,7 @@ void test_vluxseg5ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i16m1_mu( @@ -1733,7 +1733,7 @@ void test_vluxseg5ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32mf2_mu( @@ -1752,7 +1752,7 @@ void test_vluxseg5ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i32m1_mu( @@ -1771,7 +1771,7 @@ void test_vluxseg5ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_i64m1_mu( @@ -1790,7 +1790,7 @@ void test_vluxseg5ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf8_mu( @@ -1809,7 +1809,7 @@ void test_vluxseg5ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf4_mu( @@ -1828,7 +1828,7 @@ void test_vluxseg5ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8mf2_mu( @@ -1847,7 +1847,7 @@ void test_vluxseg5ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u8m1_mu( @@ -1866,7 +1866,7 @@ void test_vluxseg5ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg5ei64_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf4_mu( @@ -1885,7 +1885,7 @@ void test_vluxseg5ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16mf2_mu( @@ -1904,7 +1904,7 @@ void test_vluxseg5ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u16m1_mu( @@ -1923,7 +1923,7 @@ void test_vluxseg5ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg5ei64_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32mf2_mu( @@ -1942,7 +1942,7 @@ void test_vluxseg5ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u32m1_mu( @@ -1961,7 +1961,7 @@ void test_vluxseg5ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg5ei64_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei64_v_u64m1_mu( @@ -1980,6 +1980,6 @@ void test_vluxseg5ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg5ei64_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei64_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c index cc36b9f80cbaffcae2055529fb5ba9d49b35d7bb..f01887b3031eaf0666e22f76982646b2d08e875c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg5ei8.c @@ -23,7 +23,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf2_tu( @@ -42,7 +42,7 @@ void test_vluxseg5ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16m1_tu( @@ -61,7 +61,7 @@ void test_vluxseg5ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32mf2_tu( @@ -80,7 +80,7 @@ void test_vluxseg5ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32m1_tu( @@ -99,7 +99,7 @@ void test_vluxseg5ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f64m1_tu( @@ -118,7 +118,7 @@ void test_vluxseg5ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf8_tu( @@ -137,7 +137,7 @@ void test_vluxseg5ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf4_tu( @@ -156,7 +156,7 @@ void test_vluxseg5ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf2_tu( @@ -175,7 +175,7 @@ void test_vluxseg5ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8m1_tu( @@ -194,7 +194,7 @@ void test_vluxseg5ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf4_tu( @@ -213,7 +213,7 @@ void test_vluxseg5ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf2_tu( @@ -232,7 +232,7 @@ void test_vluxseg5ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16m1_tu( @@ -251,7 +251,7 @@ void test_vluxseg5ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32mf2_tu( @@ -270,7 +270,7 @@ void test_vluxseg5ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32m1_tu( @@ -289,7 +289,7 @@ void test_vluxseg5ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i64m1_tu( @@ -308,7 +308,7 @@ void test_vluxseg5ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf8_tu( @@ -327,7 +327,7 @@ void test_vluxseg5ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf4_tu( @@ -346,7 +346,7 @@ void test_vluxseg5ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf2_tu( @@ -365,7 +365,7 @@ void test_vluxseg5ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8m1_tu( @@ -384,7 +384,7 @@ void test_vluxseg5ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf4_tu( @@ -403,7 +403,7 @@ void test_vluxseg5ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf2_tu( @@ -422,7 +422,7 @@ void test_vluxseg5ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16m1_tu( @@ -441,7 +441,7 @@ void test_vluxseg5ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32mf2_tu( @@ -460,7 +460,7 @@ void test_vluxseg5ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32m1_tu( @@ -479,7 +479,7 @@ void test_vluxseg5ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u64m1_tu( @@ -498,7 +498,7 @@ void test_vluxseg5ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u64m1_tu(v0, v1, v2, v3, v4, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf4_tum( @@ -517,7 +517,7 @@ void test_vluxseg5ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf2_tum( @@ -536,7 +536,7 @@ void test_vluxseg5ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16m1_tum( @@ -555,7 +555,7 @@ void test_vluxseg5ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32mf2_tum( @@ -574,7 +574,7 @@ void test_vluxseg5ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32m1_tum( @@ -593,7 +593,7 @@ void test_vluxseg5ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f64m1_tum( @@ -612,7 +612,7 @@ void test_vluxseg5ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf8_tum( @@ -631,7 +631,7 @@ void test_vluxseg5ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf4_tum( @@ -650,7 +650,7 @@ void test_vluxseg5ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf2_tum( @@ -669,7 +669,7 @@ void test_vluxseg5ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8m1_tum( @@ -688,7 +688,7 @@ void test_vluxseg5ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf4_tum( @@ -707,7 +707,7 @@ void test_vluxseg5ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf2_tum( @@ -726,7 +726,7 @@ void test_vluxseg5ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16m1_tum( @@ -745,7 +745,7 @@ void test_vluxseg5ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32mf2_tum( @@ -764,7 +764,7 @@ void test_vluxseg5ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32m1_tum( @@ -783,7 +783,7 @@ void test_vluxseg5ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i64m1_tum( @@ -802,7 +802,7 @@ void test_vluxseg5ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf8_tum( @@ -821,7 +821,7 @@ void test_vluxseg5ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf4_tum( @@ -840,7 +840,7 @@ void test_vluxseg5ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf2_tum( @@ -859,7 +859,7 @@ void test_vluxseg5ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8m1_tum( @@ -878,7 +878,7 @@ void test_vluxseg5ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf4_tum( @@ -897,7 +897,7 @@ void test_vluxseg5ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf2_tum( @@ -916,7 +916,7 @@ void test_vluxseg5ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16m1_tum( @@ -935,7 +935,7 @@ void test_vluxseg5ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32mf2_tum( @@ -954,7 +954,7 @@ void test_vluxseg5ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32m1_tum( @@ -973,7 +973,7 @@ void test_vluxseg5ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u64m1_tum( @@ -992,7 +992,7 @@ void test_vluxseg5ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u64m1_tum(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf4_tumu( @@ -1011,7 +1011,7 @@ void test_vluxseg5ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf2_tumu( @@ -1030,7 +1030,7 @@ void test_vluxseg5ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16m1_tumu( @@ -1049,7 +1049,7 @@ void test_vluxseg5ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32mf2_tumu( @@ -1068,7 +1068,7 @@ void test_vluxseg5ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32m1_tumu( @@ -1087,7 +1087,7 @@ void test_vluxseg5ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f64m1_tumu( @@ -1106,7 +1106,7 @@ void test_vluxseg5ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf8_tumu( @@ -1125,7 +1125,7 @@ void test_vluxseg5ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf4_tumu( @@ -1144,7 +1144,7 @@ void test_vluxseg5ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf2_tumu( @@ -1163,7 +1163,7 @@ void test_vluxseg5ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8m1_tumu( @@ -1182,7 +1182,7 @@ void test_vluxseg5ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf4_tumu( @@ -1201,7 +1201,7 @@ void test_vluxseg5ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf2_tumu( @@ -1220,7 +1220,7 @@ void test_vluxseg5ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16m1_tumu( @@ -1239,7 +1239,7 @@ void test_vluxseg5ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32mf2_tumu( @@ -1258,7 +1258,7 @@ void test_vluxseg5ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32m1_tumu( @@ -1277,7 +1277,7 @@ void test_vluxseg5ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i64m1_tumu( @@ -1296,7 +1296,7 @@ void test_vluxseg5ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf8_tumu( @@ -1315,7 +1315,7 @@ void test_vluxseg5ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf4_tumu( @@ -1334,7 +1334,7 @@ void test_vluxseg5ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf2_tumu( @@ -1353,7 +1353,7 @@ void test_vluxseg5ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8m1_tumu( @@ -1372,7 +1372,7 @@ void test_vluxseg5ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf4_tumu( @@ -1391,7 +1391,7 @@ void test_vluxseg5ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf2_tumu( @@ -1410,7 +1410,7 @@ void test_vluxseg5ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16m1_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg5ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32mf2_tumu( @@ -1448,7 +1448,7 @@ void test_vluxseg5ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32m1_tumu( @@ -1467,7 +1467,7 @@ void test_vluxseg5ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u64m1_tumu( @@ -1486,7 +1486,7 @@ void test_vluxseg5ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf4_mu( @@ -1505,7 +1505,7 @@ void test_vluxseg5ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16mf2_mu( @@ -1524,7 +1524,7 @@ void test_vluxseg5ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f16m1_mu( @@ -1543,7 +1543,7 @@ void test_vluxseg5ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32mf2_mu( @@ -1562,7 +1562,7 @@ void test_vluxseg5ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f32m1_mu( @@ -1581,7 +1581,7 @@ void test_vluxseg5ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_f64m1_mu( @@ -1600,7 +1600,7 @@ void test_vluxseg5ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_f64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf8_mu( @@ -1619,7 +1619,7 @@ void test_vluxseg5ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf4_mu( @@ -1638,7 +1638,7 @@ void test_vluxseg5ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8mf2_mu( @@ -1657,7 +1657,7 @@ void test_vluxseg5ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i8m1_mu( @@ -1676,7 +1676,7 @@ void test_vluxseg5ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf4_mu( @@ -1695,7 +1695,7 @@ void test_vluxseg5ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16mf2_mu( @@ -1714,7 +1714,7 @@ void test_vluxseg5ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i16m1_mu( @@ -1733,7 +1733,7 @@ void test_vluxseg5ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32mf2_mu( @@ -1752,7 +1752,7 @@ void test_vluxseg5ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i32m1_mu( @@ -1771,7 +1771,7 @@ void test_vluxseg5ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_i64m1_mu( @@ -1790,7 +1790,7 @@ void test_vluxseg5ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_i64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf8_mu( @@ -1809,7 +1809,7 @@ void test_vluxseg5ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf4_mu( @@ -1828,7 +1828,7 @@ void test_vluxseg5ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8mf2_mu( @@ -1847,7 +1847,7 @@ void test_vluxseg5ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u8m1_mu( @@ -1866,7 +1866,7 @@ void test_vluxseg5ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg5ei8_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u8m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf4_mu( @@ -1885,7 +1885,7 @@ void test_vluxseg5ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16mf2_mu( @@ -1904,7 +1904,7 @@ void test_vluxseg5ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u16m1_mu( @@ -1923,7 +1923,7 @@ void test_vluxseg5ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg5ei8_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u16m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32mf2_mu( @@ -1942,7 +1942,7 @@ void test_vluxseg5ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u32m1_mu( @@ -1961,7 +1961,7 @@ void test_vluxseg5ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg5ei8_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u32m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg5ei8_v_u64m1_mu( @@ -1980,6 +1980,6 @@ void test_vluxseg5ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg5ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg5ei8_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); + return __riscv_vluxseg5ei8_v_u64m1_mu(v0, v1, v2, v3, v4, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c index f1b640aa6ab53e55b503541eece07913850b35ec..d3cc289b8e2859ab743773f9c1745d0d9c7f1de1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei16.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vluxseg6ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vluxseg6ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32mf2_tu( @@ -88,7 +88,7 @@ void test_vluxseg6ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32m1_tu( @@ -109,7 +109,7 @@ void test_vluxseg6ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f64m1_tu( @@ -130,7 +130,7 @@ void test_vluxseg6ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf8_tu( @@ -151,7 +151,7 @@ void test_vluxseg6ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf4_tu( @@ -172,7 +172,7 @@ void test_vluxseg6ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf2_tu( @@ -193,7 +193,7 @@ void test_vluxseg6ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8m1_tu( @@ -214,7 +214,7 @@ void test_vluxseg6ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf4_tu( @@ -235,7 +235,7 @@ void test_vluxseg6ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf2_tu( @@ -256,7 +256,7 @@ void test_vluxseg6ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vluxseg6ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32mf2_tu( @@ -298,7 +298,7 @@ void test_vluxseg6ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32m1_tu( @@ -319,7 +319,7 @@ void test_vluxseg6ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i64m1_tu( @@ -340,7 +340,7 @@ void test_vluxseg6ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf8_tu( @@ -361,7 +361,7 @@ void test_vluxseg6ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf4_tu( @@ -382,7 +382,7 @@ void test_vluxseg6ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf2_tu( @@ -403,7 +403,7 @@ void test_vluxseg6ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8m1_tu( @@ -424,7 +424,7 @@ void test_vluxseg6ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf4_tu( @@ -445,7 +445,7 @@ void test_vluxseg6ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf2_tu( @@ -466,7 +466,7 @@ void test_vluxseg6ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16m1_tu( @@ -487,7 +487,7 @@ void test_vluxseg6ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32mf2_tu( @@ -508,7 +508,7 @@ void test_vluxseg6ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32m1_tu( @@ -529,7 +529,7 @@ void test_vluxseg6ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u64m1_tu( @@ -550,7 +550,7 @@ void test_vluxseg6ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf4_tum( @@ -571,7 +571,7 @@ void test_vluxseg6ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf2_tum( @@ -592,7 +592,7 @@ void test_vluxseg6ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16m1_tum( @@ -613,7 +613,7 @@ void test_vluxseg6ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vluxseg6ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32m1_tum( @@ -655,7 +655,7 @@ void test_vluxseg6ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f64m1_tum( @@ -676,7 +676,7 @@ void test_vluxseg6ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf8_tum( @@ -697,7 +697,7 @@ void test_vluxseg6ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf4_tum( @@ -718,7 +718,7 @@ void test_vluxseg6ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vluxseg6ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8m1_tum( @@ -760,7 +760,7 @@ void test_vluxseg6ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf4_tum( @@ -781,7 +781,7 @@ void test_vluxseg6ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf2_tum( @@ -802,7 +802,7 @@ void test_vluxseg6ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16m1_tum( @@ -823,7 +823,7 @@ void test_vluxseg6ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vluxseg6ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32m1_tum( @@ -865,7 +865,7 @@ void test_vluxseg6ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i64m1_tum( @@ -886,7 +886,7 @@ void test_vluxseg6ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf8_tum( @@ -907,7 +907,7 @@ void test_vluxseg6ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf4_tum( @@ -928,7 +928,7 @@ void test_vluxseg6ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vluxseg6ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8m1_tum( @@ -970,7 +970,7 @@ void test_vluxseg6ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf4_tum( @@ -991,7 +991,7 @@ void test_vluxseg6ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf2_tum( @@ -1012,7 +1012,7 @@ void test_vluxseg6ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16m1_tum( @@ -1033,7 +1033,7 @@ void test_vluxseg6ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg6ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32m1_tum( @@ -1075,7 +1075,7 @@ void test_vluxseg6ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u64m1_tum( @@ -1096,7 +1096,7 @@ void test_vluxseg6ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf4_tumu( @@ -1117,7 +1117,7 @@ void test_vluxseg6ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf2_tumu( @@ -1138,7 +1138,7 @@ void test_vluxseg6ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vluxseg6ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32mf2_tumu( @@ -1180,7 +1180,7 @@ void test_vluxseg6ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32m1_tumu( @@ -1201,7 +1201,7 @@ void test_vluxseg6ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f64m1_tumu( @@ -1222,7 +1222,7 @@ void test_vluxseg6ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf8_tumu( @@ -1243,7 +1243,7 @@ void test_vluxseg6ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vluxseg6ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf2_tumu( @@ -1285,7 +1285,7 @@ void test_vluxseg6ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8m1_tumu( @@ -1306,7 +1306,7 @@ void test_vluxseg6ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf4_tumu( @@ -1327,7 +1327,7 @@ void test_vluxseg6ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf2_tumu( @@ -1348,7 +1348,7 @@ void test_vluxseg6ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg6ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32mf2_tumu( @@ -1390,7 +1390,7 @@ void test_vluxseg6ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32m1_tumu( @@ -1411,7 +1411,7 @@ void test_vluxseg6ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i64m1_tumu( @@ -1432,7 +1432,7 @@ void test_vluxseg6ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf8_tumu( @@ -1453,7 +1453,7 @@ void test_vluxseg6ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf4_tumu( @@ -1474,7 +1474,7 @@ void test_vluxseg6ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf2_tumu( @@ -1495,7 +1495,7 @@ void test_vluxseg6ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8m1_tumu( @@ -1516,7 +1516,7 @@ void test_vluxseg6ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf4_tumu( @@ -1537,7 +1537,7 @@ void test_vluxseg6ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf2_tumu( @@ -1558,7 +1558,7 @@ void test_vluxseg6ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg6ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32mf2_tumu( @@ -1600,7 +1600,7 @@ void test_vluxseg6ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32m1_tumu( @@ -1621,7 +1621,7 @@ void test_vluxseg6ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u64m1_tumu( @@ -1642,7 +1642,7 @@ void test_vluxseg6ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf4_mu( @@ -1663,7 +1663,7 @@ void test_vluxseg6ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16mf2_mu( @@ -1684,7 +1684,7 @@ void test_vluxseg6ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f16m1_mu( @@ -1705,7 +1705,7 @@ void test_vluxseg6ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32mf2_mu( @@ -1726,7 +1726,7 @@ void test_vluxseg6ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f32m1_mu( @@ -1747,7 +1747,7 @@ void test_vluxseg6ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_f64m1_mu( @@ -1768,7 +1768,7 @@ void test_vluxseg6ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf8_mu( @@ -1789,7 +1789,7 @@ void test_vluxseg6ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf4_mu( @@ -1810,7 +1810,7 @@ void test_vluxseg6ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8mf2_mu( @@ -1831,7 +1831,7 @@ void test_vluxseg6ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i8m1_mu( @@ -1852,7 +1852,7 @@ void test_vluxseg6ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf4_mu( @@ -1873,7 +1873,7 @@ void test_vluxseg6ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16mf2_mu( @@ -1894,7 +1894,7 @@ void test_vluxseg6ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i16m1_mu( @@ -1915,7 +1915,7 @@ void test_vluxseg6ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32mf2_mu( @@ -1936,7 +1936,7 @@ void test_vluxseg6ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i32m1_mu( @@ -1957,7 +1957,7 @@ void test_vluxseg6ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_i64m1_mu( @@ -1978,7 +1978,7 @@ void test_vluxseg6ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf8_mu( @@ -1999,7 +1999,7 @@ void test_vluxseg6ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf4_mu( @@ -2020,7 +2020,7 @@ void test_vluxseg6ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8mf2_mu( @@ -2041,7 +2041,7 @@ void test_vluxseg6ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u8m1_mu( @@ -2062,7 +2062,7 @@ void test_vluxseg6ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg6ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf4_mu( @@ -2083,7 +2083,7 @@ void test_vluxseg6ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16mf2_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg6ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u16m1_mu( @@ -2125,7 +2125,7 @@ void test_vluxseg6ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg6ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32mf2_mu( @@ -2146,7 +2146,7 @@ void test_vluxseg6ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u32m1_mu( @@ -2167,7 +2167,7 @@ void test_vluxseg6ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg6ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei16_v_u64m1_mu( @@ -2188,6 +2188,6 @@ void test_vluxseg6ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg6ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c index fa32b64edd51a7cd9895da15cd273d773ee7265d..b6410a8617ccc347c0c1a828eb54433fbd39f3ac 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei32.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vluxseg6ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vluxseg6ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32mf2_tu( @@ -88,7 +88,7 @@ void test_vluxseg6ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32m1_tu( @@ -109,7 +109,7 @@ void test_vluxseg6ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f64m1_tu( @@ -130,7 +130,7 @@ void test_vluxseg6ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf8_tu( @@ -151,7 +151,7 @@ void test_vluxseg6ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf4_tu( @@ -172,7 +172,7 @@ void test_vluxseg6ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf2_tu( @@ -193,7 +193,7 @@ void test_vluxseg6ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8m1_tu( @@ -214,7 +214,7 @@ void test_vluxseg6ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf4_tu( @@ -235,7 +235,7 @@ void test_vluxseg6ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf2_tu( @@ -256,7 +256,7 @@ void test_vluxseg6ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vluxseg6ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32mf2_tu( @@ -298,7 +298,7 @@ void test_vluxseg6ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32m1_tu( @@ -319,7 +319,7 @@ void test_vluxseg6ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i64m1_tu( @@ -340,7 +340,7 @@ void test_vluxseg6ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf8_tu( @@ -361,7 +361,7 @@ void test_vluxseg6ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf4_tu( @@ -382,7 +382,7 @@ void test_vluxseg6ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf2_tu( @@ -403,7 +403,7 @@ void test_vluxseg6ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8m1_tu( @@ -424,7 +424,7 @@ void test_vluxseg6ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf4_tu( @@ -445,7 +445,7 @@ void test_vluxseg6ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf2_tu( @@ -466,7 +466,7 @@ void test_vluxseg6ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16m1_tu( @@ -487,7 +487,7 @@ void test_vluxseg6ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32mf2_tu( @@ -508,7 +508,7 @@ void test_vluxseg6ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32m1_tu( @@ -529,7 +529,7 @@ void test_vluxseg6ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u64m1_tu( @@ -550,7 +550,7 @@ void test_vluxseg6ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf4_tum( @@ -571,7 +571,7 @@ void test_vluxseg6ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf2_tum( @@ -592,7 +592,7 @@ void test_vluxseg6ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16m1_tum( @@ -613,7 +613,7 @@ void test_vluxseg6ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vluxseg6ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32m1_tum( @@ -655,7 +655,7 @@ void test_vluxseg6ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f64m1_tum( @@ -676,7 +676,7 @@ void test_vluxseg6ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf8_tum( @@ -697,7 +697,7 @@ void test_vluxseg6ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf4_tum( @@ -718,7 +718,7 @@ void test_vluxseg6ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vluxseg6ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8m1_tum( @@ -760,7 +760,7 @@ void test_vluxseg6ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf4_tum( @@ -781,7 +781,7 @@ void test_vluxseg6ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf2_tum( @@ -802,7 +802,7 @@ void test_vluxseg6ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16m1_tum( @@ -823,7 +823,7 @@ void test_vluxseg6ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vluxseg6ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32m1_tum( @@ -865,7 +865,7 @@ void test_vluxseg6ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i64m1_tum( @@ -886,7 +886,7 @@ void test_vluxseg6ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf8_tum( @@ -907,7 +907,7 @@ void test_vluxseg6ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf4_tum( @@ -928,7 +928,7 @@ void test_vluxseg6ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vluxseg6ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8m1_tum( @@ -970,7 +970,7 @@ void test_vluxseg6ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf4_tum( @@ -991,7 +991,7 @@ void test_vluxseg6ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf2_tum( @@ -1012,7 +1012,7 @@ void test_vluxseg6ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16m1_tum( @@ -1033,7 +1033,7 @@ void test_vluxseg6ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg6ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32m1_tum( @@ -1075,7 +1075,7 @@ void test_vluxseg6ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u64m1_tum( @@ -1096,7 +1096,7 @@ void test_vluxseg6ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf4_tumu( @@ -1117,7 +1117,7 @@ void test_vluxseg6ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf2_tumu( @@ -1138,7 +1138,7 @@ void test_vluxseg6ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vluxseg6ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32mf2_tumu( @@ -1180,7 +1180,7 @@ void test_vluxseg6ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32m1_tumu( @@ -1201,7 +1201,7 @@ void test_vluxseg6ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f64m1_tumu( @@ -1222,7 +1222,7 @@ void test_vluxseg6ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf8_tumu( @@ -1243,7 +1243,7 @@ void test_vluxseg6ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vluxseg6ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf2_tumu( @@ -1285,7 +1285,7 @@ void test_vluxseg6ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8m1_tumu( @@ -1306,7 +1306,7 @@ void test_vluxseg6ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf4_tumu( @@ -1327,7 +1327,7 @@ void test_vluxseg6ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf2_tumu( @@ -1348,7 +1348,7 @@ void test_vluxseg6ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg6ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32mf2_tumu( @@ -1390,7 +1390,7 @@ void test_vluxseg6ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32m1_tumu( @@ -1411,7 +1411,7 @@ void test_vluxseg6ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i64m1_tumu( @@ -1432,7 +1432,7 @@ void test_vluxseg6ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf8_tumu( @@ -1453,7 +1453,7 @@ void test_vluxseg6ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf4_tumu( @@ -1474,7 +1474,7 @@ void test_vluxseg6ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf2_tumu( @@ -1495,7 +1495,7 @@ void test_vluxseg6ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8m1_tumu( @@ -1516,7 +1516,7 @@ void test_vluxseg6ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf4_tumu( @@ -1537,7 +1537,7 @@ void test_vluxseg6ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf2_tumu( @@ -1558,7 +1558,7 @@ void test_vluxseg6ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg6ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32mf2_tumu( @@ -1600,7 +1600,7 @@ void test_vluxseg6ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32m1_tumu( @@ -1621,7 +1621,7 @@ void test_vluxseg6ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u64m1_tumu( @@ -1642,7 +1642,7 @@ void test_vluxseg6ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf4_mu( @@ -1663,7 +1663,7 @@ void test_vluxseg6ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16mf2_mu( @@ -1684,7 +1684,7 @@ void test_vluxseg6ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f16m1_mu( @@ -1705,7 +1705,7 @@ void test_vluxseg6ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32mf2_mu( @@ -1726,7 +1726,7 @@ void test_vluxseg6ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f32m1_mu( @@ -1747,7 +1747,7 @@ void test_vluxseg6ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_f64m1_mu( @@ -1768,7 +1768,7 @@ void test_vluxseg6ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf8_mu( @@ -1789,7 +1789,7 @@ void test_vluxseg6ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf4_mu( @@ -1810,7 +1810,7 @@ void test_vluxseg6ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8mf2_mu( @@ -1831,7 +1831,7 @@ void test_vluxseg6ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i8m1_mu( @@ -1852,7 +1852,7 @@ void test_vluxseg6ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf4_mu( @@ -1873,7 +1873,7 @@ void test_vluxseg6ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16mf2_mu( @@ -1894,7 +1894,7 @@ void test_vluxseg6ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i16m1_mu( @@ -1915,7 +1915,7 @@ void test_vluxseg6ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32mf2_mu( @@ -1936,7 +1936,7 @@ void test_vluxseg6ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i32m1_mu( @@ -1957,7 +1957,7 @@ void test_vluxseg6ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_i64m1_mu( @@ -1978,7 +1978,7 @@ void test_vluxseg6ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf8_mu( @@ -1999,7 +1999,7 @@ void test_vluxseg6ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf4_mu( @@ -2020,7 +2020,7 @@ void test_vluxseg6ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8mf2_mu( @@ -2041,7 +2041,7 @@ void test_vluxseg6ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u8m1_mu( @@ -2062,7 +2062,7 @@ void test_vluxseg6ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg6ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf4_mu( @@ -2083,7 +2083,7 @@ void test_vluxseg6ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16mf2_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg6ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u16m1_mu( @@ -2125,7 +2125,7 @@ void test_vluxseg6ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg6ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32mf2_mu( @@ -2146,7 +2146,7 @@ void test_vluxseg6ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u32m1_mu( @@ -2167,7 +2167,7 @@ void test_vluxseg6ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg6ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei32_v_u64m1_mu( @@ -2188,6 +2188,6 @@ void test_vluxseg6ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg6ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c index 098409b101d0d527ec7d1830f901e01b41b7a80d..2dd89129184c271752385b35fb9425a8b5263d82 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei64.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vluxseg6ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vluxseg6ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32mf2_tu( @@ -88,7 +88,7 @@ void test_vluxseg6ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32m1_tu( @@ -109,7 +109,7 @@ void test_vluxseg6ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f64m1_tu( @@ -130,7 +130,7 @@ void test_vluxseg6ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf8_tu( @@ -151,7 +151,7 @@ void test_vluxseg6ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf4_tu( @@ -172,7 +172,7 @@ void test_vluxseg6ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf2_tu( @@ -193,7 +193,7 @@ void test_vluxseg6ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8m1_tu( @@ -214,7 +214,7 @@ void test_vluxseg6ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf4_tu( @@ -235,7 +235,7 @@ void test_vluxseg6ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf2_tu( @@ -256,7 +256,7 @@ void test_vluxseg6ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vluxseg6ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32mf2_tu( @@ -298,7 +298,7 @@ void test_vluxseg6ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32m1_tu( @@ -319,7 +319,7 @@ void test_vluxseg6ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i64m1_tu( @@ -340,7 +340,7 @@ void test_vluxseg6ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf8_tu( @@ -361,7 +361,7 @@ void test_vluxseg6ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf4_tu( @@ -382,7 +382,7 @@ void test_vluxseg6ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf2_tu( @@ -403,7 +403,7 @@ void test_vluxseg6ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8m1_tu( @@ -424,7 +424,7 @@ void test_vluxseg6ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf4_tu( @@ -445,7 +445,7 @@ void test_vluxseg6ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf2_tu( @@ -466,7 +466,7 @@ void test_vluxseg6ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16m1_tu( @@ -487,7 +487,7 @@ void test_vluxseg6ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32mf2_tu( @@ -508,7 +508,7 @@ void test_vluxseg6ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32m1_tu( @@ -529,7 +529,7 @@ void test_vluxseg6ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u64m1_tu( @@ -550,7 +550,7 @@ void test_vluxseg6ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf4_tum( @@ -571,7 +571,7 @@ void test_vluxseg6ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf2_tum( @@ -592,7 +592,7 @@ void test_vluxseg6ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16m1_tum( @@ -613,7 +613,7 @@ void test_vluxseg6ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vluxseg6ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32m1_tum( @@ -655,7 +655,7 @@ void test_vluxseg6ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f64m1_tum( @@ -676,7 +676,7 @@ void test_vluxseg6ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf8_tum( @@ -697,7 +697,7 @@ void test_vluxseg6ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf4_tum( @@ -718,7 +718,7 @@ void test_vluxseg6ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vluxseg6ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8m1_tum( @@ -760,7 +760,7 @@ void test_vluxseg6ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf4_tum( @@ -781,7 +781,7 @@ void test_vluxseg6ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf2_tum( @@ -802,7 +802,7 @@ void test_vluxseg6ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16m1_tum( @@ -823,7 +823,7 @@ void test_vluxseg6ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vluxseg6ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32m1_tum( @@ -865,7 +865,7 @@ void test_vluxseg6ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i64m1_tum( @@ -886,7 +886,7 @@ void test_vluxseg6ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf8_tum( @@ -907,7 +907,7 @@ void test_vluxseg6ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf4_tum( @@ -928,7 +928,7 @@ void test_vluxseg6ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vluxseg6ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8m1_tum( @@ -970,7 +970,7 @@ void test_vluxseg6ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf4_tum( @@ -991,7 +991,7 @@ void test_vluxseg6ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf2_tum( @@ -1012,7 +1012,7 @@ void test_vluxseg6ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16m1_tum( @@ -1033,7 +1033,7 @@ void test_vluxseg6ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg6ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32m1_tum( @@ -1075,7 +1075,7 @@ void test_vluxseg6ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u64m1_tum( @@ -1096,7 +1096,7 @@ void test_vluxseg6ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf4_tumu( @@ -1117,7 +1117,7 @@ void test_vluxseg6ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf2_tumu( @@ -1138,7 +1138,7 @@ void test_vluxseg6ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vluxseg6ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32mf2_tumu( @@ -1180,7 +1180,7 @@ void test_vluxseg6ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32m1_tumu( @@ -1201,7 +1201,7 @@ void test_vluxseg6ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f64m1_tumu( @@ -1222,7 +1222,7 @@ void test_vluxseg6ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf8_tumu( @@ -1243,7 +1243,7 @@ void test_vluxseg6ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vluxseg6ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf2_tumu( @@ -1285,7 +1285,7 @@ void test_vluxseg6ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8m1_tumu( @@ -1306,7 +1306,7 @@ void test_vluxseg6ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf4_tumu( @@ -1327,7 +1327,7 @@ void test_vluxseg6ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf2_tumu( @@ -1348,7 +1348,7 @@ void test_vluxseg6ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg6ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32mf2_tumu( @@ -1390,7 +1390,7 @@ void test_vluxseg6ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32m1_tumu( @@ -1411,7 +1411,7 @@ void test_vluxseg6ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i64m1_tumu( @@ -1432,7 +1432,7 @@ void test_vluxseg6ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf8_tumu( @@ -1453,7 +1453,7 @@ void test_vluxseg6ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf4_tumu( @@ -1474,7 +1474,7 @@ void test_vluxseg6ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf2_tumu( @@ -1495,7 +1495,7 @@ void test_vluxseg6ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8m1_tumu( @@ -1516,7 +1516,7 @@ void test_vluxseg6ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf4_tumu( @@ -1537,7 +1537,7 @@ void test_vluxseg6ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf2_tumu( @@ -1558,7 +1558,7 @@ void test_vluxseg6ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg6ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32mf2_tumu( @@ -1600,7 +1600,7 @@ void test_vluxseg6ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32m1_tumu( @@ -1621,7 +1621,7 @@ void test_vluxseg6ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u64m1_tumu( @@ -1642,7 +1642,7 @@ void test_vluxseg6ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf4_mu( @@ -1663,7 +1663,7 @@ void test_vluxseg6ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16mf2_mu( @@ -1684,7 +1684,7 @@ void test_vluxseg6ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f16m1_mu( @@ -1705,7 +1705,7 @@ void test_vluxseg6ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32mf2_mu( @@ -1726,7 +1726,7 @@ void test_vluxseg6ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f32m1_mu( @@ -1747,7 +1747,7 @@ void test_vluxseg6ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_f64m1_mu( @@ -1768,7 +1768,7 @@ void test_vluxseg6ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf8_mu( @@ -1789,7 +1789,7 @@ void test_vluxseg6ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf4_mu( @@ -1810,7 +1810,7 @@ void test_vluxseg6ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8mf2_mu( @@ -1831,7 +1831,7 @@ void test_vluxseg6ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i8m1_mu( @@ -1852,7 +1852,7 @@ void test_vluxseg6ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf4_mu( @@ -1873,7 +1873,7 @@ void test_vluxseg6ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16mf2_mu( @@ -1894,7 +1894,7 @@ void test_vluxseg6ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i16m1_mu( @@ -1915,7 +1915,7 @@ void test_vluxseg6ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32mf2_mu( @@ -1936,7 +1936,7 @@ void test_vluxseg6ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i32m1_mu( @@ -1957,7 +1957,7 @@ void test_vluxseg6ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_i64m1_mu( @@ -1978,7 +1978,7 @@ void test_vluxseg6ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf8_mu( @@ -1999,7 +1999,7 @@ void test_vluxseg6ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf4_mu( @@ -2020,7 +2020,7 @@ void test_vluxseg6ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8mf2_mu( @@ -2041,7 +2041,7 @@ void test_vluxseg6ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u8m1_mu( @@ -2062,7 +2062,7 @@ void test_vluxseg6ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg6ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf4_mu( @@ -2083,7 +2083,7 @@ void test_vluxseg6ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16mf2_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg6ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u16m1_mu( @@ -2125,7 +2125,7 @@ void test_vluxseg6ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg6ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32mf2_mu( @@ -2146,7 +2146,7 @@ void test_vluxseg6ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u32m1_mu( @@ -2167,7 +2167,7 @@ void test_vluxseg6ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg6ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei64_v_u64m1_mu( @@ -2188,6 +2188,6 @@ void test_vluxseg6ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg6ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c index 8b04a9b4b286bda30e94b6e4576ba92faf7f7d31..0166b68763be32cf85d7886b562a3542ce946790 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg6ei8.c @@ -25,7 +25,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf2_tu( @@ -46,7 +46,7 @@ void test_vluxseg6ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16m1_tu( @@ -67,7 +67,7 @@ void test_vluxseg6ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32mf2_tu( @@ -88,7 +88,7 @@ void test_vluxseg6ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32m1_tu( @@ -109,7 +109,7 @@ void test_vluxseg6ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f64m1_tu( @@ -130,7 +130,7 @@ void test_vluxseg6ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf8_tu( @@ -151,7 +151,7 @@ void test_vluxseg6ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf4_tu( @@ -172,7 +172,7 @@ void test_vluxseg6ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf2_tu( @@ -193,7 +193,7 @@ void test_vluxseg6ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8m1_tu( @@ -214,7 +214,7 @@ void test_vluxseg6ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf4_tu( @@ -235,7 +235,7 @@ void test_vluxseg6ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf2_tu( @@ -256,7 +256,7 @@ void test_vluxseg6ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16m1_tu( @@ -277,7 +277,7 @@ void test_vluxseg6ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32mf2_tu( @@ -298,7 +298,7 @@ void test_vluxseg6ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32m1_tu( @@ -319,7 +319,7 @@ void test_vluxseg6ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i64m1_tu( @@ -340,7 +340,7 @@ void test_vluxseg6ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf8_tu( @@ -361,7 +361,7 @@ void test_vluxseg6ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf4_tu( @@ -382,7 +382,7 @@ void test_vluxseg6ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf2_tu( @@ -403,7 +403,7 @@ void test_vluxseg6ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8m1_tu( @@ -424,7 +424,7 @@ void test_vluxseg6ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf4_tu( @@ -445,7 +445,7 @@ void test_vluxseg6ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf2_tu( @@ -466,7 +466,7 @@ void test_vluxseg6ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16m1_tu( @@ -487,7 +487,7 @@ void test_vluxseg6ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32mf2_tu( @@ -508,7 +508,7 @@ void test_vluxseg6ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32m1_tu( @@ -529,7 +529,7 @@ void test_vluxseg6ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u64m1_tu( @@ -550,7 +550,7 @@ void test_vluxseg6ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf4_tum( @@ -571,7 +571,7 @@ void test_vluxseg6ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf2_tum( @@ -592,7 +592,7 @@ void test_vluxseg6ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16m1_tum( @@ -613,7 +613,7 @@ void test_vluxseg6ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32mf2_tum( @@ -634,7 +634,7 @@ void test_vluxseg6ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32m1_tum( @@ -655,7 +655,7 @@ void test_vluxseg6ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f64m1_tum( @@ -676,7 +676,7 @@ void test_vluxseg6ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf8_tum( @@ -697,7 +697,7 @@ void test_vluxseg6ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf4_tum( @@ -718,7 +718,7 @@ void test_vluxseg6ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf2_tum( @@ -739,7 +739,7 @@ void test_vluxseg6ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8m1_tum( @@ -760,7 +760,7 @@ void test_vluxseg6ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf4_tum( @@ -781,7 +781,7 @@ void test_vluxseg6ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf2_tum( @@ -802,7 +802,7 @@ void test_vluxseg6ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16m1_tum( @@ -823,7 +823,7 @@ void test_vluxseg6ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32mf2_tum( @@ -844,7 +844,7 @@ void test_vluxseg6ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32m1_tum( @@ -865,7 +865,7 @@ void test_vluxseg6ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i64m1_tum( @@ -886,7 +886,7 @@ void test_vluxseg6ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf8_tum( @@ -907,7 +907,7 @@ void test_vluxseg6ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf4_tum( @@ -928,7 +928,7 @@ void test_vluxseg6ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf2_tum( @@ -949,7 +949,7 @@ void test_vluxseg6ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8m1_tum( @@ -970,7 +970,7 @@ void test_vluxseg6ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf4_tum( @@ -991,7 +991,7 @@ void test_vluxseg6ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf2_tum( @@ -1012,7 +1012,7 @@ void test_vluxseg6ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16m1_tum( @@ -1033,7 +1033,7 @@ void test_vluxseg6ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32mf2_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg6ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32m1_tum( @@ -1075,7 +1075,7 @@ void test_vluxseg6ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u64m1_tum( @@ -1096,7 +1096,7 @@ void test_vluxseg6ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf4_tumu( @@ -1117,7 +1117,7 @@ void test_vluxseg6ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf2_tumu( @@ -1138,7 +1138,7 @@ void test_vluxseg6ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16m1_tumu( @@ -1159,7 +1159,7 @@ void test_vluxseg6ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32mf2_tumu( @@ -1180,7 +1180,7 @@ void test_vluxseg6ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32m1_tumu( @@ -1201,7 +1201,7 @@ void test_vluxseg6ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f64m1_tumu( @@ -1222,7 +1222,7 @@ void test_vluxseg6ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf8_tumu( @@ -1243,7 +1243,7 @@ void test_vluxseg6ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf4_tumu( @@ -1264,7 +1264,7 @@ void test_vluxseg6ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf2_tumu( @@ -1285,7 +1285,7 @@ void test_vluxseg6ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8m1_tumu( @@ -1306,7 +1306,7 @@ void test_vluxseg6ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf4_tumu( @@ -1327,7 +1327,7 @@ void test_vluxseg6ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf2_tumu( @@ -1348,7 +1348,7 @@ void test_vluxseg6ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16m1_tumu( @@ -1369,7 +1369,7 @@ void test_vluxseg6ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32mf2_tumu( @@ -1390,7 +1390,7 @@ void test_vluxseg6ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32m1_tumu( @@ -1411,7 +1411,7 @@ void test_vluxseg6ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i64m1_tumu( @@ -1432,7 +1432,7 @@ void test_vluxseg6ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf8_tumu( @@ -1453,7 +1453,7 @@ void test_vluxseg6ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf4_tumu( @@ -1474,7 +1474,7 @@ void test_vluxseg6ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf2_tumu( @@ -1495,7 +1495,7 @@ void test_vluxseg6ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8m1_tumu( @@ -1516,7 +1516,7 @@ void test_vluxseg6ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf4_tumu( @@ -1537,7 +1537,7 @@ void test_vluxseg6ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf2_tumu( @@ -1558,7 +1558,7 @@ void test_vluxseg6ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16m1_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg6ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32mf2_tumu( @@ -1600,7 +1600,7 @@ void test_vluxseg6ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32m1_tumu( @@ -1621,7 +1621,7 @@ void test_vluxseg6ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u64m1_tumu( @@ -1642,7 +1642,7 @@ void test_vluxseg6ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf4_mu( @@ -1663,7 +1663,7 @@ void test_vluxseg6ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16mf2_mu( @@ -1684,7 +1684,7 @@ void test_vluxseg6ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f16m1_mu( @@ -1705,7 +1705,7 @@ void test_vluxseg6ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32mf2_mu( @@ -1726,7 +1726,7 @@ void test_vluxseg6ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f32m1_mu( @@ -1747,7 +1747,7 @@ void test_vluxseg6ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_f64m1_mu( @@ -1768,7 +1768,7 @@ void test_vluxseg6ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf8_mu( @@ -1789,7 +1789,7 @@ void test_vluxseg6ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf4_mu( @@ -1810,7 +1810,7 @@ void test_vluxseg6ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8mf2_mu( @@ -1831,7 +1831,7 @@ void test_vluxseg6ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i8m1_mu( @@ -1852,7 +1852,7 @@ void test_vluxseg6ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf4_mu( @@ -1873,7 +1873,7 @@ void test_vluxseg6ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16mf2_mu( @@ -1894,7 +1894,7 @@ void test_vluxseg6ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i16m1_mu( @@ -1915,7 +1915,7 @@ void test_vluxseg6ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32mf2_mu( @@ -1936,7 +1936,7 @@ void test_vluxseg6ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i32m1_mu( @@ -1957,7 +1957,7 @@ void test_vluxseg6ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_i64m1_mu( @@ -1978,7 +1978,7 @@ void test_vluxseg6ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf8_mu( @@ -1999,7 +1999,7 @@ void test_vluxseg6ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf4_mu( @@ -2020,7 +2020,7 @@ void test_vluxseg6ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8mf2_mu( @@ -2041,7 +2041,7 @@ void test_vluxseg6ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u8m1_mu( @@ -2062,7 +2062,7 @@ void test_vluxseg6ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg6ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf4_mu( @@ -2083,7 +2083,7 @@ void test_vluxseg6ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16mf2_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg6ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u16m1_mu( @@ -2125,7 +2125,7 @@ void test_vluxseg6ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg6ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32mf2_mu( @@ -2146,7 +2146,7 @@ void test_vluxseg6ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u32m1_mu( @@ -2167,7 +2167,7 @@ void test_vluxseg6ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg6ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg6ei8_v_u64m1_mu( @@ -2188,6 +2188,6 @@ void test_vluxseg6ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg6ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg6ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); + return __riscv_vluxseg6ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c index 6f8457a06cceee15816dd421a06042a834abe1d3..ed454eaed26c42cf72c37e69941baa60b8707cf2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei16.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vluxseg7ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vluxseg7ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32mf2_tu( @@ -96,7 +96,7 @@ void test_vluxseg7ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32m1_tu( @@ -119,7 +119,7 @@ void test_vluxseg7ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f64m1_tu( @@ -142,7 +142,7 @@ void test_vluxseg7ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf8_tu( @@ -165,7 +165,7 @@ void test_vluxseg7ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf4_tu( @@ -188,7 +188,7 @@ void test_vluxseg7ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf2_tu( @@ -211,7 +211,7 @@ void test_vluxseg7ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8m1_tu( @@ -234,7 +234,7 @@ void test_vluxseg7ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf4_tu( @@ -257,7 +257,7 @@ void test_vluxseg7ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf2_tu( @@ -280,7 +280,7 @@ void test_vluxseg7ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16m1_tu( @@ -303,7 +303,7 @@ void test_vluxseg7ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32mf2_tu( @@ -326,7 +326,7 @@ void test_vluxseg7ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32m1_tu( @@ -349,7 +349,7 @@ void test_vluxseg7ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i64m1_tu( @@ -372,7 +372,7 @@ void test_vluxseg7ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vluxseg7ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf4_tu( @@ -418,7 +418,7 @@ void test_vluxseg7ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf2_tu( @@ -441,7 +441,7 @@ void test_vluxseg7ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8m1_tu( @@ -464,7 +464,7 @@ void test_vluxseg7ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf4_tu( @@ -487,7 +487,7 @@ void test_vluxseg7ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf2_tu( @@ -510,7 +510,7 @@ void test_vluxseg7ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16m1_tu( @@ -533,7 +533,7 @@ void test_vluxseg7ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32mf2_tu( @@ -556,7 +556,7 @@ void test_vluxseg7ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32m1_tu( @@ -579,7 +579,7 @@ void test_vluxseg7ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vluxseg7ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf4_tum( @@ -625,7 +625,7 @@ void test_vluxseg7ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf2_tum( @@ -648,7 +648,7 @@ void test_vluxseg7ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16m1_tum( @@ -671,7 +671,7 @@ void test_vluxseg7ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32mf2_tum( @@ -694,7 +694,7 @@ void test_vluxseg7ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32m1_tum( @@ -717,7 +717,7 @@ void test_vluxseg7ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f64m1_tum( @@ -740,7 +740,7 @@ void test_vluxseg7ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf8_tum( @@ -763,7 +763,7 @@ void test_vluxseg7ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vluxseg7ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf2_tum( @@ -809,7 +809,7 @@ void test_vluxseg7ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8m1_tum( @@ -832,7 +832,7 @@ void test_vluxseg7ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf4_tum( @@ -855,7 +855,7 @@ void test_vluxseg7ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf2_tum( @@ -878,7 +878,7 @@ void test_vluxseg7ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vluxseg7ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32mf2_tum( @@ -924,7 +924,7 @@ void test_vluxseg7ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32m1_tum( @@ -947,7 +947,7 @@ void test_vluxseg7ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i64m1_tum( @@ -970,7 +970,7 @@ void test_vluxseg7ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf8_tum( @@ -993,7 +993,7 @@ void test_vluxseg7ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf4_tum( @@ -1016,7 +1016,7 @@ void test_vluxseg7ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf2_tum( @@ -1039,7 +1039,7 @@ void test_vluxseg7ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8m1_tum( @@ -1062,7 +1062,7 @@ void test_vluxseg7ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf4_tum( @@ -1085,7 +1085,7 @@ void test_vluxseg7ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf2_tum( @@ -1108,7 +1108,7 @@ void test_vluxseg7ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16m1_tum( @@ -1131,7 +1131,7 @@ void test_vluxseg7ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32mf2_tum( @@ -1154,7 +1154,7 @@ void test_vluxseg7ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32m1_tum( @@ -1177,7 +1177,7 @@ void test_vluxseg7ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u64m1_tum( @@ -1200,7 +1200,7 @@ void test_vluxseg7ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf4_tumu( @@ -1223,7 +1223,7 @@ void test_vluxseg7ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf2_tumu( @@ -1246,7 +1246,7 @@ void test_vluxseg7ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16m1_tumu( @@ -1269,7 +1269,7 @@ void test_vluxseg7ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32mf2_tumu( @@ -1292,7 +1292,7 @@ void test_vluxseg7ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32m1_tumu( @@ -1315,7 +1315,7 @@ void test_vluxseg7ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f64m1_tumu( @@ -1338,7 +1338,7 @@ void test_vluxseg7ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf8_tumu( @@ -1361,7 +1361,7 @@ void test_vluxseg7ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf4_tumu( @@ -1384,7 +1384,7 @@ void test_vluxseg7ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf2_tumu( @@ -1407,7 +1407,7 @@ void test_vluxseg7ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8m1_tumu( @@ -1430,7 +1430,7 @@ void test_vluxseg7ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf4_tumu( @@ -1453,7 +1453,7 @@ void test_vluxseg7ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf2_tumu( @@ -1476,7 +1476,7 @@ void test_vluxseg7ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vluxseg7ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32mf2_tumu( @@ -1522,7 +1522,7 @@ void test_vluxseg7ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32m1_tumu( @@ -1545,7 +1545,7 @@ void test_vluxseg7ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i64m1_tumu( @@ -1568,7 +1568,7 @@ void test_vluxseg7ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf8_tumu( @@ -1591,7 +1591,7 @@ void test_vluxseg7ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf4_tumu( @@ -1614,7 +1614,7 @@ void test_vluxseg7ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf2_tumu( @@ -1637,7 +1637,7 @@ void test_vluxseg7ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8m1_tumu( @@ -1660,7 +1660,7 @@ void test_vluxseg7ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf4_tumu( @@ -1683,7 +1683,7 @@ void test_vluxseg7ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf2_tumu( @@ -1706,7 +1706,7 @@ void test_vluxseg7ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16m1_tumu( @@ -1729,7 +1729,7 @@ void test_vluxseg7ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32mf2_tumu( @@ -1752,7 +1752,7 @@ void test_vluxseg7ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32m1_tumu( @@ -1775,7 +1775,7 @@ void test_vluxseg7ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u64m1_tumu( @@ -1798,7 +1798,7 @@ void test_vluxseg7ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf4_mu( @@ -1821,7 +1821,7 @@ void test_vluxseg7ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16mf2_mu( @@ -1844,7 +1844,7 @@ void test_vluxseg7ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f16m1_mu( @@ -1867,7 +1867,7 @@ void test_vluxseg7ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32mf2_mu( @@ -1890,7 +1890,7 @@ void test_vluxseg7ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f32m1_mu( @@ -1913,7 +1913,7 @@ void test_vluxseg7ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_f64m1_mu( @@ -1936,7 +1936,7 @@ void test_vluxseg7ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vluxseg7ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf4_mu( @@ -1982,7 +1982,7 @@ void test_vluxseg7ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8mf2_mu( @@ -2005,7 +2005,7 @@ void test_vluxseg7ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i8m1_mu( @@ -2028,7 +2028,7 @@ void test_vluxseg7ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf4_mu( @@ -2051,7 +2051,7 @@ void test_vluxseg7ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16mf2_mu( @@ -2074,7 +2074,7 @@ void test_vluxseg7ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i16m1_mu( @@ -2097,7 +2097,7 @@ void test_vluxseg7ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32mf2_mu( @@ -2120,7 +2120,7 @@ void test_vluxseg7ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i32m1_mu( @@ -2143,7 +2143,7 @@ void test_vluxseg7ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_i64m1_mu( @@ -2166,7 +2166,7 @@ void test_vluxseg7ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf8_mu( @@ -2189,7 +2189,7 @@ void test_vluxseg7ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf4_mu( @@ -2212,7 +2212,7 @@ void test_vluxseg7ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8mf2_mu( @@ -2235,7 +2235,7 @@ void test_vluxseg7ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u8m1_mu( @@ -2258,7 +2258,7 @@ void test_vluxseg7ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg7ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf4_mu( @@ -2281,7 +2281,7 @@ void test_vluxseg7ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16mf2_mu( @@ -2304,7 +2304,7 @@ void test_vluxseg7ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u16m1_mu( @@ -2327,7 +2327,7 @@ void test_vluxseg7ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg7ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32mf2_mu( @@ -2350,7 +2350,7 @@ void test_vluxseg7ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u32m1_mu( @@ -2373,7 +2373,7 @@ void test_vluxseg7ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg7ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei16_v_u64m1_mu( @@ -2396,6 +2396,6 @@ void test_vluxseg7ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg7ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c index c5f184c8d649ff2eebac82681d235d32b6d5e80b..29344ae4b1e7fe8310fda47a92fbef9bd8b00034 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei32.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vluxseg7ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vluxseg7ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32mf2_tu( @@ -96,7 +96,7 @@ void test_vluxseg7ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32m1_tu( @@ -119,7 +119,7 @@ void test_vluxseg7ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f64m1_tu( @@ -142,7 +142,7 @@ void test_vluxseg7ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf8_tu( @@ -165,7 +165,7 @@ void test_vluxseg7ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf4_tu( @@ -188,7 +188,7 @@ void test_vluxseg7ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf2_tu( @@ -211,7 +211,7 @@ void test_vluxseg7ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8m1_tu( @@ -234,7 +234,7 @@ void test_vluxseg7ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf4_tu( @@ -257,7 +257,7 @@ void test_vluxseg7ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf2_tu( @@ -280,7 +280,7 @@ void test_vluxseg7ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16m1_tu( @@ -303,7 +303,7 @@ void test_vluxseg7ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32mf2_tu( @@ -326,7 +326,7 @@ void test_vluxseg7ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32m1_tu( @@ -349,7 +349,7 @@ void test_vluxseg7ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i64m1_tu( @@ -372,7 +372,7 @@ void test_vluxseg7ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vluxseg7ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf4_tu( @@ -418,7 +418,7 @@ void test_vluxseg7ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf2_tu( @@ -441,7 +441,7 @@ void test_vluxseg7ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8m1_tu( @@ -464,7 +464,7 @@ void test_vluxseg7ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf4_tu( @@ -487,7 +487,7 @@ void test_vluxseg7ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf2_tu( @@ -510,7 +510,7 @@ void test_vluxseg7ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16m1_tu( @@ -533,7 +533,7 @@ void test_vluxseg7ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32mf2_tu( @@ -556,7 +556,7 @@ void test_vluxseg7ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32m1_tu( @@ -579,7 +579,7 @@ void test_vluxseg7ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vluxseg7ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf4_tum( @@ -625,7 +625,7 @@ void test_vluxseg7ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf2_tum( @@ -648,7 +648,7 @@ void test_vluxseg7ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16m1_tum( @@ -671,7 +671,7 @@ void test_vluxseg7ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32mf2_tum( @@ -694,7 +694,7 @@ void test_vluxseg7ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32m1_tum( @@ -717,7 +717,7 @@ void test_vluxseg7ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f64m1_tum( @@ -740,7 +740,7 @@ void test_vluxseg7ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf8_tum( @@ -763,7 +763,7 @@ void test_vluxseg7ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vluxseg7ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf2_tum( @@ -809,7 +809,7 @@ void test_vluxseg7ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8m1_tum( @@ -832,7 +832,7 @@ void test_vluxseg7ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf4_tum( @@ -855,7 +855,7 @@ void test_vluxseg7ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf2_tum( @@ -878,7 +878,7 @@ void test_vluxseg7ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vluxseg7ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32mf2_tum( @@ -924,7 +924,7 @@ void test_vluxseg7ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32m1_tum( @@ -947,7 +947,7 @@ void test_vluxseg7ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i64m1_tum( @@ -970,7 +970,7 @@ void test_vluxseg7ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf8_tum( @@ -993,7 +993,7 @@ void test_vluxseg7ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf4_tum( @@ -1016,7 +1016,7 @@ void test_vluxseg7ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf2_tum( @@ -1039,7 +1039,7 @@ void test_vluxseg7ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8m1_tum( @@ -1062,7 +1062,7 @@ void test_vluxseg7ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf4_tum( @@ -1085,7 +1085,7 @@ void test_vluxseg7ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf2_tum( @@ -1108,7 +1108,7 @@ void test_vluxseg7ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16m1_tum( @@ -1131,7 +1131,7 @@ void test_vluxseg7ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32mf2_tum( @@ -1154,7 +1154,7 @@ void test_vluxseg7ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32m1_tum( @@ -1177,7 +1177,7 @@ void test_vluxseg7ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u64m1_tum( @@ -1200,7 +1200,7 @@ void test_vluxseg7ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf4_tumu( @@ -1223,7 +1223,7 @@ void test_vluxseg7ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf2_tumu( @@ -1246,7 +1246,7 @@ void test_vluxseg7ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16m1_tumu( @@ -1269,7 +1269,7 @@ void test_vluxseg7ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32mf2_tumu( @@ -1292,7 +1292,7 @@ void test_vluxseg7ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32m1_tumu( @@ -1315,7 +1315,7 @@ void test_vluxseg7ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f64m1_tumu( @@ -1338,7 +1338,7 @@ void test_vluxseg7ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf8_tumu( @@ -1361,7 +1361,7 @@ void test_vluxseg7ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf4_tumu( @@ -1384,7 +1384,7 @@ void test_vluxseg7ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf2_tumu( @@ -1407,7 +1407,7 @@ void test_vluxseg7ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8m1_tumu( @@ -1430,7 +1430,7 @@ void test_vluxseg7ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf4_tumu( @@ -1453,7 +1453,7 @@ void test_vluxseg7ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf2_tumu( @@ -1476,7 +1476,7 @@ void test_vluxseg7ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vluxseg7ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32mf2_tumu( @@ -1522,7 +1522,7 @@ void test_vluxseg7ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32m1_tumu( @@ -1545,7 +1545,7 @@ void test_vluxseg7ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i64m1_tumu( @@ -1568,7 +1568,7 @@ void test_vluxseg7ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf8_tumu( @@ -1591,7 +1591,7 @@ void test_vluxseg7ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf4_tumu( @@ -1614,7 +1614,7 @@ void test_vluxseg7ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf2_tumu( @@ -1637,7 +1637,7 @@ void test_vluxseg7ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8m1_tumu( @@ -1660,7 +1660,7 @@ void test_vluxseg7ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf4_tumu( @@ -1683,7 +1683,7 @@ void test_vluxseg7ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf2_tumu( @@ -1706,7 +1706,7 @@ void test_vluxseg7ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16m1_tumu( @@ -1729,7 +1729,7 @@ void test_vluxseg7ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32mf2_tumu( @@ -1752,7 +1752,7 @@ void test_vluxseg7ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32m1_tumu( @@ -1775,7 +1775,7 @@ void test_vluxseg7ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u64m1_tumu( @@ -1798,7 +1798,7 @@ void test_vluxseg7ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf4_mu( @@ -1821,7 +1821,7 @@ void test_vluxseg7ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16mf2_mu( @@ -1844,7 +1844,7 @@ void test_vluxseg7ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f16m1_mu( @@ -1867,7 +1867,7 @@ void test_vluxseg7ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32mf2_mu( @@ -1890,7 +1890,7 @@ void test_vluxseg7ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f32m1_mu( @@ -1913,7 +1913,7 @@ void test_vluxseg7ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_f64m1_mu( @@ -1936,7 +1936,7 @@ void test_vluxseg7ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vluxseg7ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf4_mu( @@ -1982,7 +1982,7 @@ void test_vluxseg7ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8mf2_mu( @@ -2005,7 +2005,7 @@ void test_vluxseg7ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i8m1_mu( @@ -2028,7 +2028,7 @@ void test_vluxseg7ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf4_mu( @@ -2051,7 +2051,7 @@ void test_vluxseg7ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16mf2_mu( @@ -2074,7 +2074,7 @@ void test_vluxseg7ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i16m1_mu( @@ -2097,7 +2097,7 @@ void test_vluxseg7ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32mf2_mu( @@ -2120,7 +2120,7 @@ void test_vluxseg7ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i32m1_mu( @@ -2143,7 +2143,7 @@ void test_vluxseg7ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_i64m1_mu( @@ -2166,7 +2166,7 @@ void test_vluxseg7ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf8_mu( @@ -2189,7 +2189,7 @@ void test_vluxseg7ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf4_mu( @@ -2212,7 +2212,7 @@ void test_vluxseg7ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8mf2_mu( @@ -2235,7 +2235,7 @@ void test_vluxseg7ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u8m1_mu( @@ -2258,7 +2258,7 @@ void test_vluxseg7ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg7ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf4_mu( @@ -2281,7 +2281,7 @@ void test_vluxseg7ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16mf2_mu( @@ -2304,7 +2304,7 @@ void test_vluxseg7ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u16m1_mu( @@ -2327,7 +2327,7 @@ void test_vluxseg7ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg7ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32mf2_mu( @@ -2350,7 +2350,7 @@ void test_vluxseg7ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u32m1_mu( @@ -2373,7 +2373,7 @@ void test_vluxseg7ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg7ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei32_v_u64m1_mu( @@ -2396,6 +2396,6 @@ void test_vluxseg7ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg7ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c index 80059349ff064e830dff6c8cf3841343ec4eb8a3..ba3bbf2efecbe844bb3de0e76a5197d87e25bcba 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei64.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vluxseg7ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vluxseg7ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32mf2_tu( @@ -96,7 +96,7 @@ void test_vluxseg7ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32m1_tu( @@ -119,7 +119,7 @@ void test_vluxseg7ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f64m1_tu( @@ -142,7 +142,7 @@ void test_vluxseg7ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf8_tu( @@ -165,7 +165,7 @@ void test_vluxseg7ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf4_tu( @@ -188,7 +188,7 @@ void test_vluxseg7ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf2_tu( @@ -211,7 +211,7 @@ void test_vluxseg7ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8m1_tu( @@ -234,7 +234,7 @@ void test_vluxseg7ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf4_tu( @@ -257,7 +257,7 @@ void test_vluxseg7ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf2_tu( @@ -280,7 +280,7 @@ void test_vluxseg7ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16m1_tu( @@ -303,7 +303,7 @@ void test_vluxseg7ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32mf2_tu( @@ -326,7 +326,7 @@ void test_vluxseg7ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32m1_tu( @@ -349,7 +349,7 @@ void test_vluxseg7ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i64m1_tu( @@ -372,7 +372,7 @@ void test_vluxseg7ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vluxseg7ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf4_tu( @@ -418,7 +418,7 @@ void test_vluxseg7ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf2_tu( @@ -441,7 +441,7 @@ void test_vluxseg7ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8m1_tu( @@ -464,7 +464,7 @@ void test_vluxseg7ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf4_tu( @@ -487,7 +487,7 @@ void test_vluxseg7ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf2_tu( @@ -510,7 +510,7 @@ void test_vluxseg7ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16m1_tu( @@ -533,7 +533,7 @@ void test_vluxseg7ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32mf2_tu( @@ -556,7 +556,7 @@ void test_vluxseg7ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32m1_tu( @@ -579,7 +579,7 @@ void test_vluxseg7ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vluxseg7ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf4_tum( @@ -625,7 +625,7 @@ void test_vluxseg7ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf2_tum( @@ -648,7 +648,7 @@ void test_vluxseg7ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16m1_tum( @@ -671,7 +671,7 @@ void test_vluxseg7ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32mf2_tum( @@ -694,7 +694,7 @@ void test_vluxseg7ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32m1_tum( @@ -717,7 +717,7 @@ void test_vluxseg7ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f64m1_tum( @@ -740,7 +740,7 @@ void test_vluxseg7ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf8_tum( @@ -763,7 +763,7 @@ void test_vluxseg7ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vluxseg7ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf2_tum( @@ -809,7 +809,7 @@ void test_vluxseg7ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8m1_tum( @@ -832,7 +832,7 @@ void test_vluxseg7ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf4_tum( @@ -855,7 +855,7 @@ void test_vluxseg7ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf2_tum( @@ -878,7 +878,7 @@ void test_vluxseg7ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vluxseg7ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32mf2_tum( @@ -924,7 +924,7 @@ void test_vluxseg7ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32m1_tum( @@ -947,7 +947,7 @@ void test_vluxseg7ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i64m1_tum( @@ -970,7 +970,7 @@ void test_vluxseg7ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf8_tum( @@ -993,7 +993,7 @@ void test_vluxseg7ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf4_tum( @@ -1016,7 +1016,7 @@ void test_vluxseg7ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf2_tum( @@ -1039,7 +1039,7 @@ void test_vluxseg7ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8m1_tum( @@ -1062,7 +1062,7 @@ void test_vluxseg7ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf4_tum( @@ -1085,7 +1085,7 @@ void test_vluxseg7ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf2_tum( @@ -1108,7 +1108,7 @@ void test_vluxseg7ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16m1_tum( @@ -1131,7 +1131,7 @@ void test_vluxseg7ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32mf2_tum( @@ -1154,7 +1154,7 @@ void test_vluxseg7ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32m1_tum( @@ -1177,7 +1177,7 @@ void test_vluxseg7ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u64m1_tum( @@ -1200,7 +1200,7 @@ void test_vluxseg7ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf4_tumu( @@ -1223,7 +1223,7 @@ void test_vluxseg7ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf2_tumu( @@ -1246,7 +1246,7 @@ void test_vluxseg7ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16m1_tumu( @@ -1269,7 +1269,7 @@ void test_vluxseg7ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32mf2_tumu( @@ -1292,7 +1292,7 @@ void test_vluxseg7ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32m1_tumu( @@ -1315,7 +1315,7 @@ void test_vluxseg7ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f64m1_tumu( @@ -1338,7 +1338,7 @@ void test_vluxseg7ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf8_tumu( @@ -1361,7 +1361,7 @@ void test_vluxseg7ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf4_tumu( @@ -1384,7 +1384,7 @@ void test_vluxseg7ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf2_tumu( @@ -1407,7 +1407,7 @@ void test_vluxseg7ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8m1_tumu( @@ -1430,7 +1430,7 @@ void test_vluxseg7ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf4_tumu( @@ -1453,7 +1453,7 @@ void test_vluxseg7ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf2_tumu( @@ -1476,7 +1476,7 @@ void test_vluxseg7ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vluxseg7ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32mf2_tumu( @@ -1522,7 +1522,7 @@ void test_vluxseg7ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32m1_tumu( @@ -1545,7 +1545,7 @@ void test_vluxseg7ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i64m1_tumu( @@ -1568,7 +1568,7 @@ void test_vluxseg7ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf8_tumu( @@ -1591,7 +1591,7 @@ void test_vluxseg7ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf4_tumu( @@ -1614,7 +1614,7 @@ void test_vluxseg7ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf2_tumu( @@ -1637,7 +1637,7 @@ void test_vluxseg7ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8m1_tumu( @@ -1660,7 +1660,7 @@ void test_vluxseg7ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf4_tumu( @@ -1683,7 +1683,7 @@ void test_vluxseg7ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf2_tumu( @@ -1706,7 +1706,7 @@ void test_vluxseg7ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16m1_tumu( @@ -1729,7 +1729,7 @@ void test_vluxseg7ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32mf2_tumu( @@ -1752,7 +1752,7 @@ void test_vluxseg7ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32m1_tumu( @@ -1775,7 +1775,7 @@ void test_vluxseg7ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u64m1_tumu( @@ -1798,7 +1798,7 @@ void test_vluxseg7ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf4_mu( @@ -1821,7 +1821,7 @@ void test_vluxseg7ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16mf2_mu( @@ -1844,7 +1844,7 @@ void test_vluxseg7ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f16m1_mu( @@ -1867,7 +1867,7 @@ void test_vluxseg7ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32mf2_mu( @@ -1890,7 +1890,7 @@ void test_vluxseg7ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f32m1_mu( @@ -1913,7 +1913,7 @@ void test_vluxseg7ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_f64m1_mu( @@ -1936,7 +1936,7 @@ void test_vluxseg7ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vluxseg7ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf4_mu( @@ -1982,7 +1982,7 @@ void test_vluxseg7ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8mf2_mu( @@ -2005,7 +2005,7 @@ void test_vluxseg7ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i8m1_mu( @@ -2028,7 +2028,7 @@ void test_vluxseg7ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf4_mu( @@ -2051,7 +2051,7 @@ void test_vluxseg7ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16mf2_mu( @@ -2074,7 +2074,7 @@ void test_vluxseg7ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i16m1_mu( @@ -2097,7 +2097,7 @@ void test_vluxseg7ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32mf2_mu( @@ -2120,7 +2120,7 @@ void test_vluxseg7ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i32m1_mu( @@ -2143,7 +2143,7 @@ void test_vluxseg7ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_i64m1_mu( @@ -2166,7 +2166,7 @@ void test_vluxseg7ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf8_mu( @@ -2189,7 +2189,7 @@ void test_vluxseg7ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf4_mu( @@ -2212,7 +2212,7 @@ void test_vluxseg7ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8mf2_mu( @@ -2235,7 +2235,7 @@ void test_vluxseg7ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u8m1_mu( @@ -2258,7 +2258,7 @@ void test_vluxseg7ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg7ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf4_mu( @@ -2281,7 +2281,7 @@ void test_vluxseg7ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16mf2_mu( @@ -2304,7 +2304,7 @@ void test_vluxseg7ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u16m1_mu( @@ -2327,7 +2327,7 @@ void test_vluxseg7ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg7ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32mf2_mu( @@ -2350,7 +2350,7 @@ void test_vluxseg7ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u32m1_mu( @@ -2373,7 +2373,7 @@ void test_vluxseg7ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg7ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei64_v_u64m1_mu( @@ -2396,6 +2396,6 @@ void test_vluxseg7ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg7ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c index a774b0b96f6234b6515e2c14366c257ac8d5ec44..3e63ac9164c92020178f57d781cdcb9e7e477caf 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg7ei8.c @@ -27,7 +27,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf2_tu( @@ -50,7 +50,7 @@ void test_vluxseg7ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16m1_tu( @@ -73,7 +73,7 @@ void test_vluxseg7ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32mf2_tu( @@ -96,7 +96,7 @@ void test_vluxseg7ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32m1_tu( @@ -119,7 +119,7 @@ void test_vluxseg7ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f64m1_tu( @@ -142,7 +142,7 @@ void test_vluxseg7ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf8_tu( @@ -165,7 +165,7 @@ void test_vluxseg7ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf4_tu( @@ -188,7 +188,7 @@ void test_vluxseg7ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf2_tu( @@ -211,7 +211,7 @@ void test_vluxseg7ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8m1_tu( @@ -234,7 +234,7 @@ void test_vluxseg7ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf4_tu( @@ -257,7 +257,7 @@ void test_vluxseg7ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf2_tu( @@ -280,7 +280,7 @@ void test_vluxseg7ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16m1_tu( @@ -303,7 +303,7 @@ void test_vluxseg7ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32mf2_tu( @@ -326,7 +326,7 @@ void test_vluxseg7ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32m1_tu( @@ -349,7 +349,7 @@ void test_vluxseg7ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i64m1_tu( @@ -372,7 +372,7 @@ void test_vluxseg7ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf8_tu( @@ -395,7 +395,7 @@ void test_vluxseg7ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf4_tu( @@ -418,7 +418,7 @@ void test_vluxseg7ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf2_tu( @@ -441,7 +441,7 @@ void test_vluxseg7ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8m1_tu( @@ -464,7 +464,7 @@ void test_vluxseg7ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf4_tu( @@ -487,7 +487,7 @@ void test_vluxseg7ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf2_tu( @@ -510,7 +510,7 @@ void test_vluxseg7ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16m1_tu( @@ -533,7 +533,7 @@ void test_vluxseg7ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32mf2_tu( @@ -556,7 +556,7 @@ void test_vluxseg7ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32m1_tu( @@ -579,7 +579,7 @@ void test_vluxseg7ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u64m1_tu( @@ -602,7 +602,7 @@ void test_vluxseg7ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf4_tum( @@ -625,7 +625,7 @@ void test_vluxseg7ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf2_tum( @@ -648,7 +648,7 @@ void test_vluxseg7ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16m1_tum( @@ -671,7 +671,7 @@ void test_vluxseg7ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32mf2_tum( @@ -694,7 +694,7 @@ void test_vluxseg7ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32m1_tum( @@ -717,7 +717,7 @@ void test_vluxseg7ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f64m1_tum( @@ -740,7 +740,7 @@ void test_vluxseg7ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf8_tum( @@ -763,7 +763,7 @@ void test_vluxseg7ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf4_tum( @@ -786,7 +786,7 @@ void test_vluxseg7ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf2_tum( @@ -809,7 +809,7 @@ void test_vluxseg7ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8m1_tum( @@ -832,7 +832,7 @@ void test_vluxseg7ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf4_tum( @@ -855,7 +855,7 @@ void test_vluxseg7ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf2_tum( @@ -878,7 +878,7 @@ void test_vluxseg7ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16m1_tum( @@ -901,7 +901,7 @@ void test_vluxseg7ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32mf2_tum( @@ -924,7 +924,7 @@ void test_vluxseg7ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32m1_tum( @@ -947,7 +947,7 @@ void test_vluxseg7ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i64m1_tum( @@ -970,7 +970,7 @@ void test_vluxseg7ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf8_tum( @@ -993,7 +993,7 @@ void test_vluxseg7ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf4_tum( @@ -1016,7 +1016,7 @@ void test_vluxseg7ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf2_tum( @@ -1039,7 +1039,7 @@ void test_vluxseg7ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8m1_tum( @@ -1062,7 +1062,7 @@ void test_vluxseg7ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf4_tum( @@ -1085,7 +1085,7 @@ void test_vluxseg7ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf2_tum( @@ -1108,7 +1108,7 @@ void test_vluxseg7ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16m1_tum( @@ -1131,7 +1131,7 @@ void test_vluxseg7ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32mf2_tum( @@ -1154,7 +1154,7 @@ void test_vluxseg7ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32m1_tum( @@ -1177,7 +1177,7 @@ void test_vluxseg7ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u64m1_tum( @@ -1200,7 +1200,7 @@ void test_vluxseg7ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf4_tumu( @@ -1223,7 +1223,7 @@ void test_vluxseg7ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf2_tumu( @@ -1246,7 +1246,7 @@ void test_vluxseg7ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16m1_tumu( @@ -1269,7 +1269,7 @@ void test_vluxseg7ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32mf2_tumu( @@ -1292,7 +1292,7 @@ void test_vluxseg7ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32m1_tumu( @@ -1315,7 +1315,7 @@ void test_vluxseg7ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f64m1_tumu( @@ -1338,7 +1338,7 @@ void test_vluxseg7ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf8_tumu( @@ -1361,7 +1361,7 @@ void test_vluxseg7ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf4_tumu( @@ -1384,7 +1384,7 @@ void test_vluxseg7ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf2_tumu( @@ -1407,7 +1407,7 @@ void test_vluxseg7ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8m1_tumu( @@ -1430,7 +1430,7 @@ void test_vluxseg7ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf4_tumu( @@ -1453,7 +1453,7 @@ void test_vluxseg7ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf2_tumu( @@ -1476,7 +1476,7 @@ void test_vluxseg7ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16m1_tumu( @@ -1499,7 +1499,7 @@ void test_vluxseg7ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32mf2_tumu( @@ -1522,7 +1522,7 @@ void test_vluxseg7ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32m1_tumu( @@ -1545,7 +1545,7 @@ void test_vluxseg7ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i64m1_tumu( @@ -1568,7 +1568,7 @@ void test_vluxseg7ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf8_tumu( @@ -1591,7 +1591,7 @@ void test_vluxseg7ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf4_tumu( @@ -1614,7 +1614,7 @@ void test_vluxseg7ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf2_tumu( @@ -1637,7 +1637,7 @@ void test_vluxseg7ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8m1_tumu( @@ -1660,7 +1660,7 @@ void test_vluxseg7ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf4_tumu( @@ -1683,7 +1683,7 @@ void test_vluxseg7ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf2_tumu( @@ -1706,7 +1706,7 @@ void test_vluxseg7ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16m1_tumu( @@ -1729,7 +1729,7 @@ void test_vluxseg7ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32mf2_tumu( @@ -1752,7 +1752,7 @@ void test_vluxseg7ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32m1_tumu( @@ -1775,7 +1775,7 @@ void test_vluxseg7ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u64m1_tumu( @@ -1798,7 +1798,7 @@ void test_vluxseg7ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf4_mu( @@ -1821,7 +1821,7 @@ void test_vluxseg7ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16mf2_mu( @@ -1844,7 +1844,7 @@ void test_vluxseg7ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f16m1_mu( @@ -1867,7 +1867,7 @@ void test_vluxseg7ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32mf2_mu( @@ -1890,7 +1890,7 @@ void test_vluxseg7ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f32m1_mu( @@ -1913,7 +1913,7 @@ void test_vluxseg7ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_f64m1_mu( @@ -1936,7 +1936,7 @@ void test_vluxseg7ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf8_mu( @@ -1959,7 +1959,7 @@ void test_vluxseg7ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf4_mu( @@ -1982,7 +1982,7 @@ void test_vluxseg7ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8mf2_mu( @@ -2005,7 +2005,7 @@ void test_vluxseg7ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i8m1_mu( @@ -2028,7 +2028,7 @@ void test_vluxseg7ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf4_mu( @@ -2051,7 +2051,7 @@ void test_vluxseg7ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16mf2_mu( @@ -2074,7 +2074,7 @@ void test_vluxseg7ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i16m1_mu( @@ -2097,7 +2097,7 @@ void test_vluxseg7ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32mf2_mu( @@ -2120,7 +2120,7 @@ void test_vluxseg7ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i32m1_mu( @@ -2143,7 +2143,7 @@ void test_vluxseg7ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_i64m1_mu( @@ -2166,7 +2166,7 @@ void test_vluxseg7ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf8_mu( @@ -2189,7 +2189,7 @@ void test_vluxseg7ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf4_mu( @@ -2212,7 +2212,7 @@ void test_vluxseg7ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8mf2_mu( @@ -2235,7 +2235,7 @@ void test_vluxseg7ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u8m1_mu( @@ -2258,7 +2258,7 @@ void test_vluxseg7ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg7ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf4_mu( @@ -2281,7 +2281,7 @@ void test_vluxseg7ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16mf2_mu( @@ -2304,7 +2304,7 @@ void test_vluxseg7ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u16m1_mu( @@ -2327,7 +2327,7 @@ void test_vluxseg7ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg7ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32mf2_mu( @@ -2350,7 +2350,7 @@ void test_vluxseg7ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u32m1_mu( @@ -2373,7 +2373,7 @@ void test_vluxseg7ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg7ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg7ei8_v_u64m1_mu( @@ -2396,6 +2396,6 @@ void test_vluxseg7ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg7ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg7ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); + return __riscv_vluxseg7ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c index 02a521f53a0d36af85c21073780228581ac68b60..37a82d10568f5ba9300e420218a319f5217b41eb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei16.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vluxseg8ei16_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vluxseg8ei16_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32mf2_tu( @@ -104,7 +104,7 @@ void test_vluxseg8ei16_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32m1_tu( @@ -129,7 +129,7 @@ void test_vluxseg8ei16_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f64m1_tu( @@ -154,7 +154,7 @@ void test_vluxseg8ei16_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf8_tu( @@ -179,7 +179,7 @@ void test_vluxseg8ei16_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf4_tu( @@ -204,7 +204,7 @@ void test_vluxseg8ei16_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf2_tu( @@ -229,7 +229,7 @@ void test_vluxseg8ei16_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8m1_tu( @@ -254,7 +254,7 @@ void test_vluxseg8ei16_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf4_tu( @@ -279,7 +279,7 @@ void test_vluxseg8ei16_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf2_tu( @@ -304,7 +304,7 @@ void test_vluxseg8ei16_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16m1_tu( @@ -329,7 +329,7 @@ void test_vluxseg8ei16_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32mf2_tu( @@ -354,7 +354,7 @@ void test_vluxseg8ei16_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32m1_tu( @@ -379,7 +379,7 @@ void test_vluxseg8ei16_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i64m1_tu( @@ -404,7 +404,7 @@ void test_vluxseg8ei16_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf8_tu( @@ -429,7 +429,7 @@ void test_vluxseg8ei16_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf4_tu( @@ -454,7 +454,7 @@ void test_vluxseg8ei16_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf2_tu( @@ -479,7 +479,7 @@ void test_vluxseg8ei16_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8m1_tu( @@ -504,7 +504,7 @@ void test_vluxseg8ei16_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf4_tu( @@ -529,7 +529,7 @@ void test_vluxseg8ei16_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf2_tu( @@ -554,7 +554,7 @@ void test_vluxseg8ei16_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16m1_tu( @@ -579,7 +579,7 @@ void test_vluxseg8ei16_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32mf2_tu( @@ -604,7 +604,7 @@ void test_vluxseg8ei16_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32m1_tu( @@ -629,7 +629,7 @@ void test_vluxseg8ei16_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u64m1_tu( @@ -654,7 +654,7 @@ void test_vluxseg8ei16_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf4_tum( @@ -679,7 +679,7 @@ void test_vluxseg8ei16_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf2_tum( @@ -704,7 +704,7 @@ void test_vluxseg8ei16_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16m1_tum( @@ -729,7 +729,7 @@ void test_vluxseg8ei16_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32mf2_tum( @@ -754,7 +754,7 @@ void test_vluxseg8ei16_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32m1_tum( @@ -779,7 +779,7 @@ void test_vluxseg8ei16_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f64m1_tum( @@ -804,7 +804,7 @@ void test_vluxseg8ei16_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf8_tum( @@ -829,7 +829,7 @@ void test_vluxseg8ei16_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf4_tum( @@ -854,7 +854,7 @@ void test_vluxseg8ei16_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf2_tum( @@ -879,7 +879,7 @@ void test_vluxseg8ei16_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8m1_tum( @@ -904,7 +904,7 @@ void test_vluxseg8ei16_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf4_tum( @@ -929,7 +929,7 @@ void test_vluxseg8ei16_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf2_tum( @@ -954,7 +954,7 @@ void test_vluxseg8ei16_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16m1_tum( @@ -979,7 +979,7 @@ void test_vluxseg8ei16_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32mf2_tum( @@ -1004,7 +1004,7 @@ void test_vluxseg8ei16_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32m1_tum( @@ -1029,7 +1029,7 @@ void test_vluxseg8ei16_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i64m1_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg8ei16_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf8_tum( @@ -1079,7 +1079,7 @@ void test_vluxseg8ei16_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf4_tum( @@ -1104,7 +1104,7 @@ void test_vluxseg8ei16_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf2_tum( @@ -1129,7 +1129,7 @@ void test_vluxseg8ei16_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8m1_tum( @@ -1154,7 +1154,7 @@ void test_vluxseg8ei16_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf4_tum( @@ -1179,7 +1179,7 @@ void test_vluxseg8ei16_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf2_tum( @@ -1204,7 +1204,7 @@ void test_vluxseg8ei16_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16m1_tum( @@ -1229,7 +1229,7 @@ void test_vluxseg8ei16_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32mf2_tum( @@ -1254,7 +1254,7 @@ void test_vluxseg8ei16_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32m1_tum( @@ -1279,7 +1279,7 @@ void test_vluxseg8ei16_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u64m1_tum( @@ -1304,7 +1304,7 @@ void test_vluxseg8ei16_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf4_tumu( @@ -1329,7 +1329,7 @@ void test_vluxseg8ei16_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vluxseg8ei16_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16m1_tumu( @@ -1379,7 +1379,7 @@ void test_vluxseg8ei16_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32mf2_tumu( @@ -1404,7 +1404,7 @@ void test_vluxseg8ei16_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32m1_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg8ei16_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f64m1_tumu( @@ -1454,7 +1454,7 @@ void test_vluxseg8ei16_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf8_tumu( @@ -1479,7 +1479,7 @@ void test_vluxseg8ei16_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf4_tumu( @@ -1504,7 +1504,7 @@ void test_vluxseg8ei16_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf2_tumu( @@ -1529,7 +1529,7 @@ void test_vluxseg8ei16_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8m1_tumu( @@ -1554,7 +1554,7 @@ void test_vluxseg8ei16_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf4_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg8ei16_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf2_tumu( @@ -1604,7 +1604,7 @@ void test_vluxseg8ei16_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16m1_tumu( @@ -1629,7 +1629,7 @@ void test_vluxseg8ei16_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32mf2_tumu( @@ -1654,7 +1654,7 @@ void test_vluxseg8ei16_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32m1_tumu( @@ -1679,7 +1679,7 @@ void test_vluxseg8ei16_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i64m1_tumu( @@ -1704,7 +1704,7 @@ void test_vluxseg8ei16_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf8_tumu( @@ -1729,7 +1729,7 @@ void test_vluxseg8ei16_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf4_tumu( @@ -1754,7 +1754,7 @@ void test_vluxseg8ei16_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf2_tumu( @@ -1779,7 +1779,7 @@ void test_vluxseg8ei16_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8m1_tumu( @@ -1804,7 +1804,7 @@ void test_vluxseg8ei16_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf4_tumu( @@ -1829,7 +1829,7 @@ void test_vluxseg8ei16_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf2_tumu( @@ -1854,7 +1854,7 @@ void test_vluxseg8ei16_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16m1_tumu( @@ -1879,7 +1879,7 @@ void test_vluxseg8ei16_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32mf2_tumu( @@ -1904,7 +1904,7 @@ void test_vluxseg8ei16_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32m1_tumu( @@ -1929,7 +1929,7 @@ void test_vluxseg8ei16_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u64m1_tumu( @@ -1954,7 +1954,7 @@ void test_vluxseg8ei16_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf4_mu( @@ -1979,7 +1979,7 @@ void test_vluxseg8ei16_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16mf2_mu( @@ -2004,7 +2004,7 @@ void test_vluxseg8ei16_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f16m1_mu( @@ -2029,7 +2029,7 @@ void test_vluxseg8ei16_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32mf2_mu( @@ -2054,7 +2054,7 @@ void test_vluxseg8ei16_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f32m1_mu( @@ -2079,7 +2079,7 @@ void test_vluxseg8ei16_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_f64m1_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg8ei16_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf8_mu( @@ -2129,7 +2129,7 @@ void test_vluxseg8ei16_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf4_mu( @@ -2154,7 +2154,7 @@ void test_vluxseg8ei16_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8mf2_mu( @@ -2179,7 +2179,7 @@ void test_vluxseg8ei16_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i8m1_mu( @@ -2204,7 +2204,7 @@ void test_vluxseg8ei16_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf4_mu( @@ -2229,7 +2229,7 @@ void test_vluxseg8ei16_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16mf2_mu( @@ -2254,7 +2254,7 @@ void test_vluxseg8ei16_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i16m1_mu( @@ -2279,7 +2279,7 @@ void test_vluxseg8ei16_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32mf2_mu( @@ -2304,7 +2304,7 @@ void test_vluxseg8ei16_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i32m1_mu( @@ -2329,7 +2329,7 @@ void test_vluxseg8ei16_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_i64m1_mu( @@ -2354,7 +2354,7 @@ void test_vluxseg8ei16_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf8_mu( @@ -2379,7 +2379,7 @@ void test_vluxseg8ei16_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf4_mu( @@ -2404,7 +2404,7 @@ void test_vluxseg8ei16_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8mf2_mu( @@ -2429,7 +2429,7 @@ void test_vluxseg8ei16_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u8m1_mu( @@ -2454,7 +2454,7 @@ void test_vluxseg8ei16_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint16m2_t bindex, size_t vl) { - return vluxseg8ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf4_mu( @@ -2479,7 +2479,7 @@ void test_vluxseg8ei16_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16mf2_mu( @@ -2504,7 +2504,7 @@ void test_vluxseg8ei16_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u16m1_mu( @@ -2529,7 +2529,7 @@ void test_vluxseg8ei16_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint16m1_t bindex, size_t vl) { - return vluxseg8ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32mf2_mu( @@ -2554,7 +2554,7 @@ void test_vluxseg8ei16_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u32m1_mu( @@ -2579,7 +2579,7 @@ void test_vluxseg8ei16_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint16mf2_t bindex, size_t vl) { - return vluxseg8ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei16_v_u64m1_mu( @@ -2604,6 +2604,6 @@ void test_vluxseg8ei16_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei16_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint16mf4_t bindex, size_t vl) { - return vluxseg8ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei16_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c index c962a0ce4b8d4f97a45f2d4fa54d350bcf5f9a9a..e436410b981ee69bd0e996aa34a1343bd2ba30d0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei32.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vluxseg8ei32_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vluxseg8ei32_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32mf2_tu( @@ -104,7 +104,7 @@ void test_vluxseg8ei32_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32m1_tu( @@ -129,7 +129,7 @@ void test_vluxseg8ei32_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f64m1_tu( @@ -154,7 +154,7 @@ void test_vluxseg8ei32_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf8_tu( @@ -179,7 +179,7 @@ void test_vluxseg8ei32_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf4_tu( @@ -204,7 +204,7 @@ void test_vluxseg8ei32_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf2_tu( @@ -229,7 +229,7 @@ void test_vluxseg8ei32_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8m1_tu( @@ -254,7 +254,7 @@ void test_vluxseg8ei32_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf4_tu( @@ -279,7 +279,7 @@ void test_vluxseg8ei32_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf2_tu( @@ -304,7 +304,7 @@ void test_vluxseg8ei32_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16m1_tu( @@ -329,7 +329,7 @@ void test_vluxseg8ei32_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32mf2_tu( @@ -354,7 +354,7 @@ void test_vluxseg8ei32_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32m1_tu( @@ -379,7 +379,7 @@ void test_vluxseg8ei32_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i64m1_tu( @@ -404,7 +404,7 @@ void test_vluxseg8ei32_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf8_tu( @@ -429,7 +429,7 @@ void test_vluxseg8ei32_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf4_tu( @@ -454,7 +454,7 @@ void test_vluxseg8ei32_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf2_tu( @@ -479,7 +479,7 @@ void test_vluxseg8ei32_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8m1_tu( @@ -504,7 +504,7 @@ void test_vluxseg8ei32_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf4_tu( @@ -529,7 +529,7 @@ void test_vluxseg8ei32_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf2_tu( @@ -554,7 +554,7 @@ void test_vluxseg8ei32_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16m1_tu( @@ -579,7 +579,7 @@ void test_vluxseg8ei32_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32mf2_tu( @@ -604,7 +604,7 @@ void test_vluxseg8ei32_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32m1_tu( @@ -629,7 +629,7 @@ void test_vluxseg8ei32_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u64m1_tu( @@ -654,7 +654,7 @@ void test_vluxseg8ei32_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf4_tum( @@ -679,7 +679,7 @@ void test_vluxseg8ei32_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf2_tum( @@ -704,7 +704,7 @@ void test_vluxseg8ei32_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16m1_tum( @@ -729,7 +729,7 @@ void test_vluxseg8ei32_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32mf2_tum( @@ -754,7 +754,7 @@ void test_vluxseg8ei32_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32m1_tum( @@ -779,7 +779,7 @@ void test_vluxseg8ei32_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f64m1_tum( @@ -804,7 +804,7 @@ void test_vluxseg8ei32_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf8_tum( @@ -829,7 +829,7 @@ void test_vluxseg8ei32_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf4_tum( @@ -854,7 +854,7 @@ void test_vluxseg8ei32_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf2_tum( @@ -879,7 +879,7 @@ void test_vluxseg8ei32_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8m1_tum( @@ -904,7 +904,7 @@ void test_vluxseg8ei32_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf4_tum( @@ -929,7 +929,7 @@ void test_vluxseg8ei32_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf2_tum( @@ -954,7 +954,7 @@ void test_vluxseg8ei32_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16m1_tum( @@ -979,7 +979,7 @@ void test_vluxseg8ei32_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32mf2_tum( @@ -1004,7 +1004,7 @@ void test_vluxseg8ei32_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32m1_tum( @@ -1029,7 +1029,7 @@ void test_vluxseg8ei32_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i64m1_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg8ei32_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf8_tum( @@ -1079,7 +1079,7 @@ void test_vluxseg8ei32_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf4_tum( @@ -1104,7 +1104,7 @@ void test_vluxseg8ei32_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf2_tum( @@ -1129,7 +1129,7 @@ void test_vluxseg8ei32_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8m1_tum( @@ -1154,7 +1154,7 @@ void test_vluxseg8ei32_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf4_tum( @@ -1179,7 +1179,7 @@ void test_vluxseg8ei32_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf2_tum( @@ -1204,7 +1204,7 @@ void test_vluxseg8ei32_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16m1_tum( @@ -1229,7 +1229,7 @@ void test_vluxseg8ei32_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32mf2_tum( @@ -1254,7 +1254,7 @@ void test_vluxseg8ei32_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32m1_tum( @@ -1279,7 +1279,7 @@ void test_vluxseg8ei32_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u64m1_tum( @@ -1304,7 +1304,7 @@ void test_vluxseg8ei32_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf4_tumu( @@ -1329,7 +1329,7 @@ void test_vluxseg8ei32_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vluxseg8ei32_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16m1_tumu( @@ -1379,7 +1379,7 @@ void test_vluxseg8ei32_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32mf2_tumu( @@ -1404,7 +1404,7 @@ void test_vluxseg8ei32_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32m1_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg8ei32_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f64m1_tumu( @@ -1454,7 +1454,7 @@ void test_vluxseg8ei32_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf8_tumu( @@ -1479,7 +1479,7 @@ void test_vluxseg8ei32_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf4_tumu( @@ -1504,7 +1504,7 @@ void test_vluxseg8ei32_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf2_tumu( @@ -1529,7 +1529,7 @@ void test_vluxseg8ei32_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8m1_tumu( @@ -1554,7 +1554,7 @@ void test_vluxseg8ei32_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf4_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg8ei32_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf2_tumu( @@ -1604,7 +1604,7 @@ void test_vluxseg8ei32_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16m1_tumu( @@ -1629,7 +1629,7 @@ void test_vluxseg8ei32_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32mf2_tumu( @@ -1654,7 +1654,7 @@ void test_vluxseg8ei32_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32m1_tumu( @@ -1679,7 +1679,7 @@ void test_vluxseg8ei32_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i64m1_tumu( @@ -1704,7 +1704,7 @@ void test_vluxseg8ei32_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf8_tumu( @@ -1729,7 +1729,7 @@ void test_vluxseg8ei32_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf4_tumu( @@ -1754,7 +1754,7 @@ void test_vluxseg8ei32_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf2_tumu( @@ -1779,7 +1779,7 @@ void test_vluxseg8ei32_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8m1_tumu( @@ -1804,7 +1804,7 @@ void test_vluxseg8ei32_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf4_tumu( @@ -1829,7 +1829,7 @@ void test_vluxseg8ei32_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf2_tumu( @@ -1854,7 +1854,7 @@ void test_vluxseg8ei32_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16m1_tumu( @@ -1879,7 +1879,7 @@ void test_vluxseg8ei32_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32mf2_tumu( @@ -1904,7 +1904,7 @@ void test_vluxseg8ei32_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32m1_tumu( @@ -1929,7 +1929,7 @@ void test_vluxseg8ei32_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u64m1_tumu( @@ -1954,7 +1954,7 @@ void test_vluxseg8ei32_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf4_mu( @@ -1979,7 +1979,7 @@ void test_vluxseg8ei32_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16mf2_mu( @@ -2004,7 +2004,7 @@ void test_vluxseg8ei32_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f16m1_mu( @@ -2029,7 +2029,7 @@ void test_vluxseg8ei32_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32mf2_mu( @@ -2054,7 +2054,7 @@ void test_vluxseg8ei32_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f32m1_mu( @@ -2079,7 +2079,7 @@ void test_vluxseg8ei32_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_f64m1_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg8ei32_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf8_mu( @@ -2129,7 +2129,7 @@ void test_vluxseg8ei32_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf4_mu( @@ -2154,7 +2154,7 @@ void test_vluxseg8ei32_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8mf2_mu( @@ -2179,7 +2179,7 @@ void test_vluxseg8ei32_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i8m1_mu( @@ -2204,7 +2204,7 @@ void test_vluxseg8ei32_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf4_mu( @@ -2229,7 +2229,7 @@ void test_vluxseg8ei32_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16mf2_mu( @@ -2254,7 +2254,7 @@ void test_vluxseg8ei32_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i16m1_mu( @@ -2279,7 +2279,7 @@ void test_vluxseg8ei32_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32mf2_mu( @@ -2304,7 +2304,7 @@ void test_vluxseg8ei32_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i32m1_mu( @@ -2329,7 +2329,7 @@ void test_vluxseg8ei32_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_i64m1_mu( @@ -2354,7 +2354,7 @@ void test_vluxseg8ei32_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf8_mu( @@ -2379,7 +2379,7 @@ void test_vluxseg8ei32_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf4_mu( @@ -2404,7 +2404,7 @@ void test_vluxseg8ei32_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8mf2_mu( @@ -2429,7 +2429,7 @@ void test_vluxseg8ei32_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u8m1_mu( @@ -2454,7 +2454,7 @@ void test_vluxseg8ei32_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint32m4_t bindex, size_t vl) { - return vluxseg8ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf4_mu( @@ -2479,7 +2479,7 @@ void test_vluxseg8ei32_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16mf2_mu( @@ -2504,7 +2504,7 @@ void test_vluxseg8ei32_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u16m1_mu( @@ -2529,7 +2529,7 @@ void test_vluxseg8ei32_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint32m2_t bindex, size_t vl) { - return vluxseg8ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32mf2_mu( @@ -2554,7 +2554,7 @@ void test_vluxseg8ei32_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u32m1_mu( @@ -2579,7 +2579,7 @@ void test_vluxseg8ei32_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint32m1_t bindex, size_t vl) { - return vluxseg8ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei32_v_u64m1_mu( @@ -2604,6 +2604,6 @@ void test_vluxseg8ei32_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei32_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint32mf2_t bindex, size_t vl) { - return vluxseg8ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei32_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c index 2c61208aabea126fc805fcaefaac2a7f63b38a2a..ac9850016426f6812fab533d0394d4a7d92d7874 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei64.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vluxseg8ei64_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vluxseg8ei64_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32mf2_tu( @@ -104,7 +104,7 @@ void test_vluxseg8ei64_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32m1_tu( @@ -129,7 +129,7 @@ void test_vluxseg8ei64_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f64m1_tu( @@ -154,7 +154,7 @@ void test_vluxseg8ei64_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf8_tu( @@ -179,7 +179,7 @@ void test_vluxseg8ei64_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf4_tu( @@ -204,7 +204,7 @@ void test_vluxseg8ei64_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf2_tu( @@ -229,7 +229,7 @@ void test_vluxseg8ei64_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8m1_tu( @@ -254,7 +254,7 @@ void test_vluxseg8ei64_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf4_tu( @@ -279,7 +279,7 @@ void test_vluxseg8ei64_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf2_tu( @@ -304,7 +304,7 @@ void test_vluxseg8ei64_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16m1_tu( @@ -329,7 +329,7 @@ void test_vluxseg8ei64_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32mf2_tu( @@ -354,7 +354,7 @@ void test_vluxseg8ei64_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32m1_tu( @@ -379,7 +379,7 @@ void test_vluxseg8ei64_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i64m1_tu( @@ -404,7 +404,7 @@ void test_vluxseg8ei64_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf8_tu( @@ -429,7 +429,7 @@ void test_vluxseg8ei64_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf4_tu( @@ -454,7 +454,7 @@ void test_vluxseg8ei64_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf2_tu( @@ -479,7 +479,7 @@ void test_vluxseg8ei64_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8m1_tu( @@ -504,7 +504,7 @@ void test_vluxseg8ei64_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf4_tu( @@ -529,7 +529,7 @@ void test_vluxseg8ei64_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf2_tu( @@ -554,7 +554,7 @@ void test_vluxseg8ei64_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16m1_tu( @@ -579,7 +579,7 @@ void test_vluxseg8ei64_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32mf2_tu( @@ -604,7 +604,7 @@ void test_vluxseg8ei64_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32m1_tu( @@ -629,7 +629,7 @@ void test_vluxseg8ei64_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u64m1_tu( @@ -654,7 +654,7 @@ void test_vluxseg8ei64_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf4_tum( @@ -679,7 +679,7 @@ void test_vluxseg8ei64_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf2_tum( @@ -704,7 +704,7 @@ void test_vluxseg8ei64_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16m1_tum( @@ -729,7 +729,7 @@ void test_vluxseg8ei64_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32mf2_tum( @@ -754,7 +754,7 @@ void test_vluxseg8ei64_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32m1_tum( @@ -779,7 +779,7 @@ void test_vluxseg8ei64_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f64m1_tum( @@ -804,7 +804,7 @@ void test_vluxseg8ei64_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf8_tum( @@ -829,7 +829,7 @@ void test_vluxseg8ei64_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf4_tum( @@ -854,7 +854,7 @@ void test_vluxseg8ei64_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf2_tum( @@ -879,7 +879,7 @@ void test_vluxseg8ei64_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8m1_tum( @@ -904,7 +904,7 @@ void test_vluxseg8ei64_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf4_tum( @@ -929,7 +929,7 @@ void test_vluxseg8ei64_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf2_tum( @@ -954,7 +954,7 @@ void test_vluxseg8ei64_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16m1_tum( @@ -979,7 +979,7 @@ void test_vluxseg8ei64_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32mf2_tum( @@ -1004,7 +1004,7 @@ void test_vluxseg8ei64_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32m1_tum( @@ -1029,7 +1029,7 @@ void test_vluxseg8ei64_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i64m1_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg8ei64_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf8_tum( @@ -1079,7 +1079,7 @@ void test_vluxseg8ei64_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf4_tum( @@ -1104,7 +1104,7 @@ void test_vluxseg8ei64_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf2_tum( @@ -1129,7 +1129,7 @@ void test_vluxseg8ei64_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8m1_tum( @@ -1154,7 +1154,7 @@ void test_vluxseg8ei64_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf4_tum( @@ -1179,7 +1179,7 @@ void test_vluxseg8ei64_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf2_tum( @@ -1204,7 +1204,7 @@ void test_vluxseg8ei64_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16m1_tum( @@ -1229,7 +1229,7 @@ void test_vluxseg8ei64_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32mf2_tum( @@ -1254,7 +1254,7 @@ void test_vluxseg8ei64_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32m1_tum( @@ -1279,7 +1279,7 @@ void test_vluxseg8ei64_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u64m1_tum( @@ -1304,7 +1304,7 @@ void test_vluxseg8ei64_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf4_tumu( @@ -1329,7 +1329,7 @@ void test_vluxseg8ei64_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vluxseg8ei64_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16m1_tumu( @@ -1379,7 +1379,7 @@ void test_vluxseg8ei64_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32mf2_tumu( @@ -1404,7 +1404,7 @@ void test_vluxseg8ei64_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32m1_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg8ei64_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloa // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f64m1_tumu( @@ -1454,7 +1454,7 @@ void test_vluxseg8ei64_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf8_tumu( @@ -1479,7 +1479,7 @@ void test_vluxseg8ei64_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf4_tumu( @@ -1504,7 +1504,7 @@ void test_vluxseg8ei64_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf2_tumu( @@ -1529,7 +1529,7 @@ void test_vluxseg8ei64_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8m1_tumu( @@ -1554,7 +1554,7 @@ void test_vluxseg8ei64_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf4_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg8ei64_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf2_tumu( @@ -1604,7 +1604,7 @@ void test_vluxseg8ei64_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16m1_tumu( @@ -1629,7 +1629,7 @@ void test_vluxseg8ei64_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32mf2_tumu( @@ -1654,7 +1654,7 @@ void test_vluxseg8ei64_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32m1_tumu( @@ -1679,7 +1679,7 @@ void test_vluxseg8ei64_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i64m1_tumu( @@ -1704,7 +1704,7 @@ void test_vluxseg8ei64_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf8_tumu( @@ -1729,7 +1729,7 @@ void test_vluxseg8ei64_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf4_tumu( @@ -1754,7 +1754,7 @@ void test_vluxseg8ei64_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf2_tumu( @@ -1779,7 +1779,7 @@ void test_vluxseg8ei64_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8m1_tumu( @@ -1804,7 +1804,7 @@ void test_vluxseg8ei64_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf4_tumu( @@ -1829,7 +1829,7 @@ void test_vluxseg8ei64_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf2_tumu( @@ -1854,7 +1854,7 @@ void test_vluxseg8ei64_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16m1_tumu( @@ -1879,7 +1879,7 @@ void test_vluxseg8ei64_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32mf2_tumu( @@ -1904,7 +1904,7 @@ void test_vluxseg8ei64_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32m1_tumu( @@ -1929,7 +1929,7 @@ void test_vluxseg8ei64_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u64m1_tumu( @@ -1954,7 +1954,7 @@ void test_vluxseg8ei64_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf4_mu( @@ -1979,7 +1979,7 @@ void test_vluxseg8ei64_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16mf2_mu( @@ -2004,7 +2004,7 @@ void test_vluxseg8ei64_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f16m1_mu( @@ -2029,7 +2029,7 @@ void test_vluxseg8ei64_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32mf2_mu( @@ -2054,7 +2054,7 @@ void test_vluxseg8ei64_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f32m1_mu( @@ -2079,7 +2079,7 @@ void test_vluxseg8ei64_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_f64m1_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg8ei64_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf8_mu( @@ -2129,7 +2129,7 @@ void test_vluxseg8ei64_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf4_mu( @@ -2154,7 +2154,7 @@ void test_vluxseg8ei64_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8mf2_mu( @@ -2179,7 +2179,7 @@ void test_vluxseg8ei64_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i8m1_mu( @@ -2204,7 +2204,7 @@ void test_vluxseg8ei64_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf4_mu( @@ -2229,7 +2229,7 @@ void test_vluxseg8ei64_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16mf2_mu( @@ -2254,7 +2254,7 @@ void test_vluxseg8ei64_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i16m1_mu( @@ -2279,7 +2279,7 @@ void test_vluxseg8ei64_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32mf2_mu( @@ -2304,7 +2304,7 @@ void test_vluxseg8ei64_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i32m1_mu( @@ -2329,7 +2329,7 @@ void test_vluxseg8ei64_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_i64m1_mu( @@ -2354,7 +2354,7 @@ void test_vluxseg8ei64_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf8_mu( @@ -2379,7 +2379,7 @@ void test_vluxseg8ei64_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf4_mu( @@ -2404,7 +2404,7 @@ void test_vluxseg8ei64_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8mf2_mu( @@ -2429,7 +2429,7 @@ void test_vluxseg8ei64_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u8m1_mu( @@ -2454,7 +2454,7 @@ void test_vluxseg8ei64_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint64m8_t bindex, size_t vl) { - return vluxseg8ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf4_mu( @@ -2479,7 +2479,7 @@ void test_vluxseg8ei64_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16mf2_mu( @@ -2504,7 +2504,7 @@ void test_vluxseg8ei64_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u16m1_mu( @@ -2529,7 +2529,7 @@ void test_vluxseg8ei64_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint64m4_t bindex, size_t vl) { - return vluxseg8ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32mf2_mu( @@ -2554,7 +2554,7 @@ void test_vluxseg8ei64_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u32m1_mu( @@ -2579,7 +2579,7 @@ void test_vluxseg8ei64_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint64m2_t bindex, size_t vl) { - return vluxseg8ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei64_v_u64m1_mu( @@ -2604,6 +2604,6 @@ void test_vluxseg8ei64_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei64_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint64m1_t bindex, size_t vl) { - return vluxseg8ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei64_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c index 39532fc8cadd1da47771f3dfb12973fc90ab73fe..ee8abbf1c99cf28b87013344307236e5f265ad67 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vluxseg8ei8.c @@ -29,7 +29,7 @@ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf2_tu( @@ -54,7 +54,7 @@ void test_vluxseg8ei8_v_f16mf4_tu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16m1_tu( @@ -79,7 +79,7 @@ void test_vluxseg8ei8_v_f16mf2_tu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32mf2_tu( @@ -104,7 +104,7 @@ void test_vluxseg8ei8_v_f16m1_tu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32m1_tu( @@ -129,7 +129,7 @@ void test_vluxseg8ei8_v_f32mf2_tu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f64m1_tu( @@ -154,7 +154,7 @@ void test_vluxseg8ei8_v_f32m1_tu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf8_tu( @@ -179,7 +179,7 @@ void test_vluxseg8ei8_v_f64m1_tu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf4_tu( @@ -204,7 +204,7 @@ void test_vluxseg8ei8_v_i8mf8_tu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf2_tu( @@ -229,7 +229,7 @@ void test_vluxseg8ei8_v_i8mf4_tu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8m1_tu( @@ -254,7 +254,7 @@ void test_vluxseg8ei8_v_i8mf2_tu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf4_tu( @@ -279,7 +279,7 @@ void test_vluxseg8ei8_v_i8m1_tu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf2_tu( @@ -304,7 +304,7 @@ void test_vluxseg8ei8_v_i16mf4_tu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16m1_tu( @@ -329,7 +329,7 @@ void test_vluxseg8ei8_v_i16mf2_tu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32mf2_tu( @@ -354,7 +354,7 @@ void test_vluxseg8ei8_v_i16m1_tu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32m1_tu( @@ -379,7 +379,7 @@ void test_vluxseg8ei8_v_i32mf2_tu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i64m1_tu( @@ -404,7 +404,7 @@ void test_vluxseg8ei8_v_i32m1_tu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf8_tu( @@ -429,7 +429,7 @@ void test_vluxseg8ei8_v_i64m1_tu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf8_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf4_tu( @@ -454,7 +454,7 @@ void test_vluxseg8ei8_v_u8mf8_tu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf2_tu( @@ -479,7 +479,7 @@ void test_vluxseg8ei8_v_u8mf4_tu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8m1_tu( @@ -504,7 +504,7 @@ void test_vluxseg8ei8_v_u8mf2_tu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf4_tu( @@ -529,7 +529,7 @@ void test_vluxseg8ei8_v_u8m1_tu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf4_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf2_tu( @@ -554,7 +554,7 @@ void test_vluxseg8ei8_v_u16mf4_tu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16m1_tu( @@ -579,7 +579,7 @@ void test_vluxseg8ei8_v_u16mf2_tu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32mf2_tu( @@ -604,7 +604,7 @@ void test_vluxseg8ei8_v_u16m1_tu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32mf2_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32m1_tu( @@ -629,7 +629,7 @@ void test_vluxseg8ei8_v_u32mf2_tu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u64m1_tu( @@ -654,7 +654,7 @@ void test_vluxseg8ei8_v_u32m1_tu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u64m1_tu(v0, v1, v2, v3, v4, v5, v6, v7, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf4_tum( @@ -679,7 +679,7 @@ void test_vluxseg8ei8_v_u64m1_tu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf2_tum( @@ -704,7 +704,7 @@ void test_vluxseg8ei8_v_f16mf4_tum(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16m1_tum( @@ -729,7 +729,7 @@ void test_vluxseg8ei8_v_f16mf2_tum(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32mf2_tum( @@ -754,7 +754,7 @@ void test_vluxseg8ei8_v_f16m1_tum(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32m1_tum( @@ -779,7 +779,7 @@ void test_vluxseg8ei8_v_f32mf2_tum(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat3 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f64m1_tum( @@ -804,7 +804,7 @@ void test_vluxseg8ei8_v_f32m1_tum(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf8_tum( @@ -829,7 +829,7 @@ void test_vluxseg8ei8_v_f64m1_tum(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf4_tum( @@ -854,7 +854,7 @@ void test_vluxseg8ei8_v_i8mf8_tum(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf2_tum( @@ -879,7 +879,7 @@ void test_vluxseg8ei8_v_i8mf4_tum(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8m1_tum( @@ -904,7 +904,7 @@ void test_vluxseg8ei8_v_i8mf2_tum(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf4_tum( @@ -929,7 +929,7 @@ void test_vluxseg8ei8_v_i8m1_tum(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vi // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf2_tum( @@ -954,7 +954,7 @@ void test_vluxseg8ei8_v_i16mf4_tum(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16m1_tum( @@ -979,7 +979,7 @@ void test_vluxseg8ei8_v_i16mf2_tum(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32mf2_tum( @@ -1004,7 +1004,7 @@ void test_vluxseg8ei8_v_i16m1_tum(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32m1_tum( @@ -1029,7 +1029,7 @@ void test_vluxseg8ei8_v_i32mf2_tum(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i64m1_tum( @@ -1054,7 +1054,7 @@ void test_vluxseg8ei8_v_i32m1_tum(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf8_tum( @@ -1079,7 +1079,7 @@ void test_vluxseg8ei8_v_i64m1_tum(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf8_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf4_tum( @@ -1104,7 +1104,7 @@ void test_vluxseg8ei8_v_u8mf8_tum(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf2_tum( @@ -1129,7 +1129,7 @@ void test_vluxseg8ei8_v_u8mf4_tum(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8m1_tum( @@ -1154,7 +1154,7 @@ void test_vluxseg8ei8_v_u8mf2_tum(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf4_tum( @@ -1179,7 +1179,7 @@ void test_vluxseg8ei8_v_u8m1_tum(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf4_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf2_tum( @@ -1204,7 +1204,7 @@ void test_vluxseg8ei8_v_u16mf4_tum(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16m1_tum( @@ -1229,7 +1229,7 @@ void test_vluxseg8ei8_v_u16mf2_tum(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32mf2_tum( @@ -1254,7 +1254,7 @@ void test_vluxseg8ei8_v_u16m1_tum(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32mf2_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32m1_tum( @@ -1279,7 +1279,7 @@ void test_vluxseg8ei8_v_u32mf2_tum(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u64m1_tum( @@ -1304,7 +1304,7 @@ void test_vluxseg8ei8_v_u32m1_tum(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u64m1_tum(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf4_tumu( @@ -1329,7 +1329,7 @@ void test_vluxseg8ei8_v_u64m1_tum(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf2_tumu( @@ -1354,7 +1354,7 @@ void test_vluxseg8ei8_v_f16mf4_tumu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16m1_tumu( @@ -1379,7 +1379,7 @@ void test_vluxseg8ei8_v_f16mf2_tumu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32mf2_tumu( @@ -1404,7 +1404,7 @@ void test_vluxseg8ei8_v_f16m1_tumu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32m1_tumu( @@ -1429,7 +1429,7 @@ void test_vluxseg8ei8_v_f32mf2_tumu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f64m1_tumu( @@ -1454,7 +1454,7 @@ void test_vluxseg8ei8_v_f32m1_tumu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf8_tumu( @@ -1479,7 +1479,7 @@ void test_vluxseg8ei8_v_f64m1_tumu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf4_tumu( @@ -1504,7 +1504,7 @@ void test_vluxseg8ei8_v_i8mf8_tumu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf2_tumu( @@ -1529,7 +1529,7 @@ void test_vluxseg8ei8_v_i8mf4_tumu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8m1_tumu( @@ -1554,7 +1554,7 @@ void test_vluxseg8ei8_v_i8mf2_tumu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf4_tumu( @@ -1579,7 +1579,7 @@ void test_vluxseg8ei8_v_i8m1_tumu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf2_tumu( @@ -1604,7 +1604,7 @@ void test_vluxseg8ei8_v_i16mf4_tumu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16m1_tumu( @@ -1629,7 +1629,7 @@ void test_vluxseg8ei8_v_i16mf2_tumu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32mf2_tumu( @@ -1654,7 +1654,7 @@ void test_vluxseg8ei8_v_i16m1_tumu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32m1_tumu( @@ -1679,7 +1679,7 @@ void test_vluxseg8ei8_v_i32mf2_tumu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i64m1_tumu( @@ -1704,7 +1704,7 @@ void test_vluxseg8ei8_v_i32m1_tumu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf8_tumu( @@ -1729,7 +1729,7 @@ void test_vluxseg8ei8_v_i64m1_tumu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf8_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf4_tumu( @@ -1754,7 +1754,7 @@ void test_vluxseg8ei8_v_u8mf8_tumu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf2_tumu( @@ -1779,7 +1779,7 @@ void test_vluxseg8ei8_v_u8mf4_tumu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8m1_tumu( @@ -1804,7 +1804,7 @@ void test_vluxseg8ei8_v_u8mf2_tumu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf4_tumu( @@ -1829,7 +1829,7 @@ void test_vluxseg8ei8_v_u8m1_tumu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf4_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf2_tumu( @@ -1854,7 +1854,7 @@ void test_vluxseg8ei8_v_u16mf4_tumu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16m1_tumu( @@ -1879,7 +1879,7 @@ void test_vluxseg8ei8_v_u16mf2_tumu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32mf2_tumu( @@ -1904,7 +1904,7 @@ void test_vluxseg8ei8_v_u16m1_tumu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32mf2_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32m1_tumu( @@ -1929,7 +1929,7 @@ void test_vluxseg8ei8_v_u32mf2_tumu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32m // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u64m1_tumu( @@ -1954,7 +1954,7 @@ void test_vluxseg8ei8_v_u32m1_tumu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u64m1_tumu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf4_mu( @@ -1979,7 +1979,7 @@ void test_vluxseg8ei8_v_u64m1_tumu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16mf4_t *v2, vfloat16mf4_t *v3, vfloat16mf4_t *v4, vfloat16mf4_t *v5, vfloat16mf4_t *v6, vfloat16mf4_t *v7, vbool64_t mask, vfloat16mf4_t maskedoff0, vfloat16mf4_t maskedoff1, vfloat16mf4_t maskedoff2, vfloat16mf4_t maskedoff3, vfloat16mf4_t maskedoff4, vfloat16mf4_t maskedoff5, vfloat16mf4_t maskedoff6, vfloat16mf4_t maskedoff7, const _Float16 *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16mf2_mu( @@ -2004,7 +2004,7 @@ void test_vluxseg8ei8_v_f16mf4_mu(vfloat16mf4_t *v0, vfloat16mf4_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16mf2_t *v2, vfloat16mf2_t *v3, vfloat16mf2_t *v4, vfloat16mf2_t *v5, vfloat16mf2_t *v6, vfloat16mf2_t *v7, vbool32_t mask, vfloat16mf2_t maskedoff0, vfloat16mf2_t maskedoff1, vfloat16mf2_t maskedoff2, vfloat16mf2_t maskedoff3, vfloat16mf2_t maskedoff4, vfloat16mf2_t maskedoff5, vfloat16mf2_t maskedoff6, vfloat16mf2_t maskedoff7, const _Float16 *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f16m1_mu( @@ -2029,7 +2029,7 @@ void test_vluxseg8ei8_v_f16mf2_mu(vfloat16mf2_t *v0, vfloat16mf2_t *v1, vfloat16 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_t *v2, vfloat16m1_t *v3, vfloat16m1_t *v4, vfloat16m1_t *v5, vfloat16m1_t *v6, vfloat16m1_t *v7, vbool16_t mask, vfloat16m1_t maskedoff0, vfloat16m1_t maskedoff1, vfloat16m1_t maskedoff2, vfloat16m1_t maskedoff3, vfloat16m1_t maskedoff4, vfloat16m1_t maskedoff5, vfloat16m1_t maskedoff6, vfloat16m1_t maskedoff7, const _Float16 *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32mf2_mu( @@ -2054,7 +2054,7 @@ void test_vluxseg8ei8_v_f16m1_mu(vfloat16m1_t *v0, vfloat16m1_t *v1, vfloat16m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32mf2_t *v2, vfloat32mf2_t *v3, vfloat32mf2_t *v4, vfloat32mf2_t *v5, vfloat32mf2_t *v6, vfloat32mf2_t *v7, vbool64_t mask, vfloat32mf2_t maskedoff0, vfloat32mf2_t maskedoff1, vfloat32mf2_t maskedoff2, vfloat32mf2_t maskedoff3, vfloat32mf2_t maskedoff4, vfloat32mf2_t maskedoff5, vfloat32mf2_t maskedoff6, vfloat32mf2_t maskedoff7, const float *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f32m1_mu( @@ -2079,7 +2079,7 @@ void test_vluxseg8ei8_v_f32mf2_mu(vfloat32mf2_t *v0, vfloat32mf2_t *v1, vfloat32 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_t *v2, vfloat32m1_t *v3, vfloat32m1_t *v4, vfloat32m1_t *v5, vfloat32m1_t *v6, vfloat32m1_t *v7, vbool32_t mask, vfloat32m1_t maskedoff0, vfloat32m1_t maskedoff1, vfloat32m1_t maskedoff2, vfloat32m1_t maskedoff3, vfloat32m1_t maskedoff4, vfloat32m1_t maskedoff5, vfloat32m1_t maskedoff6, vfloat32m1_t maskedoff7, const float *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_f64m1_mu( @@ -2104,7 +2104,7 @@ void test_vluxseg8ei8_v_f32m1_mu(vfloat32m1_t *v0, vfloat32m1_t *v1, vfloat32m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_t *v2, vfloat64m1_t *v3, vfloat64m1_t *v4, vfloat64m1_t *v5, vfloat64m1_t *v6, vfloat64m1_t *v7, vbool64_t mask, vfloat64m1_t maskedoff0, vfloat64m1_t maskedoff1, vfloat64m1_t maskedoff2, vfloat64m1_t maskedoff3, vfloat64m1_t maskedoff4, vfloat64m1_t maskedoff5, vfloat64m1_t maskedoff6, vfloat64m1_t maskedoff7, const double *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_f64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf8_mu( @@ -2129,7 +2129,7 @@ void test_vluxseg8ei8_v_f64m1_mu(vfloat64m1_t *v0, vfloat64m1_t *v1, vfloat64m1_ // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, vint8mf8_t *v3, vint8mf8_t *v4, vint8mf8_t *v5, vint8mf8_t *v6, vint8mf8_t *v7, vbool64_t mask, vint8mf8_t maskedoff0, vint8mf8_t maskedoff1, vint8mf8_t maskedoff2, vint8mf8_t maskedoff3, vint8mf8_t maskedoff4, vint8mf8_t maskedoff5, vint8mf8_t maskedoff6, vint8mf8_t maskedoff7, const int8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf4_mu( @@ -2154,7 +2154,7 @@ void test_vluxseg8ei8_v_i8mf8_mu(vint8mf8_t *v0, vint8mf8_t *v1, vint8mf8_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, vint8mf4_t *v3, vint8mf4_t *v4, vint8mf4_t *v5, vint8mf4_t *v6, vint8mf4_t *v7, vbool32_t mask, vint8mf4_t maskedoff0, vint8mf4_t maskedoff1, vint8mf4_t maskedoff2, vint8mf4_t maskedoff3, vint8mf4_t maskedoff4, vint8mf4_t maskedoff5, vint8mf4_t maskedoff6, vint8mf4_t maskedoff7, const int8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8mf2_mu( @@ -2179,7 +2179,7 @@ void test_vluxseg8ei8_v_i8mf4_mu(vint8mf4_t *v0, vint8mf4_t *v1, vint8mf4_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, vint8mf2_t *v3, vint8mf2_t *v4, vint8mf2_t *v5, vint8mf2_t *v6, vint8mf2_t *v7, vbool16_t mask, vint8mf2_t maskedoff0, vint8mf2_t maskedoff1, vint8mf2_t maskedoff2, vint8mf2_t maskedoff3, vint8mf2_t maskedoff4, vint8mf2_t maskedoff5, vint8mf2_t maskedoff6, vint8mf2_t maskedoff7, const int8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i8m1_mu( @@ -2204,7 +2204,7 @@ void test_vluxseg8ei8_v_i8mf2_mu(vint8mf2_t *v0, vint8mf2_t *v1, vint8mf2_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vint8m1_t *v3, vint8m1_t *v4, vint8m1_t *v5, vint8m1_t *v6, vint8m1_t *v7, vbool8_t mask, vint8m1_t maskedoff0, vint8m1_t maskedoff1, vint8m1_t maskedoff2, vint8m1_t maskedoff3, vint8m1_t maskedoff4, vint8m1_t maskedoff5, vint8m1_t maskedoff6, vint8m1_t maskedoff7, const int8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf4_mu( @@ -2229,7 +2229,7 @@ void test_vluxseg8ei8_v_i8m1_mu(vint8m1_t *v0, vint8m1_t *v1, vint8m1_t *v2, vin // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t *v2, vint16mf4_t *v3, vint16mf4_t *v4, vint16mf4_t *v5, vint16mf4_t *v6, vint16mf4_t *v7, vbool64_t mask, vint16mf4_t maskedoff0, vint16mf4_t maskedoff1, vint16mf4_t maskedoff2, vint16mf4_t maskedoff3, vint16mf4_t maskedoff4, vint16mf4_t maskedoff5, vint16mf4_t maskedoff6, vint16mf4_t maskedoff7, const int16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16mf2_mu( @@ -2254,7 +2254,7 @@ void test_vluxseg8ei8_v_i16mf4_mu(vint16mf4_t *v0, vint16mf4_t *v1, vint16mf4_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t *v2, vint16mf2_t *v3, vint16mf2_t *v4, vint16mf2_t *v5, vint16mf2_t *v6, vint16mf2_t *v7, vbool32_t mask, vint16mf2_t maskedoff0, vint16mf2_t maskedoff1, vint16mf2_t maskedoff2, vint16mf2_t maskedoff3, vint16mf2_t maskedoff4, vint16mf2_t maskedoff5, vint16mf2_t maskedoff6, vint16mf2_t maskedoff7, const int16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i16m1_mu( @@ -2279,7 +2279,7 @@ void test_vluxseg8ei8_v_i16mf2_mu(vint16mf2_t *v0, vint16mf2_t *v1, vint16mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, vint16m1_t *v3, vint16m1_t *v4, vint16m1_t *v5, vint16m1_t *v6, vint16m1_t *v7, vbool16_t mask, vint16m1_t maskedoff0, vint16m1_t maskedoff1, vint16m1_t maskedoff2, vint16m1_t maskedoff3, vint16m1_t maskedoff4, vint16m1_t maskedoff5, vint16m1_t maskedoff6, vint16m1_t maskedoff7, const int16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32mf2_mu( @@ -2304,7 +2304,7 @@ void test_vluxseg8ei8_v_i16m1_mu(vint16m1_t *v0, vint16m1_t *v1, vint16m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t *v2, vint32mf2_t *v3, vint32mf2_t *v4, vint32mf2_t *v5, vint32mf2_t *v6, vint32mf2_t *v7, vbool64_t mask, vint32mf2_t maskedoff0, vint32mf2_t maskedoff1, vint32mf2_t maskedoff2, vint32mf2_t maskedoff3, vint32mf2_t maskedoff4, vint32mf2_t maskedoff5, vint32mf2_t maskedoff6, vint32mf2_t maskedoff7, const int32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i32m1_mu( @@ -2329,7 +2329,7 @@ void test_vluxseg8ei8_v_i32mf2_mu(vint32mf2_t *v0, vint32mf2_t *v1, vint32mf2_t // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, vint32m1_t *v3, vint32m1_t *v4, vint32m1_t *v5, vint32m1_t *v6, vint32m1_t *v7, vbool32_t mask, vint32m1_t maskedoff0, vint32m1_t maskedoff1, vint32m1_t maskedoff2, vint32m1_t maskedoff3, vint32m1_t maskedoff4, vint32m1_t maskedoff5, vint32m1_t maskedoff6, vint32m1_t maskedoff7, const int32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_i64m1_mu( @@ -2354,7 +2354,7 @@ void test_vluxseg8ei8_v_i32m1_mu(vint32m1_t *v0, vint32m1_t *v1, vint32m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, vint64m1_t *v3, vint64m1_t *v4, vint64m1_t *v5, vint64m1_t *v6, vint64m1_t *v7, vbool64_t mask, vint64m1_t maskedoff0, vint64m1_t maskedoff1, vint64m1_t maskedoff2, vint64m1_t maskedoff3, vint64m1_t maskedoff4, vint64m1_t maskedoff5, vint64m1_t maskedoff6, vint64m1_t maskedoff7, const int64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_i64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf8_mu( @@ -2379,7 +2379,7 @@ void test_vluxseg8ei8_v_i64m1_mu(vint64m1_t *v0, vint64m1_t *v1, vint64m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t *v2, vuint8mf8_t *v3, vuint8mf8_t *v4, vuint8mf8_t *v5, vuint8mf8_t *v6, vuint8mf8_t *v7, vbool64_t mask, vuint8mf8_t maskedoff0, vuint8mf8_t maskedoff1, vuint8mf8_t maskedoff2, vuint8mf8_t maskedoff3, vuint8mf8_t maskedoff4, vuint8mf8_t maskedoff5, vuint8mf8_t maskedoff6, vuint8mf8_t maskedoff7, const uint8_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf8_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf4_mu( @@ -2404,7 +2404,7 @@ void test_vluxseg8ei8_v_u8mf8_mu(vuint8mf8_t *v0, vuint8mf8_t *v1, vuint8mf8_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t *v2, vuint8mf4_t *v3, vuint8mf4_t *v4, vuint8mf4_t *v5, vuint8mf4_t *v6, vuint8mf4_t *v7, vbool32_t mask, vuint8mf4_t maskedoff0, vuint8mf4_t maskedoff1, vuint8mf4_t maskedoff2, vuint8mf4_t maskedoff3, vuint8mf4_t maskedoff4, vuint8mf4_t maskedoff5, vuint8mf4_t maskedoff6, vuint8mf4_t maskedoff7, const uint8_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8mf2_mu( @@ -2429,7 +2429,7 @@ void test_vluxseg8ei8_v_u8mf4_mu(vuint8mf4_t *v0, vuint8mf4_t *v1, vuint8mf4_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t *v2, vuint8mf2_t *v3, vuint8mf2_t *v4, vuint8mf2_t *v5, vuint8mf2_t *v6, vuint8mf2_t *v7, vbool16_t mask, vuint8mf2_t maskedoff0, vuint8mf2_t maskedoff1, vuint8mf2_t maskedoff2, vuint8mf2_t maskedoff3, vuint8mf2_t maskedoff4, vuint8mf2_t maskedoff5, vuint8mf2_t maskedoff6, vuint8mf2_t maskedoff7, const uint8_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u8m1_mu( @@ -2454,7 +2454,7 @@ void test_vluxseg8ei8_v_u8mf2_mu(vuint8mf2_t *v0, vuint8mf2_t *v1, vuint8mf2_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, vuint8m1_t *v3, vuint8m1_t *v4, vuint8m1_t *v5, vuint8m1_t *v6, vuint8m1_t *v7, vbool8_t mask, vuint8m1_t maskedoff0, vuint8m1_t maskedoff1, vuint8m1_t maskedoff2, vuint8m1_t maskedoff3, vuint8m1_t maskedoff4, vuint8m1_t maskedoff5, vuint8m1_t maskedoff6, vuint8m1_t maskedoff7, const uint8_t *base, vuint8m1_t bindex, size_t vl) { - return vluxseg8ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u8m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf4_mu( @@ -2479,7 +2479,7 @@ void test_vluxseg8ei8_v_u8m1_mu(vuint8m1_t *v0, vuint8m1_t *v1, vuint8m1_t *v2, // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4_t *v2, vuint16mf4_t *v3, vuint16mf4_t *v4, vuint16mf4_t *v5, vuint16mf4_t *v6, vuint16mf4_t *v7, vbool64_t mask, vuint16mf4_t maskedoff0, vuint16mf4_t maskedoff1, vuint16mf4_t maskedoff2, vuint16mf4_t maskedoff3, vuint16mf4_t maskedoff4, vuint16mf4_t maskedoff5, vuint16mf4_t maskedoff6, vuint16mf4_t maskedoff7, const uint16_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf4_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16mf2_mu( @@ -2504,7 +2504,7 @@ void test_vluxseg8ei8_v_u16mf4_mu(vuint16mf4_t *v0, vuint16mf4_t *v1, vuint16mf4 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2_t *v2, vuint16mf2_t *v3, vuint16mf2_t *v4, vuint16mf2_t *v5, vuint16mf2_t *v6, vuint16mf2_t *v7, vbool32_t mask, vuint16mf2_t maskedoff0, vuint16mf2_t maskedoff1, vuint16mf2_t maskedoff2, vuint16mf2_t maskedoff3, vuint16mf2_t maskedoff4, vuint16mf2_t maskedoff5, vuint16mf2_t maskedoff6, vuint16mf2_t maskedoff7, const uint16_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u16m1_mu( @@ -2529,7 +2529,7 @@ void test_vluxseg8ei8_v_u16mf2_mu(vuint16mf2_t *v0, vuint16mf2_t *v1, vuint16mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t *v2, vuint16m1_t *v3, vuint16m1_t *v4, vuint16m1_t *v5, vuint16m1_t *v6, vuint16m1_t *v7, vbool16_t mask, vuint16m1_t maskedoff0, vuint16m1_t maskedoff1, vuint16m1_t maskedoff2, vuint16m1_t maskedoff3, vuint16m1_t maskedoff4, vuint16m1_t maskedoff5, vuint16m1_t maskedoff6, vuint16m1_t maskedoff7, const uint16_t *base, vuint8mf2_t bindex, size_t vl) { - return vluxseg8ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u16m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32mf2_mu( @@ -2554,7 +2554,7 @@ void test_vluxseg8ei8_v_u16m1_mu(vuint16m1_t *v0, vuint16m1_t *v1, vuint16m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2_t *v2, vuint32mf2_t *v3, vuint32mf2_t *v4, vuint32mf2_t *v5, vuint32mf2_t *v6, vuint32mf2_t *v7, vbool64_t mask, vuint32mf2_t maskedoff0, vuint32mf2_t maskedoff1, vuint32mf2_t maskedoff2, vuint32mf2_t maskedoff3, vuint32mf2_t maskedoff4, vuint32mf2_t maskedoff5, vuint32mf2_t maskedoff6, vuint32mf2_t maskedoff7, const uint32_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32mf2_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u32m1_mu( @@ -2579,7 +2579,7 @@ void test_vluxseg8ei8_v_u32mf2_mu(vuint32mf2_t *v0, vuint32mf2_t *v1, vuint32mf2 // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t *v2, vuint32m1_t *v3, vuint32m1_t *v4, vuint32m1_t *v5, vuint32m1_t *v6, vuint32m1_t *v7, vbool32_t mask, vuint32m1_t maskedoff0, vuint32m1_t maskedoff1, vuint32m1_t maskedoff2, vuint32m1_t maskedoff3, vuint32m1_t maskedoff4, vuint32m1_t maskedoff5, vuint32m1_t maskedoff6, vuint32m1_t maskedoff7, const uint32_t *base, vuint8mf4_t bindex, size_t vl) { - return vluxseg8ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u32m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } // CHECK-RV64-LABEL: @test_vluxseg8ei8_v_u64m1_mu( @@ -2604,6 +2604,6 @@ void test_vluxseg8ei8_v_u32m1_mu(vuint32m1_t *v0, vuint32m1_t *v1, vuint32m1_t * // CHECK-RV64-NEXT: ret void // void test_vluxseg8ei8_v_u64m1_mu(vuint64m1_t *v0, vuint64m1_t *v1, vuint64m1_t *v2, vuint64m1_t *v3, vuint64m1_t *v4, vuint64m1_t *v5, vuint64m1_t *v6, vuint64m1_t *v7, vbool64_t mask, vuint64m1_t maskedoff0, vuint64m1_t maskedoff1, vuint64m1_t maskedoff2, vuint64m1_t maskedoff3, vuint64m1_t maskedoff4, vuint64m1_t maskedoff5, vuint64m1_t maskedoff6, vuint64m1_t maskedoff7, const uint64_t *base, vuint8mf8_t bindex, size_t vl) { - return vluxseg8ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); + return __riscv_vluxseg8ei8_v_u64m1_mu(v0, v1, v2, v3, v4, v5, v6, v7, mask, maskedoff0, maskedoff1, maskedoff2, maskedoff3, maskedoff4, maskedoff5, maskedoff6, maskedoff7, base, bindex, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmacc.c index 18477fcf18c45494897a85bb951c0990e62b51af..fa63896f03d0ca20d50e75afe93a0575f03d81a1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vv_i8mf8_tu(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vv_i8mf8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf8_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vmacc_vv_i8mf8_tu(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vx_i8mf8_tu(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vx_i8mf8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf4_tu( @@ -31,7 +31,7 @@ vint8mf8_t test_vmacc_vx_i8mf8_tu(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vv_i8mf4_tu(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vv_i8mf4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf4_tu( @@ -40,7 +40,7 @@ vint8mf4_t test_vmacc_vv_i8mf4_tu(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vx_i8mf4_tu(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vx_i8mf4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf2_tu( @@ -49,7 +49,7 @@ vint8mf4_t test_vmacc_vx_i8mf4_tu(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vv_i8mf2_tu(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vv_i8mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf2_tu( @@ -58,7 +58,7 @@ vint8mf2_t test_vmacc_vv_i8mf2_tu(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vx_i8mf2_tu(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vx_i8mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m1_tu( @@ -67,7 +67,7 @@ vint8mf2_t test_vmacc_vx_i8mf2_tu(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vv_i8m1_tu(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmacc_vv_i8m1_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m1_tu( @@ -76,7 +76,7 @@ vint8m1_t test_vmacc_vv_i8m1_tu(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vx_i8m1_tu(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmacc_vx_i8m1_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m2_tu( @@ -85,7 +85,7 @@ vint8m1_t test_vmacc_vx_i8m1_tu(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vv_i8m2_tu(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmacc_vv_i8m2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m2_tu( @@ -94,7 +94,7 @@ vint8m2_t test_vmacc_vv_i8m2_tu(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vx_i8m2_tu(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmacc_vx_i8m2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m4_tu( @@ -103,7 +103,7 @@ vint8m2_t test_vmacc_vx_i8m2_tu(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vv_i8m4_tu(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmacc_vv_i8m4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m4_tu( @@ -112,7 +112,7 @@ vint8m4_t test_vmacc_vv_i8m4_tu(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vx_i8m4_tu(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmacc_vx_i8m4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m8_tu( @@ -121,7 +121,7 @@ vint8m4_t test_vmacc_vx_i8m4_tu(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vv_i8m8_tu(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmacc_vv_i8m8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m8_tu( @@ -130,7 +130,7 @@ vint8m8_t test_vmacc_vv_i8m8_tu(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vx_i8m8_tu(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmacc_vx_i8m8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf4_tu( @@ -139,7 +139,7 @@ vint8m8_t test_vmacc_vx_i8m8_tu(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vv_i16mf4_tu(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vv_i16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf4_tu( @@ -148,7 +148,7 @@ vint16mf4_t test_vmacc_vv_i16mf4_tu(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vx_i16mf4_tu(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vx_i16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf2_tu( @@ -157,7 +157,7 @@ vint16mf4_t test_vmacc_vx_i16mf4_tu(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vv_i16mf2_tu(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vv_i16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf2_tu( @@ -166,7 +166,7 @@ vint16mf2_t test_vmacc_vv_i16mf2_tu(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vx_i16mf2_tu(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vx_i16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m1_tu( @@ -175,7 +175,7 @@ vint16mf2_t test_vmacc_vx_i16mf2_tu(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vv_i16m1_tu(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmacc_vv_i16m1_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m1_tu( @@ -184,7 +184,7 @@ vint16m1_t test_vmacc_vv_i16m1_tu(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vx_i16m1_tu(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmacc_vx_i16m1_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m2_tu( @@ -193,7 +193,7 @@ vint16m1_t test_vmacc_vx_i16m1_tu(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vv_i16m2_tu(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmacc_vv_i16m2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m2_tu( @@ -202,7 +202,7 @@ vint16m2_t test_vmacc_vv_i16m2_tu(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vx_i16m2_tu(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmacc_vx_i16m2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m4_tu( @@ -211,7 +211,7 @@ vint16m2_t test_vmacc_vx_i16m2_tu(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vv_i16m4_tu(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmacc_vv_i16m4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m4_tu( @@ -220,7 +220,7 @@ vint16m4_t test_vmacc_vv_i16m4_tu(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vx_i16m4_tu(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmacc_vx_i16m4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m8_tu( @@ -229,7 +229,7 @@ vint16m4_t test_vmacc_vx_i16m4_tu(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vv_i16m8_tu(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmacc_vv_i16m8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m8_tu( @@ -238,7 +238,7 @@ vint16m8_t test_vmacc_vv_i16m8_tu(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vx_i16m8_tu(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmacc_vx_i16m8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32mf2_tu( @@ -247,7 +247,7 @@ vint16m8_t test_vmacc_vx_i16m8_tu(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vv_i32mf2_tu(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vv_i32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32mf2_tu( @@ -256,7 +256,7 @@ vint32mf2_t test_vmacc_vv_i32mf2_tu(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vx_i32mf2_tu(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vx_i32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vmacc_vx_i32mf2_tu(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vv_i32m1_tu(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmacc_vv_i32m1_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m1_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vmacc_vv_i32m1_tu(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vx_i32m1_tu(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmacc_vx_i32m1_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vmacc_vx_i32m1_tu(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vv_i32m2_tu(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmacc_vv_i32m2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m2_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vmacc_vv_i32m2_tu(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vx_i32m2_tu(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmacc_vx_i32m2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m4_tu( @@ -301,7 +301,7 @@ vint32m2_t test_vmacc_vx_i32m2_tu(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vv_i32m4_tu(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmacc_vv_i32m4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m4_tu( @@ -310,7 +310,7 @@ vint32m4_t test_vmacc_vv_i32m4_tu(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vx_i32m4_tu(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmacc_vx_i32m4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m8_tu( @@ -319,7 +319,7 @@ vint32m4_t test_vmacc_vx_i32m4_tu(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vv_i32m8_tu(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmacc_vv_i32m8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m8_tu( @@ -328,7 +328,7 @@ vint32m8_t test_vmacc_vv_i32m8_tu(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vx_i32m8_tu(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmacc_vx_i32m8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m1_tu( @@ -337,7 +337,7 @@ vint32m8_t test_vmacc_vx_i32m8_tu(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vv_i64m1_tu(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmacc_vv_i64m1_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m1_tu( @@ -346,7 +346,7 @@ vint64m1_t test_vmacc_vv_i64m1_tu(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vx_i64m1_tu(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmacc_vx_i64m1_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m2_tu( @@ -355,7 +355,7 @@ vint64m1_t test_vmacc_vx_i64m1_tu(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vv_i64m2_tu(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmacc_vv_i64m2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m2_tu( @@ -364,7 +364,7 @@ vint64m2_t test_vmacc_vv_i64m2_tu(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vx_i64m2_tu(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmacc_vx_i64m2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m4_tu( @@ -373,7 +373,7 @@ vint64m2_t test_vmacc_vx_i64m2_tu(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vv_i64m4_tu(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmacc_vv_i64m4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m4_tu( @@ -382,7 +382,7 @@ vint64m4_t test_vmacc_vv_i64m4_tu(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vx_i64m4_tu(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmacc_vx_i64m4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m8_tu( @@ -391,7 +391,7 @@ vint64m4_t test_vmacc_vx_i64m4_tu(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vv_i64m8_tu(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmacc_vv_i64m8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m8_tu( @@ -400,7 +400,7 @@ vint64m8_t test_vmacc_vv_i64m8_tu(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vx_i64m8_tu(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmacc_vx_i64m8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf8_tu( @@ -409,7 +409,7 @@ vint64m8_t test_vmacc_vx_i64m8_tu(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vv_u8mf8_tu(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vv_u8mf8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf8_tu( @@ -418,7 +418,7 @@ vuint8mf8_t test_vmacc_vv_u8mf8_tu(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vx_u8mf8_tu(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vx_u8mf8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf4_tu( @@ -427,7 +427,7 @@ vuint8mf8_t test_vmacc_vx_u8mf8_tu(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vv_u8mf4_tu(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vv_u8mf4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf4_tu( @@ -436,7 +436,7 @@ vuint8mf4_t test_vmacc_vv_u8mf4_tu(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vx_u8mf4_tu(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vx_u8mf4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf2_tu( @@ -445,7 +445,7 @@ vuint8mf4_t test_vmacc_vx_u8mf4_tu(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vv_u8mf2_tu(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vv_u8mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf2_tu( @@ -454,7 +454,7 @@ vuint8mf2_t test_vmacc_vv_u8mf2_tu(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vx_u8mf2_tu(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vx_u8mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m1_tu( @@ -463,7 +463,7 @@ vuint8mf2_t test_vmacc_vx_u8mf2_tu(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vv_u8m1_tu(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vv_u8m1_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m1_tu( @@ -472,7 +472,7 @@ vuint8m1_t test_vmacc_vv_u8m1_tu(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vx_u8m1_tu(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vx_u8m1_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m2_tu( @@ -481,7 +481,7 @@ vuint8m1_t test_vmacc_vx_u8m1_tu(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vv_u8m2_tu(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vv_u8m2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m2_tu( @@ -490,7 +490,7 @@ vuint8m2_t test_vmacc_vv_u8m2_tu(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vx_u8m2_tu(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vx_u8m2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m4_tu( @@ -499,7 +499,7 @@ vuint8m2_t test_vmacc_vx_u8m2_tu(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vv_u8m4_tu(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vv_u8m4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m4_tu( @@ -508,7 +508,7 @@ vuint8m4_t test_vmacc_vv_u8m4_tu(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vx_u8m4_tu(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vx_u8m4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m8_tu( @@ -517,7 +517,7 @@ vuint8m4_t test_vmacc_vx_u8m4_tu(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vv_u8m8_tu(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vv_u8m8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m8_tu( @@ -526,7 +526,7 @@ vuint8m8_t test_vmacc_vv_u8m8_tu(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vx_u8m8_tu(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vx_u8m8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf4_tu( @@ -535,7 +535,7 @@ vuint8m8_t test_vmacc_vx_u8m8_tu(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vv_u16mf4_tu(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vv_u16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf4_tu( @@ -544,7 +544,7 @@ vuint16mf4_t test_vmacc_vv_u16mf4_tu(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vx_u16mf4_tu(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vx_u16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf2_tu( @@ -553,7 +553,7 @@ vuint16mf4_t test_vmacc_vx_u16mf4_tu(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vv_u16mf2_tu(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vv_u16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf2_tu( @@ -562,7 +562,7 @@ vuint16mf2_t test_vmacc_vv_u16mf2_tu(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vx_u16mf2_tu(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vx_u16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m1_tu( @@ -571,7 +571,7 @@ vuint16mf2_t test_vmacc_vx_u16mf2_tu(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vv_u16m1_tu(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vv_u16m1_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m1_tu( @@ -580,7 +580,7 @@ vuint16m1_t test_vmacc_vv_u16m1_tu(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vx_u16m1_tu(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vx_u16m1_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m2_tu( @@ -589,7 +589,7 @@ vuint16m1_t test_vmacc_vx_u16m1_tu(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vv_u16m2_tu(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vv_u16m2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m2_tu( @@ -598,7 +598,7 @@ vuint16m2_t test_vmacc_vv_u16m2_tu(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vx_u16m2_tu(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vx_u16m2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m4_tu( @@ -607,7 +607,7 @@ vuint16m2_t test_vmacc_vx_u16m2_tu(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vv_u16m4_tu(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vv_u16m4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m4_tu( @@ -616,7 +616,7 @@ vuint16m4_t test_vmacc_vv_u16m4_tu(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vx_u16m4_tu(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vx_u16m4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m8_tu( @@ -625,7 +625,7 @@ vuint16m4_t test_vmacc_vx_u16m4_tu(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vv_u16m8_tu(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vv_u16m8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m8_tu( @@ -634,7 +634,7 @@ vuint16m8_t test_vmacc_vv_u16m8_tu(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vx_u16m8_tu(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vx_u16m8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32mf2_tu( @@ -643,7 +643,7 @@ vuint16m8_t test_vmacc_vx_u16m8_tu(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vv_u32mf2_tu(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vv_u32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32mf2_tu( @@ -652,7 +652,7 @@ vuint32mf2_t test_vmacc_vv_u32mf2_tu(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vx_u32mf2_tu(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vx_u32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m1_tu( @@ -661,7 +661,7 @@ vuint32mf2_t test_vmacc_vx_u32mf2_tu(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vv_u32m1_tu(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vv_u32m1_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m1_tu( @@ -670,7 +670,7 @@ vuint32m1_t test_vmacc_vv_u32m1_tu(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vx_u32m1_tu(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vx_u32m1_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m2_tu( @@ -679,7 +679,7 @@ vuint32m1_t test_vmacc_vx_u32m1_tu(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vv_u32m2_tu(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vv_u32m2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m2_tu( @@ -688,7 +688,7 @@ vuint32m2_t test_vmacc_vv_u32m2_tu(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vx_u32m2_tu(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vx_u32m2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m4_tu( @@ -697,7 +697,7 @@ vuint32m2_t test_vmacc_vx_u32m2_tu(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vv_u32m4_tu(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vv_u32m4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m4_tu( @@ -706,7 +706,7 @@ vuint32m4_t test_vmacc_vv_u32m4_tu(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vx_u32m4_tu(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vx_u32m4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m8_tu( @@ -715,7 +715,7 @@ vuint32m4_t test_vmacc_vx_u32m4_tu(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vv_u32m8_tu(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vv_u32m8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m8_tu( @@ -724,7 +724,7 @@ vuint32m8_t test_vmacc_vv_u32m8_tu(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vx_u32m8_tu(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vx_u32m8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m1_tu( @@ -733,7 +733,7 @@ vuint32m8_t test_vmacc_vx_u32m8_tu(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vv_u64m1_tu(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vv_u64m1_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m1_tu( @@ -742,7 +742,7 @@ vuint64m1_t test_vmacc_vv_u64m1_tu(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vx_u64m1_tu(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vx_u64m1_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m2_tu( @@ -751,7 +751,7 @@ vuint64m1_t test_vmacc_vx_u64m1_tu(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vv_u64m2_tu(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vv_u64m2_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m2_tu( @@ -760,7 +760,7 @@ vuint64m2_t test_vmacc_vv_u64m2_tu(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vx_u64m2_tu(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vx_u64m2_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m4_tu( @@ -769,7 +769,7 @@ vuint64m2_t test_vmacc_vx_u64m2_tu(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vv_u64m4_tu(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vv_u64m4_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m4_tu( @@ -778,7 +778,7 @@ vuint64m4_t test_vmacc_vv_u64m4_tu(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vx_u64m4_tu(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vx_u64m4_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m8_tu( @@ -787,7 +787,7 @@ vuint64m4_t test_vmacc_vx_u64m4_tu(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vv_u64m8_tu(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vv_u64m8_tu(vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m8_tu( @@ -796,7 +796,7 @@ vuint64m8_t test_vmacc_vv_u64m8_tu(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vx_u64m8_tu(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vx_u64m8_tu(vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf8_tum( @@ -805,7 +805,7 @@ vuint64m8_t test_vmacc_vx_u64m8_tu(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vv_i8mf8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf8_tum( @@ -814,7 +814,7 @@ vint8mf8_t test_vmacc_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vx_i8mf8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf4_tum( @@ -823,7 +823,7 @@ vint8mf8_t test_vmacc_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vv_i8mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf4_tum( @@ -832,7 +832,7 @@ vint8mf4_t test_vmacc_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vx_i8mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf2_tum( @@ -841,7 +841,7 @@ vint8mf4_t test_vmacc_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vv_i8mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf2_tum( @@ -850,7 +850,7 @@ vint8mf2_t test_vmacc_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vx_i8mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m1_tum( @@ -859,7 +859,7 @@ vint8mf2_t test_vmacc_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vv_i8m1_tum(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmacc_vv_i8m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m1_tum( @@ -868,7 +868,7 @@ vint8m1_t test_vmacc_vv_i8m1_tum(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vx_i8m1_tum(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmacc_vx_i8m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m2_tum( @@ -877,7 +877,7 @@ vint8m1_t test_vmacc_vx_i8m1_tum(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vv_i8m2_tum(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmacc_vv_i8m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m2_tum( @@ -886,7 +886,7 @@ vint8m2_t test_vmacc_vv_i8m2_tum(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vx_i8m2_tum(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmacc_vx_i8m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m4_tum( @@ -895,7 +895,7 @@ vint8m2_t test_vmacc_vx_i8m2_tum(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vv_i8m4_tum(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmacc_vv_i8m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m4_tum( @@ -904,7 +904,7 @@ vint8m4_t test_vmacc_vv_i8m4_tum(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vx_i8m4_tum(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmacc_vx_i8m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m8_tum( @@ -913,7 +913,7 @@ vint8m4_t test_vmacc_vx_i8m4_tum(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vv_i8m8_tum(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmacc_vv_i8m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m8_tum( @@ -922,7 +922,7 @@ vint8m8_t test_vmacc_vv_i8m8_tum(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vx_i8m8_tum(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmacc_vx_i8m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf4_tum( @@ -931,7 +931,7 @@ vint8m8_t test_vmacc_vx_i8m8_tum(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf4_tum( @@ -940,7 +940,7 @@ vint16mf4_t test_vmacc_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf2_tum( @@ -949,7 +949,7 @@ vint16mf4_t test_vmacc_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf2_tum( @@ -958,7 +958,7 @@ vint16mf2_t test_vmacc_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m1_tum( @@ -967,7 +967,7 @@ vint16mf2_t test_vmacc_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmacc_vv_i16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m1_tum( @@ -976,7 +976,7 @@ vint16m1_t test_vmacc_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmacc_vx_i16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m2_tum( @@ -985,7 +985,7 @@ vint16m1_t test_vmacc_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmacc_vv_i16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m2_tum( @@ -994,7 +994,7 @@ vint16m2_t test_vmacc_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmacc_vx_i16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m4_tum( @@ -1003,7 +1003,7 @@ vint16m2_t test_vmacc_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmacc_vv_i16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m4_tum( @@ -1012,7 +1012,7 @@ vint16m4_t test_vmacc_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmacc_vx_i16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m8_tum( @@ -1021,7 +1021,7 @@ vint16m4_t test_vmacc_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmacc_vv_i16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m8_tum( @@ -1030,7 +1030,7 @@ vint16m8_t test_vmacc_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmacc_vx_i16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32mf2_tum( @@ -1039,7 +1039,7 @@ vint16m8_t test_vmacc_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32mf2_tum( @@ -1048,7 +1048,7 @@ vint32mf2_t test_vmacc_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m1_tum( @@ -1057,7 +1057,7 @@ vint32mf2_t test_vmacc_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmacc_vv_i32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m1_tum( @@ -1066,7 +1066,7 @@ vint32m1_t test_vmacc_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmacc_vx_i32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m2_tum( @@ -1075,7 +1075,7 @@ vint32m1_t test_vmacc_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmacc_vv_i32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m2_tum( @@ -1084,7 +1084,7 @@ vint32m2_t test_vmacc_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmacc_vx_i32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m4_tum( @@ -1093,7 +1093,7 @@ vint32m2_t test_vmacc_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmacc_vv_i32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m4_tum( @@ -1102,7 +1102,7 @@ vint32m4_t test_vmacc_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmacc_vx_i32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m8_tum( @@ -1111,7 +1111,7 @@ vint32m4_t test_vmacc_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmacc_vv_i32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m8_tum( @@ -1120,7 +1120,7 @@ vint32m8_t test_vmacc_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmacc_vx_i32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m1_tum( @@ -1129,7 +1129,7 @@ vint32m8_t test_vmacc_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmacc_vv_i64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m1_tum( @@ -1138,7 +1138,7 @@ vint64m1_t test_vmacc_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmacc_vx_i64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m2_tum( @@ -1147,7 +1147,7 @@ vint64m1_t test_vmacc_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmacc_vv_i64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m2_tum( @@ -1156,7 +1156,7 @@ vint64m2_t test_vmacc_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmacc_vx_i64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m4_tum( @@ -1165,7 +1165,7 @@ vint64m2_t test_vmacc_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmacc_vv_i64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m4_tum( @@ -1174,7 +1174,7 @@ vint64m4_t test_vmacc_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmacc_vx_i64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m8_tum( @@ -1183,7 +1183,7 @@ vint64m4_t test_vmacc_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmacc_vv_i64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m8_tum( @@ -1192,7 +1192,7 @@ vint64m8_t test_vmacc_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmacc_vx_i64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf8_tum( @@ -1201,7 +1201,7 @@ vint64m8_t test_vmacc_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vv_u8mf8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf8_tum( @@ -1210,7 +1210,7 @@ vuint8mf8_t test_vmacc_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vx_u8mf8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf4_tum( @@ -1219,7 +1219,7 @@ vuint8mf8_t test_vmacc_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vv_u8mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf4_tum( @@ -1228,7 +1228,7 @@ vuint8mf4_t test_vmacc_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vx_u8mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf2_tum( @@ -1237,7 +1237,7 @@ vuint8mf4_t test_vmacc_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vv_u8mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf2_tum( @@ -1246,7 +1246,7 @@ vuint8mf2_t test_vmacc_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vx_u8mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m1_tum( @@ -1255,7 +1255,7 @@ vuint8mf2_t test_vmacc_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vv_u8m1_tum(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vv_u8m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m1_tum( @@ -1264,7 +1264,7 @@ vuint8m1_t test_vmacc_vv_u8m1_tum(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vx_u8m1_tum(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vx_u8m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m2_tum( @@ -1273,7 +1273,7 @@ vuint8m1_t test_vmacc_vx_u8m1_tum(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vv_u8m2_tum(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vv_u8m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m2_tum( @@ -1282,7 +1282,7 @@ vuint8m2_t test_vmacc_vv_u8m2_tum(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vx_u8m2_tum(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vx_u8m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m4_tum( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vmacc_vx_u8m2_tum(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vv_u8m4_tum(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vv_u8m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m4_tum( @@ -1300,7 +1300,7 @@ vuint8m4_t test_vmacc_vv_u8m4_tum(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vx_u8m4_tum(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vx_u8m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m8_tum( @@ -1309,7 +1309,7 @@ vuint8m4_t test_vmacc_vx_u8m4_tum(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vv_u8m8_tum(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vv_u8m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m8_tum( @@ -1318,7 +1318,7 @@ vuint8m8_t test_vmacc_vv_u8m8_tum(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vx_u8m8_tum(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vx_u8m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf4_tum( @@ -1327,7 +1327,7 @@ vuint8m8_t test_vmacc_vx_u8m8_tum(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf4_tum( @@ -1336,7 +1336,7 @@ vuint16mf4_t test_vmacc_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf2_tum( @@ -1345,7 +1345,7 @@ vuint16mf4_t test_vmacc_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf2_tum( @@ -1354,7 +1354,7 @@ vuint16mf2_t test_vmacc_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m1_tum( @@ -1363,7 +1363,7 @@ vuint16mf2_t test_vmacc_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vv_u16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m1_tum( @@ -1372,7 +1372,7 @@ vuint16m1_t test_vmacc_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vx_u16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m2_tum( @@ -1381,7 +1381,7 @@ vuint16m1_t test_vmacc_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vv_u16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m2_tum( @@ -1390,7 +1390,7 @@ vuint16m2_t test_vmacc_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vx_u16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m4_tum( @@ -1399,7 +1399,7 @@ vuint16m2_t test_vmacc_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vv_u16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m4_tum( @@ -1408,7 +1408,7 @@ vuint16m4_t test_vmacc_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vx_u16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m8_tum( @@ -1417,7 +1417,7 @@ vuint16m4_t test_vmacc_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vv_u16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m8_tum( @@ -1426,7 +1426,7 @@ vuint16m8_t test_vmacc_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vx_u16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32mf2_tum( @@ -1435,7 +1435,7 @@ vuint16m8_t test_vmacc_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32mf2_tum( @@ -1444,7 +1444,7 @@ vuint32mf2_t test_vmacc_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m1_tum( @@ -1453,7 +1453,7 @@ vuint32mf2_t test_vmacc_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vv_u32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m1_tum( @@ -1462,7 +1462,7 @@ vuint32m1_t test_vmacc_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vx_u32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m2_tum( @@ -1471,7 +1471,7 @@ vuint32m1_t test_vmacc_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vv_u32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m2_tum( @@ -1480,7 +1480,7 @@ vuint32m2_t test_vmacc_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vx_u32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m4_tum( @@ -1489,7 +1489,7 @@ vuint32m2_t test_vmacc_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vv_u32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m4_tum( @@ -1498,7 +1498,7 @@ vuint32m4_t test_vmacc_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vx_u32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m8_tum( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vmacc_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vv_u32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m8_tum( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vmacc_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vx_u32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m1_tum( @@ -1525,7 +1525,7 @@ vuint32m8_t test_vmacc_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vv_u64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m1_tum( @@ -1534,7 +1534,7 @@ vuint64m1_t test_vmacc_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vx_u64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m2_tum( @@ -1543,7 +1543,7 @@ vuint64m1_t test_vmacc_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vv_u64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m2_tum( @@ -1552,7 +1552,7 @@ vuint64m2_t test_vmacc_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vx_u64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m4_tum( @@ -1561,7 +1561,7 @@ vuint64m2_t test_vmacc_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vv_u64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m4_tum( @@ -1570,7 +1570,7 @@ vuint64m4_t test_vmacc_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vx_u64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m8_tum( @@ -1579,7 +1579,7 @@ vuint64m4_t test_vmacc_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vv_u64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m8_tum( @@ -1588,7 +1588,7 @@ vuint64m8_t test_vmacc_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vx_u64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf8_tumu( @@ -1597,7 +1597,7 @@ vuint64m8_t test_vmacc_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vv_i8mf8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf8_tumu( @@ -1606,7 +1606,7 @@ vint8mf8_t test_vmacc_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vx_i8mf8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf4_tumu( @@ -1615,7 +1615,7 @@ vint8mf8_t test_vmacc_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vv_i8mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf4_tumu( @@ -1624,7 +1624,7 @@ vint8mf4_t test_vmacc_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vx_i8mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf2_tumu( @@ -1633,7 +1633,7 @@ vint8mf4_t test_vmacc_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vv_i8mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf2_tumu( @@ -1642,7 +1642,7 @@ vint8mf2_t test_vmacc_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vx_i8mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m1_tumu( @@ -1651,7 +1651,7 @@ vint8mf2_t test_vmacc_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vv_i8m1_tumu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmacc_vv_i8m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m1_tumu( @@ -1660,7 +1660,7 @@ vint8m1_t test_vmacc_vv_i8m1_tumu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vx_i8m1_tumu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmacc_vx_i8m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m2_tumu( @@ -1669,7 +1669,7 @@ vint8m1_t test_vmacc_vx_i8m1_tumu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vv_i8m2_tumu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmacc_vv_i8m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m2_tumu( @@ -1678,7 +1678,7 @@ vint8m2_t test_vmacc_vv_i8m2_tumu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vx_i8m2_tumu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmacc_vx_i8m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m4_tumu( @@ -1687,7 +1687,7 @@ vint8m2_t test_vmacc_vx_i8m2_tumu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vv_i8m4_tumu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmacc_vv_i8m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m4_tumu( @@ -1696,7 +1696,7 @@ vint8m4_t test_vmacc_vv_i8m4_tumu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vx_i8m4_tumu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmacc_vx_i8m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m8_tumu( @@ -1705,7 +1705,7 @@ vint8m4_t test_vmacc_vx_i8m4_tumu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vv_i8m8_tumu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmacc_vv_i8m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m8_tumu( @@ -1714,7 +1714,7 @@ vint8m8_t test_vmacc_vv_i8m8_tumu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vx_i8m8_tumu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmacc_vx_i8m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf4_tumu( @@ -1723,7 +1723,7 @@ vint8m8_t test_vmacc_vx_i8m8_tumu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf4_tumu( @@ -1732,7 +1732,7 @@ vint16mf4_t test_vmacc_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf2_tumu( @@ -1741,7 +1741,7 @@ vint16mf4_t test_vmacc_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf2_tumu( @@ -1750,7 +1750,7 @@ vint16mf2_t test_vmacc_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m1_tumu( @@ -1759,7 +1759,7 @@ vint16mf2_t test_vmacc_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmacc_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m1_tumu( @@ -1768,7 +1768,7 @@ vint16m1_t test_vmacc_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmacc_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m2_tumu( @@ -1777,7 +1777,7 @@ vint16m1_t test_vmacc_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmacc_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m2_tumu( @@ -1786,7 +1786,7 @@ vint16m2_t test_vmacc_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmacc_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m4_tumu( @@ -1795,7 +1795,7 @@ vint16m2_t test_vmacc_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmacc_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m4_tumu( @@ -1804,7 +1804,7 @@ vint16m4_t test_vmacc_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmacc_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m8_tumu( @@ -1813,7 +1813,7 @@ vint16m4_t test_vmacc_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmacc_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m8_tumu( @@ -1822,7 +1822,7 @@ vint16m8_t test_vmacc_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmacc_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32mf2_tumu( @@ -1831,7 +1831,7 @@ vint16m8_t test_vmacc_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32mf2_tumu( @@ -1840,7 +1840,7 @@ vint32mf2_t test_vmacc_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m1_tumu( @@ -1849,7 +1849,7 @@ vint32mf2_t test_vmacc_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmacc_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m1_tumu( @@ -1858,7 +1858,7 @@ vint32m1_t test_vmacc_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmacc_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m2_tumu( @@ -1867,7 +1867,7 @@ vint32m1_t test_vmacc_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmacc_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m2_tumu( @@ -1876,7 +1876,7 @@ vint32m2_t test_vmacc_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmacc_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m4_tumu( @@ -1885,7 +1885,7 @@ vint32m2_t test_vmacc_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmacc_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m4_tumu( @@ -1894,7 +1894,7 @@ vint32m4_t test_vmacc_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmacc_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m8_tumu( @@ -1903,7 +1903,7 @@ vint32m4_t test_vmacc_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmacc_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m8_tumu( @@ -1912,7 +1912,7 @@ vint32m8_t test_vmacc_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmacc_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m1_tumu( @@ -1921,7 +1921,7 @@ vint32m8_t test_vmacc_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmacc_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m1_tumu( @@ -1930,7 +1930,7 @@ vint64m1_t test_vmacc_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmacc_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m2_tumu( @@ -1939,7 +1939,7 @@ vint64m1_t test_vmacc_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmacc_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m2_tumu( @@ -1948,7 +1948,7 @@ vint64m2_t test_vmacc_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmacc_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m4_tumu( @@ -1957,7 +1957,7 @@ vint64m2_t test_vmacc_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmacc_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m4_tumu( @@ -1966,7 +1966,7 @@ vint64m4_t test_vmacc_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmacc_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m8_tumu( @@ -1975,7 +1975,7 @@ vint64m4_t test_vmacc_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmacc_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m8_tumu( @@ -1984,7 +1984,7 @@ vint64m8_t test_vmacc_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmacc_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf8_tumu( @@ -1993,7 +1993,7 @@ vint64m8_t test_vmacc_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vv_u8mf8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf8_tumu( @@ -2002,7 +2002,7 @@ vuint8mf8_t test_vmacc_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vx_u8mf8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf4_tumu( @@ -2011,7 +2011,7 @@ vuint8mf8_t test_vmacc_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vv_u8mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf4_tumu( @@ -2020,7 +2020,7 @@ vuint8mf4_t test_vmacc_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vx_u8mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf2_tumu( @@ -2029,7 +2029,7 @@ vuint8mf4_t test_vmacc_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vv_u8mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf2_tumu( @@ -2038,7 +2038,7 @@ vuint8mf2_t test_vmacc_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vx_u8mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m1_tumu( @@ -2047,7 +2047,7 @@ vuint8mf2_t test_vmacc_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vv_u8m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m1_tumu( @@ -2056,7 +2056,7 @@ vuint8m1_t test_vmacc_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vx_u8m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m2_tumu( @@ -2065,7 +2065,7 @@ vuint8m1_t test_vmacc_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vv_u8m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m2_tumu( @@ -2074,7 +2074,7 @@ vuint8m2_t test_vmacc_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vx_u8m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m4_tumu( @@ -2083,7 +2083,7 @@ vuint8m2_t test_vmacc_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vv_u8m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m4_tumu( @@ -2092,7 +2092,7 @@ vuint8m4_t test_vmacc_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vx_u8m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m8_tumu( @@ -2101,7 +2101,7 @@ vuint8m4_t test_vmacc_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vv_u8m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m8_tumu( @@ -2110,7 +2110,7 @@ vuint8m8_t test_vmacc_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vx_u8m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf4_tumu( @@ -2119,7 +2119,7 @@ vuint8m8_t test_vmacc_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf4_tumu( @@ -2128,7 +2128,7 @@ vuint16mf4_t test_vmacc_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf2_tumu( @@ -2137,7 +2137,7 @@ vuint16mf4_t test_vmacc_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf2_tumu( @@ -2146,7 +2146,7 @@ vuint16mf2_t test_vmacc_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m1_tumu( @@ -2155,7 +2155,7 @@ vuint16mf2_t test_vmacc_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m1_tumu( @@ -2164,7 +2164,7 @@ vuint16m1_t test_vmacc_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m2_tumu( @@ -2173,7 +2173,7 @@ vuint16m1_t test_vmacc_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m2_tumu( @@ -2182,7 +2182,7 @@ vuint16m2_t test_vmacc_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m4_tumu( @@ -2191,7 +2191,7 @@ vuint16m2_t test_vmacc_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m4_tumu( @@ -2200,7 +2200,7 @@ vuint16m4_t test_vmacc_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m8_tumu( @@ -2209,7 +2209,7 @@ vuint16m4_t test_vmacc_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m8_tumu( @@ -2218,7 +2218,7 @@ vuint16m8_t test_vmacc_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32mf2_tumu( @@ -2227,7 +2227,7 @@ vuint16m8_t test_vmacc_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32mf2_tumu( @@ -2236,7 +2236,7 @@ vuint32mf2_t test_vmacc_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m1_tumu( @@ -2245,7 +2245,7 @@ vuint32mf2_t test_vmacc_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m1_tumu( @@ -2254,7 +2254,7 @@ vuint32m1_t test_vmacc_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m2_tumu( @@ -2263,7 +2263,7 @@ vuint32m1_t test_vmacc_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m2_tumu( @@ -2272,7 +2272,7 @@ vuint32m2_t test_vmacc_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m4_tumu( @@ -2281,7 +2281,7 @@ vuint32m2_t test_vmacc_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m4_tumu( @@ -2290,7 +2290,7 @@ vuint32m4_t test_vmacc_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m8_tumu( @@ -2299,7 +2299,7 @@ vuint32m4_t test_vmacc_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m8_tumu( @@ -2308,7 +2308,7 @@ vuint32m8_t test_vmacc_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m1_tumu( @@ -2317,7 +2317,7 @@ vuint32m8_t test_vmacc_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m1_tumu( @@ -2326,7 +2326,7 @@ vuint64m1_t test_vmacc_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m2_tumu( @@ -2335,7 +2335,7 @@ vuint64m1_t test_vmacc_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m2_tumu( @@ -2344,7 +2344,7 @@ vuint64m2_t test_vmacc_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m4_tumu( @@ -2353,7 +2353,7 @@ vuint64m2_t test_vmacc_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m4_tumu( @@ -2362,7 +2362,7 @@ vuint64m4_t test_vmacc_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m8_tumu( @@ -2371,7 +2371,7 @@ vuint64m4_t test_vmacc_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m8_tumu( @@ -2380,7 +2380,7 @@ vuint64m8_t test_vmacc_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf8_mu( @@ -2389,7 +2389,7 @@ vuint64m8_t test_vmacc_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vv_i8mf8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf8_mu( @@ -2398,7 +2398,7 @@ vint8mf8_t test_vmacc_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmacc_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmacc_vx_i8mf8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf4_mu( @@ -2407,7 +2407,7 @@ vint8mf8_t test_vmacc_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vv_i8mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf4_mu( @@ -2416,7 +2416,7 @@ vint8mf4_t test_vmacc_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmacc_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmacc_vx_i8mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8mf2_mu( @@ -2425,7 +2425,7 @@ vint8mf4_t test_vmacc_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vv_i8mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8mf2_mu( @@ -2434,7 +2434,7 @@ vint8mf2_t test_vmacc_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmacc_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmacc_vx_i8mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m1_mu( @@ -2443,7 +2443,7 @@ vint8mf2_t test_vmacc_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vv_i8m1_mu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmacc_vv_i8m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m1_mu( @@ -2452,7 +2452,7 @@ vint8m1_t test_vmacc_vv_i8m1_mu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmacc_vx_i8m1_mu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmacc_vx_i8m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m2_mu( @@ -2461,7 +2461,7 @@ vint8m1_t test_vmacc_vx_i8m1_mu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vv_i8m2_mu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmacc_vv_i8m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m2_mu( @@ -2470,7 +2470,7 @@ vint8m2_t test_vmacc_vv_i8m2_mu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmacc_vx_i8m2_mu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmacc_vx_i8m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m4_mu( @@ -2479,7 +2479,7 @@ vint8m2_t test_vmacc_vx_i8m2_mu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vv_i8m4_mu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmacc_vv_i8m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m4_mu( @@ -2488,7 +2488,7 @@ vint8m4_t test_vmacc_vv_i8m4_mu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmacc_vx_i8m4_mu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmacc_vx_i8m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i8m8_mu( @@ -2497,7 +2497,7 @@ vint8m4_t test_vmacc_vx_i8m4_mu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vv_i8m8_mu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmacc_vv_i8m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i8m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i8m8_mu( @@ -2506,7 +2506,7 @@ vint8m8_t test_vmacc_vv_i8m8_mu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmacc_vx_i8m8_mu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmacc_vx_i8m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i8m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf4_mu( @@ -2515,7 +2515,7 @@ vint8m8_t test_vmacc_vx_i8m8_mu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf4_mu( @@ -2524,7 +2524,7 @@ vint16mf4_t test_vmacc_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmacc_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmacc_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16mf2_mu( @@ -2533,7 +2533,7 @@ vint16mf4_t test_vmacc_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16mf2_mu( @@ -2542,7 +2542,7 @@ vint16mf2_t test_vmacc_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmacc_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmacc_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m1_mu( @@ -2551,7 +2551,7 @@ vint16mf2_t test_vmacc_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmacc_vv_i16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m1_mu( @@ -2560,7 +2560,7 @@ vint16m1_t test_vmacc_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmacc_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmacc_vx_i16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m2_mu( @@ -2569,7 +2569,7 @@ vint16m1_t test_vmacc_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmacc_vv_i16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m2_mu( @@ -2578,7 +2578,7 @@ vint16m2_t test_vmacc_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmacc_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmacc_vx_i16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m4_mu( @@ -2587,7 +2587,7 @@ vint16m2_t test_vmacc_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmacc_vv_i16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m4_mu( @@ -2596,7 +2596,7 @@ vint16m4_t test_vmacc_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmacc_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmacc_vx_i16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i16m8_mu( @@ -2605,7 +2605,7 @@ vint16m4_t test_vmacc_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmacc_vv_i16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i16m8_mu( @@ -2614,7 +2614,7 @@ vint16m8_t test_vmacc_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmacc_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmacc_vx_i16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32mf2_mu( @@ -2623,7 +2623,7 @@ vint16m8_t test_vmacc_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32mf2_mu( @@ -2632,7 +2632,7 @@ vint32mf2_t test_vmacc_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmacc_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmacc_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m1_mu( @@ -2641,7 +2641,7 @@ vint32mf2_t test_vmacc_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmacc_vv_i32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m1_mu( @@ -2650,7 +2650,7 @@ vint32m1_t test_vmacc_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmacc_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmacc_vx_i32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m2_mu( @@ -2659,7 +2659,7 @@ vint32m1_t test_vmacc_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmacc_vv_i32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m2_mu( @@ -2668,7 +2668,7 @@ vint32m2_t test_vmacc_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmacc_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmacc_vx_i32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m4_mu( @@ -2677,7 +2677,7 @@ vint32m2_t test_vmacc_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmacc_vv_i32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m4_mu( @@ -2686,7 +2686,7 @@ vint32m4_t test_vmacc_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmacc_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmacc_vx_i32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i32m8_mu( @@ -2695,7 +2695,7 @@ vint32m4_t test_vmacc_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmacc_vv_i32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i32m8_mu( @@ -2704,7 +2704,7 @@ vint32m8_t test_vmacc_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmacc_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmacc_vx_i32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m1_mu( @@ -2713,7 +2713,7 @@ vint32m8_t test_vmacc_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmacc_vv_i64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m1_mu( @@ -2722,7 +2722,7 @@ vint64m1_t test_vmacc_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmacc_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmacc_vx_i64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m2_mu( @@ -2731,7 +2731,7 @@ vint64m1_t test_vmacc_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmacc_vv_i64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m2_mu( @@ -2740,7 +2740,7 @@ vint64m2_t test_vmacc_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmacc_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmacc_vx_i64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m4_mu( @@ -2749,7 +2749,7 @@ vint64m2_t test_vmacc_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmacc_vv_i64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m4_mu( @@ -2758,7 +2758,7 @@ vint64m4_t test_vmacc_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmacc_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmacc_vx_i64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_i64m8_mu( @@ -2767,7 +2767,7 @@ vint64m4_t test_vmacc_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmacc_vv_i64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_i64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_i64m8_mu( @@ -2776,7 +2776,7 @@ vint64m8_t test_vmacc_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmacc_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmacc_vx_i64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_i64m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf8_mu( @@ -2785,7 +2785,7 @@ vint64m8_t test_vmacc_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vv_u8mf8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf8_mu( @@ -2794,7 +2794,7 @@ vuint8mf8_t test_vmacc_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmacc_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmacc_vx_u8mf8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf4_mu( @@ -2803,7 +2803,7 @@ vuint8mf8_t test_vmacc_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vv_u8mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf4_mu( @@ -2812,7 +2812,7 @@ vuint8mf4_t test_vmacc_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmacc_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmacc_vx_u8mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8mf2_mu( @@ -2821,7 +2821,7 @@ vuint8mf4_t test_vmacc_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vv_u8mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8mf2_mu( @@ -2830,7 +2830,7 @@ vuint8mf2_t test_vmacc_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmacc_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmacc_vx_u8mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m1_mu( @@ -2839,7 +2839,7 @@ vuint8mf2_t test_vmacc_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vv_u8m1_mu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vv_u8m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m1_mu( @@ -2848,7 +2848,7 @@ vuint8m1_t test_vmacc_vv_u8m1_mu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmacc_vx_u8m1_mu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmacc_vx_u8m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m2_mu( @@ -2857,7 +2857,7 @@ vuint8m1_t test_vmacc_vx_u8m1_mu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vv_u8m2_mu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vv_u8m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m2_mu( @@ -2866,7 +2866,7 @@ vuint8m2_t test_vmacc_vv_u8m2_mu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmacc_vx_u8m2_mu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmacc_vx_u8m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m4_mu( @@ -2875,7 +2875,7 @@ vuint8m2_t test_vmacc_vx_u8m2_mu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vv_u8m4_mu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vv_u8m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m4_mu( @@ -2884,7 +2884,7 @@ vuint8m4_t test_vmacc_vv_u8m4_mu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmacc_vx_u8m4_mu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmacc_vx_u8m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u8m8_mu( @@ -2893,7 +2893,7 @@ vuint8m4_t test_vmacc_vx_u8m4_mu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vv_u8m8_mu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vv_u8m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u8m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u8m8_mu( @@ -2902,7 +2902,7 @@ vuint8m8_t test_vmacc_vv_u8m8_mu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmacc_vx_u8m8_mu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmacc_vx_u8m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u8m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf4_mu( @@ -2911,7 +2911,7 @@ vuint8m8_t test_vmacc_vx_u8m8_mu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf4_mu( @@ -2920,7 +2920,7 @@ vuint16mf4_t test_vmacc_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmacc_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmacc_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16mf2_mu( @@ -2929,7 +2929,7 @@ vuint16mf4_t test_vmacc_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16mf2_mu( @@ -2938,7 +2938,7 @@ vuint16mf2_t test_vmacc_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmacc_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmacc_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m1_mu( @@ -2947,7 +2947,7 @@ vuint16mf2_t test_vmacc_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vv_u16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m1_mu( @@ -2956,7 +2956,7 @@ vuint16m1_t test_vmacc_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmacc_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmacc_vx_u16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m2_mu( @@ -2965,7 +2965,7 @@ vuint16m1_t test_vmacc_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vv_u16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m2_mu( @@ -2974,7 +2974,7 @@ vuint16m2_t test_vmacc_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmacc_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmacc_vx_u16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m4_mu( @@ -2983,7 +2983,7 @@ vuint16m2_t test_vmacc_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vv_u16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m4_mu( @@ -2992,7 +2992,7 @@ vuint16m4_t test_vmacc_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmacc_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmacc_vx_u16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u16m8_mu( @@ -3001,7 +3001,7 @@ vuint16m4_t test_vmacc_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vv_u16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u16m8_mu( @@ -3010,7 +3010,7 @@ vuint16m8_t test_vmacc_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmacc_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmacc_vx_u16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32mf2_mu( @@ -3019,7 +3019,7 @@ vuint16m8_t test_vmacc_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32mf2_mu( @@ -3028,7 +3028,7 @@ vuint32mf2_t test_vmacc_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmacc_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmacc_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m1_mu( @@ -3037,7 +3037,7 @@ vuint32mf2_t test_vmacc_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vv_u32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m1_mu( @@ -3046,7 +3046,7 @@ vuint32m1_t test_vmacc_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmacc_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmacc_vx_u32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m2_mu( @@ -3055,7 +3055,7 @@ vuint32m1_t test_vmacc_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vv_u32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m2_mu( @@ -3064,7 +3064,7 @@ vuint32m2_t test_vmacc_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmacc_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmacc_vx_u32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m4_mu( @@ -3073,7 +3073,7 @@ vuint32m2_t test_vmacc_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vv_u32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m4_mu( @@ -3082,7 +3082,7 @@ vuint32m4_t test_vmacc_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmacc_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmacc_vx_u32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u32m8_mu( @@ -3091,7 +3091,7 @@ vuint32m4_t test_vmacc_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vv_u32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u32m8_mu( @@ -3100,7 +3100,7 @@ vuint32m8_t test_vmacc_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmacc_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmacc_vx_u32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m1_mu( @@ -3109,7 +3109,7 @@ vuint32m8_t test_vmacc_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vv_u64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m1_mu( @@ -3118,7 +3118,7 @@ vuint64m1_t test_vmacc_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmacc_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmacc_vx_u64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m2_mu( @@ -3127,7 +3127,7 @@ vuint64m1_t test_vmacc_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vv_u64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m2_mu( @@ -3136,7 +3136,7 @@ vuint64m2_t test_vmacc_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmacc_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmacc_vx_u64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m4_mu( @@ -3145,7 +3145,7 @@ vuint64m2_t test_vmacc_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vv_u64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m4_mu( @@ -3154,7 +3154,7 @@ vuint64m4_t test_vmacc_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmacc_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmacc_vx_u64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vv_u64m8_mu( @@ -3163,7 +3163,7 @@ vuint64m4_t test_vmacc_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vv_u64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmacc_vv_u64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmacc_vx_u64m8_mu( @@ -3172,6 +3172,6 @@ vuint64m8_t test_vmacc_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmacc_vx_u64m8_mu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmacc_vx_u64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmacc_vx_u64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmadd.c index eee4c23b211df062956115231c6e44bb4b467fa5..696a8d54ff89cfc16316f8c73e4c700ba04ed83f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmadd.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vv_i8mf8_tu(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vv_i8mf8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf8_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vmadd_vv_i8mf8_tu(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vx_i8mf8_tu(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vx_i8mf8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf4_tu( @@ -31,7 +31,7 @@ vint8mf8_t test_vmadd_vx_i8mf8_tu(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vv_i8mf4_tu(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vv_i8mf4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf4_tu( @@ -40,7 +40,7 @@ vint8mf4_t test_vmadd_vv_i8mf4_tu(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vx_i8mf4_tu(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vx_i8mf4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf2_tu( @@ -49,7 +49,7 @@ vint8mf4_t test_vmadd_vx_i8mf4_tu(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vv_i8mf2_tu(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vv_i8mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf2_tu( @@ -58,7 +58,7 @@ vint8mf2_t test_vmadd_vv_i8mf2_tu(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vx_i8mf2_tu(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vx_i8mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m1_tu( @@ -67,7 +67,7 @@ vint8mf2_t test_vmadd_vx_i8mf2_tu(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vv_i8m1_tu(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmadd_vv_i8m1_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m1_tu( @@ -76,7 +76,7 @@ vint8m1_t test_vmadd_vv_i8m1_tu(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vx_i8m1_tu(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmadd_vx_i8m1_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m2_tu( @@ -85,7 +85,7 @@ vint8m1_t test_vmadd_vx_i8m1_tu(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vv_i8m2_tu(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmadd_vv_i8m2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m2_tu( @@ -94,7 +94,7 @@ vint8m2_t test_vmadd_vv_i8m2_tu(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vx_i8m2_tu(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmadd_vx_i8m2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m4_tu( @@ -103,7 +103,7 @@ vint8m2_t test_vmadd_vx_i8m2_tu(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vv_i8m4_tu(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmadd_vv_i8m4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m4_tu( @@ -112,7 +112,7 @@ vint8m4_t test_vmadd_vv_i8m4_tu(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vx_i8m4_tu(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmadd_vx_i8m4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m8_tu( @@ -121,7 +121,7 @@ vint8m4_t test_vmadd_vx_i8m4_tu(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vv_i8m8_tu(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmadd_vv_i8m8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m8_tu( @@ -130,7 +130,7 @@ vint8m8_t test_vmadd_vv_i8m8_tu(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vx_i8m8_tu(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmadd_vx_i8m8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf4_tu( @@ -139,7 +139,7 @@ vint8m8_t test_vmadd_vx_i8m8_tu(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vv_i16mf4_tu(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vv_i16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf4_tu( @@ -148,7 +148,7 @@ vint16mf4_t test_vmadd_vv_i16mf4_tu(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vx_i16mf4_tu(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vx_i16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf2_tu( @@ -157,7 +157,7 @@ vint16mf4_t test_vmadd_vx_i16mf4_tu(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vv_i16mf2_tu(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vv_i16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf2_tu( @@ -166,7 +166,7 @@ vint16mf2_t test_vmadd_vv_i16mf2_tu(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vx_i16mf2_tu(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vx_i16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m1_tu( @@ -175,7 +175,7 @@ vint16mf2_t test_vmadd_vx_i16mf2_tu(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vv_i16m1_tu(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmadd_vv_i16m1_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m1_tu( @@ -184,7 +184,7 @@ vint16m1_t test_vmadd_vv_i16m1_tu(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vx_i16m1_tu(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmadd_vx_i16m1_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m2_tu( @@ -193,7 +193,7 @@ vint16m1_t test_vmadd_vx_i16m1_tu(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vv_i16m2_tu(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmadd_vv_i16m2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m2_tu( @@ -202,7 +202,7 @@ vint16m2_t test_vmadd_vv_i16m2_tu(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vx_i16m2_tu(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmadd_vx_i16m2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m4_tu( @@ -211,7 +211,7 @@ vint16m2_t test_vmadd_vx_i16m2_tu(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vv_i16m4_tu(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmadd_vv_i16m4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m4_tu( @@ -220,7 +220,7 @@ vint16m4_t test_vmadd_vv_i16m4_tu(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vx_i16m4_tu(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmadd_vx_i16m4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m8_tu( @@ -229,7 +229,7 @@ vint16m4_t test_vmadd_vx_i16m4_tu(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vv_i16m8_tu(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmadd_vv_i16m8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m8_tu( @@ -238,7 +238,7 @@ vint16m8_t test_vmadd_vv_i16m8_tu(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vx_i16m8_tu(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmadd_vx_i16m8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32mf2_tu( @@ -247,7 +247,7 @@ vint16m8_t test_vmadd_vx_i16m8_tu(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vv_i32mf2_tu(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vv_i32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32mf2_tu( @@ -256,7 +256,7 @@ vint32mf2_t test_vmadd_vv_i32mf2_tu(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vx_i32mf2_tu(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vx_i32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vmadd_vx_i32mf2_tu(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vv_i32m1_tu(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmadd_vv_i32m1_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m1_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vmadd_vv_i32m1_tu(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vx_i32m1_tu(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmadd_vx_i32m1_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vmadd_vx_i32m1_tu(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vv_i32m2_tu(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmadd_vv_i32m2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m2_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vmadd_vv_i32m2_tu(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vx_i32m2_tu(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmadd_vx_i32m2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m4_tu( @@ -301,7 +301,7 @@ vint32m2_t test_vmadd_vx_i32m2_tu(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vv_i32m4_tu(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmadd_vv_i32m4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m4_tu( @@ -310,7 +310,7 @@ vint32m4_t test_vmadd_vv_i32m4_tu(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vx_i32m4_tu(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmadd_vx_i32m4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m8_tu( @@ -319,7 +319,7 @@ vint32m4_t test_vmadd_vx_i32m4_tu(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vv_i32m8_tu(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmadd_vv_i32m8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m8_tu( @@ -328,7 +328,7 @@ vint32m8_t test_vmadd_vv_i32m8_tu(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vx_i32m8_tu(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmadd_vx_i32m8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m1_tu( @@ -337,7 +337,7 @@ vint32m8_t test_vmadd_vx_i32m8_tu(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vv_i64m1_tu(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmadd_vv_i64m1_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m1_tu( @@ -346,7 +346,7 @@ vint64m1_t test_vmadd_vv_i64m1_tu(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vx_i64m1_tu(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmadd_vx_i64m1_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m2_tu( @@ -355,7 +355,7 @@ vint64m1_t test_vmadd_vx_i64m1_tu(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vv_i64m2_tu(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmadd_vv_i64m2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m2_tu( @@ -364,7 +364,7 @@ vint64m2_t test_vmadd_vv_i64m2_tu(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vx_i64m2_tu(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmadd_vx_i64m2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m4_tu( @@ -373,7 +373,7 @@ vint64m2_t test_vmadd_vx_i64m2_tu(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vv_i64m4_tu(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmadd_vv_i64m4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m4_tu( @@ -382,7 +382,7 @@ vint64m4_t test_vmadd_vv_i64m4_tu(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vx_i64m4_tu(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmadd_vx_i64m4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m8_tu( @@ -391,7 +391,7 @@ vint64m4_t test_vmadd_vx_i64m4_tu(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vv_i64m8_tu(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmadd_vv_i64m8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m8_tu( @@ -400,7 +400,7 @@ vint64m8_t test_vmadd_vv_i64m8_tu(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vx_i64m8_tu(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmadd_vx_i64m8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf8_tu( @@ -409,7 +409,7 @@ vint64m8_t test_vmadd_vx_i64m8_tu(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vv_u8mf8_tu(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vv_u8mf8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf8_tu( @@ -418,7 +418,7 @@ vuint8mf8_t test_vmadd_vv_u8mf8_tu(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vx_u8mf8_tu(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vx_u8mf8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf4_tu( @@ -427,7 +427,7 @@ vuint8mf8_t test_vmadd_vx_u8mf8_tu(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vv_u8mf4_tu(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vv_u8mf4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf4_tu( @@ -436,7 +436,7 @@ vuint8mf4_t test_vmadd_vv_u8mf4_tu(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vx_u8mf4_tu(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vx_u8mf4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf2_tu( @@ -445,7 +445,7 @@ vuint8mf4_t test_vmadd_vx_u8mf4_tu(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vv_u8mf2_tu(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vv_u8mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf2_tu( @@ -454,7 +454,7 @@ vuint8mf2_t test_vmadd_vv_u8mf2_tu(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vx_u8mf2_tu(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vx_u8mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m1_tu( @@ -463,7 +463,7 @@ vuint8mf2_t test_vmadd_vx_u8mf2_tu(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vv_u8m1_tu(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vv_u8m1_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m1_tu( @@ -472,7 +472,7 @@ vuint8m1_t test_vmadd_vv_u8m1_tu(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vx_u8m1_tu(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vx_u8m1_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m2_tu( @@ -481,7 +481,7 @@ vuint8m1_t test_vmadd_vx_u8m1_tu(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vv_u8m2_tu(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vv_u8m2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m2_tu( @@ -490,7 +490,7 @@ vuint8m2_t test_vmadd_vv_u8m2_tu(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vx_u8m2_tu(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vx_u8m2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m4_tu( @@ -499,7 +499,7 @@ vuint8m2_t test_vmadd_vx_u8m2_tu(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vv_u8m4_tu(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vv_u8m4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m4_tu( @@ -508,7 +508,7 @@ vuint8m4_t test_vmadd_vv_u8m4_tu(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vx_u8m4_tu(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vx_u8m4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m8_tu( @@ -517,7 +517,7 @@ vuint8m4_t test_vmadd_vx_u8m4_tu(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vv_u8m8_tu(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vv_u8m8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m8_tu( @@ -526,7 +526,7 @@ vuint8m8_t test_vmadd_vv_u8m8_tu(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vx_u8m8_tu(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vx_u8m8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf4_tu( @@ -535,7 +535,7 @@ vuint8m8_t test_vmadd_vx_u8m8_tu(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vv_u16mf4_tu(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vv_u16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf4_tu( @@ -544,7 +544,7 @@ vuint16mf4_t test_vmadd_vv_u16mf4_tu(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vx_u16mf4_tu(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vx_u16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf2_tu( @@ -553,7 +553,7 @@ vuint16mf4_t test_vmadd_vx_u16mf4_tu(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vv_u16mf2_tu(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vv_u16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf2_tu( @@ -562,7 +562,7 @@ vuint16mf2_t test_vmadd_vv_u16mf2_tu(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vx_u16mf2_tu(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vx_u16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m1_tu( @@ -571,7 +571,7 @@ vuint16mf2_t test_vmadd_vx_u16mf2_tu(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vv_u16m1_tu(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vv_u16m1_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m1_tu( @@ -580,7 +580,7 @@ vuint16m1_t test_vmadd_vv_u16m1_tu(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vx_u16m1_tu(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vx_u16m1_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m2_tu( @@ -589,7 +589,7 @@ vuint16m1_t test_vmadd_vx_u16m1_tu(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vv_u16m2_tu(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vv_u16m2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m2_tu( @@ -598,7 +598,7 @@ vuint16m2_t test_vmadd_vv_u16m2_tu(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vx_u16m2_tu(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vx_u16m2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m4_tu( @@ -607,7 +607,7 @@ vuint16m2_t test_vmadd_vx_u16m2_tu(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vv_u16m4_tu(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vv_u16m4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m4_tu( @@ -616,7 +616,7 @@ vuint16m4_t test_vmadd_vv_u16m4_tu(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vx_u16m4_tu(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vx_u16m4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m8_tu( @@ -625,7 +625,7 @@ vuint16m4_t test_vmadd_vx_u16m4_tu(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vv_u16m8_tu(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vv_u16m8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m8_tu( @@ -634,7 +634,7 @@ vuint16m8_t test_vmadd_vv_u16m8_tu(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vx_u16m8_tu(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vx_u16m8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32mf2_tu( @@ -643,7 +643,7 @@ vuint16m8_t test_vmadd_vx_u16m8_tu(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vv_u32mf2_tu(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vv_u32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32mf2_tu( @@ -652,7 +652,7 @@ vuint32mf2_t test_vmadd_vv_u32mf2_tu(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vx_u32mf2_tu(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vx_u32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m1_tu( @@ -661,7 +661,7 @@ vuint32mf2_t test_vmadd_vx_u32mf2_tu(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vv_u32m1_tu(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vv_u32m1_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m1_tu( @@ -670,7 +670,7 @@ vuint32m1_t test_vmadd_vv_u32m1_tu(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vx_u32m1_tu(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vx_u32m1_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m2_tu( @@ -679,7 +679,7 @@ vuint32m1_t test_vmadd_vx_u32m1_tu(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vv_u32m2_tu(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vv_u32m2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m2_tu( @@ -688,7 +688,7 @@ vuint32m2_t test_vmadd_vv_u32m2_tu(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vx_u32m2_tu(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vx_u32m2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m4_tu( @@ -697,7 +697,7 @@ vuint32m2_t test_vmadd_vx_u32m2_tu(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vv_u32m4_tu(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vv_u32m4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m4_tu( @@ -706,7 +706,7 @@ vuint32m4_t test_vmadd_vv_u32m4_tu(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vx_u32m4_tu(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vx_u32m4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m8_tu( @@ -715,7 +715,7 @@ vuint32m4_t test_vmadd_vx_u32m4_tu(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vv_u32m8_tu(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vv_u32m8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m8_tu( @@ -724,7 +724,7 @@ vuint32m8_t test_vmadd_vv_u32m8_tu(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vx_u32m8_tu(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vx_u32m8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m1_tu( @@ -733,7 +733,7 @@ vuint32m8_t test_vmadd_vx_u32m8_tu(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vv_u64m1_tu(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vv_u64m1_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m1_tu( @@ -742,7 +742,7 @@ vuint64m1_t test_vmadd_vv_u64m1_tu(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vx_u64m1_tu(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vx_u64m1_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m2_tu( @@ -751,7 +751,7 @@ vuint64m1_t test_vmadd_vx_u64m1_tu(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vv_u64m2_tu(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vv_u64m2_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m2_tu( @@ -760,7 +760,7 @@ vuint64m2_t test_vmadd_vv_u64m2_tu(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vx_u64m2_tu(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vx_u64m2_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m4_tu( @@ -769,7 +769,7 @@ vuint64m2_t test_vmadd_vx_u64m2_tu(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vv_u64m4_tu(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vv_u64m4_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m4_tu( @@ -778,7 +778,7 @@ vuint64m4_t test_vmadd_vv_u64m4_tu(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vx_u64m4_tu(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vx_u64m4_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m8_tu( @@ -787,7 +787,7 @@ vuint64m4_t test_vmadd_vx_u64m4_tu(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vv_u64m8_tu(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vv_u64m8_tu(vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m8_tu( @@ -796,7 +796,7 @@ vuint64m8_t test_vmadd_vv_u64m8_tu(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vx_u64m8_tu(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vx_u64m8_tu(vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf8_tum( @@ -805,7 +805,7 @@ vuint64m8_t test_vmadd_vx_u64m8_tu(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vv_i8mf8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf8_tum( @@ -814,7 +814,7 @@ vint8mf8_t test_vmadd_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vx_i8mf8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf4_tum( @@ -823,7 +823,7 @@ vint8mf8_t test_vmadd_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vv_i8mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf4_tum( @@ -832,7 +832,7 @@ vint8mf4_t test_vmadd_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vx_i8mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf2_tum( @@ -841,7 +841,7 @@ vint8mf4_t test_vmadd_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vv_i8mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf2_tum( @@ -850,7 +850,7 @@ vint8mf2_t test_vmadd_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vx_i8mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m1_tum( @@ -859,7 +859,7 @@ vint8mf2_t test_vmadd_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vv_i8m1_tum(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmadd_vv_i8m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m1_tum( @@ -868,7 +868,7 @@ vint8m1_t test_vmadd_vv_i8m1_tum(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vx_i8m1_tum(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmadd_vx_i8m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m2_tum( @@ -877,7 +877,7 @@ vint8m1_t test_vmadd_vx_i8m1_tum(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vv_i8m2_tum(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmadd_vv_i8m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m2_tum( @@ -886,7 +886,7 @@ vint8m2_t test_vmadd_vv_i8m2_tum(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vx_i8m2_tum(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmadd_vx_i8m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m4_tum( @@ -895,7 +895,7 @@ vint8m2_t test_vmadd_vx_i8m2_tum(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vv_i8m4_tum(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmadd_vv_i8m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m4_tum( @@ -904,7 +904,7 @@ vint8m4_t test_vmadd_vv_i8m4_tum(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vx_i8m4_tum(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmadd_vx_i8m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m8_tum( @@ -913,7 +913,7 @@ vint8m4_t test_vmadd_vx_i8m4_tum(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vv_i8m8_tum(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmadd_vv_i8m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m8_tum( @@ -922,7 +922,7 @@ vint8m8_t test_vmadd_vv_i8m8_tum(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vx_i8m8_tum(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmadd_vx_i8m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf4_tum( @@ -931,7 +931,7 @@ vint8m8_t test_vmadd_vx_i8m8_tum(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf4_tum( @@ -940,7 +940,7 @@ vint16mf4_t test_vmadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf2_tum( @@ -949,7 +949,7 @@ vint16mf4_t test_vmadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf2_tum( @@ -958,7 +958,7 @@ vint16mf2_t test_vmadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m1_tum( @@ -967,7 +967,7 @@ vint16mf2_t test_vmadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmadd_vv_i16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m1_tum( @@ -976,7 +976,7 @@ vint16m1_t test_vmadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmadd_vx_i16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m2_tum( @@ -985,7 +985,7 @@ vint16m1_t test_vmadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmadd_vv_i16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m2_tum( @@ -994,7 +994,7 @@ vint16m2_t test_vmadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmadd_vx_i16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m4_tum( @@ -1003,7 +1003,7 @@ vint16m2_t test_vmadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmadd_vv_i16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m4_tum( @@ -1012,7 +1012,7 @@ vint16m4_t test_vmadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmadd_vx_i16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m8_tum( @@ -1021,7 +1021,7 @@ vint16m4_t test_vmadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmadd_vv_i16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m8_tum( @@ -1030,7 +1030,7 @@ vint16m8_t test_vmadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmadd_vx_i16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32mf2_tum( @@ -1039,7 +1039,7 @@ vint16m8_t test_vmadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32mf2_tum( @@ -1048,7 +1048,7 @@ vint32mf2_t test_vmadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m1_tum( @@ -1057,7 +1057,7 @@ vint32mf2_t test_vmadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmadd_vv_i32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m1_tum( @@ -1066,7 +1066,7 @@ vint32m1_t test_vmadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmadd_vx_i32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m2_tum( @@ -1075,7 +1075,7 @@ vint32m1_t test_vmadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmadd_vv_i32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m2_tum( @@ -1084,7 +1084,7 @@ vint32m2_t test_vmadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmadd_vx_i32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m4_tum( @@ -1093,7 +1093,7 @@ vint32m2_t test_vmadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmadd_vv_i32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m4_tum( @@ -1102,7 +1102,7 @@ vint32m4_t test_vmadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmadd_vx_i32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m8_tum( @@ -1111,7 +1111,7 @@ vint32m4_t test_vmadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmadd_vv_i32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m8_tum( @@ -1120,7 +1120,7 @@ vint32m8_t test_vmadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmadd_vx_i32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m1_tum( @@ -1129,7 +1129,7 @@ vint32m8_t test_vmadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmadd_vv_i64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m1_tum( @@ -1138,7 +1138,7 @@ vint64m1_t test_vmadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmadd_vx_i64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m2_tum( @@ -1147,7 +1147,7 @@ vint64m1_t test_vmadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmadd_vv_i64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m2_tum( @@ -1156,7 +1156,7 @@ vint64m2_t test_vmadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmadd_vx_i64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m4_tum( @@ -1165,7 +1165,7 @@ vint64m2_t test_vmadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmadd_vv_i64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m4_tum( @@ -1174,7 +1174,7 @@ vint64m4_t test_vmadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmadd_vx_i64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m8_tum( @@ -1183,7 +1183,7 @@ vint64m4_t test_vmadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmadd_vv_i64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m8_tum( @@ -1192,7 +1192,7 @@ vint64m8_t test_vmadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmadd_vx_i64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf8_tum( @@ -1201,7 +1201,7 @@ vint64m8_t test_vmadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vv_u8mf8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf8_tum( @@ -1210,7 +1210,7 @@ vuint8mf8_t test_vmadd_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vx_u8mf8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf4_tum( @@ -1219,7 +1219,7 @@ vuint8mf8_t test_vmadd_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vv_u8mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf4_tum( @@ -1228,7 +1228,7 @@ vuint8mf4_t test_vmadd_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vx_u8mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf2_tum( @@ -1237,7 +1237,7 @@ vuint8mf4_t test_vmadd_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vv_u8mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf2_tum( @@ -1246,7 +1246,7 @@ vuint8mf2_t test_vmadd_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vx_u8mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m1_tum( @@ -1255,7 +1255,7 @@ vuint8mf2_t test_vmadd_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vv_u8m1_tum(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vv_u8m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m1_tum( @@ -1264,7 +1264,7 @@ vuint8m1_t test_vmadd_vv_u8m1_tum(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vx_u8m1_tum(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vx_u8m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m2_tum( @@ -1273,7 +1273,7 @@ vuint8m1_t test_vmadd_vx_u8m1_tum(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vv_u8m2_tum(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vv_u8m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m2_tum( @@ -1282,7 +1282,7 @@ vuint8m2_t test_vmadd_vv_u8m2_tum(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vx_u8m2_tum(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vx_u8m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m4_tum( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vmadd_vx_u8m2_tum(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vv_u8m4_tum(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vv_u8m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m4_tum( @@ -1300,7 +1300,7 @@ vuint8m4_t test_vmadd_vv_u8m4_tum(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vx_u8m4_tum(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vx_u8m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m8_tum( @@ -1309,7 +1309,7 @@ vuint8m4_t test_vmadd_vx_u8m4_tum(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vv_u8m8_tum(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vv_u8m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m8_tum( @@ -1318,7 +1318,7 @@ vuint8m8_t test_vmadd_vv_u8m8_tum(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vx_u8m8_tum(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vx_u8m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf4_tum( @@ -1327,7 +1327,7 @@ vuint8m8_t test_vmadd_vx_u8m8_tum(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf4_tum( @@ -1336,7 +1336,7 @@ vuint16mf4_t test_vmadd_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf2_tum( @@ -1345,7 +1345,7 @@ vuint16mf4_t test_vmadd_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf2_tum( @@ -1354,7 +1354,7 @@ vuint16mf2_t test_vmadd_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m1_tum( @@ -1363,7 +1363,7 @@ vuint16mf2_t test_vmadd_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vv_u16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m1_tum( @@ -1372,7 +1372,7 @@ vuint16m1_t test_vmadd_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vx_u16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m2_tum( @@ -1381,7 +1381,7 @@ vuint16m1_t test_vmadd_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vv_u16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m2_tum( @@ -1390,7 +1390,7 @@ vuint16m2_t test_vmadd_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vx_u16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m4_tum( @@ -1399,7 +1399,7 @@ vuint16m2_t test_vmadd_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vv_u16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m4_tum( @@ -1408,7 +1408,7 @@ vuint16m4_t test_vmadd_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vx_u16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m8_tum( @@ -1417,7 +1417,7 @@ vuint16m4_t test_vmadd_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vv_u16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m8_tum( @@ -1426,7 +1426,7 @@ vuint16m8_t test_vmadd_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vx_u16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32mf2_tum( @@ -1435,7 +1435,7 @@ vuint16m8_t test_vmadd_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32mf2_tum( @@ -1444,7 +1444,7 @@ vuint32mf2_t test_vmadd_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m1_tum( @@ -1453,7 +1453,7 @@ vuint32mf2_t test_vmadd_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vv_u32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m1_tum( @@ -1462,7 +1462,7 @@ vuint32m1_t test_vmadd_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vx_u32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m2_tum( @@ -1471,7 +1471,7 @@ vuint32m1_t test_vmadd_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vv_u32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m2_tum( @@ -1480,7 +1480,7 @@ vuint32m2_t test_vmadd_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vx_u32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m4_tum( @@ -1489,7 +1489,7 @@ vuint32m2_t test_vmadd_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vv_u32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m4_tum( @@ -1498,7 +1498,7 @@ vuint32m4_t test_vmadd_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vx_u32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m8_tum( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vmadd_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vv_u32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m8_tum( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vmadd_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vx_u32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m1_tum( @@ -1525,7 +1525,7 @@ vuint32m8_t test_vmadd_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vv_u64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m1_tum( @@ -1534,7 +1534,7 @@ vuint64m1_t test_vmadd_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vx_u64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m2_tum( @@ -1543,7 +1543,7 @@ vuint64m1_t test_vmadd_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vv_u64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m2_tum( @@ -1552,7 +1552,7 @@ vuint64m2_t test_vmadd_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vx_u64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m4_tum( @@ -1561,7 +1561,7 @@ vuint64m2_t test_vmadd_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vv_u64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m4_tum( @@ -1570,7 +1570,7 @@ vuint64m4_t test_vmadd_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vx_u64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m8_tum( @@ -1579,7 +1579,7 @@ vuint64m4_t test_vmadd_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vv_u64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m8_tum( @@ -1588,7 +1588,7 @@ vuint64m8_t test_vmadd_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vx_u64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf8_tumu( @@ -1597,7 +1597,7 @@ vuint64m8_t test_vmadd_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vv_i8mf8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf8_tumu( @@ -1606,7 +1606,7 @@ vint8mf8_t test_vmadd_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vx_i8mf8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf4_tumu( @@ -1615,7 +1615,7 @@ vint8mf8_t test_vmadd_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vv_i8mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf4_tumu( @@ -1624,7 +1624,7 @@ vint8mf4_t test_vmadd_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vx_i8mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf2_tumu( @@ -1633,7 +1633,7 @@ vint8mf4_t test_vmadd_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vv_i8mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf2_tumu( @@ -1642,7 +1642,7 @@ vint8mf2_t test_vmadd_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vx_i8mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m1_tumu( @@ -1651,7 +1651,7 @@ vint8mf2_t test_vmadd_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vv_i8m1_tumu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmadd_vv_i8m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m1_tumu( @@ -1660,7 +1660,7 @@ vint8m1_t test_vmadd_vv_i8m1_tumu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vx_i8m1_tumu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmadd_vx_i8m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m2_tumu( @@ -1669,7 +1669,7 @@ vint8m1_t test_vmadd_vx_i8m1_tumu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vv_i8m2_tumu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmadd_vv_i8m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m2_tumu( @@ -1678,7 +1678,7 @@ vint8m2_t test_vmadd_vv_i8m2_tumu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vx_i8m2_tumu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmadd_vx_i8m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m4_tumu( @@ -1687,7 +1687,7 @@ vint8m2_t test_vmadd_vx_i8m2_tumu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vv_i8m4_tumu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmadd_vv_i8m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m4_tumu( @@ -1696,7 +1696,7 @@ vint8m4_t test_vmadd_vv_i8m4_tumu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vx_i8m4_tumu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmadd_vx_i8m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m8_tumu( @@ -1705,7 +1705,7 @@ vint8m4_t test_vmadd_vx_i8m4_tumu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vv_i8m8_tumu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmadd_vv_i8m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m8_tumu( @@ -1714,7 +1714,7 @@ vint8m8_t test_vmadd_vv_i8m8_tumu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vx_i8m8_tumu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmadd_vx_i8m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf4_tumu( @@ -1723,7 +1723,7 @@ vint8m8_t test_vmadd_vx_i8m8_tumu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf4_tumu( @@ -1732,7 +1732,7 @@ vint16mf4_t test_vmadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf2_tumu( @@ -1741,7 +1741,7 @@ vint16mf4_t test_vmadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf2_tumu( @@ -1750,7 +1750,7 @@ vint16mf2_t test_vmadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m1_tumu( @@ -1759,7 +1759,7 @@ vint16mf2_t test_vmadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmadd_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m1_tumu( @@ -1768,7 +1768,7 @@ vint16m1_t test_vmadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmadd_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m2_tumu( @@ -1777,7 +1777,7 @@ vint16m1_t test_vmadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmadd_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m2_tumu( @@ -1786,7 +1786,7 @@ vint16m2_t test_vmadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmadd_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m4_tumu( @@ -1795,7 +1795,7 @@ vint16m2_t test_vmadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmadd_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m4_tumu( @@ -1804,7 +1804,7 @@ vint16m4_t test_vmadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmadd_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m8_tumu( @@ -1813,7 +1813,7 @@ vint16m4_t test_vmadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmadd_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m8_tumu( @@ -1822,7 +1822,7 @@ vint16m8_t test_vmadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmadd_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32mf2_tumu( @@ -1831,7 +1831,7 @@ vint16m8_t test_vmadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32mf2_tumu( @@ -1840,7 +1840,7 @@ vint32mf2_t test_vmadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m1_tumu( @@ -1849,7 +1849,7 @@ vint32mf2_t test_vmadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmadd_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m1_tumu( @@ -1858,7 +1858,7 @@ vint32m1_t test_vmadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmadd_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m2_tumu( @@ -1867,7 +1867,7 @@ vint32m1_t test_vmadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmadd_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m2_tumu( @@ -1876,7 +1876,7 @@ vint32m2_t test_vmadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmadd_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m4_tumu( @@ -1885,7 +1885,7 @@ vint32m2_t test_vmadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmadd_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m4_tumu( @@ -1894,7 +1894,7 @@ vint32m4_t test_vmadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmadd_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m8_tumu( @@ -1903,7 +1903,7 @@ vint32m4_t test_vmadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmadd_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m8_tumu( @@ -1912,7 +1912,7 @@ vint32m8_t test_vmadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmadd_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m1_tumu( @@ -1921,7 +1921,7 @@ vint32m8_t test_vmadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmadd_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m1_tumu( @@ -1930,7 +1930,7 @@ vint64m1_t test_vmadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmadd_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m2_tumu( @@ -1939,7 +1939,7 @@ vint64m1_t test_vmadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmadd_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m2_tumu( @@ -1948,7 +1948,7 @@ vint64m2_t test_vmadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmadd_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m4_tumu( @@ -1957,7 +1957,7 @@ vint64m2_t test_vmadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmadd_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m4_tumu( @@ -1966,7 +1966,7 @@ vint64m4_t test_vmadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmadd_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m8_tumu( @@ -1975,7 +1975,7 @@ vint64m4_t test_vmadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmadd_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m8_tumu( @@ -1984,7 +1984,7 @@ vint64m8_t test_vmadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmadd_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf8_tumu( @@ -1993,7 +1993,7 @@ vint64m8_t test_vmadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vv_u8mf8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf8_tumu( @@ -2002,7 +2002,7 @@ vuint8mf8_t test_vmadd_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vx_u8mf8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf4_tumu( @@ -2011,7 +2011,7 @@ vuint8mf8_t test_vmadd_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vv_u8mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf4_tumu( @@ -2020,7 +2020,7 @@ vuint8mf4_t test_vmadd_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vx_u8mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf2_tumu( @@ -2029,7 +2029,7 @@ vuint8mf4_t test_vmadd_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vv_u8mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf2_tumu( @@ -2038,7 +2038,7 @@ vuint8mf2_t test_vmadd_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vx_u8mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m1_tumu( @@ -2047,7 +2047,7 @@ vuint8mf2_t test_vmadd_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vv_u8m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m1_tumu( @@ -2056,7 +2056,7 @@ vuint8m1_t test_vmadd_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vx_u8m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m2_tumu( @@ -2065,7 +2065,7 @@ vuint8m1_t test_vmadd_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vv_u8m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m2_tumu( @@ -2074,7 +2074,7 @@ vuint8m2_t test_vmadd_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vx_u8m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m4_tumu( @@ -2083,7 +2083,7 @@ vuint8m2_t test_vmadd_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vv_u8m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m4_tumu( @@ -2092,7 +2092,7 @@ vuint8m4_t test_vmadd_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vx_u8m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m8_tumu( @@ -2101,7 +2101,7 @@ vuint8m4_t test_vmadd_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vv_u8m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m8_tumu( @@ -2110,7 +2110,7 @@ vuint8m8_t test_vmadd_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vx_u8m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf4_tumu( @@ -2119,7 +2119,7 @@ vuint8m8_t test_vmadd_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf4_tumu( @@ -2128,7 +2128,7 @@ vuint16mf4_t test_vmadd_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf2_tumu( @@ -2137,7 +2137,7 @@ vuint16mf4_t test_vmadd_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf2_tumu( @@ -2146,7 +2146,7 @@ vuint16mf2_t test_vmadd_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m1_tumu( @@ -2155,7 +2155,7 @@ vuint16mf2_t test_vmadd_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m1_tumu( @@ -2164,7 +2164,7 @@ vuint16m1_t test_vmadd_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m2_tumu( @@ -2173,7 +2173,7 @@ vuint16m1_t test_vmadd_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m2_tumu( @@ -2182,7 +2182,7 @@ vuint16m2_t test_vmadd_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m4_tumu( @@ -2191,7 +2191,7 @@ vuint16m2_t test_vmadd_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m4_tumu( @@ -2200,7 +2200,7 @@ vuint16m4_t test_vmadd_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m8_tumu( @@ -2209,7 +2209,7 @@ vuint16m4_t test_vmadd_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m8_tumu( @@ -2218,7 +2218,7 @@ vuint16m8_t test_vmadd_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32mf2_tumu( @@ -2227,7 +2227,7 @@ vuint16m8_t test_vmadd_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32mf2_tumu( @@ -2236,7 +2236,7 @@ vuint32mf2_t test_vmadd_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m1_tumu( @@ -2245,7 +2245,7 @@ vuint32mf2_t test_vmadd_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m1_tumu( @@ -2254,7 +2254,7 @@ vuint32m1_t test_vmadd_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m2_tumu( @@ -2263,7 +2263,7 @@ vuint32m1_t test_vmadd_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m2_tumu( @@ -2272,7 +2272,7 @@ vuint32m2_t test_vmadd_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m4_tumu( @@ -2281,7 +2281,7 @@ vuint32m2_t test_vmadd_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m4_tumu( @@ -2290,7 +2290,7 @@ vuint32m4_t test_vmadd_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m8_tumu( @@ -2299,7 +2299,7 @@ vuint32m4_t test_vmadd_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m8_tumu( @@ -2308,7 +2308,7 @@ vuint32m8_t test_vmadd_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m1_tumu( @@ -2317,7 +2317,7 @@ vuint32m8_t test_vmadd_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m1_tumu( @@ -2326,7 +2326,7 @@ vuint64m1_t test_vmadd_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m2_tumu( @@ -2335,7 +2335,7 @@ vuint64m1_t test_vmadd_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m2_tumu( @@ -2344,7 +2344,7 @@ vuint64m2_t test_vmadd_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m4_tumu( @@ -2353,7 +2353,7 @@ vuint64m2_t test_vmadd_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m4_tumu( @@ -2362,7 +2362,7 @@ vuint64m4_t test_vmadd_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m8_tumu( @@ -2371,7 +2371,7 @@ vuint64m4_t test_vmadd_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m8_tumu( @@ -2380,7 +2380,7 @@ vuint64m8_t test_vmadd_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf8_mu( @@ -2389,7 +2389,7 @@ vuint64m8_t test_vmadd_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vv_i8mf8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf8_mu( @@ -2398,7 +2398,7 @@ vint8mf8_t test_vmadd_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmadd_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vmadd_vx_i8mf8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf4_mu( @@ -2407,7 +2407,7 @@ vint8mf8_t test_vmadd_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vv_i8mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf4_mu( @@ -2416,7 +2416,7 @@ vint8mf4_t test_vmadd_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmadd_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vmadd_vx_i8mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8mf2_mu( @@ -2425,7 +2425,7 @@ vint8mf4_t test_vmadd_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vv_i8mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8mf2_mu( @@ -2434,7 +2434,7 @@ vint8mf2_t test_vmadd_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmadd_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vmadd_vx_i8mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m1_mu( @@ -2443,7 +2443,7 @@ vint8mf2_t test_vmadd_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vv_i8m1_mu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vmadd_vv_i8m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m1_mu( @@ -2452,7 +2452,7 @@ vint8m1_t test_vmadd_vv_i8m1_mu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmadd_vx_i8m1_mu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vmadd_vx_i8m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m2_mu( @@ -2461,7 +2461,7 @@ vint8m1_t test_vmadd_vx_i8m1_mu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vv_i8m2_mu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vmadd_vv_i8m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m2_mu( @@ -2470,7 +2470,7 @@ vint8m2_t test_vmadd_vv_i8m2_mu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmadd_vx_i8m2_mu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vmadd_vx_i8m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m4_mu( @@ -2479,7 +2479,7 @@ vint8m2_t test_vmadd_vx_i8m2_mu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vv_i8m4_mu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vmadd_vv_i8m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m4_mu( @@ -2488,7 +2488,7 @@ vint8m4_t test_vmadd_vv_i8m4_mu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmadd_vx_i8m4_mu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vmadd_vx_i8m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i8m8_mu( @@ -2497,7 +2497,7 @@ vint8m4_t test_vmadd_vx_i8m4_mu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vv_i8m8_mu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vmadd_vv_i8m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i8m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i8m8_mu( @@ -2506,7 +2506,7 @@ vint8m8_t test_vmadd_vv_i8m8_mu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmadd_vx_i8m8_mu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vmadd_vx_i8m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i8m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf4_mu( @@ -2515,7 +2515,7 @@ vint8m8_t test_vmadd_vx_i8m8_mu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf4_mu( @@ -2524,7 +2524,7 @@ vint16mf4_t test_vmadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vmadd_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16mf2_mu( @@ -2533,7 +2533,7 @@ vint16mf4_t test_vmadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16mf2_mu( @@ -2542,7 +2542,7 @@ vint16mf2_t test_vmadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vmadd_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m1_mu( @@ -2551,7 +2551,7 @@ vint16mf2_t test_vmadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vmadd_vv_i16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m1_mu( @@ -2560,7 +2560,7 @@ vint16m1_t test_vmadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vmadd_vx_i16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m2_mu( @@ -2569,7 +2569,7 @@ vint16m1_t test_vmadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vmadd_vv_i16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m2_mu( @@ -2578,7 +2578,7 @@ vint16m2_t test_vmadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vmadd_vx_i16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m4_mu( @@ -2587,7 +2587,7 @@ vint16m2_t test_vmadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vmadd_vv_i16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m4_mu( @@ -2596,7 +2596,7 @@ vint16m4_t test_vmadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vmadd_vx_i16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i16m8_mu( @@ -2605,7 +2605,7 @@ vint16m4_t test_vmadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vmadd_vv_i16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i16m8_mu( @@ -2614,7 +2614,7 @@ vint16m8_t test_vmadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vmadd_vx_i16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32mf2_mu( @@ -2623,7 +2623,7 @@ vint16m8_t test_vmadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32mf2_mu( @@ -2632,7 +2632,7 @@ vint32mf2_t test_vmadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vmadd_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m1_mu( @@ -2641,7 +2641,7 @@ vint32mf2_t test_vmadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vmadd_vv_i32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m1_mu( @@ -2650,7 +2650,7 @@ vint32m1_t test_vmadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vmadd_vx_i32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m2_mu( @@ -2659,7 +2659,7 @@ vint32m1_t test_vmadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vmadd_vv_i32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m2_mu( @@ -2668,7 +2668,7 @@ vint32m2_t test_vmadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vmadd_vx_i32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m4_mu( @@ -2677,7 +2677,7 @@ vint32m2_t test_vmadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vmadd_vv_i32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m4_mu( @@ -2686,7 +2686,7 @@ vint32m4_t test_vmadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vmadd_vx_i32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i32m8_mu( @@ -2695,7 +2695,7 @@ vint32m4_t test_vmadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vmadd_vv_i32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i32m8_mu( @@ -2704,7 +2704,7 @@ vint32m8_t test_vmadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vmadd_vx_i32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m1_mu( @@ -2713,7 +2713,7 @@ vint32m8_t test_vmadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vmadd_vv_i64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m1_mu( @@ -2722,7 +2722,7 @@ vint64m1_t test_vmadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vmadd_vx_i64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m2_mu( @@ -2731,7 +2731,7 @@ vint64m1_t test_vmadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vmadd_vv_i64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m2_mu( @@ -2740,7 +2740,7 @@ vint64m2_t test_vmadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vmadd_vx_i64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m4_mu( @@ -2749,7 +2749,7 @@ vint64m2_t test_vmadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vmadd_vv_i64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m4_mu( @@ -2758,7 +2758,7 @@ vint64m4_t test_vmadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vmadd_vx_i64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_i64m8_mu( @@ -2767,7 +2767,7 @@ vint64m4_t test_vmadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vmadd_vv_i64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_i64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_i64m8_mu( @@ -2776,7 +2776,7 @@ vint64m8_t test_vmadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmadd_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vmadd_vx_i64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_i64m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf8_mu( @@ -2785,7 +2785,7 @@ vint64m8_t test_vmadd_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vv_u8mf8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf8_mu( @@ -2794,7 +2794,7 @@ vuint8mf8_t test_vmadd_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmadd_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vmadd_vx_u8mf8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf4_mu( @@ -2803,7 +2803,7 @@ vuint8mf8_t test_vmadd_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vv_u8mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf4_mu( @@ -2812,7 +2812,7 @@ vuint8mf4_t test_vmadd_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmadd_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vmadd_vx_u8mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8mf2_mu( @@ -2821,7 +2821,7 @@ vuint8mf4_t test_vmadd_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vv_u8mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8mf2_mu( @@ -2830,7 +2830,7 @@ vuint8mf2_t test_vmadd_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmadd_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vmadd_vx_u8mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m1_mu( @@ -2839,7 +2839,7 @@ vuint8mf2_t test_vmadd_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vv_u8m1_mu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vv_u8m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m1_mu( @@ -2848,7 +2848,7 @@ vuint8m1_t test_vmadd_vv_u8m1_mu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmadd_vx_u8m1_mu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vmadd_vx_u8m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m2_mu( @@ -2857,7 +2857,7 @@ vuint8m1_t test_vmadd_vx_u8m1_mu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vv_u8m2_mu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vv_u8m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m2_mu( @@ -2866,7 +2866,7 @@ vuint8m2_t test_vmadd_vv_u8m2_mu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmadd_vx_u8m2_mu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vmadd_vx_u8m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m4_mu( @@ -2875,7 +2875,7 @@ vuint8m2_t test_vmadd_vx_u8m2_mu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vv_u8m4_mu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vv_u8m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m4_mu( @@ -2884,7 +2884,7 @@ vuint8m4_t test_vmadd_vv_u8m4_mu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmadd_vx_u8m4_mu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vmadd_vx_u8m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u8m8_mu( @@ -2893,7 +2893,7 @@ vuint8m4_t test_vmadd_vx_u8m4_mu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vv_u8m8_mu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vv_u8m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u8m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u8m8_mu( @@ -2902,7 +2902,7 @@ vuint8m8_t test_vmadd_vv_u8m8_mu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmadd_vx_u8m8_mu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vmadd_vx_u8m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u8m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf4_mu( @@ -2911,7 +2911,7 @@ vuint8m8_t test_vmadd_vx_u8m8_mu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf4_mu( @@ -2920,7 +2920,7 @@ vuint16mf4_t test_vmadd_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmadd_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vmadd_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16mf2_mu( @@ -2929,7 +2929,7 @@ vuint16mf4_t test_vmadd_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16mf2_mu( @@ -2938,7 +2938,7 @@ vuint16mf2_t test_vmadd_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmadd_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vmadd_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m1_mu( @@ -2947,7 +2947,7 @@ vuint16mf2_t test_vmadd_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vv_u16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m1_mu( @@ -2956,7 +2956,7 @@ vuint16m1_t test_vmadd_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmadd_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vmadd_vx_u16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m2_mu( @@ -2965,7 +2965,7 @@ vuint16m1_t test_vmadd_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vv_u16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m2_mu( @@ -2974,7 +2974,7 @@ vuint16m2_t test_vmadd_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmadd_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vmadd_vx_u16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m4_mu( @@ -2983,7 +2983,7 @@ vuint16m2_t test_vmadd_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vv_u16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m4_mu( @@ -2992,7 +2992,7 @@ vuint16m4_t test_vmadd_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmadd_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vmadd_vx_u16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u16m8_mu( @@ -3001,7 +3001,7 @@ vuint16m4_t test_vmadd_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vv_u16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u16m8_mu( @@ -3010,7 +3010,7 @@ vuint16m8_t test_vmadd_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmadd_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vmadd_vx_u16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32mf2_mu( @@ -3019,7 +3019,7 @@ vuint16m8_t test_vmadd_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32mf2_mu( @@ -3028,7 +3028,7 @@ vuint32mf2_t test_vmadd_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmadd_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vmadd_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m1_mu( @@ -3037,7 +3037,7 @@ vuint32mf2_t test_vmadd_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vv_u32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m1_mu( @@ -3046,7 +3046,7 @@ vuint32m1_t test_vmadd_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmadd_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vmadd_vx_u32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m2_mu( @@ -3055,7 +3055,7 @@ vuint32m1_t test_vmadd_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vv_u32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m2_mu( @@ -3064,7 +3064,7 @@ vuint32m2_t test_vmadd_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmadd_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vmadd_vx_u32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m4_mu( @@ -3073,7 +3073,7 @@ vuint32m2_t test_vmadd_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vv_u32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m4_mu( @@ -3082,7 +3082,7 @@ vuint32m4_t test_vmadd_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmadd_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vmadd_vx_u32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u32m8_mu( @@ -3091,7 +3091,7 @@ vuint32m4_t test_vmadd_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vv_u32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u32m8_mu( @@ -3100,7 +3100,7 @@ vuint32m8_t test_vmadd_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmadd_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vmadd_vx_u32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m1_mu( @@ -3109,7 +3109,7 @@ vuint32m8_t test_vmadd_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vv_u64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m1_mu( @@ -3118,7 +3118,7 @@ vuint64m1_t test_vmadd_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmadd_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vmadd_vx_u64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m2_mu( @@ -3127,7 +3127,7 @@ vuint64m1_t test_vmadd_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vv_u64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m2_mu( @@ -3136,7 +3136,7 @@ vuint64m2_t test_vmadd_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmadd_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vmadd_vx_u64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m4_mu( @@ -3145,7 +3145,7 @@ vuint64m2_t test_vmadd_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vv_u64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m4_mu( @@ -3154,7 +3154,7 @@ vuint64m4_t test_vmadd_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmadd_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vmadd_vx_u64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vv_u64m8_mu( @@ -3163,7 +3163,7 @@ vuint64m4_t test_vmadd_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vv_u64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vmadd_vv_u64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vmadd_vx_u64m8_mu( @@ -3172,6 +3172,6 @@ vuint64m8_t test_vmadd_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmadd_vx_u64m8_mu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vmadd_vx_u64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vmadd_vx_u64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmax.c index a1a92638e8162f6d4dd4520d6711b9c659d27fea..a5fd9fbb53d0138b2fe95123214a45caa4c1ff05 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmax.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmax.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmax_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vmax_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vmax_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmax_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vmax_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vmax_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmax_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vmax_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vmax_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmax_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vmax_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vmax_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmax_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vmax_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vmax_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmax_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vmax_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vmax_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmax_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vmax_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vmax_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmax_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vmax_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vmax_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmax_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vmax_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vmax_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmax_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vmax_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vmax_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmax_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vmax_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vmax_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmax_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vmax_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vmax_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmax_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vmax_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vmax_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmax_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vmax_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vmax_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmax_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vmax_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vmax_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmax_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vmax_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vmax_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmax_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vmax_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vmax_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmax_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vmax_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vmax_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmax_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vmax_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vmax_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmax_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vmax_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vmax_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmax_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vmax_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vmax_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmax_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vmax_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vmax_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmax_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vmax_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vmax_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmax_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vmax_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vmax_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmax_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vmax_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vmax_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmax_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vmax_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vmax_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmax_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vmax_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vmax_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmax_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vmax_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vmax_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmax_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vmax_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vmax_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmax_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vmax_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vmax_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmax_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vmax_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vmax_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmax_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vmax_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vmax_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmax_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vmax_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vmax_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmax_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vmax_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vmax_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmax_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vmax_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vmax_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmax_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vmax_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vmax_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmax_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vmax_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vmax_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmax_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vmax_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vmax_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmax_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vmax_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vmax_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmax_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vmax_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vmax_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmax_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vmax_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vmax_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmax_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vmax_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vmax_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmax_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vmax_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vmax_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmax_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vmax_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vmax_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmax_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vmax_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vmax_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmax_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vmax_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vmax_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmax_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vmax_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vmax_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmax_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vmax_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vmax_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmax_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vmax_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vmax_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmax_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vmax_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vmax_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmax_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vmax_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vmax_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmax_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vmax_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vmax_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmax_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vmax_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vmax_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmax_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vmax_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vmax_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmax_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vmax_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vmax_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmax_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vmax_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vmax_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmax_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vmax_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vmax_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmax_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vmax_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vmax_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmax_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vmax_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vmax_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmax_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vmax_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vmax_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmax_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vmax_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vmax_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmax_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vmax_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vmax_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmax_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vmax_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vmax_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmax_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vmax_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vmax_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmax_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vmax_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vmax_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmax_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vmax_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vmax_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmax_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vmax_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmax_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vmax_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmax_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vmax_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmax_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vmax_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmax_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vmax_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmax_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vmax_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmax_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vmax_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmax_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vmax_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmax_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vmax_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmax_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vmax_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmax_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vmax_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmax_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vmax_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmax_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vmax_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmax_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmax_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vmax_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmax_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vmax_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmax_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vmax_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmax_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vmax_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmax_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vmax_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmax_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vmax_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmax_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vmax_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmax_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vmax_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmax_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vmax_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmax_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vmax_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmax_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vmax_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmax_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vmax_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmax_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmax_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vmax_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmax_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vmax_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmax_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vmax_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmax_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vmax_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmax_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vmax_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmax_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vmax_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmax_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vmax_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmax_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vmax_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmax_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vmax_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmax_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vmax_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmax_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmax_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vmax_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmax_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vmax_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmax_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vmax_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmax_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vmax_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmax_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vmax_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmax_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vmax_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmax_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vmax_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmax_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmax_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vmax_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmax_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmax_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmax_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmaxu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmaxu.c index d4e93d7106213fd3efd3fe339b30c0e6e65a75a6..df457248cb0a41673e31d9daeb018acb0a364a4a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmaxu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmaxu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmaxu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vmaxu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vmaxu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmaxu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vmaxu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vmaxu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmaxu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vmaxu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vmaxu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmaxu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vmaxu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vmaxu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmaxu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vmaxu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vmaxu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmaxu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vmaxu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vmaxu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmaxu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vmaxu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vmaxu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmaxu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vmaxu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vmaxu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmaxu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vmaxu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vmaxu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmaxu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vmaxu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vmaxu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmaxu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vmaxu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vmaxu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmaxu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vmaxu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vmaxu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmaxu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vmaxu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vmaxu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmaxu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vmaxu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vmaxu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmaxu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vmaxu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vmaxu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmaxu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vmaxu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vmaxu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmaxu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vmaxu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vmaxu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmaxu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vmaxu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vmaxu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmaxu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vmaxu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vmaxu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmaxu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vmaxu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vmaxu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmaxu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vmaxu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vmaxu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmaxu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vmaxu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vmaxu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmaxu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vmaxu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vmaxu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmaxu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vmaxu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vmaxu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmaxu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vmaxu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vmaxu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmaxu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vmaxu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vmaxu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmaxu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vmaxu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vmaxu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmaxu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vmaxu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vmaxu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmaxu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vmaxu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vmaxu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmaxu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vmaxu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vmaxu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmaxu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vmaxu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vmaxu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmaxu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vmaxu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vmaxu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmaxu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vmaxu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vmaxu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmaxu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vmaxu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vmaxu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmaxu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vmaxu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vmaxu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmaxu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vmaxu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vmaxu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmaxu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vmaxu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vmaxu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmaxu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vmaxu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vmaxu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmaxu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vmaxu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vmaxu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmaxu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vmaxu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vmaxu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmaxu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vmaxu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vmaxu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmaxu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vmaxu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vmaxu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmaxu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vmaxu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vmaxu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmaxu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vmaxu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vmaxu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmaxu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vmaxu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vmaxu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmaxu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vmaxu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vmaxu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmaxu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vmaxu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vmaxu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmaxu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vmaxu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vmaxu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmaxu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vmaxu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vmaxu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmaxu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vmaxu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vmaxu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmaxu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vmaxu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vmaxu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmaxu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vmaxu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vmaxu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmaxu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vmaxu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vmaxu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmaxu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vmaxu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vmaxu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmaxu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vmaxu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vmaxu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmaxu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vmaxu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vmaxu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmaxu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vmaxu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vmaxu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmaxu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vmaxu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vmaxu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmaxu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vmaxu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vmaxu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmaxu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vmaxu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vmaxu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmaxu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vmaxu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vmaxu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmaxu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vmaxu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vmaxu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmaxu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vmaxu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vmaxu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmaxu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vmaxu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vmaxu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmaxu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vmaxu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vmaxu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmaxu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vmaxu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vmaxu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmaxu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vmaxu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmaxu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vmaxu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmaxu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vmaxu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmaxu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vmaxu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmaxu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vmaxu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmaxu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vmaxu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmaxu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vmaxu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmaxu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vmaxu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmaxu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vmaxu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmaxu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vmaxu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmaxu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vmaxu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmaxu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vmaxu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmaxu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vmaxu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmaxu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmaxu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vmaxu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmaxu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vmaxu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmaxu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vmaxu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmaxu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vmaxu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmaxu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vmaxu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmaxu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vmaxu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmaxu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vmaxu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmaxu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vmaxu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmaxu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vmaxu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmaxu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vmaxu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmaxu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vmaxu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmaxu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vmaxu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmaxu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmaxu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vmaxu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmaxu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vmaxu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmaxu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vmaxu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmaxu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vmaxu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmaxu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vmaxu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmaxu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vmaxu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmaxu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vmaxu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmaxu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vmaxu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmaxu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vmaxu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmaxu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vmaxu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmaxu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmaxu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vmaxu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmaxu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vmaxu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmaxu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vmaxu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmaxu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vmaxu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmaxu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vmaxu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmaxu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vmaxu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmaxu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vmaxu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmaxu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmaxu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vmaxu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmaxu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmaxu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmaxu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmerge.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmerge.c index 1f64362d18480d4829ae8c2723976d689918862e..7a31bafb4ac136d2d4c55297b07de4cd5adc48fa 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmerge.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmerge.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmerge_vvm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_i8mf8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8mf8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8mf8_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vmerge_vvm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmerge_vxm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_i8mf8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8mf8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8mf4_tu( @@ -31,7 +31,7 @@ vint8mf8_t test_vmerge_vxm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmerge_vvm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_i8mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8mf4_tu( @@ -40,7 +40,7 @@ vint8mf4_t test_vmerge_vvm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmerge_vxm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_i8mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8mf2_tu( @@ -49,7 +49,7 @@ vint8mf4_t test_vmerge_vxm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmerge_vvm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_i8mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8mf2_tu( @@ -58,7 +58,7 @@ vint8mf2_t test_vmerge_vvm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmerge_vxm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_i8mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8m1_tu( @@ -67,7 +67,7 @@ vint8mf2_t test_vmerge_vxm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmerge_vvm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_i8m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8m1_tu( @@ -76,7 +76,7 @@ vint8m1_t test_vmerge_vvm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmerge_vxm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_i8m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8m2_tu( @@ -85,7 +85,7 @@ vint8m1_t test_vmerge_vxm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmerge_vvm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_i8m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8m2_tu( @@ -94,7 +94,7 @@ vint8m2_t test_vmerge_vvm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmerge_vxm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_i8m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8m4_tu( @@ -103,7 +103,7 @@ vint8m2_t test_vmerge_vxm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmerge_vvm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_i8m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8m4_tu( @@ -112,7 +112,7 @@ vint8m4_t test_vmerge_vvm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmerge_vxm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vxm_i8m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i8m8_tu( @@ -121,7 +121,7 @@ vint8m4_t test_vmerge_vxm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmerge_vvm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, vbool1_t mask, size_t vl) { - return vmerge_vvm_i8m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i8m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i8m8_tu( @@ -130,7 +130,7 @@ vint8m8_t test_vmerge_vvm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmerge_vxm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, vbool1_t mask, size_t vl) { - return vmerge_vxm_i8m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i8m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16mf4_tu( @@ -139,7 +139,7 @@ vint8m8_t test_vmerge_vxm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmerge_vvm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_i16mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16mf4_tu( @@ -148,7 +148,7 @@ vint16mf4_t test_vmerge_vvm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmerge_vxm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_i16mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16mf2_tu( @@ -157,7 +157,7 @@ vint16mf4_t test_vmerge_vxm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmerge_vvm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_i16mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16mf2_tu( @@ -166,7 +166,7 @@ vint16mf2_t test_vmerge_vvm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmerge_vxm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_i16mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16m1_tu( @@ -175,7 +175,7 @@ vint16mf2_t test_vmerge_vxm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmerge_vvm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_i16m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16m1_tu( @@ -184,7 +184,7 @@ vint16m1_t test_vmerge_vvm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmerge_vxm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_i16m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16m2_tu( @@ -193,7 +193,7 @@ vint16m1_t test_vmerge_vxm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmerge_vvm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_i16m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16m2_tu( @@ -202,7 +202,7 @@ vint16m2_t test_vmerge_vvm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmerge_vxm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_i16m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16m4_tu( @@ -211,7 +211,7 @@ vint16m2_t test_vmerge_vxm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmerge_vvm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_i16m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16m4_tu( @@ -220,7 +220,7 @@ vint16m4_t test_vmerge_vvm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmerge_vxm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_i16m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i16m8_tu( @@ -229,7 +229,7 @@ vint16m4_t test_vmerge_vxm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmerge_vvm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_i16m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i16m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i16m8_tu( @@ -238,7 +238,7 @@ vint16m8_t test_vmerge_vvm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmerge_vxm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, vbool2_t mask, size_t vl) { - return vmerge_vxm_i16m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i16m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32mf2_tu( @@ -247,7 +247,7 @@ vint16m8_t test_vmerge_vxm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmerge_vvm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_i32mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32mf2_tu( @@ -256,7 +256,7 @@ vint32mf2_t test_vmerge_vvm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmerge_vxm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_i32mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vmerge_vxm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmerge_vvm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_i32m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32m1_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vmerge_vvm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmerge_vxm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_i32m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vmerge_vxm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmerge_vvm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_i32m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32m2_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vmerge_vvm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmerge_vxm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_i32m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32m4_tu( @@ -301,7 +301,7 @@ vint32m2_t test_vmerge_vxm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmerge_vvm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_i32m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32m4_tu( @@ -310,7 +310,7 @@ vint32m4_t test_vmerge_vvm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmerge_vxm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_i32m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i32m8_tu( @@ -319,7 +319,7 @@ vint32m4_t test_vmerge_vxm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmerge_vvm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_i32m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i32m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i32m8_tu( @@ -328,7 +328,7 @@ vint32m8_t test_vmerge_vvm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmerge_vxm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_i32m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i32m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i64m1_tu( @@ -337,7 +337,7 @@ vint32m8_t test_vmerge_vxm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmerge_vvm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_i64m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i64m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i64m1_tu( @@ -346,7 +346,7 @@ vint64m1_t test_vmerge_vvm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmerge_vxm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_i64m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i64m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i64m2_tu( @@ -355,7 +355,7 @@ vint64m1_t test_vmerge_vxm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmerge_vvm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_i64m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i64m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i64m2_tu( @@ -364,7 +364,7 @@ vint64m2_t test_vmerge_vvm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmerge_vxm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_i64m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i64m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i64m4_tu( @@ -373,7 +373,7 @@ vint64m2_t test_vmerge_vxm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmerge_vvm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_i64m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i64m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i64m4_tu( @@ -382,7 +382,7 @@ vint64m4_t test_vmerge_vvm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmerge_vxm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_i64m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i64m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_i64m8_tu( @@ -391,7 +391,7 @@ vint64m4_t test_vmerge_vxm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmerge_vvm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_i64m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_i64m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_i64m8_tu( @@ -400,7 +400,7 @@ vint64m8_t test_vmerge_vvm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmerge_vxm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_i64m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_i64m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8mf8_tu( @@ -409,7 +409,7 @@ vint64m8_t test_vmerge_vxm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmerge_vvm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_u8mf8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8mf8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8mf8_tu( @@ -418,7 +418,7 @@ vuint8mf8_t test_vmerge_vvm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmerge_vxm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_u8mf8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8mf8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8mf4_tu( @@ -427,7 +427,7 @@ vuint8mf8_t test_vmerge_vxm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmerge_vvm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_u8mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8mf4_tu( @@ -436,7 +436,7 @@ vuint8mf4_t test_vmerge_vvm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmerge_vxm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_u8mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8mf2_tu( @@ -445,7 +445,7 @@ vuint8mf4_t test_vmerge_vxm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmerge_vvm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_u8mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8mf2_tu( @@ -454,7 +454,7 @@ vuint8mf2_t test_vmerge_vvm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmerge_vxm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_u8mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8m1_tu( @@ -463,7 +463,7 @@ vuint8mf2_t test_vmerge_vxm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmerge_vvm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_u8m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8m1_tu( @@ -472,7 +472,7 @@ vuint8m1_t test_vmerge_vvm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmerge_vxm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_u8m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8m2_tu( @@ -481,7 +481,7 @@ vuint8m1_t test_vmerge_vxm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmerge_vvm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_u8m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8m2_tu( @@ -490,7 +490,7 @@ vuint8m2_t test_vmerge_vvm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmerge_vxm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_u8m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8m4_tu( @@ -499,7 +499,7 @@ vuint8m2_t test_vmerge_vxm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmerge_vvm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_u8m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8m4_tu( @@ -508,7 +508,7 @@ vuint8m4_t test_vmerge_vvm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmerge_vxm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vxm_u8m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u8m8_tu( @@ -517,7 +517,7 @@ vuint8m4_t test_vmerge_vxm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmerge_vvm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, vbool1_t mask, size_t vl) { - return vmerge_vvm_u8m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u8m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u8m8_tu( @@ -526,7 +526,7 @@ vuint8m8_t test_vmerge_vvm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmerge_vxm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, vbool1_t mask, size_t vl) { - return vmerge_vxm_u8m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u8m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16mf4_tu( @@ -535,7 +535,7 @@ vuint8m8_t test_vmerge_vxm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmerge_vvm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_u16mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16mf4_tu( @@ -544,7 +544,7 @@ vuint16mf4_t test_vmerge_vvm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmerge_vxm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_u16mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16mf2_tu( @@ -553,7 +553,7 @@ vuint16mf4_t test_vmerge_vxm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmerge_vvm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_u16mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16mf2_tu( @@ -562,7 +562,7 @@ vuint16mf2_t test_vmerge_vvm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmerge_vxm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_u16mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16m1_tu( @@ -571,7 +571,7 @@ vuint16mf2_t test_vmerge_vxm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmerge_vvm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_u16m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16m1_tu( @@ -580,7 +580,7 @@ vuint16m1_t test_vmerge_vvm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmerge_vxm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_u16m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16m2_tu( @@ -589,7 +589,7 @@ vuint16m1_t test_vmerge_vxm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmerge_vvm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_u16m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16m2_tu( @@ -598,7 +598,7 @@ vuint16m2_t test_vmerge_vvm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmerge_vxm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_u16m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16m4_tu( @@ -607,7 +607,7 @@ vuint16m2_t test_vmerge_vxm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmerge_vvm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_u16m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16m4_tu( @@ -616,7 +616,7 @@ vuint16m4_t test_vmerge_vvm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmerge_vxm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_u16m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u16m8_tu( @@ -625,7 +625,7 @@ vuint16m4_t test_vmerge_vxm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmerge_vvm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_u16m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u16m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u16m8_tu( @@ -634,7 +634,7 @@ vuint16m8_t test_vmerge_vvm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmerge_vxm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, vbool2_t mask, size_t vl) { - return vmerge_vxm_u16m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u16m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32mf2_tu( @@ -643,7 +643,7 @@ vuint16m8_t test_vmerge_vxm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmerge_vvm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_u32mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32mf2_tu( @@ -652,7 +652,7 @@ vuint32mf2_t test_vmerge_vvm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmerge_vxm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_u32mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32m1_tu( @@ -661,7 +661,7 @@ vuint32mf2_t test_vmerge_vxm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmerge_vvm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_u32m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32m1_tu( @@ -670,7 +670,7 @@ vuint32m1_t test_vmerge_vvm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmerge_vxm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_u32m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32m2_tu( @@ -679,7 +679,7 @@ vuint32m1_t test_vmerge_vxm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmerge_vvm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_u32m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32m2_tu( @@ -688,7 +688,7 @@ vuint32m2_t test_vmerge_vvm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmerge_vxm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_u32m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32m4_tu( @@ -697,7 +697,7 @@ vuint32m2_t test_vmerge_vxm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmerge_vvm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_u32m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32m4_tu( @@ -706,7 +706,7 @@ vuint32m4_t test_vmerge_vvm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmerge_vxm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_u32m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u32m8_tu( @@ -715,7 +715,7 @@ vuint32m4_t test_vmerge_vxm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmerge_vvm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_u32m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u32m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u32m8_tu( @@ -724,7 +724,7 @@ vuint32m8_t test_vmerge_vvm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmerge_vxm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, vbool4_t mask, size_t vl) { - return vmerge_vxm_u32m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u32m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u64m1_tu( @@ -733,7 +733,7 @@ vuint32m8_t test_vmerge_vxm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmerge_vvm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_u64m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u64m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u64m1_tu( @@ -742,7 +742,7 @@ vuint64m1_t test_vmerge_vvm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmerge_vxm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, vbool64_t mask, size_t vl) { - return vmerge_vxm_u64m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u64m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u64m2_tu( @@ -751,7 +751,7 @@ vuint64m1_t test_vmerge_vxm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmerge_vvm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_u64m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u64m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u64m2_tu( @@ -760,7 +760,7 @@ vuint64m2_t test_vmerge_vvm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmerge_vxm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, vbool32_t mask, size_t vl) { - return vmerge_vxm_u64m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u64m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u64m4_tu( @@ -769,7 +769,7 @@ vuint64m2_t test_vmerge_vxm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmerge_vvm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_u64m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u64m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u64m4_tu( @@ -778,7 +778,7 @@ vuint64m4_t test_vmerge_vvm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmerge_vxm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, vbool16_t mask, size_t vl) { - return vmerge_vxm_u64m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u64m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_u64m8_tu( @@ -787,7 +787,7 @@ vuint64m4_t test_vmerge_vxm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmerge_vvm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_u64m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_u64m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vxm_u64m8_tu( @@ -796,7 +796,7 @@ vuint64m8_t test_vmerge_vvm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmerge_vxm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, vbool8_t mask, size_t vl) { - return vmerge_vxm_u64m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vxm_u64m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16mf4_tu( @@ -805,7 +805,7 @@ vuint64m8_t test_vmerge_vxm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vmerge_vvm_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_f16mf4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16mf4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16mf2_tu( @@ -814,7 +814,7 @@ vfloat16mf4_t test_vmerge_vvm_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vmerge_vvm_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_f16mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16m1_tu( @@ -823,7 +823,7 @@ vfloat16mf2_t test_vmerge_vvm_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vmerge_vvm_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_f16m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16m2_tu( @@ -832,7 +832,7 @@ vfloat16m1_t test_vmerge_vvm_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vmerge_vvm_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_f16m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16m4_tu( @@ -841,7 +841,7 @@ vfloat16m2_t test_vmerge_vvm_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vmerge_vvm_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_f16m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f16m8_tu( @@ -850,7 +850,7 @@ vfloat16m4_t test_vmerge_vvm_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vmerge_vvm_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, vbool2_t mask, size_t vl) { - return vmerge_vvm_f16m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f16m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32mf2_tu( @@ -859,7 +859,7 @@ vfloat16m8_t test_vmerge_vvm_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vmerge_vvm_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_f32mf2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32mf2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32m1_tu( @@ -868,7 +868,7 @@ vfloat32mf2_t test_vmerge_vvm_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vmerge_vvm_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_f32m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32m2_tu( @@ -877,7 +877,7 @@ vfloat32m1_t test_vmerge_vvm_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vmerge_vvm_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_f32m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32m4_tu( @@ -886,7 +886,7 @@ vfloat32m2_t test_vmerge_vvm_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vmerge_vvm_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_f32m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f32m8_tu( @@ -895,7 +895,7 @@ vfloat32m4_t test_vmerge_vvm_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vmerge_vvm_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, vbool4_t mask, size_t vl) { - return vmerge_vvm_f32m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f32m8_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f64m1_tu( @@ -904,7 +904,7 @@ vfloat32m8_t test_vmerge_vvm_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vmerge_vvm_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, vbool64_t mask, size_t vl) { - return vmerge_vvm_f64m1_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f64m1_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f64m2_tu( @@ -913,7 +913,7 @@ vfloat64m1_t test_vmerge_vvm_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vmerge_vvm_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, vbool32_t mask, size_t vl) { - return vmerge_vvm_f64m2_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f64m2_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f64m4_tu( @@ -922,7 +922,7 @@ vfloat64m2_t test_vmerge_vvm_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vmerge_vvm_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, vbool16_t mask, size_t vl) { - return vmerge_vvm_f64m4_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f64m4_tu(maskedoff, op1, op2, mask, vl); } // CHECK-RV64-LABEL: @test_vmerge_vvm_f64m8_tu( @@ -931,6 +931,6 @@ vfloat64m4_t test_vmerge_vvm_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vmerge_vvm_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, vbool8_t mask, size_t vl) { - return vmerge_vvm_f64m8_tu(maskedoff, op1, op2, mask, vl); + return __riscv_vmerge_vvm_f64m8_tu(maskedoff, op1, op2, mask, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfeq.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfeq.c index 003e03d8021a94429c0590614dd07da166de4a0e..debb613b7142884e32462e23bf247aa550620064 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfeq.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfeq.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfeq_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16mf4_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmfeq_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16mf2_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmfeq_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfeq_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16mf2_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmfeq_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m1_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmfeq_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfeq_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m1_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmfeq_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m2_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmfeq_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfeq_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m2_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmfeq_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m4_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmfeq_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfeq_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m4_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmfeq_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f16m8_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmfeq_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfeq_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfeq_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f16m8_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmfeq_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfeq_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfeq_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32mf2_b64_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmfeq_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfeq_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32mf2_b64_mu( @@ -130,7 +130,7 @@ vbool64_t test_vmfeq_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfeq_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m1_b32_mu( @@ -139,7 +139,7 @@ vbool64_t test_vmfeq_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfeq_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m1_b32_mu( @@ -148,7 +148,7 @@ vbool32_t test_vmfeq_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m2_b16_mu( @@ -157,7 +157,7 @@ vbool32_t test_vmfeq_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfeq_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m2_b16_mu( @@ -166,7 +166,7 @@ vbool16_t test_vmfeq_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m4_b8_mu( @@ -175,7 +175,7 @@ vbool16_t test_vmfeq_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfeq_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m4_b8_mu( @@ -184,7 +184,7 @@ vbool8_t test_vmfeq_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f32m8_b4_mu( @@ -193,7 +193,7 @@ vbool8_t test_vmfeq_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfeq_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f32m8_b4_mu( @@ -202,7 +202,7 @@ vbool4_t test_vmfeq_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfeq_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vmfeq_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m1_b64_mu( @@ -211,7 +211,7 @@ vbool4_t test_vmfeq_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfeq_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m1_b64_mu( @@ -220,7 +220,7 @@ vbool64_t test_vmfeq_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfeq_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m2_b32_mu( @@ -229,7 +229,7 @@ vbool64_t test_vmfeq_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfeq_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m2_b32_mu( @@ -238,7 +238,7 @@ vbool32_t test_vmfeq_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfeq_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m4_b16_mu( @@ -247,7 +247,7 @@ vbool32_t test_vmfeq_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfeq_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m4_b16_mu( @@ -256,7 +256,7 @@ vbool16_t test_vmfeq_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfeq_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vv_f64m8_b8_mu( @@ -265,7 +265,7 @@ vbool16_t test_vmfeq_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfeq_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfeq_vf_f64m8_b8_mu( @@ -274,6 +274,6 @@ vbool8_t test_vmfeq_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfeq_vf_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vmfeq_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfeq_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfge.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfge.c index e8a98e167bfb6b06de66ce7fc59b48c01bd0bf91..0186eab64a93adef65fa6a5de5e112695b46a233 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfge.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfge.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfge_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16mf4_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmfge_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16mf2_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmfge_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfge_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16mf2_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmfge_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m1_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmfge_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfge_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m1_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmfge_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m2_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmfge_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfge_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m2_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmfge_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m4_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmfge_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfge_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m4_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmfge_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f16m8_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmfge_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfge_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfge_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f16m8_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmfge_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfge_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfge_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32mf2_b64_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmfge_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfge_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32mf2_b64_mu( @@ -130,7 +130,7 @@ vbool64_t test_vmfge_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfge_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m1_b32_mu( @@ -139,7 +139,7 @@ vbool64_t test_vmfge_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfge_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m1_b32_mu( @@ -148,7 +148,7 @@ vbool32_t test_vmfge_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vmfge_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m2_b16_mu( @@ -157,7 +157,7 @@ vbool32_t test_vmfge_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfge_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m2_b16_mu( @@ -166,7 +166,7 @@ vbool16_t test_vmfge_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vmfge_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m4_b8_mu( @@ -175,7 +175,7 @@ vbool16_t test_vmfge_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfge_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m4_b8_mu( @@ -184,7 +184,7 @@ vbool8_t test_vmfge_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vmfge_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f32m8_b4_mu( @@ -193,7 +193,7 @@ vbool8_t test_vmfge_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfge_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f32m8_b4_mu( @@ -202,7 +202,7 @@ vbool4_t test_vmfge_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfge_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vmfge_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m1_b64_mu( @@ -211,7 +211,7 @@ vbool4_t test_vmfge_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfge_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m1_b64_mu( @@ -220,7 +220,7 @@ vbool64_t test_vmfge_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfge_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vmfge_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m2_b32_mu( @@ -229,7 +229,7 @@ vbool64_t test_vmfge_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfge_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m2_b32_mu( @@ -238,7 +238,7 @@ vbool32_t test_vmfge_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfge_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vmfge_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m4_b16_mu( @@ -247,7 +247,7 @@ vbool32_t test_vmfge_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfge_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m4_b16_mu( @@ -256,7 +256,7 @@ vbool16_t test_vmfge_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfge_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vmfge_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vv_f64m8_b8_mu( @@ -265,7 +265,7 @@ vbool16_t test_vmfge_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfge_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfge_vf_f64m8_b8_mu( @@ -274,6 +274,6 @@ vbool8_t test_vmfge_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfge_vf_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vmfge_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfge_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfgt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfgt.c index a0e265c805c614b438225d3b1dde448f3d902688..df9c41e0e86e44cf03e630437859f55060578a6b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfgt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfgt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfgt_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16mf4_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmfgt_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16mf2_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmfgt_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfgt_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16mf2_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmfgt_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m1_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmfgt_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfgt_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m1_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmfgt_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m2_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmfgt_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfgt_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m2_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmfgt_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m4_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmfgt_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfgt_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m4_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmfgt_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f16m8_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmfgt_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfgt_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfgt_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f16m8_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmfgt_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfgt_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfgt_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32mf2_b64_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmfgt_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfgt_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32mf2_b64_mu( @@ -130,7 +130,7 @@ vbool64_t test_vmfgt_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfgt_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m1_b32_mu( @@ -139,7 +139,7 @@ vbool64_t test_vmfgt_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfgt_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m1_b32_mu( @@ -148,7 +148,7 @@ vbool32_t test_vmfgt_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m2_b16_mu( @@ -157,7 +157,7 @@ vbool32_t test_vmfgt_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfgt_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m2_b16_mu( @@ -166,7 +166,7 @@ vbool16_t test_vmfgt_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m4_b8_mu( @@ -175,7 +175,7 @@ vbool16_t test_vmfgt_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfgt_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m4_b8_mu( @@ -184,7 +184,7 @@ vbool8_t test_vmfgt_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f32m8_b4_mu( @@ -193,7 +193,7 @@ vbool8_t test_vmfgt_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfgt_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f32m8_b4_mu( @@ -202,7 +202,7 @@ vbool4_t test_vmfgt_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfgt_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vmfgt_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m1_b64_mu( @@ -211,7 +211,7 @@ vbool4_t test_vmfgt_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfgt_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m1_b64_mu( @@ -220,7 +220,7 @@ vbool64_t test_vmfgt_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfgt_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m2_b32_mu( @@ -229,7 +229,7 @@ vbool64_t test_vmfgt_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfgt_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m2_b32_mu( @@ -238,7 +238,7 @@ vbool32_t test_vmfgt_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfgt_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m4_b16_mu( @@ -247,7 +247,7 @@ vbool32_t test_vmfgt_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfgt_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m4_b16_mu( @@ -256,7 +256,7 @@ vbool16_t test_vmfgt_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfgt_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vv_f64m8_b8_mu( @@ -265,7 +265,7 @@ vbool16_t test_vmfgt_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfgt_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfgt_vf_f64m8_b8_mu( @@ -274,6 +274,6 @@ vbool8_t test_vmfgt_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfgt_vf_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vmfgt_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfgt_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfle.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfle.c index bc7072d091be64a3bc391b8b648208c3170d57f4..f7c11ae396113909c00bf1c93eeb2ad7d1492bf6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfle.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfle.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfle_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16mf4_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmfle_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16mf2_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmfle_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfle_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16mf2_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmfle_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m1_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmfle_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfle_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m1_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmfle_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m2_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmfle_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfle_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m2_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmfle_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m4_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmfle_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfle_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m4_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmfle_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f16m8_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmfle_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfle_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfle_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f16m8_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmfle_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfle_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfle_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32mf2_b64_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmfle_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfle_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32mf2_b64_mu( @@ -130,7 +130,7 @@ vbool64_t test_vmfle_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfle_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m1_b32_mu( @@ -139,7 +139,7 @@ vbool64_t test_vmfle_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfle_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m1_b32_mu( @@ -148,7 +148,7 @@ vbool32_t test_vmfle_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vmfle_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m2_b16_mu( @@ -157,7 +157,7 @@ vbool32_t test_vmfle_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfle_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m2_b16_mu( @@ -166,7 +166,7 @@ vbool16_t test_vmfle_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vmfle_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m4_b8_mu( @@ -175,7 +175,7 @@ vbool16_t test_vmfle_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfle_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m4_b8_mu( @@ -184,7 +184,7 @@ vbool8_t test_vmfle_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vmfle_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f32m8_b4_mu( @@ -193,7 +193,7 @@ vbool8_t test_vmfle_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfle_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f32m8_b4_mu( @@ -202,7 +202,7 @@ vbool4_t test_vmfle_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfle_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vmfle_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m1_b64_mu( @@ -211,7 +211,7 @@ vbool4_t test_vmfle_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfle_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m1_b64_mu( @@ -220,7 +220,7 @@ vbool64_t test_vmfle_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfle_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vmfle_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m2_b32_mu( @@ -229,7 +229,7 @@ vbool64_t test_vmfle_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfle_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m2_b32_mu( @@ -238,7 +238,7 @@ vbool32_t test_vmfle_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfle_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vmfle_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m4_b16_mu( @@ -247,7 +247,7 @@ vbool32_t test_vmfle_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfle_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m4_b16_mu( @@ -256,7 +256,7 @@ vbool16_t test_vmfle_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfle_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vmfle_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vv_f64m8_b8_mu( @@ -265,7 +265,7 @@ vbool16_t test_vmfle_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfle_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfle_vf_f64m8_b8_mu( @@ -274,6 +274,6 @@ vbool8_t test_vmfle_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfle_vf_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vmfle_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfle_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmflt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmflt.c index 864357473ad1bc13754b02ec3925223c7eb60620..f6f57f2550e579132e6077b2f98de2d43bdaad47 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmflt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmflt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmflt_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16mf4_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmflt_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16mf2_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmflt_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmflt_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16mf2_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmflt_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m1_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmflt_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmflt_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m1_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmflt_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m2_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmflt_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmflt_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m2_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmflt_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m4_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmflt_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmflt_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m4_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmflt_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f16m8_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmflt_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmflt_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmflt_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f16m8_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmflt_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmflt_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmflt_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32mf2_b64_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmflt_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmflt_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32mf2_b64_mu( @@ -130,7 +130,7 @@ vbool64_t test_vmflt_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vmflt_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m1_b32_mu( @@ -139,7 +139,7 @@ vbool64_t test_vmflt_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmflt_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m1_b32_mu( @@ -148,7 +148,7 @@ vbool32_t test_vmflt_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vmflt_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m2_b16_mu( @@ -157,7 +157,7 @@ vbool32_t test_vmflt_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmflt_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m2_b16_mu( @@ -166,7 +166,7 @@ vbool16_t test_vmflt_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vmflt_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m4_b8_mu( @@ -175,7 +175,7 @@ vbool16_t test_vmflt_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmflt_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m4_b8_mu( @@ -184,7 +184,7 @@ vbool8_t test_vmflt_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vmflt_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f32m8_b4_mu( @@ -193,7 +193,7 @@ vbool8_t test_vmflt_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmflt_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f32m8_b4_mu( @@ -202,7 +202,7 @@ vbool4_t test_vmflt_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmflt_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vmflt_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m1_b64_mu( @@ -211,7 +211,7 @@ vbool4_t test_vmflt_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmflt_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m1_b64_mu( @@ -220,7 +220,7 @@ vbool64_t test_vmflt_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmflt_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vmflt_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m2_b32_mu( @@ -229,7 +229,7 @@ vbool64_t test_vmflt_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmflt_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m2_b32_mu( @@ -238,7 +238,7 @@ vbool32_t test_vmflt_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmflt_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vmflt_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m4_b16_mu( @@ -247,7 +247,7 @@ vbool32_t test_vmflt_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmflt_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m4_b16_mu( @@ -256,7 +256,7 @@ vbool16_t test_vmflt_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmflt_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vmflt_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vv_f64m8_b8_mu( @@ -265,7 +265,7 @@ vbool16_t test_vmflt_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmflt_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmflt_vf_f64m8_b8_mu( @@ -274,6 +274,6 @@ vbool8_t test_vmflt_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmflt_vf_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vmflt_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmflt_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfne.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfne.c index ba03163a97f7b66245cbb222e31996400a583808..75d5cf442de683cb2fd7ff9e81d1d7676d76dd7d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfne.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmfne.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, vfloat16mf4_t op2, size_t vl) { - return vmfne_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16mf4_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmfne_vv_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat16mf4_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16mf2_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmfne_vf_f16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, vfloat16mf2_t op2, size_t vl) { - return vmfne_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16mf2_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmfne_vv_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat16mf2_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m1_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmfne_vf_f16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, vfloat16m1_t op2, size_t vl) { - return vmfne_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m1_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmfne_vv_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat16m1_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m2_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmfne_vf_f16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, vfloat16m2_t op2, size_t vl) { - return vmfne_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m2_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmfne_vv_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m4_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmfne_vf_f16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, vfloat16m4_t op2, size_t vl) { - return vmfne_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m4_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmfne_vv_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f16m8_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmfne_vf_f16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfne_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, vfloat16m8_t op2, size_t vl) { - return vmfne_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f16m8_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmfne_vv_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmfne_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8_t op1, _Float16 op2, size_t vl) { - return vmfne_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32mf2_b64_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmfne_vf_f16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vfloat16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, vfloat32mf2_t op2, size_t vl) { - return vmfne_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32mf2_b64_mu( @@ -130,7 +130,7 @@ vbool64_t test_vmfne_vv_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat32mf2_t op1, float op2, size_t vl) { - return vmfne_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m1_b32_mu( @@ -139,7 +139,7 @@ vbool64_t test_vmfne_vf_f32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) { - return vmfne_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m1_b32_mu( @@ -148,7 +148,7 @@ vbool32_t test_vmfne_vv_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat32m1_t op1, float op2, size_t vl) { - return vmfne_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m2_b16_mu( @@ -157,7 +157,7 @@ vbool32_t test_vmfne_vf_f32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, vfloat32m2_t op2, size_t vl) { - return vmfne_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m2_b16_mu( @@ -166,7 +166,7 @@ vbool16_t test_vmfne_vv_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat32m2_t op1, float op2, size_t vl) { - return vmfne_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m4_b8_mu( @@ -175,7 +175,7 @@ vbool16_t test_vmfne_vf_f32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, vfloat32m4_t op2, size_t vl) { - return vmfne_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m4_b8_mu( @@ -184,7 +184,7 @@ vbool8_t test_vmfne_vv_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4_t op1, float op2, size_t vl) { - return vmfne_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f32m8_b4_mu( @@ -193,7 +193,7 @@ vbool8_t test_vmfne_vf_f32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, vfloat32m8_t op2, size_t vl) { - return vmfne_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f32m8_b4_mu( @@ -202,7 +202,7 @@ vbool4_t test_vmfne_vv_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmfne_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8_t op1, float op2, size_t vl) { - return vmfne_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m1_b64_mu( @@ -211,7 +211,7 @@ vbool4_t test_vmfne_vf_f32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vfloat32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, vfloat64m1_t op2, size_t vl) { - return vmfne_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m1_b64_mu( @@ -220,7 +220,7 @@ vbool64_t test_vmfne_vv_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmfne_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat64m1_t op1, double op2, size_t vl) { - return vmfne_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m2_b32_mu( @@ -229,7 +229,7 @@ vbool64_t test_vmfne_vf_f64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, vfloat64m2_t op2, size_t vl) { - return vmfne_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m2_b32_mu( @@ -238,7 +238,7 @@ vbool32_t test_vmfne_vv_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmfne_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat64m2_t op1, double op2, size_t vl) { - return vmfne_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m4_b16_mu( @@ -247,7 +247,7 @@ vbool32_t test_vmfne_vf_f64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, vfloat64m4_t op2, size_t vl) { - return vmfne_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m4_b16_mu( @@ -256,7 +256,7 @@ vbool16_t test_vmfne_vv_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmfne_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat64m4_t op1, double op2, size_t vl) { - return vmfne_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vv_f64m8_b8_mu( @@ -265,7 +265,7 @@ vbool16_t test_vmfne_vf_f64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, vfloat64m8_t op2, size_t vl) { - return vmfne_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vv_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmfne_vf_f64m8_b8_mu( @@ -274,6 +274,6 @@ vbool8_t test_vmfne_vv_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmfne_vf_f64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vfloat64m8_t op1, double op2, size_t vl) { - return vmfne_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmfne_vf_f64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmin.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmin.c index 8beaf1dc93b00e97c0de8c586afe53af44cf03a9..6bd7ca532697be9f6270c10e7ea5980919e6ca0b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmin.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmin.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmin_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vmin_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vmin_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmin_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vmin_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vmin_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmin_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vmin_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vmin_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmin_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vmin_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vmin_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmin_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vmin_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vmin_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmin_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vmin_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vmin_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmin_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vmin_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vmin_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmin_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vmin_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vmin_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmin_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vmin_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vmin_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmin_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vmin_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vmin_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmin_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vmin_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vmin_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmin_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vmin_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vmin_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmin_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vmin_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vmin_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmin_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vmin_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vmin_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmin_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vmin_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vmin_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmin_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vmin_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vmin_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmin_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vmin_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vmin_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmin_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vmin_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vmin_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmin_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vmin_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vmin_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmin_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vmin_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vmin_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmin_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vmin_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vmin_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmin_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vmin_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vmin_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmin_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vmin_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vmin_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmin_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vmin_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vmin_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmin_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vmin_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vmin_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmin_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vmin_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vmin_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmin_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vmin_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vmin_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmin_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vmin_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vmin_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmin_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vmin_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vmin_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmin_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vmin_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vmin_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmin_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vmin_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vmin_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmin_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vmin_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vmin_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmin_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vmin_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vmin_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmin_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vmin_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vmin_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmin_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vmin_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vmin_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmin_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vmin_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vmin_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmin_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vmin_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vmin_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmin_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vmin_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vmin_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmin_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vmin_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vmin_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmin_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vmin_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vmin_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmin_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vmin_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vmin_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmin_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vmin_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vmin_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmin_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vmin_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vmin_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmin_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vmin_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vmin_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmin_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vmin_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vmin_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmin_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vmin_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vmin_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmin_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vmin_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vmin_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmin_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vmin_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vmin_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmin_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vmin_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vmin_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmin_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vmin_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vmin_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmin_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vmin_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vmin_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmin_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vmin_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vmin_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmin_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vmin_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vmin_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmin_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vmin_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vmin_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmin_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vmin_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vmin_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmin_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vmin_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vmin_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmin_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vmin_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vmin_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmin_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vmin_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vmin_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmin_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vmin_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vmin_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmin_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vmin_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vmin_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmin_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vmin_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vmin_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmin_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vmin_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vmin_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmin_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vmin_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vmin_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmin_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vmin_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vmin_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmin_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vmin_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vmin_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmin_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vmin_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vmin_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmin_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vmin_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmin_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vmin_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmin_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vmin_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmin_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vmin_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmin_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vmin_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmin_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vmin_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmin_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vmin_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmin_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vmin_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmin_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vmin_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmin_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vmin_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmin_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vmin_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmin_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vmin_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmin_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vmin_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmin_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmin_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vmin_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmin_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vmin_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmin_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vmin_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmin_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vmin_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmin_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vmin_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmin_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vmin_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmin_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vmin_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmin_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vmin_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmin_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vmin_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmin_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vmin_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmin_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vmin_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmin_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vmin_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmin_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmin_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vmin_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmin_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vmin_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmin_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vmin_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmin_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vmin_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmin_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vmin_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmin_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vmin_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmin_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vmin_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmin_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vmin_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmin_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vmin_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmin_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vmin_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmin_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmin_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vmin_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmin_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vmin_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmin_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vmin_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmin_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vmin_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmin_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vmin_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmin_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vmin_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmin_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vmin_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmin_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmin_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vmin_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmin_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmin_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmin_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vminu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vminu.c index 06d342d1f0733f1a0d2da899909ca101578aab0f..1ccc1420cb2bb08c22eb30dca1dfaf32d0a6e05f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vminu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vminu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vminu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vminu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vminu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vminu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vminu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vminu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vminu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vminu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vminu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vminu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vminu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vminu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vminu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vminu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vminu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vminu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vminu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vminu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vminu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vminu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vminu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vminu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vminu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vminu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vminu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vminu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vminu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vminu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vminu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vminu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vminu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vminu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vminu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vminu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vminu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vminu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vminu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vminu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vminu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vminu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vminu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vminu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vminu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vminu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vminu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vminu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vminu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vminu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vminu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vminu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vminu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vminu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vminu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vminu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vminu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vminu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vminu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vminu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vminu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vminu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vminu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vminu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vminu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vminu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vminu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vminu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vminu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vminu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vminu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vminu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vminu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vminu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vminu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vminu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vminu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vminu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vminu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vminu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vminu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vminu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vminu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vminu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vminu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vminu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vminu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vminu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vminu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vminu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vminu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vminu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vminu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vminu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vminu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vminu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vminu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vminu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vminu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vminu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vminu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vminu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vminu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vminu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vminu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vminu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vminu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vminu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vminu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vminu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vminu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vminu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vminu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vminu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vminu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vminu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vminu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vminu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vminu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vminu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vminu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vminu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vminu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vminu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vminu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vminu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vminu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vminu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vminu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vminu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vminu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vminu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vminu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vminu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vminu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vminu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vminu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vminu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vminu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vminu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vminu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vminu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vminu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vminu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vminu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vminu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vminu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vminu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vminu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vminu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vminu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vminu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vminu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vminu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vminu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vminu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vminu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vminu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vminu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vminu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vminu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vminu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vminu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vminu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vminu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vminu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vminu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vminu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vminu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vminu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vminu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vminu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vminu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vminu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vminu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vminu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vminu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vminu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vminu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vminu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vminu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vminu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vminu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vminu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vminu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vminu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vminu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vminu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vminu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vminu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vminu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vminu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vminu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vminu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vminu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vminu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vminu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vminu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vminu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vminu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vminu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vminu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vminu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vminu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vminu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vminu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vminu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vminu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vminu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vminu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vminu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vminu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vminu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vminu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vminu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vminu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vminu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vminu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vminu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vminu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vminu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vminu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vminu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vminu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vminu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vminu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vminu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vminu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vminu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vminu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vminu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vminu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vminu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vminu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vminu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vminu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vminu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vminu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vminu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vminu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vminu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vminu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vminu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vminu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vminu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vminu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vminu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vminu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vminu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vminu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vminu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vminu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vminu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vminu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vminu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vminu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vminu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vminu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vminu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vminu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vminu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vminu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vminu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vminu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vminu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vminu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vminu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vminu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vminu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vminu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vminu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vminu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vminu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vminu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vminu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vminu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vminu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vminu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vminu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vminu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vminu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vminu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vminu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vminu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vminu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vminu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vminu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vminu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vminu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vminu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vminu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vminu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vminu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsbf.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsbf.c index 7b271a232b9c9cfec8972f1507e33233d9863d63..a187d97a9c2b22052853214753ecedb8a32e453c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsbf.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsbf.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsbf_m_b1_mu(vbool1_t mask, vbool1_t maskedoff, vbool1_t op1, size_t vl) { - return vmsbf_m_b1_mu(mask, maskedoff, op1, vl); + return __riscv_vmsbf_m_b1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b2_mu( @@ -21,7 +21,7 @@ vbool1_t test_vmsbf_m_b1_mu(vbool1_t mask, vbool1_t maskedoff, vbool1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsbf_m_b2_mu(vbool2_t mask, vbool2_t maskedoff, vbool2_t op1, size_t vl) { - return vmsbf_m_b2_mu(mask, maskedoff, op1, vl); + return __riscv_vmsbf_m_b2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b4_mu( @@ -30,7 +30,7 @@ vbool2_t test_vmsbf_m_b2_mu(vbool2_t mask, vbool2_t maskedoff, vbool2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsbf_m_b4_mu(vbool4_t mask, vbool4_t maskedoff, vbool4_t op1, size_t vl) { - return vmsbf_m_b4_mu(mask, maskedoff, op1, vl); + return __riscv_vmsbf_m_b4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b8_mu( @@ -39,7 +39,7 @@ vbool4_t test_vmsbf_m_b4_mu(vbool4_t mask, vbool4_t maskedoff, vbool4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsbf_m_b8_mu(vbool8_t mask, vbool8_t maskedoff, vbool8_t op1, size_t vl) { - return vmsbf_m_b8_mu(mask, maskedoff, op1, vl); + return __riscv_vmsbf_m_b8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b16_mu( @@ -48,7 +48,7 @@ vbool8_t test_vmsbf_m_b8_mu(vbool8_t mask, vbool8_t maskedoff, vbool8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsbf_m_b16_mu(vbool16_t mask, vbool16_t maskedoff, vbool16_t op1, size_t vl) { - return vmsbf_m_b16_mu(mask, maskedoff, op1, vl); + return __riscv_vmsbf_m_b16_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b32_mu( @@ -57,7 +57,7 @@ vbool16_t test_vmsbf_m_b16_mu(vbool16_t mask, vbool16_t maskedoff, vbool16_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsbf_m_b32_mu(vbool32_t mask, vbool32_t maskedoff, vbool32_t op1, size_t vl) { - return vmsbf_m_b32_mu(mask, maskedoff, op1, vl); + return __riscv_vmsbf_m_b32_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsbf_m_b64_mu( @@ -66,6 +66,6 @@ vbool32_t test_vmsbf_m_b32_mu(vbool32_t mask, vbool32_t maskedoff, vbool32_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsbf_m_b64_mu(vbool64_t mask, vbool64_t maskedoff, vbool64_t op1, size_t vl) { - return vmsbf_m_b64_mu(mask, maskedoff, op1, vl); + return __riscv_vmsbf_m_b64_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmseq.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmseq.c index b6c9efbbc19ed103d9e84654f526e984bf97fa5e..05273d8931c83980d48a8f7374d22555d56c3e12 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmseq.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmseq.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmseq_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmseq_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmseq_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmseq_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmseq_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmseq_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmseq_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmseq_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmseq_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmseq_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmseq_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmseq_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmseq_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmseq_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmseq_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmseq_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmseq_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmseq_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmseq_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmseq_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmseq_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmseq_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmseq_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmseq_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmseq_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmseq_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmseq_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmseq_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmseq_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmseq_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmseq_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmseq_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmseq_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmseq_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmseq_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmseq_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmseq_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmseq_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmseq_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmseq_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmseq_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmseq_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmseq_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmseq_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmseq_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmseq_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmseq_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmseq_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmseq_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmseq_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmseq_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmseq_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmseq_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmseq_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmseq_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmseq_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmseq_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmseq_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmseq_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmseq_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmseq_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmseq_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmseq_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmseq_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmseq_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_i64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmseq_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmseq_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_i64m8_b8_mu( @@ -400,7 +400,7 @@ vbool8_t test_vmseq_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmseq_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf8_b64_mu( @@ -409,7 +409,7 @@ vbool8_t test_vmseq_vx_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmseq_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf8_b64_mu( @@ -418,7 +418,7 @@ vbool64_t test_vmseq_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf4_b32_mu( @@ -427,7 +427,7 @@ vbool64_t test_vmseq_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmseq_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf4_b32_mu( @@ -436,7 +436,7 @@ vbool32_t test_vmseq_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8mf2_b16_mu( @@ -445,7 +445,7 @@ vbool32_t test_vmseq_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmseq_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8mf2_b16_mu( @@ -454,7 +454,7 @@ vbool16_t test_vmseq_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m1_b8_mu( @@ -463,7 +463,7 @@ vbool16_t test_vmseq_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmseq_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m1_b8_mu( @@ -472,7 +472,7 @@ vbool8_t test_vmseq_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m2_b4_mu( @@ -481,7 +481,7 @@ vbool8_t test_vmseq_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmseq_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m2_b4_mu( @@ -490,7 +490,7 @@ vbool4_t test_vmseq_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m4_b2_mu( @@ -499,7 +499,7 @@ vbool4_t test_vmseq_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmseq_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m4_b2_mu( @@ -508,7 +508,7 @@ vbool2_t test_vmseq_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u8m8_b1_mu( @@ -517,7 +517,7 @@ vbool2_t test_vmseq_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmseq_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u8m8_b1_mu( @@ -526,7 +526,7 @@ vbool1_t test_vmseq_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmseq_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmseq_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16mf4_b64_mu( @@ -535,7 +535,7 @@ vbool1_t test_vmseq_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmseq_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16mf4_b64_mu( @@ -544,7 +544,7 @@ vbool64_t test_vmseq_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16mf2_b32_mu( @@ -553,7 +553,7 @@ vbool64_t test_vmseq_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmseq_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16mf2_b32_mu( @@ -562,7 +562,7 @@ vbool32_t test_vmseq_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m1_b16_mu( @@ -571,7 +571,7 @@ vbool32_t test_vmseq_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmseq_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m1_b16_mu( @@ -580,7 +580,7 @@ vbool16_t test_vmseq_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m2_b8_mu( @@ -589,7 +589,7 @@ vbool16_t test_vmseq_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmseq_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m2_b8_mu( @@ -598,7 +598,7 @@ vbool8_t test_vmseq_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m4_b4_mu( @@ -607,7 +607,7 @@ vbool8_t test_vmseq_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmseq_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m4_b4_mu( @@ -616,7 +616,7 @@ vbool4_t test_vmseq_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u16m8_b2_mu( @@ -625,7 +625,7 @@ vbool4_t test_vmseq_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmseq_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u16m8_b2_mu( @@ -634,7 +634,7 @@ vbool2_t test_vmseq_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmseq_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmseq_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32mf2_b64_mu( @@ -643,7 +643,7 @@ vbool2_t test_vmseq_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmseq_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32mf2_b64_mu( @@ -652,7 +652,7 @@ vbool64_t test_vmseq_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m1_b32_mu( @@ -661,7 +661,7 @@ vbool64_t test_vmseq_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmseq_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m1_b32_mu( @@ -670,7 +670,7 @@ vbool32_t test_vmseq_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m2_b16_mu( @@ -679,7 +679,7 @@ vbool32_t test_vmseq_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmseq_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m2_b16_mu( @@ -688,7 +688,7 @@ vbool16_t test_vmseq_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m4_b8_mu( @@ -697,7 +697,7 @@ vbool16_t test_vmseq_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmseq_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m4_b8_mu( @@ -706,7 +706,7 @@ vbool8_t test_vmseq_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u32m8_b4_mu( @@ -715,7 +715,7 @@ vbool8_t test_vmseq_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmseq_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u32m8_b4_mu( @@ -724,7 +724,7 @@ vbool4_t test_vmseq_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmseq_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmseq_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m1_b64_mu( @@ -733,7 +733,7 @@ vbool4_t test_vmseq_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmseq_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m1_b64_mu( @@ -742,7 +742,7 @@ vbool64_t test_vmseq_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmseq_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m2_b32_mu( @@ -751,7 +751,7 @@ vbool64_t test_vmseq_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmseq_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m2_b32_mu( @@ -760,7 +760,7 @@ vbool32_t test_vmseq_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmseq_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m4_b16_mu( @@ -769,7 +769,7 @@ vbool32_t test_vmseq_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmseq_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m4_b16_mu( @@ -778,7 +778,7 @@ vbool16_t test_vmseq_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmseq_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vv_u64m8_b8_mu( @@ -787,7 +787,7 @@ vbool16_t test_vmseq_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmseq_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmseq_vx_u64m8_b8_mu( @@ -796,6 +796,6 @@ vbool8_t test_vmseq_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmseq_vx_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmseq_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmseq_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsge.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsge.c index cf92344b71d9cac780655c55ec64d5928298f80a..7da7613f2107a9117d00e3dc288c45cbc43bd7c0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsge.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsge.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsge_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmsge_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmsge_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsge_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmsge_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmsge_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsge_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmsge_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmsge_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsge_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmsge_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmsge_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsge_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmsge_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmsge_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsge_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmsge_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmsge_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsge_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsge_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmsge_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsge_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmsge_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmsge_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsge_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmsge_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmsge_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsge_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmsge_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmsge_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsge_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmsge_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmsge_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsge_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmsge_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmsge_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsge_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmsge_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmsge_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsge_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmsge_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsge_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmsge_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmsge_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsge_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmsge_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmsge_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsge_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmsge_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmsge_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsge_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmsge_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmsge_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsge_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmsge_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmsge_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsge_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmsge_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsge_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmsge_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmsge_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsge_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmsge_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsge_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmsge_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsge_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmsge_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsge_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmsge_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsge_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmsge_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsge_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vv_i64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmsge_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsge_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsge_vx_i64m8_b8_mu( @@ -400,6 +400,6 @@ vbool8_t test_vmsge_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsge_vx_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmsge_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsge_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgeu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgeu.c index 3928e59cf396367d2880c6ee5c3ed514cae26606..274cd3f72ae796b150120c3274fbef081f51095f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgeu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgeu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsgeu_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmsgeu_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmsgeu_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsgeu_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmsgeu_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmsgeu_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsgeu_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmsgeu_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmsgeu_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsgeu_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmsgeu_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmsgeu_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsgeu_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmsgeu_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmsgeu_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsgeu_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmsgeu_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmsgeu_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgeu_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsgeu_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmsgeu_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgeu_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsgeu_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmsgeu_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsgeu_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmsgeu_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmsgeu_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsgeu_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmsgeu_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmsgeu_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsgeu_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmsgeu_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmsgeu_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsgeu_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmsgeu_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmsgeu_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsgeu_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmsgeu_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmsgeu_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsgeu_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmsgeu_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgeu_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsgeu_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmsgeu_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsgeu_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmsgeu_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmsgeu_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsgeu_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmsgeu_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmsgeu_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsgeu_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmsgeu_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmsgeu_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsgeu_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmsgeu_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmsgeu_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsgeu_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmsgeu_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgeu_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsgeu_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmsgeu_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsgeu_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmsgeu_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgeu_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmsgeu_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsgeu_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmsgeu_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgeu_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmsgeu_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsgeu_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmsgeu_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgeu_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vv_u64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmsgeu_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsgeu_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgeu_vx_u64m8_b8_mu( @@ -400,6 +400,6 @@ vbool8_t test_vmsgeu_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgeu_vx_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsgeu_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgeu_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgt.c index 9deb92cdb151a50b7e0a17224abbeb7db7f4bda1..8c6d11da6ff275e94224ab560a6e98ff054fe376 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsgt_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmsgt_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmsgt_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsgt_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmsgt_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmsgt_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsgt_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmsgt_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmsgt_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsgt_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmsgt_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmsgt_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsgt_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmsgt_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmsgt_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsgt_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmsgt_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmsgt_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgt_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsgt_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmsgt_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgt_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmsgt_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmsgt_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsgt_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmsgt_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmsgt_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsgt_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmsgt_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmsgt_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsgt_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmsgt_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmsgt_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsgt_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmsgt_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmsgt_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsgt_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmsgt_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmsgt_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsgt_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmsgt_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgt_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmsgt_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmsgt_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsgt_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmsgt_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmsgt_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsgt_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmsgt_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmsgt_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsgt_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmsgt_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmsgt_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsgt_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmsgt_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmsgt_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsgt_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmsgt_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgt_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmsgt_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmsgt_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsgt_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmsgt_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgt_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmsgt_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsgt_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmsgt_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgt_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmsgt_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsgt_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmsgt_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgt_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vv_i64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmsgt_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsgt_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgt_vx_i64m8_b8_mu( @@ -400,6 +400,6 @@ vbool8_t test_vmsgt_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgt_vx_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmsgt_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgt_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgtu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgtu.c index 9bbb1f8250085ea4d4632f846725e0cfbda13014..668252c0f0ed5603a88349e85e8dc78c1a45053d 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgtu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsgtu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsgtu_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmsgtu_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmsgtu_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsgtu_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmsgtu_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmsgtu_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsgtu_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmsgtu_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmsgtu_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsgtu_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmsgtu_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmsgtu_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsgtu_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmsgtu_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmsgtu_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsgtu_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmsgtu_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmsgtu_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgtu_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsgtu_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmsgtu_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsgtu_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsgtu_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmsgtu_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsgtu_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmsgtu_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmsgtu_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsgtu_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmsgtu_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmsgtu_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsgtu_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmsgtu_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmsgtu_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsgtu_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmsgtu_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmsgtu_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsgtu_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmsgtu_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmsgtu_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsgtu_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmsgtu_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsgtu_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsgtu_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmsgtu_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsgtu_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmsgtu_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmsgtu_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsgtu_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmsgtu_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmsgtu_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsgtu_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmsgtu_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmsgtu_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsgtu_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmsgtu_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmsgtu_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsgtu_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmsgtu_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsgtu_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsgtu_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmsgtu_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsgtu_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmsgtu_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsgtu_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmsgtu_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsgtu_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmsgtu_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsgtu_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmsgtu_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsgtu_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmsgtu_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsgtu_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vv_u64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmsgtu_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsgtu_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsgtu_vx_u64m8_b8_mu( @@ -400,6 +400,6 @@ vbool8_t test_vmsgtu_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsgtu_vx_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsgtu_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsgtu_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsif.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsif.c index 4b28f6d17352ddc45ad6e7b08cef4a86befb6a58..5d7040ea4ea44c6a7f2c6bad743e9739d1b12ffb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsif.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsif.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsif_m_b1_mu(vbool1_t mask, vbool1_t maskedoff, vbool1_t op1, size_t vl) { - return vmsif_m_b1_mu(mask, maskedoff, op1, vl); + return __riscv_vmsif_m_b1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b2_mu( @@ -21,7 +21,7 @@ vbool1_t test_vmsif_m_b1_mu(vbool1_t mask, vbool1_t maskedoff, vbool1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsif_m_b2_mu(vbool2_t mask, vbool2_t maskedoff, vbool2_t op1, size_t vl) { - return vmsif_m_b2_mu(mask, maskedoff, op1, vl); + return __riscv_vmsif_m_b2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b4_mu( @@ -30,7 +30,7 @@ vbool2_t test_vmsif_m_b2_mu(vbool2_t mask, vbool2_t maskedoff, vbool2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsif_m_b4_mu(vbool4_t mask, vbool4_t maskedoff, vbool4_t op1, size_t vl) { - return vmsif_m_b4_mu(mask, maskedoff, op1, vl); + return __riscv_vmsif_m_b4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b8_mu( @@ -39,7 +39,7 @@ vbool4_t test_vmsif_m_b4_mu(vbool4_t mask, vbool4_t maskedoff, vbool4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsif_m_b8_mu(vbool8_t mask, vbool8_t maskedoff, vbool8_t op1, size_t vl) { - return vmsif_m_b8_mu(mask, maskedoff, op1, vl); + return __riscv_vmsif_m_b8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b16_mu( @@ -48,7 +48,7 @@ vbool8_t test_vmsif_m_b8_mu(vbool8_t mask, vbool8_t maskedoff, vbool8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsif_m_b16_mu(vbool16_t mask, vbool16_t maskedoff, vbool16_t op1, size_t vl) { - return vmsif_m_b16_mu(mask, maskedoff, op1, vl); + return __riscv_vmsif_m_b16_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b32_mu( @@ -57,7 +57,7 @@ vbool16_t test_vmsif_m_b16_mu(vbool16_t mask, vbool16_t maskedoff, vbool16_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsif_m_b32_mu(vbool32_t mask, vbool32_t maskedoff, vbool32_t op1, size_t vl) { - return vmsif_m_b32_mu(mask, maskedoff, op1, vl); + return __riscv_vmsif_m_b32_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsif_m_b64_mu( @@ -66,6 +66,6 @@ vbool32_t test_vmsif_m_b32_mu(vbool32_t mask, vbool32_t maskedoff, vbool32_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsif_m_b64_mu(vbool64_t mask, vbool64_t maskedoff, vbool64_t op1, size_t vl) { - return vmsif_m_b64_mu(mask, maskedoff, op1, vl); + return __riscv_vmsif_m_b64_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsle.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsle.c index e7015558cfad07abaa251900a189f6c1956e4cbc..4c4fd545f69e50b43cf92cb40f38bd4487cce852 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsle.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsle.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsle_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmsle_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmsle_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsle_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmsle_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmsle_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsle_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmsle_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmsle_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsle_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmsle_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmsle_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsle_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmsle_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmsle_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsle_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmsle_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmsle_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsle_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsle_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmsle_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsle_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmsle_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmsle_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsle_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmsle_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmsle_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsle_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmsle_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmsle_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsle_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmsle_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmsle_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsle_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmsle_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmsle_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsle_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmsle_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmsle_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsle_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmsle_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsle_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmsle_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmsle_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsle_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmsle_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmsle_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsle_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmsle_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmsle_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsle_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmsle_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmsle_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsle_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmsle_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmsle_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsle_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmsle_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsle_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmsle_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmsle_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsle_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmsle_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsle_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmsle_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsle_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmsle_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsle_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmsle_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsle_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmsle_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsle_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vv_i64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmsle_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsle_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsle_vx_i64m8_b8_mu( @@ -400,6 +400,6 @@ vbool8_t test_vmsle_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsle_vx_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmsle_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsle_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsleu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsleu.c index a51c84c3852d8e43cd3a020929cfccf837d7a0a3..7766f32ac68c73d5bac04a203c86a0c1ea852170 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsleu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsleu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsleu_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmsleu_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmsleu_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsleu_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmsleu_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmsleu_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsleu_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmsleu_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmsleu_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsleu_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmsleu_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmsleu_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsleu_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmsleu_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmsleu_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsleu_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmsleu_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmsleu_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsleu_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsleu_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmsleu_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsleu_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsleu_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmsleu_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsleu_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmsleu_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmsleu_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsleu_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmsleu_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmsleu_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsleu_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmsleu_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmsleu_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsleu_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmsleu_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmsleu_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsleu_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmsleu_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmsleu_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsleu_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmsleu_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsleu_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsleu_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmsleu_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsleu_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmsleu_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmsleu_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsleu_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmsleu_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmsleu_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsleu_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmsleu_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmsleu_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsleu_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmsleu_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmsleu_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsleu_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmsleu_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsleu_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsleu_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmsleu_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsleu_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmsleu_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsleu_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmsleu_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsleu_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmsleu_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsleu_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmsleu_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsleu_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmsleu_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsleu_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vv_u64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmsleu_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsleu_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsleu_vx_u64m8_b8_mu( @@ -400,6 +400,6 @@ vbool8_t test_vmsleu_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsleu_vx_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsleu_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsleu_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmslt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmslt.c index f3fb1e1d08c3a5a17e70c0d30fb30c716e747420..f440d6949ed70cc3df796fab0ecb5a7aa3bfa6a6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmslt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmslt.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmslt_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmslt_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmslt_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmslt_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmslt_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmslt_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmslt_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmslt_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmslt_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmslt_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmslt_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmslt_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmslt_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmslt_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmslt_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmslt_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmslt_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmslt_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmslt_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmslt_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmslt_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmslt_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmslt_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmslt_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmslt_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmslt_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmslt_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmslt_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmslt_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmslt_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmslt_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmslt_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmslt_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmslt_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmslt_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmslt_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmslt_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmslt_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmslt_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmslt_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmslt_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmslt_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmslt_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmslt_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmslt_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmslt_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmslt_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmslt_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmslt_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmslt_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmslt_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmslt_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmslt_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmslt_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmslt_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmslt_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmslt_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmslt_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmslt_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmslt_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmslt_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmslt_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmslt_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmslt_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmslt_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmslt_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmslt_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmslt_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmslt_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmslt_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmslt_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmslt_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vv_i64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmslt_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmslt_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmslt_vx_i64m8_b8_mu( @@ -400,6 +400,6 @@ vbool8_t test_vmslt_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmslt_vx_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmslt_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmslt_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsltu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsltu.c index 60acf14d1c1005d7c12b92e62dfbe6db35f5ef71..1c14767e0b054ea78fb4cc7b7df97a4670227f34 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsltu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsltu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsltu_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmsltu_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmsltu_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsltu_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmsltu_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmsltu_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsltu_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmsltu_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmsltu_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsltu_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmsltu_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmsltu_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsltu_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmsltu_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmsltu_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsltu_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmsltu_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmsltu_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsltu_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsltu_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmsltu_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsltu_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsltu_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmsltu_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsltu_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmsltu_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmsltu_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsltu_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmsltu_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmsltu_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsltu_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmsltu_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmsltu_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsltu_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmsltu_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmsltu_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsltu_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmsltu_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmsltu_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsltu_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmsltu_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsltu_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsltu_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmsltu_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsltu_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmsltu_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmsltu_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsltu_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmsltu_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmsltu_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsltu_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmsltu_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmsltu_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsltu_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmsltu_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmsltu_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsltu_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmsltu_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsltu_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsltu_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmsltu_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsltu_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmsltu_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsltu_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmsltu_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsltu_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmsltu_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsltu_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmsltu_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsltu_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmsltu_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsltu_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vv_u64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmsltu_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsltu_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsltu_vx_u64m8_b8_mu( @@ -400,6 +400,6 @@ vbool8_t test_vmsltu_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsltu_vx_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsltu_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsltu_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsne.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsne.c index 8e907a9e5efb8097371d93591994e347122fc811..a139e9492fcee7911973ab6dda94f2d0b7241df3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsne.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsne.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmsne_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf8_b64_mu( @@ -22,7 +22,7 @@ vbool64_t test_vmsne_vv_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8mf4_b32_mu( @@ -31,7 +31,7 @@ vbool64_t test_vmsne_vx_i8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmsne_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf4_b32_mu( @@ -40,7 +40,7 @@ vbool32_t test_vmsne_vv_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8mf2_b16_mu( @@ -49,7 +49,7 @@ vbool32_t test_vmsne_vx_i8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmsne_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8mf2_b16_mu( @@ -58,7 +58,7 @@ vbool16_t test_vmsne_vv_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m1_b8_mu( @@ -67,7 +67,7 @@ vbool16_t test_vmsne_vx_i8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmsne_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m1_b8_mu( @@ -76,7 +76,7 @@ vbool8_t test_vmsne_vv_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m2_b4_mu( @@ -85,7 +85,7 @@ vbool8_t test_vmsne_vx_i8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmsne_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m2_b4_mu( @@ -94,7 +94,7 @@ vbool4_t test_vmsne_vv_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m4_b2_mu( @@ -103,7 +103,7 @@ vbool4_t test_vmsne_vx_i8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmsne_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m4_b2_mu( @@ -112,7 +112,7 @@ vbool2_t test_vmsne_vv_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i8m8_b1_mu( @@ -121,7 +121,7 @@ vbool2_t test_vmsne_vx_i8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmsne_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i8m8_b1_mu( @@ -130,7 +130,7 @@ vbool1_t test_vmsne_vv_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmsne_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16mf4_b64_mu( @@ -139,7 +139,7 @@ vbool1_t test_vmsne_vx_i8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmsne_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16mf4_b64_mu( @@ -148,7 +148,7 @@ vbool64_t test_vmsne_vv_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16mf2_b32_mu( @@ -157,7 +157,7 @@ vbool64_t test_vmsne_vx_i16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmsne_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16mf2_b32_mu( @@ -166,7 +166,7 @@ vbool32_t test_vmsne_vv_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m1_b16_mu( @@ -175,7 +175,7 @@ vbool32_t test_vmsne_vx_i16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmsne_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m1_b16_mu( @@ -184,7 +184,7 @@ vbool16_t test_vmsne_vv_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m2_b8_mu( @@ -193,7 +193,7 @@ vbool16_t test_vmsne_vx_i16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmsne_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m2_b8_mu( @@ -202,7 +202,7 @@ vbool8_t test_vmsne_vv_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m4_b4_mu( @@ -211,7 +211,7 @@ vbool8_t test_vmsne_vx_i16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmsne_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m4_b4_mu( @@ -220,7 +220,7 @@ vbool4_t test_vmsne_vv_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i16m8_b2_mu( @@ -229,7 +229,7 @@ vbool4_t test_vmsne_vx_i16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmsne_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i16m8_b2_mu( @@ -238,7 +238,7 @@ vbool2_t test_vmsne_vv_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmsne_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32mf2_b64_mu( @@ -247,7 +247,7 @@ vbool2_t test_vmsne_vx_i16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmsne_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32mf2_b64_mu( @@ -256,7 +256,7 @@ vbool64_t test_vmsne_vv_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m1_b32_mu( @@ -265,7 +265,7 @@ vbool64_t test_vmsne_vx_i32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmsne_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m1_b32_mu( @@ -274,7 +274,7 @@ vbool32_t test_vmsne_vv_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m2_b16_mu( @@ -283,7 +283,7 @@ vbool32_t test_vmsne_vx_i32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmsne_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m2_b16_mu( @@ -292,7 +292,7 @@ vbool16_t test_vmsne_vv_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m4_b8_mu( @@ -301,7 +301,7 @@ vbool16_t test_vmsne_vx_i32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmsne_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m4_b8_mu( @@ -310,7 +310,7 @@ vbool8_t test_vmsne_vv_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i32m8_b4_mu( @@ -319,7 +319,7 @@ vbool8_t test_vmsne_vx_i32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmsne_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i32m8_b4_mu( @@ -328,7 +328,7 @@ vbool4_t test_vmsne_vv_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmsne_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m1_b64_mu( @@ -337,7 +337,7 @@ vbool4_t test_vmsne_vx_i32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmsne_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m1_b64_mu( @@ -346,7 +346,7 @@ vbool64_t test_vmsne_vv_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m2_b32_mu( @@ -355,7 +355,7 @@ vbool64_t test_vmsne_vx_i64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmsne_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m2_b32_mu( @@ -364,7 +364,7 @@ vbool32_t test_vmsne_vv_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m4_b16_mu( @@ -373,7 +373,7 @@ vbool32_t test_vmsne_vx_i64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmsne_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m4_b16_mu( @@ -382,7 +382,7 @@ vbool16_t test_vmsne_vv_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_i64m8_b8_mu( @@ -391,7 +391,7 @@ vbool16_t test_vmsne_vx_i64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmsne_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_i64m8_b8_mu( @@ -400,7 +400,7 @@ vbool8_t test_vmsne_vv_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmsne_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_i64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf8_b64_mu( @@ -409,7 +409,7 @@ vbool8_t test_vmsne_vx_i64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmsne_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf8_b64_mu( @@ -418,7 +418,7 @@ vbool64_t test_vmsne_vv_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u8mf8_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf4_b32_mu( @@ -427,7 +427,7 @@ vbool64_t test_vmsne_vx_u8mf8_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmsne_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf4_b32_mu( @@ -436,7 +436,7 @@ vbool32_t test_vmsne_vv_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u8mf4_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8mf2_b16_mu( @@ -445,7 +445,7 @@ vbool32_t test_vmsne_vx_u8mf4_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmsne_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8mf2_b16_mu( @@ -454,7 +454,7 @@ vbool16_t test_vmsne_vv_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u8mf2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m1_b8_mu( @@ -463,7 +463,7 @@ vbool16_t test_vmsne_vx_u8mf2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmsne_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m1_b8_mu( @@ -472,7 +472,7 @@ vbool8_t test_vmsne_vv_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u8m1_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m2_b4_mu( @@ -481,7 +481,7 @@ vbool8_t test_vmsne_vx_u8m1_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmsne_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m2_b4_mu( @@ -490,7 +490,7 @@ vbool4_t test_vmsne_vv_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u8m2_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m4_b2_mu( @@ -499,7 +499,7 @@ vbool4_t test_vmsne_vx_u8m2_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmsne_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m4_b2_mu( @@ -508,7 +508,7 @@ vbool2_t test_vmsne_vv_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u8m4_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u8m8_b1_mu( @@ -517,7 +517,7 @@ vbool2_t test_vmsne_vx_u8m4_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmsne_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u8m8_b1_mu( @@ -526,7 +526,7 @@ vbool1_t test_vmsne_vv_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsne_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmsne_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u8m8_b1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16mf4_b64_mu( @@ -535,7 +535,7 @@ vbool1_t test_vmsne_vx_u8m8_b1_mu(vbool1_t mask, vbool1_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmsne_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16mf4_b64_mu( @@ -544,7 +544,7 @@ vbool64_t test_vmsne_vv_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u16mf4_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16mf2_b32_mu( @@ -553,7 +553,7 @@ vbool64_t test_vmsne_vx_u16mf4_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmsne_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16mf2_b32_mu( @@ -562,7 +562,7 @@ vbool32_t test_vmsne_vv_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u16mf2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m1_b16_mu( @@ -571,7 +571,7 @@ vbool32_t test_vmsne_vx_u16mf2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmsne_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m1_b16_mu( @@ -580,7 +580,7 @@ vbool16_t test_vmsne_vv_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u16m1_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m2_b8_mu( @@ -589,7 +589,7 @@ vbool16_t test_vmsne_vx_u16m1_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmsne_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m2_b8_mu( @@ -598,7 +598,7 @@ vbool8_t test_vmsne_vv_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u16m2_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m4_b4_mu( @@ -607,7 +607,7 @@ vbool8_t test_vmsne_vx_u16m2_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmsne_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m4_b4_mu( @@ -616,7 +616,7 @@ vbool4_t test_vmsne_vv_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u16m4_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u16m8_b2_mu( @@ -625,7 +625,7 @@ vbool4_t test_vmsne_vx_u16m4_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmsne_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u16m8_b2_mu( @@ -634,7 +634,7 @@ vbool2_t test_vmsne_vv_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsne_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmsne_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u16m8_b2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32mf2_b64_mu( @@ -643,7 +643,7 @@ vbool2_t test_vmsne_vx_u16m8_b2_mu(vbool2_t mask, vbool2_t maskedoff, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmsne_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32mf2_b64_mu( @@ -652,7 +652,7 @@ vbool64_t test_vmsne_vv_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u32mf2_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m1_b32_mu( @@ -661,7 +661,7 @@ vbool64_t test_vmsne_vx_u32mf2_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmsne_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m1_b32_mu( @@ -670,7 +670,7 @@ vbool32_t test_vmsne_vv_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u32m1_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m2_b16_mu( @@ -679,7 +679,7 @@ vbool32_t test_vmsne_vx_u32m1_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmsne_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m2_b16_mu( @@ -688,7 +688,7 @@ vbool16_t test_vmsne_vv_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u32m2_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m4_b8_mu( @@ -697,7 +697,7 @@ vbool16_t test_vmsne_vx_u32m2_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmsne_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m4_b8_mu( @@ -706,7 +706,7 @@ vbool8_t test_vmsne_vv_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u32m4_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u32m8_b4_mu( @@ -715,7 +715,7 @@ vbool8_t test_vmsne_vx_u32m4_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmsne_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u32m8_b4_mu( @@ -724,7 +724,7 @@ vbool4_t test_vmsne_vv_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsne_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmsne_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u32m8_b4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m1_b64_mu( @@ -733,7 +733,7 @@ vbool4_t test_vmsne_vx_u32m8_b4_mu(vbool4_t mask, vbool4_t maskedoff, vuint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmsne_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m1_b64_mu( @@ -742,7 +742,7 @@ vbool64_t test_vmsne_vv_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsne_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u64m1_b64_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m2_b32_mu( @@ -751,7 +751,7 @@ vbool64_t test_vmsne_vx_u64m1_b64_mu(vbool64_t mask, vbool64_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmsne_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m2_b32_mu( @@ -760,7 +760,7 @@ vbool32_t test_vmsne_vv_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsne_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u64m2_b32_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m4_b16_mu( @@ -769,7 +769,7 @@ vbool32_t test_vmsne_vx_u64m2_b32_mu(vbool32_t mask, vbool32_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmsne_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m4_b16_mu( @@ -778,7 +778,7 @@ vbool16_t test_vmsne_vv_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsne_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u64m4_b16_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vv_u64m8_b8_mu( @@ -787,7 +787,7 @@ vbool16_t test_vmsne_vx_u64m4_b16_mu(vbool16_t mask, vbool16_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmsne_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vv_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmsne_vx_u64m8_b8_mu( @@ -796,6 +796,6 @@ vbool8_t test_vmsne_vv_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsne_vx_u64m8_b8_mu(vbool8_t mask, vbool8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmsne_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmsne_vx_u64m8_b8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsof.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsof.c index d760538a63fdedc1db863c553402cb7ad86e7179..f12153203ef55852d23a0405b428fd0a90837cc0 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsof.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmsof.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vbool1_t test_vmsof_m_b1_mu(vbool1_t mask, vbool1_t maskedoff, vbool1_t op1, size_t vl) { - return vmsof_m_b1_mu(mask, maskedoff, op1, vl); + return __riscv_vmsof_m_b1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b2_mu( @@ -21,7 +21,7 @@ vbool1_t test_vmsof_m_b1_mu(vbool1_t mask, vbool1_t maskedoff, vbool1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool2_t test_vmsof_m_b2_mu(vbool2_t mask, vbool2_t maskedoff, vbool2_t op1, size_t vl) { - return vmsof_m_b2_mu(mask, maskedoff, op1, vl); + return __riscv_vmsof_m_b2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b4_mu( @@ -30,7 +30,7 @@ vbool2_t test_vmsof_m_b2_mu(vbool2_t mask, vbool2_t maskedoff, vbool2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool4_t test_vmsof_m_b4_mu(vbool4_t mask, vbool4_t maskedoff, vbool4_t op1, size_t vl) { - return vmsof_m_b4_mu(mask, maskedoff, op1, vl); + return __riscv_vmsof_m_b4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b8_mu( @@ -39,7 +39,7 @@ vbool4_t test_vmsof_m_b4_mu(vbool4_t mask, vbool4_t maskedoff, vbool4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool8_t test_vmsof_m_b8_mu(vbool8_t mask, vbool8_t maskedoff, vbool8_t op1, size_t vl) { - return vmsof_m_b8_mu(mask, maskedoff, op1, vl); + return __riscv_vmsof_m_b8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b16_mu( @@ -48,7 +48,7 @@ vbool8_t test_vmsof_m_b8_mu(vbool8_t mask, vbool8_t maskedoff, vbool8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vbool16_t test_vmsof_m_b16_mu(vbool16_t mask, vbool16_t maskedoff, vbool16_t op1, size_t vl) { - return vmsof_m_b16_mu(mask, maskedoff, op1, vl); + return __riscv_vmsof_m_b16_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b32_mu( @@ -57,7 +57,7 @@ vbool16_t test_vmsof_m_b16_mu(vbool16_t mask, vbool16_t maskedoff, vbool16_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool32_t test_vmsof_m_b32_mu(vbool32_t mask, vbool32_t maskedoff, vbool32_t op1, size_t vl) { - return vmsof_m_b32_mu(mask, maskedoff, op1, vl); + return __riscv_vmsof_m_b32_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vmsof_m_b64_mu( @@ -66,6 +66,6 @@ vbool32_t test_vmsof_m_b32_mu(vbool32_t mask, vbool32_t maskedoff, vbool32_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vbool64_t test_vmsof_m_b64_mu(vbool64_t mask, vbool64_t maskedoff, vbool64_t op1, size_t vl) { - return vmsof_m_b64_mu(mask, maskedoff, op1, vl); + return __riscv_vmsof_m_b64_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmul.c index e27248b243809d5ba1f43e720c66cb427944de5f..8b590a73ac09c4169d580e38d88c3334afa3697b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmul.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmul_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vmul_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vmul_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmul_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vmul_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vmul_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmul_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vmul_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vmul_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmul_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vmul_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vmul_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmul_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vmul_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vmul_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmul_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vmul_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vmul_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmul_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vmul_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vmul_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmul_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vmul_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vmul_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmul_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vmul_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vmul_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmul_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vmul_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vmul_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmul_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vmul_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vmul_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmul_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vmul_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vmul_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmul_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vmul_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vmul_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmul_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vmul_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vmul_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmul_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vmul_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vmul_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmul_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vmul_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vmul_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmul_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vmul_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vmul_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmul_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vmul_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vmul_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmul_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vmul_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vmul_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmul_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vmul_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vmul_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmul_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vmul_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vmul_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmul_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vmul_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vmul_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmul_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vmul_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vmul_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmul_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vmul_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vmul_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmul_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vmul_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vmul_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmul_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vmul_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vmul_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmul_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vmul_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vmul_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmul_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vmul_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vmul_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmul_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vmul_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vmul_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmul_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vmul_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vmul_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmul_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vmul_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vmul_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmul_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vmul_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vmul_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmul_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vmul_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vmul_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmul_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vmul_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vmul_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmul_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vmul_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vmul_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmul_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vmul_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vmul_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmul_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vmul_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vmul_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmul_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vmul_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vmul_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmul_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vmul_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vmul_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmul_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vmul_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vmul_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmul_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vmul_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vmul_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmul_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vmul_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vmul_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmul_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vmul_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vmul_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmul_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m8_tu( @@ -795,7 +795,7 @@ vuint64m8_t test_vmul_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf8_tum( @@ -804,7 +804,7 @@ vuint64m8_t test_vmul_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmul_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf8_tum( @@ -813,7 +813,7 @@ vint8mf8_t test_vmul_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf4_tum( @@ -822,7 +822,7 @@ vint8mf8_t test_vmul_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmul_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf4_tum( @@ -831,7 +831,7 @@ vint8mf4_t test_vmul_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf2_tum( @@ -840,7 +840,7 @@ vint8mf4_t test_vmul_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmul_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf2_tum( @@ -849,7 +849,7 @@ vint8mf2_t test_vmul_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m1_tum( @@ -858,7 +858,7 @@ vint8mf2_t test_vmul_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmul_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m1_tum( @@ -867,7 +867,7 @@ vint8m1_t test_vmul_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m2_tum( @@ -876,7 +876,7 @@ vint8m1_t test_vmul_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmul_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m2_tum( @@ -885,7 +885,7 @@ vint8m2_t test_vmul_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m4_tum( @@ -894,7 +894,7 @@ vint8m2_t test_vmul_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmul_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m4_tum( @@ -903,7 +903,7 @@ vint8m4_t test_vmul_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m8_tum( @@ -912,7 +912,7 @@ vint8m4_t test_vmul_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmul_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m8_tum( @@ -921,7 +921,7 @@ vint8m8_t test_vmul_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf4_tum( @@ -930,7 +930,7 @@ vint8m8_t test_vmul_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmul_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf4_tum( @@ -939,7 +939,7 @@ vint16mf4_t test_vmul_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf2_tum( @@ -948,7 +948,7 @@ vint16mf4_t test_vmul_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmul_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf2_tum( @@ -957,7 +957,7 @@ vint16mf2_t test_vmul_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m1_tum( @@ -966,7 +966,7 @@ vint16mf2_t test_vmul_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmul_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m1_tum( @@ -975,7 +975,7 @@ vint16m1_t test_vmul_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m2_tum( @@ -984,7 +984,7 @@ vint16m1_t test_vmul_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmul_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m2_tum( @@ -993,7 +993,7 @@ vint16m2_t test_vmul_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m4_tum( @@ -1002,7 +1002,7 @@ vint16m2_t test_vmul_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmul_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m4_tum( @@ -1011,7 +1011,7 @@ vint16m4_t test_vmul_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m8_tum( @@ -1020,7 +1020,7 @@ vint16m4_t test_vmul_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmul_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m8_tum( @@ -1029,7 +1029,7 @@ vint16m8_t test_vmul_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32mf2_tum( @@ -1038,7 +1038,7 @@ vint16m8_t test_vmul_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmul_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32mf2_tum( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vmul_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m1_tum( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vmul_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmul_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m1_tum( @@ -1065,7 +1065,7 @@ vint32m1_t test_vmul_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m2_tum( @@ -1074,7 +1074,7 @@ vint32m1_t test_vmul_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmul_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m2_tum( @@ -1083,7 +1083,7 @@ vint32m2_t test_vmul_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m4_tum( @@ -1092,7 +1092,7 @@ vint32m2_t test_vmul_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmul_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m4_tum( @@ -1101,7 +1101,7 @@ vint32m4_t test_vmul_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m8_tum( @@ -1110,7 +1110,7 @@ vint32m4_t test_vmul_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmul_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m8_tum( @@ -1119,7 +1119,7 @@ vint32m8_t test_vmul_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m1_tum( @@ -1128,7 +1128,7 @@ vint32m8_t test_vmul_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmul_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m1_tum( @@ -1137,7 +1137,7 @@ vint64m1_t test_vmul_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m2_tum( @@ -1146,7 +1146,7 @@ vint64m1_t test_vmul_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmul_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m2_tum( @@ -1155,7 +1155,7 @@ vint64m2_t test_vmul_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m4_tum( @@ -1164,7 +1164,7 @@ vint64m2_t test_vmul_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmul_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m4_tum( @@ -1173,7 +1173,7 @@ vint64m4_t test_vmul_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m8_tum( @@ -1182,7 +1182,7 @@ vint64m4_t test_vmul_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmul_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m8_tum( @@ -1191,7 +1191,7 @@ vint64m8_t test_vmul_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf8_tum( @@ -1200,7 +1200,7 @@ vint64m8_t test_vmul_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmul_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf8_tum( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vmul_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf4_tum( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vmul_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmul_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf4_tum( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vmul_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf2_tum( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vmul_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmul_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf2_tum( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vmul_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m1_tum( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vmul_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmul_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m1_tum( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vmul_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m2_tum( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vmul_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmul_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m2_tum( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vmul_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m4_tum( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vmul_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmul_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m4_tum( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vmul_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m8_tum( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vmul_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmul_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m8_tum( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vmul_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf4_tum( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vmul_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmul_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf4_tum( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vmul_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf2_tum( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vmul_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmul_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf2_tum( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vmul_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m1_tum( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vmul_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmul_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m1_tum( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vmul_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m2_tum( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vmul_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmul_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m2_tum( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vmul_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m4_tum( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vmul_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmul_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m4_tum( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vmul_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m8_tum( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vmul_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmul_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m8_tum( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vmul_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32mf2_tum( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vmul_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmul_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32mf2_tum( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vmul_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m1_tum( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vmul_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmul_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m1_tum( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vmul_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m2_tum( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vmul_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmul_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m2_tum( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vmul_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m4_tum( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vmul_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmul_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m4_tum( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vmul_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m8_tum( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vmul_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmul_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m8_tum( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vmul_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m1_tum( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vmul_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmul_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m1_tum( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vmul_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m2_tum( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vmul_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmul_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m2_tum( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vmul_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m4_tum( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vmul_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmul_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m4_tum( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vmul_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m8_tum( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vmul_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmul_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m8_tum( @@ -1587,7 +1587,7 @@ vuint64m8_t test_vmul_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf8_tumu( @@ -1596,7 +1596,7 @@ vuint64m8_t test_vmul_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmul_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf8_tumu( @@ -1605,7 +1605,7 @@ vint8mf8_t test_vmul_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf4_tumu( @@ -1614,7 +1614,7 @@ vint8mf8_t test_vmul_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmul_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf4_tumu( @@ -1623,7 +1623,7 @@ vint8mf4_t test_vmul_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf2_tumu( @@ -1632,7 +1632,7 @@ vint8mf4_t test_vmul_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmul_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf2_tumu( @@ -1641,7 +1641,7 @@ vint8mf2_t test_vmul_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m1_tumu( @@ -1650,7 +1650,7 @@ vint8mf2_t test_vmul_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmul_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m1_tumu( @@ -1659,7 +1659,7 @@ vint8m1_t test_vmul_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m2_tumu( @@ -1668,7 +1668,7 @@ vint8m1_t test_vmul_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmul_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m2_tumu( @@ -1677,7 +1677,7 @@ vint8m2_t test_vmul_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m4_tumu( @@ -1686,7 +1686,7 @@ vint8m2_t test_vmul_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmul_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m4_tumu( @@ -1695,7 +1695,7 @@ vint8m4_t test_vmul_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m8_tumu( @@ -1704,7 +1704,7 @@ vint8m4_t test_vmul_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmul_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m8_tumu( @@ -1713,7 +1713,7 @@ vint8m8_t test_vmul_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf4_tumu( @@ -1722,7 +1722,7 @@ vint8m8_t test_vmul_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmul_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf4_tumu( @@ -1731,7 +1731,7 @@ vint16mf4_t test_vmul_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf2_tumu( @@ -1740,7 +1740,7 @@ vint16mf4_t test_vmul_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmul_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf2_tumu( @@ -1749,7 +1749,7 @@ vint16mf2_t test_vmul_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m1_tumu( @@ -1758,7 +1758,7 @@ vint16mf2_t test_vmul_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmul_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m1_tumu( @@ -1767,7 +1767,7 @@ vint16m1_t test_vmul_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m2_tumu( @@ -1776,7 +1776,7 @@ vint16m1_t test_vmul_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmul_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m2_tumu( @@ -1785,7 +1785,7 @@ vint16m2_t test_vmul_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m4_tumu( @@ -1794,7 +1794,7 @@ vint16m2_t test_vmul_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmul_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m4_tumu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vmul_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m8_tumu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vmul_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmul_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m8_tumu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vmul_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32mf2_tumu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vmul_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmul_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32mf2_tumu( @@ -1839,7 +1839,7 @@ vint32mf2_t test_vmul_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m1_tumu( @@ -1848,7 +1848,7 @@ vint32mf2_t test_vmul_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmul_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m1_tumu( @@ -1857,7 +1857,7 @@ vint32m1_t test_vmul_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m2_tumu( @@ -1866,7 +1866,7 @@ vint32m1_t test_vmul_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmul_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m2_tumu( @@ -1875,7 +1875,7 @@ vint32m2_t test_vmul_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m4_tumu( @@ -1884,7 +1884,7 @@ vint32m2_t test_vmul_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmul_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m4_tumu( @@ -1893,7 +1893,7 @@ vint32m4_t test_vmul_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m8_tumu( @@ -1902,7 +1902,7 @@ vint32m4_t test_vmul_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmul_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m8_tumu( @@ -1911,7 +1911,7 @@ vint32m8_t test_vmul_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m1_tumu( @@ -1920,7 +1920,7 @@ vint32m8_t test_vmul_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmul_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m1_tumu( @@ -1929,7 +1929,7 @@ vint64m1_t test_vmul_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m2_tumu( @@ -1938,7 +1938,7 @@ vint64m1_t test_vmul_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmul_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m2_tumu( @@ -1947,7 +1947,7 @@ vint64m2_t test_vmul_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m4_tumu( @@ -1956,7 +1956,7 @@ vint64m2_t test_vmul_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmul_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m4_tumu( @@ -1965,7 +1965,7 @@ vint64m4_t test_vmul_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m8_tumu( @@ -1974,7 +1974,7 @@ vint64m4_t test_vmul_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmul_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m8_tumu( @@ -1983,7 +1983,7 @@ vint64m8_t test_vmul_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf8_tumu( @@ -1992,7 +1992,7 @@ vint64m8_t test_vmul_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmul_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf8_tumu( @@ -2001,7 +2001,7 @@ vuint8mf8_t test_vmul_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf4_tumu( @@ -2010,7 +2010,7 @@ vuint8mf8_t test_vmul_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmul_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf4_tumu( @@ -2019,7 +2019,7 @@ vuint8mf4_t test_vmul_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf2_tumu( @@ -2028,7 +2028,7 @@ vuint8mf4_t test_vmul_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmul_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf2_tumu( @@ -2037,7 +2037,7 @@ vuint8mf2_t test_vmul_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m1_tumu( @@ -2046,7 +2046,7 @@ vuint8mf2_t test_vmul_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmul_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m1_tumu( @@ -2055,7 +2055,7 @@ vuint8m1_t test_vmul_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m2_tumu( @@ -2064,7 +2064,7 @@ vuint8m1_t test_vmul_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmul_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m2_tumu( @@ -2073,7 +2073,7 @@ vuint8m2_t test_vmul_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m4_tumu( @@ -2082,7 +2082,7 @@ vuint8m2_t test_vmul_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmul_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m4_tumu( @@ -2091,7 +2091,7 @@ vuint8m4_t test_vmul_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m8_tumu( @@ -2100,7 +2100,7 @@ vuint8m4_t test_vmul_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmul_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m8_tumu( @@ -2109,7 +2109,7 @@ vuint8m8_t test_vmul_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf4_tumu( @@ -2118,7 +2118,7 @@ vuint8m8_t test_vmul_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmul_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf4_tumu( @@ -2127,7 +2127,7 @@ vuint16mf4_t test_vmul_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf2_tumu( @@ -2136,7 +2136,7 @@ vuint16mf4_t test_vmul_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmul_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf2_tumu( @@ -2145,7 +2145,7 @@ vuint16mf2_t test_vmul_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m1_tumu( @@ -2154,7 +2154,7 @@ vuint16mf2_t test_vmul_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmul_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m1_tumu( @@ -2163,7 +2163,7 @@ vuint16m1_t test_vmul_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m2_tumu( @@ -2172,7 +2172,7 @@ vuint16m1_t test_vmul_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmul_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m2_tumu( @@ -2181,7 +2181,7 @@ vuint16m2_t test_vmul_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m4_tumu( @@ -2190,7 +2190,7 @@ vuint16m2_t test_vmul_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmul_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m4_tumu( @@ -2199,7 +2199,7 @@ vuint16m4_t test_vmul_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m8_tumu( @@ -2208,7 +2208,7 @@ vuint16m4_t test_vmul_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmul_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m8_tumu( @@ -2217,7 +2217,7 @@ vuint16m8_t test_vmul_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32mf2_tumu( @@ -2226,7 +2226,7 @@ vuint16m8_t test_vmul_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmul_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32mf2_tumu( @@ -2235,7 +2235,7 @@ vuint32mf2_t test_vmul_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m1_tumu( @@ -2244,7 +2244,7 @@ vuint32mf2_t test_vmul_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmul_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m1_tumu( @@ -2253,7 +2253,7 @@ vuint32m1_t test_vmul_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m2_tumu( @@ -2262,7 +2262,7 @@ vuint32m1_t test_vmul_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmul_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m2_tumu( @@ -2271,7 +2271,7 @@ vuint32m2_t test_vmul_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m4_tumu( @@ -2280,7 +2280,7 @@ vuint32m2_t test_vmul_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmul_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m4_tumu( @@ -2289,7 +2289,7 @@ vuint32m4_t test_vmul_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m8_tumu( @@ -2298,7 +2298,7 @@ vuint32m4_t test_vmul_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmul_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m8_tumu( @@ -2307,7 +2307,7 @@ vuint32m8_t test_vmul_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m1_tumu( @@ -2316,7 +2316,7 @@ vuint32m8_t test_vmul_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmul_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m1_tumu( @@ -2325,7 +2325,7 @@ vuint64m1_t test_vmul_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m2_tumu( @@ -2334,7 +2334,7 @@ vuint64m1_t test_vmul_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmul_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m2_tumu( @@ -2343,7 +2343,7 @@ vuint64m2_t test_vmul_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m4_tumu( @@ -2352,7 +2352,7 @@ vuint64m2_t test_vmul_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmul_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m4_tumu( @@ -2361,7 +2361,7 @@ vuint64m4_t test_vmul_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m8_tumu( @@ -2370,7 +2370,7 @@ vuint64m4_t test_vmul_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmul_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m8_tumu( @@ -2379,7 +2379,7 @@ vuint64m8_t test_vmul_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf8_mu( @@ -2388,7 +2388,7 @@ vuint64m8_t test_vmul_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmul_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf8_mu( @@ -2397,7 +2397,7 @@ vint8mf8_t test_vmul_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmul_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf4_mu( @@ -2406,7 +2406,7 @@ vint8mf8_t test_vmul_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmul_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf4_mu( @@ -2415,7 +2415,7 @@ vint8mf4_t test_vmul_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmul_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8mf2_mu( @@ -2424,7 +2424,7 @@ vint8mf4_t test_vmul_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmul_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8mf2_mu( @@ -2433,7 +2433,7 @@ vint8mf2_t test_vmul_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmul_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m1_mu( @@ -2442,7 +2442,7 @@ vint8mf2_t test_vmul_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmul_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m1_mu( @@ -2451,7 +2451,7 @@ vint8m1_t test_vmul_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmul_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m2_mu( @@ -2460,7 +2460,7 @@ vint8m1_t test_vmul_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmul_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m2_mu( @@ -2469,7 +2469,7 @@ vint8m2_t test_vmul_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmul_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m4_mu( @@ -2478,7 +2478,7 @@ vint8m2_t test_vmul_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmul_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m4_mu( @@ -2487,7 +2487,7 @@ vint8m4_t test_vmul_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmul_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i8m8_mu( @@ -2496,7 +2496,7 @@ vint8m4_t test_vmul_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmul_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i8m8_mu( @@ -2505,7 +2505,7 @@ vint8m8_t test_vmul_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmul_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmul_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf4_mu( @@ -2514,7 +2514,7 @@ vint8m8_t test_vmul_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmul_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf4_mu( @@ -2523,7 +2523,7 @@ vint16mf4_t test_vmul_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmul_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16mf2_mu( @@ -2532,7 +2532,7 @@ vint16mf4_t test_vmul_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmul_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16mf2_mu( @@ -2541,7 +2541,7 @@ vint16mf2_t test_vmul_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmul_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m1_mu( @@ -2550,7 +2550,7 @@ vint16mf2_t test_vmul_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmul_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m1_mu( @@ -2559,7 +2559,7 @@ vint16m1_t test_vmul_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmul_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m2_mu( @@ -2568,7 +2568,7 @@ vint16m1_t test_vmul_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmul_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m2_mu( @@ -2577,7 +2577,7 @@ vint16m2_t test_vmul_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmul_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m4_mu( @@ -2586,7 +2586,7 @@ vint16m2_t test_vmul_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmul_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m4_mu( @@ -2595,7 +2595,7 @@ vint16m4_t test_vmul_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmul_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i16m8_mu( @@ -2604,7 +2604,7 @@ vint16m4_t test_vmul_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmul_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i16m8_mu( @@ -2613,7 +2613,7 @@ vint16m8_t test_vmul_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmul_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmul_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32mf2_mu( @@ -2622,7 +2622,7 @@ vint16m8_t test_vmul_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmul_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32mf2_mu( @@ -2631,7 +2631,7 @@ vint32mf2_t test_vmul_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmul_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m1_mu( @@ -2640,7 +2640,7 @@ vint32mf2_t test_vmul_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmul_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m1_mu( @@ -2649,7 +2649,7 @@ vint32m1_t test_vmul_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmul_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m2_mu( @@ -2658,7 +2658,7 @@ vint32m1_t test_vmul_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmul_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m2_mu( @@ -2667,7 +2667,7 @@ vint32m2_t test_vmul_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmul_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m4_mu( @@ -2676,7 +2676,7 @@ vint32m2_t test_vmul_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmul_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m4_mu( @@ -2685,7 +2685,7 @@ vint32m4_t test_vmul_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmul_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i32m8_mu( @@ -2694,7 +2694,7 @@ vint32m4_t test_vmul_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmul_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i32m8_mu( @@ -2703,7 +2703,7 @@ vint32m8_t test_vmul_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmul_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmul_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m1_mu( @@ -2712,7 +2712,7 @@ vint32m8_t test_vmul_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmul_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m1_mu( @@ -2721,7 +2721,7 @@ vint64m1_t test_vmul_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmul_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m2_mu( @@ -2730,7 +2730,7 @@ vint64m1_t test_vmul_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmul_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m2_mu( @@ -2739,7 +2739,7 @@ vint64m2_t test_vmul_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmul_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m4_mu( @@ -2748,7 +2748,7 @@ vint64m2_t test_vmul_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmul_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m4_mu( @@ -2757,7 +2757,7 @@ vint64m4_t test_vmul_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmul_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_i64m8_mu( @@ -2766,7 +2766,7 @@ vint64m4_t test_vmul_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmul_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_i64m8_mu( @@ -2775,7 +2775,7 @@ vint64m8_t test_vmul_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmul_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmul_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf8_mu( @@ -2784,7 +2784,7 @@ vint64m8_t test_vmul_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmul_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf8_mu( @@ -2793,7 +2793,7 @@ vuint8mf8_t test_vmul_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmul_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf4_mu( @@ -2802,7 +2802,7 @@ vuint8mf8_t test_vmul_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmul_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf4_mu( @@ -2811,7 +2811,7 @@ vuint8mf4_t test_vmul_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmul_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8mf2_mu( @@ -2820,7 +2820,7 @@ vuint8mf4_t test_vmul_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmul_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8mf2_mu( @@ -2829,7 +2829,7 @@ vuint8mf2_t test_vmul_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmul_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m1_mu( @@ -2838,7 +2838,7 @@ vuint8mf2_t test_vmul_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmul_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m1_mu( @@ -2847,7 +2847,7 @@ vuint8m1_t test_vmul_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmul_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m2_mu( @@ -2856,7 +2856,7 @@ vuint8m1_t test_vmul_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmul_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m2_mu( @@ -2865,7 +2865,7 @@ vuint8m2_t test_vmul_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmul_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m4_mu( @@ -2874,7 +2874,7 @@ vuint8m2_t test_vmul_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmul_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m4_mu( @@ -2883,7 +2883,7 @@ vuint8m4_t test_vmul_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmul_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u8m8_mu( @@ -2892,7 +2892,7 @@ vuint8m4_t test_vmul_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmul_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u8m8_mu( @@ -2901,7 +2901,7 @@ vuint8m8_t test_vmul_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmul_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmul_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf4_mu( @@ -2910,7 +2910,7 @@ vuint8m8_t test_vmul_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmul_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf4_mu( @@ -2919,7 +2919,7 @@ vuint16mf4_t test_vmul_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmul_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16mf2_mu( @@ -2928,7 +2928,7 @@ vuint16mf4_t test_vmul_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmul_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16mf2_mu( @@ -2937,7 +2937,7 @@ vuint16mf2_t test_vmul_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmul_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m1_mu( @@ -2946,7 +2946,7 @@ vuint16mf2_t test_vmul_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmul_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m1_mu( @@ -2955,7 +2955,7 @@ vuint16m1_t test_vmul_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmul_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m2_mu( @@ -2964,7 +2964,7 @@ vuint16m1_t test_vmul_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmul_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m2_mu( @@ -2973,7 +2973,7 @@ vuint16m2_t test_vmul_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmul_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m4_mu( @@ -2982,7 +2982,7 @@ vuint16m2_t test_vmul_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmul_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m4_mu( @@ -2991,7 +2991,7 @@ vuint16m4_t test_vmul_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmul_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u16m8_mu( @@ -3000,7 +3000,7 @@ vuint16m4_t test_vmul_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmul_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u16m8_mu( @@ -3009,7 +3009,7 @@ vuint16m8_t test_vmul_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmul_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmul_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32mf2_mu( @@ -3018,7 +3018,7 @@ vuint16m8_t test_vmul_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmul_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32mf2_mu( @@ -3027,7 +3027,7 @@ vuint32mf2_t test_vmul_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmul_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m1_mu( @@ -3036,7 +3036,7 @@ vuint32mf2_t test_vmul_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmul_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m1_mu( @@ -3045,7 +3045,7 @@ vuint32m1_t test_vmul_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmul_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m2_mu( @@ -3054,7 +3054,7 @@ vuint32m1_t test_vmul_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmul_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m2_mu( @@ -3063,7 +3063,7 @@ vuint32m2_t test_vmul_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmul_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m4_mu( @@ -3072,7 +3072,7 @@ vuint32m2_t test_vmul_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmul_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m4_mu( @@ -3081,7 +3081,7 @@ vuint32m4_t test_vmul_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmul_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u32m8_mu( @@ -3090,7 +3090,7 @@ vuint32m4_t test_vmul_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmul_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u32m8_mu( @@ -3099,7 +3099,7 @@ vuint32m8_t test_vmul_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmul_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmul_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m1_mu( @@ -3108,7 +3108,7 @@ vuint32m8_t test_vmul_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmul_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m1_mu( @@ -3117,7 +3117,7 @@ vuint64m1_t test_vmul_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmul_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m2_mu( @@ -3126,7 +3126,7 @@ vuint64m1_t test_vmul_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmul_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m2_mu( @@ -3135,7 +3135,7 @@ vuint64m2_t test_vmul_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmul_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m4_mu( @@ -3144,7 +3144,7 @@ vuint64m2_t test_vmul_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmul_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m4_mu( @@ -3153,7 +3153,7 @@ vuint64m4_t test_vmul_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmul_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vv_u64m8_mu( @@ -3162,7 +3162,7 @@ vuint64m4_t test_vmul_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmul_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmul_vx_u64m8_mu( @@ -3171,6 +3171,6 @@ vuint64m8_t test_vmul_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmul_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmul_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmul_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulh.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulh.c index 4b81aa3d5cfd6ee8e12454498829e047e2ef9679..621d129ea80c14b1cec4b781f5ff5350923766b6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulh.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulh.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmulh_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vmulh_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vmulh_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmulh_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vmulh_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vmulh_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmulh_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vmulh_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vmulh_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmulh_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vmulh_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vmulh_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmulh_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vmulh_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vmulh_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmulh_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vmulh_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vmulh_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmulh_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vmulh_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vmulh_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmulh_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vmulh_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vmulh_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmulh_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vmulh_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vmulh_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmulh_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vmulh_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vmulh_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmulh_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vmulh_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vmulh_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmulh_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vmulh_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vmulh_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmulh_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vmulh_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vmulh_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmulh_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vmulh_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vmulh_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmulh_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vmulh_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vmulh_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmulh_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vmulh_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vmulh_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmulh_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vmulh_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vmulh_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmulh_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vmulh_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vmulh_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmulh_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vmulh_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vmulh_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmulh_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vmulh_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vmulh_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmulh_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vmulh_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vmulh_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmulh_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vmulh_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vmulh_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmulh_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vmulh_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vmulh_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmulh_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vmulh_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vmulh_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmulh_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vmulh_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vmulh_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmulh_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vmulh_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vmulh_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmulh_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vmulh_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vmulh_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmulh_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vmulh_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vmulh_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmulh_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vmulh_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vmulh_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmulh_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vmulh_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vmulh_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmulh_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vmulh_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vmulh_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmulh_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vmulh_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vmulh_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmulh_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vmulh_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vmulh_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmulh_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vmulh_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vmulh_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmulh_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vmulh_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vmulh_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmulh_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vmulh_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vmulh_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmulh_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vmulh_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vmulh_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmulh_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vmulh_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vmulh_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmulh_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vmulh_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vmulh_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmulh_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vmulh_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vmulh_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmulh_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vmulh_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vmulh_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmulh_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vmulh_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vmulh_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmulh_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vmulh_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vmulh_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmulh_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vmulh_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vmulh_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmulh_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vmulh_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vmulh_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmulh_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vmulh_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vmulh_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmulh_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vmulh_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vmulh_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmulh_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vmulh_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vmulh_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmulh_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vmulh_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vmulh_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmulh_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vmulh_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vmulh_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmulh_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vmulh_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vmulh_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmulh_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vmulh_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vmulh_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmulh_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vmulh_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vmulh_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmulh_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vmulh_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vmulh_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmulh_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vmulh_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vmulh_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmulh_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vmulh_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vmulh_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmulh_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vmulh_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vmulh_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmulh_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vmulh_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vmulh_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmulh_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vmulh_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vmulh_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmulh_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vmulh_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vmulh_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmulh_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vmulh_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vmulh_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmulh_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vmulh_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vmulh_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmulh_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vmulh_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vmulh_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmulh_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vmulh_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vmulh_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmulh_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vmulh_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vmulh_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmulh_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vmulh_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vmulh_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmulh_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vmulh_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vmulh_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmulh_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vmulh_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vmulh_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmulh_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vmulh_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vmulh_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmulh_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vmulh_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vmulh_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmulh_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vmulh_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vmulh_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmulh_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vmulh_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vmulh_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmulh_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vmulh_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vmulh_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmulh_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vmulh_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vmulh_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmulh_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vmulh_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vmulh_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmulh_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vmulh_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vmulh_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmulh_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vmulh_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vmulh_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmulh_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vmulh_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vmulh_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmulh_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vmulh_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vmulh_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmulh_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vmulh_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vmulh_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmulh_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vmulh_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vmulh_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmulh_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vmulh_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vmulh_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmulh_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vmulh_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vmulh_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmulh_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vmulh_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vmulh_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmulh_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vmulh_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vmulh_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmulh_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vmulh_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vmulh_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmulh_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vmulh_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vmulh_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmulh_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vmulh_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulh_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulhsu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulhsu.c index b8fac829fc4b9a83935e8f7123ceb33322f16c34..f189df0ae6653b06629b7f9b009ed1d462535591 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulhsu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulhsu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhsu_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vmulhsu_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vmulhsu_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhsu_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vmulhsu_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vmulhsu_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhsu_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vmulhsu_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vmulhsu_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhsu_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vmulhsu_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vmulhsu_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhsu_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vmulhsu_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vmulhsu_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhsu_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vmulhsu_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vmulhsu_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhsu_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vmulhsu_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vmulhsu_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhsu_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vmulhsu_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vmulhsu_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhsu_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vmulhsu_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vmulhsu_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhsu_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vmulhsu_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vmulhsu_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhsu_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vmulhsu_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vmulhsu_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhsu_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vmulhsu_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vmulhsu_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhsu_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vmulhsu_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vmulhsu_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhsu_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vmulhsu_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vmulhsu_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhsu_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vmulhsu_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vmulhsu_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhsu_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vmulhsu_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vmulhsu_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhsu_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vmulhsu_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vmulhsu_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhsu_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vmulhsu_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vmulhsu_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhsu_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vmulhsu_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vmulhsu_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhsu_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vmulhsu_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vmulhsu_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhsu_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vmulhsu_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vmulhsu_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhsu_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vmulhsu_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vmulhsu_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhsu_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vmulhsu_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vmulhsu_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhsu_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vmulhsu_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vmulhsu_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhsu_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vmulhsu_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vmulhsu_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhsu_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vmulhsu_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vmulhsu_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhsu_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vmulhsu_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vmulhsu_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhsu_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vmulhsu_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vmulhsu_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhsu_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vmulhsu_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vmulhsu_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhsu_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vmulhsu_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vmulhsu_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhsu_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vmulhsu_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vmulhsu_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhsu_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vmulhsu_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vmulhsu_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhsu_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vmulhsu_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vmulhsu_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhsu_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vmulhsu_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vmulhsu_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhsu_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vmulhsu_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vmulhsu_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhsu_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vmulhsu_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vmulhsu_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhsu_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vmulhsu_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vmulhsu_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhsu_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vmulhsu_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vmulhsu_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhsu_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vmulhsu_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vmulhsu_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhsu_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vmulhsu_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vmulhsu_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhsu_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vmulhsu_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vmulhsu_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhsu_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vmulhsu_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vmulhsu_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhsu_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vmulhsu_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vmulhsu_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhsu_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vmulhsu_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vmulhsu_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhsu_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vmulhsu_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vmulhsu_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhsu_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vmulhsu_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vmulhsu_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhsu_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vmulhsu_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vmulhsu_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhsu_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vmulhsu_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vmulhsu_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhsu_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vmulhsu_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vmulhsu_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhsu_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vmulhsu_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vmulhsu_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhsu_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vmulhsu_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vmulhsu_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhsu_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vmulhsu_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vmulhsu_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhsu_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vmulhsu_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vmulhsu_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhsu_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vmulhsu_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vmulhsu_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhsu_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vmulhsu_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vmulhsu_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhsu_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vmulhsu_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vmulhsu_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhsu_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vmulhsu_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vmulhsu_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhsu_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vmulhsu_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vmulhsu_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhsu_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vmulhsu_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vmulhsu_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhsu_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vmulhsu_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vmulhsu_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhsu_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vmulhsu_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vmulhsu_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhsu_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vmulhsu_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vmulhsu_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhsu_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vmulhsu_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vmulhsu_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhsu_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vmulhsu_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vmulhsu_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhsu_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vmulhsu_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vmulhsu_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhsu_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vmulhsu_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vmulhsu_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhsu_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vmulhsu_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vmulhsu_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhsu_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vmulhsu_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vmulhsu_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhsu_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vmulhsu_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vmulhsu_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhsu_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vmulhsu_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vmulhsu_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhsu_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vmulhsu_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vmulhsu_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhsu_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vmulhsu_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vmulhsu_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhsu_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vmulhsu_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vmulhsu_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhsu_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vmulhsu_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vmulhsu_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhsu_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vmulhsu_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vmulhsu_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhsu_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vmulhsu_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vmulhsu_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhsu_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vmulhsu_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vmulhsu_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhsu_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vmulhsu_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vmulhsu_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhsu_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vmulhsu_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vmulhsu_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhsu_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vmulhsu_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vmulhsu_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhsu_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vmulhsu_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vmulhsu_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhsu_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vmulhsu_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vmulhsu_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhsu_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vmulhsu_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vmulhsu_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhsu_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vmulhsu_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vmulhsu_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhsu_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vmulhsu_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vmulhsu_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhsu_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vmulhsu_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vmulhsu_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhsu_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vmulhsu_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vmulhsu_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhsu_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vmulhsu_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulhu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulhu.c index 2f609db9ed89d99aa601d73f01cca25cbafaffc9..245f6db4fd4d7ee11d5f37ff5fb1b8792f6e94f1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulhu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmulhu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vmulhu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vmulhu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vmulhu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vmulhu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vmulhu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vmulhu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vmulhu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vmulhu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vmulhu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vmulhu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vmulhu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vmulhu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vmulhu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vmulhu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vmulhu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vmulhu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vmulhu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vmulhu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vmulhu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vmulhu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vmulhu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vmulhu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vmulhu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vmulhu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vmulhu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vmulhu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vmulhu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vmulhu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vmulhu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vmulhu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vmulhu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vmulhu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vmulhu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vmulhu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vmulhu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vmulhu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vmulhu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vmulhu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vmulhu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vmulhu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vmulhu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vmulhu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vmulhu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vmulhu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vmulhu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vmulhu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vmulhu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vmulhu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vmulhu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vmulhu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vmulhu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vmulhu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vmulhu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vmulhu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vmulhu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vmulhu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vmulhu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vmulhu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vmulhu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vmulhu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vmulhu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vmulhu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vmulhu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vmulhu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vmulhu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vmulhu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vmulhu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vmulhu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vmulhu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vmulhu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vmulhu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vmulhu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vmulhu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vmulhu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vmulhu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vmulhu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vmulhu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vmulhu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vmulhu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vmulhu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vmulhu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vmulhu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vmulhu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vmulhu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vmulhu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vmulhu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vmulhu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vmulhu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vmulhu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vmulhu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vmulhu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vmulhu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vmulhu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vmulhu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vmulhu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vmulhu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vmulhu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vmulhu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vmulhu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vmulhu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vmulhu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vmulhu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vmulhu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vmulhu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vmulhu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vmulhu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vmulhu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vmulhu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vmulhu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vmulhu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vmulhu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vmulhu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vmulhu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vmulhu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vmulhu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vmulhu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vmulhu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vmulhu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vmulhu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vmulhu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vmulhu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vmulhu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vmulhu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vmulhu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vmulhu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vmulhu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vmulhu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vmulhu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vmulhu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vmulhu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vmulhu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vmulhu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vmulhu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vmulhu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vmulhu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vmulhu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vmulhu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vmulhu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vmulhu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vmulhu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vmulhu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vmulhu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vmulhu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vmulhu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vmulhu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vmulhu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vmulhu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vmulhu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vmulhu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vmulhu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vmulhu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vmulhu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vmulhu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vmulhu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vmulhu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vmulhu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vmulhu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vmulhu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vmulhu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vmulhu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vmulhu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vmulhu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vmulhu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vmulhu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vmulhu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vmulhu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vmulhu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vmulhu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vmulhu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vmulhu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vmulhu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vmulhu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vmulhu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vmulhu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vmulhu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vmulhu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmv.c index f75a7b349a9c647cf612921d5d2ffbc5891a3a12..f3431a700796b0f8b152ac71b7a520b749077f11 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmv.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vmv.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmv_v_v_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, size_t vl) { - return vmv_v_v_i8mf8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8mf8_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vmv_v_v_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmv_v_x_i8mf8_tu(vint8mf8_t maskedoff, int8_t src, size_t vl) { - return vmv_v_x_i8mf8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8mf4_tu( @@ -31,7 +31,7 @@ vint8mf8_t test_vmv_v_x_i8mf8_tu(vint8mf8_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmv_v_v_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, size_t vl) { - return vmv_v_v_i8mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8mf4_tu( @@ -40,7 +40,7 @@ vint8mf4_t test_vmv_v_v_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmv_v_x_i8mf4_tu(vint8mf4_t maskedoff, int8_t src, size_t vl) { - return vmv_v_x_i8mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8mf2_tu( @@ -49,7 +49,7 @@ vint8mf4_t test_vmv_v_x_i8mf4_tu(vint8mf4_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmv_v_v_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, size_t vl) { - return vmv_v_v_i8mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8mf2_tu( @@ -58,7 +58,7 @@ vint8mf2_t test_vmv_v_v_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmv_v_x_i8mf2_tu(vint8mf2_t maskedoff, int8_t src, size_t vl) { - return vmv_v_x_i8mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8m1_tu( @@ -67,7 +67,7 @@ vint8mf2_t test_vmv_v_x_i8mf2_tu(vint8mf2_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmv_v_v_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, size_t vl) { - return vmv_v_v_i8m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8m1_tu( @@ -76,7 +76,7 @@ vint8m1_t test_vmv_v_v_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmv_v_x_i8m1_tu(vint8m1_t maskedoff, int8_t src, size_t vl) { - return vmv_v_x_i8m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8m2_tu( @@ -85,7 +85,7 @@ vint8m1_t test_vmv_v_x_i8m1_tu(vint8m1_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmv_v_v_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, size_t vl) { - return vmv_v_v_i8m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8m2_tu( @@ -94,7 +94,7 @@ vint8m2_t test_vmv_v_v_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmv_v_x_i8m2_tu(vint8m2_t maskedoff, int8_t src, size_t vl) { - return vmv_v_x_i8m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8m4_tu( @@ -103,7 +103,7 @@ vint8m2_t test_vmv_v_x_i8m2_tu(vint8m2_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmv_v_v_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, size_t vl) { - return vmv_v_v_i8m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8m4_tu( @@ -112,7 +112,7 @@ vint8m4_t test_vmv_v_v_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmv_v_x_i8m4_tu(vint8m4_t maskedoff, int8_t src, size_t vl) { - return vmv_v_x_i8m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i8m8_tu( @@ -121,7 +121,7 @@ vint8m4_t test_vmv_v_x_i8m4_tu(vint8m4_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmv_v_v_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, size_t vl) { - return vmv_v_v_i8m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i8m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i8m8_tu( @@ -130,7 +130,7 @@ vint8m8_t test_vmv_v_v_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmv_v_x_i8m8_tu(vint8m8_t maskedoff, int8_t src, size_t vl) { - return vmv_v_x_i8m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i8m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16mf4_tu( @@ -139,7 +139,7 @@ vint8m8_t test_vmv_v_x_i8m8_tu(vint8m8_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmv_v_v_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, size_t vl) { - return vmv_v_v_i16mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16mf4_tu( @@ -148,7 +148,7 @@ vint16mf4_t test_vmv_v_v_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmv_v_x_i16mf4_tu(vint16mf4_t maskedoff, int16_t src, size_t vl) { - return vmv_v_x_i16mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16mf2_tu( @@ -157,7 +157,7 @@ vint16mf4_t test_vmv_v_x_i16mf4_tu(vint16mf4_t maskedoff, int16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmv_v_v_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, size_t vl) { - return vmv_v_v_i16mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16mf2_tu( @@ -166,7 +166,7 @@ vint16mf2_t test_vmv_v_v_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmv_v_x_i16mf2_tu(vint16mf2_t maskedoff, int16_t src, size_t vl) { - return vmv_v_x_i16mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16m1_tu( @@ -175,7 +175,7 @@ vint16mf2_t test_vmv_v_x_i16mf2_tu(vint16mf2_t maskedoff, int16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmv_v_v_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, size_t vl) { - return vmv_v_v_i16m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16m1_tu( @@ -184,7 +184,7 @@ vint16m1_t test_vmv_v_v_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmv_v_x_i16m1_tu(vint16m1_t maskedoff, int16_t src, size_t vl) { - return vmv_v_x_i16m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16m2_tu( @@ -193,7 +193,7 @@ vint16m1_t test_vmv_v_x_i16m1_tu(vint16m1_t maskedoff, int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmv_v_v_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, size_t vl) { - return vmv_v_v_i16m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16m2_tu( @@ -202,7 +202,7 @@ vint16m2_t test_vmv_v_v_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmv_v_x_i16m2_tu(vint16m2_t maskedoff, int16_t src, size_t vl) { - return vmv_v_x_i16m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16m4_tu( @@ -211,7 +211,7 @@ vint16m2_t test_vmv_v_x_i16m2_tu(vint16m2_t maskedoff, int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmv_v_v_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, size_t vl) { - return vmv_v_v_i16m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16m4_tu( @@ -220,7 +220,7 @@ vint16m4_t test_vmv_v_v_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmv_v_x_i16m4_tu(vint16m4_t maskedoff, int16_t src, size_t vl) { - return vmv_v_x_i16m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i16m8_tu( @@ -229,7 +229,7 @@ vint16m4_t test_vmv_v_x_i16m4_tu(vint16m4_t maskedoff, int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmv_v_v_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, size_t vl) { - return vmv_v_v_i16m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i16m8_tu( @@ -238,7 +238,7 @@ vint16m8_t test_vmv_v_v_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmv_v_x_i16m8_tu(vint16m8_t maskedoff, int16_t src, size_t vl) { - return vmv_v_x_i16m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32mf2_tu( @@ -247,7 +247,7 @@ vint16m8_t test_vmv_v_x_i16m8_tu(vint16m8_t maskedoff, int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmv_v_v_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, size_t vl) { - return vmv_v_v_i32mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32mf2_tu( @@ -256,7 +256,7 @@ vint32mf2_t test_vmv_v_v_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmv_v_x_i32mf2_tu(vint32mf2_t maskedoff, int32_t src, size_t vl) { - return vmv_v_x_i32mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vmv_v_x_i32mf2_tu(vint32mf2_t maskedoff, int32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmv_v_v_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, size_t vl) { - return vmv_v_v_i32m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32m1_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vmv_v_v_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmv_v_x_i32m1_tu(vint32m1_t maskedoff, int32_t src, size_t vl) { - return vmv_v_x_i32m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vmv_v_x_i32m1_tu(vint32m1_t maskedoff, int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmv_v_v_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, size_t vl) { - return vmv_v_v_i32m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32m2_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vmv_v_v_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmv_v_x_i32m2_tu(vint32m2_t maskedoff, int32_t src, size_t vl) { - return vmv_v_x_i32m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32m4_tu( @@ -301,7 +301,7 @@ vint32m2_t test_vmv_v_x_i32m2_tu(vint32m2_t maskedoff, int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmv_v_v_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, size_t vl) { - return vmv_v_v_i32m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32m4_tu( @@ -310,7 +310,7 @@ vint32m4_t test_vmv_v_v_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmv_v_x_i32m4_tu(vint32m4_t maskedoff, int32_t src, size_t vl) { - return vmv_v_x_i32m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i32m8_tu( @@ -319,7 +319,7 @@ vint32m4_t test_vmv_v_x_i32m4_tu(vint32m4_t maskedoff, int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmv_v_v_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, size_t vl) { - return vmv_v_v_i32m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i32m8_tu( @@ -328,7 +328,7 @@ vint32m8_t test_vmv_v_v_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmv_v_x_i32m8_tu(vint32m8_t maskedoff, int32_t src, size_t vl) { - return vmv_v_x_i32m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i64m1_tu( @@ -337,7 +337,7 @@ vint32m8_t test_vmv_v_x_i32m8_tu(vint32m8_t maskedoff, int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmv_v_v_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, size_t vl) { - return vmv_v_v_i64m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i64m1_tu( @@ -346,7 +346,7 @@ vint64m1_t test_vmv_v_v_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmv_v_x_i64m1_tu(vint64m1_t maskedoff, int64_t src, size_t vl) { - return vmv_v_x_i64m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i64m2_tu( @@ -355,7 +355,7 @@ vint64m1_t test_vmv_v_x_i64m1_tu(vint64m1_t maskedoff, int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmv_v_v_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, size_t vl) { - return vmv_v_v_i64m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i64m2_tu( @@ -364,7 +364,7 @@ vint64m2_t test_vmv_v_v_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmv_v_x_i64m2_tu(vint64m2_t maskedoff, int64_t src, size_t vl) { - return vmv_v_x_i64m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i64m4_tu( @@ -373,7 +373,7 @@ vint64m2_t test_vmv_v_x_i64m2_tu(vint64m2_t maskedoff, int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmv_v_v_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, size_t vl) { - return vmv_v_v_i64m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i64m4_tu( @@ -382,7 +382,7 @@ vint64m4_t test_vmv_v_v_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmv_v_x_i64m4_tu(vint64m4_t maskedoff, int64_t src, size_t vl) { - return vmv_v_x_i64m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_i64m8_tu( @@ -391,7 +391,7 @@ vint64m4_t test_vmv_v_x_i64m4_tu(vint64m4_t maskedoff, int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmv_v_v_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, size_t vl) { - return vmv_v_v_i64m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_i64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_i64m8_tu( @@ -400,7 +400,7 @@ vint64m8_t test_vmv_v_v_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmv_v_x_i64m8_tu(vint64m8_t maskedoff, int64_t src, size_t vl) { - return vmv_v_x_i64m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_i64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8mf8_tu( @@ -409,7 +409,7 @@ vint64m8_t test_vmv_v_x_i64m8_tu(vint64m8_t maskedoff, int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmv_v_v_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, size_t vl) { - return vmv_v_v_u8mf8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8mf8_tu( @@ -418,7 +418,7 @@ vuint8mf8_t test_vmv_v_v_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmv_v_x_u8mf8_tu(vuint8mf8_t maskedoff, uint8_t src, size_t vl) { - return vmv_v_x_u8mf8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8mf4_tu( @@ -427,7 +427,7 @@ vuint8mf8_t test_vmv_v_x_u8mf8_tu(vuint8mf8_t maskedoff, uint8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmv_v_v_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, size_t vl) { - return vmv_v_v_u8mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8mf4_tu( @@ -436,7 +436,7 @@ vuint8mf4_t test_vmv_v_v_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmv_v_x_u8mf4_tu(vuint8mf4_t maskedoff, uint8_t src, size_t vl) { - return vmv_v_x_u8mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8mf2_tu( @@ -445,7 +445,7 @@ vuint8mf4_t test_vmv_v_x_u8mf4_tu(vuint8mf4_t maskedoff, uint8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmv_v_v_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, size_t vl) { - return vmv_v_v_u8mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8mf2_tu( @@ -454,7 +454,7 @@ vuint8mf2_t test_vmv_v_v_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmv_v_x_u8mf2_tu(vuint8mf2_t maskedoff, uint8_t src, size_t vl) { - return vmv_v_x_u8mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8m1_tu( @@ -463,7 +463,7 @@ vuint8mf2_t test_vmv_v_x_u8mf2_tu(vuint8mf2_t maskedoff, uint8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmv_v_v_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, size_t vl) { - return vmv_v_v_u8m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8m1_tu( @@ -472,7 +472,7 @@ vuint8m1_t test_vmv_v_v_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmv_v_x_u8m1_tu(vuint8m1_t maskedoff, uint8_t src, size_t vl) { - return vmv_v_x_u8m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8m2_tu( @@ -481,7 +481,7 @@ vuint8m1_t test_vmv_v_x_u8m1_tu(vuint8m1_t maskedoff, uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmv_v_v_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, size_t vl) { - return vmv_v_v_u8m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8m2_tu( @@ -490,7 +490,7 @@ vuint8m2_t test_vmv_v_v_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmv_v_x_u8m2_tu(vuint8m2_t maskedoff, uint8_t src, size_t vl) { - return vmv_v_x_u8m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8m4_tu( @@ -499,7 +499,7 @@ vuint8m2_t test_vmv_v_x_u8m2_tu(vuint8m2_t maskedoff, uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmv_v_v_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, size_t vl) { - return vmv_v_v_u8m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8m4_tu( @@ -508,7 +508,7 @@ vuint8m4_t test_vmv_v_v_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmv_v_x_u8m4_tu(vuint8m4_t maskedoff, uint8_t src, size_t vl) { - return vmv_v_x_u8m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u8m8_tu( @@ -517,7 +517,7 @@ vuint8m4_t test_vmv_v_x_u8m4_tu(vuint8m4_t maskedoff, uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmv_v_v_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, size_t vl) { - return vmv_v_v_u8m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u8m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u8m8_tu( @@ -526,7 +526,7 @@ vuint8m8_t test_vmv_v_v_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmv_v_x_u8m8_tu(vuint8m8_t maskedoff, uint8_t src, size_t vl) { - return vmv_v_x_u8m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u8m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16mf4_tu( @@ -535,7 +535,7 @@ vuint8m8_t test_vmv_v_x_u8m8_tu(vuint8m8_t maskedoff, uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmv_v_v_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t src, size_t vl) { - return vmv_v_v_u16mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16mf4_tu( @@ -544,7 +544,7 @@ vuint16mf4_t test_vmv_v_v_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmv_v_x_u16mf4_tu(vuint16mf4_t maskedoff, uint16_t src, size_t vl) { - return vmv_v_x_u16mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16mf2_tu( @@ -553,7 +553,7 @@ vuint16mf4_t test_vmv_v_x_u16mf4_tu(vuint16mf4_t maskedoff, uint16_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmv_v_v_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t src, size_t vl) { - return vmv_v_v_u16mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16mf2_tu( @@ -562,7 +562,7 @@ vuint16mf2_t test_vmv_v_v_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmv_v_x_u16mf2_tu(vuint16mf2_t maskedoff, uint16_t src, size_t vl) { - return vmv_v_x_u16mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16m1_tu( @@ -571,7 +571,7 @@ vuint16mf2_t test_vmv_v_x_u16mf2_tu(vuint16mf2_t maskedoff, uint16_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmv_v_v_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, size_t vl) { - return vmv_v_v_u16m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16m1_tu( @@ -580,7 +580,7 @@ vuint16m1_t test_vmv_v_v_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmv_v_x_u16m1_tu(vuint16m1_t maskedoff, uint16_t src, size_t vl) { - return vmv_v_x_u16m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16m2_tu( @@ -589,7 +589,7 @@ vuint16m1_t test_vmv_v_x_u16m1_tu(vuint16m1_t maskedoff, uint16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmv_v_v_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, size_t vl) { - return vmv_v_v_u16m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16m2_tu( @@ -598,7 +598,7 @@ vuint16m2_t test_vmv_v_v_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmv_v_x_u16m2_tu(vuint16m2_t maskedoff, uint16_t src, size_t vl) { - return vmv_v_x_u16m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16m4_tu( @@ -607,7 +607,7 @@ vuint16m2_t test_vmv_v_x_u16m2_tu(vuint16m2_t maskedoff, uint16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmv_v_v_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, size_t vl) { - return vmv_v_v_u16m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16m4_tu( @@ -616,7 +616,7 @@ vuint16m4_t test_vmv_v_v_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmv_v_x_u16m4_tu(vuint16m4_t maskedoff, uint16_t src, size_t vl) { - return vmv_v_x_u16m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u16m8_tu( @@ -625,7 +625,7 @@ vuint16m4_t test_vmv_v_x_u16m4_tu(vuint16m4_t maskedoff, uint16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmv_v_v_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, size_t vl) { - return vmv_v_v_u16m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u16m8_tu( @@ -634,7 +634,7 @@ vuint16m8_t test_vmv_v_v_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmv_v_x_u16m8_tu(vuint16m8_t maskedoff, uint16_t src, size_t vl) { - return vmv_v_x_u16m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32mf2_tu( @@ -643,7 +643,7 @@ vuint16m8_t test_vmv_v_x_u16m8_tu(vuint16m8_t maskedoff, uint16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmv_v_v_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t src, size_t vl) { - return vmv_v_v_u32mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32mf2_tu( @@ -652,7 +652,7 @@ vuint32mf2_t test_vmv_v_v_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmv_v_x_u32mf2_tu(vuint32mf2_t maskedoff, uint32_t src, size_t vl) { - return vmv_v_x_u32mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32m1_tu( @@ -661,7 +661,7 @@ vuint32mf2_t test_vmv_v_x_u32mf2_tu(vuint32mf2_t maskedoff, uint32_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmv_v_v_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, size_t vl) { - return vmv_v_v_u32m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32m1_tu( @@ -670,7 +670,7 @@ vuint32m1_t test_vmv_v_v_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmv_v_x_u32m1_tu(vuint32m1_t maskedoff, uint32_t src, size_t vl) { - return vmv_v_x_u32m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32m2_tu( @@ -679,7 +679,7 @@ vuint32m1_t test_vmv_v_x_u32m1_tu(vuint32m1_t maskedoff, uint32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmv_v_v_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, size_t vl) { - return vmv_v_v_u32m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32m2_tu( @@ -688,7 +688,7 @@ vuint32m2_t test_vmv_v_v_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmv_v_x_u32m2_tu(vuint32m2_t maskedoff, uint32_t src, size_t vl) { - return vmv_v_x_u32m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32m4_tu( @@ -697,7 +697,7 @@ vuint32m2_t test_vmv_v_x_u32m2_tu(vuint32m2_t maskedoff, uint32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmv_v_v_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, size_t vl) { - return vmv_v_v_u32m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32m4_tu( @@ -706,7 +706,7 @@ vuint32m4_t test_vmv_v_v_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmv_v_x_u32m4_tu(vuint32m4_t maskedoff, uint32_t src, size_t vl) { - return vmv_v_x_u32m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u32m8_tu( @@ -715,7 +715,7 @@ vuint32m4_t test_vmv_v_x_u32m4_tu(vuint32m4_t maskedoff, uint32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmv_v_v_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, size_t vl) { - return vmv_v_v_u32m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u32m8_tu( @@ -724,7 +724,7 @@ vuint32m8_t test_vmv_v_v_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmv_v_x_u32m8_tu(vuint32m8_t maskedoff, uint32_t src, size_t vl) { - return vmv_v_x_u32m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u64m1_tu( @@ -733,7 +733,7 @@ vuint32m8_t test_vmv_v_x_u32m8_tu(vuint32m8_t maskedoff, uint32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmv_v_v_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, size_t vl) { - return vmv_v_v_u64m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u64m1_tu( @@ -742,7 +742,7 @@ vuint64m1_t test_vmv_v_v_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmv_v_x_u64m1_tu(vuint64m1_t maskedoff, uint64_t src, size_t vl) { - return vmv_v_x_u64m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u64m2_tu( @@ -751,7 +751,7 @@ vuint64m1_t test_vmv_v_x_u64m1_tu(vuint64m1_t maskedoff, uint64_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmv_v_v_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, size_t vl) { - return vmv_v_v_u64m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u64m2_tu( @@ -760,7 +760,7 @@ vuint64m2_t test_vmv_v_v_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmv_v_x_u64m2_tu(vuint64m2_t maskedoff, uint64_t src, size_t vl) { - return vmv_v_x_u64m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u64m4_tu( @@ -769,7 +769,7 @@ vuint64m2_t test_vmv_v_x_u64m2_tu(vuint64m2_t maskedoff, uint64_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmv_v_v_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, size_t vl) { - return vmv_v_v_u64m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u64m4_tu( @@ -778,7 +778,7 @@ vuint64m4_t test_vmv_v_v_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmv_v_x_u64m4_tu(vuint64m4_t maskedoff, uint64_t src, size_t vl) { - return vmv_v_x_u64m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_u64m8_tu( @@ -787,7 +787,7 @@ vuint64m4_t test_vmv_v_x_u64m4_tu(vuint64m4_t maskedoff, uint64_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmv_v_v_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, size_t vl) { - return vmv_v_v_u64m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_u64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_x_u64m8_tu( @@ -796,7 +796,7 @@ vuint64m8_t test_vmv_v_v_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmv_v_x_u64m8_tu(vuint64m8_t maskedoff, uint64_t src, size_t vl) { - return vmv_v_x_u64m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_x_u64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16mf4_tu( @@ -805,7 +805,7 @@ vuint64m8_t test_vmv_v_x_u64m8_tu(vuint64m8_t maskedoff, uint64_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vmv_v_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t src, size_t vl) { - return vmv_v_v_f16mf4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16mf2_tu( @@ -814,7 +814,7 @@ vfloat16mf4_t test_vmv_v_v_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vmv_v_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t src, size_t vl) { - return vmv_v_v_f16mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16m1_tu( @@ -823,7 +823,7 @@ vfloat16mf2_t test_vmv_v_v_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vmv_v_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t src, size_t vl) { - return vmv_v_v_f16m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16m2_tu( @@ -832,7 +832,7 @@ vfloat16m1_t test_vmv_v_v_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vmv_v_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t src, size_t vl) { - return vmv_v_v_f16m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16m4_tu( @@ -841,7 +841,7 @@ vfloat16m2_t test_vmv_v_v_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vmv_v_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t src, size_t vl) { - return vmv_v_v_f16m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f16m8_tu( @@ -850,7 +850,7 @@ vfloat16m4_t test_vmv_v_v_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vmv_v_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t src, size_t vl) { - return vmv_v_v_f16m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32mf2_tu( @@ -859,7 +859,7 @@ vfloat16m8_t test_vmv_v_v_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vmv_v_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t src, size_t vl) { - return vmv_v_v_f32mf2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32m1_tu( @@ -868,7 +868,7 @@ vfloat32mf2_t test_vmv_v_v_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vmv_v_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t src, size_t vl) { - return vmv_v_v_f32m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32m2_tu( @@ -877,7 +877,7 @@ vfloat32m1_t test_vmv_v_v_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vmv_v_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t src, size_t vl) { - return vmv_v_v_f32m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32m4_tu( @@ -886,7 +886,7 @@ vfloat32m2_t test_vmv_v_v_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vmv_v_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t src, size_t vl) { - return vmv_v_v_f32m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f32m8_tu( @@ -895,7 +895,7 @@ vfloat32m4_t test_vmv_v_v_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vmv_v_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t src, size_t vl) { - return vmv_v_v_f32m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f64m1_tu( @@ -904,7 +904,7 @@ vfloat32m8_t test_vmv_v_v_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vmv_v_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t src, size_t vl) { - return vmv_v_v_f64m1_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f64m2_tu( @@ -913,7 +913,7 @@ vfloat64m1_t test_vmv_v_v_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vmv_v_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t src, size_t vl) { - return vmv_v_v_f64m2_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f64m4_tu( @@ -922,7 +922,7 @@ vfloat64m2_t test_vmv_v_v_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vmv_v_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t src, size_t vl) { - return vmv_v_v_f64m4_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_v_v_f64m8_tu( @@ -931,7 +931,7 @@ vfloat64m4_t test_vmv_v_v_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vmv_v_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t src, size_t vl) { - return vmv_v_v_f64m8_tu(maskedoff, src, vl); + return __riscv_vmv_v_v_f64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8mf8_tu( @@ -940,7 +940,7 @@ vfloat64m8_t test_vmv_v_v_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmv_s_x_i8mf8_tu(vint8mf8_t maskedoff, int8_t src, size_t vl) { - return vmv_s_x_i8mf8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8mf4_tu( @@ -949,7 +949,7 @@ vint8mf8_t test_vmv_s_x_i8mf8_tu(vint8mf8_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmv_s_x_i8mf4_tu(vint8mf4_t maskedoff, int8_t src, size_t vl) { - return vmv_s_x_i8mf4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8mf2_tu( @@ -958,7 +958,7 @@ vint8mf4_t test_vmv_s_x_i8mf4_tu(vint8mf4_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmv_s_x_i8mf2_tu(vint8mf2_t maskedoff, int8_t src, size_t vl) { - return vmv_s_x_i8mf2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8m1_tu( @@ -967,7 +967,7 @@ vint8mf2_t test_vmv_s_x_i8mf2_tu(vint8mf2_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmv_s_x_i8m1_tu(vint8m1_t maskedoff, int8_t src, size_t vl) { - return vmv_s_x_i8m1_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8m2_tu( @@ -976,7 +976,7 @@ vint8m1_t test_vmv_s_x_i8m1_tu(vint8m1_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmv_s_x_i8m2_tu(vint8m2_t maskedoff, int8_t src, size_t vl) { - return vmv_s_x_i8m2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8m4_tu( @@ -985,7 +985,7 @@ vint8m2_t test_vmv_s_x_i8m2_tu(vint8m2_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmv_s_x_i8m4_tu(vint8m4_t maskedoff, int8_t src, size_t vl) { - return vmv_s_x_i8m4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i8m8_tu( @@ -994,7 +994,7 @@ vint8m4_t test_vmv_s_x_i8m4_tu(vint8m4_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmv_s_x_i8m8_tu(vint8m8_t maskedoff, int8_t src, size_t vl) { - return vmv_s_x_i8m8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i8m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16mf4_tu( @@ -1003,7 +1003,7 @@ vint8m8_t test_vmv_s_x_i8m8_tu(vint8m8_t maskedoff, int8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmv_s_x_i16mf4_tu(vint16mf4_t maskedoff, int16_t src, size_t vl) { - return vmv_s_x_i16mf4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16mf2_tu( @@ -1012,7 +1012,7 @@ vint16mf4_t test_vmv_s_x_i16mf4_tu(vint16mf4_t maskedoff, int16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmv_s_x_i16mf2_tu(vint16mf2_t maskedoff, int16_t src, size_t vl) { - return vmv_s_x_i16mf2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16m1_tu( @@ -1021,7 +1021,7 @@ vint16mf2_t test_vmv_s_x_i16mf2_tu(vint16mf2_t maskedoff, int16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmv_s_x_i16m1_tu(vint16m1_t maskedoff, int16_t src, size_t vl) { - return vmv_s_x_i16m1_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16m2_tu( @@ -1030,7 +1030,7 @@ vint16m1_t test_vmv_s_x_i16m1_tu(vint16m1_t maskedoff, int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmv_s_x_i16m2_tu(vint16m2_t maskedoff, int16_t src, size_t vl) { - return vmv_s_x_i16m2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16m4_tu( @@ -1039,7 +1039,7 @@ vint16m2_t test_vmv_s_x_i16m2_tu(vint16m2_t maskedoff, int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmv_s_x_i16m4_tu(vint16m4_t maskedoff, int16_t src, size_t vl) { - return vmv_s_x_i16m4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i16m8_tu( @@ -1048,7 +1048,7 @@ vint16m4_t test_vmv_s_x_i16m4_tu(vint16m4_t maskedoff, int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmv_s_x_i16m8_tu(vint16m8_t maskedoff, int16_t src, size_t vl) { - return vmv_s_x_i16m8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32mf2_tu( @@ -1057,7 +1057,7 @@ vint16m8_t test_vmv_s_x_i16m8_tu(vint16m8_t maskedoff, int16_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmv_s_x_i32mf2_tu(vint32mf2_t maskedoff, int32_t src, size_t vl) { - return vmv_s_x_i32mf2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32m1_tu( @@ -1066,7 +1066,7 @@ vint32mf2_t test_vmv_s_x_i32mf2_tu(vint32mf2_t maskedoff, int32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmv_s_x_i32m1_tu(vint32m1_t maskedoff, int32_t src, size_t vl) { - return vmv_s_x_i32m1_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32m2_tu( @@ -1075,7 +1075,7 @@ vint32m1_t test_vmv_s_x_i32m1_tu(vint32m1_t maskedoff, int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmv_s_x_i32m2_tu(vint32m2_t maskedoff, int32_t src, size_t vl) { - return vmv_s_x_i32m2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32m4_tu( @@ -1084,7 +1084,7 @@ vint32m2_t test_vmv_s_x_i32m2_tu(vint32m2_t maskedoff, int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmv_s_x_i32m4_tu(vint32m4_t maskedoff, int32_t src, size_t vl) { - return vmv_s_x_i32m4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i32m8_tu( @@ -1093,7 +1093,7 @@ vint32m4_t test_vmv_s_x_i32m4_tu(vint32m4_t maskedoff, int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmv_s_x_i32m8_tu(vint32m8_t maskedoff, int32_t src, size_t vl) { - return vmv_s_x_i32m8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i64m1_tu( @@ -1102,7 +1102,7 @@ vint32m8_t test_vmv_s_x_i32m8_tu(vint32m8_t maskedoff, int32_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmv_s_x_i64m1_tu(vint64m1_t maskedoff, int64_t src, size_t vl) { - return vmv_s_x_i64m1_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i64m2_tu( @@ -1111,7 +1111,7 @@ vint64m1_t test_vmv_s_x_i64m1_tu(vint64m1_t maskedoff, int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmv_s_x_i64m2_tu(vint64m2_t maskedoff, int64_t src, size_t vl) { - return vmv_s_x_i64m2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i64m4_tu( @@ -1120,7 +1120,7 @@ vint64m2_t test_vmv_s_x_i64m2_tu(vint64m2_t maskedoff, int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmv_s_x_i64m4_tu(vint64m4_t maskedoff, int64_t src, size_t vl) { - return vmv_s_x_i64m4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_i64m8_tu( @@ -1129,7 +1129,7 @@ vint64m4_t test_vmv_s_x_i64m4_tu(vint64m4_t maskedoff, int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmv_s_x_i64m8_tu(vint64m8_t maskedoff, int64_t src, size_t vl) { - return vmv_s_x_i64m8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_i64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8mf8_tu( @@ -1138,7 +1138,7 @@ vint64m8_t test_vmv_s_x_i64m8_tu(vint64m8_t maskedoff, int64_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmv_s_x_u8mf8_tu(vuint8mf8_t maskedoff, uint8_t src, size_t vl) { - return vmv_s_x_u8mf8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8mf4_tu( @@ -1147,7 +1147,7 @@ vuint8mf8_t test_vmv_s_x_u8mf8_tu(vuint8mf8_t maskedoff, uint8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmv_s_x_u8mf4_tu(vuint8mf4_t maskedoff, uint8_t src, size_t vl) { - return vmv_s_x_u8mf4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8mf2_tu( @@ -1156,7 +1156,7 @@ vuint8mf4_t test_vmv_s_x_u8mf4_tu(vuint8mf4_t maskedoff, uint8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmv_s_x_u8mf2_tu(vuint8mf2_t maskedoff, uint8_t src, size_t vl) { - return vmv_s_x_u8mf2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8m1_tu( @@ -1165,7 +1165,7 @@ vuint8mf2_t test_vmv_s_x_u8mf2_tu(vuint8mf2_t maskedoff, uint8_t src, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmv_s_x_u8m1_tu(vuint8m1_t maskedoff, uint8_t src, size_t vl) { - return vmv_s_x_u8m1_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8m2_tu( @@ -1174,7 +1174,7 @@ vuint8m1_t test_vmv_s_x_u8m1_tu(vuint8m1_t maskedoff, uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmv_s_x_u8m2_tu(vuint8m2_t maskedoff, uint8_t src, size_t vl) { - return vmv_s_x_u8m2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8m4_tu( @@ -1183,7 +1183,7 @@ vuint8m2_t test_vmv_s_x_u8m2_tu(vuint8m2_t maskedoff, uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmv_s_x_u8m4_tu(vuint8m4_t maskedoff, uint8_t src, size_t vl) { - return vmv_s_x_u8m4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u8m8_tu( @@ -1192,7 +1192,7 @@ vuint8m4_t test_vmv_s_x_u8m4_tu(vuint8m4_t maskedoff, uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmv_s_x_u8m8_tu(vuint8m8_t maskedoff, uint8_t src, size_t vl) { - return vmv_s_x_u8m8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u8m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16mf4_tu( @@ -1201,7 +1201,7 @@ vuint8m8_t test_vmv_s_x_u8m8_tu(vuint8m8_t maskedoff, uint8_t src, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmv_s_x_u16mf4_tu(vuint16mf4_t maskedoff, uint16_t src, size_t vl) { - return vmv_s_x_u16mf4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16mf2_tu( @@ -1210,7 +1210,7 @@ vuint16mf4_t test_vmv_s_x_u16mf4_tu(vuint16mf4_t maskedoff, uint16_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmv_s_x_u16mf2_tu(vuint16mf2_t maskedoff, uint16_t src, size_t vl) { - return vmv_s_x_u16mf2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16m1_tu( @@ -1219,7 +1219,7 @@ vuint16mf2_t test_vmv_s_x_u16mf2_tu(vuint16mf2_t maskedoff, uint16_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmv_s_x_u16m1_tu(vuint16m1_t maskedoff, uint16_t src, size_t vl) { - return vmv_s_x_u16m1_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16m2_tu( @@ -1228,7 +1228,7 @@ vuint16m1_t test_vmv_s_x_u16m1_tu(vuint16m1_t maskedoff, uint16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmv_s_x_u16m2_tu(vuint16m2_t maskedoff, uint16_t src, size_t vl) { - return vmv_s_x_u16m2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16m4_tu( @@ -1237,7 +1237,7 @@ vuint16m2_t test_vmv_s_x_u16m2_tu(vuint16m2_t maskedoff, uint16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmv_s_x_u16m4_tu(vuint16m4_t maskedoff, uint16_t src, size_t vl) { - return vmv_s_x_u16m4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u16m8_tu( @@ -1246,7 +1246,7 @@ vuint16m4_t test_vmv_s_x_u16m4_tu(vuint16m4_t maskedoff, uint16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmv_s_x_u16m8_tu(vuint16m8_t maskedoff, uint16_t src, size_t vl) { - return vmv_s_x_u16m8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32mf2_tu( @@ -1255,7 +1255,7 @@ vuint16m8_t test_vmv_s_x_u16m8_tu(vuint16m8_t maskedoff, uint16_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmv_s_x_u32mf2_tu(vuint32mf2_t maskedoff, uint32_t src, size_t vl) { - return vmv_s_x_u32mf2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32m1_tu( @@ -1264,7 +1264,7 @@ vuint32mf2_t test_vmv_s_x_u32mf2_tu(vuint32mf2_t maskedoff, uint32_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmv_s_x_u32m1_tu(vuint32m1_t maskedoff, uint32_t src, size_t vl) { - return vmv_s_x_u32m1_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32m2_tu( @@ -1273,7 +1273,7 @@ vuint32m1_t test_vmv_s_x_u32m1_tu(vuint32m1_t maskedoff, uint32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmv_s_x_u32m2_tu(vuint32m2_t maskedoff, uint32_t src, size_t vl) { - return vmv_s_x_u32m2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32m4_tu( @@ -1282,7 +1282,7 @@ vuint32m2_t test_vmv_s_x_u32m2_tu(vuint32m2_t maskedoff, uint32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmv_s_x_u32m4_tu(vuint32m4_t maskedoff, uint32_t src, size_t vl) { - return vmv_s_x_u32m4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u32m8_tu( @@ -1291,7 +1291,7 @@ vuint32m4_t test_vmv_s_x_u32m4_tu(vuint32m4_t maskedoff, uint32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmv_s_x_u32m8_tu(vuint32m8_t maskedoff, uint32_t src, size_t vl) { - return vmv_s_x_u32m8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u64m1_tu( @@ -1300,7 +1300,7 @@ vuint32m8_t test_vmv_s_x_u32m8_tu(vuint32m8_t maskedoff, uint32_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmv_s_x_u64m1_tu(vuint64m1_t maskedoff, uint64_t src, size_t vl) { - return vmv_s_x_u64m1_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u64m2_tu( @@ -1309,7 +1309,7 @@ vuint64m1_t test_vmv_s_x_u64m1_tu(vuint64m1_t maskedoff, uint64_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmv_s_x_u64m2_tu(vuint64m2_t maskedoff, uint64_t src, size_t vl) { - return vmv_s_x_u64m2_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u64m4_tu( @@ -1318,7 +1318,7 @@ vuint64m2_t test_vmv_s_x_u64m2_tu(vuint64m2_t maskedoff, uint64_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmv_s_x_u64m4_tu(vuint64m4_t maskedoff, uint64_t src, size_t vl) { - return vmv_s_x_u64m4_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vmv_s_x_u64m8_tu( @@ -1327,6 +1327,6 @@ vuint64m4_t test_vmv_s_x_u64m4_tu(vuint64m4_t maskedoff, uint64_t src, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmv_s_x_u64m8_tu(vuint64m8_t maskedoff, uint64_t src, size_t vl) { - return vmv_s_x_u64m8_tu(maskedoff, src, vl); + return __riscv_vmv_s_x_u64m8_tu(maskedoff, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclip.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclip.c index 2fa7cd1eb9ee28224eda161becd1959a684ef7f7..586efbed5544ba4a4e01f4be03604a59c2989fe8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclip.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclip.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wv_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclip_wv_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vnclip_wv_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wx_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vnclip_wx_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wv_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclip_wv_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vnclip_wv_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wx_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vnclip_wx_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wv_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclip_wv_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vnclip_wv_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wx_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vnclip_wx_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wv_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclip_wv_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vnclip_wv_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wx_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vnclip_wx_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wv_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclip_wv_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vnclip_wv_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wx_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vnclip_wx_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wv_i8m4_tu(vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclip_wv_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vnclip_wv_i8m4_tu(vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wx_i8m4_tu(vint8m4_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf4_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vnclip_wx_i8m4_tu(vint8m4_t maskedoff, vint16m8_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wv_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclip_wv_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf4_tu( @@ -129,7 +129,7 @@ vint16mf4_t test_vnclip_wv_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wx_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf2_tu( @@ -138,7 +138,7 @@ vint16mf4_t test_vnclip_wx_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wv_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclip_wv_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf2_tu( @@ -147,7 +147,7 @@ vint16mf2_t test_vnclip_wv_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wx_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m1_tu( @@ -156,7 +156,7 @@ vint16mf2_t test_vnclip_wx_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wv_i16m1_tu(vint16m1_t maskedoff, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclip_wv_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m1_tu( @@ -165,7 +165,7 @@ vint16m1_t test_vnclip_wv_i16m1_tu(vint16m1_t maskedoff, vint32m2_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wx_i16m1_tu(vint16m1_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m2_tu( @@ -174,7 +174,7 @@ vint16m1_t test_vnclip_wx_i16m1_tu(vint16m1_t maskedoff, vint32m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wv_i16m2_tu(vint16m2_t maskedoff, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclip_wv_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m2_tu( @@ -183,7 +183,7 @@ vint16m2_t test_vnclip_wv_i16m2_tu(vint16m2_t maskedoff, vint32m4_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wx_i16m2_tu(vint16m2_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m4_tu( @@ -192,7 +192,7 @@ vint16m2_t test_vnclip_wx_i16m2_tu(vint16m2_t maskedoff, vint32m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wv_i16m4_tu(vint16m4_t maskedoff, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclip_wv_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m4_tu( @@ -201,7 +201,7 @@ vint16m4_t test_vnclip_wv_i16m4_tu(vint16m4_t maskedoff, vint32m8_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wx_i16m4_tu(vint16m4_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32mf2_tu( @@ -210,7 +210,7 @@ vint16m4_t test_vnclip_wx_i16m4_tu(vint16m4_t maskedoff, vint32m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wv_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclip_wv_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32mf2_tu( @@ -219,7 +219,7 @@ vint32mf2_t test_vnclip_wv_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wx_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m1_tu( @@ -228,7 +228,7 @@ vint32mf2_t test_vnclip_wx_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wv_i32m1_tu(vint32m1_t maskedoff, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclip_wv_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m1_tu( @@ -237,7 +237,7 @@ vint32m1_t test_vnclip_wv_i32m1_tu(vint32m1_t maskedoff, vint64m2_t op1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wx_i32m1_tu(vint32m1_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m2_tu( @@ -246,7 +246,7 @@ vint32m1_t test_vnclip_wx_i32m1_tu(vint32m1_t maskedoff, vint64m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wv_i32m2_tu(vint32m2_t maskedoff, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclip_wv_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m2_tu( @@ -255,7 +255,7 @@ vint32m2_t test_vnclip_wv_i32m2_tu(vint32m2_t maskedoff, vint64m4_t op1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wx_i32m2_tu(vint32m2_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m4_tu( @@ -264,7 +264,7 @@ vint32m2_t test_vnclip_wx_i32m2_tu(vint32m2_t maskedoff, vint64m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wv_i32m4_tu(vint32m4_t maskedoff, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclip_wv_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m4_tu( @@ -273,7 +273,7 @@ vint32m4_t test_vnclip_wv_i32m4_tu(vint32m4_t maskedoff, vint64m8_t op1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wx_i32m4_tu(vint32m4_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf8_tum( @@ -282,7 +282,7 @@ vint32m4_t test_vnclip_wx_i32m4_tu(vint32m4_t maskedoff, vint64m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclip_wv_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf8_tum( @@ -291,7 +291,7 @@ vint8mf8_t test_vnclip_wv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf4_tum( @@ -300,7 +300,7 @@ vint8mf8_t test_vnclip_wx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclip_wv_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf4_tum( @@ -309,7 +309,7 @@ vint8mf4_t test_vnclip_wv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf2_tum( @@ -318,7 +318,7 @@ vint8mf4_t test_vnclip_wx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclip_wv_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf2_tum( @@ -327,7 +327,7 @@ vint8mf2_t test_vnclip_wv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m1_tum( @@ -336,7 +336,7 @@ vint8mf2_t test_vnclip_wx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclip_wv_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m1_tum( @@ -345,7 +345,7 @@ vint8m1_t test_vnclip_wv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m2_tum( @@ -354,7 +354,7 @@ vint8m1_t test_vnclip_wx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclip_wv_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m2_tum( @@ -363,7 +363,7 @@ vint8m2_t test_vnclip_wv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m4_tum( @@ -372,7 +372,7 @@ vint8m2_t test_vnclip_wx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclip_wv_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m4_tum( @@ -381,7 +381,7 @@ vint8m4_t test_vnclip_wv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf4_tum( @@ -390,7 +390,7 @@ vint8m4_t test_vnclip_wx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclip_wv_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf4_tum( @@ -399,7 +399,7 @@ vint16mf4_t test_vnclip_wv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf2_tum( @@ -408,7 +408,7 @@ vint16mf4_t test_vnclip_wx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclip_wv_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf2_tum( @@ -417,7 +417,7 @@ vint16mf2_t test_vnclip_wv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m1_tum( @@ -426,7 +426,7 @@ vint16mf2_t test_vnclip_wx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclip_wv_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m1_tum( @@ -435,7 +435,7 @@ vint16m1_t test_vnclip_wv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m2_tum( @@ -444,7 +444,7 @@ vint16m1_t test_vnclip_wx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclip_wv_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m2_tum( @@ -453,7 +453,7 @@ vint16m2_t test_vnclip_wv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m4_tum( @@ -462,7 +462,7 @@ vint16m2_t test_vnclip_wx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclip_wv_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m4_tum( @@ -471,7 +471,7 @@ vint16m4_t test_vnclip_wv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32mf2_tum( @@ -480,7 +480,7 @@ vint16m4_t test_vnclip_wx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclip_wv_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32mf2_tum( @@ -489,7 +489,7 @@ vint32mf2_t test_vnclip_wv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m1_tum( @@ -498,7 +498,7 @@ vint32mf2_t test_vnclip_wx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclip_wv_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m1_tum( @@ -507,7 +507,7 @@ vint32m1_t test_vnclip_wv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m2_tum( @@ -516,7 +516,7 @@ vint32m1_t test_vnclip_wx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclip_wv_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m2_tum( @@ -525,7 +525,7 @@ vint32m2_t test_vnclip_wv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m4_tum( @@ -534,7 +534,7 @@ vint32m2_t test_vnclip_wx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclip_wv_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m4_tum( @@ -543,7 +543,7 @@ vint32m4_t test_vnclip_wv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf8_tumu( @@ -552,7 +552,7 @@ vint32m4_t test_vnclip_wx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclip_wv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf8_tumu( @@ -561,7 +561,7 @@ vint8mf8_t test_vnclip_wv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf4_tumu( @@ -570,7 +570,7 @@ vint8mf8_t test_vnclip_wx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclip_wv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf4_tumu( @@ -579,7 +579,7 @@ vint8mf4_t test_vnclip_wv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf2_tumu( @@ -588,7 +588,7 @@ vint8mf4_t test_vnclip_wx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclip_wv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf2_tumu( @@ -597,7 +597,7 @@ vint8mf2_t test_vnclip_wv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m1_tumu( @@ -606,7 +606,7 @@ vint8mf2_t test_vnclip_wx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclip_wv_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m1_tumu( @@ -615,7 +615,7 @@ vint8m1_t test_vnclip_wv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m2_tumu( @@ -624,7 +624,7 @@ vint8m1_t test_vnclip_wx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclip_wv_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m2_tumu( @@ -633,7 +633,7 @@ vint8m2_t test_vnclip_wv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m4_tumu( @@ -642,7 +642,7 @@ vint8m2_t test_vnclip_wx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclip_wv_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m4_tumu( @@ -651,7 +651,7 @@ vint8m4_t test_vnclip_wv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf4_tumu( @@ -660,7 +660,7 @@ vint8m4_t test_vnclip_wx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclip_wv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf4_tumu( @@ -669,7 +669,7 @@ vint16mf4_t test_vnclip_wv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf2_tumu( @@ -678,7 +678,7 @@ vint16mf4_t test_vnclip_wx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclip_wv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf2_tumu( @@ -687,7 +687,7 @@ vint16mf2_t test_vnclip_wv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m1_tumu( @@ -696,7 +696,7 @@ vint16mf2_t test_vnclip_wx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclip_wv_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m1_tumu( @@ -705,7 +705,7 @@ vint16m1_t test_vnclip_wv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m2_tumu( @@ -714,7 +714,7 @@ vint16m1_t test_vnclip_wx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclip_wv_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m2_tumu( @@ -723,7 +723,7 @@ vint16m2_t test_vnclip_wv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m4_tumu( @@ -732,7 +732,7 @@ vint16m2_t test_vnclip_wx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclip_wv_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m4_tumu( @@ -741,7 +741,7 @@ vint16m4_t test_vnclip_wv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32mf2_tumu( @@ -750,7 +750,7 @@ vint16m4_t test_vnclip_wx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclip_wv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32mf2_tumu( @@ -759,7 +759,7 @@ vint32mf2_t test_vnclip_wv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m1_tumu( @@ -768,7 +768,7 @@ vint32mf2_t test_vnclip_wx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclip_wv_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m1_tumu( @@ -777,7 +777,7 @@ vint32m1_t test_vnclip_wv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m2_tumu( @@ -786,7 +786,7 @@ vint32m1_t test_vnclip_wx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclip_wv_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m2_tumu( @@ -795,7 +795,7 @@ vint32m2_t test_vnclip_wv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m4_tumu( @@ -804,7 +804,7 @@ vint32m2_t test_vnclip_wx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclip_wv_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m4_tumu( @@ -813,7 +813,7 @@ vint32m4_t test_vnclip_wv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf8_mu( @@ -822,7 +822,7 @@ vint32m4_t test_vnclip_wx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclip_wv_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf8_mu( @@ -831,7 +831,7 @@ vint8mf8_t test_vnclip_wv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnclip_wx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf4_mu( @@ -840,7 +840,7 @@ vint8mf8_t test_vnclip_wx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclip_wv_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf4_mu( @@ -849,7 +849,7 @@ vint8mf4_t test_vnclip_wv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnclip_wx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8mf2_mu( @@ -858,7 +858,7 @@ vint8mf4_t test_vnclip_wx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclip_wv_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8mf2_mu( @@ -867,7 +867,7 @@ vint8mf2_t test_vnclip_wv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnclip_wx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m1_mu( @@ -876,7 +876,7 @@ vint8mf2_t test_vnclip_wx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclip_wv_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m1_mu( @@ -885,7 +885,7 @@ vint8m1_t test_vnclip_wv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnclip_wx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m2_mu( @@ -894,7 +894,7 @@ vint8m1_t test_vnclip_wx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclip_wv_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m2_mu( @@ -903,7 +903,7 @@ vint8m2_t test_vnclip_wv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnclip_wx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i8m4_mu( @@ -912,7 +912,7 @@ vint8m2_t test_vnclip_wx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclip_wv_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i8m4_mu( @@ -921,7 +921,7 @@ vint8m4_t test_vnclip_wv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnclip_wx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf4_mu( @@ -930,7 +930,7 @@ vint8m4_t test_vnclip_wx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclip_wv_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf4_mu( @@ -939,7 +939,7 @@ vint16mf4_t test_vnclip_wv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnclip_wx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16mf2_mu( @@ -948,7 +948,7 @@ vint16mf4_t test_vnclip_wx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclip_wv_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16mf2_mu( @@ -957,7 +957,7 @@ vint16mf2_t test_vnclip_wv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnclip_wx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m1_mu( @@ -966,7 +966,7 @@ vint16mf2_t test_vnclip_wx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclip_wv_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m1_mu( @@ -975,7 +975,7 @@ vint16m1_t test_vnclip_wv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnclip_wx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m2_mu( @@ -984,7 +984,7 @@ vint16m1_t test_vnclip_wx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclip_wv_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m2_mu( @@ -993,7 +993,7 @@ vint16m2_t test_vnclip_wv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnclip_wx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i16m4_mu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vnclip_wx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclip_wv_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i16m4_mu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vnclip_wv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnclip_wx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32mf2_mu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vnclip_wx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclip_wv_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32mf2_mu( @@ -1029,7 +1029,7 @@ vint32mf2_t test_vnclip_wv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnclip_wx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m1_mu( @@ -1038,7 +1038,7 @@ vint32mf2_t test_vnclip_wx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclip_wv_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m1_mu( @@ -1047,7 +1047,7 @@ vint32m1_t test_vnclip_wv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnclip_wx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m2_mu( @@ -1056,7 +1056,7 @@ vint32m1_t test_vnclip_wx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclip_wv_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m2_mu( @@ -1065,7 +1065,7 @@ vint32m2_t test_vnclip_wv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnclip_wx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wv_i32m4_mu( @@ -1074,7 +1074,7 @@ vint32m2_t test_vnclip_wx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclip_wv_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wv_i32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclip_wx_i32m4_mu( @@ -1083,6 +1083,6 @@ vint32m4_t test_vnclip_wv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnclip_wx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vnclip_wx_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclip_wx_i32m4_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclipu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclipu.c index fd3a59ffec4a465fe29de9c20b71cdbed73987ff..824612703e9c7a1b945dfc6290312b2ca7abec1a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclipu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclipu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wv_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclipu_wv_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vnclipu_wv_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wx_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vnclipu_wx_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wv_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclipu_wv_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vnclipu_wv_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wx_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vnclipu_wx_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wv_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclipu_wv_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vnclipu_wv_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wx_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vnclipu_wx_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wv_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclipu_wv_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vnclipu_wv_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wx_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vnclipu_wx_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wv_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclipu_wv_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vnclipu_wv_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wx_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vnclipu_wx_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wv_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclipu_wv_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vnclipu_wv_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wx_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf4_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vnclipu_wx_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wv_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclipu_wv_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf4_tu( @@ -129,7 +129,7 @@ vuint16mf4_t test_vnclipu_wv_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wx_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf2_tu( @@ -138,7 +138,7 @@ vuint16mf4_t test_vnclipu_wx_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wv_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclipu_wv_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf2_tu( @@ -147,7 +147,7 @@ vuint16mf2_t test_vnclipu_wv_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wx_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m1_tu( @@ -156,7 +156,7 @@ vuint16mf2_t test_vnclipu_wx_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wv_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclipu_wv_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m1_tu( @@ -165,7 +165,7 @@ vuint16m1_t test_vnclipu_wv_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wx_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m2_tu( @@ -174,7 +174,7 @@ vuint16m1_t test_vnclipu_wx_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wv_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclipu_wv_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m2_tu( @@ -183,7 +183,7 @@ vuint16m2_t test_vnclipu_wv_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wx_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m4_tu( @@ -192,7 +192,7 @@ vuint16m2_t test_vnclipu_wx_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wv_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclipu_wv_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m4_tu( @@ -201,7 +201,7 @@ vuint16m4_t test_vnclipu_wv_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wx_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32mf2_tu( @@ -210,7 +210,7 @@ vuint16m4_t test_vnclipu_wx_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wv_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclipu_wv_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32mf2_tu( @@ -219,7 +219,7 @@ vuint32mf2_t test_vnclipu_wv_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wx_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m1_tu( @@ -228,7 +228,7 @@ vuint32mf2_t test_vnclipu_wx_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wv_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclipu_wv_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m1_tu( @@ -237,7 +237,7 @@ vuint32m1_t test_vnclipu_wv_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wx_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m2_tu( @@ -246,7 +246,7 @@ vuint32m1_t test_vnclipu_wx_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wv_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclipu_wv_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m2_tu( @@ -255,7 +255,7 @@ vuint32m2_t test_vnclipu_wv_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wx_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m4_tu( @@ -264,7 +264,7 @@ vuint32m2_t test_vnclipu_wx_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wv_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclipu_wv_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m4_tu( @@ -273,7 +273,7 @@ vuint32m4_t test_vnclipu_wv_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wx_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf8_tum( @@ -282,7 +282,7 @@ vuint32m4_t test_vnclipu_wx_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclipu_wv_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf8_tum( @@ -291,7 +291,7 @@ vuint8mf8_t test_vnclipu_wv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf4_tum( @@ -300,7 +300,7 @@ vuint8mf8_t test_vnclipu_wx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclipu_wv_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf4_tum( @@ -309,7 +309,7 @@ vuint8mf4_t test_vnclipu_wv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf2_tum( @@ -318,7 +318,7 @@ vuint8mf4_t test_vnclipu_wx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclipu_wv_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf2_tum( @@ -327,7 +327,7 @@ vuint8mf2_t test_vnclipu_wv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m1_tum( @@ -336,7 +336,7 @@ vuint8mf2_t test_vnclipu_wx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclipu_wv_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m1_tum( @@ -345,7 +345,7 @@ vuint8m1_t test_vnclipu_wv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m2_tum( @@ -354,7 +354,7 @@ vuint8m1_t test_vnclipu_wx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclipu_wv_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m2_tum( @@ -363,7 +363,7 @@ vuint8m2_t test_vnclipu_wv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m4_tum( @@ -372,7 +372,7 @@ vuint8m2_t test_vnclipu_wx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclipu_wv_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m4_tum( @@ -381,7 +381,7 @@ vuint8m4_t test_vnclipu_wv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf4_tum( @@ -390,7 +390,7 @@ vuint8m4_t test_vnclipu_wx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclipu_wv_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf4_tum( @@ -399,7 +399,7 @@ vuint16mf4_t test_vnclipu_wv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf2_tum( @@ -408,7 +408,7 @@ vuint16mf4_t test_vnclipu_wx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclipu_wv_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf2_tum( @@ -417,7 +417,7 @@ vuint16mf2_t test_vnclipu_wv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m1_tum( @@ -426,7 +426,7 @@ vuint16mf2_t test_vnclipu_wx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclipu_wv_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m1_tum( @@ -435,7 +435,7 @@ vuint16m1_t test_vnclipu_wv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m2_tum( @@ -444,7 +444,7 @@ vuint16m1_t test_vnclipu_wx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclipu_wv_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m2_tum( @@ -453,7 +453,7 @@ vuint16m2_t test_vnclipu_wv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m4_tum( @@ -462,7 +462,7 @@ vuint16m2_t test_vnclipu_wx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclipu_wv_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m4_tum( @@ -471,7 +471,7 @@ vuint16m4_t test_vnclipu_wv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32mf2_tum( @@ -480,7 +480,7 @@ vuint16m4_t test_vnclipu_wx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclipu_wv_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32mf2_tum( @@ -489,7 +489,7 @@ vuint32mf2_t test_vnclipu_wv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m1_tum( @@ -498,7 +498,7 @@ vuint32mf2_t test_vnclipu_wx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclipu_wv_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m1_tum( @@ -507,7 +507,7 @@ vuint32m1_t test_vnclipu_wv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m2_tum( @@ -516,7 +516,7 @@ vuint32m1_t test_vnclipu_wx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclipu_wv_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m2_tum( @@ -525,7 +525,7 @@ vuint32m2_t test_vnclipu_wv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m4_tum( @@ -534,7 +534,7 @@ vuint32m2_t test_vnclipu_wx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclipu_wv_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m4_tum( @@ -543,7 +543,7 @@ vuint32m4_t test_vnclipu_wv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf8_tumu( @@ -552,7 +552,7 @@ vuint32m4_t test_vnclipu_wx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclipu_wv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf8_tumu( @@ -561,7 +561,7 @@ vuint8mf8_t test_vnclipu_wv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf4_tumu( @@ -570,7 +570,7 @@ vuint8mf8_t test_vnclipu_wx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclipu_wv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf4_tumu( @@ -579,7 +579,7 @@ vuint8mf4_t test_vnclipu_wv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf2_tumu( @@ -588,7 +588,7 @@ vuint8mf4_t test_vnclipu_wx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclipu_wv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf2_tumu( @@ -597,7 +597,7 @@ vuint8mf2_t test_vnclipu_wv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m1_tumu( @@ -606,7 +606,7 @@ vuint8mf2_t test_vnclipu_wx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclipu_wv_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m1_tumu( @@ -615,7 +615,7 @@ vuint8m1_t test_vnclipu_wv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m2_tumu( @@ -624,7 +624,7 @@ vuint8m1_t test_vnclipu_wx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclipu_wv_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m2_tumu( @@ -633,7 +633,7 @@ vuint8m2_t test_vnclipu_wv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m4_tumu( @@ -642,7 +642,7 @@ vuint8m2_t test_vnclipu_wx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclipu_wv_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m4_tumu( @@ -651,7 +651,7 @@ vuint8m4_t test_vnclipu_wv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf4_tumu( @@ -660,7 +660,7 @@ vuint8m4_t test_vnclipu_wx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclipu_wv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf4_tumu( @@ -669,7 +669,7 @@ vuint16mf4_t test_vnclipu_wv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf2_tumu( @@ -678,7 +678,7 @@ vuint16mf4_t test_vnclipu_wx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclipu_wv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf2_tumu( @@ -687,7 +687,7 @@ vuint16mf2_t test_vnclipu_wv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m1_tumu( @@ -696,7 +696,7 @@ vuint16mf2_t test_vnclipu_wx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclipu_wv_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m1_tumu( @@ -705,7 +705,7 @@ vuint16m1_t test_vnclipu_wv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m2_tumu( @@ -714,7 +714,7 @@ vuint16m1_t test_vnclipu_wx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclipu_wv_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m2_tumu( @@ -723,7 +723,7 @@ vuint16m2_t test_vnclipu_wv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m4_tumu( @@ -732,7 +732,7 @@ vuint16m2_t test_vnclipu_wx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclipu_wv_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m4_tumu( @@ -741,7 +741,7 @@ vuint16m4_t test_vnclipu_wv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32mf2_tumu( @@ -750,7 +750,7 @@ vuint16m4_t test_vnclipu_wx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclipu_wv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32mf2_tumu( @@ -759,7 +759,7 @@ vuint32mf2_t test_vnclipu_wv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m1_tumu( @@ -768,7 +768,7 @@ vuint32mf2_t test_vnclipu_wx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclipu_wv_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m1_tumu( @@ -777,7 +777,7 @@ vuint32m1_t test_vnclipu_wv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m2_tumu( @@ -786,7 +786,7 @@ vuint32m1_t test_vnclipu_wx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclipu_wv_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m2_tumu( @@ -795,7 +795,7 @@ vuint32m2_t test_vnclipu_wv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m4_tumu( @@ -804,7 +804,7 @@ vuint32m2_t test_vnclipu_wx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclipu_wv_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m4_tumu( @@ -813,7 +813,7 @@ vuint32m4_t test_vnclipu_wv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf8_mu( @@ -822,7 +822,7 @@ vuint32m4_t test_vnclipu_wx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnclipu_wv_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf8_mu( @@ -831,7 +831,7 @@ vuint8mf8_t test_vnclipu_wv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnclipu_wx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf4_mu( @@ -840,7 +840,7 @@ vuint8mf8_t test_vnclipu_wx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnclipu_wv_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf4_mu( @@ -849,7 +849,7 @@ vuint8mf4_t test_vnclipu_wv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnclipu_wx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8mf2_mu( @@ -858,7 +858,7 @@ vuint8mf4_t test_vnclipu_wx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnclipu_wv_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8mf2_mu( @@ -867,7 +867,7 @@ vuint8mf2_t test_vnclipu_wv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnclipu_wx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m1_mu( @@ -876,7 +876,7 @@ vuint8mf2_t test_vnclipu_wx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnclipu_wv_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m1_mu( @@ -885,7 +885,7 @@ vuint8m1_t test_vnclipu_wv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnclipu_wx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m2_mu( @@ -894,7 +894,7 @@ vuint8m1_t test_vnclipu_wx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnclipu_wv_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m2_mu( @@ -903,7 +903,7 @@ vuint8m2_t test_vnclipu_wv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnclipu_wx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u8m4_mu( @@ -912,7 +912,7 @@ vuint8m2_t test_vnclipu_wx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnclipu_wv_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u8m4_mu( @@ -921,7 +921,7 @@ vuint8m4_t test_vnclipu_wv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnclipu_wx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf4_mu( @@ -930,7 +930,7 @@ vuint8m4_t test_vnclipu_wx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnclipu_wv_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf4_mu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vnclipu_wv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnclipu_wx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16mf2_mu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vnclipu_wx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnclipu_wv_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16mf2_mu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vnclipu_wv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnclipu_wx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m1_mu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vnclipu_wx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnclipu_wv_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m1_mu( @@ -975,7 +975,7 @@ vuint16m1_t test_vnclipu_wv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnclipu_wx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m2_mu( @@ -984,7 +984,7 @@ vuint16m1_t test_vnclipu_wx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnclipu_wv_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m2_mu( @@ -993,7 +993,7 @@ vuint16m2_t test_vnclipu_wv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnclipu_wx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u16m4_mu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vnclipu_wx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnclipu_wv_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u16m4_mu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vnclipu_wv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnclipu_wx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32mf2_mu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vnclipu_wx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnclipu_wv_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32mf2_mu( @@ -1029,7 +1029,7 @@ vuint32mf2_t test_vnclipu_wv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnclipu_wx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m1_mu( @@ -1038,7 +1038,7 @@ vuint32mf2_t test_vnclipu_wx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnclipu_wv_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m1_mu( @@ -1047,7 +1047,7 @@ vuint32m1_t test_vnclipu_wv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnclipu_wx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m2_mu( @@ -1056,7 +1056,7 @@ vuint32m1_t test_vnclipu_wx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnclipu_wv_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m2_mu( @@ -1065,7 +1065,7 @@ vuint32m2_t test_vnclipu_wv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnclipu_wx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wv_u32m4_mu( @@ -1074,7 +1074,7 @@ vuint32m2_t test_vnclipu_wx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnclipu_wv_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wv_u32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnclipu_wx_u32m4_mu( @@ -1083,6 +1083,6 @@ vuint32m4_t test_vnclipu_wv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnclipu_wx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vnclipu_wx_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnclipu_wx_u32m4_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vncvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vncvt.c index 76c3e732d4a27aada5e67ef6f47711a26165d07e..fa3be7ceff59498750fa75974605834aed325b6b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vncvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vncvt.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vncvt_x_x_w_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t src, size_t vl) { - return vncvt_x_x_w_i8mf8_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf4_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vncvt_x_x_w_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vncvt_x_x_w_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t src, size_t vl) { - return vncvt_x_x_w_i8mf4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf2_tu( @@ -30,7 +30,7 @@ vint8mf4_t test_vncvt_x_x_w_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vncvt_x_x_w_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t src, size_t vl) { - return vncvt_x_x_w_i8mf2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m1_tu( @@ -39,7 +39,7 @@ vint8mf2_t test_vncvt_x_x_w_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vncvt_x_x_w_i8m1_tu(vint8m1_t maskedoff, vint16m2_t src, size_t vl) { - return vncvt_x_x_w_i8m1_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m2_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vncvt_x_x_w_i8m1_tu(vint8m1_t maskedoff, vint16m2_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vncvt_x_x_w_i8m2_tu(vint8m2_t maskedoff, vint16m4_t src, size_t vl) { - return vncvt_x_x_w_i8m2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m4_tu( @@ -57,7 +57,7 @@ vint8m2_t test_vncvt_x_x_w_i8m2_tu(vint8m2_t maskedoff, vint16m4_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vncvt_x_x_w_i8m4_tu(vint8m4_t maskedoff, vint16m8_t src, size_t vl) { - return vncvt_x_x_w_i8m4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf8_tu( @@ -66,7 +66,7 @@ vint8m4_t test_vncvt_x_x_w_i8m4_tu(vint8m4_t maskedoff, vint16m8_t src, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vncvt_x_x_w_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t src, size_t vl) { - return vncvt_x_x_w_u8mf8_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf4_tu( @@ -75,7 +75,7 @@ vuint8mf8_t test_vncvt_x_x_w_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vncvt_x_x_w_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t src, size_t vl) { - return vncvt_x_x_w_u8mf4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf2_tu( @@ -84,7 +84,7 @@ vuint8mf4_t test_vncvt_x_x_w_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vncvt_x_x_w_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t src, size_t vl) { - return vncvt_x_x_w_u8mf2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m1_tu( @@ -93,7 +93,7 @@ vuint8mf2_t test_vncvt_x_x_w_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vncvt_x_x_w_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t src, size_t vl) { - return vncvt_x_x_w_u8m1_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m2_tu( @@ -102,7 +102,7 @@ vuint8m1_t test_vncvt_x_x_w_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vncvt_x_x_w_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t src, size_t vl) { - return vncvt_x_x_w_u8m2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m2_t test_vncvt_x_x_w_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vncvt_x_x_w_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t src, size_t vl) { - return vncvt_x_x_w_u8m4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf4_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vncvt_x_x_w_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vncvt_x_x_w_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t src, size_t vl) { - return vncvt_x_x_w_i16mf4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf2_tu( @@ -129,7 +129,7 @@ vint16mf4_t test_vncvt_x_x_w_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vncvt_x_x_w_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t src, size_t vl) { - return vncvt_x_x_w_i16mf2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m1_tu( @@ -138,7 +138,7 @@ vint16mf2_t test_vncvt_x_x_w_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vncvt_x_x_w_i16m1_tu(vint16m1_t maskedoff, vint32m2_t src, size_t vl) { - return vncvt_x_x_w_i16m1_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m2_tu( @@ -147,7 +147,7 @@ vint16m1_t test_vncvt_x_x_w_i16m1_tu(vint16m1_t maskedoff, vint32m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vncvt_x_x_w_i16m2_tu(vint16m2_t maskedoff, vint32m4_t src, size_t vl) { - return vncvt_x_x_w_i16m2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m4_tu( @@ -156,7 +156,7 @@ vint16m2_t test_vncvt_x_x_w_i16m2_tu(vint16m2_t maskedoff, vint32m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vncvt_x_x_w_i16m4_tu(vint16m4_t maskedoff, vint32m8_t src, size_t vl) { - return vncvt_x_x_w_i16m4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf4_tu( @@ -165,7 +165,7 @@ vint16m4_t test_vncvt_x_x_w_i16m4_tu(vint16m4_t maskedoff, vint32m8_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vncvt_x_x_w_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t src, size_t vl) { - return vncvt_x_x_w_u16mf4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf2_tu( @@ -174,7 +174,7 @@ vuint16mf4_t test_vncvt_x_x_w_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vncvt_x_x_w_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t src, size_t vl) { - return vncvt_x_x_w_u16mf2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m1_tu( @@ -183,7 +183,7 @@ vuint16mf2_t test_vncvt_x_x_w_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vncvt_x_x_w_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t src, size_t vl) { - return vncvt_x_x_w_u16m1_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vncvt_x_x_w_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vncvt_x_x_w_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t src, size_t vl) { - return vncvt_x_x_w_u16m2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m4_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vncvt_x_x_w_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vncvt_x_x_w_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t src, size_t vl) { - return vncvt_x_x_w_u16m4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32mf2_tu( @@ -210,7 +210,7 @@ vuint16m4_t test_vncvt_x_x_w_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vncvt_x_x_w_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t src, size_t vl) { - return vncvt_x_x_w_i32mf2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m1_tu( @@ -219,7 +219,7 @@ vint32mf2_t test_vncvt_x_x_w_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vncvt_x_x_w_i32m1_tu(vint32m1_t maskedoff, vint64m2_t src, size_t vl) { - return vncvt_x_x_w_i32m1_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m2_tu( @@ -228,7 +228,7 @@ vint32m1_t test_vncvt_x_x_w_i32m1_tu(vint32m1_t maskedoff, vint64m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vncvt_x_x_w_i32m2_tu(vint32m2_t maskedoff, vint64m4_t src, size_t vl) { - return vncvt_x_x_w_i32m2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m4_tu( @@ -237,7 +237,7 @@ vint32m2_t test_vncvt_x_x_w_i32m2_tu(vint32m2_t maskedoff, vint64m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vncvt_x_x_w_i32m4_tu(vint32m4_t maskedoff, vint64m8_t src, size_t vl) { - return vncvt_x_x_w_i32m4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32mf2_tu( @@ -246,7 +246,7 @@ vint32m4_t test_vncvt_x_x_w_i32m4_tu(vint32m4_t maskedoff, vint64m8_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vncvt_x_x_w_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t src, size_t vl) { - return vncvt_x_x_w_u32mf2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m1_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vncvt_x_x_w_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vncvt_x_x_w_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t src, size_t vl) { - return vncvt_x_x_w_u32m1_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m2_tu( @@ -264,7 +264,7 @@ vuint32m1_t test_vncvt_x_x_w_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vncvt_x_x_w_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t src, size_t vl) { - return vncvt_x_x_w_u32m2_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m4_tu( @@ -273,7 +273,7 @@ vuint32m2_t test_vncvt_x_x_w_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vncvt_x_x_w_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t src, size_t vl) { - return vncvt_x_x_w_u32m4_tu(maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf8_tum( @@ -282,7 +282,7 @@ vuint32m4_t test_vncvt_x_x_w_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vncvt_x_x_w_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t src, size_t vl) { - return vncvt_x_x_w_i8mf8_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf4_tum( @@ -291,7 +291,7 @@ vint8mf8_t test_vncvt_x_x_w_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vncvt_x_x_w_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t src, size_t vl) { - return vncvt_x_x_w_i8mf4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf2_tum( @@ -300,7 +300,7 @@ vint8mf4_t test_vncvt_x_x_w_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vncvt_x_x_w_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t src, size_t vl) { - return vncvt_x_x_w_i8mf2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m1_tum( @@ -309,7 +309,7 @@ vint8mf2_t test_vncvt_x_x_w_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vncvt_x_x_w_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t src, size_t vl) { - return vncvt_x_x_w_i8m1_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m2_tum( @@ -318,7 +318,7 @@ vint8m1_t test_vncvt_x_x_w_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vncvt_x_x_w_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t src, size_t vl) { - return vncvt_x_x_w_i8m2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m4_tum( @@ -327,7 +327,7 @@ vint8m2_t test_vncvt_x_x_w_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vncvt_x_x_w_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t src, size_t vl) { - return vncvt_x_x_w_i8m4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf8_tum( @@ -336,7 +336,7 @@ vint8m4_t test_vncvt_x_x_w_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vncvt_x_x_w_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t src, size_t vl) { - return vncvt_x_x_w_u8mf8_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf4_tum( @@ -345,7 +345,7 @@ vuint8mf8_t test_vncvt_x_x_w_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vncvt_x_x_w_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t src, size_t vl) { - return vncvt_x_x_w_u8mf4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf2_tum( @@ -354,7 +354,7 @@ vuint8mf4_t test_vncvt_x_x_w_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vncvt_x_x_w_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t src, size_t vl) { - return vncvt_x_x_w_u8mf2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m1_tum( @@ -363,7 +363,7 @@ vuint8mf2_t test_vncvt_x_x_w_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vncvt_x_x_w_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t src, size_t vl) { - return vncvt_x_x_w_u8m1_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m2_tum( @@ -372,7 +372,7 @@ vuint8m1_t test_vncvt_x_x_w_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vncvt_x_x_w_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t src, size_t vl) { - return vncvt_x_x_w_u8m2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m4_tum( @@ -381,7 +381,7 @@ vuint8m2_t test_vncvt_x_x_w_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vncvt_x_x_w_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t src, size_t vl) { - return vncvt_x_x_w_u8m4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf4_tum( @@ -390,7 +390,7 @@ vuint8m4_t test_vncvt_x_x_w_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vncvt_x_x_w_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t src, size_t vl) { - return vncvt_x_x_w_i16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf2_tum( @@ -399,7 +399,7 @@ vint16mf4_t test_vncvt_x_x_w_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vncvt_x_x_w_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t src, size_t vl) { - return vncvt_x_x_w_i16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m1_tum( @@ -408,7 +408,7 @@ vint16mf2_t test_vncvt_x_x_w_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vncvt_x_x_w_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t src, size_t vl) { - return vncvt_x_x_w_i16m1_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m2_tum( @@ -417,7 +417,7 @@ vint16m1_t test_vncvt_x_x_w_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vncvt_x_x_w_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t src, size_t vl) { - return vncvt_x_x_w_i16m2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m4_tum( @@ -426,7 +426,7 @@ vint16m2_t test_vncvt_x_x_w_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vncvt_x_x_w_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t src, size_t vl) { - return vncvt_x_x_w_i16m4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf4_tum( @@ -435,7 +435,7 @@ vint16m4_t test_vncvt_x_x_w_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vncvt_x_x_w_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t src, size_t vl) { - return vncvt_x_x_w_u16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf2_tum( @@ -444,7 +444,7 @@ vuint16mf4_t test_vncvt_x_x_w_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vncvt_x_x_w_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t src, size_t vl) { - return vncvt_x_x_w_u16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m1_tum( @@ -453,7 +453,7 @@ vuint16mf2_t test_vncvt_x_x_w_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vncvt_x_x_w_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t src, size_t vl) { - return vncvt_x_x_w_u16m1_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m2_tum( @@ -462,7 +462,7 @@ vuint16m1_t test_vncvt_x_x_w_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vncvt_x_x_w_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t src, size_t vl) { - return vncvt_x_x_w_u16m2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m4_tum( @@ -471,7 +471,7 @@ vuint16m2_t test_vncvt_x_x_w_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vncvt_x_x_w_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t src, size_t vl) { - return vncvt_x_x_w_u16m4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32mf2_tum( @@ -480,7 +480,7 @@ vuint16m4_t test_vncvt_x_x_w_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vncvt_x_x_w_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t src, size_t vl) { - return vncvt_x_x_w_i32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m1_tum( @@ -489,7 +489,7 @@ vint32mf2_t test_vncvt_x_x_w_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vncvt_x_x_w_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t src, size_t vl) { - return vncvt_x_x_w_i32m1_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m2_tum( @@ -498,7 +498,7 @@ vint32m1_t test_vncvt_x_x_w_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vncvt_x_x_w_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t src, size_t vl) { - return vncvt_x_x_w_i32m2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m4_tum( @@ -507,7 +507,7 @@ vint32m2_t test_vncvt_x_x_w_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vncvt_x_x_w_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t src, size_t vl) { - return vncvt_x_x_w_i32m4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32mf2_tum( @@ -516,7 +516,7 @@ vint32m4_t test_vncvt_x_x_w_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vncvt_x_x_w_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t src, size_t vl) { - return vncvt_x_x_w_u32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m1_tum( @@ -525,7 +525,7 @@ vuint32mf2_t test_vncvt_x_x_w_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vncvt_x_x_w_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t src, size_t vl) { - return vncvt_x_x_w_u32m1_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m2_tum( @@ -534,7 +534,7 @@ vuint32m1_t test_vncvt_x_x_w_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vncvt_x_x_w_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t src, size_t vl) { - return vncvt_x_x_w_u32m2_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m4_tum( @@ -543,7 +543,7 @@ vuint32m2_t test_vncvt_x_x_w_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vncvt_x_x_w_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t src, size_t vl) { - return vncvt_x_x_w_u32m4_tum(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf8_tumu( @@ -552,7 +552,7 @@ vuint32m4_t test_vncvt_x_x_w_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vncvt_x_x_w_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t src, size_t vl) { - return vncvt_x_x_w_i8mf8_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf4_tumu( @@ -561,7 +561,7 @@ vint8mf8_t test_vncvt_x_x_w_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vncvt_x_x_w_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t src, size_t vl) { - return vncvt_x_x_w_i8mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf2_tumu( @@ -570,7 +570,7 @@ vint8mf4_t test_vncvt_x_x_w_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vncvt_x_x_w_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t src, size_t vl) { - return vncvt_x_x_w_i8mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m1_tumu( @@ -579,7 +579,7 @@ vint8mf2_t test_vncvt_x_x_w_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vncvt_x_x_w_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t src, size_t vl) { - return vncvt_x_x_w_i8m1_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m2_tumu( @@ -588,7 +588,7 @@ vint8m1_t test_vncvt_x_x_w_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vncvt_x_x_w_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t src, size_t vl) { - return vncvt_x_x_w_i8m2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m4_tumu( @@ -597,7 +597,7 @@ vint8m2_t test_vncvt_x_x_w_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vncvt_x_x_w_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t src, size_t vl) { - return vncvt_x_x_w_i8m4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf8_tumu( @@ -606,7 +606,7 @@ vint8m4_t test_vncvt_x_x_w_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vncvt_x_x_w_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t src, size_t vl) { - return vncvt_x_x_w_u8mf8_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf4_tumu( @@ -615,7 +615,7 @@ vuint8mf8_t test_vncvt_x_x_w_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vncvt_x_x_w_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t src, size_t vl) { - return vncvt_x_x_w_u8mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf2_tumu( @@ -624,7 +624,7 @@ vuint8mf4_t test_vncvt_x_x_w_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vncvt_x_x_w_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t src, size_t vl) { - return vncvt_x_x_w_u8mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m1_tumu( @@ -633,7 +633,7 @@ vuint8mf2_t test_vncvt_x_x_w_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vncvt_x_x_w_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t src, size_t vl) { - return vncvt_x_x_w_u8m1_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m2_tumu( @@ -642,7 +642,7 @@ vuint8m1_t test_vncvt_x_x_w_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vncvt_x_x_w_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t src, size_t vl) { - return vncvt_x_x_w_u8m2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m4_tumu( @@ -651,7 +651,7 @@ vuint8m2_t test_vncvt_x_x_w_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vncvt_x_x_w_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t src, size_t vl) { - return vncvt_x_x_w_u8m4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf4_tumu( @@ -660,7 +660,7 @@ vuint8m4_t test_vncvt_x_x_w_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vncvt_x_x_w_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t src, size_t vl) { - return vncvt_x_x_w_i16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf2_tumu( @@ -669,7 +669,7 @@ vint16mf4_t test_vncvt_x_x_w_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vncvt_x_x_w_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t src, size_t vl) { - return vncvt_x_x_w_i16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m1_tumu( @@ -678,7 +678,7 @@ vint16mf2_t test_vncvt_x_x_w_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vncvt_x_x_w_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t src, size_t vl) { - return vncvt_x_x_w_i16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m2_tumu( @@ -687,7 +687,7 @@ vint16m1_t test_vncvt_x_x_w_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vncvt_x_x_w_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t src, size_t vl) { - return vncvt_x_x_w_i16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m4_tumu( @@ -696,7 +696,7 @@ vint16m2_t test_vncvt_x_x_w_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vncvt_x_x_w_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t src, size_t vl) { - return vncvt_x_x_w_i16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf4_tumu( @@ -705,7 +705,7 @@ vint16m4_t test_vncvt_x_x_w_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vncvt_x_x_w_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t src, size_t vl) { - return vncvt_x_x_w_u16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf2_tumu( @@ -714,7 +714,7 @@ vuint16mf4_t test_vncvt_x_x_w_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vncvt_x_x_w_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t src, size_t vl) { - return vncvt_x_x_w_u16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m1_tumu( @@ -723,7 +723,7 @@ vuint16mf2_t test_vncvt_x_x_w_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vncvt_x_x_w_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t src, size_t vl) { - return vncvt_x_x_w_u16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m2_tumu( @@ -732,7 +732,7 @@ vuint16m1_t test_vncvt_x_x_w_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vncvt_x_x_w_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t src, size_t vl) { - return vncvt_x_x_w_u16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m4_tumu( @@ -741,7 +741,7 @@ vuint16m2_t test_vncvt_x_x_w_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vncvt_x_x_w_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t src, size_t vl) { - return vncvt_x_x_w_u16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32mf2_tumu( @@ -750,7 +750,7 @@ vuint16m4_t test_vncvt_x_x_w_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vncvt_x_x_w_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t src, size_t vl) { - return vncvt_x_x_w_i32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m1_tumu( @@ -759,7 +759,7 @@ vint32mf2_t test_vncvt_x_x_w_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vncvt_x_x_w_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t src, size_t vl) { - return vncvt_x_x_w_i32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m2_tumu( @@ -768,7 +768,7 @@ vint32m1_t test_vncvt_x_x_w_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vncvt_x_x_w_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t src, size_t vl) { - return vncvt_x_x_w_i32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m4_tumu( @@ -777,7 +777,7 @@ vint32m2_t test_vncvt_x_x_w_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vncvt_x_x_w_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t src, size_t vl) { - return vncvt_x_x_w_i32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32mf2_tumu( @@ -786,7 +786,7 @@ vint32m4_t test_vncvt_x_x_w_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vncvt_x_x_w_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t src, size_t vl) { - return vncvt_x_x_w_u32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m1_tumu( @@ -795,7 +795,7 @@ vuint32mf2_t test_vncvt_x_x_w_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vncvt_x_x_w_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t src, size_t vl) { - return vncvt_x_x_w_u32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m2_tumu( @@ -804,7 +804,7 @@ vuint32m1_t test_vncvt_x_x_w_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vncvt_x_x_w_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t src, size_t vl) { - return vncvt_x_x_w_u32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m4_tumu( @@ -813,7 +813,7 @@ vuint32m2_t test_vncvt_x_x_w_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vncvt_x_x_w_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t src, size_t vl) { - return vncvt_x_x_w_u32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf8_mu( @@ -822,7 +822,7 @@ vuint32m4_t test_vncvt_x_x_w_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vncvt_x_x_w_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t src, size_t vl) { - return vncvt_x_x_w_i8mf8_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf4_mu( @@ -831,7 +831,7 @@ vint8mf8_t test_vncvt_x_x_w_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vncvt_x_x_w_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t src, size_t vl) { - return vncvt_x_x_w_i8mf4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8mf2_mu( @@ -840,7 +840,7 @@ vint8mf4_t test_vncvt_x_x_w_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vncvt_x_x_w_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t src, size_t vl) { - return vncvt_x_x_w_i8mf2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m1_mu( @@ -849,7 +849,7 @@ vint8mf2_t test_vncvt_x_x_w_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vncvt_x_x_w_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t src, size_t vl) { - return vncvt_x_x_w_i8m1_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m2_mu( @@ -858,7 +858,7 @@ vint8m1_t test_vncvt_x_x_w_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vncvt_x_x_w_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t src, size_t vl) { - return vncvt_x_x_w_i8m2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i8m4_mu( @@ -867,7 +867,7 @@ vint8m2_t test_vncvt_x_x_w_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vncvt_x_x_w_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t src, size_t vl) { - return vncvt_x_x_w_i8m4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i8m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf8_mu( @@ -876,7 +876,7 @@ vint8m4_t test_vncvt_x_x_w_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vncvt_x_x_w_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t src, size_t vl) { - return vncvt_x_x_w_u8mf8_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf4_mu( @@ -885,7 +885,7 @@ vuint8mf8_t test_vncvt_x_x_w_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vncvt_x_x_w_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t src, size_t vl) { - return vncvt_x_x_w_u8mf4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8mf2_mu( @@ -894,7 +894,7 @@ vuint8mf4_t test_vncvt_x_x_w_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vncvt_x_x_w_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t src, size_t vl) { - return vncvt_x_x_w_u8mf2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m1_mu( @@ -903,7 +903,7 @@ vuint8mf2_t test_vncvt_x_x_w_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vncvt_x_x_w_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t src, size_t vl) { - return vncvt_x_x_w_u8m1_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m2_mu( @@ -912,7 +912,7 @@ vuint8m1_t test_vncvt_x_x_w_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vncvt_x_x_w_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t src, size_t vl) { - return vncvt_x_x_w_u8m2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u8m4_mu( @@ -921,7 +921,7 @@ vuint8m2_t test_vncvt_x_x_w_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vncvt_x_x_w_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t src, size_t vl) { - return vncvt_x_x_w_u8m4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u8m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf4_mu( @@ -930,7 +930,7 @@ vuint8m4_t test_vncvt_x_x_w_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vncvt_x_x_w_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t src, size_t vl) { - return vncvt_x_x_w_i16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16mf2_mu( @@ -939,7 +939,7 @@ vint16mf4_t test_vncvt_x_x_w_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vncvt_x_x_w_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t src, size_t vl) { - return vncvt_x_x_w_i16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m1_mu( @@ -948,7 +948,7 @@ vint16mf2_t test_vncvt_x_x_w_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vncvt_x_x_w_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t src, size_t vl) { - return vncvt_x_x_w_i16m1_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m2_mu( @@ -957,7 +957,7 @@ vint16m1_t test_vncvt_x_x_w_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vncvt_x_x_w_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t src, size_t vl) { - return vncvt_x_x_w_i16m2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i16m4_mu( @@ -966,7 +966,7 @@ vint16m2_t test_vncvt_x_x_w_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vncvt_x_x_w_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t src, size_t vl) { - return vncvt_x_x_w_i16m4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf4_mu( @@ -975,7 +975,7 @@ vint16m4_t test_vncvt_x_x_w_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vncvt_x_x_w_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t src, size_t vl) { - return vncvt_x_x_w_u16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16mf2_mu( @@ -984,7 +984,7 @@ vuint16mf4_t test_vncvt_x_x_w_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vncvt_x_x_w_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t src, size_t vl) { - return vncvt_x_x_w_u16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m1_mu( @@ -993,7 +993,7 @@ vuint16mf2_t test_vncvt_x_x_w_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vncvt_x_x_w_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t src, size_t vl) { - return vncvt_x_x_w_u16m1_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m2_mu( @@ -1002,7 +1002,7 @@ vuint16m1_t test_vncvt_x_x_w_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vncvt_x_x_w_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t src, size_t vl) { - return vncvt_x_x_w_u16m2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u16m4_mu( @@ -1011,7 +1011,7 @@ vuint16m2_t test_vncvt_x_x_w_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vncvt_x_x_w_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t src, size_t vl) { - return vncvt_x_x_w_u16m4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32mf2_mu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vncvt_x_x_w_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vncvt_x_x_w_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t src, size_t vl) { - return vncvt_x_x_w_i32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m1_mu( @@ -1029,7 +1029,7 @@ vint32mf2_t test_vncvt_x_x_w_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vncvt_x_x_w_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t src, size_t vl) { - return vncvt_x_x_w_i32m1_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m2_mu( @@ -1038,7 +1038,7 @@ vint32m1_t test_vncvt_x_x_w_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vncvt_x_x_w_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t src, size_t vl) { - return vncvt_x_x_w_i32m2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_i32m4_mu( @@ -1047,7 +1047,7 @@ vint32m2_t test_vncvt_x_x_w_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vncvt_x_x_w_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t src, size_t vl) { - return vncvt_x_x_w_i32m4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_i32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32mf2_mu( @@ -1056,7 +1056,7 @@ vint32m4_t test_vncvt_x_x_w_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vncvt_x_x_w_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t src, size_t vl) { - return vncvt_x_x_w_u32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m1_mu( @@ -1065,7 +1065,7 @@ vuint32mf2_t test_vncvt_x_x_w_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vncvt_x_x_w_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t src, size_t vl) { - return vncvt_x_x_w_u32m1_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m2_mu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vncvt_x_x_w_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vncvt_x_x_w_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t src, size_t vl) { - return vncvt_x_x_w_u32m2_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vncvt_x_x_w_u32m4_mu( @@ -1083,6 +1083,6 @@ vuint32m2_t test_vncvt_x_x_w_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vncvt_x_x_w_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t src, size_t vl) { - return vncvt_x_x_w_u32m4_mu(mask, maskedoff, src, vl); + return __riscv_vncvt_x_x_w_u32m4_mu(mask, maskedoff, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vneg.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vneg.c index 89cca3bd79302a8986949df040316d91d86079cc..58557df51c54ca78bf142858cd95017ccab5da51 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vneg.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vneg.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vneg_v_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) { - return vneg_v_i8mf8_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i8mf8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf4_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vneg_v_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vneg_v_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) { - return vneg_v_i8mf4_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i8mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf2_tu( @@ -31,7 +31,7 @@ vint8mf4_t test_vneg_v_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vneg_v_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vneg_v_i8mf2_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i8mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m1_tu( @@ -40,7 +40,7 @@ vint8mf2_t test_vneg_v_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vneg_v_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { - return vneg_v_i8m1_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i8m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m2_tu( @@ -49,7 +49,7 @@ vint8m1_t test_vneg_v_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vneg_v_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { - return vneg_v_i8m2_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i8m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m4_tu( @@ -58,7 +58,7 @@ vint8m2_t test_vneg_v_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vneg_v_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { - return vneg_v_i8m4_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i8m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m8_tu( @@ -67,7 +67,7 @@ vint8m4_t test_vneg_v_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vneg_v_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { - return vneg_v_i8m8_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i8m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf4_tu( @@ -76,7 +76,7 @@ vint8m8_t test_vneg_v_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vneg_v_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_t vl) { - return vneg_v_i16mf4_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf2_tu( @@ -85,7 +85,7 @@ vint16mf4_t test_vneg_v_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vneg_v_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vneg_v_i16mf2_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m1_tu( @@ -94,7 +94,7 @@ vint16mf2_t test_vneg_v_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vneg_v_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t vl) { - return vneg_v_i16m1_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m2_tu( @@ -103,7 +103,7 @@ vint16m1_t test_vneg_v_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vneg_v_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t vl) { - return vneg_v_i16m2_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m4_tu( @@ -112,7 +112,7 @@ vint16m2_t test_vneg_v_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vneg_v_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t vl) { - return vneg_v_i16m4_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m8_tu( @@ -121,7 +121,7 @@ vint16m4_t test_vneg_v_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vneg_v_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t vl) { - return vneg_v_i16m8_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32mf2_tu( @@ -130,7 +130,7 @@ vint16m8_t test_vneg_v_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vneg_v_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_t vl) { - return vneg_v_i32mf2_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m1_tu( @@ -139,7 +139,7 @@ vint32mf2_t test_vneg_v_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vneg_v_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t vl) { - return vneg_v_i32m1_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m2_tu( @@ -148,7 +148,7 @@ vint32m1_t test_vneg_v_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vneg_v_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t vl) { - return vneg_v_i32m2_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m4_tu( @@ -157,7 +157,7 @@ vint32m2_t test_vneg_v_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vneg_v_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t vl) { - return vneg_v_i32m4_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m8_tu( @@ -166,7 +166,7 @@ vint32m4_t test_vneg_v_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vneg_v_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t vl) { - return vneg_v_i32m8_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m1_tu( @@ -175,7 +175,7 @@ vint32m8_t test_vneg_v_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vneg_v_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t vl) { - return vneg_v_i64m1_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m2_tu( @@ -184,7 +184,7 @@ vint64m1_t test_vneg_v_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vneg_v_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t vl) { - return vneg_v_i64m2_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m4_tu( @@ -193,7 +193,7 @@ vint64m2_t test_vneg_v_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vneg_v_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t vl) { - return vneg_v_i64m4_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m8_tu( @@ -202,7 +202,7 @@ vint64m4_t test_vneg_v_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vneg_v_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t vl) { - return vneg_v_i64m8_tu(maskedoff, op1, vl); + return __riscv_vneg_v_i64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf8_tum( @@ -211,7 +211,7 @@ vint64m8_t test_vneg_v_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vneg_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) { - return vneg_v_i8mf8_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf4_tum( @@ -220,7 +220,7 @@ vint8mf8_t test_vneg_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vneg_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) { - return vneg_v_i8mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf2_tum( @@ -229,7 +229,7 @@ vint8mf4_t test_vneg_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vneg_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vneg_v_i8mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m1_tum( @@ -238,7 +238,7 @@ vint8mf2_t test_vneg_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vneg_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { - return vneg_v_i8m1_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m2_tum( @@ -247,7 +247,7 @@ vint8m1_t test_vneg_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vneg_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { - return vneg_v_i8m2_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m4_tum( @@ -256,7 +256,7 @@ vint8m2_t test_vneg_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vneg_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { - return vneg_v_i8m4_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m8_tum( @@ -265,7 +265,7 @@ vint8m4_t test_vneg_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vneg_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { - return vneg_v_i8m8_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf4_tum( @@ -274,7 +274,7 @@ vint8m8_t test_vneg_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vneg_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t vl) { - return vneg_v_i16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf2_tum( @@ -283,7 +283,7 @@ vint16mf4_t test_vneg_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vneg_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vneg_v_i16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m1_tum( @@ -292,7 +292,7 @@ vint16mf2_t test_vneg_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vneg_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t vl) { - return vneg_v_i16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m2_tum( @@ -301,7 +301,7 @@ vint16m1_t test_vneg_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vneg_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t vl) { - return vneg_v_i16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m4_tum( @@ -310,7 +310,7 @@ vint16m2_t test_vneg_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vneg_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t vl) { - return vneg_v_i16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m8_tum( @@ -319,7 +319,7 @@ vint16m4_t test_vneg_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vneg_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t vl) { - return vneg_v_i16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32mf2_tum( @@ -328,7 +328,7 @@ vint16m8_t test_vneg_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vneg_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t vl) { - return vneg_v_i32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m1_tum( @@ -337,7 +337,7 @@ vint32mf2_t test_vneg_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vneg_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t vl) { - return vneg_v_i32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m2_tum( @@ -346,7 +346,7 @@ vint32m1_t test_vneg_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vneg_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t vl) { - return vneg_v_i32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m4_tum( @@ -355,7 +355,7 @@ vint32m2_t test_vneg_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vneg_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t vl) { - return vneg_v_i32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m8_tum( @@ -364,7 +364,7 @@ vint32m4_t test_vneg_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vneg_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t vl) { - return vneg_v_i32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m1_tum( @@ -373,7 +373,7 @@ vint32m8_t test_vneg_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vneg_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t vl) { - return vneg_v_i64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m2_tum( @@ -382,7 +382,7 @@ vint64m1_t test_vneg_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vneg_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t vl) { - return vneg_v_i64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m4_tum( @@ -391,7 +391,7 @@ vint64m2_t test_vneg_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vneg_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t vl) { - return vneg_v_i64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m8_tum( @@ -400,7 +400,7 @@ vint64m4_t test_vneg_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vneg_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t vl) { - return vneg_v_i64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf8_tumu( @@ -409,7 +409,7 @@ vint64m8_t test_vneg_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vneg_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) { - return vneg_v_i8mf8_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf4_tumu( @@ -418,7 +418,7 @@ vint8mf8_t test_vneg_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vneg_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) { - return vneg_v_i8mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf2_tumu( @@ -427,7 +427,7 @@ vint8mf4_t test_vneg_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vneg_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vneg_v_i8mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m1_tumu( @@ -436,7 +436,7 @@ vint8mf2_t test_vneg_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vneg_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { - return vneg_v_i8m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m2_tumu( @@ -445,7 +445,7 @@ vint8m1_t test_vneg_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vneg_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { - return vneg_v_i8m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m4_tumu( @@ -454,7 +454,7 @@ vint8m2_t test_vneg_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vneg_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { - return vneg_v_i8m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m8_tumu( @@ -463,7 +463,7 @@ vint8m4_t test_vneg_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vneg_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { - return vneg_v_i8m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf4_tumu( @@ -472,7 +472,7 @@ vint8m8_t test_vneg_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vneg_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t vl) { - return vneg_v_i16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf2_tumu( @@ -481,7 +481,7 @@ vint16mf4_t test_vneg_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vneg_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vneg_v_i16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m1_tumu( @@ -490,7 +490,7 @@ vint16mf2_t test_vneg_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vneg_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t vl) { - return vneg_v_i16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m2_tumu( @@ -499,7 +499,7 @@ vint16m1_t test_vneg_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vneg_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t vl) { - return vneg_v_i16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m4_tumu( @@ -508,7 +508,7 @@ vint16m2_t test_vneg_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vneg_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t vl) { - return vneg_v_i16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m8_tumu( @@ -517,7 +517,7 @@ vint16m4_t test_vneg_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vneg_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t vl) { - return vneg_v_i16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32mf2_tumu( @@ -526,7 +526,7 @@ vint16m8_t test_vneg_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vneg_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t vl) { - return vneg_v_i32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m1_tumu( @@ -535,7 +535,7 @@ vint32mf2_t test_vneg_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vneg_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t vl) { - return vneg_v_i32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m2_tumu( @@ -544,7 +544,7 @@ vint32m1_t test_vneg_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vneg_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t vl) { - return vneg_v_i32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m4_tumu( @@ -553,7 +553,7 @@ vint32m2_t test_vneg_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vneg_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t vl) { - return vneg_v_i32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m8_tumu( @@ -562,7 +562,7 @@ vint32m4_t test_vneg_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vneg_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t vl) { - return vneg_v_i32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m1_tumu( @@ -571,7 +571,7 @@ vint32m8_t test_vneg_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vneg_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t vl) { - return vneg_v_i64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m2_tumu( @@ -580,7 +580,7 @@ vint64m1_t test_vneg_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vneg_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t vl) { - return vneg_v_i64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m4_tumu( @@ -589,7 +589,7 @@ vint64m2_t test_vneg_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vneg_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t vl) { - return vneg_v_i64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m8_tumu( @@ -598,7 +598,7 @@ vint64m4_t test_vneg_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vneg_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t vl) { - return vneg_v_i64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf8_mu( @@ -607,7 +607,7 @@ vint64m8_t test_vneg_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vneg_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) { - return vneg_v_i8mf8_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf4_mu( @@ -616,7 +616,7 @@ vint8mf8_t test_vneg_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vneg_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) { - return vneg_v_i8mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8mf2_mu( @@ -625,7 +625,7 @@ vint8mf4_t test_vneg_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vneg_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vneg_v_i8mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m1_mu( @@ -634,7 +634,7 @@ vint8mf2_t test_vneg_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vneg_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { - return vneg_v_i8m1_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m2_mu( @@ -643,7 +643,7 @@ vint8m1_t test_vneg_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vneg_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { - return vneg_v_i8m2_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m4_mu( @@ -652,7 +652,7 @@ vint8m2_t test_vneg_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vneg_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { - return vneg_v_i8m4_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i8m8_mu( @@ -661,7 +661,7 @@ vint8m4_t test_vneg_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vneg_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { - return vneg_v_i8m8_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i8m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf4_mu( @@ -670,7 +670,7 @@ vint8m8_t test_vneg_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vneg_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t vl) { - return vneg_v_i16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16mf2_mu( @@ -679,7 +679,7 @@ vint16mf4_t test_vneg_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vneg_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vneg_v_i16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m1_mu( @@ -688,7 +688,7 @@ vint16mf2_t test_vneg_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vneg_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t vl) { - return vneg_v_i16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m2_mu( @@ -697,7 +697,7 @@ vint16m1_t test_vneg_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vneg_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t vl) { - return vneg_v_i16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m4_mu( @@ -706,7 +706,7 @@ vint16m2_t test_vneg_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vneg_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t vl) { - return vneg_v_i16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i16m8_mu( @@ -715,7 +715,7 @@ vint16m4_t test_vneg_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vneg_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t vl) { - return vneg_v_i16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32mf2_mu( @@ -724,7 +724,7 @@ vint16m8_t test_vneg_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vneg_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t vl) { - return vneg_v_i32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m1_mu( @@ -733,7 +733,7 @@ vint32mf2_t test_vneg_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vneg_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t vl) { - return vneg_v_i32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m2_mu( @@ -742,7 +742,7 @@ vint32m1_t test_vneg_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vneg_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t vl) { - return vneg_v_i32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m4_mu( @@ -751,7 +751,7 @@ vint32m2_t test_vneg_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vneg_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t vl) { - return vneg_v_i32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i32m8_mu( @@ -760,7 +760,7 @@ vint32m4_t test_vneg_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vneg_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t vl) { - return vneg_v_i32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m1_mu( @@ -769,7 +769,7 @@ vint32m8_t test_vneg_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vneg_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t vl) { - return vneg_v_i64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m2_mu( @@ -778,7 +778,7 @@ vint64m1_t test_vneg_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vneg_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t vl) { - return vneg_v_i64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m4_mu( @@ -787,7 +787,7 @@ vint64m2_t test_vneg_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vneg_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t vl) { - return vneg_v_i64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vneg_v_i64m8_mu( @@ -796,6 +796,6 @@ vint64m4_t test_vneg_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vneg_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t vl) { - return vneg_v_i64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vneg_v_i64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnmsac.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnmsac.c index fc2bba85817de8348d6630ff16e61e936da194cc..6037878f3e398fce19071962b04948d6e43eb6ae 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnmsac.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnmsac.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vv_i8mf8_tu(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vv_i8mf8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf8_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vnmsac_vv_i8mf8_tu(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vx_i8mf8_tu(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vx_i8mf8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf4_tu( @@ -31,7 +31,7 @@ vint8mf8_t test_vnmsac_vx_i8mf8_tu(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vv_i8mf4_tu(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vv_i8mf4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf4_tu( @@ -40,7 +40,7 @@ vint8mf4_t test_vnmsac_vv_i8mf4_tu(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vx_i8mf4_tu(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vx_i8mf4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf2_tu( @@ -49,7 +49,7 @@ vint8mf4_t test_vnmsac_vx_i8mf4_tu(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vv_i8mf2_tu(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vv_i8mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf2_tu( @@ -58,7 +58,7 @@ vint8mf2_t test_vnmsac_vv_i8mf2_tu(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vx_i8mf2_tu(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vx_i8mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m1_tu( @@ -67,7 +67,7 @@ vint8mf2_t test_vnmsac_vx_i8mf2_tu(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vv_i8m1_tu(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vv_i8m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m1_tu( @@ -76,7 +76,7 @@ vint8m1_t test_vnmsac_vv_i8m1_tu(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vx_i8m1_tu(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vx_i8m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m2_tu( @@ -85,7 +85,7 @@ vint8m1_t test_vnmsac_vx_i8m1_tu(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vv_i8m2_tu(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vv_i8m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m2_tu( @@ -94,7 +94,7 @@ vint8m2_t test_vnmsac_vv_i8m2_tu(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vx_i8m2_tu(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vx_i8m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m4_tu( @@ -103,7 +103,7 @@ vint8m2_t test_vnmsac_vx_i8m2_tu(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vv_i8m4_tu(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vv_i8m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m4_tu( @@ -112,7 +112,7 @@ vint8m4_t test_vnmsac_vv_i8m4_tu(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vx_i8m4_tu(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vx_i8m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m8_tu( @@ -121,7 +121,7 @@ vint8m4_t test_vnmsac_vx_i8m4_tu(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vv_i8m8_tu(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vv_i8m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m8_tu( @@ -130,7 +130,7 @@ vint8m8_t test_vnmsac_vv_i8m8_tu(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vx_i8m8_tu(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vx_i8m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf4_tu( @@ -139,7 +139,7 @@ vint8m8_t test_vnmsac_vx_i8m8_tu(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vv_i16mf4_tu(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vv_i16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf4_tu( @@ -148,7 +148,7 @@ vint16mf4_t test_vnmsac_vv_i16mf4_tu(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vx_i16mf4_tu(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vx_i16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf2_tu( @@ -157,7 +157,7 @@ vint16mf4_t test_vnmsac_vx_i16mf4_tu(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vv_i16mf2_tu(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vv_i16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf2_tu( @@ -166,7 +166,7 @@ vint16mf2_t test_vnmsac_vv_i16mf2_tu(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vx_i16mf2_tu(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vx_i16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m1_tu( @@ -175,7 +175,7 @@ vint16mf2_t test_vnmsac_vx_i16mf2_tu(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vv_i16m1_tu(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vv_i16m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m1_tu( @@ -184,7 +184,7 @@ vint16m1_t test_vnmsac_vv_i16m1_tu(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vx_i16m1_tu(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vx_i16m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m2_tu( @@ -193,7 +193,7 @@ vint16m1_t test_vnmsac_vx_i16m1_tu(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vv_i16m2_tu(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vv_i16m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m2_tu( @@ -202,7 +202,7 @@ vint16m2_t test_vnmsac_vv_i16m2_tu(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vx_i16m2_tu(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vx_i16m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m4_tu( @@ -211,7 +211,7 @@ vint16m2_t test_vnmsac_vx_i16m2_tu(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vv_i16m4_tu(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vv_i16m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m4_tu( @@ -220,7 +220,7 @@ vint16m4_t test_vnmsac_vv_i16m4_tu(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vx_i16m4_tu(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vx_i16m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m8_tu( @@ -229,7 +229,7 @@ vint16m4_t test_vnmsac_vx_i16m4_tu(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vv_i16m8_tu(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vv_i16m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m8_tu( @@ -238,7 +238,7 @@ vint16m8_t test_vnmsac_vv_i16m8_tu(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vx_i16m8_tu(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vx_i16m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32mf2_tu( @@ -247,7 +247,7 @@ vint16m8_t test_vnmsac_vx_i16m8_tu(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vv_i32mf2_tu(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vv_i32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32mf2_tu( @@ -256,7 +256,7 @@ vint32mf2_t test_vnmsac_vv_i32mf2_tu(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vx_i32mf2_tu(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vx_i32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vnmsac_vx_i32mf2_tu(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vv_i32m1_tu(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vv_i32m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m1_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vnmsac_vv_i32m1_tu(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vx_i32m1_tu(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vx_i32m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vnmsac_vx_i32m1_tu(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vv_i32m2_tu(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vv_i32m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m2_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vnmsac_vv_i32m2_tu(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vx_i32m2_tu(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vx_i32m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m4_tu( @@ -301,7 +301,7 @@ vint32m2_t test_vnmsac_vx_i32m2_tu(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vv_i32m4_tu(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vv_i32m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m4_tu( @@ -310,7 +310,7 @@ vint32m4_t test_vnmsac_vv_i32m4_tu(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vx_i32m4_tu(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vx_i32m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m8_tu( @@ -319,7 +319,7 @@ vint32m4_t test_vnmsac_vx_i32m4_tu(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vv_i32m8_tu(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vv_i32m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m8_tu( @@ -328,7 +328,7 @@ vint32m8_t test_vnmsac_vv_i32m8_tu(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vx_i32m8_tu(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vx_i32m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m1_tu( @@ -337,7 +337,7 @@ vint32m8_t test_vnmsac_vx_i32m8_tu(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vv_i64m1_tu(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vv_i64m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m1_tu( @@ -346,7 +346,7 @@ vint64m1_t test_vnmsac_vv_i64m1_tu(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vx_i64m1_tu(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vx_i64m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m2_tu( @@ -355,7 +355,7 @@ vint64m1_t test_vnmsac_vx_i64m1_tu(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vv_i64m2_tu(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vv_i64m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m2_tu( @@ -364,7 +364,7 @@ vint64m2_t test_vnmsac_vv_i64m2_tu(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vx_i64m2_tu(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vx_i64m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m4_tu( @@ -373,7 +373,7 @@ vint64m2_t test_vnmsac_vx_i64m2_tu(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vv_i64m4_tu(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vv_i64m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m4_tu( @@ -382,7 +382,7 @@ vint64m4_t test_vnmsac_vv_i64m4_tu(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vx_i64m4_tu(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vx_i64m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m8_tu( @@ -391,7 +391,7 @@ vint64m4_t test_vnmsac_vx_i64m4_tu(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vv_i64m8_tu(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vv_i64m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m8_tu( @@ -400,7 +400,7 @@ vint64m8_t test_vnmsac_vv_i64m8_tu(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vx_i64m8_tu(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vx_i64m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf8_tu( @@ -409,7 +409,7 @@ vint64m8_t test_vnmsac_vx_i64m8_tu(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vv_u8mf8_tu(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vv_u8mf8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf8_tu( @@ -418,7 +418,7 @@ vuint8mf8_t test_vnmsac_vv_u8mf8_tu(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vx_u8mf8_tu(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vx_u8mf8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf4_tu( @@ -427,7 +427,7 @@ vuint8mf8_t test_vnmsac_vx_u8mf8_tu(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vv_u8mf4_tu(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vv_u8mf4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf4_tu( @@ -436,7 +436,7 @@ vuint8mf4_t test_vnmsac_vv_u8mf4_tu(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vx_u8mf4_tu(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vx_u8mf4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf2_tu( @@ -445,7 +445,7 @@ vuint8mf4_t test_vnmsac_vx_u8mf4_tu(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vv_u8mf2_tu(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vv_u8mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf2_tu( @@ -454,7 +454,7 @@ vuint8mf2_t test_vnmsac_vv_u8mf2_tu(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vx_u8mf2_tu(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vx_u8mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m1_tu( @@ -463,7 +463,7 @@ vuint8mf2_t test_vnmsac_vx_u8mf2_tu(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vv_u8m1_tu(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vv_u8m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m1_tu( @@ -472,7 +472,7 @@ vuint8m1_t test_vnmsac_vv_u8m1_tu(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vx_u8m1_tu(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vx_u8m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m2_tu( @@ -481,7 +481,7 @@ vuint8m1_t test_vnmsac_vx_u8m1_tu(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vv_u8m2_tu(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vv_u8m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m2_tu( @@ -490,7 +490,7 @@ vuint8m2_t test_vnmsac_vv_u8m2_tu(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vx_u8m2_tu(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vx_u8m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m4_tu( @@ -499,7 +499,7 @@ vuint8m2_t test_vnmsac_vx_u8m2_tu(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vv_u8m4_tu(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vv_u8m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m4_tu( @@ -508,7 +508,7 @@ vuint8m4_t test_vnmsac_vv_u8m4_tu(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vx_u8m4_tu(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vx_u8m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m8_tu( @@ -517,7 +517,7 @@ vuint8m4_t test_vnmsac_vx_u8m4_tu(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vv_u8m8_tu(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vv_u8m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m8_tu( @@ -526,7 +526,7 @@ vuint8m8_t test_vnmsac_vv_u8m8_tu(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vx_u8m8_tu(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vx_u8m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf4_tu( @@ -535,7 +535,7 @@ vuint8m8_t test_vnmsac_vx_u8m8_tu(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vv_u16mf4_tu(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vv_u16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf4_tu( @@ -544,7 +544,7 @@ vuint16mf4_t test_vnmsac_vv_u16mf4_tu(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vx_u16mf4_tu(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vx_u16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf2_tu( @@ -553,7 +553,7 @@ vuint16mf4_t test_vnmsac_vx_u16mf4_tu(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vv_u16mf2_tu(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vv_u16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf2_tu( @@ -562,7 +562,7 @@ vuint16mf2_t test_vnmsac_vv_u16mf2_tu(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vx_u16mf2_tu(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vx_u16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m1_tu( @@ -571,7 +571,7 @@ vuint16mf2_t test_vnmsac_vx_u16mf2_tu(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vv_u16m1_tu(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vv_u16m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m1_tu( @@ -580,7 +580,7 @@ vuint16m1_t test_vnmsac_vv_u16m1_tu(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vx_u16m1_tu(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vx_u16m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m2_tu( @@ -589,7 +589,7 @@ vuint16m1_t test_vnmsac_vx_u16m1_tu(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vv_u16m2_tu(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vv_u16m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m2_tu( @@ -598,7 +598,7 @@ vuint16m2_t test_vnmsac_vv_u16m2_tu(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vx_u16m2_tu(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vx_u16m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m4_tu( @@ -607,7 +607,7 @@ vuint16m2_t test_vnmsac_vx_u16m2_tu(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vv_u16m4_tu(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vv_u16m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m4_tu( @@ -616,7 +616,7 @@ vuint16m4_t test_vnmsac_vv_u16m4_tu(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vx_u16m4_tu(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vx_u16m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m8_tu( @@ -625,7 +625,7 @@ vuint16m4_t test_vnmsac_vx_u16m4_tu(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vv_u16m8_tu(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vv_u16m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m8_tu( @@ -634,7 +634,7 @@ vuint16m8_t test_vnmsac_vv_u16m8_tu(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vx_u16m8_tu(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vx_u16m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32mf2_tu( @@ -643,7 +643,7 @@ vuint16m8_t test_vnmsac_vx_u16m8_tu(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vv_u32mf2_tu(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vv_u32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32mf2_tu( @@ -652,7 +652,7 @@ vuint32mf2_t test_vnmsac_vv_u32mf2_tu(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vx_u32mf2_tu(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vx_u32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m1_tu( @@ -661,7 +661,7 @@ vuint32mf2_t test_vnmsac_vx_u32mf2_tu(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vv_u32m1_tu(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vv_u32m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m1_tu( @@ -670,7 +670,7 @@ vuint32m1_t test_vnmsac_vv_u32m1_tu(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vx_u32m1_tu(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vx_u32m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m2_tu( @@ -679,7 +679,7 @@ vuint32m1_t test_vnmsac_vx_u32m1_tu(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vv_u32m2_tu(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vv_u32m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m2_tu( @@ -688,7 +688,7 @@ vuint32m2_t test_vnmsac_vv_u32m2_tu(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vx_u32m2_tu(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vx_u32m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m4_tu( @@ -697,7 +697,7 @@ vuint32m2_t test_vnmsac_vx_u32m2_tu(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vv_u32m4_tu(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vv_u32m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m4_tu( @@ -706,7 +706,7 @@ vuint32m4_t test_vnmsac_vv_u32m4_tu(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vx_u32m4_tu(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vx_u32m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m8_tu( @@ -715,7 +715,7 @@ vuint32m4_t test_vnmsac_vx_u32m4_tu(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vv_u32m8_tu(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vv_u32m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m8_tu( @@ -724,7 +724,7 @@ vuint32m8_t test_vnmsac_vv_u32m8_tu(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vx_u32m8_tu(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vx_u32m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m1_tu( @@ -733,7 +733,7 @@ vuint32m8_t test_vnmsac_vx_u32m8_tu(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vv_u64m1_tu(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vv_u64m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m1_tu( @@ -742,7 +742,7 @@ vuint64m1_t test_vnmsac_vv_u64m1_tu(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vx_u64m1_tu(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vx_u64m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m2_tu( @@ -751,7 +751,7 @@ vuint64m1_t test_vnmsac_vx_u64m1_tu(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vv_u64m2_tu(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vv_u64m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m2_tu( @@ -760,7 +760,7 @@ vuint64m2_t test_vnmsac_vv_u64m2_tu(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vx_u64m2_tu(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vx_u64m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m4_tu( @@ -769,7 +769,7 @@ vuint64m2_t test_vnmsac_vx_u64m2_tu(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vv_u64m4_tu(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vv_u64m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m4_tu( @@ -778,7 +778,7 @@ vuint64m4_t test_vnmsac_vv_u64m4_tu(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vx_u64m4_tu(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vx_u64m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m8_tu( @@ -787,7 +787,7 @@ vuint64m4_t test_vnmsac_vx_u64m4_tu(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vv_u64m8_tu(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vv_u64m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m8_tu( @@ -796,7 +796,7 @@ vuint64m8_t test_vnmsac_vv_u64m8_tu(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vx_u64m8_tu(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vx_u64m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf8_tum( @@ -805,7 +805,7 @@ vuint64m8_t test_vnmsac_vx_u64m8_tu(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vv_i8mf8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf8_tum( @@ -814,7 +814,7 @@ vint8mf8_t test_vnmsac_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vx_i8mf8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf4_tum( @@ -823,7 +823,7 @@ vint8mf8_t test_vnmsac_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vv_i8mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf4_tum( @@ -832,7 +832,7 @@ vint8mf4_t test_vnmsac_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vx_i8mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf2_tum( @@ -841,7 +841,7 @@ vint8mf4_t test_vnmsac_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vv_i8mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf2_tum( @@ -850,7 +850,7 @@ vint8mf2_t test_vnmsac_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vx_i8mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m1_tum( @@ -859,7 +859,7 @@ vint8mf2_t test_vnmsac_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vv_i8m1_tum(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vv_i8m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m1_tum( @@ -868,7 +868,7 @@ vint8m1_t test_vnmsac_vv_i8m1_tum(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vx_i8m1_tum(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vx_i8m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m2_tum( @@ -877,7 +877,7 @@ vint8m1_t test_vnmsac_vx_i8m1_tum(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vv_i8m2_tum(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vv_i8m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m2_tum( @@ -886,7 +886,7 @@ vint8m2_t test_vnmsac_vv_i8m2_tum(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vx_i8m2_tum(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vx_i8m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m4_tum( @@ -895,7 +895,7 @@ vint8m2_t test_vnmsac_vx_i8m2_tum(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vv_i8m4_tum(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vv_i8m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m4_tum( @@ -904,7 +904,7 @@ vint8m4_t test_vnmsac_vv_i8m4_tum(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vx_i8m4_tum(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vx_i8m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m8_tum( @@ -913,7 +913,7 @@ vint8m4_t test_vnmsac_vx_i8m4_tum(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vv_i8m8_tum(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vv_i8m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m8_tum( @@ -922,7 +922,7 @@ vint8m8_t test_vnmsac_vv_i8m8_tum(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vx_i8m8_tum(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vx_i8m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf4_tum( @@ -931,7 +931,7 @@ vint8m8_t test_vnmsac_vx_i8m8_tum(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf4_tum( @@ -940,7 +940,7 @@ vint16mf4_t test_vnmsac_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf2_tum( @@ -949,7 +949,7 @@ vint16mf4_t test_vnmsac_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf2_tum( @@ -958,7 +958,7 @@ vint16mf2_t test_vnmsac_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m1_tum( @@ -967,7 +967,7 @@ vint16mf2_t test_vnmsac_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vv_i16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m1_tum( @@ -976,7 +976,7 @@ vint16m1_t test_vnmsac_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vx_i16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m2_tum( @@ -985,7 +985,7 @@ vint16m1_t test_vnmsac_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vv_i16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m2_tum( @@ -994,7 +994,7 @@ vint16m2_t test_vnmsac_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vx_i16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m4_tum( @@ -1003,7 +1003,7 @@ vint16m2_t test_vnmsac_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vv_i16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m4_tum( @@ -1012,7 +1012,7 @@ vint16m4_t test_vnmsac_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vx_i16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m8_tum( @@ -1021,7 +1021,7 @@ vint16m4_t test_vnmsac_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vv_i16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m8_tum( @@ -1030,7 +1030,7 @@ vint16m8_t test_vnmsac_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vx_i16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32mf2_tum( @@ -1039,7 +1039,7 @@ vint16m8_t test_vnmsac_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32mf2_tum( @@ -1048,7 +1048,7 @@ vint32mf2_t test_vnmsac_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m1_tum( @@ -1057,7 +1057,7 @@ vint32mf2_t test_vnmsac_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vv_i32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m1_tum( @@ -1066,7 +1066,7 @@ vint32m1_t test_vnmsac_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vx_i32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m2_tum( @@ -1075,7 +1075,7 @@ vint32m1_t test_vnmsac_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vv_i32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m2_tum( @@ -1084,7 +1084,7 @@ vint32m2_t test_vnmsac_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vx_i32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m4_tum( @@ -1093,7 +1093,7 @@ vint32m2_t test_vnmsac_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vv_i32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m4_tum( @@ -1102,7 +1102,7 @@ vint32m4_t test_vnmsac_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vx_i32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m8_tum( @@ -1111,7 +1111,7 @@ vint32m4_t test_vnmsac_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vv_i32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m8_tum( @@ -1120,7 +1120,7 @@ vint32m8_t test_vnmsac_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vx_i32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m1_tum( @@ -1129,7 +1129,7 @@ vint32m8_t test_vnmsac_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vv_i64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m1_tum( @@ -1138,7 +1138,7 @@ vint64m1_t test_vnmsac_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vx_i64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m2_tum( @@ -1147,7 +1147,7 @@ vint64m1_t test_vnmsac_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vv_i64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m2_tum( @@ -1156,7 +1156,7 @@ vint64m2_t test_vnmsac_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vx_i64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m4_tum( @@ -1165,7 +1165,7 @@ vint64m2_t test_vnmsac_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vv_i64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m4_tum( @@ -1174,7 +1174,7 @@ vint64m4_t test_vnmsac_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vx_i64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m8_tum( @@ -1183,7 +1183,7 @@ vint64m4_t test_vnmsac_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vv_i64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m8_tum( @@ -1192,7 +1192,7 @@ vint64m8_t test_vnmsac_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vx_i64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf8_tum( @@ -1201,7 +1201,7 @@ vint64m8_t test_vnmsac_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vv_u8mf8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf8_tum( @@ -1210,7 +1210,7 @@ vuint8mf8_t test_vnmsac_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vx_u8mf8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf4_tum( @@ -1219,7 +1219,7 @@ vuint8mf8_t test_vnmsac_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vv_u8mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf4_tum( @@ -1228,7 +1228,7 @@ vuint8mf4_t test_vnmsac_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vx_u8mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf2_tum( @@ -1237,7 +1237,7 @@ vuint8mf4_t test_vnmsac_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vv_u8mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf2_tum( @@ -1246,7 +1246,7 @@ vuint8mf2_t test_vnmsac_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vx_u8mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m1_tum( @@ -1255,7 +1255,7 @@ vuint8mf2_t test_vnmsac_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vv_u8m1_tum(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vv_u8m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m1_tum( @@ -1264,7 +1264,7 @@ vuint8m1_t test_vnmsac_vv_u8m1_tum(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vx_u8m1_tum(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vx_u8m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m2_tum( @@ -1273,7 +1273,7 @@ vuint8m1_t test_vnmsac_vx_u8m1_tum(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vv_u8m2_tum(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vv_u8m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m2_tum( @@ -1282,7 +1282,7 @@ vuint8m2_t test_vnmsac_vv_u8m2_tum(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vx_u8m2_tum(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vx_u8m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m4_tum( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vnmsac_vx_u8m2_tum(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vv_u8m4_tum(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vv_u8m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m4_tum( @@ -1300,7 +1300,7 @@ vuint8m4_t test_vnmsac_vv_u8m4_tum(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vx_u8m4_tum(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vx_u8m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m8_tum( @@ -1309,7 +1309,7 @@ vuint8m4_t test_vnmsac_vx_u8m4_tum(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vv_u8m8_tum(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vv_u8m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m8_tum( @@ -1318,7 +1318,7 @@ vuint8m8_t test_vnmsac_vv_u8m8_tum(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vx_u8m8_tum(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vx_u8m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf4_tum( @@ -1327,7 +1327,7 @@ vuint8m8_t test_vnmsac_vx_u8m8_tum(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf4_tum( @@ -1336,7 +1336,7 @@ vuint16mf4_t test_vnmsac_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf2_tum( @@ -1345,7 +1345,7 @@ vuint16mf4_t test_vnmsac_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf2_tum( @@ -1354,7 +1354,7 @@ vuint16mf2_t test_vnmsac_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m1_tum( @@ -1363,7 +1363,7 @@ vuint16mf2_t test_vnmsac_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vv_u16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m1_tum( @@ -1372,7 +1372,7 @@ vuint16m1_t test_vnmsac_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vx_u16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m2_tum( @@ -1381,7 +1381,7 @@ vuint16m1_t test_vnmsac_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vv_u16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m2_tum( @@ -1390,7 +1390,7 @@ vuint16m2_t test_vnmsac_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vx_u16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m4_tum( @@ -1399,7 +1399,7 @@ vuint16m2_t test_vnmsac_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vv_u16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m4_tum( @@ -1408,7 +1408,7 @@ vuint16m4_t test_vnmsac_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vx_u16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m8_tum( @@ -1417,7 +1417,7 @@ vuint16m4_t test_vnmsac_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vv_u16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m8_tum( @@ -1426,7 +1426,7 @@ vuint16m8_t test_vnmsac_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vx_u16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32mf2_tum( @@ -1435,7 +1435,7 @@ vuint16m8_t test_vnmsac_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32mf2_tum( @@ -1444,7 +1444,7 @@ vuint32mf2_t test_vnmsac_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m1_tum( @@ -1453,7 +1453,7 @@ vuint32mf2_t test_vnmsac_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vv_u32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m1_tum( @@ -1462,7 +1462,7 @@ vuint32m1_t test_vnmsac_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vx_u32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m2_tum( @@ -1471,7 +1471,7 @@ vuint32m1_t test_vnmsac_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vv_u32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m2_tum( @@ -1480,7 +1480,7 @@ vuint32m2_t test_vnmsac_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vx_u32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m4_tum( @@ -1489,7 +1489,7 @@ vuint32m2_t test_vnmsac_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vv_u32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m4_tum( @@ -1498,7 +1498,7 @@ vuint32m4_t test_vnmsac_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vx_u32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m8_tum( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vnmsac_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vv_u32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m8_tum( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vnmsac_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vx_u32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m1_tum( @@ -1525,7 +1525,7 @@ vuint32m8_t test_vnmsac_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vv_u64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m1_tum( @@ -1534,7 +1534,7 @@ vuint64m1_t test_vnmsac_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vx_u64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m2_tum( @@ -1543,7 +1543,7 @@ vuint64m1_t test_vnmsac_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vv_u64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m2_tum( @@ -1552,7 +1552,7 @@ vuint64m2_t test_vnmsac_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vx_u64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m4_tum( @@ -1561,7 +1561,7 @@ vuint64m2_t test_vnmsac_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vv_u64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m4_tum( @@ -1570,7 +1570,7 @@ vuint64m4_t test_vnmsac_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vx_u64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m8_tum( @@ -1579,7 +1579,7 @@ vuint64m4_t test_vnmsac_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vv_u64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m8_tum( @@ -1588,7 +1588,7 @@ vuint64m8_t test_vnmsac_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vx_u64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf8_tumu( @@ -1597,7 +1597,7 @@ vuint64m8_t test_vnmsac_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vv_i8mf8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf8_tumu( @@ -1606,7 +1606,7 @@ vint8mf8_t test_vnmsac_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vx_i8mf8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf4_tumu( @@ -1615,7 +1615,7 @@ vint8mf8_t test_vnmsac_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vv_i8mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf4_tumu( @@ -1624,7 +1624,7 @@ vint8mf4_t test_vnmsac_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vx_i8mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf2_tumu( @@ -1633,7 +1633,7 @@ vint8mf4_t test_vnmsac_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vv_i8mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf2_tumu( @@ -1642,7 +1642,7 @@ vint8mf2_t test_vnmsac_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vx_i8mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m1_tumu( @@ -1651,7 +1651,7 @@ vint8mf2_t test_vnmsac_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vv_i8m1_tumu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vv_i8m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m1_tumu( @@ -1660,7 +1660,7 @@ vint8m1_t test_vnmsac_vv_i8m1_tumu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vx_i8m1_tumu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vx_i8m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m2_tumu( @@ -1669,7 +1669,7 @@ vint8m1_t test_vnmsac_vx_i8m1_tumu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vv_i8m2_tumu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vv_i8m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m2_tumu( @@ -1678,7 +1678,7 @@ vint8m2_t test_vnmsac_vv_i8m2_tumu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vx_i8m2_tumu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vx_i8m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m4_tumu( @@ -1687,7 +1687,7 @@ vint8m2_t test_vnmsac_vx_i8m2_tumu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vv_i8m4_tumu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vv_i8m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m4_tumu( @@ -1696,7 +1696,7 @@ vint8m4_t test_vnmsac_vv_i8m4_tumu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vx_i8m4_tumu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vx_i8m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m8_tumu( @@ -1705,7 +1705,7 @@ vint8m4_t test_vnmsac_vx_i8m4_tumu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vv_i8m8_tumu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vv_i8m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m8_tumu( @@ -1714,7 +1714,7 @@ vint8m8_t test_vnmsac_vv_i8m8_tumu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vx_i8m8_tumu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vx_i8m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf4_tumu( @@ -1723,7 +1723,7 @@ vint8m8_t test_vnmsac_vx_i8m8_tumu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf4_tumu( @@ -1732,7 +1732,7 @@ vint16mf4_t test_vnmsac_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf2_tumu( @@ -1741,7 +1741,7 @@ vint16mf4_t test_vnmsac_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf2_tumu( @@ -1750,7 +1750,7 @@ vint16mf2_t test_vnmsac_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m1_tumu( @@ -1759,7 +1759,7 @@ vint16mf2_t test_vnmsac_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m1_tumu( @@ -1768,7 +1768,7 @@ vint16m1_t test_vnmsac_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m2_tumu( @@ -1777,7 +1777,7 @@ vint16m1_t test_vnmsac_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m2_tumu( @@ -1786,7 +1786,7 @@ vint16m2_t test_vnmsac_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m4_tumu( @@ -1795,7 +1795,7 @@ vint16m2_t test_vnmsac_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m4_tumu( @@ -1804,7 +1804,7 @@ vint16m4_t test_vnmsac_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m8_tumu( @@ -1813,7 +1813,7 @@ vint16m4_t test_vnmsac_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m8_tumu( @@ -1822,7 +1822,7 @@ vint16m8_t test_vnmsac_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32mf2_tumu( @@ -1831,7 +1831,7 @@ vint16m8_t test_vnmsac_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32mf2_tumu( @@ -1840,7 +1840,7 @@ vint32mf2_t test_vnmsac_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m1_tumu( @@ -1849,7 +1849,7 @@ vint32mf2_t test_vnmsac_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m1_tumu( @@ -1858,7 +1858,7 @@ vint32m1_t test_vnmsac_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m2_tumu( @@ -1867,7 +1867,7 @@ vint32m1_t test_vnmsac_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m2_tumu( @@ -1876,7 +1876,7 @@ vint32m2_t test_vnmsac_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m4_tumu( @@ -1885,7 +1885,7 @@ vint32m2_t test_vnmsac_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m4_tumu( @@ -1894,7 +1894,7 @@ vint32m4_t test_vnmsac_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m8_tumu( @@ -1903,7 +1903,7 @@ vint32m4_t test_vnmsac_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m8_tumu( @@ -1912,7 +1912,7 @@ vint32m8_t test_vnmsac_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m1_tumu( @@ -1921,7 +1921,7 @@ vint32m8_t test_vnmsac_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m1_tumu( @@ -1930,7 +1930,7 @@ vint64m1_t test_vnmsac_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m2_tumu( @@ -1939,7 +1939,7 @@ vint64m1_t test_vnmsac_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m2_tumu( @@ -1948,7 +1948,7 @@ vint64m2_t test_vnmsac_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m4_tumu( @@ -1957,7 +1957,7 @@ vint64m2_t test_vnmsac_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m4_tumu( @@ -1966,7 +1966,7 @@ vint64m4_t test_vnmsac_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m8_tumu( @@ -1975,7 +1975,7 @@ vint64m4_t test_vnmsac_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m8_tumu( @@ -1984,7 +1984,7 @@ vint64m8_t test_vnmsac_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf8_tumu( @@ -1993,7 +1993,7 @@ vint64m8_t test_vnmsac_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vv_u8mf8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf8_tumu( @@ -2002,7 +2002,7 @@ vuint8mf8_t test_vnmsac_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vx_u8mf8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf4_tumu( @@ -2011,7 +2011,7 @@ vuint8mf8_t test_vnmsac_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vv_u8mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf4_tumu( @@ -2020,7 +2020,7 @@ vuint8mf4_t test_vnmsac_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vx_u8mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf2_tumu( @@ -2029,7 +2029,7 @@ vuint8mf4_t test_vnmsac_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vv_u8mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf2_tumu( @@ -2038,7 +2038,7 @@ vuint8mf2_t test_vnmsac_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vx_u8mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m1_tumu( @@ -2047,7 +2047,7 @@ vuint8mf2_t test_vnmsac_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vv_u8m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m1_tumu( @@ -2056,7 +2056,7 @@ vuint8m1_t test_vnmsac_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vx_u8m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m2_tumu( @@ -2065,7 +2065,7 @@ vuint8m1_t test_vnmsac_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vv_u8m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m2_tumu( @@ -2074,7 +2074,7 @@ vuint8m2_t test_vnmsac_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vx_u8m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m4_tumu( @@ -2083,7 +2083,7 @@ vuint8m2_t test_vnmsac_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vv_u8m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m4_tumu( @@ -2092,7 +2092,7 @@ vuint8m4_t test_vnmsac_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vx_u8m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m8_tumu( @@ -2101,7 +2101,7 @@ vuint8m4_t test_vnmsac_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vv_u8m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m8_tumu( @@ -2110,7 +2110,7 @@ vuint8m8_t test_vnmsac_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vx_u8m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf4_tumu( @@ -2119,7 +2119,7 @@ vuint8m8_t test_vnmsac_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf4_tumu( @@ -2128,7 +2128,7 @@ vuint16mf4_t test_vnmsac_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf2_tumu( @@ -2137,7 +2137,7 @@ vuint16mf4_t test_vnmsac_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf2_tumu( @@ -2146,7 +2146,7 @@ vuint16mf2_t test_vnmsac_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m1_tumu( @@ -2155,7 +2155,7 @@ vuint16mf2_t test_vnmsac_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m1_tumu( @@ -2164,7 +2164,7 @@ vuint16m1_t test_vnmsac_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m2_tumu( @@ -2173,7 +2173,7 @@ vuint16m1_t test_vnmsac_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m2_tumu( @@ -2182,7 +2182,7 @@ vuint16m2_t test_vnmsac_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m4_tumu( @@ -2191,7 +2191,7 @@ vuint16m2_t test_vnmsac_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m4_tumu( @@ -2200,7 +2200,7 @@ vuint16m4_t test_vnmsac_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m8_tumu( @@ -2209,7 +2209,7 @@ vuint16m4_t test_vnmsac_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m8_tumu( @@ -2218,7 +2218,7 @@ vuint16m8_t test_vnmsac_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32mf2_tumu( @@ -2227,7 +2227,7 @@ vuint16m8_t test_vnmsac_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32mf2_tumu( @@ -2236,7 +2236,7 @@ vuint32mf2_t test_vnmsac_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m1_tumu( @@ -2245,7 +2245,7 @@ vuint32mf2_t test_vnmsac_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m1_tumu( @@ -2254,7 +2254,7 @@ vuint32m1_t test_vnmsac_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m2_tumu( @@ -2263,7 +2263,7 @@ vuint32m1_t test_vnmsac_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m2_tumu( @@ -2272,7 +2272,7 @@ vuint32m2_t test_vnmsac_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m4_tumu( @@ -2281,7 +2281,7 @@ vuint32m2_t test_vnmsac_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m4_tumu( @@ -2290,7 +2290,7 @@ vuint32m4_t test_vnmsac_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m8_tumu( @@ -2299,7 +2299,7 @@ vuint32m4_t test_vnmsac_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m8_tumu( @@ -2308,7 +2308,7 @@ vuint32m8_t test_vnmsac_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m1_tumu( @@ -2317,7 +2317,7 @@ vuint32m8_t test_vnmsac_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m1_tumu( @@ -2326,7 +2326,7 @@ vuint64m1_t test_vnmsac_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m2_tumu( @@ -2335,7 +2335,7 @@ vuint64m1_t test_vnmsac_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint64_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m2_tumu( @@ -2344,7 +2344,7 @@ vuint64m2_t test_vnmsac_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m4_tumu( @@ -2353,7 +2353,7 @@ vuint64m2_t test_vnmsac_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint64_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m4_tumu( @@ -2362,7 +2362,7 @@ vuint64m4_t test_vnmsac_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m8_tumu( @@ -2371,7 +2371,7 @@ vuint64m4_t test_vnmsac_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint64_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m8_tumu( @@ -2380,7 +2380,7 @@ vuint64m8_t test_vnmsac_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf8_mu( @@ -2389,7 +2389,7 @@ vuint64m8_t test_vnmsac_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vv_i8mf8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf8_mu( @@ -2398,7 +2398,7 @@ vint8mf8_t test_vnmsac_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsac_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsac_vx_i8mf8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf4_mu( @@ -2407,7 +2407,7 @@ vint8mf8_t test_vnmsac_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vv_i8mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf4_mu( @@ -2416,7 +2416,7 @@ vint8mf4_t test_vnmsac_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsac_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsac_vx_i8mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8mf2_mu( @@ -2425,7 +2425,7 @@ vint8mf4_t test_vnmsac_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vv_i8mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8mf2_mu( @@ -2434,7 +2434,7 @@ vint8mf2_t test_vnmsac_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsac_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsac_vx_i8mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m1_mu( @@ -2443,7 +2443,7 @@ vint8mf2_t test_vnmsac_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vv_i8m1_mu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vv_i8m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m1_mu( @@ -2452,7 +2452,7 @@ vint8m1_t test_vnmsac_vv_i8m1_mu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsac_vx_i8m1_mu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsac_vx_i8m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m2_mu( @@ -2461,7 +2461,7 @@ vint8m1_t test_vnmsac_vx_i8m1_mu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vv_i8m2_mu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vv_i8m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m2_mu( @@ -2470,7 +2470,7 @@ vint8m2_t test_vnmsac_vv_i8m2_mu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsac_vx_i8m2_mu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsac_vx_i8m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m4_mu( @@ -2479,7 +2479,7 @@ vint8m2_t test_vnmsac_vx_i8m2_mu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vv_i8m4_mu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vv_i8m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m4_mu( @@ -2488,7 +2488,7 @@ vint8m4_t test_vnmsac_vv_i8m4_mu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsac_vx_i8m4_mu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsac_vx_i8m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i8m8_mu( @@ -2497,7 +2497,7 @@ vint8m4_t test_vnmsac_vx_i8m4_mu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vv_i8m8_mu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vv_i8m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i8m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i8m8_mu( @@ -2506,7 +2506,7 @@ vint8m8_t test_vnmsac_vv_i8m8_mu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsac_vx_i8m8_mu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsac_vx_i8m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i8m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf4_mu( @@ -2515,7 +2515,7 @@ vint8m8_t test_vnmsac_vx_i8m8_mu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf4_mu( @@ -2524,7 +2524,7 @@ vint16mf4_t test_vnmsac_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsac_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsac_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16mf2_mu( @@ -2533,7 +2533,7 @@ vint16mf4_t test_vnmsac_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16mf2_mu( @@ -2542,7 +2542,7 @@ vint16mf2_t test_vnmsac_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsac_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsac_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m1_mu( @@ -2551,7 +2551,7 @@ vint16mf2_t test_vnmsac_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vv_i16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m1_mu( @@ -2560,7 +2560,7 @@ vint16m1_t test_vnmsac_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsac_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsac_vx_i16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m2_mu( @@ -2569,7 +2569,7 @@ vint16m1_t test_vnmsac_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vv_i16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m2_mu( @@ -2578,7 +2578,7 @@ vint16m2_t test_vnmsac_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsac_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsac_vx_i16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m4_mu( @@ -2587,7 +2587,7 @@ vint16m2_t test_vnmsac_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vv_i16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m4_mu( @@ -2596,7 +2596,7 @@ vint16m4_t test_vnmsac_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsac_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsac_vx_i16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i16m8_mu( @@ -2605,7 +2605,7 @@ vint16m4_t test_vnmsac_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vv_i16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i16m8_mu( @@ -2614,7 +2614,7 @@ vint16m8_t test_vnmsac_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsac_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsac_vx_i16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32mf2_mu( @@ -2623,7 +2623,7 @@ vint16m8_t test_vnmsac_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32mf2_mu( @@ -2632,7 +2632,7 @@ vint32mf2_t test_vnmsac_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsac_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsac_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m1_mu( @@ -2641,7 +2641,7 @@ vint32mf2_t test_vnmsac_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vv_i32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m1_mu( @@ -2650,7 +2650,7 @@ vint32m1_t test_vnmsac_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsac_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsac_vx_i32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m2_mu( @@ -2659,7 +2659,7 @@ vint32m1_t test_vnmsac_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vv_i32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m2_mu( @@ -2668,7 +2668,7 @@ vint32m2_t test_vnmsac_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsac_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsac_vx_i32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m4_mu( @@ -2677,7 +2677,7 @@ vint32m2_t test_vnmsac_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vv_i32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m4_mu( @@ -2686,7 +2686,7 @@ vint32m4_t test_vnmsac_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsac_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsac_vx_i32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i32m8_mu( @@ -2695,7 +2695,7 @@ vint32m4_t test_vnmsac_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vv_i32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i32m8_mu( @@ -2704,7 +2704,7 @@ vint32m8_t test_vnmsac_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsac_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsac_vx_i32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m1_mu( @@ -2713,7 +2713,7 @@ vint32m8_t test_vnmsac_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vv_i64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m1_mu( @@ -2722,7 +2722,7 @@ vint64m1_t test_vnmsac_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsac_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsac_vx_i64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m2_mu( @@ -2731,7 +2731,7 @@ vint64m1_t test_vnmsac_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vv_i64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m2_mu( @@ -2740,7 +2740,7 @@ vint64m2_t test_vnmsac_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsac_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsac_vx_i64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m4_mu( @@ -2749,7 +2749,7 @@ vint64m2_t test_vnmsac_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vv_i64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m4_mu( @@ -2758,7 +2758,7 @@ vint64m4_t test_vnmsac_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsac_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsac_vx_i64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_i64m8_mu( @@ -2767,7 +2767,7 @@ vint64m4_t test_vnmsac_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vv_i64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_i64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_i64m8_mu( @@ -2776,7 +2776,7 @@ vint64m8_t test_vnmsac_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsac_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsac_vx_i64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_i64m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf8_mu( @@ -2785,7 +2785,7 @@ vint64m8_t test_vnmsac_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vv_u8mf8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf8_mu( @@ -2794,7 +2794,7 @@ vuint8mf8_t test_vnmsac_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsac_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsac_vx_u8mf8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf4_mu( @@ -2803,7 +2803,7 @@ vuint8mf8_t test_vnmsac_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vv_u8mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf4_mu( @@ -2812,7 +2812,7 @@ vuint8mf4_t test_vnmsac_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsac_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsac_vx_u8mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8mf2_mu( @@ -2821,7 +2821,7 @@ vuint8mf4_t test_vnmsac_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vv_u8mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8mf2_mu( @@ -2830,7 +2830,7 @@ vuint8mf2_t test_vnmsac_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsac_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsac_vx_u8mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m1_mu( @@ -2839,7 +2839,7 @@ vuint8mf2_t test_vnmsac_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vv_u8m1_mu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vv_u8m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m1_mu( @@ -2848,7 +2848,7 @@ vuint8m1_t test_vnmsac_vv_u8m1_mu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsac_vx_u8m1_mu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsac_vx_u8m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m2_mu( @@ -2857,7 +2857,7 @@ vuint8m1_t test_vnmsac_vx_u8m1_mu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vv_u8m2_mu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vv_u8m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m2_mu( @@ -2866,7 +2866,7 @@ vuint8m2_t test_vnmsac_vv_u8m2_mu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsac_vx_u8m2_mu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsac_vx_u8m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m4_mu( @@ -2875,7 +2875,7 @@ vuint8m2_t test_vnmsac_vx_u8m2_mu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vv_u8m4_mu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vv_u8m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m4_mu( @@ -2884,7 +2884,7 @@ vuint8m4_t test_vnmsac_vv_u8m4_mu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsac_vx_u8m4_mu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsac_vx_u8m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u8m8_mu( @@ -2893,7 +2893,7 @@ vuint8m4_t test_vnmsac_vx_u8m4_mu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vv_u8m8_mu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vv_u8m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u8m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u8m8_mu( @@ -2902,7 +2902,7 @@ vuint8m8_t test_vnmsac_vv_u8m8_mu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsac_vx_u8m8_mu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsac_vx_u8m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u8m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf4_mu( @@ -2911,7 +2911,7 @@ vuint8m8_t test_vnmsac_vx_u8m8_mu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf4_mu( @@ -2920,7 +2920,7 @@ vuint16mf4_t test_vnmsac_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsac_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsac_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16mf2_mu( @@ -2929,7 +2929,7 @@ vuint16mf4_t test_vnmsac_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16mf2_mu( @@ -2938,7 +2938,7 @@ vuint16mf2_t test_vnmsac_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsac_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsac_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m1_mu( @@ -2947,7 +2947,7 @@ vuint16mf2_t test_vnmsac_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vv_u16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m1_mu( @@ -2956,7 +2956,7 @@ vuint16m1_t test_vnmsac_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsac_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsac_vx_u16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m2_mu( @@ -2965,7 +2965,7 @@ vuint16m1_t test_vnmsac_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vv_u16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m2_mu( @@ -2974,7 +2974,7 @@ vuint16m2_t test_vnmsac_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsac_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsac_vx_u16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m4_mu( @@ -2983,7 +2983,7 @@ vuint16m2_t test_vnmsac_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vv_u16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m4_mu( @@ -2992,7 +2992,7 @@ vuint16m4_t test_vnmsac_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsac_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsac_vx_u16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u16m8_mu( @@ -3001,7 +3001,7 @@ vuint16m4_t test_vnmsac_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vv_u16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u16m8_mu( @@ -3010,7 +3010,7 @@ vuint16m8_t test_vnmsac_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsac_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsac_vx_u16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32mf2_mu( @@ -3019,7 +3019,7 @@ vuint16m8_t test_vnmsac_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32mf2_mu( @@ -3028,7 +3028,7 @@ vuint32mf2_t test_vnmsac_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsac_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsac_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m1_mu( @@ -3037,7 +3037,7 @@ vuint32mf2_t test_vnmsac_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vv_u32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m1_mu( @@ -3046,7 +3046,7 @@ vuint32m1_t test_vnmsac_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsac_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsac_vx_u32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m2_mu( @@ -3055,7 +3055,7 @@ vuint32m1_t test_vnmsac_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vv_u32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m2_mu( @@ -3064,7 +3064,7 @@ vuint32m2_t test_vnmsac_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsac_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsac_vx_u32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m4_mu( @@ -3073,7 +3073,7 @@ vuint32m2_t test_vnmsac_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vv_u32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m4_mu( @@ -3082,7 +3082,7 @@ vuint32m4_t test_vnmsac_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsac_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsac_vx_u32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u32m8_mu( @@ -3091,7 +3091,7 @@ vuint32m4_t test_vnmsac_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vv_u32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u32m8_mu( @@ -3100,7 +3100,7 @@ vuint32m8_t test_vnmsac_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsac_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsac_vx_u32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m1_mu( @@ -3109,7 +3109,7 @@ vuint32m8_t test_vnmsac_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vv_u64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m1_mu( @@ -3118,7 +3118,7 @@ vuint64m1_t test_vnmsac_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsac_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsac_vx_u64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m2_mu( @@ -3127,7 +3127,7 @@ vuint64m1_t test_vnmsac_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vv_u64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m2_mu( @@ -3136,7 +3136,7 @@ vuint64m2_t test_vnmsac_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsac_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsac_vx_u64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m4_mu( @@ -3145,7 +3145,7 @@ vuint64m2_t test_vnmsac_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vv_u64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m4_mu( @@ -3154,7 +3154,7 @@ vuint64m4_t test_vnmsac_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsac_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsac_vx_u64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vv_u64m8_mu( @@ -3163,7 +3163,7 @@ vuint64m4_t test_vnmsac_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vv_u64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsac_vv_u64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsac_vx_u64m8_mu( @@ -3172,6 +3172,6 @@ vuint64m8_t test_vnmsac_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsac_vx_u64m8_mu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsac_vx_u64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsac_vx_u64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnmsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnmsub.c index 9850be099f1e2b725c07544640005d30b0aefeb9..c5511a2ea2b32455d6a666ce70f9cf5b2897af10 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnmsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnmsub.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vv_i8mf8_tu(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vv_i8mf8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf8_tu( @@ -22,7 +22,7 @@ vint8mf8_t test_vnmsub_vv_i8mf8_tu(vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vx_i8mf8_tu(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vx_i8mf8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf4_tu( @@ -31,7 +31,7 @@ vint8mf8_t test_vnmsub_vx_i8mf8_tu(vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vv_i8mf4_tu(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vv_i8mf4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf4_tu( @@ -40,7 +40,7 @@ vint8mf4_t test_vnmsub_vv_i8mf4_tu(vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vx_i8mf4_tu(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vx_i8mf4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf2_tu( @@ -49,7 +49,7 @@ vint8mf4_t test_vnmsub_vx_i8mf4_tu(vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vv_i8mf2_tu(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vv_i8mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf2_tu( @@ -58,7 +58,7 @@ vint8mf2_t test_vnmsub_vv_i8mf2_tu(vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vx_i8mf2_tu(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vx_i8mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m1_tu( @@ -67,7 +67,7 @@ vint8mf2_t test_vnmsub_vx_i8mf2_tu(vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vv_i8m1_tu(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vv_i8m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m1_tu( @@ -76,7 +76,7 @@ vint8m1_t test_vnmsub_vv_i8m1_tu(vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vx_i8m1_tu(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vx_i8m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m2_tu( @@ -85,7 +85,7 @@ vint8m1_t test_vnmsub_vx_i8m1_tu(vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vv_i8m2_tu(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vv_i8m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m2_tu( @@ -94,7 +94,7 @@ vint8m2_t test_vnmsub_vv_i8m2_tu(vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vx_i8m2_tu(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vx_i8m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m4_tu( @@ -103,7 +103,7 @@ vint8m2_t test_vnmsub_vx_i8m2_tu(vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vv_i8m4_tu(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vv_i8m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m4_tu( @@ -112,7 +112,7 @@ vint8m4_t test_vnmsub_vv_i8m4_tu(vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vx_i8m4_tu(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vx_i8m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m8_tu( @@ -121,7 +121,7 @@ vint8m4_t test_vnmsub_vx_i8m4_tu(vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vv_i8m8_tu(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vv_i8m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m8_tu( @@ -130,7 +130,7 @@ vint8m8_t test_vnmsub_vv_i8m8_tu(vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vx_i8m8_tu(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vx_i8m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf4_tu( @@ -139,7 +139,7 @@ vint8m8_t test_vnmsub_vx_i8m8_tu(vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vv_i16mf4_tu(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vv_i16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf4_tu( @@ -148,7 +148,7 @@ vint16mf4_t test_vnmsub_vv_i16mf4_tu(vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vx_i16mf4_tu(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vx_i16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf2_tu( @@ -157,7 +157,7 @@ vint16mf4_t test_vnmsub_vx_i16mf4_tu(vint16mf4_t vd, int16_t rs1, vint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vv_i16mf2_tu(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vv_i16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf2_tu( @@ -166,7 +166,7 @@ vint16mf2_t test_vnmsub_vv_i16mf2_tu(vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vx_i16mf2_tu(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vx_i16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m1_tu( @@ -175,7 +175,7 @@ vint16mf2_t test_vnmsub_vx_i16mf2_tu(vint16mf2_t vd, int16_t rs1, vint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vv_i16m1_tu(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vv_i16m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m1_tu( @@ -184,7 +184,7 @@ vint16m1_t test_vnmsub_vv_i16m1_tu(vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vx_i16m1_tu(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vx_i16m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m2_tu( @@ -193,7 +193,7 @@ vint16m1_t test_vnmsub_vx_i16m1_tu(vint16m1_t vd, int16_t rs1, vint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vv_i16m2_tu(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vv_i16m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m2_tu( @@ -202,7 +202,7 @@ vint16m2_t test_vnmsub_vv_i16m2_tu(vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vx_i16m2_tu(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vx_i16m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m4_tu( @@ -211,7 +211,7 @@ vint16m2_t test_vnmsub_vx_i16m2_tu(vint16m2_t vd, int16_t rs1, vint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vv_i16m4_tu(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vv_i16m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m4_tu( @@ -220,7 +220,7 @@ vint16m4_t test_vnmsub_vv_i16m4_tu(vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vx_i16m4_tu(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vx_i16m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m8_tu( @@ -229,7 +229,7 @@ vint16m4_t test_vnmsub_vx_i16m4_tu(vint16m4_t vd, int16_t rs1, vint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vv_i16m8_tu(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vv_i16m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m8_tu( @@ -238,7 +238,7 @@ vint16m8_t test_vnmsub_vv_i16m8_tu(vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vx_i16m8_tu(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vx_i16m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32mf2_tu( @@ -247,7 +247,7 @@ vint16m8_t test_vnmsub_vx_i16m8_tu(vint16m8_t vd, int16_t rs1, vint16m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vv_i32mf2_tu(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vv_i32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32mf2_tu( @@ -256,7 +256,7 @@ vint32mf2_t test_vnmsub_vv_i32mf2_tu(vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vx_i32mf2_tu(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vx_i32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vnmsub_vx_i32mf2_tu(vint32mf2_t vd, int32_t rs1, vint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vv_i32m1_tu(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vv_i32m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m1_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vnmsub_vv_i32m1_tu(vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vx_i32m1_tu(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vx_i32m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vnmsub_vx_i32m1_tu(vint32m1_t vd, int32_t rs1, vint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vv_i32m2_tu(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vv_i32m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m2_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vnmsub_vv_i32m2_tu(vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vx_i32m2_tu(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vx_i32m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m4_tu( @@ -301,7 +301,7 @@ vint32m2_t test_vnmsub_vx_i32m2_tu(vint32m2_t vd, int32_t rs1, vint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vv_i32m4_tu(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vv_i32m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m4_tu( @@ -310,7 +310,7 @@ vint32m4_t test_vnmsub_vv_i32m4_tu(vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vx_i32m4_tu(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vx_i32m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m8_tu( @@ -319,7 +319,7 @@ vint32m4_t test_vnmsub_vx_i32m4_tu(vint32m4_t vd, int32_t rs1, vint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vv_i32m8_tu(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vv_i32m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m8_tu( @@ -328,7 +328,7 @@ vint32m8_t test_vnmsub_vv_i32m8_tu(vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vx_i32m8_tu(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vx_i32m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m1_tu( @@ -337,7 +337,7 @@ vint32m8_t test_vnmsub_vx_i32m8_tu(vint32m8_t vd, int32_t rs1, vint32m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vv_i64m1_tu(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vv_i64m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m1_tu( @@ -346,7 +346,7 @@ vint64m1_t test_vnmsub_vv_i64m1_tu(vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vx_i64m1_tu(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vx_i64m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m2_tu( @@ -355,7 +355,7 @@ vint64m1_t test_vnmsub_vx_i64m1_tu(vint64m1_t vd, int64_t rs1, vint64m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vv_i64m2_tu(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vv_i64m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m2_tu( @@ -364,7 +364,7 @@ vint64m2_t test_vnmsub_vv_i64m2_tu(vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vx_i64m2_tu(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vx_i64m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m4_tu( @@ -373,7 +373,7 @@ vint64m2_t test_vnmsub_vx_i64m2_tu(vint64m2_t vd, int64_t rs1, vint64m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vv_i64m4_tu(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vv_i64m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m4_tu( @@ -382,7 +382,7 @@ vint64m4_t test_vnmsub_vv_i64m4_tu(vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vx_i64m4_tu(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vx_i64m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m8_tu( @@ -391,7 +391,7 @@ vint64m4_t test_vnmsub_vx_i64m4_tu(vint64m4_t vd, int64_t rs1, vint64m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vv_i64m8_tu(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vv_i64m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m8_tu( @@ -400,7 +400,7 @@ vint64m8_t test_vnmsub_vv_i64m8_tu(vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vx_i64m8_tu(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vx_i64m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf8_tu( @@ -409,7 +409,7 @@ vint64m8_t test_vnmsub_vx_i64m8_tu(vint64m8_t vd, int64_t rs1, vint64m8_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vv_u8mf8_tu(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vv_u8mf8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf8_tu( @@ -418,7 +418,7 @@ vuint8mf8_t test_vnmsub_vv_u8mf8_tu(vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vx_u8mf8_tu(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vx_u8mf8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf4_tu( @@ -427,7 +427,7 @@ vuint8mf8_t test_vnmsub_vx_u8mf8_tu(vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vv_u8mf4_tu(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vv_u8mf4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf4_tu( @@ -436,7 +436,7 @@ vuint8mf4_t test_vnmsub_vv_u8mf4_tu(vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vx_u8mf4_tu(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vx_u8mf4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf2_tu( @@ -445,7 +445,7 @@ vuint8mf4_t test_vnmsub_vx_u8mf4_tu(vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vv_u8mf2_tu(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vv_u8mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf2_tu( @@ -454,7 +454,7 @@ vuint8mf2_t test_vnmsub_vv_u8mf2_tu(vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vx_u8mf2_tu(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vx_u8mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m1_tu( @@ -463,7 +463,7 @@ vuint8mf2_t test_vnmsub_vx_u8mf2_tu(vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vv_u8m1_tu(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vv_u8m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m1_tu( @@ -472,7 +472,7 @@ vuint8m1_t test_vnmsub_vv_u8m1_tu(vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vx_u8m1_tu(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vx_u8m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m2_tu( @@ -481,7 +481,7 @@ vuint8m1_t test_vnmsub_vx_u8m1_tu(vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vv_u8m2_tu(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vv_u8m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m2_tu( @@ -490,7 +490,7 @@ vuint8m2_t test_vnmsub_vv_u8m2_tu(vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vx_u8m2_tu(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vx_u8m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m4_tu( @@ -499,7 +499,7 @@ vuint8m2_t test_vnmsub_vx_u8m2_tu(vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vv_u8m4_tu(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vv_u8m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m4_tu( @@ -508,7 +508,7 @@ vuint8m4_t test_vnmsub_vv_u8m4_tu(vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vx_u8m4_tu(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vx_u8m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m8_tu( @@ -517,7 +517,7 @@ vuint8m4_t test_vnmsub_vx_u8m4_tu(vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vv_u8m8_tu(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vv_u8m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m8_tu( @@ -526,7 +526,7 @@ vuint8m8_t test_vnmsub_vv_u8m8_tu(vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vx_u8m8_tu(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vx_u8m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf4_tu( @@ -535,7 +535,7 @@ vuint8m8_t test_vnmsub_vx_u8m8_tu(vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vv_u16mf4_tu(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vv_u16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf4_tu( @@ -544,7 +544,7 @@ vuint16mf4_t test_vnmsub_vv_u16mf4_tu(vuint16mf4_t vd, vuint16mf4_t vs1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vx_u16mf4_tu(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vx_u16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf2_tu( @@ -553,7 +553,7 @@ vuint16mf4_t test_vnmsub_vx_u16mf4_tu(vuint16mf4_t vd, uint16_t rs1, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vv_u16mf2_tu(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vv_u16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf2_tu( @@ -562,7 +562,7 @@ vuint16mf2_t test_vnmsub_vv_u16mf2_tu(vuint16mf2_t vd, vuint16mf2_t vs1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vx_u16mf2_tu(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vx_u16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m1_tu( @@ -571,7 +571,7 @@ vuint16mf2_t test_vnmsub_vx_u16mf2_tu(vuint16mf2_t vd, uint16_t rs1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vv_u16m1_tu(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vv_u16m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m1_tu( @@ -580,7 +580,7 @@ vuint16m1_t test_vnmsub_vv_u16m1_tu(vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vx_u16m1_tu(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vx_u16m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m2_tu( @@ -589,7 +589,7 @@ vuint16m1_t test_vnmsub_vx_u16m1_tu(vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vv_u16m2_tu(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vv_u16m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m2_tu( @@ -598,7 +598,7 @@ vuint16m2_t test_vnmsub_vv_u16m2_tu(vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vx_u16m2_tu(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vx_u16m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m4_tu( @@ -607,7 +607,7 @@ vuint16m2_t test_vnmsub_vx_u16m2_tu(vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vv_u16m4_tu(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vv_u16m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m4_tu( @@ -616,7 +616,7 @@ vuint16m4_t test_vnmsub_vv_u16m4_tu(vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vx_u16m4_tu(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vx_u16m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m8_tu( @@ -625,7 +625,7 @@ vuint16m4_t test_vnmsub_vx_u16m4_tu(vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vv_u16m8_tu(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vv_u16m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m8_tu( @@ -634,7 +634,7 @@ vuint16m8_t test_vnmsub_vv_u16m8_tu(vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vx_u16m8_tu(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vx_u16m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32mf2_tu( @@ -643,7 +643,7 @@ vuint16m8_t test_vnmsub_vx_u16m8_tu(vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vv_u32mf2_tu(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vv_u32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32mf2_tu( @@ -652,7 +652,7 @@ vuint32mf2_t test_vnmsub_vv_u32mf2_tu(vuint32mf2_t vd, vuint32mf2_t vs1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vx_u32mf2_tu(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vx_u32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m1_tu( @@ -661,7 +661,7 @@ vuint32mf2_t test_vnmsub_vx_u32mf2_tu(vuint32mf2_t vd, uint32_t rs1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vv_u32m1_tu(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vv_u32m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m1_tu( @@ -670,7 +670,7 @@ vuint32m1_t test_vnmsub_vv_u32m1_tu(vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vx_u32m1_tu(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vx_u32m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m2_tu( @@ -679,7 +679,7 @@ vuint32m1_t test_vnmsub_vx_u32m1_tu(vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vv_u32m2_tu(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vv_u32m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m2_tu( @@ -688,7 +688,7 @@ vuint32m2_t test_vnmsub_vv_u32m2_tu(vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vx_u32m2_tu(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vx_u32m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m4_tu( @@ -697,7 +697,7 @@ vuint32m2_t test_vnmsub_vx_u32m2_tu(vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vv_u32m4_tu(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vv_u32m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m4_tu( @@ -706,7 +706,7 @@ vuint32m4_t test_vnmsub_vv_u32m4_tu(vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vx_u32m4_tu(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vx_u32m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m8_tu( @@ -715,7 +715,7 @@ vuint32m4_t test_vnmsub_vx_u32m4_tu(vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vv_u32m8_tu(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vv_u32m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m8_tu( @@ -724,7 +724,7 @@ vuint32m8_t test_vnmsub_vv_u32m8_tu(vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vx_u32m8_tu(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vx_u32m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m1_tu( @@ -733,7 +733,7 @@ vuint32m8_t test_vnmsub_vx_u32m8_tu(vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vv_u64m1_tu(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vv_u64m1_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m1_tu( @@ -742,7 +742,7 @@ vuint64m1_t test_vnmsub_vv_u64m1_tu(vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vx_u64m1_tu(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vx_u64m1_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m2_tu( @@ -751,7 +751,7 @@ vuint64m1_t test_vnmsub_vx_u64m1_tu(vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vv_u64m2_tu(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vv_u64m2_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m2_tu( @@ -760,7 +760,7 @@ vuint64m2_t test_vnmsub_vv_u64m2_tu(vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vx_u64m2_tu(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vx_u64m2_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m4_tu( @@ -769,7 +769,7 @@ vuint64m2_t test_vnmsub_vx_u64m2_tu(vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vv_u64m4_tu(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vv_u64m4_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m4_tu( @@ -778,7 +778,7 @@ vuint64m4_t test_vnmsub_vv_u64m4_tu(vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vx_u64m4_tu(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vx_u64m4_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m8_tu( @@ -787,7 +787,7 @@ vuint64m4_t test_vnmsub_vx_u64m4_tu(vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vv_u64m8_tu(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vv_u64m8_tu(vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m8_tu( @@ -796,7 +796,7 @@ vuint64m8_t test_vnmsub_vv_u64m8_tu(vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vx_u64m8_tu(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vx_u64m8_tu(vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf8_tum( @@ -805,7 +805,7 @@ vuint64m8_t test_vnmsub_vx_u64m8_tu(vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vv_i8mf8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf8_tum( @@ -814,7 +814,7 @@ vint8mf8_t test_vnmsub_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vx_i8mf8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf4_tum( @@ -823,7 +823,7 @@ vint8mf8_t test_vnmsub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vv_i8mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf4_tum( @@ -832,7 +832,7 @@ vint8mf4_t test_vnmsub_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vx_i8mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf2_tum( @@ -841,7 +841,7 @@ vint8mf4_t test_vnmsub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vv_i8mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf2_tum( @@ -850,7 +850,7 @@ vint8mf2_t test_vnmsub_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vx_i8mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m1_tum( @@ -859,7 +859,7 @@ vint8mf2_t test_vnmsub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vv_i8m1_tum(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vv_i8m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m1_tum( @@ -868,7 +868,7 @@ vint8m1_t test_vnmsub_vv_i8m1_tum(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vx_i8m1_tum(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vx_i8m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m2_tum( @@ -877,7 +877,7 @@ vint8m1_t test_vnmsub_vx_i8m1_tum(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vv_i8m2_tum(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vv_i8m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m2_tum( @@ -886,7 +886,7 @@ vint8m2_t test_vnmsub_vv_i8m2_tum(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vx_i8m2_tum(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vx_i8m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m4_tum( @@ -895,7 +895,7 @@ vint8m2_t test_vnmsub_vx_i8m2_tum(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vv_i8m4_tum(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vv_i8m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m4_tum( @@ -904,7 +904,7 @@ vint8m4_t test_vnmsub_vv_i8m4_tum(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vx_i8m4_tum(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vx_i8m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m8_tum( @@ -913,7 +913,7 @@ vint8m4_t test_vnmsub_vx_i8m4_tum(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vv_i8m8_tum(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vv_i8m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m8_tum( @@ -922,7 +922,7 @@ vint8m8_t test_vnmsub_vv_i8m8_tum(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vx_i8m8_tum(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vx_i8m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf4_tum( @@ -931,7 +931,7 @@ vint8m8_t test_vnmsub_vx_i8m8_tum(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf4_tum( @@ -940,7 +940,7 @@ vint16mf4_t test_vnmsub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf2_tum( @@ -949,7 +949,7 @@ vint16mf4_t test_vnmsub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf2_tum( @@ -958,7 +958,7 @@ vint16mf2_t test_vnmsub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m1_tum( @@ -967,7 +967,7 @@ vint16mf2_t test_vnmsub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vv_i16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m1_tum( @@ -976,7 +976,7 @@ vint16m1_t test_vnmsub_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vx_i16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m2_tum( @@ -985,7 +985,7 @@ vint16m1_t test_vnmsub_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vv_i16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m2_tum( @@ -994,7 +994,7 @@ vint16m2_t test_vnmsub_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vx_i16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m4_tum( @@ -1003,7 +1003,7 @@ vint16m2_t test_vnmsub_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vv_i16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m4_tum( @@ -1012,7 +1012,7 @@ vint16m4_t test_vnmsub_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vx_i16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m8_tum( @@ -1021,7 +1021,7 @@ vint16m4_t test_vnmsub_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vv_i16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m8_tum( @@ -1030,7 +1030,7 @@ vint16m8_t test_vnmsub_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vx_i16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32mf2_tum( @@ -1039,7 +1039,7 @@ vint16m8_t test_vnmsub_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32mf2_tum( @@ -1048,7 +1048,7 @@ vint32mf2_t test_vnmsub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m1_tum( @@ -1057,7 +1057,7 @@ vint32mf2_t test_vnmsub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vv_i32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m1_tum( @@ -1066,7 +1066,7 @@ vint32m1_t test_vnmsub_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vx_i32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m2_tum( @@ -1075,7 +1075,7 @@ vint32m1_t test_vnmsub_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vv_i32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m2_tum( @@ -1084,7 +1084,7 @@ vint32m2_t test_vnmsub_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vx_i32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m4_tum( @@ -1093,7 +1093,7 @@ vint32m2_t test_vnmsub_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vv_i32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m4_tum( @@ -1102,7 +1102,7 @@ vint32m4_t test_vnmsub_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vx_i32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m8_tum( @@ -1111,7 +1111,7 @@ vint32m4_t test_vnmsub_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vv_i32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m8_tum( @@ -1120,7 +1120,7 @@ vint32m8_t test_vnmsub_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vx_i32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m1_tum( @@ -1129,7 +1129,7 @@ vint32m8_t test_vnmsub_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vv_i64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m1_tum( @@ -1138,7 +1138,7 @@ vint64m1_t test_vnmsub_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint64m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vx_i64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m2_tum( @@ -1147,7 +1147,7 @@ vint64m1_t test_vnmsub_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vv_i64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m2_tum( @@ -1156,7 +1156,7 @@ vint64m2_t test_vnmsub_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint64m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vx_i64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m4_tum( @@ -1165,7 +1165,7 @@ vint64m2_t test_vnmsub_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vv_i64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m4_tum( @@ -1174,7 +1174,7 @@ vint64m4_t test_vnmsub_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint64m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vx_i64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m8_tum( @@ -1183,7 +1183,7 @@ vint64m4_t test_vnmsub_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vv_i64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m8_tum( @@ -1192,7 +1192,7 @@ vint64m8_t test_vnmsub_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vx_i64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf8_tum( @@ -1201,7 +1201,7 @@ vint64m8_t test_vnmsub_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vv_u8mf8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf8_tum( @@ -1210,7 +1210,7 @@ vuint8mf8_t test_vnmsub_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vx_u8mf8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf4_tum( @@ -1219,7 +1219,7 @@ vuint8mf8_t test_vnmsub_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vv_u8mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf4_tum( @@ -1228,7 +1228,7 @@ vuint8mf4_t test_vnmsub_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vx_u8mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf2_tum( @@ -1237,7 +1237,7 @@ vuint8mf4_t test_vnmsub_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vv_u8mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf2_tum( @@ -1246,7 +1246,7 @@ vuint8mf2_t test_vnmsub_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vx_u8mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m1_tum( @@ -1255,7 +1255,7 @@ vuint8mf2_t test_vnmsub_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vv_u8m1_tum(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vv_u8m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m1_tum( @@ -1264,7 +1264,7 @@ vuint8m1_t test_vnmsub_vv_u8m1_tum(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vx_u8m1_tum(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vx_u8m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m2_tum( @@ -1273,7 +1273,7 @@ vuint8m1_t test_vnmsub_vx_u8m1_tum(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vv_u8m2_tum(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vv_u8m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m2_tum( @@ -1282,7 +1282,7 @@ vuint8m2_t test_vnmsub_vv_u8m2_tum(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vx_u8m2_tum(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vx_u8m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m4_tum( @@ -1291,7 +1291,7 @@ vuint8m2_t test_vnmsub_vx_u8m2_tum(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vv_u8m4_tum(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vv_u8m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m4_tum( @@ -1300,7 +1300,7 @@ vuint8m4_t test_vnmsub_vv_u8m4_tum(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vx_u8m4_tum(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vx_u8m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m8_tum( @@ -1309,7 +1309,7 @@ vuint8m4_t test_vnmsub_vx_u8m4_tum(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vv_u8m8_tum(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vv_u8m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m8_tum( @@ -1318,7 +1318,7 @@ vuint8m8_t test_vnmsub_vv_u8m8_tum(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vx_u8m8_tum(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vx_u8m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf4_tum( @@ -1327,7 +1327,7 @@ vuint8m8_t test_vnmsub_vx_u8m8_tum(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf4_tum( @@ -1336,7 +1336,7 @@ vuint16mf4_t test_vnmsub_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf2_tum( @@ -1345,7 +1345,7 @@ vuint16mf4_t test_vnmsub_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf2_tum( @@ -1354,7 +1354,7 @@ vuint16mf2_t test_vnmsub_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m1_tum( @@ -1363,7 +1363,7 @@ vuint16mf2_t test_vnmsub_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vv_u16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m1_tum( @@ -1372,7 +1372,7 @@ vuint16m1_t test_vnmsub_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vx_u16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m2_tum( @@ -1381,7 +1381,7 @@ vuint16m1_t test_vnmsub_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vv_u16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m2_tum( @@ -1390,7 +1390,7 @@ vuint16m2_t test_vnmsub_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vx_u16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m4_tum( @@ -1399,7 +1399,7 @@ vuint16m2_t test_vnmsub_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vv_u16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m4_tum( @@ -1408,7 +1408,7 @@ vuint16m4_t test_vnmsub_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vx_u16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m8_tum( @@ -1417,7 +1417,7 @@ vuint16m4_t test_vnmsub_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vv_u16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m8_tum( @@ -1426,7 +1426,7 @@ vuint16m8_t test_vnmsub_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vx_u16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32mf2_tum( @@ -1435,7 +1435,7 @@ vuint16m8_t test_vnmsub_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32mf2_tum( @@ -1444,7 +1444,7 @@ vuint32mf2_t test_vnmsub_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m1_tum( @@ -1453,7 +1453,7 @@ vuint32mf2_t test_vnmsub_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vv_u32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m1_tum( @@ -1462,7 +1462,7 @@ vuint32m1_t test_vnmsub_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vx_u32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m2_tum( @@ -1471,7 +1471,7 @@ vuint32m1_t test_vnmsub_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vv_u32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m2_tum( @@ -1480,7 +1480,7 @@ vuint32m2_t test_vnmsub_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vx_u32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m4_tum( @@ -1489,7 +1489,7 @@ vuint32m2_t test_vnmsub_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vv_u32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m4_tum( @@ -1498,7 +1498,7 @@ vuint32m4_t test_vnmsub_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vx_u32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m8_tum( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vnmsub_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vv_u32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m8_tum( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vnmsub_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vx_u32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m1_tum( @@ -1525,7 +1525,7 @@ vuint32m8_t test_vnmsub_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vv_u64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m1_tum( @@ -1534,7 +1534,7 @@ vuint64m1_t test_vnmsub_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vx_u64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m2_tum( @@ -1543,7 +1543,7 @@ vuint64m1_t test_vnmsub_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vv_u64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m2_tum( @@ -1552,7 +1552,7 @@ vuint64m2_t test_vnmsub_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vx_u64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m4_tum( @@ -1561,7 +1561,7 @@ vuint64m2_t test_vnmsub_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vv_u64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m4_tum( @@ -1570,7 +1570,7 @@ vuint64m4_t test_vnmsub_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vx_u64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m8_tum( @@ -1579,7 +1579,7 @@ vuint64m4_t test_vnmsub_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vv_u64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m8_tum( @@ -1588,7 +1588,7 @@ vuint64m8_t test_vnmsub_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vx_u64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf8_tumu( @@ -1597,7 +1597,7 @@ vuint64m8_t test_vnmsub_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vv_i8mf8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf8_tumu( @@ -1606,7 +1606,7 @@ vint8mf8_t test_vnmsub_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vx_i8mf8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf4_tumu( @@ -1615,7 +1615,7 @@ vint8mf8_t test_vnmsub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vv_i8mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf4_tumu( @@ -1624,7 +1624,7 @@ vint8mf4_t test_vnmsub_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vx_i8mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf2_tumu( @@ -1633,7 +1633,7 @@ vint8mf4_t test_vnmsub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vv_i8mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf2_tumu( @@ -1642,7 +1642,7 @@ vint8mf2_t test_vnmsub_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vx_i8mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m1_tumu( @@ -1651,7 +1651,7 @@ vint8mf2_t test_vnmsub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vv_i8m1_tumu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vv_i8m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m1_tumu( @@ -1660,7 +1660,7 @@ vint8m1_t test_vnmsub_vv_i8m1_tumu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vx_i8m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m2_tumu( @@ -1669,7 +1669,7 @@ vint8m1_t test_vnmsub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vv_i8m2_tumu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vv_i8m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m2_tumu( @@ -1678,7 +1678,7 @@ vint8m2_t test_vnmsub_vv_i8m2_tumu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vx_i8m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m4_tumu( @@ -1687,7 +1687,7 @@ vint8m2_t test_vnmsub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vv_i8m4_tumu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vv_i8m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m4_tumu( @@ -1696,7 +1696,7 @@ vint8m4_t test_vnmsub_vv_i8m4_tumu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vx_i8m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m8_tumu( @@ -1705,7 +1705,7 @@ vint8m4_t test_vnmsub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vv_i8m8_tumu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vv_i8m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m8_tumu( @@ -1714,7 +1714,7 @@ vint8m8_t test_vnmsub_vv_i8m8_tumu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vx_i8m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf4_tumu( @@ -1723,7 +1723,7 @@ vint8m8_t test_vnmsub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf4_tumu( @@ -1732,7 +1732,7 @@ vint16mf4_t test_vnmsub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf2_tumu( @@ -1741,7 +1741,7 @@ vint16mf4_t test_vnmsub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf2_tumu( @@ -1750,7 +1750,7 @@ vint16mf2_t test_vnmsub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m1_tumu( @@ -1759,7 +1759,7 @@ vint16mf2_t test_vnmsub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m1_tumu( @@ -1768,7 +1768,7 @@ vint16m1_t test_vnmsub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m2_tumu( @@ -1777,7 +1777,7 @@ vint16m1_t test_vnmsub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m2_tumu( @@ -1786,7 +1786,7 @@ vint16m2_t test_vnmsub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m4_tumu( @@ -1795,7 +1795,7 @@ vint16m2_t test_vnmsub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m4_tumu( @@ -1804,7 +1804,7 @@ vint16m4_t test_vnmsub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m8_tumu( @@ -1813,7 +1813,7 @@ vint16m4_t test_vnmsub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m8_tumu( @@ -1822,7 +1822,7 @@ vint16m8_t test_vnmsub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32mf2_tumu( @@ -1831,7 +1831,7 @@ vint16m8_t test_vnmsub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32mf2_tumu( @@ -1840,7 +1840,7 @@ vint32mf2_t test_vnmsub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m1_tumu( @@ -1849,7 +1849,7 @@ vint32mf2_t test_vnmsub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m1_tumu( @@ -1858,7 +1858,7 @@ vint32m1_t test_vnmsub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m2_tumu( @@ -1867,7 +1867,7 @@ vint32m1_t test_vnmsub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m2_tumu( @@ -1876,7 +1876,7 @@ vint32m2_t test_vnmsub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m4_tumu( @@ -1885,7 +1885,7 @@ vint32m2_t test_vnmsub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m4_tumu( @@ -1894,7 +1894,7 @@ vint32m4_t test_vnmsub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m8_tumu( @@ -1903,7 +1903,7 @@ vint32m4_t test_vnmsub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m8_tumu( @@ -1912,7 +1912,7 @@ vint32m8_t test_vnmsub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m1_tumu( @@ -1921,7 +1921,7 @@ vint32m8_t test_vnmsub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m1_tumu( @@ -1930,7 +1930,7 @@ vint64m1_t test_vnmsub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m2_tumu( @@ -1939,7 +1939,7 @@ vint64m1_t test_vnmsub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m2_tumu( @@ -1948,7 +1948,7 @@ vint64m2_t test_vnmsub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m4_tumu( @@ -1957,7 +1957,7 @@ vint64m2_t test_vnmsub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m4_tumu( @@ -1966,7 +1966,7 @@ vint64m4_t test_vnmsub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m8_tumu( @@ -1975,7 +1975,7 @@ vint64m4_t test_vnmsub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m8_tumu( @@ -1984,7 +1984,7 @@ vint64m8_t test_vnmsub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf8_tumu( @@ -1993,7 +1993,7 @@ vint64m8_t test_vnmsub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int64_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vv_u8mf8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf8_tumu( @@ -2002,7 +2002,7 @@ vuint8mf8_t test_vnmsub_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vx_u8mf8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf4_tumu( @@ -2011,7 +2011,7 @@ vuint8mf8_t test_vnmsub_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vv_u8mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf4_tumu( @@ -2020,7 +2020,7 @@ vuint8mf4_t test_vnmsub_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vx_u8mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf2_tumu( @@ -2029,7 +2029,7 @@ vuint8mf4_t test_vnmsub_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vv_u8mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf2_tumu( @@ -2038,7 +2038,7 @@ vuint8mf2_t test_vnmsub_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vx_u8mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m1_tumu( @@ -2047,7 +2047,7 @@ vuint8mf2_t test_vnmsub_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vv_u8m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m1_tumu( @@ -2056,7 +2056,7 @@ vuint8m1_t test_vnmsub_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vx_u8m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m2_tumu( @@ -2065,7 +2065,7 @@ vuint8m1_t test_vnmsub_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vv_u8m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m2_tumu( @@ -2074,7 +2074,7 @@ vuint8m2_t test_vnmsub_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vx_u8m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m4_tumu( @@ -2083,7 +2083,7 @@ vuint8m2_t test_vnmsub_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vv_u8m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m4_tumu( @@ -2092,7 +2092,7 @@ vuint8m4_t test_vnmsub_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vx_u8m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m8_tumu( @@ -2101,7 +2101,7 @@ vuint8m4_t test_vnmsub_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vv_u8m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m8_tumu( @@ -2110,7 +2110,7 @@ vuint8m8_t test_vnmsub_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vx_u8m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf4_tumu( @@ -2119,7 +2119,7 @@ vuint8m8_t test_vnmsub_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf4_tumu( @@ -2128,7 +2128,7 @@ vuint16mf4_t test_vnmsub_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf2_tumu( @@ -2137,7 +2137,7 @@ vuint16mf4_t test_vnmsub_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf2_tumu( @@ -2146,7 +2146,7 @@ vuint16mf2_t test_vnmsub_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m1_tumu( @@ -2155,7 +2155,7 @@ vuint16mf2_t test_vnmsub_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m1_tumu( @@ -2164,7 +2164,7 @@ vuint16m1_t test_vnmsub_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m2_tumu( @@ -2173,7 +2173,7 @@ vuint16m1_t test_vnmsub_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m2_tumu( @@ -2182,7 +2182,7 @@ vuint16m2_t test_vnmsub_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m4_tumu( @@ -2191,7 +2191,7 @@ vuint16m2_t test_vnmsub_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m4_tumu( @@ -2200,7 +2200,7 @@ vuint16m4_t test_vnmsub_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m8_tumu( @@ -2209,7 +2209,7 @@ vuint16m4_t test_vnmsub_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m8_tumu( @@ -2218,7 +2218,7 @@ vuint16m8_t test_vnmsub_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32mf2_tumu( @@ -2227,7 +2227,7 @@ vuint16m8_t test_vnmsub_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32mf2_tumu( @@ -2236,7 +2236,7 @@ vuint32mf2_t test_vnmsub_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m1_tumu( @@ -2245,7 +2245,7 @@ vuint32mf2_t test_vnmsub_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m1_tumu( @@ -2254,7 +2254,7 @@ vuint32m1_t test_vnmsub_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m2_tumu( @@ -2263,7 +2263,7 @@ vuint32m1_t test_vnmsub_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m2_tumu( @@ -2272,7 +2272,7 @@ vuint32m2_t test_vnmsub_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m4_tumu( @@ -2281,7 +2281,7 @@ vuint32m2_t test_vnmsub_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m4_tumu( @@ -2290,7 +2290,7 @@ vuint32m4_t test_vnmsub_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m8_tumu( @@ -2299,7 +2299,7 @@ vuint32m4_t test_vnmsub_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m8_tumu( @@ -2308,7 +2308,7 @@ vuint32m8_t test_vnmsub_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m1_tumu( @@ -2317,7 +2317,7 @@ vuint32m8_t test_vnmsub_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m1_tumu( @@ -2326,7 +2326,7 @@ vuint64m1_t test_vnmsub_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m2_tumu( @@ -2335,7 +2335,7 @@ vuint64m1_t test_vnmsub_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint64_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m2_tumu( @@ -2344,7 +2344,7 @@ vuint64m2_t test_vnmsub_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m4_tumu( @@ -2353,7 +2353,7 @@ vuint64m2_t test_vnmsub_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint64_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m4_tumu( @@ -2362,7 +2362,7 @@ vuint64m4_t test_vnmsub_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m8_tumu( @@ -2371,7 +2371,7 @@ vuint64m4_t test_vnmsub_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint64_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m8_tumu( @@ -2380,7 +2380,7 @@ vuint64m8_t test_vnmsub_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf8_mu( @@ -2389,7 +2389,7 @@ vuint64m8_t test_vnmsub_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint64_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vv_i8mf8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf8_mu( @@ -2398,7 +2398,7 @@ vint8mf8_t test_vnmsub_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, vint8mf8_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnmsub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vnmsub_vx_i8mf8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf4_mu( @@ -2407,7 +2407,7 @@ vint8mf8_t test_vnmsub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vv_i8mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf4_mu( @@ -2416,7 +2416,7 @@ vint8mf4_t test_vnmsub_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, vint8mf4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnmsub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vnmsub_vx_i8mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8mf2_mu( @@ -2425,7 +2425,7 @@ vint8mf4_t test_vnmsub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vv_i8mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8mf2_mu( @@ -2434,7 +2434,7 @@ vint8mf2_t test_vnmsub_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, vint8mf2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnmsub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vnmsub_vx_i8mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m1_mu( @@ -2443,7 +2443,7 @@ vint8mf2_t test_vnmsub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vv_i8m1_mu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vv_i8m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m1_mu( @@ -2452,7 +2452,7 @@ vint8m1_t test_vnmsub_vv_i8m1_mu(vbool8_t mask, vint8m1_t vd, vint8m1_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnmsub_vx_i8m1_mu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vnmsub_vx_i8m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m2_mu( @@ -2461,7 +2461,7 @@ vint8m1_t test_vnmsub_vx_i8m1_mu(vbool8_t mask, vint8m1_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vv_i8m2_mu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vv_i8m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m2_mu( @@ -2470,7 +2470,7 @@ vint8m2_t test_vnmsub_vv_i8m2_mu(vbool4_t mask, vint8m2_t vd, vint8m2_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnmsub_vx_i8m2_mu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vnmsub_vx_i8m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m4_mu( @@ -2479,7 +2479,7 @@ vint8m2_t test_vnmsub_vx_i8m2_mu(vbool4_t mask, vint8m2_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vv_i8m4_mu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vv_i8m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m4_mu( @@ -2488,7 +2488,7 @@ vint8m4_t test_vnmsub_vv_i8m4_mu(vbool2_t mask, vint8m4_t vd, vint8m4_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnmsub_vx_i8m4_mu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vnmsub_vx_i8m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i8m8_mu( @@ -2497,7 +2497,7 @@ vint8m4_t test_vnmsub_vx_i8m4_mu(vbool2_t mask, vint8m4_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vv_i8m8_mu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vv_i8m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i8m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i8m8_mu( @@ -2506,7 +2506,7 @@ vint8m8_t test_vnmsub_vv_i8m8_mu(vbool1_t mask, vint8m8_t vd, vint8m8_t vs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnmsub_vx_i8m8_mu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m8_t vs2, size_t vl) { - return vnmsub_vx_i8m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i8m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf4_mu( @@ -2515,7 +2515,7 @@ vint8m8_t test_vnmsub_vx_i8m8_mu(vbool1_t mask, vint8m8_t vd, int8_t rs1, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf4_mu( @@ -2524,7 +2524,7 @@ vint16mf4_t test_vnmsub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnmsub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vnmsub_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16mf2_mu( @@ -2533,7 +2533,7 @@ vint16mf4_t test_vnmsub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16mf2_mu( @@ -2542,7 +2542,7 @@ vint16mf2_t test_vnmsub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnmsub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vnmsub_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m1_mu( @@ -2551,7 +2551,7 @@ vint16mf2_t test_vnmsub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vv_i16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m1_mu( @@ -2560,7 +2560,7 @@ vint16m1_t test_vnmsub_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint16m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnmsub_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vnmsub_vx_i16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m2_mu( @@ -2569,7 +2569,7 @@ vint16m1_t test_vnmsub_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vv_i16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m2_mu( @@ -2578,7 +2578,7 @@ vint16m2_t test_vnmsub_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnmsub_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vnmsub_vx_i16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m4_mu( @@ -2587,7 +2587,7 @@ vint16m2_t test_vnmsub_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vv_i16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m4_mu( @@ -2596,7 +2596,7 @@ vint16m4_t test_vnmsub_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnmsub_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vnmsub_vx_i16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i16m8_mu( @@ -2605,7 +2605,7 @@ vint16m4_t test_vnmsub_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vv_i16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i16m8_mu( @@ -2614,7 +2614,7 @@ vint16m8_t test_vnmsub_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint16m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnmsub_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vint16m8_t vs2, size_t vl) { - return vnmsub_vx_i16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32mf2_mu( @@ -2623,7 +2623,7 @@ vint16m8_t test_vnmsub_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32mf2_mu( @@ -2632,7 +2632,7 @@ vint32mf2_t test_vnmsub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnmsub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vnmsub_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m1_mu( @@ -2641,7 +2641,7 @@ vint32mf2_t test_vnmsub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vv_i32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m1_mu( @@ -2650,7 +2650,7 @@ vint32m1_t test_vnmsub_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint32m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnmsub_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vnmsub_vx_i32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m2_mu( @@ -2659,7 +2659,7 @@ vint32m1_t test_vnmsub_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vv_i32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m2_mu( @@ -2668,7 +2668,7 @@ vint32m2_t test_vnmsub_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint32m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnmsub_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vnmsub_vx_i32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m4_mu( @@ -2677,7 +2677,7 @@ vint32m2_t test_vnmsub_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vv_i32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m4_mu( @@ -2686,7 +2686,7 @@ vint32m4_t test_vnmsub_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnmsub_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vnmsub_vx_i32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i32m8_mu( @@ -2695,7 +2695,7 @@ vint32m4_t test_vnmsub_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vv_i32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i32m8_mu( @@ -2704,7 +2704,7 @@ vint32m8_t test_vnmsub_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint32m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnmsub_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vint32m8_t vs2, size_t vl) { - return vnmsub_vx_i32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m1_mu( @@ -2713,7 +2713,7 @@ vint32m8_t test_vnmsub_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int32_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vv_i64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m1_mu( @@ -2722,7 +2722,7 @@ vint64m1_t test_vnmsub_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint64m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnmsub_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int64_t rs1, vint64m1_t vs2, size_t vl) { - return vnmsub_vx_i64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m2_mu( @@ -2731,7 +2731,7 @@ vint64m1_t test_vnmsub_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vv_i64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m2_mu( @@ -2740,7 +2740,7 @@ vint64m2_t test_vnmsub_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint64m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnmsub_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int64_t rs1, vint64m2_t vs2, size_t vl) { - return vnmsub_vx_i64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m4_mu( @@ -2749,7 +2749,7 @@ vint64m2_t test_vnmsub_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vv_i64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m4_mu( @@ -2758,7 +2758,7 @@ vint64m4_t test_vnmsub_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint64m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnmsub_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int64_t rs1, vint64m4_t vs2, size_t vl) { - return vnmsub_vx_i64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_i64m8_mu( @@ -2767,7 +2767,7 @@ vint64m4_t test_vnmsub_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int64_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vv_i64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_i64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_i64m8_mu( @@ -2776,7 +2776,7 @@ vint64m8_t test_vnmsub_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint64m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnmsub_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vint64m8_t vs2, size_t vl) { - return vnmsub_vx_i64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_i64m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf8_mu( @@ -2785,7 +2785,7 @@ vint64m8_t test_vnmsub_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int64_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vv_u8mf8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf8_mu( @@ -2794,7 +2794,7 @@ vuint8mf8_t test_vnmsub_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnmsub_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vnmsub_vx_u8mf8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf4_mu( @@ -2803,7 +2803,7 @@ vuint8mf8_t test_vnmsub_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vv_u8mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf4_mu( @@ -2812,7 +2812,7 @@ vuint8mf4_t test_vnmsub_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnmsub_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vnmsub_vx_u8mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8mf2_mu( @@ -2821,7 +2821,7 @@ vuint8mf4_t test_vnmsub_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vv_u8mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8mf2_mu( @@ -2830,7 +2830,7 @@ vuint8mf2_t test_vnmsub_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnmsub_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vnmsub_vx_u8mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m1_mu( @@ -2839,7 +2839,7 @@ vuint8mf2_t test_vnmsub_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vv_u8m1_mu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vv_u8m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m1_mu( @@ -2848,7 +2848,7 @@ vuint8m1_t test_vnmsub_vv_u8m1_mu(vbool8_t mask, vuint8m1_t vd, vuint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnmsub_vx_u8m1_mu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vnmsub_vx_u8m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m2_mu( @@ -2857,7 +2857,7 @@ vuint8m1_t test_vnmsub_vx_u8m1_mu(vbool8_t mask, vuint8m1_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vv_u8m2_mu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vv_u8m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m2_mu( @@ -2866,7 +2866,7 @@ vuint8m2_t test_vnmsub_vv_u8m2_mu(vbool4_t mask, vuint8m2_t vd, vuint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnmsub_vx_u8m2_mu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vnmsub_vx_u8m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m4_mu( @@ -2875,7 +2875,7 @@ vuint8m2_t test_vnmsub_vx_u8m2_mu(vbool4_t mask, vuint8m2_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vv_u8m4_mu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vv_u8m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m4_mu( @@ -2884,7 +2884,7 @@ vuint8m4_t test_vnmsub_vv_u8m4_mu(vbool2_t mask, vuint8m4_t vd, vuint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnmsub_vx_u8m4_mu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vnmsub_vx_u8m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u8m8_mu( @@ -2893,7 +2893,7 @@ vuint8m4_t test_vnmsub_vx_u8m4_mu(vbool2_t mask, vuint8m4_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vv_u8m8_mu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vv_u8m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u8m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u8m8_mu( @@ -2902,7 +2902,7 @@ vuint8m8_t test_vnmsub_vv_u8m8_mu(vbool1_t mask, vuint8m8_t vd, vuint8m8_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnmsub_vx_u8m8_mu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vuint8m8_t vs2, size_t vl) { - return vnmsub_vx_u8m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u8m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf4_mu( @@ -2911,7 +2911,7 @@ vuint8m8_t test_vnmsub_vx_u8m8_mu(vbool1_t mask, vuint8m8_t vd, uint8_t rs1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf4_mu( @@ -2920,7 +2920,7 @@ vuint16mf4_t test_vnmsub_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnmsub_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vnmsub_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16mf2_mu( @@ -2929,7 +2929,7 @@ vuint16mf4_t test_vnmsub_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16mf2_mu( @@ -2938,7 +2938,7 @@ vuint16mf2_t test_vnmsub_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnmsub_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vnmsub_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m1_mu( @@ -2947,7 +2947,7 @@ vuint16mf2_t test_vnmsub_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vv_u16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m1_mu( @@ -2956,7 +2956,7 @@ vuint16m1_t test_vnmsub_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnmsub_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vnmsub_vx_u16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m2_mu( @@ -2965,7 +2965,7 @@ vuint16m1_t test_vnmsub_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vv_u16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m2_mu( @@ -2974,7 +2974,7 @@ vuint16m2_t test_vnmsub_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnmsub_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vnmsub_vx_u16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m4_mu( @@ -2983,7 +2983,7 @@ vuint16m2_t test_vnmsub_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vv_u16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m4_mu( @@ -2992,7 +2992,7 @@ vuint16m4_t test_vnmsub_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnmsub_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vnmsub_vx_u16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u16m8_mu( @@ -3001,7 +3001,7 @@ vuint16m4_t test_vnmsub_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vv_u16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u16m8_mu( @@ -3010,7 +3010,7 @@ vuint16m8_t test_vnmsub_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnmsub_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, vuint16m8_t vs2, size_t vl) { - return vnmsub_vx_u16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32mf2_mu( @@ -3019,7 +3019,7 @@ vuint16m8_t test_vnmsub_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32mf2_mu( @@ -3028,7 +3028,7 @@ vuint32mf2_t test_vnmsub_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnmsub_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vnmsub_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m1_mu( @@ -3037,7 +3037,7 @@ vuint32mf2_t test_vnmsub_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vv_u32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m1_mu( @@ -3046,7 +3046,7 @@ vuint32m1_t test_vnmsub_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnmsub_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vnmsub_vx_u32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m2_mu( @@ -3055,7 +3055,7 @@ vuint32m1_t test_vnmsub_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vv_u32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m2_mu( @@ -3064,7 +3064,7 @@ vuint32m2_t test_vnmsub_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnmsub_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vnmsub_vx_u32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m4_mu( @@ -3073,7 +3073,7 @@ vuint32m2_t test_vnmsub_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vv_u32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m4_mu( @@ -3082,7 +3082,7 @@ vuint32m4_t test_vnmsub_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnmsub_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vnmsub_vx_u32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u32m8_mu( @@ -3091,7 +3091,7 @@ vuint32m4_t test_vnmsub_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t vs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vv_u32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u32m8_mu( @@ -3100,7 +3100,7 @@ vuint32m8_t test_vnmsub_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnmsub_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, vuint32m8_t vs2, size_t vl) { - return vnmsub_vx_u32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m1_mu( @@ -3109,7 +3109,7 @@ vuint32m8_t test_vnmsub_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t vs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vv_u64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m1_mu( @@ -3118,7 +3118,7 @@ vuint64m1_t test_vnmsub_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnmsub_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1, vuint64m1_t vs2, size_t vl) { - return vnmsub_vx_u64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m2_mu( @@ -3127,7 +3127,7 @@ vuint64m1_t test_vnmsub_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t vs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vv_u64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m2_mu( @@ -3136,7 +3136,7 @@ vuint64m2_t test_vnmsub_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnmsub_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1, vuint64m2_t vs2, size_t vl) { - return vnmsub_vx_u64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m4_mu( @@ -3145,7 +3145,7 @@ vuint64m2_t test_vnmsub_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t vs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vv_u64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m4_mu( @@ -3154,7 +3154,7 @@ vuint64m4_t test_vnmsub_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnmsub_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1, vuint64m4_t vs2, size_t vl) { - return vnmsub_vx_u64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vv_u64m8_mu( @@ -3163,7 +3163,7 @@ vuint64m4_t test_vnmsub_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint64_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t vs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vv_u64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vnmsub_vv_u64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vnmsub_vx_u64m8_mu( @@ -3172,6 +3172,6 @@ vuint64m8_t test_vnmsub_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnmsub_vx_u64m8_mu(vbool8_t mask, vuint64m8_t vd, uint64_t rs1, vuint64m8_t vs2, size_t vl) { - return vnmsub_vx_u64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vnmsub_vx_u64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnot.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnot.c index 561c93102eb0a3efa4aec97d568762d66b00952d..0de1e11c83a0ff26810f40c0a4c22eddf0ce5037 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnot.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnot.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnot_v_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) { - return vnot_v_i8mf8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i8mf8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf4_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vnot_v_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnot_v_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) { - return vnot_v_i8mf4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i8mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf2_tu( @@ -30,7 +30,7 @@ vint8mf4_t test_vnot_v_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnot_v_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vnot_v_i8mf2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i8mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m1_tu( @@ -39,7 +39,7 @@ vint8mf2_t test_vnot_v_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnot_v_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { - return vnot_v_i8m1_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i8m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m2_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vnot_v_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnot_v_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { - return vnot_v_i8m2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i8m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m4_tu( @@ -57,7 +57,7 @@ vint8m2_t test_vnot_v_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnot_v_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { - return vnot_v_i8m4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i8m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m8_tu( @@ -66,7 +66,7 @@ vint8m4_t test_vnot_v_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnot_v_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { - return vnot_v_i8m8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i8m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf4_tu( @@ -75,7 +75,7 @@ vint8m8_t test_vnot_v_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnot_v_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_t vl) { - return vnot_v_i16mf4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf2_tu( @@ -84,7 +84,7 @@ vint16mf4_t test_vnot_v_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnot_v_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vnot_v_i16mf2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m1_tu( @@ -93,7 +93,7 @@ vint16mf2_t test_vnot_v_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnot_v_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t vl) { - return vnot_v_i16m1_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m2_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vnot_v_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnot_v_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t vl) { - return vnot_v_i16m2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m4_tu( @@ -111,7 +111,7 @@ vint16m2_t test_vnot_v_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnot_v_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t vl) { - return vnot_v_i16m4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m8_tu( @@ -120,7 +120,7 @@ vint16m4_t test_vnot_v_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnot_v_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t vl) { - return vnot_v_i16m8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32mf2_tu( @@ -129,7 +129,7 @@ vint16m8_t test_vnot_v_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnot_v_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_t vl) { - return vnot_v_i32mf2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m1_tu( @@ -138,7 +138,7 @@ vint32mf2_t test_vnot_v_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnot_v_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t vl) { - return vnot_v_i32m1_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m2_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vnot_v_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnot_v_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t vl) { - return vnot_v_i32m2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m4_tu( @@ -156,7 +156,7 @@ vint32m2_t test_vnot_v_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnot_v_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t vl) { - return vnot_v_i32m4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m8_tu( @@ -165,7 +165,7 @@ vint32m4_t test_vnot_v_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnot_v_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t vl) { - return vnot_v_i32m8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m1_tu( @@ -174,7 +174,7 @@ vint32m8_t test_vnot_v_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnot_v_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t vl) { - return vnot_v_i64m1_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m2_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vnot_v_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnot_v_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t vl) { - return vnot_v_i64m2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m4_tu( @@ -192,7 +192,7 @@ vint64m2_t test_vnot_v_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnot_v_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t vl) { - return vnot_v_i64m4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m8_tu( @@ -201,7 +201,7 @@ vint64m4_t test_vnot_v_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnot_v_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t vl) { - return vnot_v_i64m8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_i64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf8_tu( @@ -210,7 +210,7 @@ vint64m8_t test_vnot_v_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnot_v_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vnot_v_u8mf8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u8mf8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf4_tu( @@ -219,7 +219,7 @@ vuint8mf8_t test_vnot_v_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnot_v_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vnot_v_u8mf4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u8mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf2_tu( @@ -228,7 +228,7 @@ vuint8mf4_t test_vnot_v_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnot_v_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vnot_v_u8mf2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u8mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m1_tu( @@ -237,7 +237,7 @@ vuint8mf2_t test_vnot_v_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnot_v_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t vl) { - return vnot_v_u8m1_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u8m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m2_tu( @@ -246,7 +246,7 @@ vuint8m1_t test_vnot_v_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnot_v_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t vl) { - return vnot_v_u8m2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u8m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m4_tu( @@ -255,7 +255,7 @@ vuint8m2_t test_vnot_v_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnot_v_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t vl) { - return vnot_v_u8m4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u8m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m8_tu( @@ -264,7 +264,7 @@ vuint8m4_t test_vnot_v_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnot_v_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t vl) { - return vnot_v_u8m8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u8m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf4_tu( @@ -273,7 +273,7 @@ vuint8m8_t test_vnot_v_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnot_v_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vnot_v_u16mf4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf2_tu( @@ -282,7 +282,7 @@ vuint16mf4_t test_vnot_v_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnot_v_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vnot_v_u16mf2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m1_tu( @@ -291,7 +291,7 @@ vuint16mf2_t test_vnot_v_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnot_v_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_t vl) { - return vnot_v_u16m1_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m2_tu( @@ -300,7 +300,7 @@ vuint16m1_t test_vnot_v_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnot_v_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_t vl) { - return vnot_v_u16m2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m4_tu( @@ -309,7 +309,7 @@ vuint16m2_t test_vnot_v_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnot_v_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_t vl) { - return vnot_v_u16m4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m8_tu( @@ -318,7 +318,7 @@ vuint16m4_t test_vnot_v_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnot_v_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_t vl) { - return vnot_v_u16m8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32mf2_tu( @@ -327,7 +327,7 @@ vuint16m8_t test_vnot_v_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnot_v_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t vl) { - return vnot_v_u32mf2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m1_tu( @@ -336,7 +336,7 @@ vuint32mf2_t test_vnot_v_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnot_v_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_t vl) { - return vnot_v_u32m1_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m2_tu( @@ -345,7 +345,7 @@ vuint32m1_t test_vnot_v_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnot_v_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_t vl) { - return vnot_v_u32m2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m4_tu( @@ -354,7 +354,7 @@ vuint32m2_t test_vnot_v_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnot_v_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_t vl) { - return vnot_v_u32m4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m8_tu( @@ -363,7 +363,7 @@ vuint32m4_t test_vnot_v_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnot_v_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_t vl) { - return vnot_v_u32m8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m1_tu( @@ -372,7 +372,7 @@ vuint32m8_t test_vnot_v_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnot_v_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_t vl) { - return vnot_v_u64m1_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m2_tu( @@ -381,7 +381,7 @@ vuint64m1_t test_vnot_v_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnot_v_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_t vl) { - return vnot_v_u64m2_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m4_tu( @@ -390,7 +390,7 @@ vuint64m2_t test_vnot_v_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnot_v_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_t vl) { - return vnot_v_u64m4_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m4_t test_vnot_v_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnot_v_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_t vl) { - return vnot_v_u64m8_tu(maskedoff, op1, vl); + return __riscv_vnot_v_u64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vnot_v_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnot_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) { - return vnot_v_i8mf8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf4_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vnot_v_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnot_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) { - return vnot_v_i8mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf2_tum( @@ -426,7 +426,7 @@ vint8mf4_t test_vnot_v_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnot_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vnot_v_i8mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m1_tum( @@ -435,7 +435,7 @@ vint8mf2_t test_vnot_v_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnot_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { - return vnot_v_i8m1_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m2_tum( @@ -444,7 +444,7 @@ vint8m1_t test_vnot_v_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnot_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { - return vnot_v_i8m2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m4_tum( @@ -453,7 +453,7 @@ vint8m2_t test_vnot_v_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnot_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { - return vnot_v_i8m4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m8_tum( @@ -462,7 +462,7 @@ vint8m4_t test_vnot_v_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnot_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { - return vnot_v_i8m8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf4_tum( @@ -471,7 +471,7 @@ vint8m8_t test_vnot_v_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnot_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t vl) { - return vnot_v_i16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf2_tum( @@ -480,7 +480,7 @@ vint16mf4_t test_vnot_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnot_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vnot_v_i16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m1_tum( @@ -489,7 +489,7 @@ vint16mf2_t test_vnot_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnot_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t vl) { - return vnot_v_i16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m2_tum( @@ -498,7 +498,7 @@ vint16m1_t test_vnot_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnot_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t vl) { - return vnot_v_i16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m4_tum( @@ -507,7 +507,7 @@ vint16m2_t test_vnot_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnot_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t vl) { - return vnot_v_i16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m8_tum( @@ -516,7 +516,7 @@ vint16m4_t test_vnot_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnot_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t vl) { - return vnot_v_i16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32mf2_tum( @@ -525,7 +525,7 @@ vint16m8_t test_vnot_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnot_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t vl) { - return vnot_v_i32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m1_tum( @@ -534,7 +534,7 @@ vint32mf2_t test_vnot_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnot_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t vl) { - return vnot_v_i32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m2_tum( @@ -543,7 +543,7 @@ vint32m1_t test_vnot_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnot_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t vl) { - return vnot_v_i32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m4_tum( @@ -552,7 +552,7 @@ vint32m2_t test_vnot_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnot_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t vl) { - return vnot_v_i32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m8_tum( @@ -561,7 +561,7 @@ vint32m4_t test_vnot_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnot_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t vl) { - return vnot_v_i32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m1_tum( @@ -570,7 +570,7 @@ vint32m8_t test_vnot_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnot_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t vl) { - return vnot_v_i64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m2_tum( @@ -579,7 +579,7 @@ vint64m1_t test_vnot_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnot_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t vl) { - return vnot_v_i64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m4_tum( @@ -588,7 +588,7 @@ vint64m2_t test_vnot_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnot_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t vl) { - return vnot_v_i64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m8_tum( @@ -597,7 +597,7 @@ vint64m4_t test_vnot_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnot_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t vl) { - return vnot_v_i64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf8_tum( @@ -606,7 +606,7 @@ vint64m8_t test_vnot_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnot_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vnot_v_u8mf8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf4_tum( @@ -615,7 +615,7 @@ vuint8mf8_t test_vnot_v_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnot_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vnot_v_u8mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf2_tum( @@ -624,7 +624,7 @@ vuint8mf4_t test_vnot_v_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnot_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vnot_v_u8mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m1_tum( @@ -633,7 +633,7 @@ vuint8mf2_t test_vnot_v_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnot_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t vl) { - return vnot_v_u8m1_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m2_tum( @@ -642,7 +642,7 @@ vuint8m1_t test_vnot_v_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnot_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t vl) { - return vnot_v_u8m2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m4_tum( @@ -651,7 +651,7 @@ vuint8m2_t test_vnot_v_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnot_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t vl) { - return vnot_v_u8m4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m8_tum( @@ -660,7 +660,7 @@ vuint8m4_t test_vnot_v_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnot_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t vl) { - return vnot_v_u8m8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf4_tum( @@ -669,7 +669,7 @@ vuint8m8_t test_vnot_v_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnot_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vnot_v_u16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf2_tum( @@ -678,7 +678,7 @@ vuint16mf4_t test_vnot_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnot_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vnot_v_u16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m1_tum( @@ -687,7 +687,7 @@ vuint16mf2_t test_vnot_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnot_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t vl) { - return vnot_v_u16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m2_tum( @@ -696,7 +696,7 @@ vuint16m1_t test_vnot_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnot_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t vl) { - return vnot_v_u16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m4_tum( @@ -705,7 +705,7 @@ vuint16m2_t test_vnot_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnot_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t vl) { - return vnot_v_u16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m8_tum( @@ -714,7 +714,7 @@ vuint16m4_t test_vnot_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnot_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t vl) { - return vnot_v_u16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32mf2_tum( @@ -723,7 +723,7 @@ vuint16m8_t test_vnot_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnot_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t vl) { - return vnot_v_u32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m1_tum( @@ -732,7 +732,7 @@ vuint32mf2_t test_vnot_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnot_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t vl) { - return vnot_v_u32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m2_tum( @@ -741,7 +741,7 @@ vuint32m1_t test_vnot_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnot_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t vl) { - return vnot_v_u32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m4_tum( @@ -750,7 +750,7 @@ vuint32m2_t test_vnot_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnot_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t vl) { - return vnot_v_u32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m8_tum( @@ -759,7 +759,7 @@ vuint32m4_t test_vnot_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnot_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t vl) { - return vnot_v_u32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m1_tum( @@ -768,7 +768,7 @@ vuint32m8_t test_vnot_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnot_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t vl) { - return vnot_v_u64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m2_tum( @@ -777,7 +777,7 @@ vuint64m1_t test_vnot_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnot_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t vl) { - return vnot_v_u64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m4_tum( @@ -786,7 +786,7 @@ vuint64m2_t test_vnot_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnot_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t vl) { - return vnot_v_u64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m4_t test_vnot_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnot_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t vl) { - return vnot_v_u64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vnot_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnot_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) { - return vnot_v_i8mf8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf4_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vnot_v_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnot_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) { - return vnot_v_i8mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf2_tumu( @@ -822,7 +822,7 @@ vint8mf4_t test_vnot_v_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnot_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vnot_v_i8mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m1_tumu( @@ -831,7 +831,7 @@ vint8mf2_t test_vnot_v_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnot_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { - return vnot_v_i8m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m2_tumu( @@ -840,7 +840,7 @@ vint8m1_t test_vnot_v_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnot_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { - return vnot_v_i8m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m4_tumu( @@ -849,7 +849,7 @@ vint8m2_t test_vnot_v_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnot_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { - return vnot_v_i8m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m8_tumu( @@ -858,7 +858,7 @@ vint8m4_t test_vnot_v_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnot_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { - return vnot_v_i8m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf4_tumu( @@ -867,7 +867,7 @@ vint8m8_t test_vnot_v_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnot_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t vl) { - return vnot_v_i16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf2_tumu( @@ -876,7 +876,7 @@ vint16mf4_t test_vnot_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnot_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vnot_v_i16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m1_tumu( @@ -885,7 +885,7 @@ vint16mf2_t test_vnot_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnot_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t vl) { - return vnot_v_i16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m2_tumu( @@ -894,7 +894,7 @@ vint16m1_t test_vnot_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnot_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t vl) { - return vnot_v_i16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m4_tumu( @@ -903,7 +903,7 @@ vint16m2_t test_vnot_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnot_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t vl) { - return vnot_v_i16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m8_tumu( @@ -912,7 +912,7 @@ vint16m4_t test_vnot_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnot_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t vl) { - return vnot_v_i16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32mf2_tumu( @@ -921,7 +921,7 @@ vint16m8_t test_vnot_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnot_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t vl) { - return vnot_v_i32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m1_tumu( @@ -930,7 +930,7 @@ vint32mf2_t test_vnot_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnot_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t vl) { - return vnot_v_i32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m2_tumu( @@ -939,7 +939,7 @@ vint32m1_t test_vnot_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnot_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t vl) { - return vnot_v_i32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m4_tumu( @@ -948,7 +948,7 @@ vint32m2_t test_vnot_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnot_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t vl) { - return vnot_v_i32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m8_tumu( @@ -957,7 +957,7 @@ vint32m4_t test_vnot_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnot_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t vl) { - return vnot_v_i32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m1_tumu( @@ -966,7 +966,7 @@ vint32m8_t test_vnot_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnot_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t vl) { - return vnot_v_i64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m2_tumu( @@ -975,7 +975,7 @@ vint64m1_t test_vnot_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnot_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t vl) { - return vnot_v_i64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m4_tumu( @@ -984,7 +984,7 @@ vint64m2_t test_vnot_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnot_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t vl) { - return vnot_v_i64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m8_tumu( @@ -993,7 +993,7 @@ vint64m4_t test_vnot_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnot_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t vl) { - return vnot_v_i64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf8_tumu( @@ -1002,7 +1002,7 @@ vint64m8_t test_vnot_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnot_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vnot_v_u8mf8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf4_tumu( @@ -1011,7 +1011,7 @@ vuint8mf8_t test_vnot_v_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnot_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vnot_v_u8mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf2_tumu( @@ -1020,7 +1020,7 @@ vuint8mf4_t test_vnot_v_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnot_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vnot_v_u8mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m1_tumu( @@ -1029,7 +1029,7 @@ vuint8mf2_t test_vnot_v_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnot_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t vl) { - return vnot_v_u8m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m2_tumu( @@ -1038,7 +1038,7 @@ vuint8m1_t test_vnot_v_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnot_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t vl) { - return vnot_v_u8m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m4_tumu( @@ -1047,7 +1047,7 @@ vuint8m2_t test_vnot_v_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnot_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t vl) { - return vnot_v_u8m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m8_tumu( @@ -1056,7 +1056,7 @@ vuint8m4_t test_vnot_v_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnot_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t vl) { - return vnot_v_u8m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf4_tumu( @@ -1065,7 +1065,7 @@ vuint8m8_t test_vnot_v_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnot_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vnot_v_u16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf2_tumu( @@ -1074,7 +1074,7 @@ vuint16mf4_t test_vnot_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnot_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vnot_v_u16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m1_tumu( @@ -1083,7 +1083,7 @@ vuint16mf2_t test_vnot_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnot_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t vl) { - return vnot_v_u16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m2_tumu( @@ -1092,7 +1092,7 @@ vuint16m1_t test_vnot_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnot_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t vl) { - return vnot_v_u16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m4_tumu( @@ -1101,7 +1101,7 @@ vuint16m2_t test_vnot_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnot_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t vl) { - return vnot_v_u16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m8_tumu( @@ -1110,7 +1110,7 @@ vuint16m4_t test_vnot_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnot_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t vl) { - return vnot_v_u16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32mf2_tumu( @@ -1119,7 +1119,7 @@ vuint16m8_t test_vnot_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnot_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t vl) { - return vnot_v_u32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m1_tumu( @@ -1128,7 +1128,7 @@ vuint32mf2_t test_vnot_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnot_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t vl) { - return vnot_v_u32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m2_tumu( @@ -1137,7 +1137,7 @@ vuint32m1_t test_vnot_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnot_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t vl) { - return vnot_v_u32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m4_tumu( @@ -1146,7 +1146,7 @@ vuint32m2_t test_vnot_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnot_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t vl) { - return vnot_v_u32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m8_tumu( @@ -1155,7 +1155,7 @@ vuint32m4_t test_vnot_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnot_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t vl) { - return vnot_v_u32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m1_tumu( @@ -1164,7 +1164,7 @@ vuint32m8_t test_vnot_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnot_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t vl) { - return vnot_v_u64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m2_tumu( @@ -1173,7 +1173,7 @@ vuint64m1_t test_vnot_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnot_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t vl) { - return vnot_v_u64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m4_tumu( @@ -1182,7 +1182,7 @@ vuint64m2_t test_vnot_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnot_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t vl) { - return vnot_v_u64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m4_t test_vnot_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnot_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t vl) { - return vnot_v_u64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vnot_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnot_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t vl) { - return vnot_v_i8mf8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf4_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vnot_v_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnot_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t vl) { - return vnot_v_i8mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8mf2_mu( @@ -1218,7 +1218,7 @@ vint8mf4_t test_vnot_v_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnot_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vnot_v_i8mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m1_mu( @@ -1227,7 +1227,7 @@ vint8mf2_t test_vnot_v_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnot_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t vl) { - return vnot_v_i8m1_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m2_mu( @@ -1236,7 +1236,7 @@ vint8m1_t test_vnot_v_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnot_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t vl) { - return vnot_v_i8m2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m4_mu( @@ -1245,7 +1245,7 @@ vint8m2_t test_vnot_v_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnot_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t vl) { - return vnot_v_i8m4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i8m8_mu( @@ -1254,7 +1254,7 @@ vint8m4_t test_vnot_v_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vnot_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t vl) { - return vnot_v_i8m8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i8m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf4_mu( @@ -1263,7 +1263,7 @@ vint8m8_t test_vnot_v_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnot_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t vl) { - return vnot_v_i16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16mf2_mu( @@ -1272,7 +1272,7 @@ vint16mf4_t test_vnot_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnot_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vnot_v_i16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m1_mu( @@ -1281,7 +1281,7 @@ vint16mf2_t test_vnot_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnot_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t vl) { - return vnot_v_i16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m2_mu( @@ -1290,7 +1290,7 @@ vint16m1_t test_vnot_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnot_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t vl) { - return vnot_v_i16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m4_mu( @@ -1299,7 +1299,7 @@ vint16m2_t test_vnot_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnot_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t vl) { - return vnot_v_i16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i16m8_mu( @@ -1308,7 +1308,7 @@ vint16m4_t test_vnot_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vnot_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t vl) { - return vnot_v_i16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32mf2_mu( @@ -1317,7 +1317,7 @@ vint16m8_t test_vnot_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnot_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t vl) { - return vnot_v_i32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m1_mu( @@ -1326,7 +1326,7 @@ vint32mf2_t test_vnot_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnot_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t vl) { - return vnot_v_i32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m2_mu( @@ -1335,7 +1335,7 @@ vint32m1_t test_vnot_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnot_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t vl) { - return vnot_v_i32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m4_mu( @@ -1344,7 +1344,7 @@ vint32m2_t test_vnot_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnot_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t vl) { - return vnot_v_i32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i32m8_mu( @@ -1353,7 +1353,7 @@ vint32m4_t test_vnot_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vnot_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t vl) { - return vnot_v_i32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m1_mu( @@ -1362,7 +1362,7 @@ vint32m8_t test_vnot_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vnot_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t vl) { - return vnot_v_i64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m2_mu( @@ -1371,7 +1371,7 @@ vint64m1_t test_vnot_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vnot_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t vl) { - return vnot_v_i64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m4_mu( @@ -1380,7 +1380,7 @@ vint64m2_t test_vnot_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vnot_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t vl) { - return vnot_v_i64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_i64m8_mu( @@ -1389,7 +1389,7 @@ vint64m4_t test_vnot_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vnot_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t vl) { - return vnot_v_i64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_i64m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf8_mu( @@ -1398,7 +1398,7 @@ vint64m8_t test_vnot_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnot_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vnot_v_u8mf8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf4_mu( @@ -1407,7 +1407,7 @@ vuint8mf8_t test_vnot_v_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnot_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vnot_v_u8mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8mf2_mu( @@ -1416,7 +1416,7 @@ vuint8mf4_t test_vnot_v_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnot_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vnot_v_u8mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m1_mu( @@ -1425,7 +1425,7 @@ vuint8mf2_t test_vnot_v_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnot_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t vl) { - return vnot_v_u8m1_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m2_mu( @@ -1434,7 +1434,7 @@ vuint8m1_t test_vnot_v_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnot_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t vl) { - return vnot_v_u8m2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m4_mu( @@ -1443,7 +1443,7 @@ vuint8m2_t test_vnot_v_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnot_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t vl) { - return vnot_v_u8m4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u8m8_mu( @@ -1452,7 +1452,7 @@ vuint8m4_t test_vnot_v_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vnot_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t vl) { - return vnot_v_u8m8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u8m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf4_mu( @@ -1461,7 +1461,7 @@ vuint8m8_t test_vnot_v_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnot_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vnot_v_u16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16mf2_mu( @@ -1470,7 +1470,7 @@ vuint16mf4_t test_vnot_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnot_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vnot_v_u16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m1_mu( @@ -1479,7 +1479,7 @@ vuint16mf2_t test_vnot_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnot_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t vl) { - return vnot_v_u16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m2_mu( @@ -1488,7 +1488,7 @@ vuint16m1_t test_vnot_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnot_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t vl) { - return vnot_v_u16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m4_mu( @@ -1497,7 +1497,7 @@ vuint16m2_t test_vnot_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnot_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t vl) { - return vnot_v_u16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u16m8_mu( @@ -1506,7 +1506,7 @@ vuint16m4_t test_vnot_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vnot_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t vl) { - return vnot_v_u16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32mf2_mu( @@ -1515,7 +1515,7 @@ vuint16m8_t test_vnot_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnot_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t vl) { - return vnot_v_u32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m1_mu( @@ -1524,7 +1524,7 @@ vuint32mf2_t test_vnot_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnot_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t vl) { - return vnot_v_u32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m2_mu( @@ -1533,7 +1533,7 @@ vuint32m1_t test_vnot_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnot_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t vl) { - return vnot_v_u32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m4_mu( @@ -1542,7 +1542,7 @@ vuint32m2_t test_vnot_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnot_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t vl) { - return vnot_v_u32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u32m8_mu( @@ -1551,7 +1551,7 @@ vuint32m4_t test_vnot_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vnot_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t vl) { - return vnot_v_u32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m1_mu( @@ -1560,7 +1560,7 @@ vuint32m8_t test_vnot_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vnot_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t vl) { - return vnot_v_u64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m2_mu( @@ -1569,7 +1569,7 @@ vuint64m1_t test_vnot_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vnot_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t vl) { - return vnot_v_u64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m4_mu( @@ -1578,7 +1578,7 @@ vuint64m2_t test_vnot_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vnot_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t vl) { - return vnot_v_u64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vnot_v_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m4_t test_vnot_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vnot_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t vl) { - return vnot_v_u64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vnot_v_u64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnsra.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnsra.c index 095ca6b5947c7f2b56f253826ed695adeac8d9cd..1fedc3a54f69e3bb29bd37d8a9d41d8ae3817e39 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnsra.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnsra.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wv_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsra_wv_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vnsra_wv_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wx_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vnsra_wx_i8mf8_tu(vint8mf8_t maskedoff, vint16mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wv_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsra_wv_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vnsra_wv_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wx_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vnsra_wx_i8mf4_tu(vint8mf4_t maskedoff, vint16mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wv_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsra_wv_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vnsra_wv_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wx_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vnsra_wx_i8mf2_tu(vint8mf2_t maskedoff, vint16m1_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wv_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsra_wv_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vnsra_wv_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wx_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vnsra_wx_i8m1_tu(vint8m1_t maskedoff, vint16m2_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wv_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsra_wv_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vnsra_wv_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wx_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vnsra_wx_i8m2_tu(vint8m2_t maskedoff, vint16m4_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wv_i8m4_tu(vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsra_wv_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vnsra_wv_i8m4_tu(vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wx_i8m4_tu(vint8m4_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf4_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vnsra_wx_i8m4_tu(vint8m4_t maskedoff, vint16m8_t op1, size_t shif // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wv_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsra_wv_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf4_tu( @@ -129,7 +129,7 @@ vint16mf4_t test_vnsra_wv_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wx_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf2_tu( @@ -138,7 +138,7 @@ vint16mf4_t test_vnsra_wx_i16mf4_tu(vint16mf4_t maskedoff, vint32mf2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wv_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsra_wv_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf2_tu( @@ -147,7 +147,7 @@ vint16mf2_t test_vnsra_wv_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wx_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m1_tu( @@ -156,7 +156,7 @@ vint16mf2_t test_vnsra_wx_i16mf2_tu(vint16mf2_t maskedoff, vint32m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wv_i16m1_tu(vint16m1_t maskedoff, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsra_wv_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m1_tu( @@ -165,7 +165,7 @@ vint16m1_t test_vnsra_wv_i16m1_tu(vint16m1_t maskedoff, vint32m2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wx_i16m1_tu(vint16m1_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m2_tu( @@ -174,7 +174,7 @@ vint16m1_t test_vnsra_wx_i16m1_tu(vint16m1_t maskedoff, vint32m2_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wv_i16m2_tu(vint16m2_t maskedoff, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsra_wv_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m2_tu( @@ -183,7 +183,7 @@ vint16m2_t test_vnsra_wv_i16m2_tu(vint16m2_t maskedoff, vint32m4_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wx_i16m2_tu(vint16m2_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m4_tu( @@ -192,7 +192,7 @@ vint16m2_t test_vnsra_wx_i16m2_tu(vint16m2_t maskedoff, vint32m4_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wv_i16m4_tu(vint16m4_t maskedoff, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsra_wv_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m4_tu( @@ -201,7 +201,7 @@ vint16m4_t test_vnsra_wv_i16m4_tu(vint16m4_t maskedoff, vint32m8_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wx_i16m4_tu(vint16m4_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32mf2_tu( @@ -210,7 +210,7 @@ vint16m4_t test_vnsra_wx_i16m4_tu(vint16m4_t maskedoff, vint32m8_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wv_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsra_wv_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32mf2_tu( @@ -219,7 +219,7 @@ vint32mf2_t test_vnsra_wv_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wx_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m1_tu( @@ -228,7 +228,7 @@ vint32mf2_t test_vnsra_wx_i32mf2_tu(vint32mf2_t maskedoff, vint64m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wv_i32m1_tu(vint32m1_t maskedoff, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsra_wv_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m1_tu( @@ -237,7 +237,7 @@ vint32m1_t test_vnsra_wv_i32m1_tu(vint32m1_t maskedoff, vint64m2_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wx_i32m1_tu(vint32m1_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m2_tu( @@ -246,7 +246,7 @@ vint32m1_t test_vnsra_wx_i32m1_tu(vint32m1_t maskedoff, vint64m2_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wv_i32m2_tu(vint32m2_t maskedoff, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsra_wv_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m2_tu( @@ -255,7 +255,7 @@ vint32m2_t test_vnsra_wv_i32m2_tu(vint32m2_t maskedoff, vint64m4_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wx_i32m2_tu(vint32m2_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m4_tu( @@ -264,7 +264,7 @@ vint32m2_t test_vnsra_wx_i32m2_tu(vint32m2_t maskedoff, vint64m4_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wv_i32m4_tu(vint32m4_t maskedoff, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsra_wv_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m4_tu( @@ -273,7 +273,7 @@ vint32m4_t test_vnsra_wv_i32m4_tu(vint32m4_t maskedoff, vint64m8_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wx_i32m4_tu(vint32m4_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf8_tum( @@ -282,7 +282,7 @@ vint32m4_t test_vnsra_wx_i32m4_tu(vint32m4_t maskedoff, vint64m8_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsra_wv_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf8_tum( @@ -291,7 +291,7 @@ vint8mf8_t test_vnsra_wv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf4_tum( @@ -300,7 +300,7 @@ vint8mf8_t test_vnsra_wx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsra_wv_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf4_tum( @@ -309,7 +309,7 @@ vint8mf4_t test_vnsra_wv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf2_tum( @@ -318,7 +318,7 @@ vint8mf4_t test_vnsra_wx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsra_wv_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf2_tum( @@ -327,7 +327,7 @@ vint8mf2_t test_vnsra_wv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m1_tum( @@ -336,7 +336,7 @@ vint8mf2_t test_vnsra_wx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsra_wv_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m1_tum( @@ -345,7 +345,7 @@ vint8m1_t test_vnsra_wv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m2_tum( @@ -354,7 +354,7 @@ vint8m1_t test_vnsra_wx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsra_wv_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m2_tum( @@ -363,7 +363,7 @@ vint8m2_t test_vnsra_wv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m4_tum( @@ -372,7 +372,7 @@ vint8m2_t test_vnsra_wx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsra_wv_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m4_tum( @@ -381,7 +381,7 @@ vint8m4_t test_vnsra_wv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf4_tum( @@ -390,7 +390,7 @@ vint8m4_t test_vnsra_wx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsra_wv_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf4_tum( @@ -399,7 +399,7 @@ vint16mf4_t test_vnsra_wv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf2_tum( @@ -408,7 +408,7 @@ vint16mf4_t test_vnsra_wx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsra_wv_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf2_tum( @@ -417,7 +417,7 @@ vint16mf2_t test_vnsra_wv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m1_tum( @@ -426,7 +426,7 @@ vint16mf2_t test_vnsra_wx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsra_wv_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m1_tum( @@ -435,7 +435,7 @@ vint16m1_t test_vnsra_wv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m2_tum( @@ -444,7 +444,7 @@ vint16m1_t test_vnsra_wx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsra_wv_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m2_tum( @@ -453,7 +453,7 @@ vint16m2_t test_vnsra_wv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m4_tum( @@ -462,7 +462,7 @@ vint16m2_t test_vnsra_wx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsra_wv_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m4_tum( @@ -471,7 +471,7 @@ vint16m4_t test_vnsra_wv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32mf2_tum( @@ -480,7 +480,7 @@ vint16m4_t test_vnsra_wx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsra_wv_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32mf2_tum( @@ -489,7 +489,7 @@ vint32mf2_t test_vnsra_wv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m1_tum( @@ -498,7 +498,7 @@ vint32mf2_t test_vnsra_wx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsra_wv_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m1_tum( @@ -507,7 +507,7 @@ vint32m1_t test_vnsra_wv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m2_tum( @@ -516,7 +516,7 @@ vint32m1_t test_vnsra_wx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsra_wv_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m2_tum( @@ -525,7 +525,7 @@ vint32m2_t test_vnsra_wv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m4_tum( @@ -534,7 +534,7 @@ vint32m2_t test_vnsra_wx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsra_wv_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m4_tum( @@ -543,7 +543,7 @@ vint32m4_t test_vnsra_wv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf8_tumu( @@ -552,7 +552,7 @@ vint32m4_t test_vnsra_wx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsra_wv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf8_tumu( @@ -561,7 +561,7 @@ vint8mf8_t test_vnsra_wv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf4_tumu( @@ -570,7 +570,7 @@ vint8mf8_t test_vnsra_wx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsra_wv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf4_tumu( @@ -579,7 +579,7 @@ vint8mf4_t test_vnsra_wv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf2_tumu( @@ -588,7 +588,7 @@ vint8mf4_t test_vnsra_wx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsra_wv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf2_tumu( @@ -597,7 +597,7 @@ vint8mf2_t test_vnsra_wv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m1_tumu( @@ -606,7 +606,7 @@ vint8mf2_t test_vnsra_wx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsra_wv_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m1_tumu( @@ -615,7 +615,7 @@ vint8m1_t test_vnsra_wv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m2_tumu( @@ -624,7 +624,7 @@ vint8m1_t test_vnsra_wx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsra_wv_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m2_tumu( @@ -633,7 +633,7 @@ vint8m2_t test_vnsra_wv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m4_tumu( @@ -642,7 +642,7 @@ vint8m2_t test_vnsra_wx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsra_wv_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m4_tumu( @@ -651,7 +651,7 @@ vint8m4_t test_vnsra_wv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf4_tumu( @@ -660,7 +660,7 @@ vint8m4_t test_vnsra_wx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsra_wv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf4_tumu( @@ -669,7 +669,7 @@ vint16mf4_t test_vnsra_wv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf2_tumu( @@ -678,7 +678,7 @@ vint16mf4_t test_vnsra_wx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsra_wv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf2_tumu( @@ -687,7 +687,7 @@ vint16mf2_t test_vnsra_wv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m1_tumu( @@ -696,7 +696,7 @@ vint16mf2_t test_vnsra_wx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsra_wv_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m1_tumu( @@ -705,7 +705,7 @@ vint16m1_t test_vnsra_wv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m2_tumu( @@ -714,7 +714,7 @@ vint16m1_t test_vnsra_wx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsra_wv_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m2_tumu( @@ -723,7 +723,7 @@ vint16m2_t test_vnsra_wv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m4_tumu( @@ -732,7 +732,7 @@ vint16m2_t test_vnsra_wx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsra_wv_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m4_tumu( @@ -741,7 +741,7 @@ vint16m4_t test_vnsra_wv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32mf2_tumu( @@ -750,7 +750,7 @@ vint16m4_t test_vnsra_wx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsra_wv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32mf2_tumu( @@ -759,7 +759,7 @@ vint32mf2_t test_vnsra_wv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m1_tumu( @@ -768,7 +768,7 @@ vint32mf2_t test_vnsra_wx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsra_wv_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m1_tumu( @@ -777,7 +777,7 @@ vint32m1_t test_vnsra_wv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m2_tumu( @@ -786,7 +786,7 @@ vint32m1_t test_vnsra_wx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsra_wv_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m2_tumu( @@ -795,7 +795,7 @@ vint32m2_t test_vnsra_wv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m4_tumu( @@ -804,7 +804,7 @@ vint32m2_t test_vnsra_wx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsra_wv_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m4_tumu( @@ -813,7 +813,7 @@ vint32m4_t test_vnsra_wv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf8_mu( @@ -822,7 +822,7 @@ vint32m4_t test_vnsra_wx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsra_wv_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf8_mu( @@ -831,7 +831,7 @@ vint8mf8_t test_vnsra_wv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vnsra_wx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf4_mu( @@ -840,7 +840,7 @@ vint8mf8_t test_vnsra_wx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsra_wv_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf4_mu( @@ -849,7 +849,7 @@ vint8mf4_t test_vnsra_wv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vnsra_wx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8mf2_mu( @@ -858,7 +858,7 @@ vint8mf4_t test_vnsra_wx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsra_wv_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8mf2_mu( @@ -867,7 +867,7 @@ vint8mf2_t test_vnsra_wv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vnsra_wx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m1_mu( @@ -876,7 +876,7 @@ vint8mf2_t test_vnsra_wx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsra_wv_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m1_mu( @@ -885,7 +885,7 @@ vint8m1_t test_vnsra_wv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vnsra_wx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m2_mu( @@ -894,7 +894,7 @@ vint8m1_t test_vnsra_wx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsra_wv_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m2_mu( @@ -903,7 +903,7 @@ vint8m2_t test_vnsra_wv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vnsra_wx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i8m4_mu( @@ -912,7 +912,7 @@ vint8m2_t test_vnsra_wx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsra_wv_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i8m4_mu( @@ -921,7 +921,7 @@ vint8m4_t test_vnsra_wv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vnsra_wx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf4_mu( @@ -930,7 +930,7 @@ vint8m4_t test_vnsra_wx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsra_wv_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf4_mu( @@ -939,7 +939,7 @@ vint16mf4_t test_vnsra_wv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vnsra_wx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16mf2_mu( @@ -948,7 +948,7 @@ vint16mf4_t test_vnsra_wx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsra_wv_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16mf2_mu( @@ -957,7 +957,7 @@ vint16mf2_t test_vnsra_wv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vnsra_wx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m1_mu( @@ -966,7 +966,7 @@ vint16mf2_t test_vnsra_wx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsra_wv_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m1_mu( @@ -975,7 +975,7 @@ vint16m1_t test_vnsra_wv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vnsra_wx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m2_mu( @@ -984,7 +984,7 @@ vint16m1_t test_vnsra_wx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsra_wv_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m2_mu( @@ -993,7 +993,7 @@ vint16m2_t test_vnsra_wv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vnsra_wx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i16m4_mu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vnsra_wx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsra_wv_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i16m4_mu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vnsra_wv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vnsra_wx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32mf2_mu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vnsra_wx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsra_wv_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32mf2_mu( @@ -1029,7 +1029,7 @@ vint32mf2_t test_vnsra_wv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vnsra_wx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m1_mu( @@ -1038,7 +1038,7 @@ vint32mf2_t test_vnsra_wx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsra_wv_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m1_mu( @@ -1047,7 +1047,7 @@ vint32m1_t test_vnsra_wv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vnsra_wx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m2_mu( @@ -1056,7 +1056,7 @@ vint32m1_t test_vnsra_wx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsra_wv_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m2_mu( @@ -1065,7 +1065,7 @@ vint32m2_t test_vnsra_wv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vnsra_wx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wv_i32m4_mu( @@ -1074,7 +1074,7 @@ vint32m2_t test_vnsra_wx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsra_wv_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wv_i32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsra_wx_i32m4_mu( @@ -1083,6 +1083,6 @@ vint32m4_t test_vnsra_wv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vnsra_wx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vnsra_wx_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsra_wx_i32m4_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnsrl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnsrl.c index b0731068238c71541b4249099c302bc54cb12f9a..c396f8f897906006747e661c9f374a8e90f150d4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnsrl.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnsrl.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wv_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsrl_wv_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vnsrl_wv_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wx_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vnsrl_wx_u8mf8_tu(vuint8mf8_t maskedoff, vuint16mf4_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wv_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsrl_wv_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vnsrl_wv_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wx_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vnsrl_wx_u8mf4_tu(vuint8mf4_t maskedoff, vuint16mf2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wv_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsrl_wv_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vnsrl_wv_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wx_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vnsrl_wx_u8mf2_tu(vuint8mf2_t maskedoff, vuint16m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wv_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsrl_wv_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vnsrl_wv_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wx_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vnsrl_wx_u8m1_tu(vuint8m1_t maskedoff, vuint16m2_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wv_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsrl_wv_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vnsrl_wv_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wx_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vnsrl_wx_u8m2_tu(vuint8m2_t maskedoff, vuint16m4_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wv_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsrl_wv_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vnsrl_wv_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wx_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf4_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vnsrl_wx_u8m4_tu(vuint8m4_t maskedoff, vuint16m8_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wv_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsrl_wv_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf4_tu( @@ -129,7 +129,7 @@ vuint16mf4_t test_vnsrl_wv_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wx_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf2_tu( @@ -138,7 +138,7 @@ vuint16mf4_t test_vnsrl_wx_u16mf4_tu(vuint16mf4_t maskedoff, vuint32mf2_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wv_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsrl_wv_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf2_tu( @@ -147,7 +147,7 @@ vuint16mf2_t test_vnsrl_wv_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wx_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m1_tu( @@ -156,7 +156,7 @@ vuint16mf2_t test_vnsrl_wx_u16mf2_tu(vuint16mf2_t maskedoff, vuint32m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wv_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsrl_wv_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m1_tu( @@ -165,7 +165,7 @@ vuint16m1_t test_vnsrl_wv_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wx_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m2_tu( @@ -174,7 +174,7 @@ vuint16m1_t test_vnsrl_wx_u16m1_tu(vuint16m1_t maskedoff, vuint32m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wv_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsrl_wv_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m2_tu( @@ -183,7 +183,7 @@ vuint16m2_t test_vnsrl_wv_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wx_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m4_tu( @@ -192,7 +192,7 @@ vuint16m2_t test_vnsrl_wx_u16m2_tu(vuint16m2_t maskedoff, vuint32m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wv_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsrl_wv_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m4_tu( @@ -201,7 +201,7 @@ vuint16m4_t test_vnsrl_wv_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wx_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32mf2_tu( @@ -210,7 +210,7 @@ vuint16m4_t test_vnsrl_wx_u16m4_tu(vuint16m4_t maskedoff, vuint32m8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wv_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsrl_wv_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32mf2_tu( @@ -219,7 +219,7 @@ vuint32mf2_t test_vnsrl_wv_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wx_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m1_tu( @@ -228,7 +228,7 @@ vuint32mf2_t test_vnsrl_wx_u32mf2_tu(vuint32mf2_t maskedoff, vuint64m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wv_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsrl_wv_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m1_tu( @@ -237,7 +237,7 @@ vuint32m1_t test_vnsrl_wv_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wx_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m2_tu( @@ -246,7 +246,7 @@ vuint32m1_t test_vnsrl_wx_u32m1_tu(vuint32m1_t maskedoff, vuint64m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wv_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsrl_wv_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m2_tu( @@ -255,7 +255,7 @@ vuint32m2_t test_vnsrl_wv_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wx_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m4_tu( @@ -264,7 +264,7 @@ vuint32m2_t test_vnsrl_wx_u32m2_tu(vuint32m2_t maskedoff, vuint64m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wv_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsrl_wv_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m4_tu( @@ -273,7 +273,7 @@ vuint32m4_t test_vnsrl_wv_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wx_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf8_tum( @@ -282,7 +282,7 @@ vuint32m4_t test_vnsrl_wx_u32m4_tu(vuint32m4_t maskedoff, vuint64m8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsrl_wv_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf8_tum( @@ -291,7 +291,7 @@ vuint8mf8_t test_vnsrl_wv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf4_tum( @@ -300,7 +300,7 @@ vuint8mf8_t test_vnsrl_wx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsrl_wv_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf4_tum( @@ -309,7 +309,7 @@ vuint8mf4_t test_vnsrl_wv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf2_tum( @@ -318,7 +318,7 @@ vuint8mf4_t test_vnsrl_wx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsrl_wv_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf2_tum( @@ -327,7 +327,7 @@ vuint8mf2_t test_vnsrl_wv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m1_tum( @@ -336,7 +336,7 @@ vuint8mf2_t test_vnsrl_wx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsrl_wv_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m1_tum( @@ -345,7 +345,7 @@ vuint8m1_t test_vnsrl_wv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m2_tum( @@ -354,7 +354,7 @@ vuint8m1_t test_vnsrl_wx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsrl_wv_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m2_tum( @@ -363,7 +363,7 @@ vuint8m2_t test_vnsrl_wv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m4_tum( @@ -372,7 +372,7 @@ vuint8m2_t test_vnsrl_wx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsrl_wv_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m4_tum( @@ -381,7 +381,7 @@ vuint8m4_t test_vnsrl_wv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf4_tum( @@ -390,7 +390,7 @@ vuint8m4_t test_vnsrl_wx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsrl_wv_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf4_tum( @@ -399,7 +399,7 @@ vuint16mf4_t test_vnsrl_wv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf2_tum( @@ -408,7 +408,7 @@ vuint16mf4_t test_vnsrl_wx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsrl_wv_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf2_tum( @@ -417,7 +417,7 @@ vuint16mf2_t test_vnsrl_wv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m1_tum( @@ -426,7 +426,7 @@ vuint16mf2_t test_vnsrl_wx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsrl_wv_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m1_tum( @@ -435,7 +435,7 @@ vuint16m1_t test_vnsrl_wv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m2_tum( @@ -444,7 +444,7 @@ vuint16m1_t test_vnsrl_wx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsrl_wv_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m2_tum( @@ -453,7 +453,7 @@ vuint16m2_t test_vnsrl_wv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m4_tum( @@ -462,7 +462,7 @@ vuint16m2_t test_vnsrl_wx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsrl_wv_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m4_tum( @@ -471,7 +471,7 @@ vuint16m4_t test_vnsrl_wv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32mf2_tum( @@ -480,7 +480,7 @@ vuint16m4_t test_vnsrl_wx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsrl_wv_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32mf2_tum( @@ -489,7 +489,7 @@ vuint32mf2_t test_vnsrl_wv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m1_tum( @@ -498,7 +498,7 @@ vuint32mf2_t test_vnsrl_wx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsrl_wv_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m1_tum( @@ -507,7 +507,7 @@ vuint32m1_t test_vnsrl_wv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m2_tum( @@ -516,7 +516,7 @@ vuint32m1_t test_vnsrl_wx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsrl_wv_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m2_tum( @@ -525,7 +525,7 @@ vuint32m2_t test_vnsrl_wv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m4_tum( @@ -534,7 +534,7 @@ vuint32m2_t test_vnsrl_wx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsrl_wv_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m4_tum( @@ -543,7 +543,7 @@ vuint32m4_t test_vnsrl_wv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf8_tumu( @@ -552,7 +552,7 @@ vuint32m4_t test_vnsrl_wx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsrl_wv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf8_tumu( @@ -561,7 +561,7 @@ vuint8mf8_t test_vnsrl_wv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf4_tumu( @@ -570,7 +570,7 @@ vuint8mf8_t test_vnsrl_wx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsrl_wv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf4_tumu( @@ -579,7 +579,7 @@ vuint8mf4_t test_vnsrl_wv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf2_tumu( @@ -588,7 +588,7 @@ vuint8mf4_t test_vnsrl_wx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsrl_wv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf2_tumu( @@ -597,7 +597,7 @@ vuint8mf2_t test_vnsrl_wv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m1_tumu( @@ -606,7 +606,7 @@ vuint8mf2_t test_vnsrl_wx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsrl_wv_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m1_tumu( @@ -615,7 +615,7 @@ vuint8m1_t test_vnsrl_wv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m2_tumu( @@ -624,7 +624,7 @@ vuint8m1_t test_vnsrl_wx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsrl_wv_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m2_tumu( @@ -633,7 +633,7 @@ vuint8m2_t test_vnsrl_wv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m4_tumu( @@ -642,7 +642,7 @@ vuint8m2_t test_vnsrl_wx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsrl_wv_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m4_tumu( @@ -651,7 +651,7 @@ vuint8m4_t test_vnsrl_wv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf4_tumu( @@ -660,7 +660,7 @@ vuint8m4_t test_vnsrl_wx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsrl_wv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf4_tumu( @@ -669,7 +669,7 @@ vuint16mf4_t test_vnsrl_wv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf2_tumu( @@ -678,7 +678,7 @@ vuint16mf4_t test_vnsrl_wx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsrl_wv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf2_tumu( @@ -687,7 +687,7 @@ vuint16mf2_t test_vnsrl_wv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m1_tumu( @@ -696,7 +696,7 @@ vuint16mf2_t test_vnsrl_wx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsrl_wv_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m1_tumu( @@ -705,7 +705,7 @@ vuint16m1_t test_vnsrl_wv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m2_tumu( @@ -714,7 +714,7 @@ vuint16m1_t test_vnsrl_wx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsrl_wv_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m2_tumu( @@ -723,7 +723,7 @@ vuint16m2_t test_vnsrl_wv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m4_tumu( @@ -732,7 +732,7 @@ vuint16m2_t test_vnsrl_wx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsrl_wv_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m4_tumu( @@ -741,7 +741,7 @@ vuint16m4_t test_vnsrl_wv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32mf2_tumu( @@ -750,7 +750,7 @@ vuint16m4_t test_vnsrl_wx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsrl_wv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32mf2_tumu( @@ -759,7 +759,7 @@ vuint32mf2_t test_vnsrl_wv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m1_tumu( @@ -768,7 +768,7 @@ vuint32mf2_t test_vnsrl_wx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsrl_wv_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m1_tumu( @@ -777,7 +777,7 @@ vuint32m1_t test_vnsrl_wv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m2_tumu( @@ -786,7 +786,7 @@ vuint32m1_t test_vnsrl_wx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsrl_wv_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m2_tumu( @@ -795,7 +795,7 @@ vuint32m2_t test_vnsrl_wv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m4_tumu( @@ -804,7 +804,7 @@ vuint32m2_t test_vnsrl_wx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsrl_wv_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m4_tumu( @@ -813,7 +813,7 @@ vuint32m4_t test_vnsrl_wv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf8_mu( @@ -822,7 +822,7 @@ vuint32m4_t test_vnsrl_wx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, vuint8mf8_t shift, size_t vl) { - return vnsrl_wv_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf8_mu( @@ -831,7 +831,7 @@ vuint8mf8_t test_vnsrl_wv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vnsrl_wx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf4_mu( @@ -840,7 +840,7 @@ vuint8mf8_t test_vnsrl_wx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, vuint8mf4_t shift, size_t vl) { - return vnsrl_wv_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf4_mu( @@ -849,7 +849,7 @@ vuint8mf4_t test_vnsrl_wv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vnsrl_wx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8mf2_mu( @@ -858,7 +858,7 @@ vuint8mf4_t test_vnsrl_wx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, vuint8mf2_t shift, size_t vl) { - return vnsrl_wv_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8mf2_mu( @@ -867,7 +867,7 @@ vuint8mf2_t test_vnsrl_wv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vnsrl_wx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m1_mu( @@ -876,7 +876,7 @@ vuint8mf2_t test_vnsrl_wx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, vuint8m1_t shift, size_t vl) { - return vnsrl_wv_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m1_mu( @@ -885,7 +885,7 @@ vuint8m1_t test_vnsrl_wv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vnsrl_wx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m2_mu( @@ -894,7 +894,7 @@ vuint8m1_t test_vnsrl_wx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, vuint8m2_t shift, size_t vl) { - return vnsrl_wv_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m2_mu( @@ -903,7 +903,7 @@ vuint8m2_t test_vnsrl_wv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vnsrl_wx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u8m4_mu( @@ -912,7 +912,7 @@ vuint8m2_t test_vnsrl_wx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, vuint8m4_t shift, size_t vl) { - return vnsrl_wv_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u8m4_mu( @@ -921,7 +921,7 @@ vuint8m4_t test_vnsrl_wv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vnsrl_wx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf4_mu( @@ -930,7 +930,7 @@ vuint8m4_t test_vnsrl_wx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, vuint16mf4_t shift, size_t vl) { - return vnsrl_wv_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf4_mu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vnsrl_wv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vnsrl_wx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16mf2_mu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vnsrl_wx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, vuint16mf2_t shift, size_t vl) { - return vnsrl_wv_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16mf2_mu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vnsrl_wv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vnsrl_wx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m1_mu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vnsrl_wx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, vuint16m1_t shift, size_t vl) { - return vnsrl_wv_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m1_mu( @@ -975,7 +975,7 @@ vuint16m1_t test_vnsrl_wv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vnsrl_wx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m2_mu( @@ -984,7 +984,7 @@ vuint16m1_t test_vnsrl_wx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, vuint16m2_t shift, size_t vl) { - return vnsrl_wv_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m2_mu( @@ -993,7 +993,7 @@ vuint16m2_t test_vnsrl_wv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vnsrl_wx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u16m4_mu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vnsrl_wx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, vuint16m4_t shift, size_t vl) { - return vnsrl_wv_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u16m4_mu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vnsrl_wv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vnsrl_wx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32mf2_mu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vnsrl_wx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, vuint32mf2_t shift, size_t vl) { - return vnsrl_wv_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32mf2_mu( @@ -1029,7 +1029,7 @@ vuint32mf2_t test_vnsrl_wv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vnsrl_wx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m1_mu( @@ -1038,7 +1038,7 @@ vuint32mf2_t test_vnsrl_wx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, vuint32m1_t shift, size_t vl) { - return vnsrl_wv_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m1_mu( @@ -1047,7 +1047,7 @@ vuint32m1_t test_vnsrl_wv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vnsrl_wx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m2_mu( @@ -1056,7 +1056,7 @@ vuint32m1_t test_vnsrl_wx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, vuint32m2_t shift, size_t vl) { - return vnsrl_wv_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m2_mu( @@ -1065,7 +1065,7 @@ vuint32m2_t test_vnsrl_wv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vnsrl_wx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wv_u32m4_mu( @@ -1074,7 +1074,7 @@ vuint32m2_t test_vnsrl_wx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, vuint32m4_t shift, size_t vl) { - return vnsrl_wv_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wv_u32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vnsrl_wx_u32m4_mu( @@ -1083,6 +1083,6 @@ vuint32m4_t test_vnsrl_wv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vnsrl_wx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vnsrl_wx_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vnsrl_wx_u32m4_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vor.c index 9b721981afb7dfebd309926c6feb2e42b42cdde9..920b8a57530093932a9ba38f493bc35ca7227cf2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vor_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vor_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vor_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vor_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vor_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vor_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vor_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vor_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vor_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vor_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vor_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vor_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vor_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vor_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vor_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vor_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vor_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vor_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vor_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vor_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vor_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vor_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vor_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vor_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vor_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vor_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vor_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vor_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vor_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vor_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vor_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vor_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vor_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vor_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vor_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vor_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vor_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vor_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vor_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vor_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vor_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vor_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vor_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vor_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vor_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vor_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vor_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vor_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vor_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vor_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vor_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vor_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vor_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vor_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vor_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vor_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vor_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vor_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vor_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vor_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vor_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vor_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vor_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vor_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vor_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vor_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vor_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vor_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vor_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vor_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vor_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vor_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vor_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vor_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vor_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vor_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vor_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vor_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vor_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vor_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vor_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vor_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vor_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vor_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vor_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vor_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vor_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vor_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vor_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vor_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vor_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vor_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vor_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vor_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vor_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vor_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vor_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vor_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vor_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vor_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vor_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vor_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vor_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vor_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vor_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vor_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vor_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vor_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vor_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vor_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vor_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vor_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vor_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vor_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vor_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vor_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vor_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vor_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vor_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vor_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vor_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vor_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vor_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vor_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vor_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vor_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vor_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vor_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vor_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vor_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m8_tu( @@ -795,7 +795,7 @@ vuint64m8_t test_vor_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf8_tum( @@ -804,7 +804,7 @@ vuint64m8_t test_vor_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vor_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf8_tum( @@ -813,7 +813,7 @@ vint8mf8_t test_vor_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf4_tum( @@ -822,7 +822,7 @@ vint8mf8_t test_vor_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vor_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf4_tum( @@ -831,7 +831,7 @@ vint8mf4_t test_vor_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf2_tum( @@ -840,7 +840,7 @@ vint8mf4_t test_vor_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vor_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf2_tum( @@ -849,7 +849,7 @@ vint8mf2_t test_vor_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m1_tum( @@ -858,7 +858,7 @@ vint8mf2_t test_vor_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vor_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m1_tum( @@ -867,7 +867,7 @@ vint8m1_t test_vor_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m2_tum( @@ -876,7 +876,7 @@ vint8m1_t test_vor_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vor_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m2_tum( @@ -885,7 +885,7 @@ vint8m2_t test_vor_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m4_tum( @@ -894,7 +894,7 @@ vint8m2_t test_vor_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vor_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m4_tum( @@ -903,7 +903,7 @@ vint8m4_t test_vor_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m8_tum( @@ -912,7 +912,7 @@ vint8m4_t test_vor_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vor_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m8_tum( @@ -921,7 +921,7 @@ vint8m8_t test_vor_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf4_tum( @@ -930,7 +930,7 @@ vint8m8_t test_vor_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vor_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf4_tum( @@ -939,7 +939,7 @@ vint16mf4_t test_vor_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf2_tum( @@ -948,7 +948,7 @@ vint16mf4_t test_vor_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vor_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf2_tum( @@ -957,7 +957,7 @@ vint16mf2_t test_vor_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m1_tum( @@ -966,7 +966,7 @@ vint16mf2_t test_vor_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vor_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m1_tum( @@ -975,7 +975,7 @@ vint16m1_t test_vor_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m2_tum( @@ -984,7 +984,7 @@ vint16m1_t test_vor_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vor_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m2_tum( @@ -993,7 +993,7 @@ vint16m2_t test_vor_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m4_tum( @@ -1002,7 +1002,7 @@ vint16m2_t test_vor_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vor_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m4_tum( @@ -1011,7 +1011,7 @@ vint16m4_t test_vor_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m8_tum( @@ -1020,7 +1020,7 @@ vint16m4_t test_vor_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vor_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m8_tum( @@ -1029,7 +1029,7 @@ vint16m8_t test_vor_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32mf2_tum( @@ -1038,7 +1038,7 @@ vint16m8_t test_vor_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vor_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32mf2_tum( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vor_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m1_tum( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vor_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vor_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m1_tum( @@ -1065,7 +1065,7 @@ vint32m1_t test_vor_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m2_tum( @@ -1074,7 +1074,7 @@ vint32m1_t test_vor_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vor_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m2_tum( @@ -1083,7 +1083,7 @@ vint32m2_t test_vor_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m4_tum( @@ -1092,7 +1092,7 @@ vint32m2_t test_vor_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vor_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m4_tum( @@ -1101,7 +1101,7 @@ vint32m4_t test_vor_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m8_tum( @@ -1110,7 +1110,7 @@ vint32m4_t test_vor_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vor_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m8_tum( @@ -1119,7 +1119,7 @@ vint32m8_t test_vor_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m1_tum( @@ -1128,7 +1128,7 @@ vint32m8_t test_vor_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vor_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m1_tum( @@ -1137,7 +1137,7 @@ vint64m1_t test_vor_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m2_tum( @@ -1146,7 +1146,7 @@ vint64m1_t test_vor_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vor_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m2_tum( @@ -1155,7 +1155,7 @@ vint64m2_t test_vor_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m4_tum( @@ -1164,7 +1164,7 @@ vint64m2_t test_vor_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vor_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m4_tum( @@ -1173,7 +1173,7 @@ vint64m4_t test_vor_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m8_tum( @@ -1182,7 +1182,7 @@ vint64m4_t test_vor_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vor_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m8_tum( @@ -1191,7 +1191,7 @@ vint64m8_t test_vor_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf8_tum( @@ -1200,7 +1200,7 @@ vint64m8_t test_vor_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vor_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf8_tum( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vor_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf4_tum( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vor_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vor_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf4_tum( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vor_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf2_tum( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vor_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vor_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf2_tum( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vor_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m1_tum( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vor_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vor_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m1_tum( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vor_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m2_tum( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vor_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vor_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m2_tum( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vor_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m4_tum( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vor_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vor_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m4_tum( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vor_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m8_tum( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vor_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vor_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m8_tum( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vor_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf4_tum( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vor_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vor_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf4_tum( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vor_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf2_tum( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vor_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vor_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf2_tum( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vor_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m1_tum( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vor_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vor_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m1_tum( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vor_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m2_tum( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vor_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vor_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m2_tum( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vor_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m4_tum( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vor_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vor_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m4_tum( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vor_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m8_tum( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vor_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vor_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m8_tum( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vor_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32mf2_tum( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vor_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vor_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32mf2_tum( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vor_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m1_tum( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vor_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vor_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m1_tum( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vor_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m2_tum( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vor_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vor_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m2_tum( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vor_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m4_tum( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vor_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vor_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m4_tum( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vor_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m8_tum( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vor_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vor_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m8_tum( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vor_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m1_tum( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vor_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vor_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m1_tum( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vor_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m2_tum( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vor_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vor_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m2_tum( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vor_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m4_tum( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vor_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vor_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m4_tum( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vor_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m8_tum( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vor_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vor_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m8_tum( @@ -1587,7 +1587,7 @@ vuint64m8_t test_vor_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf8_tumu( @@ -1596,7 +1596,7 @@ vuint64m8_t test_vor_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vor_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf8_tumu( @@ -1605,7 +1605,7 @@ vint8mf8_t test_vor_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf4_tumu( @@ -1614,7 +1614,7 @@ vint8mf8_t test_vor_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vor_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf4_tumu( @@ -1623,7 +1623,7 @@ vint8mf4_t test_vor_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf2_tumu( @@ -1632,7 +1632,7 @@ vint8mf4_t test_vor_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vor_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf2_tumu( @@ -1641,7 +1641,7 @@ vint8mf2_t test_vor_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m1_tumu( @@ -1650,7 +1650,7 @@ vint8mf2_t test_vor_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vor_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m1_tumu( @@ -1659,7 +1659,7 @@ vint8m1_t test_vor_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m2_tumu( @@ -1668,7 +1668,7 @@ vint8m1_t test_vor_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vor_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m2_tumu( @@ -1677,7 +1677,7 @@ vint8m2_t test_vor_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m4_tumu( @@ -1686,7 +1686,7 @@ vint8m2_t test_vor_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vor_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m4_tumu( @@ -1695,7 +1695,7 @@ vint8m4_t test_vor_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m8_tumu( @@ -1704,7 +1704,7 @@ vint8m4_t test_vor_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vor_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m8_tumu( @@ -1713,7 +1713,7 @@ vint8m8_t test_vor_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf4_tumu( @@ -1722,7 +1722,7 @@ vint8m8_t test_vor_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vor_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf4_tumu( @@ -1731,7 +1731,7 @@ vint16mf4_t test_vor_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf2_tumu( @@ -1740,7 +1740,7 @@ vint16mf4_t test_vor_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vor_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf2_tumu( @@ -1749,7 +1749,7 @@ vint16mf2_t test_vor_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m1_tumu( @@ -1758,7 +1758,7 @@ vint16mf2_t test_vor_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vor_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m1_tumu( @@ -1767,7 +1767,7 @@ vint16m1_t test_vor_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m2_tumu( @@ -1776,7 +1776,7 @@ vint16m1_t test_vor_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vor_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m2_tumu( @@ -1785,7 +1785,7 @@ vint16m2_t test_vor_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m4_tumu( @@ -1794,7 +1794,7 @@ vint16m2_t test_vor_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vor_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m4_tumu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vor_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m8_tumu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vor_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vor_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m8_tumu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vor_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32mf2_tumu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vor_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vor_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32mf2_tumu( @@ -1839,7 +1839,7 @@ vint32mf2_t test_vor_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m1_tumu( @@ -1848,7 +1848,7 @@ vint32mf2_t test_vor_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vor_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m1_tumu( @@ -1857,7 +1857,7 @@ vint32m1_t test_vor_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m2_tumu( @@ -1866,7 +1866,7 @@ vint32m1_t test_vor_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vor_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m2_tumu( @@ -1875,7 +1875,7 @@ vint32m2_t test_vor_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m4_tumu( @@ -1884,7 +1884,7 @@ vint32m2_t test_vor_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vor_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m4_tumu( @@ -1893,7 +1893,7 @@ vint32m4_t test_vor_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m8_tumu( @@ -1902,7 +1902,7 @@ vint32m4_t test_vor_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vor_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m8_tumu( @@ -1911,7 +1911,7 @@ vint32m8_t test_vor_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m1_tumu( @@ -1920,7 +1920,7 @@ vint32m8_t test_vor_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vor_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m1_tumu( @@ -1929,7 +1929,7 @@ vint64m1_t test_vor_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m2_tumu( @@ -1938,7 +1938,7 @@ vint64m1_t test_vor_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vor_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m2_tumu( @@ -1947,7 +1947,7 @@ vint64m2_t test_vor_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m4_tumu( @@ -1956,7 +1956,7 @@ vint64m2_t test_vor_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vor_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m4_tumu( @@ -1965,7 +1965,7 @@ vint64m4_t test_vor_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m8_tumu( @@ -1974,7 +1974,7 @@ vint64m4_t test_vor_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vor_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m8_tumu( @@ -1983,7 +1983,7 @@ vint64m8_t test_vor_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf8_tumu( @@ -1992,7 +1992,7 @@ vint64m8_t test_vor_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vor_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf8_tumu( @@ -2001,7 +2001,7 @@ vuint8mf8_t test_vor_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf4_tumu( @@ -2010,7 +2010,7 @@ vuint8mf8_t test_vor_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vor_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf4_tumu( @@ -2019,7 +2019,7 @@ vuint8mf4_t test_vor_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf2_tumu( @@ -2028,7 +2028,7 @@ vuint8mf4_t test_vor_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vor_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf2_tumu( @@ -2037,7 +2037,7 @@ vuint8mf2_t test_vor_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m1_tumu( @@ -2046,7 +2046,7 @@ vuint8mf2_t test_vor_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vor_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m1_tumu( @@ -2055,7 +2055,7 @@ vuint8m1_t test_vor_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m2_tumu( @@ -2064,7 +2064,7 @@ vuint8m1_t test_vor_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vor_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m2_tumu( @@ -2073,7 +2073,7 @@ vuint8m2_t test_vor_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m4_tumu( @@ -2082,7 +2082,7 @@ vuint8m2_t test_vor_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vor_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m4_tumu( @@ -2091,7 +2091,7 @@ vuint8m4_t test_vor_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m8_tumu( @@ -2100,7 +2100,7 @@ vuint8m4_t test_vor_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vor_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m8_tumu( @@ -2109,7 +2109,7 @@ vuint8m8_t test_vor_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf4_tumu( @@ -2118,7 +2118,7 @@ vuint8m8_t test_vor_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vor_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf4_tumu( @@ -2127,7 +2127,7 @@ vuint16mf4_t test_vor_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf2_tumu( @@ -2136,7 +2136,7 @@ vuint16mf4_t test_vor_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vor_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf2_tumu( @@ -2145,7 +2145,7 @@ vuint16mf2_t test_vor_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m1_tumu( @@ -2154,7 +2154,7 @@ vuint16mf2_t test_vor_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vor_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m1_tumu( @@ -2163,7 +2163,7 @@ vuint16m1_t test_vor_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m2_tumu( @@ -2172,7 +2172,7 @@ vuint16m1_t test_vor_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vor_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m2_tumu( @@ -2181,7 +2181,7 @@ vuint16m2_t test_vor_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m4_tumu( @@ -2190,7 +2190,7 @@ vuint16m2_t test_vor_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vor_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m4_tumu( @@ -2199,7 +2199,7 @@ vuint16m4_t test_vor_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m8_tumu( @@ -2208,7 +2208,7 @@ vuint16m4_t test_vor_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vor_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m8_tumu( @@ -2217,7 +2217,7 @@ vuint16m8_t test_vor_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32mf2_tumu( @@ -2226,7 +2226,7 @@ vuint16m8_t test_vor_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vor_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32mf2_tumu( @@ -2235,7 +2235,7 @@ vuint32mf2_t test_vor_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m1_tumu( @@ -2244,7 +2244,7 @@ vuint32mf2_t test_vor_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vor_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m1_tumu( @@ -2253,7 +2253,7 @@ vuint32m1_t test_vor_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m2_tumu( @@ -2262,7 +2262,7 @@ vuint32m1_t test_vor_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vor_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m2_tumu( @@ -2271,7 +2271,7 @@ vuint32m2_t test_vor_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m4_tumu( @@ -2280,7 +2280,7 @@ vuint32m2_t test_vor_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vor_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m4_tumu( @@ -2289,7 +2289,7 @@ vuint32m4_t test_vor_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m8_tumu( @@ -2298,7 +2298,7 @@ vuint32m4_t test_vor_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vor_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m8_tumu( @@ -2307,7 +2307,7 @@ vuint32m8_t test_vor_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m1_tumu( @@ -2316,7 +2316,7 @@ vuint32m8_t test_vor_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vor_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m1_tumu( @@ -2325,7 +2325,7 @@ vuint64m1_t test_vor_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m2_tumu( @@ -2334,7 +2334,7 @@ vuint64m1_t test_vor_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vor_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m2_tumu( @@ -2343,7 +2343,7 @@ vuint64m2_t test_vor_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m4_tumu( @@ -2352,7 +2352,7 @@ vuint64m2_t test_vor_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vor_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m4_tumu( @@ -2361,7 +2361,7 @@ vuint64m4_t test_vor_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m8_tumu( @@ -2370,7 +2370,7 @@ vuint64m4_t test_vor_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vor_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m8_tumu( @@ -2379,7 +2379,7 @@ vuint64m8_t test_vor_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf8_mu( @@ -2388,7 +2388,7 @@ vuint64m8_t test_vor_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vor_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf8_mu( @@ -2397,7 +2397,7 @@ vint8mf8_t test_vor_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vor_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf4_mu( @@ -2406,7 +2406,7 @@ vint8mf8_t test_vor_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vor_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf4_mu( @@ -2415,7 +2415,7 @@ vint8mf4_t test_vor_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vor_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8mf2_mu( @@ -2424,7 +2424,7 @@ vint8mf4_t test_vor_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vor_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8mf2_mu( @@ -2433,7 +2433,7 @@ vint8mf2_t test_vor_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vor_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m1_mu( @@ -2442,7 +2442,7 @@ vint8mf2_t test_vor_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vor_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m1_mu( @@ -2451,7 +2451,7 @@ vint8m1_t test_vor_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vor_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m2_mu( @@ -2460,7 +2460,7 @@ vint8m1_t test_vor_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vor_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m2_mu( @@ -2469,7 +2469,7 @@ vint8m2_t test_vor_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vor_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m4_mu( @@ -2478,7 +2478,7 @@ vint8m2_t test_vor_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vor_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m4_mu( @@ -2487,7 +2487,7 @@ vint8m4_t test_vor_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vor_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i8m8_mu( @@ -2496,7 +2496,7 @@ vint8m4_t test_vor_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vor_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i8m8_mu( @@ -2505,7 +2505,7 @@ vint8m8_t test_vor_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vor_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vor_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf4_mu( @@ -2514,7 +2514,7 @@ vint8m8_t test_vor_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vor_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf4_mu( @@ -2523,7 +2523,7 @@ vint16mf4_t test_vor_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vor_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16mf2_mu( @@ -2532,7 +2532,7 @@ vint16mf4_t test_vor_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vor_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16mf2_mu( @@ -2541,7 +2541,7 @@ vint16mf2_t test_vor_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vor_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m1_mu( @@ -2550,7 +2550,7 @@ vint16mf2_t test_vor_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vor_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m1_mu( @@ -2559,7 +2559,7 @@ vint16m1_t test_vor_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vor_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m2_mu( @@ -2568,7 +2568,7 @@ vint16m1_t test_vor_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vor_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m2_mu( @@ -2577,7 +2577,7 @@ vint16m2_t test_vor_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vor_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m4_mu( @@ -2586,7 +2586,7 @@ vint16m2_t test_vor_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vor_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m4_mu( @@ -2595,7 +2595,7 @@ vint16m4_t test_vor_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vor_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i16m8_mu( @@ -2604,7 +2604,7 @@ vint16m4_t test_vor_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vor_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i16m8_mu( @@ -2613,7 +2613,7 @@ vint16m8_t test_vor_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vor_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vor_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32mf2_mu( @@ -2622,7 +2622,7 @@ vint16m8_t test_vor_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vor_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32mf2_mu( @@ -2631,7 +2631,7 @@ vint32mf2_t test_vor_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vor_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m1_mu( @@ -2640,7 +2640,7 @@ vint32mf2_t test_vor_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vor_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m1_mu( @@ -2649,7 +2649,7 @@ vint32m1_t test_vor_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vor_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m2_mu( @@ -2658,7 +2658,7 @@ vint32m1_t test_vor_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vor_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m2_mu( @@ -2667,7 +2667,7 @@ vint32m2_t test_vor_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vor_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m4_mu( @@ -2676,7 +2676,7 @@ vint32m2_t test_vor_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vor_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m4_mu( @@ -2685,7 +2685,7 @@ vint32m4_t test_vor_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vor_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i32m8_mu( @@ -2694,7 +2694,7 @@ vint32m4_t test_vor_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vor_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i32m8_mu( @@ -2703,7 +2703,7 @@ vint32m8_t test_vor_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vor_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vor_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m1_mu( @@ -2712,7 +2712,7 @@ vint32m8_t test_vor_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vor_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m1_mu( @@ -2721,7 +2721,7 @@ vint64m1_t test_vor_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vor_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m2_mu( @@ -2730,7 +2730,7 @@ vint64m1_t test_vor_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vor_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m2_mu( @@ -2739,7 +2739,7 @@ vint64m2_t test_vor_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vor_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m4_mu( @@ -2748,7 +2748,7 @@ vint64m2_t test_vor_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vor_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m4_mu( @@ -2757,7 +2757,7 @@ vint64m4_t test_vor_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vor_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_i64m8_mu( @@ -2766,7 +2766,7 @@ vint64m4_t test_vor_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vor_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_i64m8_mu( @@ -2775,7 +2775,7 @@ vint64m8_t test_vor_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vor_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vor_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf8_mu( @@ -2784,7 +2784,7 @@ vint64m8_t test_vor_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vor_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf8_mu( @@ -2793,7 +2793,7 @@ vuint8mf8_t test_vor_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vor_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf4_mu( @@ -2802,7 +2802,7 @@ vuint8mf8_t test_vor_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vor_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf4_mu( @@ -2811,7 +2811,7 @@ vuint8mf4_t test_vor_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vor_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8mf2_mu( @@ -2820,7 +2820,7 @@ vuint8mf4_t test_vor_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vor_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8mf2_mu( @@ -2829,7 +2829,7 @@ vuint8mf2_t test_vor_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vor_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m1_mu( @@ -2838,7 +2838,7 @@ vuint8mf2_t test_vor_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vor_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m1_mu( @@ -2847,7 +2847,7 @@ vuint8m1_t test_vor_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vor_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m2_mu( @@ -2856,7 +2856,7 @@ vuint8m1_t test_vor_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vor_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m2_mu( @@ -2865,7 +2865,7 @@ vuint8m2_t test_vor_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vor_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m4_mu( @@ -2874,7 +2874,7 @@ vuint8m2_t test_vor_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vor_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m4_mu( @@ -2883,7 +2883,7 @@ vuint8m4_t test_vor_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vor_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u8m8_mu( @@ -2892,7 +2892,7 @@ vuint8m4_t test_vor_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vor_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u8m8_mu( @@ -2901,7 +2901,7 @@ vuint8m8_t test_vor_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vor_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vor_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf4_mu( @@ -2910,7 +2910,7 @@ vuint8m8_t test_vor_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vor_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf4_mu( @@ -2919,7 +2919,7 @@ vuint16mf4_t test_vor_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vor_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16mf2_mu( @@ -2928,7 +2928,7 @@ vuint16mf4_t test_vor_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vor_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16mf2_mu( @@ -2937,7 +2937,7 @@ vuint16mf2_t test_vor_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vor_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m1_mu( @@ -2946,7 +2946,7 @@ vuint16mf2_t test_vor_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vor_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m1_mu( @@ -2955,7 +2955,7 @@ vuint16m1_t test_vor_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vor_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m2_mu( @@ -2964,7 +2964,7 @@ vuint16m1_t test_vor_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vor_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m2_mu( @@ -2973,7 +2973,7 @@ vuint16m2_t test_vor_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vor_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m4_mu( @@ -2982,7 +2982,7 @@ vuint16m2_t test_vor_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vor_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m4_mu( @@ -2991,7 +2991,7 @@ vuint16m4_t test_vor_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vor_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u16m8_mu( @@ -3000,7 +3000,7 @@ vuint16m4_t test_vor_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vor_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u16m8_mu( @@ -3009,7 +3009,7 @@ vuint16m8_t test_vor_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vor_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vor_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32mf2_mu( @@ -3018,7 +3018,7 @@ vuint16m8_t test_vor_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vor_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32mf2_mu( @@ -3027,7 +3027,7 @@ vuint32mf2_t test_vor_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vor_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m1_mu( @@ -3036,7 +3036,7 @@ vuint32mf2_t test_vor_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vor_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m1_mu( @@ -3045,7 +3045,7 @@ vuint32m1_t test_vor_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vor_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m2_mu( @@ -3054,7 +3054,7 @@ vuint32m1_t test_vor_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vor_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m2_mu( @@ -3063,7 +3063,7 @@ vuint32m2_t test_vor_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vor_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m4_mu( @@ -3072,7 +3072,7 @@ vuint32m2_t test_vor_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vor_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m4_mu( @@ -3081,7 +3081,7 @@ vuint32m4_t test_vor_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vor_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u32m8_mu( @@ -3090,7 +3090,7 @@ vuint32m4_t test_vor_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vor_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u32m8_mu( @@ -3099,7 +3099,7 @@ vuint32m8_t test_vor_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vor_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vor_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m1_mu( @@ -3108,7 +3108,7 @@ vuint32m8_t test_vor_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vor_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m1_mu( @@ -3117,7 +3117,7 @@ vuint64m1_t test_vor_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vor_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m2_mu( @@ -3126,7 +3126,7 @@ vuint64m1_t test_vor_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vor_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m2_mu( @@ -3135,7 +3135,7 @@ vuint64m2_t test_vor_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vor_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m4_mu( @@ -3144,7 +3144,7 @@ vuint64m2_t test_vor_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vor_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m4_mu( @@ -3153,7 +3153,7 @@ vuint64m4_t test_vor_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vor_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vv_u64m8_mu( @@ -3162,7 +3162,7 @@ vuint64m4_t test_vor_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vor_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vor_vx_u64m8_mu( @@ -3171,6 +3171,6 @@ vuint64m8_t test_vor_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vor_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vor_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vor_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredand.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredand.c index 85ddc2d592e7a8403ee976a0ceba97aaba5acd3b..79e9dcafecf25dd37f168c6b3cf7abd07bb22e2c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredand.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredand.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf4_i8m1_tu( @@ -21,7 +21,7 @@ vint8m1_t test_vredand_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf2_i8m1_tu( @@ -30,7 +30,7 @@ vint8m1_t test_vredand_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m1_i8m1_tu( @@ -39,7 +39,7 @@ vint8m1_t test_vredand_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m2_i8m1_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vredand_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m4_i8m1_tu( @@ -57,7 +57,7 @@ vint8m1_t test_vredand_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m8_i8m1_tu( @@ -66,7 +66,7 @@ vint8m1_t test_vredand_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16mf4_i16m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vredand_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16mf2_i16m1_tu( @@ -84,7 +84,7 @@ vint16m1_t test_vredand_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m1_i16m1_tu( @@ -93,7 +93,7 @@ vint16m1_t test_vredand_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m2_i16m1_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vredand_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m4_i16m1_tu( @@ -111,7 +111,7 @@ vint16m1_t test_vredand_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m8_i16m1_tu( @@ -120,7 +120,7 @@ vint16m1_t test_vredand_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32mf2_i32m1_tu( @@ -129,7 +129,7 @@ vint16m1_t test_vredand_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m1_i32m1_tu( @@ -138,7 +138,7 @@ vint32m1_t test_vredand_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m2_i32m1_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vredand_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m4_i32m1_tu( @@ -156,7 +156,7 @@ vint32m1_t test_vredand_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m8_i32m1_tu( @@ -165,7 +165,7 @@ vint32m1_t test_vredand_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m1_i64m1_tu( @@ -174,7 +174,7 @@ vint32m1_t test_vredand_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m2_i64m1_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vredand_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m4_i64m1_tu( @@ -192,7 +192,7 @@ vint64m1_t test_vredand_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m8_i64m1_tu( @@ -201,7 +201,7 @@ vint64m1_t test_vredand_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf8_u8m1_tu( @@ -210,7 +210,7 @@ vint64m1_t test_vredand_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf4_u8m1_tu( @@ -219,7 +219,7 @@ vuint8m1_t test_vredand_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf2_u8m1_tu( @@ -228,7 +228,7 @@ vuint8m1_t test_vredand_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m1_u8m1_tu( @@ -237,7 +237,7 @@ vuint8m1_t test_vredand_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m2_u8m1_tu( @@ -246,7 +246,7 @@ vuint8m1_t test_vredand_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m4_u8m1_tu( @@ -255,7 +255,7 @@ vuint8m1_t test_vredand_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m8_u8m1_tu( @@ -264,7 +264,7 @@ vuint8m1_t test_vredand_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16mf4_u16m1_tu( @@ -273,7 +273,7 @@ vuint8m1_t test_vredand_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16mf2_u16m1_tu( @@ -282,7 +282,7 @@ vuint16m1_t test_vredand_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m1_u16m1_tu( @@ -291,7 +291,7 @@ vuint16m1_t test_vredand_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m2_u16m1_tu( @@ -300,7 +300,7 @@ vuint16m1_t test_vredand_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m4_u16m1_tu( @@ -309,7 +309,7 @@ vuint16m1_t test_vredand_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m8_u16m1_tu( @@ -318,7 +318,7 @@ vuint16m1_t test_vredand_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32mf2_u32m1_tu( @@ -327,7 +327,7 @@ vuint16m1_t test_vredand_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m1_u32m1_tu( @@ -336,7 +336,7 @@ vuint32m1_t test_vredand_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m2_u32m1_tu( @@ -345,7 +345,7 @@ vuint32m1_t test_vredand_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m4_u32m1_tu( @@ -354,7 +354,7 @@ vuint32m1_t test_vredand_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m8_u32m1_tu( @@ -363,7 +363,7 @@ vuint32m1_t test_vredand_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m1_u64m1_tu( @@ -372,7 +372,7 @@ vuint32m1_t test_vredand_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m2_u64m1_tu( @@ -381,7 +381,7 @@ vuint64m1_t test_vredand_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m4_u64m1_tu( @@ -390,7 +390,7 @@ vuint64m1_t test_vredand_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m8_u64m1_tu( @@ -399,7 +399,7 @@ vuint64m1_t test_vredand_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf8_i8m1_tum( @@ -408,7 +408,7 @@ vuint64m1_t test_vredand_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf4_i8m1_tum( @@ -417,7 +417,7 @@ vint8m1_t test_vredand_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8mf2_i8m1_tum( @@ -426,7 +426,7 @@ vint8m1_t test_vredand_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m1_i8m1_tum( @@ -435,7 +435,7 @@ vint8m1_t test_vredand_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m2_i8m1_tum( @@ -444,7 +444,7 @@ vint8m1_t test_vredand_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m4_i8m1_tum( @@ -453,7 +453,7 @@ vint8m1_t test_vredand_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i8m8_i8m1_tum( @@ -462,7 +462,7 @@ vint8m1_t test_vredand_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredand_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredand_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16mf4_i16m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vredand_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16mf2_i16m1_tum( @@ -480,7 +480,7 @@ vint16m1_t test_vredand_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m1_i16m1_tum( @@ -489,7 +489,7 @@ vint16m1_t test_vredand_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m2_i16m1_tum( @@ -498,7 +498,7 @@ vint16m1_t test_vredand_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m4_i16m1_tum( @@ -507,7 +507,7 @@ vint16m1_t test_vredand_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i16m8_i16m1_tum( @@ -516,7 +516,7 @@ vint16m1_t test_vredand_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredand_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredand_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32mf2_i32m1_tum( @@ -525,7 +525,7 @@ vint16m1_t test_vredand_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m1_i32m1_tum( @@ -534,7 +534,7 @@ vint32m1_t test_vredand_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m2_i32m1_tum( @@ -543,7 +543,7 @@ vint32m1_t test_vredand_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m4_i32m1_tum( @@ -552,7 +552,7 @@ vint32m1_t test_vredand_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i32m8_i32m1_tum( @@ -561,7 +561,7 @@ vint32m1_t test_vredand_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredand_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredand_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m1_i64m1_tum( @@ -570,7 +570,7 @@ vint32m1_t test_vredand_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m2_i64m1_tum( @@ -579,7 +579,7 @@ vint64m1_t test_vredand_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m4_i64m1_tum( @@ -588,7 +588,7 @@ vint64m1_t test_vredand_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_i64m8_i64m1_tum( @@ -597,7 +597,7 @@ vint64m1_t test_vredand_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredand_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredand_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf8_u8m1_tum( @@ -606,7 +606,7 @@ vint64m1_t test_vredand_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf4_u8m1_tum( @@ -615,7 +615,7 @@ vuint8m1_t test_vredand_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8mf2_u8m1_tum( @@ -624,7 +624,7 @@ vuint8m1_t test_vredand_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m1_u8m1_tum( @@ -633,7 +633,7 @@ vuint8m1_t test_vredand_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m2_u8m1_tum( @@ -642,7 +642,7 @@ vuint8m1_t test_vredand_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m4_u8m1_tum( @@ -651,7 +651,7 @@ vuint8m1_t test_vredand_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u8m8_u8m1_tum( @@ -660,7 +660,7 @@ vuint8m1_t test_vredand_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredand_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredand_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16mf4_u16m1_tum( @@ -669,7 +669,7 @@ vuint8m1_t test_vredand_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16mf2_u16m1_tum( @@ -678,7 +678,7 @@ vuint16m1_t test_vredand_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m1_u16m1_tum( @@ -687,7 +687,7 @@ vuint16m1_t test_vredand_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m2_u16m1_tum( @@ -696,7 +696,7 @@ vuint16m1_t test_vredand_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m4_u16m1_tum( @@ -705,7 +705,7 @@ vuint16m1_t test_vredand_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u16m8_u16m1_tum( @@ -714,7 +714,7 @@ vuint16m1_t test_vredand_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredand_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredand_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32mf2_u32m1_tum( @@ -723,7 +723,7 @@ vuint16m1_t test_vredand_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m1_u32m1_tum( @@ -732,7 +732,7 @@ vuint32m1_t test_vredand_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m2_u32m1_tum( @@ -741,7 +741,7 @@ vuint32m1_t test_vredand_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m4_u32m1_tum( @@ -750,7 +750,7 @@ vuint32m1_t test_vredand_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u32m8_u32m1_tum( @@ -759,7 +759,7 @@ vuint32m1_t test_vredand_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredand_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredand_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m1_u64m1_tum( @@ -768,7 +768,7 @@ vuint32m1_t test_vredand_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m2_u64m1_tum( @@ -777,7 +777,7 @@ vuint64m1_t test_vredand_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m4_u64m1_tum( @@ -786,7 +786,7 @@ vuint64m1_t test_vredand_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredand_vs_u64m8_u64m1_tum( @@ -795,6 +795,6 @@ vuint64m1_t test_vredand_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredand_vs_u64m8_u64m1_tum(vbool8_t mask, vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredand_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredand_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmax.c index eda79cacb68715d2dfcbffefde85204e83762591..72e2c7bb83f13f1116fff3f7ac59d7145447b744 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmax.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmax.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf4_i8m1_tu( @@ -21,7 +21,7 @@ vint8m1_t test_vredmax_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf2_i8m1_tu( @@ -30,7 +30,7 @@ vint8m1_t test_vredmax_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m1_i8m1_tu( @@ -39,7 +39,7 @@ vint8m1_t test_vredmax_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m2_i8m1_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vredmax_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m4_i8m1_tu( @@ -57,7 +57,7 @@ vint8m1_t test_vredmax_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m8_i8m1_tu( @@ -66,7 +66,7 @@ vint8m1_t test_vredmax_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16mf4_i16m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vredmax_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16mf2_i16m1_tu( @@ -84,7 +84,7 @@ vint16m1_t test_vredmax_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m1_i16m1_tu( @@ -93,7 +93,7 @@ vint16m1_t test_vredmax_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m2_i16m1_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vredmax_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m4_i16m1_tu( @@ -111,7 +111,7 @@ vint16m1_t test_vredmax_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m8_i16m1_tu( @@ -120,7 +120,7 @@ vint16m1_t test_vredmax_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32mf2_i32m1_tu( @@ -129,7 +129,7 @@ vint16m1_t test_vredmax_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m1_i32m1_tu( @@ -138,7 +138,7 @@ vint32m1_t test_vredmax_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m2_i32m1_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vredmax_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m4_i32m1_tu( @@ -156,7 +156,7 @@ vint32m1_t test_vredmax_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m8_i32m1_tu( @@ -165,7 +165,7 @@ vint32m1_t test_vredmax_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m1_i64m1_tu( @@ -174,7 +174,7 @@ vint32m1_t test_vredmax_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m2_i64m1_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vredmax_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m4_i64m1_tu( @@ -192,7 +192,7 @@ vint64m1_t test_vredmax_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m8_i64m1_tu( @@ -201,7 +201,7 @@ vint64m1_t test_vredmax_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf8_i8m1_tum( @@ -210,7 +210,7 @@ vint64m1_t test_vredmax_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf4_i8m1_tum( @@ -219,7 +219,7 @@ vint8m1_t test_vredmax_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8mf2_i8m1_tum( @@ -228,7 +228,7 @@ vint8m1_t test_vredmax_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m1_i8m1_tum( @@ -237,7 +237,7 @@ vint8m1_t test_vredmax_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m2_i8m1_tum( @@ -246,7 +246,7 @@ vint8m1_t test_vredmax_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m4_i8m1_tum( @@ -255,7 +255,7 @@ vint8m1_t test_vredmax_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i8m8_i8m1_tum( @@ -264,7 +264,7 @@ vint8m1_t test_vredmax_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmax_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredmax_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16mf4_i16m1_tum( @@ -273,7 +273,7 @@ vint8m1_t test_vredmax_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16mf2_i16m1_tum( @@ -282,7 +282,7 @@ vint16m1_t test_vredmax_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m1_i16m1_tum( @@ -291,7 +291,7 @@ vint16m1_t test_vredmax_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m2_i16m1_tum( @@ -300,7 +300,7 @@ vint16m1_t test_vredmax_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m4_i16m1_tum( @@ -309,7 +309,7 @@ vint16m1_t test_vredmax_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i16m8_i16m1_tum( @@ -318,7 +318,7 @@ vint16m1_t test_vredmax_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmax_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredmax_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32mf2_i32m1_tum( @@ -327,7 +327,7 @@ vint16m1_t test_vredmax_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m1_i32m1_tum( @@ -336,7 +336,7 @@ vint32m1_t test_vredmax_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m2_i32m1_tum( @@ -345,7 +345,7 @@ vint32m1_t test_vredmax_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m4_i32m1_tum( @@ -354,7 +354,7 @@ vint32m1_t test_vredmax_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i32m8_i32m1_tum( @@ -363,7 +363,7 @@ vint32m1_t test_vredmax_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmax_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredmax_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m1_i64m1_tum( @@ -372,7 +372,7 @@ vint32m1_t test_vredmax_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m2_i64m1_tum( @@ -381,7 +381,7 @@ vint64m1_t test_vredmax_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m4_i64m1_tum( @@ -390,7 +390,7 @@ vint64m1_t test_vredmax_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmax_vs_i64m8_i64m1_tum( @@ -399,6 +399,6 @@ vint64m1_t test_vredmax_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmax_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredmax_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmax_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmaxu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmaxu.c index fe03c7e0ee7ca09b42aaf198e7c071f036a59f9f..9982d04b4e72e2840e66e2926c9926157ed939cc 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmaxu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmaxu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf4_u8m1_tu( @@ -21,7 +21,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf2_u8m1_tu( @@ -30,7 +30,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m1_u8m1_tu( @@ -39,7 +39,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m2_u8m1_tu( @@ -48,7 +48,7 @@ vuint8m1_t test_vredmaxu_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m4_u8m1_tu( @@ -57,7 +57,7 @@ vuint8m1_t test_vredmaxu_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m8_u8m1_tu( @@ -66,7 +66,7 @@ vuint8m1_t test_vredmaxu_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16mf4_u16m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vredmaxu_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16mf2_u16m1_tu( @@ -84,7 +84,7 @@ vuint16m1_t test_vredmaxu_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m1_u16m1_tu( @@ -93,7 +93,7 @@ vuint16m1_t test_vredmaxu_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m2_u16m1_tu( @@ -102,7 +102,7 @@ vuint16m1_t test_vredmaxu_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m4_u16m1_tu( @@ -111,7 +111,7 @@ vuint16m1_t test_vredmaxu_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m8_u16m1_tu( @@ -120,7 +120,7 @@ vuint16m1_t test_vredmaxu_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32mf2_u32m1_tu( @@ -129,7 +129,7 @@ vuint16m1_t test_vredmaxu_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m1_u32m1_tu( @@ -138,7 +138,7 @@ vuint32m1_t test_vredmaxu_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m2_u32m1_tu( @@ -147,7 +147,7 @@ vuint32m1_t test_vredmaxu_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m4_u32m1_tu( @@ -156,7 +156,7 @@ vuint32m1_t test_vredmaxu_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m8_u32m1_tu( @@ -165,7 +165,7 @@ vuint32m1_t test_vredmaxu_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m1_u64m1_tu( @@ -174,7 +174,7 @@ vuint32m1_t test_vredmaxu_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m2_u64m1_tu( @@ -183,7 +183,7 @@ vuint64m1_t test_vredmaxu_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m4_u64m1_tu( @@ -192,7 +192,7 @@ vuint64m1_t test_vredmaxu_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m8_u64m1_tu( @@ -201,7 +201,7 @@ vuint64m1_t test_vredmaxu_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf8_u8m1_tum( @@ -210,7 +210,7 @@ vuint64m1_t test_vredmaxu_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf4_u8m1_tum( @@ -219,7 +219,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8mf2_u8m1_tum( @@ -228,7 +228,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m1_u8m1_tum( @@ -237,7 +237,7 @@ vuint8m1_t test_vredmaxu_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m2_u8m1_tum( @@ -246,7 +246,7 @@ vuint8m1_t test_vredmaxu_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m4_u8m1_tum( @@ -255,7 +255,7 @@ vuint8m1_t test_vredmaxu_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u8m8_u8m1_tum( @@ -264,7 +264,7 @@ vuint8m1_t test_vredmaxu_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredmaxu_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredmaxu_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16mf4_u16m1_tum( @@ -273,7 +273,7 @@ vuint8m1_t test_vredmaxu_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16mf2_u16m1_tum( @@ -282,7 +282,7 @@ vuint16m1_t test_vredmaxu_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m1_u16m1_tum( @@ -291,7 +291,7 @@ vuint16m1_t test_vredmaxu_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m2_u16m1_tum( @@ -300,7 +300,7 @@ vuint16m1_t test_vredmaxu_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m4_u16m1_tum( @@ -309,7 +309,7 @@ vuint16m1_t test_vredmaxu_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u16m8_u16m1_tum( @@ -318,7 +318,7 @@ vuint16m1_t test_vredmaxu_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredmaxu_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredmaxu_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32mf2_u32m1_tum( @@ -327,7 +327,7 @@ vuint16m1_t test_vredmaxu_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m1_u32m1_tum( @@ -336,7 +336,7 @@ vuint32m1_t test_vredmaxu_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m2_u32m1_tum( @@ -345,7 +345,7 @@ vuint32m1_t test_vredmaxu_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m4_u32m1_tum( @@ -354,7 +354,7 @@ vuint32m1_t test_vredmaxu_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u32m8_u32m1_tum( @@ -363,7 +363,7 @@ vuint32m1_t test_vredmaxu_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredmaxu_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredmaxu_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m1_u64m1_tum( @@ -372,7 +372,7 @@ vuint32m1_t test_vredmaxu_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m2_u64m1_tum( @@ -381,7 +381,7 @@ vuint64m1_t test_vredmaxu_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m4_u64m1_tum( @@ -390,7 +390,7 @@ vuint64m1_t test_vredmaxu_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmaxu_vs_u64m8_u64m1_tum( @@ -399,6 +399,6 @@ vuint64m1_t test_vredmaxu_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredmaxu_vs_u64m8_u64m1_tum(vbool8_t mask, vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredmaxu_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmaxu_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmin.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmin.c index 0bc59a9b5c5bb7f1335f665ca5103709dd0d1d0a..875d422f5b20ab0142244e91f0da3c756ebc06a3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmin.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredmin.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf4_i8m1_tu( @@ -21,7 +21,7 @@ vint8m1_t test_vredmin_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf2_i8m1_tu( @@ -30,7 +30,7 @@ vint8m1_t test_vredmin_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m1_i8m1_tu( @@ -39,7 +39,7 @@ vint8m1_t test_vredmin_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m2_i8m1_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vredmin_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m4_i8m1_tu( @@ -57,7 +57,7 @@ vint8m1_t test_vredmin_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m8_i8m1_tu( @@ -66,7 +66,7 @@ vint8m1_t test_vredmin_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16mf4_i16m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vredmin_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16mf2_i16m1_tu( @@ -84,7 +84,7 @@ vint16m1_t test_vredmin_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m1_i16m1_tu( @@ -93,7 +93,7 @@ vint16m1_t test_vredmin_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m2_i16m1_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vredmin_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m4_i16m1_tu( @@ -111,7 +111,7 @@ vint16m1_t test_vredmin_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m8_i16m1_tu( @@ -120,7 +120,7 @@ vint16m1_t test_vredmin_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32mf2_i32m1_tu( @@ -129,7 +129,7 @@ vint16m1_t test_vredmin_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m1_i32m1_tu( @@ -138,7 +138,7 @@ vint32m1_t test_vredmin_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m2_i32m1_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vredmin_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m4_i32m1_tu( @@ -156,7 +156,7 @@ vint32m1_t test_vredmin_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m8_i32m1_tu( @@ -165,7 +165,7 @@ vint32m1_t test_vredmin_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m1_i64m1_tu( @@ -174,7 +174,7 @@ vint32m1_t test_vredmin_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m2_i64m1_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vredmin_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m4_i64m1_tu( @@ -192,7 +192,7 @@ vint64m1_t test_vredmin_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m8_i64m1_tu( @@ -201,7 +201,7 @@ vint64m1_t test_vredmin_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf8_i8m1_tum( @@ -210,7 +210,7 @@ vint64m1_t test_vredmin_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf4_i8m1_tum( @@ -219,7 +219,7 @@ vint8m1_t test_vredmin_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8mf2_i8m1_tum( @@ -228,7 +228,7 @@ vint8m1_t test_vredmin_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m1_i8m1_tum( @@ -237,7 +237,7 @@ vint8m1_t test_vredmin_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m2_i8m1_tum( @@ -246,7 +246,7 @@ vint8m1_t test_vredmin_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m4_i8m1_tum( @@ -255,7 +255,7 @@ vint8m1_t test_vredmin_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i8m8_i8m1_tum( @@ -264,7 +264,7 @@ vint8m1_t test_vredmin_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredmin_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredmin_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16mf4_i16m1_tum( @@ -273,7 +273,7 @@ vint8m1_t test_vredmin_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16mf2_i16m1_tum( @@ -282,7 +282,7 @@ vint16m1_t test_vredmin_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m1_i16m1_tum( @@ -291,7 +291,7 @@ vint16m1_t test_vredmin_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m2_i16m1_tum( @@ -300,7 +300,7 @@ vint16m1_t test_vredmin_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m4_i16m1_tum( @@ -309,7 +309,7 @@ vint16m1_t test_vredmin_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i16m8_i16m1_tum( @@ -318,7 +318,7 @@ vint16m1_t test_vredmin_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredmin_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredmin_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32mf2_i32m1_tum( @@ -327,7 +327,7 @@ vint16m1_t test_vredmin_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m1_i32m1_tum( @@ -336,7 +336,7 @@ vint32m1_t test_vredmin_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m2_i32m1_tum( @@ -345,7 +345,7 @@ vint32m1_t test_vredmin_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m4_i32m1_tum( @@ -354,7 +354,7 @@ vint32m1_t test_vredmin_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i32m8_i32m1_tum( @@ -363,7 +363,7 @@ vint32m1_t test_vredmin_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredmin_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredmin_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m1_i64m1_tum( @@ -372,7 +372,7 @@ vint32m1_t test_vredmin_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m2_i64m1_tum( @@ -381,7 +381,7 @@ vint64m1_t test_vredmin_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m4_i64m1_tum( @@ -390,7 +390,7 @@ vint64m1_t test_vredmin_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredmin_vs_i64m8_i64m1_tum( @@ -399,6 +399,6 @@ vint64m1_t test_vredmin_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredmin_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredmin_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredmin_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredminu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredminu.c index 1b7f426159c70c8329bc85a3afb44919a3096ed2..d4b4e348a8587596893764353eff79113ebb0533 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredminu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredminu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf4_u8m1_tu( @@ -21,7 +21,7 @@ vuint8m1_t test_vredminu_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf2_u8m1_tu( @@ -30,7 +30,7 @@ vuint8m1_t test_vredminu_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m1_u8m1_tu( @@ -39,7 +39,7 @@ vuint8m1_t test_vredminu_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m2_u8m1_tu( @@ -48,7 +48,7 @@ vuint8m1_t test_vredminu_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m4_u8m1_tu( @@ -57,7 +57,7 @@ vuint8m1_t test_vredminu_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m8_u8m1_tu( @@ -66,7 +66,7 @@ vuint8m1_t test_vredminu_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16mf4_u16m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vredminu_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16mf2_u16m1_tu( @@ -84,7 +84,7 @@ vuint16m1_t test_vredminu_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m1_u16m1_tu( @@ -93,7 +93,7 @@ vuint16m1_t test_vredminu_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m2_u16m1_tu( @@ -102,7 +102,7 @@ vuint16m1_t test_vredminu_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m4_u16m1_tu( @@ -111,7 +111,7 @@ vuint16m1_t test_vredminu_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m8_u16m1_tu( @@ -120,7 +120,7 @@ vuint16m1_t test_vredminu_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32mf2_u32m1_tu( @@ -129,7 +129,7 @@ vuint16m1_t test_vredminu_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m1_u32m1_tu( @@ -138,7 +138,7 @@ vuint32m1_t test_vredminu_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m2_u32m1_tu( @@ -147,7 +147,7 @@ vuint32m1_t test_vredminu_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m4_u32m1_tu( @@ -156,7 +156,7 @@ vuint32m1_t test_vredminu_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m8_u32m1_tu( @@ -165,7 +165,7 @@ vuint32m1_t test_vredminu_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m1_u64m1_tu( @@ -174,7 +174,7 @@ vuint32m1_t test_vredminu_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m2_u64m1_tu( @@ -183,7 +183,7 @@ vuint64m1_t test_vredminu_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m4_u64m1_tu( @@ -192,7 +192,7 @@ vuint64m1_t test_vredminu_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m8_u64m1_tu( @@ -201,7 +201,7 @@ vuint64m1_t test_vredminu_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf8_u8m1_tum( @@ -210,7 +210,7 @@ vuint64m1_t test_vredminu_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf4_u8m1_tum( @@ -219,7 +219,7 @@ vuint8m1_t test_vredminu_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8mf2_u8m1_tum( @@ -228,7 +228,7 @@ vuint8m1_t test_vredminu_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m1_u8m1_tum( @@ -237,7 +237,7 @@ vuint8m1_t test_vredminu_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m2_u8m1_tum( @@ -246,7 +246,7 @@ vuint8m1_t test_vredminu_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m4_u8m1_tum( @@ -255,7 +255,7 @@ vuint8m1_t test_vredminu_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u8m8_u8m1_tum( @@ -264,7 +264,7 @@ vuint8m1_t test_vredminu_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredminu_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredminu_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16mf4_u16m1_tum( @@ -273,7 +273,7 @@ vuint8m1_t test_vredminu_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16mf2_u16m1_tum( @@ -282,7 +282,7 @@ vuint16m1_t test_vredminu_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m1_u16m1_tum( @@ -291,7 +291,7 @@ vuint16m1_t test_vredminu_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m2_u16m1_tum( @@ -300,7 +300,7 @@ vuint16m1_t test_vredminu_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m4_u16m1_tum( @@ -309,7 +309,7 @@ vuint16m1_t test_vredminu_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u16m8_u16m1_tum( @@ -318,7 +318,7 @@ vuint16m1_t test_vredminu_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredminu_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredminu_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32mf2_u32m1_tum( @@ -327,7 +327,7 @@ vuint16m1_t test_vredminu_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m1_u32m1_tum( @@ -336,7 +336,7 @@ vuint32m1_t test_vredminu_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m2_u32m1_tum( @@ -345,7 +345,7 @@ vuint32m1_t test_vredminu_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m4_u32m1_tum( @@ -354,7 +354,7 @@ vuint32m1_t test_vredminu_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u32m8_u32m1_tum( @@ -363,7 +363,7 @@ vuint32m1_t test_vredminu_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredminu_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredminu_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m1_u64m1_tum( @@ -372,7 +372,7 @@ vuint32m1_t test_vredminu_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m2_u64m1_tum( @@ -381,7 +381,7 @@ vuint64m1_t test_vredminu_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m4_u64m1_tum( @@ -390,7 +390,7 @@ vuint64m1_t test_vredminu_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredminu_vs_u64m8_u64m1_tum( @@ -399,6 +399,6 @@ vuint64m1_t test_vredminu_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredminu_vs_u64m8_u64m1_tum(vbool8_t mask, vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredminu_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredminu_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredor.c index 9358f4dbc66937f63950c9b9a0ed203d08c04ef5..fa88d7e1558b984ca32387b0f30258c10c654ef7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf4_i8m1_tu( @@ -21,7 +21,7 @@ vint8m1_t test_vredor_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf2_i8m1_tu( @@ -30,7 +30,7 @@ vint8m1_t test_vredor_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m1_i8m1_tu( @@ -39,7 +39,7 @@ vint8m1_t test_vredor_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m2_i8m1_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vredor_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m4_i8m1_tu( @@ -57,7 +57,7 @@ vint8m1_t test_vredor_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m8_i8m1_tu( @@ -66,7 +66,7 @@ vint8m1_t test_vredor_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16mf4_i16m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vredor_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16mf2_i16m1_tu( @@ -84,7 +84,7 @@ vint16m1_t test_vredor_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m1_i16m1_tu( @@ -93,7 +93,7 @@ vint16m1_t test_vredor_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m2_i16m1_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vredor_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m4_i16m1_tu( @@ -111,7 +111,7 @@ vint16m1_t test_vredor_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m8_i16m1_tu( @@ -120,7 +120,7 @@ vint16m1_t test_vredor_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32mf2_i32m1_tu( @@ -129,7 +129,7 @@ vint16m1_t test_vredor_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m1_i32m1_tu( @@ -138,7 +138,7 @@ vint32m1_t test_vredor_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m2_i32m1_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vredor_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m4_i32m1_tu( @@ -156,7 +156,7 @@ vint32m1_t test_vredor_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m8_i32m1_tu( @@ -165,7 +165,7 @@ vint32m1_t test_vredor_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m1_i64m1_tu( @@ -174,7 +174,7 @@ vint32m1_t test_vredor_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m2_i64m1_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vredor_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m4_i64m1_tu( @@ -192,7 +192,7 @@ vint64m1_t test_vredor_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m8_i64m1_tu( @@ -201,7 +201,7 @@ vint64m1_t test_vredor_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf8_u8m1_tu( @@ -210,7 +210,7 @@ vint64m1_t test_vredor_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf4_u8m1_tu( @@ -219,7 +219,7 @@ vuint8m1_t test_vredor_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf2_u8m1_tu( @@ -228,7 +228,7 @@ vuint8m1_t test_vredor_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m1_u8m1_tu( @@ -237,7 +237,7 @@ vuint8m1_t test_vredor_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m2_u8m1_tu( @@ -246,7 +246,7 @@ vuint8m1_t test_vredor_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m4_u8m1_tu( @@ -255,7 +255,7 @@ vuint8m1_t test_vredor_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m8_u8m1_tu( @@ -264,7 +264,7 @@ vuint8m1_t test_vredor_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16mf4_u16m1_tu( @@ -273,7 +273,7 @@ vuint8m1_t test_vredor_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16mf2_u16m1_tu( @@ -282,7 +282,7 @@ vuint16m1_t test_vredor_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m1_u16m1_tu( @@ -291,7 +291,7 @@ vuint16m1_t test_vredor_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m2_u16m1_tu( @@ -300,7 +300,7 @@ vuint16m1_t test_vredor_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m4_u16m1_tu( @@ -309,7 +309,7 @@ vuint16m1_t test_vredor_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m8_u16m1_tu( @@ -318,7 +318,7 @@ vuint16m1_t test_vredor_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32mf2_u32m1_tu( @@ -327,7 +327,7 @@ vuint16m1_t test_vredor_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m1_u32m1_tu( @@ -336,7 +336,7 @@ vuint32m1_t test_vredor_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m2_u32m1_tu( @@ -345,7 +345,7 @@ vuint32m1_t test_vredor_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m4_u32m1_tu( @@ -354,7 +354,7 @@ vuint32m1_t test_vredor_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m8_u32m1_tu( @@ -363,7 +363,7 @@ vuint32m1_t test_vredor_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m1_u64m1_tu( @@ -372,7 +372,7 @@ vuint32m1_t test_vredor_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m2_u64m1_tu( @@ -381,7 +381,7 @@ vuint64m1_t test_vredor_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m4_u64m1_tu( @@ -390,7 +390,7 @@ vuint64m1_t test_vredor_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m8_u64m1_tu( @@ -399,7 +399,7 @@ vuint64m1_t test_vredor_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf8_i8m1_tum( @@ -408,7 +408,7 @@ vuint64m1_t test_vredor_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf4_i8m1_tum( @@ -417,7 +417,7 @@ vint8m1_t test_vredor_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8mf2_i8m1_tum( @@ -426,7 +426,7 @@ vint8m1_t test_vredor_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m1_i8m1_tum( @@ -435,7 +435,7 @@ vint8m1_t test_vredor_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m2_i8m1_tum( @@ -444,7 +444,7 @@ vint8m1_t test_vredor_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m4_i8m1_tum( @@ -453,7 +453,7 @@ vint8m1_t test_vredor_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i8m8_i8m1_tum( @@ -462,7 +462,7 @@ vint8m1_t test_vredor_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredor_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredor_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16mf4_i16m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vredor_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16mf2_i16m1_tum( @@ -480,7 +480,7 @@ vint16m1_t test_vredor_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m1_i16m1_tum( @@ -489,7 +489,7 @@ vint16m1_t test_vredor_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m2_i16m1_tum( @@ -498,7 +498,7 @@ vint16m1_t test_vredor_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m4_i16m1_tum( @@ -507,7 +507,7 @@ vint16m1_t test_vredor_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i16m8_i16m1_tum( @@ -516,7 +516,7 @@ vint16m1_t test_vredor_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredor_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredor_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32mf2_i32m1_tum( @@ -525,7 +525,7 @@ vint16m1_t test_vredor_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m1_i32m1_tum( @@ -534,7 +534,7 @@ vint32m1_t test_vredor_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m2_i32m1_tum( @@ -543,7 +543,7 @@ vint32m1_t test_vredor_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m4_i32m1_tum( @@ -552,7 +552,7 @@ vint32m1_t test_vredor_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i32m8_i32m1_tum( @@ -561,7 +561,7 @@ vint32m1_t test_vredor_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredor_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredor_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m1_i64m1_tum( @@ -570,7 +570,7 @@ vint32m1_t test_vredor_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m2_i64m1_tum( @@ -579,7 +579,7 @@ vint64m1_t test_vredor_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m4_i64m1_tum( @@ -588,7 +588,7 @@ vint64m1_t test_vredor_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_i64m8_i64m1_tum( @@ -597,7 +597,7 @@ vint64m1_t test_vredor_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredor_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredor_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf8_u8m1_tum( @@ -606,7 +606,7 @@ vint64m1_t test_vredor_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf4_u8m1_tum( @@ -615,7 +615,7 @@ vuint8m1_t test_vredor_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8mf2_u8m1_tum( @@ -624,7 +624,7 @@ vuint8m1_t test_vredor_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m1_u8m1_tum( @@ -633,7 +633,7 @@ vuint8m1_t test_vredor_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m2_u8m1_tum( @@ -642,7 +642,7 @@ vuint8m1_t test_vredor_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m4_u8m1_tum( @@ -651,7 +651,7 @@ vuint8m1_t test_vredor_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u8m8_u8m1_tum( @@ -660,7 +660,7 @@ vuint8m1_t test_vredor_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredor_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredor_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16mf4_u16m1_tum( @@ -669,7 +669,7 @@ vuint8m1_t test_vredor_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16mf2_u16m1_tum( @@ -678,7 +678,7 @@ vuint16m1_t test_vredor_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m1_u16m1_tum( @@ -687,7 +687,7 @@ vuint16m1_t test_vredor_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m2_u16m1_tum( @@ -696,7 +696,7 @@ vuint16m1_t test_vredor_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m4_u16m1_tum( @@ -705,7 +705,7 @@ vuint16m1_t test_vredor_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u16m8_u16m1_tum( @@ -714,7 +714,7 @@ vuint16m1_t test_vredor_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredor_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredor_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32mf2_u32m1_tum( @@ -723,7 +723,7 @@ vuint16m1_t test_vredor_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m1_u32m1_tum( @@ -732,7 +732,7 @@ vuint32m1_t test_vredor_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m2_u32m1_tum( @@ -741,7 +741,7 @@ vuint32m1_t test_vredor_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m4_u32m1_tum( @@ -750,7 +750,7 @@ vuint32m1_t test_vredor_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u32m8_u32m1_tum( @@ -759,7 +759,7 @@ vuint32m1_t test_vredor_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredor_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredor_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m1_u64m1_tum( @@ -768,7 +768,7 @@ vuint32m1_t test_vredor_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m2_u64m1_tum( @@ -777,7 +777,7 @@ vuint64m1_t test_vredor_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m4_u64m1_tum( @@ -786,7 +786,7 @@ vuint64m1_t test_vredor_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredor_vs_u64m8_u64m1_tum( @@ -795,6 +795,6 @@ vuint64m1_t test_vredor_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredor_vs_u64m8_u64m1_tum(vbool8_t mask, vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredor_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredor_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredsum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredsum.c index d4e60e1b92a159f64f4b182dc49a713dd21b4551..5b4c0b0518668c3b21a423a82a0472fccada0cb3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredsum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredsum.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf4_i8m1_tu( @@ -21,7 +21,7 @@ vint8m1_t test_vredsum_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf2_i8m1_tu( @@ -30,7 +30,7 @@ vint8m1_t test_vredsum_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m1_i8m1_tu( @@ -39,7 +39,7 @@ vint8m1_t test_vredsum_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m2_i8m1_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vredsum_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m4_i8m1_tu( @@ -57,7 +57,7 @@ vint8m1_t test_vredsum_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m8_i8m1_tu( @@ -66,7 +66,7 @@ vint8m1_t test_vredsum_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16mf4_i16m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vredsum_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16mf2_i16m1_tu( @@ -84,7 +84,7 @@ vint16m1_t test_vredsum_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m1_i16m1_tu( @@ -93,7 +93,7 @@ vint16m1_t test_vredsum_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m2_i16m1_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vredsum_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m4_i16m1_tu( @@ -111,7 +111,7 @@ vint16m1_t test_vredsum_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m8_i16m1_tu( @@ -120,7 +120,7 @@ vint16m1_t test_vredsum_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32mf2_i32m1_tu( @@ -129,7 +129,7 @@ vint16m1_t test_vredsum_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m1_i32m1_tu( @@ -138,7 +138,7 @@ vint32m1_t test_vredsum_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m2_i32m1_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vredsum_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m4_i32m1_tu( @@ -156,7 +156,7 @@ vint32m1_t test_vredsum_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m8_i32m1_tu( @@ -165,7 +165,7 @@ vint32m1_t test_vredsum_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m1_i64m1_tu( @@ -174,7 +174,7 @@ vint32m1_t test_vredsum_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m2_i64m1_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vredsum_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m4_i64m1_tu( @@ -192,7 +192,7 @@ vint64m1_t test_vredsum_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m8_i64m1_tu( @@ -201,7 +201,7 @@ vint64m1_t test_vredsum_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf8_u8m1_tu( @@ -210,7 +210,7 @@ vint64m1_t test_vredsum_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf4_u8m1_tu( @@ -219,7 +219,7 @@ vuint8m1_t test_vredsum_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf2_u8m1_tu( @@ -228,7 +228,7 @@ vuint8m1_t test_vredsum_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m1_u8m1_tu( @@ -237,7 +237,7 @@ vuint8m1_t test_vredsum_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m2_u8m1_tu( @@ -246,7 +246,7 @@ vuint8m1_t test_vredsum_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m4_u8m1_tu( @@ -255,7 +255,7 @@ vuint8m1_t test_vredsum_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m8_u8m1_tu( @@ -264,7 +264,7 @@ vuint8m1_t test_vredsum_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16mf4_u16m1_tu( @@ -273,7 +273,7 @@ vuint8m1_t test_vredsum_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16mf2_u16m1_tu( @@ -282,7 +282,7 @@ vuint16m1_t test_vredsum_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m1_u16m1_tu( @@ -291,7 +291,7 @@ vuint16m1_t test_vredsum_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m2_u16m1_tu( @@ -300,7 +300,7 @@ vuint16m1_t test_vredsum_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m4_u16m1_tu( @@ -309,7 +309,7 @@ vuint16m1_t test_vredsum_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m8_u16m1_tu( @@ -318,7 +318,7 @@ vuint16m1_t test_vredsum_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32mf2_u32m1_tu( @@ -327,7 +327,7 @@ vuint16m1_t test_vredsum_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m1_u32m1_tu( @@ -336,7 +336,7 @@ vuint32m1_t test_vredsum_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m2_u32m1_tu( @@ -345,7 +345,7 @@ vuint32m1_t test_vredsum_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m4_u32m1_tu( @@ -354,7 +354,7 @@ vuint32m1_t test_vredsum_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m8_u32m1_tu( @@ -363,7 +363,7 @@ vuint32m1_t test_vredsum_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m1_u64m1_tu( @@ -372,7 +372,7 @@ vuint32m1_t test_vredsum_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m2_u64m1_tu( @@ -381,7 +381,7 @@ vuint64m1_t test_vredsum_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m4_u64m1_tu( @@ -390,7 +390,7 @@ vuint64m1_t test_vredsum_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m8_u64m1_tu( @@ -399,7 +399,7 @@ vuint64m1_t test_vredsum_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf8_i8m1_tum( @@ -408,7 +408,7 @@ vuint64m1_t test_vredsum_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf4_i8m1_tum( @@ -417,7 +417,7 @@ vint8m1_t test_vredsum_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8mf2_i8m1_tum( @@ -426,7 +426,7 @@ vint8m1_t test_vredsum_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m1_i8m1_tum( @@ -435,7 +435,7 @@ vint8m1_t test_vredsum_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m2_i8m1_tum( @@ -444,7 +444,7 @@ vint8m1_t test_vredsum_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m4_i8m1_tum( @@ -453,7 +453,7 @@ vint8m1_t test_vredsum_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i8m8_i8m1_tum( @@ -462,7 +462,7 @@ vint8m1_t test_vredsum_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredsum_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredsum_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16mf4_i16m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vredsum_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16mf2_i16m1_tum( @@ -480,7 +480,7 @@ vint16m1_t test_vredsum_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m1_i16m1_tum( @@ -489,7 +489,7 @@ vint16m1_t test_vredsum_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m2_i16m1_tum( @@ -498,7 +498,7 @@ vint16m1_t test_vredsum_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m4_i16m1_tum( @@ -507,7 +507,7 @@ vint16m1_t test_vredsum_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i16m8_i16m1_tum( @@ -516,7 +516,7 @@ vint16m1_t test_vredsum_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredsum_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredsum_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32mf2_i32m1_tum( @@ -525,7 +525,7 @@ vint16m1_t test_vredsum_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m1_i32m1_tum( @@ -534,7 +534,7 @@ vint32m1_t test_vredsum_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m2_i32m1_tum( @@ -543,7 +543,7 @@ vint32m1_t test_vredsum_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m4_i32m1_tum( @@ -552,7 +552,7 @@ vint32m1_t test_vredsum_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i32m8_i32m1_tum( @@ -561,7 +561,7 @@ vint32m1_t test_vredsum_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredsum_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredsum_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m1_i64m1_tum( @@ -570,7 +570,7 @@ vint32m1_t test_vredsum_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m2_i64m1_tum( @@ -579,7 +579,7 @@ vint64m1_t test_vredsum_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m4_i64m1_tum( @@ -588,7 +588,7 @@ vint64m1_t test_vredsum_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_i64m8_i64m1_tum( @@ -597,7 +597,7 @@ vint64m1_t test_vredsum_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredsum_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredsum_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf8_u8m1_tum( @@ -606,7 +606,7 @@ vint64m1_t test_vredsum_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf4_u8m1_tum( @@ -615,7 +615,7 @@ vuint8m1_t test_vredsum_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8mf2_u8m1_tum( @@ -624,7 +624,7 @@ vuint8m1_t test_vredsum_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m1_u8m1_tum( @@ -633,7 +633,7 @@ vuint8m1_t test_vredsum_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m2_u8m1_tum( @@ -642,7 +642,7 @@ vuint8m1_t test_vredsum_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m4_u8m1_tum( @@ -651,7 +651,7 @@ vuint8m1_t test_vredsum_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u8m8_u8m1_tum( @@ -660,7 +660,7 @@ vuint8m1_t test_vredsum_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredsum_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredsum_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16mf4_u16m1_tum( @@ -669,7 +669,7 @@ vuint8m1_t test_vredsum_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16mf2_u16m1_tum( @@ -678,7 +678,7 @@ vuint16m1_t test_vredsum_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m1_u16m1_tum( @@ -687,7 +687,7 @@ vuint16m1_t test_vredsum_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m2_u16m1_tum( @@ -696,7 +696,7 @@ vuint16m1_t test_vredsum_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m4_u16m1_tum( @@ -705,7 +705,7 @@ vuint16m1_t test_vredsum_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u16m8_u16m1_tum( @@ -714,7 +714,7 @@ vuint16m1_t test_vredsum_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredsum_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredsum_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32mf2_u32m1_tum( @@ -723,7 +723,7 @@ vuint16m1_t test_vredsum_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m1_u32m1_tum( @@ -732,7 +732,7 @@ vuint32m1_t test_vredsum_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m2_u32m1_tum( @@ -741,7 +741,7 @@ vuint32m1_t test_vredsum_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m4_u32m1_tum( @@ -750,7 +750,7 @@ vuint32m1_t test_vredsum_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u32m8_u32m1_tum( @@ -759,7 +759,7 @@ vuint32m1_t test_vredsum_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredsum_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredsum_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m1_u64m1_tum( @@ -768,7 +768,7 @@ vuint32m1_t test_vredsum_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m2_u64m1_tum( @@ -777,7 +777,7 @@ vuint64m1_t test_vredsum_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m4_u64m1_tum( @@ -786,7 +786,7 @@ vuint64m1_t test_vredsum_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredsum_vs_u64m8_u64m1_tum( @@ -795,6 +795,6 @@ vuint64m1_t test_vredsum_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredsum_vs_u64m8_u64m1_tum(vbool8_t mask, vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredsum_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredsum_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredxor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredxor.c index 01ca0d115c634ce1620580ecf53c7964a1ecc86e..17cb520c35aab066b19a46222eef7d32b731c659 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredxor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vredxor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf4_i8m1_tu( @@ -21,7 +21,7 @@ vint8m1_t test_vredxor_vs_i8mf8_i8m1_tu(vint8m1_t maskedoff, vint8mf8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf2_i8m1_tu( @@ -30,7 +30,7 @@ vint8m1_t test_vredxor_vs_i8mf4_i8m1_tu(vint8m1_t maskedoff, vint8mf4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m1_i8m1_tu( @@ -39,7 +39,7 @@ vint8m1_t test_vredxor_vs_i8mf2_i8m1_tu(vint8m1_t maskedoff, vint8mf2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8m1_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m2_i8m1_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vredxor_vs_i8m1_i8m1_tu(vint8m1_t maskedoff, vint8m1_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8m2_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m4_i8m1_tu( @@ -57,7 +57,7 @@ vint8m1_t test_vredxor_vs_i8m2_i8m1_tu(vint8m1_t maskedoff, vint8m2_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8m4_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m8_i8m1_tu( @@ -66,7 +66,7 @@ vint8m1_t test_vredxor_vs_i8m4_i8m1_tu(vint8m1_t maskedoff, vint8m4_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8m8_i8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16mf4_i16m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vredxor_vs_i8m8_i8m1_tu(vint8m1_t maskedoff, vint8m8_t vector, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16mf4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16mf2_i16m1_tu( @@ -84,7 +84,7 @@ vint16m1_t test_vredxor_vs_i16mf4_i16m1_tu(vint16m1_t maskedoff, vint16mf4_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16mf2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m1_i16m1_tu( @@ -93,7 +93,7 @@ vint16m1_t test_vredxor_vs_i16mf2_i16m1_tu(vint16m1_t maskedoff, vint16mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16m1_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m2_i16m1_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vredxor_vs_i16m1_i16m1_tu(vint16m1_t maskedoff, vint16m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16m2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m4_i16m1_tu( @@ -111,7 +111,7 @@ vint16m1_t test_vredxor_vs_i16m2_i16m1_tu(vint16m1_t maskedoff, vint16m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16m4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m8_i16m1_tu( @@ -120,7 +120,7 @@ vint16m1_t test_vredxor_vs_i16m4_i16m1_tu(vint16m1_t maskedoff, vint16m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16m8_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32mf2_i32m1_tu( @@ -129,7 +129,7 @@ vint16m1_t test_vredxor_vs_i16m8_i16m1_tu(vint16m1_t maskedoff, vint16m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32mf2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m1_i32m1_tu( @@ -138,7 +138,7 @@ vint32m1_t test_vredxor_vs_i32mf2_i32m1_tu(vint32m1_t maskedoff, vint32mf2_t vec // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32m1_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m2_i32m1_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vredxor_vs_i32m1_i32m1_tu(vint32m1_t maskedoff, vint32m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32m2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m4_i32m1_tu( @@ -156,7 +156,7 @@ vint32m1_t test_vredxor_vs_i32m2_i32m1_tu(vint32m1_t maskedoff, vint32m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32m4_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m8_i32m1_tu( @@ -165,7 +165,7 @@ vint32m1_t test_vredxor_vs_i32m4_i32m1_tu(vint32m1_t maskedoff, vint32m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32m8_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m1_i64m1_tu( @@ -174,7 +174,7 @@ vint32m1_t test_vredxor_vs_i32m8_i32m1_tu(vint32m1_t maskedoff, vint32m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i64m1_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m2_i64m1_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vredxor_vs_i64m1_i64m1_tu(vint64m1_t maskedoff, vint64m1_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i64m2_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m4_i64m1_tu( @@ -192,7 +192,7 @@ vint64m1_t test_vredxor_vs_i64m2_i64m1_tu(vint64m1_t maskedoff, vint64m2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i64m4_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m8_i64m1_tu( @@ -201,7 +201,7 @@ vint64m1_t test_vredxor_vs_i64m4_i64m1_tu(vint64m1_t maskedoff, vint64m4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i64m8_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf8_u8m1_tu( @@ -210,7 +210,7 @@ vint64m1_t test_vredxor_vs_i64m8_i64m1_tu(vint64m1_t maskedoff, vint64m8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf4_u8m1_tu( @@ -219,7 +219,7 @@ vuint8m1_t test_vredxor_vs_u8mf8_u8m1_tu(vuint8m1_t maskedoff, vuint8mf8_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf2_u8m1_tu( @@ -228,7 +228,7 @@ vuint8m1_t test_vredxor_vs_u8mf4_u8m1_tu(vuint8m1_t maskedoff, vuint8mf4_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m1_u8m1_tu( @@ -237,7 +237,7 @@ vuint8m1_t test_vredxor_vs_u8mf2_u8m1_tu(vuint8m1_t maskedoff, vuint8mf2_t vecto // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8m1_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m2_u8m1_tu( @@ -246,7 +246,7 @@ vuint8m1_t test_vredxor_vs_u8m1_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8m2_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m4_u8m1_tu( @@ -255,7 +255,7 @@ vuint8m1_t test_vredxor_vs_u8m2_u8m1_tu(vuint8m1_t maskedoff, vuint8m2_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8m4_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m8_u8m1_tu( @@ -264,7 +264,7 @@ vuint8m1_t test_vredxor_vs_u8m4_u8m1_tu(vuint8m1_t maskedoff, vuint8m4_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8m8_u8m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16mf4_u16m1_tu( @@ -273,7 +273,7 @@ vuint8m1_t test_vredxor_vs_u8m8_u8m1_tu(vuint8m1_t maskedoff, vuint8m8_t vector, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16mf4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16mf2_u16m1_tu( @@ -282,7 +282,7 @@ vuint16m1_t test_vredxor_vs_u16mf4_u16m1_tu(vuint16m1_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16mf2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m1_u16m1_tu( @@ -291,7 +291,7 @@ vuint16m1_t test_vredxor_vs_u16mf2_u16m1_tu(vuint16m1_t maskedoff, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16m1_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m2_u16m1_tu( @@ -300,7 +300,7 @@ vuint16m1_t test_vredxor_vs_u16m1_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16m2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m4_u16m1_tu( @@ -309,7 +309,7 @@ vuint16m1_t test_vredxor_vs_u16m2_u16m1_tu(vuint16m1_t maskedoff, vuint16m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16m4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m8_u16m1_tu( @@ -318,7 +318,7 @@ vuint16m1_t test_vredxor_vs_u16m4_u16m1_tu(vuint16m1_t maskedoff, vuint16m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16m8_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32mf2_u32m1_tu( @@ -327,7 +327,7 @@ vuint16m1_t test_vredxor_vs_u16m8_u16m1_tu(vuint16m1_t maskedoff, vuint16m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32mf2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m1_u32m1_tu( @@ -336,7 +336,7 @@ vuint32m1_t test_vredxor_vs_u32mf2_u32m1_tu(vuint32m1_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32m1_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m2_u32m1_tu( @@ -345,7 +345,7 @@ vuint32m1_t test_vredxor_vs_u32m1_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32m2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m4_u32m1_tu( @@ -354,7 +354,7 @@ vuint32m1_t test_vredxor_vs_u32m2_u32m1_tu(vuint32m1_t maskedoff, vuint32m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32m4_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m8_u32m1_tu( @@ -363,7 +363,7 @@ vuint32m1_t test_vredxor_vs_u32m4_u32m1_tu(vuint32m1_t maskedoff, vuint32m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32m8_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m1_u64m1_tu( @@ -372,7 +372,7 @@ vuint32m1_t test_vredxor_vs_u32m8_u32m1_tu(vuint32m1_t maskedoff, vuint32m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u64m1_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m2_u64m1_tu( @@ -381,7 +381,7 @@ vuint64m1_t test_vredxor_vs_u64m1_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u64m2_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m4_u64m1_tu( @@ -390,7 +390,7 @@ vuint64m1_t test_vredxor_vs_u64m2_u64m1_tu(vuint64m1_t maskedoff, vuint64m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u64m4_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m8_u64m1_tu( @@ -399,7 +399,7 @@ vuint64m1_t test_vredxor_vs_u64m4_u64m1_tu(vuint64m1_t maskedoff, vuint64m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u64m8_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf8_i8m1_tum( @@ -408,7 +408,7 @@ vuint64m1_t test_vredxor_vs_u64m8_u64m1_tu(vuint64m1_t maskedoff, vuint64m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vint8mf8_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf4_i8m1_tum( @@ -417,7 +417,7 @@ vint8m1_t test_vredxor_vs_i8mf8_i8m1_tum(vbool64_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vint8mf4_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8mf2_i8m1_tum( @@ -426,7 +426,7 @@ vint8m1_t test_vredxor_vs_i8mf4_i8m1_tum(vbool32_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vint8mf2_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8mf2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m1_i8m1_tum( @@ -435,7 +435,7 @@ vint8m1_t test_vredxor_vs_i8mf2_i8m1_tum(vbool16_t mask, vint8m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8m1_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m2_i8m1_tum( @@ -444,7 +444,7 @@ vint8m1_t test_vredxor_vs_i8m1_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint8m2_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8m2_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m4_i8m1_tum( @@ -453,7 +453,7 @@ vint8m1_t test_vredxor_vs_i8m2_i8m1_tum(vbool4_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint8m4_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8m4_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i8m8_i8m1_tum( @@ -462,7 +462,7 @@ vint8m1_t test_vredxor_vs_i8m4_i8m1_tum(vbool2_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vredxor_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint8m8_t vector, vint8m1_t scalar, size_t vl) { - return vredxor_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i8m8_i8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16mf4_i16m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vredxor_vs_i8m8_i8m1_tum(vbool1_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff, vint16mf4_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16mf2_i16m1_tum( @@ -480,7 +480,7 @@ vint16m1_t test_vredxor_vs_i16mf4_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff, vint16mf2_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m1_i16m1_tum( @@ -489,7 +489,7 @@ vint16m1_t test_vredxor_vs_i16mf2_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m2_i16m1_tum( @@ -498,7 +498,7 @@ vint16m1_t test_vredxor_vs_i16m1_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, vint16m2_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m4_i16m1_tum( @@ -507,7 +507,7 @@ vint16m1_t test_vredxor_vs_i16m2_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, vint16m4_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i16m8_i16m1_tum( @@ -516,7 +516,7 @@ vint16m1_t test_vredxor_vs_i16m4_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vredxor_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, vint16m8_t vector, vint16m1_t scalar, size_t vl) { - return vredxor_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i16m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32mf2_i32m1_tum( @@ -525,7 +525,7 @@ vint16m1_t test_vredxor_vs_i16m8_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff, vint32mf2_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m1_i32m1_tum( @@ -534,7 +534,7 @@ vint32m1_t test_vredxor_vs_i32mf2_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m2_i32m1_tum( @@ -543,7 +543,7 @@ vint32m1_t test_vredxor_vs_i32m1_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, vint32m2_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m4_i32m1_tum( @@ -552,7 +552,7 @@ vint32m1_t test_vredxor_vs_i32m2_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, vint32m4_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i32m8_i32m1_tum( @@ -561,7 +561,7 @@ vint32m1_t test_vredxor_vs_i32m4_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vredxor_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, vint32m8_t vector, vint32m1_t scalar, size_t vl) { - return vredxor_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i32m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m1_i64m1_tum( @@ -570,7 +570,7 @@ vint32m1_t test_vredxor_vs_i32m8_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i64m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m2_i64m1_tum( @@ -579,7 +579,7 @@ vint64m1_t test_vredxor_vs_i64m1_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, vint64m2_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i64m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m4_i64m1_tum( @@ -588,7 +588,7 @@ vint64m1_t test_vredxor_vs_i64m2_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, vint64m4_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i64m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_i64m8_i64m1_tum( @@ -597,7 +597,7 @@ vint64m1_t test_vredxor_vs_i64m4_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vredxor_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, vint64m8_t vector, vint64m1_t scalar, size_t vl) { - return vredxor_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_i64m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf8_u8m1_tum( @@ -606,7 +606,7 @@ vint64m1_t test_vredxor_vs_i64m8_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, vuint8mf8_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf4_u8m1_tum( @@ -615,7 +615,7 @@ vuint8m1_t test_vredxor_vs_u8mf8_u8m1_tum(vbool64_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, vuint8mf4_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8mf2_u8m1_tum( @@ -624,7 +624,7 @@ vuint8m1_t test_vredxor_vs_u8mf4_u8m1_tum(vbool32_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, vuint8mf2_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8mf2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m1_u8m1_tum( @@ -633,7 +633,7 @@ vuint8m1_t test_vredxor_vs_u8mf2_u8m1_tum(vbool16_t mask, vuint8m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8m1_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m2_u8m1_tum( @@ -642,7 +642,7 @@ vuint8m1_t test_vredxor_vs_u8m1_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vuint8m2_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8m2_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m4_u8m1_tum( @@ -651,7 +651,7 @@ vuint8m1_t test_vredxor_vs_u8m2_u8m1_tum(vbool4_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vuint8m4_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8m4_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u8m8_u8m1_tum( @@ -660,7 +660,7 @@ vuint8m1_t test_vredxor_vs_u8m4_u8m1_tum(vbool2_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vredxor_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vuint8m8_t vector, vuint8m1_t scalar, size_t vl) { - return vredxor_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u8m8_u8m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16mf4_u16m1_tum( @@ -669,7 +669,7 @@ vuint8m1_t test_vredxor_vs_u8m8_u8m1_tum(vbool1_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedoff, vuint16mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16mf2_u16m1_tum( @@ -678,7 +678,7 @@ vuint16m1_t test_vredxor_vs_u16mf4_u16m1_tum(vbool64_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedoff, vuint16mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m1_u16m1_tum( @@ -687,7 +687,7 @@ vuint16m1_t test_vredxor_vs_u16mf2_u16m1_tum(vbool32_t mask, vuint16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m2_u16m1_tum( @@ -696,7 +696,7 @@ vuint16m1_t test_vredxor_vs_u16m1_u16m1_tum(vbool16_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff, vuint16m2_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m4_u16m1_tum( @@ -705,7 +705,7 @@ vuint16m1_t test_vredxor_vs_u16m2_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff, vuint16m4_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u16m8_u16m1_tum( @@ -714,7 +714,7 @@ vuint16m1_t test_vredxor_vs_u16m4_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vredxor_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff, vuint16m8_t vector, vuint16m1_t scalar, size_t vl) { - return vredxor_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u16m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32mf2_u32m1_tum( @@ -723,7 +723,7 @@ vuint16m1_t test_vredxor_vs_u16m8_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedoff, vuint32mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m1_u32m1_tum( @@ -732,7 +732,7 @@ vuint32m1_t test_vredxor_vs_u32mf2_u32m1_tum(vbool64_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m2_u32m1_tum( @@ -741,7 +741,7 @@ vuint32m1_t test_vredxor_vs_u32m1_u32m1_tum(vbool32_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedoff, vuint32m2_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m4_u32m1_tum( @@ -750,7 +750,7 @@ vuint32m1_t test_vredxor_vs_u32m2_u32m1_tum(vbool16_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff, vuint32m4_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u32m8_u32m1_tum( @@ -759,7 +759,7 @@ vuint32m1_t test_vredxor_vs_u32m4_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vredxor_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff, vuint32m8_t vector, vuint32m1_t scalar, size_t vl) { - return vredxor_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u32m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m1_u64m1_tum( @@ -768,7 +768,7 @@ vuint32m1_t test_vredxor_vs_u32m8_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u64m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m2_u64m1_tum( @@ -777,7 +777,7 @@ vuint64m1_t test_vredxor_vs_u64m1_u64m1_tum(vbool64_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedoff, vuint64m2_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u64m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m4_u64m1_tum( @@ -786,7 +786,7 @@ vuint64m1_t test_vredxor_vs_u64m2_u64m1_tum(vbool32_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedoff, vuint64m4_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u64m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vredxor_vs_u64m8_u64m1_tum( @@ -795,6 +795,6 @@ vuint64m1_t test_vredxor_vs_u64m4_u64m1_tum(vbool16_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vredxor_vs_u64m8_u64m1_tum(vbool8_t mask, vuint64m1_t maskedoff, vuint64m8_t vector, vuint64m1_t scalar, size_t vl) { - return vredxor_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vredxor_vs_u64m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrem.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrem.c index fed8de03f6dde5c7ffaa3b22c93a528cfb65319f..cdacc386048eef8dd8110e50342fcbb1e681c253 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrem.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrem.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vrem_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vrem_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vrem_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vrem_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vrem_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vrem_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vrem_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vrem_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vrem_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vrem_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vrem_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vrem_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vrem_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vrem_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vrem_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vrem_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vrem_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vrem_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vrem_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vrem_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vrem_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vrem_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vrem_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vrem_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vrem_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vrem_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vrem_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vrem_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vrem_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vrem_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vrem_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vrem_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vrem_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vrem_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vrem_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vrem_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vrem_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vrem_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vrem_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vrem_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vrem_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vrem_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vrem_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vrem_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vrem_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vrem_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vrem_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vrem_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vrem_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vrem_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vrem_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vrem_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vrem_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vrem_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vrem_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vrem_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vrem_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vrem_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vrem_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vrem_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vrem_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vrem_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vrem_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vrem_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vrem_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vrem_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vrem_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vrem_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vrem_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vrem_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vrem_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vrem_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vrem_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vrem_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vrem_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vrem_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vrem_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vrem_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vrem_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vrem_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vrem_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vrem_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vrem_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vrem_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vrem_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vrem_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vrem_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vrem_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vrem_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vrem_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vrem_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vrem_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vrem_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vrem_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vrem_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vrem_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vrem_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vrem_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vrem_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vrem_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vrem_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vrem_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vrem_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vrem_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vrem_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vrem_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vrem_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vrem_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vrem_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vrem_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vrem_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vrem_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vrem_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vrem_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vrem_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vrem_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vrem_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vrem_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vrem_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vrem_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vrem_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vrem_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vrem_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vrem_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vrem_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vrem_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vrem_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vrem_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vrem_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vrem_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vrem_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vrem_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vrem_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vrem_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vrem_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vrem_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vrem_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vrem_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vrem_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vrem_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vrem_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vrem_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vrem_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vrem_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vrem_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vrem_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vrem_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vrem_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vrem_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vrem_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vrem_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vrem_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vrem_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vrem_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vrem_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vrem_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vrem_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vrem_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vrem_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vrem_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vrem_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vrem_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vrem_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vrem_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vrem_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vrem_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vrem_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vrem_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vrem_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vrem_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vrem_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vrem_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vrem_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vrem_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vrem_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vrem_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vrem_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vrem_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vrem_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vrem_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vrem_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vrem_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vrem_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vrem_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vrem_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vrem_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vrem_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vrem_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vrem_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vrem_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vrem_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vrem_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vrem_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vrem_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vrem_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vrem_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vrem_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vrem_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vrem_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vrem_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrem_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vrem_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vrem_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vrem_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrem_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vrem_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vrem_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vrem_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrem_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vrem_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vrem_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vrem_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrem_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vrem_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vrem_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vrem_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrem_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vrem_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vrem_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vrem_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrem_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vrem_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vrem_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vrem_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrem_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vrem_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vrem_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vrem_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vrem_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrem_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vrem_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vrem_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vrem_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrem_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vrem_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vrem_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vrem_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrem_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vrem_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vrem_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vrem_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrem_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vrem_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vrem_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vrem_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrem_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vrem_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vrem_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vrem_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrem_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vrem_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vrem_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vrem_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vrem_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrem_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vrem_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vrem_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vrem_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrem_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vrem_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vrem_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vrem_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrem_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vrem_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vrem_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vrem_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrem_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vrem_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vrem_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vrem_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrem_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vrem_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vrem_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vrem_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vrem_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrem_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vrem_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vrem_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vrem_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrem_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vrem_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vrem_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vrem_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrem_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vrem_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vrem_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrem_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vrem_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrem_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vrem_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrem_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vremu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vremu.c index 774d80da542a685ca0e4cc90eb3912999e8a4631..7b1373e3082d7b325df5b0623fb5a0ed4fe0a834 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vremu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vremu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vremu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vremu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vremu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vremu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vremu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vremu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vremu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vremu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vremu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vremu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vremu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vremu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vremu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vremu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vremu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vremu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vremu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vremu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vremu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vremu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vremu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vremu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vremu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vremu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vremu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vremu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vremu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vremu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vremu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vremu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vremu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vremu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vremu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vremu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vremu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vremu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vremu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vremu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vremu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vremu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vremu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vremu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vremu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vremu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vremu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vremu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vremu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vremu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vremu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vremu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vremu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vremu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vremu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vremu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vremu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vremu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vremu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vremu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vremu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vremu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vremu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vremu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vremu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vremu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vremu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vremu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vremu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vremu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vremu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vremu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vremu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vremu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vremu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vremu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vremu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vremu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vremu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vremu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vremu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vremu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vremu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vremu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vremu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vremu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vremu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vremu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vremu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vremu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vremu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vremu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vremu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vremu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vremu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vremu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vremu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vremu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vremu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vremu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vremu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vremu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vremu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vremu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vremu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vremu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vremu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vremu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vremu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vremu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vremu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vremu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vremu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vremu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vremu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vremu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vremu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vremu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vremu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vremu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vremu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vremu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vremu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vremu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vremu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vremu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vremu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vremu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vremu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vremu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vremu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vremu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vremu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vremu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vremu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vremu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vremu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vremu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vremu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vremu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vremu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vremu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vremu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vremu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vremu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vremu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vremu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vremu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vremu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vremu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vremu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vremu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vremu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vremu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vremu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vremu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vremu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vremu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vremu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vremu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vremu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vremu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vremu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vremu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vremu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vremu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vremu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vremu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vremu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vremu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vremu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vremu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vremu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vremu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vremu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vremu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vremu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vremu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vremu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vremu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vremu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vremu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vremu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vremu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vremu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vremu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vremu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vremu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vremu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vremu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vremu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vremu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vremu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vremu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vremu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vremu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vremu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vremu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vremu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vremu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vremu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vremu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vremu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vremu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vremu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vremu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vremu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vremu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vremu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vremu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vremu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vremu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vremu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vremu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vremu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vremu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vremu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vremu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vremu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vremu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vremu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vremu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vremu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vremu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vremu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vremu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vremu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vremu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vremu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vremu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vremu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vremu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vremu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vremu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vremu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vremu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vremu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vremu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vremu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vremu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vremu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vremu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vremu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vremu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vremu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vremu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vremu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vremu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vremu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vremu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vremu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vremu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vremu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vremu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vremu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vremu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vremu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vremu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vremu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vremu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vremu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vremu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vremu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vremu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vremu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vremu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vremu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vremu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vremu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vremu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vremu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vremu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vremu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vremu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vremu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vremu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vremu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vremu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vremu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vremu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vremu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vremu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vremu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vremu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vremu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vremu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vremu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vremu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vremu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vremu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vremu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vremu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vremu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgather.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgather.c index 59c08fff511dd5318ab7f699dd878b5df16ef895..94546c65fd9e79943d99a244172211032bb31e76 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgather.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgather.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_f16mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf4_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vrgather_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vx_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf2_tu( @@ -31,7 +31,7 @@ vfloat16mf4_t test_vrgather_vx_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_f16mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf2_tu( @@ -40,7 +40,7 @@ vfloat16mf2_t test_vrgather_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vx_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m1_tu( @@ -49,7 +49,7 @@ vfloat16mf2_t test_vrgather_vx_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_f16m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m1_tu( @@ -58,7 +58,7 @@ vfloat16m1_t test_vrgather_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vx_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m2_tu( @@ -67,7 +67,7 @@ vfloat16m1_t test_vrgather_vx_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_f16m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m2_tu( @@ -76,7 +76,7 @@ vfloat16m2_t test_vrgather_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vx_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m4_tu( @@ -85,7 +85,7 @@ vfloat16m2_t test_vrgather_vx_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_f16m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m4_tu( @@ -94,7 +94,7 @@ vfloat16m4_t test_vrgather_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vx_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m8_tu( @@ -103,7 +103,7 @@ vfloat16m4_t test_vrgather_vx_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_f16m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m8_tu( @@ -112,7 +112,7 @@ vfloat16m8_t test_vrgather_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vx_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32mf2_tu( @@ -121,7 +121,7 @@ vfloat16m8_t test_vrgather_vx_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_f32mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32mf2_tu( @@ -130,7 +130,7 @@ vfloat32mf2_t test_vrgather_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vx_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m1_tu( @@ -139,7 +139,7 @@ vfloat32mf2_t test_vrgather_vx_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_f32m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m1_tu( @@ -148,7 +148,7 @@ vfloat32m1_t test_vrgather_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vx_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m2_tu( @@ -157,7 +157,7 @@ vfloat32m1_t test_vrgather_vx_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_f32m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m2_tu( @@ -166,7 +166,7 @@ vfloat32m2_t test_vrgather_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vx_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m4_tu( @@ -175,7 +175,7 @@ vfloat32m2_t test_vrgather_vx_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_f32m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m4_tu( @@ -184,7 +184,7 @@ vfloat32m4_t test_vrgather_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vx_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m8_tu( @@ -193,7 +193,7 @@ vfloat32m4_t test_vrgather_vx_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_f32m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m8_tu( @@ -202,7 +202,7 @@ vfloat32m8_t test_vrgather_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vx_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m1_tu( @@ -211,7 +211,7 @@ vfloat32m8_t test_vrgather_vx_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_f64m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m1_tu( @@ -220,7 +220,7 @@ vfloat64m1_t test_vrgather_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vx_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m2_tu( @@ -229,7 +229,7 @@ vfloat64m1_t test_vrgather_vx_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_f64m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m2_tu( @@ -238,7 +238,7 @@ vfloat64m2_t test_vrgather_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vx_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m4_tu( @@ -247,7 +247,7 @@ vfloat64m2_t test_vrgather_vx_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_f64m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m4_tu( @@ -256,7 +256,7 @@ vfloat64m4_t test_vrgather_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vx_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m8_tu( @@ -265,7 +265,7 @@ vfloat64m4_t test_vrgather_vx_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_f64m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m8_tu( @@ -274,7 +274,7 @@ vfloat64m8_t test_vrgather_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vx_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf8_tu( @@ -283,7 +283,7 @@ vfloat64m8_t test_vrgather_vx_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_i8mf8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf8_tu( @@ -292,7 +292,7 @@ vint8mf8_t test_vrgather_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf4_tu( @@ -301,7 +301,7 @@ vint8mf8_t test_vrgather_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_i8mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf4_tu( @@ -310,7 +310,7 @@ vint8mf4_t test_vrgather_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf2_tu( @@ -319,7 +319,7 @@ vint8mf4_t test_vrgather_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_i8mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf2_tu( @@ -328,7 +328,7 @@ vint8mf2_t test_vrgather_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m1_tu( @@ -337,7 +337,7 @@ vint8mf2_t test_vrgather_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_i8m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m1_tu( @@ -346,7 +346,7 @@ vint8m1_t test_vrgather_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m2_tu( @@ -355,7 +355,7 @@ vint8m1_t test_vrgather_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_i8m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m2_tu( @@ -364,7 +364,7 @@ vint8m2_t test_vrgather_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m4_tu( @@ -373,7 +373,7 @@ vint8m2_t test_vrgather_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_i8m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m4_tu( @@ -382,7 +382,7 @@ vint8m4_t test_vrgather_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m8_tu( @@ -391,7 +391,7 @@ vint8m4_t test_vrgather_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_i8m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m8_tu( @@ -400,7 +400,7 @@ vint8m8_t test_vrgather_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf4_tu( @@ -409,7 +409,7 @@ vint8m8_t test_vrgather_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_i16mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf4_tu( @@ -418,7 +418,7 @@ vint16mf4_t test_vrgather_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf2_tu( @@ -427,7 +427,7 @@ vint16mf4_t test_vrgather_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_i16mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf2_tu( @@ -436,7 +436,7 @@ vint16mf2_t test_vrgather_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m1_tu( @@ -445,7 +445,7 @@ vint16mf2_t test_vrgather_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_i16m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m1_tu( @@ -454,7 +454,7 @@ vint16m1_t test_vrgather_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m2_tu( @@ -463,7 +463,7 @@ vint16m1_t test_vrgather_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_i16m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m2_tu( @@ -472,7 +472,7 @@ vint16m2_t test_vrgather_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m4_tu( @@ -481,7 +481,7 @@ vint16m2_t test_vrgather_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_i16m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m4_tu( @@ -490,7 +490,7 @@ vint16m4_t test_vrgather_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m8_tu( @@ -499,7 +499,7 @@ vint16m4_t test_vrgather_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_i16m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m8_tu( @@ -508,7 +508,7 @@ vint16m8_t test_vrgather_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32mf2_tu( @@ -517,7 +517,7 @@ vint16m8_t test_vrgather_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_i32mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32mf2_tu( @@ -526,7 +526,7 @@ vint32mf2_t test_vrgather_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m1_tu( @@ -535,7 +535,7 @@ vint32mf2_t test_vrgather_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_i32m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m1_tu( @@ -544,7 +544,7 @@ vint32m1_t test_vrgather_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m2_tu( @@ -553,7 +553,7 @@ vint32m1_t test_vrgather_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_i32m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m2_tu( @@ -562,7 +562,7 @@ vint32m2_t test_vrgather_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m4_tu( @@ -571,7 +571,7 @@ vint32m2_t test_vrgather_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_i32m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m4_tu( @@ -580,7 +580,7 @@ vint32m4_t test_vrgather_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m8_tu( @@ -589,7 +589,7 @@ vint32m4_t test_vrgather_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_i32m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m8_tu( @@ -598,7 +598,7 @@ vint32m8_t test_vrgather_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m1_tu( @@ -607,7 +607,7 @@ vint32m8_t test_vrgather_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_i64m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m1_tu( @@ -616,7 +616,7 @@ vint64m1_t test_vrgather_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m2_tu( @@ -625,7 +625,7 @@ vint64m1_t test_vrgather_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_i64m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m2_tu( @@ -634,7 +634,7 @@ vint64m2_t test_vrgather_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m4_tu( @@ -643,7 +643,7 @@ vint64m2_t test_vrgather_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_i64m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m4_tu( @@ -652,7 +652,7 @@ vint64m4_t test_vrgather_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m8_tu( @@ -661,7 +661,7 @@ vint64m4_t test_vrgather_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_i64m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m8_tu( @@ -670,7 +670,7 @@ vint64m8_t test_vrgather_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf8_tu( @@ -679,7 +679,7 @@ vint64m8_t test_vrgather_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_u8mf8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf8_tu( @@ -688,7 +688,7 @@ vuint8mf8_t test_vrgather_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf4_tu( @@ -697,7 +697,7 @@ vuint8mf8_t test_vrgather_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_u8mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf4_tu( @@ -706,7 +706,7 @@ vuint8mf4_t test_vrgather_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf2_tu( @@ -715,7 +715,7 @@ vuint8mf4_t test_vrgather_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_u8mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf2_tu( @@ -724,7 +724,7 @@ vuint8mf2_t test_vrgather_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m1_tu( @@ -733,7 +733,7 @@ vuint8mf2_t test_vrgather_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_u8m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m1_tu( @@ -742,7 +742,7 @@ vuint8m1_t test_vrgather_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m2_tu( @@ -751,7 +751,7 @@ vuint8m1_t test_vrgather_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_u8m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m2_tu( @@ -760,7 +760,7 @@ vuint8m2_t test_vrgather_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m4_tu( @@ -769,7 +769,7 @@ vuint8m2_t test_vrgather_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_u8m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m4_tu( @@ -778,7 +778,7 @@ vuint8m4_t test_vrgather_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m8_tu( @@ -787,7 +787,7 @@ vuint8m4_t test_vrgather_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_u8m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m8_tu( @@ -796,7 +796,7 @@ vuint8m8_t test_vrgather_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf4_tu( @@ -805,7 +805,7 @@ vuint8m8_t test_vrgather_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_u16mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf4_tu( @@ -814,7 +814,7 @@ vuint16mf4_t test_vrgather_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16mf4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf2_tu( @@ -823,7 +823,7 @@ vuint16mf4_t test_vrgather_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_u16mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf2_tu( @@ -832,7 +832,7 @@ vuint16mf2_t test_vrgather_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m1_tu( @@ -841,7 +841,7 @@ vuint16mf2_t test_vrgather_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_u16m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m1_tu( @@ -850,7 +850,7 @@ vuint16m1_t test_vrgather_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m2_tu( @@ -859,7 +859,7 @@ vuint16m1_t test_vrgather_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_u16m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m2_tu( @@ -868,7 +868,7 @@ vuint16m2_t test_vrgather_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m4_tu( @@ -877,7 +877,7 @@ vuint16m2_t test_vrgather_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_u16m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m4_tu( @@ -886,7 +886,7 @@ vuint16m4_t test_vrgather_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m8_tu( @@ -895,7 +895,7 @@ vuint16m4_t test_vrgather_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_u16m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m8_tu( @@ -904,7 +904,7 @@ vuint16m8_t test_vrgather_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32mf2_tu( @@ -913,7 +913,7 @@ vuint16m8_t test_vrgather_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_u32mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32mf2_tu( @@ -922,7 +922,7 @@ vuint32mf2_t test_vrgather_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32mf2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32mf2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m1_tu( @@ -931,7 +931,7 @@ vuint32mf2_t test_vrgather_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_u32m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m1_tu( @@ -940,7 +940,7 @@ vuint32m1_t test_vrgather_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m2_tu( @@ -949,7 +949,7 @@ vuint32m1_t test_vrgather_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_u32m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m2_tu( @@ -958,7 +958,7 @@ vuint32m2_t test_vrgather_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m4_tu( @@ -967,7 +967,7 @@ vuint32m2_t test_vrgather_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_u32m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m4_tu( @@ -976,7 +976,7 @@ vuint32m4_t test_vrgather_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m8_tu( @@ -985,7 +985,7 @@ vuint32m4_t test_vrgather_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_u32m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m8_tu( @@ -994,7 +994,7 @@ vuint32m8_t test_vrgather_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m1_tu( @@ -1003,7 +1003,7 @@ vuint32m8_t test_vrgather_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_u64m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m1_tu( @@ -1012,7 +1012,7 @@ vuint64m1_t test_vrgather_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m1_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m1_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m2_tu( @@ -1021,7 +1021,7 @@ vuint64m1_t test_vrgather_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_u64m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m2_tu( @@ -1030,7 +1030,7 @@ vuint64m2_t test_vrgather_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m2_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m2_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m4_tu( @@ -1039,7 +1039,7 @@ vuint64m2_t test_vrgather_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_u64m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m4_tu( @@ -1048,7 +1048,7 @@ vuint64m4_t test_vrgather_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m4_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m4_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m8_tu( @@ -1057,7 +1057,7 @@ vuint64m4_t test_vrgather_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_u64m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m8_tu( @@ -1066,7 +1066,7 @@ vuint64m8_t test_vrgather_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m8_tu(maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m8_tu(maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf4_tum( @@ -1075,7 +1075,7 @@ vuint64m8_t test_vrgather_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_f16mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf4_tum( @@ -1084,7 +1084,7 @@ vfloat16mf4_t test_vrgather_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vx_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf2_tum( @@ -1093,7 +1093,7 @@ vfloat16mf4_t test_vrgather_vx_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_f16mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf2_tum( @@ -1102,7 +1102,7 @@ vfloat16mf2_t test_vrgather_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vx_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m1_tum( @@ -1111,7 +1111,7 @@ vfloat16mf2_t test_vrgather_vx_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_f16m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m1_tum( @@ -1120,7 +1120,7 @@ vfloat16m1_t test_vrgather_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vx_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m2_tum( @@ -1129,7 +1129,7 @@ vfloat16m1_t test_vrgather_vx_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_f16m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m2_tum( @@ -1138,7 +1138,7 @@ vfloat16m2_t test_vrgather_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vx_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m4_tum( @@ -1147,7 +1147,7 @@ vfloat16m2_t test_vrgather_vx_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_f16m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m4_tum( @@ -1156,7 +1156,7 @@ vfloat16m4_t test_vrgather_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vx_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m8_tum( @@ -1165,7 +1165,7 @@ vfloat16m4_t test_vrgather_vx_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_f16m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m8_tum( @@ -1174,7 +1174,7 @@ vfloat16m8_t test_vrgather_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vx_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32mf2_tum( @@ -1183,7 +1183,7 @@ vfloat16m8_t test_vrgather_vx_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_f32mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32mf2_tum( @@ -1192,7 +1192,7 @@ vfloat32mf2_t test_vrgather_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vx_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m1_tum( @@ -1201,7 +1201,7 @@ vfloat32mf2_t test_vrgather_vx_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_f32m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m1_tum( @@ -1210,7 +1210,7 @@ vfloat32m1_t test_vrgather_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vx_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m2_tum( @@ -1219,7 +1219,7 @@ vfloat32m1_t test_vrgather_vx_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_f32m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m2_tum( @@ -1228,7 +1228,7 @@ vfloat32m2_t test_vrgather_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vx_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m4_tum( @@ -1237,7 +1237,7 @@ vfloat32m2_t test_vrgather_vx_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_f32m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m4_tum( @@ -1246,7 +1246,7 @@ vfloat32m4_t test_vrgather_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vx_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m8_tum( @@ -1255,7 +1255,7 @@ vfloat32m4_t test_vrgather_vx_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_f32m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m8_tum( @@ -1264,7 +1264,7 @@ vfloat32m8_t test_vrgather_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vx_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m1_tum( @@ -1273,7 +1273,7 @@ vfloat32m8_t test_vrgather_vx_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_f64m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m1_tum( @@ -1282,7 +1282,7 @@ vfloat64m1_t test_vrgather_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vx_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m2_tum( @@ -1291,7 +1291,7 @@ vfloat64m1_t test_vrgather_vx_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_f64m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m2_tum( @@ -1300,7 +1300,7 @@ vfloat64m2_t test_vrgather_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vx_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m4_tum( @@ -1309,7 +1309,7 @@ vfloat64m2_t test_vrgather_vx_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_f64m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m4_tum( @@ -1318,7 +1318,7 @@ vfloat64m4_t test_vrgather_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vx_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m8_tum( @@ -1327,7 +1327,7 @@ vfloat64m4_t test_vrgather_vx_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_f64m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m8_tum( @@ -1336,7 +1336,7 @@ vfloat64m8_t test_vrgather_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vx_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf8_tum( @@ -1345,7 +1345,7 @@ vfloat64m8_t test_vrgather_vx_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_i8mf8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf8_tum( @@ -1354,7 +1354,7 @@ vint8mf8_t test_vrgather_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf4_tum( @@ -1363,7 +1363,7 @@ vint8mf8_t test_vrgather_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_i8mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf4_tum( @@ -1372,7 +1372,7 @@ vint8mf4_t test_vrgather_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf2_tum( @@ -1381,7 +1381,7 @@ vint8mf4_t test_vrgather_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_i8mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf2_tum( @@ -1390,7 +1390,7 @@ vint8mf2_t test_vrgather_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m1_tum( @@ -1399,7 +1399,7 @@ vint8mf2_t test_vrgather_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_i8m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m1_tum( @@ -1408,7 +1408,7 @@ vint8m1_t test_vrgather_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m2_tum( @@ -1417,7 +1417,7 @@ vint8m1_t test_vrgather_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_i8m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m2_tum( @@ -1426,7 +1426,7 @@ vint8m2_t test_vrgather_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m4_tum( @@ -1435,7 +1435,7 @@ vint8m2_t test_vrgather_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_i8m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m4_tum( @@ -1444,7 +1444,7 @@ vint8m4_t test_vrgather_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m8_tum( @@ -1453,7 +1453,7 @@ vint8m4_t test_vrgather_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_i8m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m8_tum( @@ -1462,7 +1462,7 @@ vint8m8_t test_vrgather_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf4_tum( @@ -1471,7 +1471,7 @@ vint8m8_t test_vrgather_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_i16mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf4_tum( @@ -1480,7 +1480,7 @@ vint16mf4_t test_vrgather_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf2_tum( @@ -1489,7 +1489,7 @@ vint16mf4_t test_vrgather_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_i16mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf2_tum( @@ -1498,7 +1498,7 @@ vint16mf2_t test_vrgather_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m1_tum( @@ -1507,7 +1507,7 @@ vint16mf2_t test_vrgather_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_i16m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m1_tum( @@ -1516,7 +1516,7 @@ vint16m1_t test_vrgather_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m2_tum( @@ -1525,7 +1525,7 @@ vint16m1_t test_vrgather_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_i16m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m2_tum( @@ -1534,7 +1534,7 @@ vint16m2_t test_vrgather_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m4_tum( @@ -1543,7 +1543,7 @@ vint16m2_t test_vrgather_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_i16m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m4_tum( @@ -1552,7 +1552,7 @@ vint16m4_t test_vrgather_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m8_tum( @@ -1561,7 +1561,7 @@ vint16m4_t test_vrgather_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_i16m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m8_tum( @@ -1570,7 +1570,7 @@ vint16m8_t test_vrgather_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32mf2_tum( @@ -1579,7 +1579,7 @@ vint16m8_t test_vrgather_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_i32mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32mf2_tum( @@ -1588,7 +1588,7 @@ vint32mf2_t test_vrgather_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m1_tum( @@ -1597,7 +1597,7 @@ vint32mf2_t test_vrgather_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_i32m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m1_tum( @@ -1606,7 +1606,7 @@ vint32m1_t test_vrgather_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m2_tum( @@ -1615,7 +1615,7 @@ vint32m1_t test_vrgather_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_i32m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m2_tum( @@ -1624,7 +1624,7 @@ vint32m2_t test_vrgather_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m4_tum( @@ -1633,7 +1633,7 @@ vint32m2_t test_vrgather_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_i32m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m4_tum( @@ -1642,7 +1642,7 @@ vint32m4_t test_vrgather_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m8_tum( @@ -1651,7 +1651,7 @@ vint32m4_t test_vrgather_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_i32m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m8_tum( @@ -1660,7 +1660,7 @@ vint32m8_t test_vrgather_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m1_tum( @@ -1669,7 +1669,7 @@ vint32m8_t test_vrgather_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_i64m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m1_tum( @@ -1678,7 +1678,7 @@ vint64m1_t test_vrgather_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m2_tum( @@ -1687,7 +1687,7 @@ vint64m1_t test_vrgather_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_i64m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m2_tum( @@ -1696,7 +1696,7 @@ vint64m2_t test_vrgather_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m4_tum( @@ -1705,7 +1705,7 @@ vint64m2_t test_vrgather_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_i64m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m4_tum( @@ -1714,7 +1714,7 @@ vint64m4_t test_vrgather_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m8_tum( @@ -1723,7 +1723,7 @@ vint64m4_t test_vrgather_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_i64m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m8_tum( @@ -1732,7 +1732,7 @@ vint64m8_t test_vrgather_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf8_tum( @@ -1741,7 +1741,7 @@ vint64m8_t test_vrgather_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_u8mf8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf8_tum( @@ -1750,7 +1750,7 @@ vuint8mf8_t test_vrgather_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf4_tum( @@ -1759,7 +1759,7 @@ vuint8mf8_t test_vrgather_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_u8mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf4_tum( @@ -1768,7 +1768,7 @@ vuint8mf4_t test_vrgather_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf2_tum( @@ -1777,7 +1777,7 @@ vuint8mf4_t test_vrgather_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_u8mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf2_tum( @@ -1786,7 +1786,7 @@ vuint8mf2_t test_vrgather_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m1_tum( @@ -1795,7 +1795,7 @@ vuint8mf2_t test_vrgather_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_u8m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m1_tum( @@ -1804,7 +1804,7 @@ vuint8m1_t test_vrgather_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m2_tum( @@ -1813,7 +1813,7 @@ vuint8m1_t test_vrgather_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_u8m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m2_tum( @@ -1822,7 +1822,7 @@ vuint8m2_t test_vrgather_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m4_tum( @@ -1831,7 +1831,7 @@ vuint8m2_t test_vrgather_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_u8m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m4_tum( @@ -1840,7 +1840,7 @@ vuint8m4_t test_vrgather_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m8_tum( @@ -1849,7 +1849,7 @@ vuint8m4_t test_vrgather_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_u8m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m8_tum( @@ -1858,7 +1858,7 @@ vuint8m8_t test_vrgather_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf4_tum( @@ -1867,7 +1867,7 @@ vuint8m8_t test_vrgather_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_u16mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf4_tum( @@ -1876,7 +1876,7 @@ vuint16mf4_t test_vrgather_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16mf4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf2_tum( @@ -1885,7 +1885,7 @@ vuint16mf4_t test_vrgather_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_u16mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf2_tum( @@ -1894,7 +1894,7 @@ vuint16mf2_t test_vrgather_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m1_tum( @@ -1903,7 +1903,7 @@ vuint16mf2_t test_vrgather_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_u16m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m1_tum( @@ -1912,7 +1912,7 @@ vuint16m1_t test_vrgather_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m2_tum( @@ -1921,7 +1921,7 @@ vuint16m1_t test_vrgather_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_u16m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m2_tum( @@ -1930,7 +1930,7 @@ vuint16m2_t test_vrgather_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m4_tum( @@ -1939,7 +1939,7 @@ vuint16m2_t test_vrgather_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_u16m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m4_tum( @@ -1948,7 +1948,7 @@ vuint16m4_t test_vrgather_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m8_tum( @@ -1957,7 +1957,7 @@ vuint16m4_t test_vrgather_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_u16m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m8_tum( @@ -1966,7 +1966,7 @@ vuint16m8_t test_vrgather_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32mf2_tum( @@ -1975,7 +1975,7 @@ vuint16m8_t test_vrgather_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_u32mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32mf2_tum( @@ -1984,7 +1984,7 @@ vuint32mf2_t test_vrgather_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32mf2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32mf2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m1_tum( @@ -1993,7 +1993,7 @@ vuint32mf2_t test_vrgather_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_u32m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m1_tum( @@ -2002,7 +2002,7 @@ vuint32m1_t test_vrgather_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m2_tum( @@ -2011,7 +2011,7 @@ vuint32m1_t test_vrgather_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_u32m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m2_tum( @@ -2020,7 +2020,7 @@ vuint32m2_t test_vrgather_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m4_tum( @@ -2029,7 +2029,7 @@ vuint32m2_t test_vrgather_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_u32m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m4_tum( @@ -2038,7 +2038,7 @@ vuint32m4_t test_vrgather_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m8_tum( @@ -2047,7 +2047,7 @@ vuint32m4_t test_vrgather_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_u32m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m8_tum( @@ -2056,7 +2056,7 @@ vuint32m8_t test_vrgather_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m1_tum( @@ -2065,7 +2065,7 @@ vuint32m8_t test_vrgather_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_u64m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m1_tum( @@ -2074,7 +2074,7 @@ vuint64m1_t test_vrgather_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m1_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m1_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m2_tum( @@ -2083,7 +2083,7 @@ vuint64m1_t test_vrgather_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_u64m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m2_tum( @@ -2092,7 +2092,7 @@ vuint64m2_t test_vrgather_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m2_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m2_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m4_tum( @@ -2101,7 +2101,7 @@ vuint64m2_t test_vrgather_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_u64m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m4_tum( @@ -2110,7 +2110,7 @@ vuint64m4_t test_vrgather_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m4_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m4_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m8_tum( @@ -2119,7 +2119,7 @@ vuint64m4_t test_vrgather_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_u64m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m8_tum( @@ -2128,7 +2128,7 @@ vuint64m8_t test_vrgather_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m8_tum(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m8_tum(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf4_tumu( @@ -2137,7 +2137,7 @@ vuint64m8_t test_vrgather_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_f16mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf4_tumu( @@ -2146,7 +2146,7 @@ vfloat16mf4_t test_vrgather_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vx_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf2_tumu( @@ -2155,7 +2155,7 @@ vfloat16mf4_t test_vrgather_vx_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_f16mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf2_tumu( @@ -2164,7 +2164,7 @@ vfloat16mf2_t test_vrgather_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vx_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m1_tumu( @@ -2173,7 +2173,7 @@ vfloat16mf2_t test_vrgather_vx_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_f16m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m1_tumu( @@ -2182,7 +2182,7 @@ vfloat16m1_t test_vrgather_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vx_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m2_tumu( @@ -2191,7 +2191,7 @@ vfloat16m1_t test_vrgather_vx_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_f16m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m2_tumu( @@ -2200,7 +2200,7 @@ vfloat16m2_t test_vrgather_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vx_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m4_tumu( @@ -2209,7 +2209,7 @@ vfloat16m2_t test_vrgather_vx_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_f16m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m4_tumu( @@ -2218,7 +2218,7 @@ vfloat16m4_t test_vrgather_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vx_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m8_tumu( @@ -2227,7 +2227,7 @@ vfloat16m4_t test_vrgather_vx_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_f16m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m8_tumu( @@ -2236,7 +2236,7 @@ vfloat16m8_t test_vrgather_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vx_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32mf2_tumu( @@ -2245,7 +2245,7 @@ vfloat16m8_t test_vrgather_vx_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_f32mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32mf2_tumu( @@ -2254,7 +2254,7 @@ vfloat32mf2_t test_vrgather_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vx_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m1_tumu( @@ -2263,7 +2263,7 @@ vfloat32mf2_t test_vrgather_vx_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_f32m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m1_tumu( @@ -2272,7 +2272,7 @@ vfloat32m1_t test_vrgather_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vx_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m2_tumu( @@ -2281,7 +2281,7 @@ vfloat32m1_t test_vrgather_vx_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_f32m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m2_tumu( @@ -2290,7 +2290,7 @@ vfloat32m2_t test_vrgather_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vx_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m4_tumu( @@ -2299,7 +2299,7 @@ vfloat32m2_t test_vrgather_vx_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_f32m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m4_tumu( @@ -2308,7 +2308,7 @@ vfloat32m4_t test_vrgather_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vx_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m8_tumu( @@ -2317,7 +2317,7 @@ vfloat32m4_t test_vrgather_vx_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_f32m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m8_tumu( @@ -2326,7 +2326,7 @@ vfloat32m8_t test_vrgather_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vx_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m1_tumu( @@ -2335,7 +2335,7 @@ vfloat32m8_t test_vrgather_vx_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_f64m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m1_tumu( @@ -2344,7 +2344,7 @@ vfloat64m1_t test_vrgather_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vx_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m2_tumu( @@ -2353,7 +2353,7 @@ vfloat64m1_t test_vrgather_vx_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_f64m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m2_tumu( @@ -2362,7 +2362,7 @@ vfloat64m2_t test_vrgather_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vx_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m4_tumu( @@ -2371,7 +2371,7 @@ vfloat64m2_t test_vrgather_vx_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_f64m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m4_tumu( @@ -2380,7 +2380,7 @@ vfloat64m4_t test_vrgather_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vx_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m8_tumu( @@ -2389,7 +2389,7 @@ vfloat64m4_t test_vrgather_vx_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_f64m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m8_tumu( @@ -2398,7 +2398,7 @@ vfloat64m8_t test_vrgather_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vx_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf8_tumu( @@ -2407,7 +2407,7 @@ vfloat64m8_t test_vrgather_vx_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_i8mf8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf8_tumu( @@ -2416,7 +2416,7 @@ vint8mf8_t test_vrgather_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf4_tumu( @@ -2425,7 +2425,7 @@ vint8mf8_t test_vrgather_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_i8mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf4_tumu( @@ -2434,7 +2434,7 @@ vint8mf4_t test_vrgather_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf2_tumu( @@ -2443,7 +2443,7 @@ vint8mf4_t test_vrgather_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_i8mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf2_tumu( @@ -2452,7 +2452,7 @@ vint8mf2_t test_vrgather_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m1_tumu( @@ -2461,7 +2461,7 @@ vint8mf2_t test_vrgather_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_i8m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m1_tumu( @@ -2470,7 +2470,7 @@ vint8m1_t test_vrgather_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m2_tumu( @@ -2479,7 +2479,7 @@ vint8m1_t test_vrgather_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_i8m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m2_tumu( @@ -2488,7 +2488,7 @@ vint8m2_t test_vrgather_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m4_tumu( @@ -2497,7 +2497,7 @@ vint8m2_t test_vrgather_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_i8m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m4_tumu( @@ -2506,7 +2506,7 @@ vint8m4_t test_vrgather_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m8_tumu( @@ -2515,7 +2515,7 @@ vint8m4_t test_vrgather_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_i8m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m8_tumu( @@ -2524,7 +2524,7 @@ vint8m8_t test_vrgather_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf4_tumu( @@ -2533,7 +2533,7 @@ vint8m8_t test_vrgather_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_i16mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf4_tumu( @@ -2542,7 +2542,7 @@ vint16mf4_t test_vrgather_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf2_tumu( @@ -2551,7 +2551,7 @@ vint16mf4_t test_vrgather_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_i16mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf2_tumu( @@ -2560,7 +2560,7 @@ vint16mf2_t test_vrgather_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m1_tumu( @@ -2569,7 +2569,7 @@ vint16mf2_t test_vrgather_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_i16m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m1_tumu( @@ -2578,7 +2578,7 @@ vint16m1_t test_vrgather_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m2_tumu( @@ -2587,7 +2587,7 @@ vint16m1_t test_vrgather_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_i16m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m2_tumu( @@ -2596,7 +2596,7 @@ vint16m2_t test_vrgather_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m4_tumu( @@ -2605,7 +2605,7 @@ vint16m2_t test_vrgather_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_i16m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m4_tumu( @@ -2614,7 +2614,7 @@ vint16m4_t test_vrgather_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m8_tumu( @@ -2623,7 +2623,7 @@ vint16m4_t test_vrgather_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_i16m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m8_tumu( @@ -2632,7 +2632,7 @@ vint16m8_t test_vrgather_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32mf2_tumu( @@ -2641,7 +2641,7 @@ vint16m8_t test_vrgather_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_i32mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32mf2_tumu( @@ -2650,7 +2650,7 @@ vint32mf2_t test_vrgather_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m1_tumu( @@ -2659,7 +2659,7 @@ vint32mf2_t test_vrgather_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_i32m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m1_tumu( @@ -2668,7 +2668,7 @@ vint32m1_t test_vrgather_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m2_tumu( @@ -2677,7 +2677,7 @@ vint32m1_t test_vrgather_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_i32m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m2_tumu( @@ -2686,7 +2686,7 @@ vint32m2_t test_vrgather_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m4_tumu( @@ -2695,7 +2695,7 @@ vint32m2_t test_vrgather_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_i32m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m4_tumu( @@ -2704,7 +2704,7 @@ vint32m4_t test_vrgather_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m8_tumu( @@ -2713,7 +2713,7 @@ vint32m4_t test_vrgather_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_i32m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m8_tumu( @@ -2722,7 +2722,7 @@ vint32m8_t test_vrgather_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m1_tumu( @@ -2731,7 +2731,7 @@ vint32m8_t test_vrgather_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_i64m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m1_tumu( @@ -2740,7 +2740,7 @@ vint64m1_t test_vrgather_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m2_tumu( @@ -2749,7 +2749,7 @@ vint64m1_t test_vrgather_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_i64m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m2_tumu( @@ -2758,7 +2758,7 @@ vint64m2_t test_vrgather_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m4_tumu( @@ -2767,7 +2767,7 @@ vint64m2_t test_vrgather_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_i64m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m4_tumu( @@ -2776,7 +2776,7 @@ vint64m4_t test_vrgather_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m8_tumu( @@ -2785,7 +2785,7 @@ vint64m4_t test_vrgather_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_i64m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m8_tumu( @@ -2794,7 +2794,7 @@ vint64m8_t test_vrgather_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf8_tumu( @@ -2803,7 +2803,7 @@ vint64m8_t test_vrgather_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_u8mf8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf8_tumu( @@ -2812,7 +2812,7 @@ vuint8mf8_t test_vrgather_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf4_tumu( @@ -2821,7 +2821,7 @@ vuint8mf8_t test_vrgather_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_u8mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf4_tumu( @@ -2830,7 +2830,7 @@ vuint8mf4_t test_vrgather_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf2_tumu( @@ -2839,7 +2839,7 @@ vuint8mf4_t test_vrgather_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_u8mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf2_tumu( @@ -2848,7 +2848,7 @@ vuint8mf2_t test_vrgather_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m1_tumu( @@ -2857,7 +2857,7 @@ vuint8mf2_t test_vrgather_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_u8m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m1_tumu( @@ -2866,7 +2866,7 @@ vuint8m1_t test_vrgather_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m2_tumu( @@ -2875,7 +2875,7 @@ vuint8m1_t test_vrgather_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_u8m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m2_tumu( @@ -2884,7 +2884,7 @@ vuint8m2_t test_vrgather_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m4_tumu( @@ -2893,7 +2893,7 @@ vuint8m2_t test_vrgather_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_u8m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m4_tumu( @@ -2902,7 +2902,7 @@ vuint8m4_t test_vrgather_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m8_tumu( @@ -2911,7 +2911,7 @@ vuint8m4_t test_vrgather_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_u8m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m8_tumu( @@ -2920,7 +2920,7 @@ vuint8m8_t test_vrgather_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf4_tumu( @@ -2929,7 +2929,7 @@ vuint8m8_t test_vrgather_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_u16mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf4_tumu( @@ -2938,7 +2938,7 @@ vuint16mf4_t test_vrgather_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16mf4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf2_tumu( @@ -2947,7 +2947,7 @@ vuint16mf4_t test_vrgather_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_u16mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf2_tumu( @@ -2956,7 +2956,7 @@ vuint16mf2_t test_vrgather_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m1_tumu( @@ -2965,7 +2965,7 @@ vuint16mf2_t test_vrgather_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_u16m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m1_tumu( @@ -2974,7 +2974,7 @@ vuint16m1_t test_vrgather_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m2_tumu( @@ -2983,7 +2983,7 @@ vuint16m1_t test_vrgather_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_u16m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m2_tumu( @@ -2992,7 +2992,7 @@ vuint16m2_t test_vrgather_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m4_tumu( @@ -3001,7 +3001,7 @@ vuint16m2_t test_vrgather_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_u16m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m4_tumu( @@ -3010,7 +3010,7 @@ vuint16m4_t test_vrgather_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m8_tumu( @@ -3019,7 +3019,7 @@ vuint16m4_t test_vrgather_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_u16m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m8_tumu( @@ -3028,7 +3028,7 @@ vuint16m8_t test_vrgather_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32mf2_tumu( @@ -3037,7 +3037,7 @@ vuint16m8_t test_vrgather_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_u32mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32mf2_tumu( @@ -3046,7 +3046,7 @@ vuint32mf2_t test_vrgather_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32mf2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32mf2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m1_tumu( @@ -3055,7 +3055,7 @@ vuint32mf2_t test_vrgather_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_u32m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m1_tumu( @@ -3064,7 +3064,7 @@ vuint32m1_t test_vrgather_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m2_tumu( @@ -3073,7 +3073,7 @@ vuint32m1_t test_vrgather_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_u32m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m2_tumu( @@ -3082,7 +3082,7 @@ vuint32m2_t test_vrgather_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m4_tumu( @@ -3091,7 +3091,7 @@ vuint32m2_t test_vrgather_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_u32m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m4_tumu( @@ -3100,7 +3100,7 @@ vuint32m4_t test_vrgather_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m8_tumu( @@ -3109,7 +3109,7 @@ vuint32m4_t test_vrgather_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_u32m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m8_tumu( @@ -3118,7 +3118,7 @@ vuint32m8_t test_vrgather_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m1_tumu( @@ -3127,7 +3127,7 @@ vuint32m8_t test_vrgather_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_u64m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m1_tumu( @@ -3136,7 +3136,7 @@ vuint64m1_t test_vrgather_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m1_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m1_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m2_tumu( @@ -3145,7 +3145,7 @@ vuint64m1_t test_vrgather_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_u64m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m2_tumu( @@ -3154,7 +3154,7 @@ vuint64m2_t test_vrgather_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m2_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m2_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m4_tumu( @@ -3163,7 +3163,7 @@ vuint64m2_t test_vrgather_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_u64m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m4_tumu( @@ -3172,7 +3172,7 @@ vuint64m4_t test_vrgather_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m4_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m4_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m8_tumu( @@ -3181,7 +3181,7 @@ vuint64m4_t test_vrgather_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_u64m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m8_tumu( @@ -3190,7 +3190,7 @@ vuint64m8_t test_vrgather_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m8_tumu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m8_tumu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf4_mu( @@ -3199,7 +3199,7 @@ vuint64m8_t test_vrgather_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_f16mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf4_mu( @@ -3208,7 +3208,7 @@ vfloat16mf4_t test_vrgather_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgather_vx_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16mf2_mu( @@ -3217,7 +3217,7 @@ vfloat16mf4_t test_vrgather_vx_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_f16mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16mf2_mu( @@ -3226,7 +3226,7 @@ vfloat16mf2_t test_vrgather_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgather_vx_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m1_mu( @@ -3235,7 +3235,7 @@ vfloat16mf2_t test_vrgather_vx_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_f16m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m1_mu( @@ -3244,7 +3244,7 @@ vfloat16m1_t test_vrgather_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgather_vx_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m2_mu( @@ -3253,7 +3253,7 @@ vfloat16m1_t test_vrgather_vx_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_f16m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m2_mu( @@ -3262,7 +3262,7 @@ vfloat16m2_t test_vrgather_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgather_vx_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m4_mu( @@ -3271,7 +3271,7 @@ vfloat16m2_t test_vrgather_vx_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_f16m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m4_mu( @@ -3280,7 +3280,7 @@ vfloat16m4_t test_vrgather_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgather_vx_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f16m8_mu( @@ -3289,7 +3289,7 @@ vfloat16m4_t test_vrgather_vx_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_f16m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f16m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f16m8_mu( @@ -3298,7 +3298,7 @@ vfloat16m8_t test_vrgather_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgather_vx_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f16m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f16m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32mf2_mu( @@ -3307,7 +3307,7 @@ vfloat16m8_t test_vrgather_vx_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_f32mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32mf2_mu( @@ -3316,7 +3316,7 @@ vfloat32mf2_t test_vrgather_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgather_vx_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m1_mu( @@ -3325,7 +3325,7 @@ vfloat32mf2_t test_vrgather_vx_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_f32m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m1_mu( @@ -3334,7 +3334,7 @@ vfloat32m1_t test_vrgather_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgather_vx_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m2_mu( @@ -3343,7 +3343,7 @@ vfloat32m1_t test_vrgather_vx_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_f32m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m2_mu( @@ -3352,7 +3352,7 @@ vfloat32m2_t test_vrgather_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgather_vx_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m4_mu( @@ -3361,7 +3361,7 @@ vfloat32m2_t test_vrgather_vx_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_f32m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m4_mu( @@ -3370,7 +3370,7 @@ vfloat32m4_t test_vrgather_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgather_vx_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f32m8_mu( @@ -3379,7 +3379,7 @@ vfloat32m4_t test_vrgather_vx_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_f32m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f32m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f32m8_mu( @@ -3388,7 +3388,7 @@ vfloat32m8_t test_vrgather_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgather_vx_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f32m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f32m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m1_mu( @@ -3397,7 +3397,7 @@ vfloat32m8_t test_vrgather_vx_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_f64m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m1_mu( @@ -3406,7 +3406,7 @@ vfloat64m1_t test_vrgather_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgather_vx_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m2_mu( @@ -3415,7 +3415,7 @@ vfloat64m1_t test_vrgather_vx_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_f64m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m2_mu( @@ -3424,7 +3424,7 @@ vfloat64m2_t test_vrgather_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgather_vx_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m4_mu( @@ -3433,7 +3433,7 @@ vfloat64m2_t test_vrgather_vx_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_f64m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m4_mu( @@ -3442,7 +3442,7 @@ vfloat64m4_t test_vrgather_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgather_vx_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_f64m8_mu( @@ -3451,7 +3451,7 @@ vfloat64m4_t test_vrgather_vx_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_f64m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_f64m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_f64m8_mu( @@ -3460,7 +3460,7 @@ vfloat64m8_t test_vrgather_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgather_vx_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_f64m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_f64m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf8_mu( @@ -3469,7 +3469,7 @@ vfloat64m8_t test_vrgather_vx_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_i8mf8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf8_mu( @@ -3478,7 +3478,7 @@ vint8mf8_t test_vrgather_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgather_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf4_mu( @@ -3487,7 +3487,7 @@ vint8mf8_t test_vrgather_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_i8mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf4_mu( @@ -3496,7 +3496,7 @@ vint8mf4_t test_vrgather_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgather_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8mf2_mu( @@ -3505,7 +3505,7 @@ vint8mf4_t test_vrgather_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_i8mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8mf2_mu( @@ -3514,7 +3514,7 @@ vint8mf2_t test_vrgather_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgather_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m1_mu( @@ -3523,7 +3523,7 @@ vint8mf2_t test_vrgather_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_i8m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m1_mu( @@ -3532,7 +3532,7 @@ vint8m1_t test_vrgather_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgather_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m2_mu( @@ -3541,7 +3541,7 @@ vint8m1_t test_vrgather_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_i8m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m2_mu( @@ -3550,7 +3550,7 @@ vint8m2_t test_vrgather_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgather_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m4_mu( @@ -3559,7 +3559,7 @@ vint8m2_t test_vrgather_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_i8m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m4_mu( @@ -3568,7 +3568,7 @@ vint8m4_t test_vrgather_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgather_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i8m8_mu( @@ -3577,7 +3577,7 @@ vint8m4_t test_vrgather_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_i8m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i8m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i8m8_mu( @@ -3586,7 +3586,7 @@ vint8m8_t test_vrgather_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrgather_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i8m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i8m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf4_mu( @@ -3595,7 +3595,7 @@ vint8m8_t test_vrgather_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_i16mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf4_mu( @@ -3604,7 +3604,7 @@ vint16mf4_t test_vrgather_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgather_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16mf2_mu( @@ -3613,7 +3613,7 @@ vint16mf4_t test_vrgather_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_i16mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16mf2_mu( @@ -3622,7 +3622,7 @@ vint16mf2_t test_vrgather_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgather_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m1_mu( @@ -3631,7 +3631,7 @@ vint16mf2_t test_vrgather_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_i16m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m1_mu( @@ -3640,7 +3640,7 @@ vint16m1_t test_vrgather_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgather_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m2_mu( @@ -3649,7 +3649,7 @@ vint16m1_t test_vrgather_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_i16m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m2_mu( @@ -3658,7 +3658,7 @@ vint16m2_t test_vrgather_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgather_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m4_mu( @@ -3667,7 +3667,7 @@ vint16m2_t test_vrgather_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_i16m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m4_mu( @@ -3676,7 +3676,7 @@ vint16m4_t test_vrgather_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgather_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i16m8_mu( @@ -3685,7 +3685,7 @@ vint16m4_t test_vrgather_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_i16m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i16m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i16m8_mu( @@ -3694,7 +3694,7 @@ vint16m8_t test_vrgather_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgather_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i16m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i16m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32mf2_mu( @@ -3703,7 +3703,7 @@ vint16m8_t test_vrgather_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_i32mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32mf2_mu( @@ -3712,7 +3712,7 @@ vint32mf2_t test_vrgather_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgather_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m1_mu( @@ -3721,7 +3721,7 @@ vint32mf2_t test_vrgather_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_i32m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m1_mu( @@ -3730,7 +3730,7 @@ vint32m1_t test_vrgather_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgather_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m2_mu( @@ -3739,7 +3739,7 @@ vint32m1_t test_vrgather_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_i32m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m2_mu( @@ -3748,7 +3748,7 @@ vint32m2_t test_vrgather_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgather_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m4_mu( @@ -3757,7 +3757,7 @@ vint32m2_t test_vrgather_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_i32m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m4_mu( @@ -3766,7 +3766,7 @@ vint32m4_t test_vrgather_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgather_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i32m8_mu( @@ -3775,7 +3775,7 @@ vint32m4_t test_vrgather_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_i32m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i32m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i32m8_mu( @@ -3784,7 +3784,7 @@ vint32m8_t test_vrgather_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgather_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i32m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i32m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m1_mu( @@ -3793,7 +3793,7 @@ vint32m8_t test_vrgather_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_i64m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m1_mu( @@ -3802,7 +3802,7 @@ vint64m1_t test_vrgather_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgather_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m2_mu( @@ -3811,7 +3811,7 @@ vint64m1_t test_vrgather_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_i64m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m2_mu( @@ -3820,7 +3820,7 @@ vint64m2_t test_vrgather_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgather_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m4_mu( @@ -3829,7 +3829,7 @@ vint64m2_t test_vrgather_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_i64m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m4_mu( @@ -3838,7 +3838,7 @@ vint64m4_t test_vrgather_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgather_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_i64m8_mu( @@ -3847,7 +3847,7 @@ vint64m4_t test_vrgather_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_i64m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_i64m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_i64m8_mu( @@ -3856,7 +3856,7 @@ vint64m8_t test_vrgather_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgather_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_i64m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_i64m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf8_mu( @@ -3865,7 +3865,7 @@ vint64m8_t test_vrgather_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t index, size_t vl) { - return vrgather_vv_u8mf8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf8_mu( @@ -3874,7 +3874,7 @@ vuint8mf8_t test_vrgather_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgather_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf4_mu( @@ -3883,7 +3883,7 @@ vuint8mf8_t test_vrgather_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t index, size_t vl) { - return vrgather_vv_u8mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf4_mu( @@ -3892,7 +3892,7 @@ vuint8mf4_t test_vrgather_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgather_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8mf2_mu( @@ -3901,7 +3901,7 @@ vuint8mf4_t test_vrgather_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t index, size_t vl) { - return vrgather_vv_u8mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8mf2_mu( @@ -3910,7 +3910,7 @@ vuint8mf2_t test_vrgather_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgather_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m1_mu( @@ -3919,7 +3919,7 @@ vuint8mf2_t test_vrgather_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t index, size_t vl) { - return vrgather_vv_u8m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m1_mu( @@ -3928,7 +3928,7 @@ vuint8m1_t test_vrgather_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgather_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m2_mu( @@ -3937,7 +3937,7 @@ vuint8m1_t test_vrgather_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t index, size_t vl) { - return vrgather_vv_u8m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m2_mu( @@ -3946,7 +3946,7 @@ vuint8m2_t test_vrgather_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgather_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m4_mu( @@ -3955,7 +3955,7 @@ vuint8m2_t test_vrgather_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t index, size_t vl) { - return vrgather_vv_u8m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m4_mu( @@ -3964,7 +3964,7 @@ vuint8m4_t test_vrgather_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgather_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u8m8_mu( @@ -3973,7 +3973,7 @@ vuint8m4_t test_vrgather_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t index, size_t vl) { - return vrgather_vv_u8m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u8m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u8m8_mu( @@ -3982,7 +3982,7 @@ vuint8m8_t test_vrgather_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrgather_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u8m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u8m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf4_mu( @@ -3991,7 +3991,7 @@ vuint8m8_t test_vrgather_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t index, size_t vl) { - return vrgather_vv_u16mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf4_mu( @@ -4000,7 +4000,7 @@ vuint16mf4_t test_vrgather_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgather_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16mf4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16mf2_mu( @@ -4009,7 +4009,7 @@ vuint16mf4_t test_vrgather_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t index, size_t vl) { - return vrgather_vv_u16mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16mf2_mu( @@ -4018,7 +4018,7 @@ vuint16mf2_t test_vrgather_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgather_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m1_mu( @@ -4027,7 +4027,7 @@ vuint16mf2_t test_vrgather_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t index, size_t vl) { - return vrgather_vv_u16m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m1_mu( @@ -4036,7 +4036,7 @@ vuint16m1_t test_vrgather_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgather_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m2_mu( @@ -4045,7 +4045,7 @@ vuint16m1_t test_vrgather_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t index, size_t vl) { - return vrgather_vv_u16m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m2_mu( @@ -4054,7 +4054,7 @@ vuint16m2_t test_vrgather_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgather_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m4_mu( @@ -4063,7 +4063,7 @@ vuint16m2_t test_vrgather_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t index, size_t vl) { - return vrgather_vv_u16m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m4_mu( @@ -4072,7 +4072,7 @@ vuint16m4_t test_vrgather_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgather_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u16m8_mu( @@ -4081,7 +4081,7 @@ vuint16m4_t test_vrgather_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t index, size_t vl) { - return vrgather_vv_u16m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u16m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u16m8_mu( @@ -4090,7 +4090,7 @@ vuint16m8_t test_vrgather_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgather_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u16m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u16m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32mf2_mu( @@ -4099,7 +4099,7 @@ vuint16m8_t test_vrgather_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t index, size_t vl) { - return vrgather_vv_u32mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32mf2_mu( @@ -4108,7 +4108,7 @@ vuint32mf2_t test_vrgather_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgather_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32mf2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32mf2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m1_mu( @@ -4117,7 +4117,7 @@ vuint32mf2_t test_vrgather_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t index, size_t vl) { - return vrgather_vv_u32m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m1_mu( @@ -4126,7 +4126,7 @@ vuint32m1_t test_vrgather_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgather_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m2_mu( @@ -4135,7 +4135,7 @@ vuint32m1_t test_vrgather_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t index, size_t vl) { - return vrgather_vv_u32m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m2_mu( @@ -4144,7 +4144,7 @@ vuint32m2_t test_vrgather_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgather_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m4_mu( @@ -4153,7 +4153,7 @@ vuint32m2_t test_vrgather_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t index, size_t vl) { - return vrgather_vv_u32m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m4_mu( @@ -4162,7 +4162,7 @@ vuint32m4_t test_vrgather_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgather_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u32m8_mu( @@ -4171,7 +4171,7 @@ vuint32m4_t test_vrgather_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t index, size_t vl) { - return vrgather_vv_u32m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u32m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u32m8_mu( @@ -4180,7 +4180,7 @@ vuint32m8_t test_vrgather_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgather_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u32m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u32m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m1_mu( @@ -4189,7 +4189,7 @@ vuint32m8_t test_vrgather_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t index, size_t vl) { - return vrgather_vv_u64m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m1_mu( @@ -4198,7 +4198,7 @@ vuint64m1_t test_vrgather_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgather_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m1_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m1_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m2_mu( @@ -4207,7 +4207,7 @@ vuint64m1_t test_vrgather_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t index, size_t vl) { - return vrgather_vv_u64m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m2_mu( @@ -4216,7 +4216,7 @@ vuint64m2_t test_vrgather_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgather_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m2_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m2_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m4_mu( @@ -4225,7 +4225,7 @@ vuint64m2_t test_vrgather_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t index, size_t vl) { - return vrgather_vv_u64m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m4_mu( @@ -4234,7 +4234,7 @@ vuint64m4_t test_vrgather_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgather_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m4_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m4_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vv_u64m8_mu( @@ -4243,7 +4243,7 @@ vuint64m4_t test_vrgather_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t index, size_t vl) { - return vrgather_vv_u64m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vv_u64m8_mu(mask, maskedoff, op1, index, vl); } // CHECK-RV64-LABEL: @test_vrgather_vx_u64m8_mu( @@ -4252,6 +4252,6 @@ vuint64m8_t test_vrgather_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgather_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t index, size_t vl) { - return vrgather_vx_u64m8_mu(mask, maskedoff, op1, index, vl); + return __riscv_vrgather_vx_u64m8_mu(mask, maskedoff, op1, index, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgatherei16.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgatherei16.c index 1f3a2a71b3258d5e14b69a4f3f59764d62ccbe68..8232eba6e11dee7dbe81650afe7e548296e25676 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgatherei16.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrgatherei16.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgatherei16_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vrgatherei16_vv_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgatherei16_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vrgatherei16_vv_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgatherei16_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vrgatherei16_vv_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgatherei16_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vrgatherei16_vv_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgatherei16_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vrgatherei16_vv_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgatherei16_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_f16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vrgatherei16_vv_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgatherei16_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vrgatherei16_vv_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgatherei16_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vrgatherei16_vv_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgatherei16_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vrgatherei16_vv_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgatherei16_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vrgatherei16_vv_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgatherei16_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vrgatherei16_vv_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgatherei16_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vrgatherei16_vv_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgatherei16_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vrgatherei16_vv_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgatherei16_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vrgatherei16_vv_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgatherei16_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf8_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vrgatherei16_vv_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgatherei16_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf4_tu( @@ -157,7 +157,7 @@ vint8mf8_t test_vrgatherei16_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgatherei16_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf2_tu( @@ -166,7 +166,7 @@ vint8mf4_t test_vrgatherei16_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgatherei16_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m1_tu( @@ -175,7 +175,7 @@ vint8mf2_t test_vrgatherei16_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgatherei16_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m2_tu( @@ -184,7 +184,7 @@ vint8m1_t test_vrgatherei16_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgatherei16_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m4_tu( @@ -193,7 +193,7 @@ vint8m2_t test_vrgatherei16_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgatherei16_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf4_tu( @@ -202,7 +202,7 @@ vint8m4_t test_vrgatherei16_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgatherei16_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf2_tu( @@ -211,7 +211,7 @@ vint16mf4_t test_vrgatherei16_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgatherei16_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m1_tu( @@ -220,7 +220,7 @@ vint16mf2_t test_vrgatherei16_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgatherei16_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m2_tu( @@ -229,7 +229,7 @@ vint16m1_t test_vrgatherei16_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgatherei16_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m4_tu( @@ -238,7 +238,7 @@ vint16m2_t test_vrgatherei16_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgatherei16_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m8_tu( @@ -247,7 +247,7 @@ vint16m4_t test_vrgatherei16_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgatherei16_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32mf2_tu( @@ -256,7 +256,7 @@ vint16m8_t test_vrgatherei16_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgatherei16_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m1_tu( @@ -265,7 +265,7 @@ vint32mf2_t test_vrgatherei16_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgatherei16_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m2_tu( @@ -274,7 +274,7 @@ vint32m1_t test_vrgatherei16_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgatherei16_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m4_tu( @@ -283,7 +283,7 @@ vint32m2_t test_vrgatherei16_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgatherei16_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m8_tu( @@ -292,7 +292,7 @@ vint32m4_t test_vrgatherei16_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgatherei16_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m1_tu( @@ -301,7 +301,7 @@ vint32m8_t test_vrgatherei16_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgatherei16_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m2_tu( @@ -310,7 +310,7 @@ vint64m1_t test_vrgatherei16_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgatherei16_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m4_tu( @@ -319,7 +319,7 @@ vint64m2_t test_vrgatherei16_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgatherei16_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m8_tu( @@ -328,7 +328,7 @@ vint64m4_t test_vrgatherei16_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgatherei16_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf8_tu( @@ -337,7 +337,7 @@ vint64m8_t test_vrgatherei16_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgatherei16_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf4_tu( @@ -346,7 +346,7 @@ vuint8mf8_t test_vrgatherei16_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgatherei16_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf2_tu( @@ -355,7 +355,7 @@ vuint8mf4_t test_vrgatherei16_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgatherei16_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m1_tu( @@ -364,7 +364,7 @@ vuint8mf2_t test_vrgatherei16_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgatherei16_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m2_tu( @@ -373,7 +373,7 @@ vuint8m1_t test_vrgatherei16_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgatherei16_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m4_tu( @@ -382,7 +382,7 @@ vuint8m2_t test_vrgatherei16_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgatherei16_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf4_tu( @@ -391,7 +391,7 @@ vuint8m4_t test_vrgatherei16_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgatherei16_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf2_tu( @@ -400,7 +400,7 @@ vuint16mf4_t test_vrgatherei16_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgatherei16_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m1_tu( @@ -409,7 +409,7 @@ vuint16mf2_t test_vrgatherei16_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgatherei16_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m2_tu( @@ -418,7 +418,7 @@ vuint16m1_t test_vrgatherei16_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgatherei16_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m4_tu( @@ -427,7 +427,7 @@ vuint16m2_t test_vrgatherei16_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgatherei16_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m8_tu( @@ -436,7 +436,7 @@ vuint16m4_t test_vrgatherei16_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgatherei16_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32mf2_tu( @@ -445,7 +445,7 @@ vuint16m8_t test_vrgatherei16_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgatherei16_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m1_tu( @@ -454,7 +454,7 @@ vuint32mf2_t test_vrgatherei16_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgatherei16_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m2_tu( @@ -463,7 +463,7 @@ vuint32m1_t test_vrgatherei16_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgatherei16_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m4_tu( @@ -472,7 +472,7 @@ vuint32m2_t test_vrgatherei16_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgatherei16_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m8_tu( @@ -481,7 +481,7 @@ vuint32m4_t test_vrgatherei16_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgatherei16_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m1_tu( @@ -490,7 +490,7 @@ vuint32m8_t test_vrgatherei16_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgatherei16_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m2_tu( @@ -499,7 +499,7 @@ vuint64m1_t test_vrgatherei16_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgatherei16_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m4_tu( @@ -508,7 +508,7 @@ vuint64m2_t test_vrgatherei16_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgatherei16_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m8_tu( @@ -517,7 +517,7 @@ vuint64m4_t test_vrgatherei16_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgatherei16_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf4_tum( @@ -526,7 +526,7 @@ vuint64m8_t test_vrgatherei16_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgatherei16_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf2_tum( @@ -535,7 +535,7 @@ vfloat16mf4_t test_vrgatherei16_vv_f16mf4_tum(vbool64_t mask, vfloat16mf4_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgatherei16_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m1_tum( @@ -544,7 +544,7 @@ vfloat16mf2_t test_vrgatherei16_vv_f16mf2_tum(vbool32_t mask, vfloat16mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgatherei16_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m2_tum( @@ -553,7 +553,7 @@ vfloat16m1_t test_vrgatherei16_vv_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgatherei16_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m4_tum( @@ -562,7 +562,7 @@ vfloat16m2_t test_vrgatherei16_vv_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgatherei16_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m8_tum( @@ -571,7 +571,7 @@ vfloat16m4_t test_vrgatherei16_vv_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgatherei16_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32mf2_tum( @@ -580,7 +580,7 @@ vfloat16m8_t test_vrgatherei16_vv_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgatherei16_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m1_tum( @@ -589,7 +589,7 @@ vfloat32mf2_t test_vrgatherei16_vv_f32mf2_tum(vbool64_t mask, vfloat32mf2_t mask // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgatherei16_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m2_tum( @@ -598,7 +598,7 @@ vfloat32m1_t test_vrgatherei16_vv_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgatherei16_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m4_tum( @@ -607,7 +607,7 @@ vfloat32m2_t test_vrgatherei16_vv_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgatherei16_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m8_tum( @@ -616,7 +616,7 @@ vfloat32m4_t test_vrgatherei16_vv_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgatherei16_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m1_tum( @@ -625,7 +625,7 @@ vfloat32m8_t test_vrgatherei16_vv_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgatherei16_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m2_tum( @@ -634,7 +634,7 @@ vfloat64m1_t test_vrgatherei16_vv_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgatherei16_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m4_tum( @@ -643,7 +643,7 @@ vfloat64m2_t test_vrgatherei16_vv_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgatherei16_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m8_tum( @@ -652,7 +652,7 @@ vfloat64m4_t test_vrgatherei16_vv_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgatherei16_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf8_tum( @@ -661,7 +661,7 @@ vfloat64m8_t test_vrgatherei16_vv_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgatherei16_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf4_tum( @@ -670,7 +670,7 @@ vint8mf8_t test_vrgatherei16_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgatherei16_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf2_tum( @@ -679,7 +679,7 @@ vint8mf4_t test_vrgatherei16_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgatherei16_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m1_tum( @@ -688,7 +688,7 @@ vint8mf2_t test_vrgatherei16_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgatherei16_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m2_tum( @@ -697,7 +697,7 @@ vint8m1_t test_vrgatherei16_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgatherei16_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m4_tum( @@ -706,7 +706,7 @@ vint8m2_t test_vrgatherei16_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgatherei16_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf4_tum( @@ -715,7 +715,7 @@ vint8m4_t test_vrgatherei16_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgatherei16_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf2_tum( @@ -724,7 +724,7 @@ vint16mf4_t test_vrgatherei16_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgatherei16_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m1_tum( @@ -733,7 +733,7 @@ vint16mf2_t test_vrgatherei16_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgatherei16_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m2_tum( @@ -742,7 +742,7 @@ vint16m1_t test_vrgatherei16_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgatherei16_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m4_tum( @@ -751,7 +751,7 @@ vint16m2_t test_vrgatherei16_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgatherei16_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m8_tum( @@ -760,7 +760,7 @@ vint16m4_t test_vrgatherei16_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgatherei16_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32mf2_tum( @@ -769,7 +769,7 @@ vint16m8_t test_vrgatherei16_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgatherei16_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m1_tum( @@ -778,7 +778,7 @@ vint32mf2_t test_vrgatherei16_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgatherei16_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m2_tum( @@ -787,7 +787,7 @@ vint32m1_t test_vrgatherei16_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgatherei16_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m4_tum( @@ -796,7 +796,7 @@ vint32m2_t test_vrgatherei16_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgatherei16_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m8_tum( @@ -805,7 +805,7 @@ vint32m4_t test_vrgatherei16_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgatherei16_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m1_tum( @@ -814,7 +814,7 @@ vint32m8_t test_vrgatherei16_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgatherei16_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m2_tum( @@ -823,7 +823,7 @@ vint64m1_t test_vrgatherei16_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgatherei16_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m4_tum( @@ -832,7 +832,7 @@ vint64m2_t test_vrgatherei16_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgatherei16_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m8_tum( @@ -841,7 +841,7 @@ vint64m4_t test_vrgatherei16_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgatherei16_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf8_tum( @@ -850,7 +850,7 @@ vint64m8_t test_vrgatherei16_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgatherei16_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf4_tum( @@ -859,7 +859,7 @@ vuint8mf8_t test_vrgatherei16_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgatherei16_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf2_tum( @@ -868,7 +868,7 @@ vuint8mf4_t test_vrgatherei16_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgatherei16_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m1_tum( @@ -877,7 +877,7 @@ vuint8mf2_t test_vrgatherei16_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgatherei16_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m2_tum( @@ -886,7 +886,7 @@ vuint8m1_t test_vrgatherei16_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgatherei16_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m4_tum( @@ -895,7 +895,7 @@ vuint8m2_t test_vrgatherei16_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgatherei16_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf4_tum( @@ -904,7 +904,7 @@ vuint8m4_t test_vrgatherei16_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgatherei16_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf2_tum( @@ -913,7 +913,7 @@ vuint16mf4_t test_vrgatherei16_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgatherei16_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m1_tum( @@ -922,7 +922,7 @@ vuint16mf2_t test_vrgatherei16_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgatherei16_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m2_tum( @@ -931,7 +931,7 @@ vuint16m1_t test_vrgatherei16_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgatherei16_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m4_tum( @@ -940,7 +940,7 @@ vuint16m2_t test_vrgatherei16_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgatherei16_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m8_tum( @@ -949,7 +949,7 @@ vuint16m4_t test_vrgatherei16_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgatherei16_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32mf2_tum( @@ -958,7 +958,7 @@ vuint16m8_t test_vrgatherei16_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgatherei16_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m1_tum( @@ -967,7 +967,7 @@ vuint32mf2_t test_vrgatherei16_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgatherei16_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m2_tum( @@ -976,7 +976,7 @@ vuint32m1_t test_vrgatherei16_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgatherei16_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m4_tum( @@ -985,7 +985,7 @@ vuint32m2_t test_vrgatherei16_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgatherei16_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m8_tum( @@ -994,7 +994,7 @@ vuint32m4_t test_vrgatherei16_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgatherei16_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m1_tum( @@ -1003,7 +1003,7 @@ vuint32m8_t test_vrgatherei16_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgatherei16_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m2_tum( @@ -1012,7 +1012,7 @@ vuint64m1_t test_vrgatherei16_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgatherei16_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m4_tum( @@ -1021,7 +1021,7 @@ vuint64m2_t test_vrgatherei16_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgatherei16_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m8_tum( @@ -1030,7 +1030,7 @@ vuint64m4_t test_vrgatherei16_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgatherei16_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf4_tumu( @@ -1039,7 +1039,7 @@ vuint64m8_t test_vrgatherei16_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgatherei16_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf2_tumu( @@ -1048,7 +1048,7 @@ vfloat16mf4_t test_vrgatherei16_vv_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgatherei16_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m1_tumu( @@ -1057,7 +1057,7 @@ vfloat16mf2_t test_vrgatherei16_vv_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgatherei16_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m2_tumu( @@ -1066,7 +1066,7 @@ vfloat16m1_t test_vrgatherei16_vv_f16m1_tumu(vbool16_t mask, vfloat16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgatherei16_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m4_tumu( @@ -1075,7 +1075,7 @@ vfloat16m2_t test_vrgatherei16_vv_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgatherei16_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m8_tumu( @@ -1084,7 +1084,7 @@ vfloat16m4_t test_vrgatherei16_vv_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgatherei16_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32mf2_tumu( @@ -1093,7 +1093,7 @@ vfloat16m8_t test_vrgatherei16_vv_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgatherei16_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m1_tumu( @@ -1102,7 +1102,7 @@ vfloat32mf2_t test_vrgatherei16_vv_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t mas // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgatherei16_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m2_tumu( @@ -1111,7 +1111,7 @@ vfloat32m1_t test_vrgatherei16_vv_f32m1_tumu(vbool32_t mask, vfloat32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgatherei16_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m4_tumu( @@ -1120,7 +1120,7 @@ vfloat32m2_t test_vrgatherei16_vv_f32m2_tumu(vbool16_t mask, vfloat32m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgatherei16_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m8_tumu( @@ -1129,7 +1129,7 @@ vfloat32m4_t test_vrgatherei16_vv_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgatherei16_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m1_tumu( @@ -1138,7 +1138,7 @@ vfloat32m8_t test_vrgatherei16_vv_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgatherei16_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m2_tumu( @@ -1147,7 +1147,7 @@ vfloat64m1_t test_vrgatherei16_vv_f64m1_tumu(vbool64_t mask, vfloat64m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgatherei16_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m4_tumu( @@ -1156,7 +1156,7 @@ vfloat64m2_t test_vrgatherei16_vv_f64m2_tumu(vbool32_t mask, vfloat64m2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgatherei16_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m8_tumu( @@ -1165,7 +1165,7 @@ vfloat64m4_t test_vrgatherei16_vv_f64m4_tumu(vbool16_t mask, vfloat64m4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgatherei16_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf8_tumu( @@ -1174,7 +1174,7 @@ vfloat64m8_t test_vrgatherei16_vv_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgatherei16_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf4_tumu( @@ -1183,7 +1183,7 @@ vint8mf8_t test_vrgatherei16_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgatherei16_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf2_tumu( @@ -1192,7 +1192,7 @@ vint8mf4_t test_vrgatherei16_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgatherei16_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m1_tumu( @@ -1201,7 +1201,7 @@ vint8mf2_t test_vrgatherei16_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgatherei16_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m2_tumu( @@ -1210,7 +1210,7 @@ vint8m1_t test_vrgatherei16_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgatherei16_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m4_tumu( @@ -1219,7 +1219,7 @@ vint8m2_t test_vrgatherei16_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgatherei16_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf4_tumu( @@ -1228,7 +1228,7 @@ vint8m4_t test_vrgatherei16_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgatherei16_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf2_tumu( @@ -1237,7 +1237,7 @@ vint16mf4_t test_vrgatherei16_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgatherei16_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m1_tumu( @@ -1246,7 +1246,7 @@ vint16mf2_t test_vrgatherei16_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgatherei16_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m2_tumu( @@ -1255,7 +1255,7 @@ vint16m1_t test_vrgatherei16_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgatherei16_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m4_tumu( @@ -1264,7 +1264,7 @@ vint16m2_t test_vrgatherei16_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgatherei16_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m8_tumu( @@ -1273,7 +1273,7 @@ vint16m4_t test_vrgatherei16_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgatherei16_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32mf2_tumu( @@ -1282,7 +1282,7 @@ vint16m8_t test_vrgatherei16_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgatherei16_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m1_tumu( @@ -1291,7 +1291,7 @@ vint32mf2_t test_vrgatherei16_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgatherei16_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m2_tumu( @@ -1300,7 +1300,7 @@ vint32m1_t test_vrgatherei16_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgatherei16_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m4_tumu( @@ -1309,7 +1309,7 @@ vint32m2_t test_vrgatherei16_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgatherei16_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m8_tumu( @@ -1318,7 +1318,7 @@ vint32m4_t test_vrgatherei16_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgatherei16_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m1_tumu( @@ -1327,7 +1327,7 @@ vint32m8_t test_vrgatherei16_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgatherei16_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m2_tumu( @@ -1336,7 +1336,7 @@ vint64m1_t test_vrgatherei16_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgatherei16_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m4_tumu( @@ -1345,7 +1345,7 @@ vint64m2_t test_vrgatherei16_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgatherei16_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m8_tumu( @@ -1354,7 +1354,7 @@ vint64m4_t test_vrgatherei16_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgatherei16_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf8_tumu( @@ -1363,7 +1363,7 @@ vint64m8_t test_vrgatherei16_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgatherei16_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf4_tumu( @@ -1372,7 +1372,7 @@ vuint8mf8_t test_vrgatherei16_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgatherei16_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf2_tumu( @@ -1381,7 +1381,7 @@ vuint8mf4_t test_vrgatherei16_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgatherei16_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m1_tumu( @@ -1390,7 +1390,7 @@ vuint8mf2_t test_vrgatherei16_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgatherei16_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m2_tumu( @@ -1399,7 +1399,7 @@ vuint8m1_t test_vrgatherei16_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgatherei16_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m4_tumu( @@ -1408,7 +1408,7 @@ vuint8m2_t test_vrgatherei16_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgatherei16_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf4_tumu( @@ -1417,7 +1417,7 @@ vuint8m4_t test_vrgatherei16_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgatherei16_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf2_tumu( @@ -1426,7 +1426,7 @@ vuint16mf4_t test_vrgatherei16_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgatherei16_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m1_tumu( @@ -1435,7 +1435,7 @@ vuint16mf2_t test_vrgatherei16_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgatherei16_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m2_tumu( @@ -1444,7 +1444,7 @@ vuint16m1_t test_vrgatherei16_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgatherei16_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m4_tumu( @@ -1453,7 +1453,7 @@ vuint16m2_t test_vrgatherei16_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgatherei16_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m8_tumu( @@ -1462,7 +1462,7 @@ vuint16m4_t test_vrgatherei16_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgatherei16_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32mf2_tumu( @@ -1471,7 +1471,7 @@ vuint16m8_t test_vrgatherei16_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgatherei16_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m1_tumu( @@ -1480,7 +1480,7 @@ vuint32mf2_t test_vrgatherei16_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgatherei16_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m2_tumu( @@ -1489,7 +1489,7 @@ vuint32m1_t test_vrgatherei16_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgatherei16_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m4_tumu( @@ -1498,7 +1498,7 @@ vuint32m2_t test_vrgatherei16_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgatherei16_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m8_tumu( @@ -1507,7 +1507,7 @@ vuint32m4_t test_vrgatherei16_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgatherei16_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m1_tumu( @@ -1516,7 +1516,7 @@ vuint32m8_t test_vrgatherei16_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgatherei16_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m2_tumu( @@ -1525,7 +1525,7 @@ vuint64m1_t test_vrgatherei16_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgatherei16_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m4_tumu( @@ -1534,7 +1534,7 @@ vuint64m2_t test_vrgatherei16_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgatherei16_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m8_tumu( @@ -1543,7 +1543,7 @@ vuint64m4_t test_vrgatherei16_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgatherei16_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf4_mu( @@ -1552,7 +1552,7 @@ vuint64m8_t test_vrgatherei16_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vrgatherei16_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16mf2_mu( @@ -1561,7 +1561,7 @@ vfloat16mf4_t test_vrgatherei16_vv_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vrgatherei16_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m1_mu( @@ -1570,7 +1570,7 @@ vfloat16mf2_t test_vrgatherei16_vv_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vrgatherei16_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m2_mu( @@ -1579,7 +1579,7 @@ vfloat16m1_t test_vrgatherei16_vv_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vrgatherei16_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m4_mu( @@ -1588,7 +1588,7 @@ vfloat16m2_t test_vrgatherei16_vv_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vrgatherei16_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f16m8_mu( @@ -1597,7 +1597,7 @@ vfloat16m4_t test_vrgatherei16_vv_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vrgatherei16_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32mf2_mu( @@ -1606,7 +1606,7 @@ vfloat16m8_t test_vrgatherei16_vv_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vrgatherei16_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m1_mu( @@ -1615,7 +1615,7 @@ vfloat32mf2_t test_vrgatherei16_vv_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vrgatherei16_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m2_mu( @@ -1624,7 +1624,7 @@ vfloat32m1_t test_vrgatherei16_vv_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vrgatherei16_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m4_mu( @@ -1633,7 +1633,7 @@ vfloat32m2_t test_vrgatherei16_vv_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vrgatherei16_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f32m8_mu( @@ -1642,7 +1642,7 @@ vfloat32m4_t test_vrgatherei16_vv_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vrgatherei16_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m1_mu( @@ -1651,7 +1651,7 @@ vfloat32m8_t test_vrgatherei16_vv_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vrgatherei16_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m2_mu( @@ -1660,7 +1660,7 @@ vfloat64m1_t test_vrgatherei16_vv_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vrgatherei16_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m4_mu( @@ -1669,7 +1669,7 @@ vfloat64m2_t test_vrgatherei16_vv_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vrgatherei16_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_f64m8_mu( @@ -1678,7 +1678,7 @@ vfloat64m4_t test_vrgatherei16_vv_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vrgatherei16_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_f64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf8_mu( @@ -1687,7 +1687,7 @@ vfloat64m8_t test_vrgatherei16_vv_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrgatherei16_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf4_mu( @@ -1696,7 +1696,7 @@ vint8mf8_t test_vrgatherei16_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrgatherei16_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8mf2_mu( @@ -1705,7 +1705,7 @@ vint8mf4_t test_vrgatherei16_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrgatherei16_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m1_mu( @@ -1714,7 +1714,7 @@ vint8mf2_t test_vrgatherei16_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrgatherei16_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m2_mu( @@ -1723,7 +1723,7 @@ vint8m1_t test_vrgatherei16_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrgatherei16_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i8m4_mu( @@ -1732,7 +1732,7 @@ vint8m2_t test_vrgatherei16_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrgatherei16_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf4_mu( @@ -1741,7 +1741,7 @@ vint8m4_t test_vrgatherei16_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrgatherei16_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16mf2_mu( @@ -1750,7 +1750,7 @@ vint16mf4_t test_vrgatherei16_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrgatherei16_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m1_mu( @@ -1759,7 +1759,7 @@ vint16mf2_t test_vrgatherei16_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrgatherei16_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m2_mu( @@ -1768,7 +1768,7 @@ vint16m1_t test_vrgatherei16_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrgatherei16_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m4_mu( @@ -1777,7 +1777,7 @@ vint16m2_t test_vrgatherei16_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrgatherei16_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i16m8_mu( @@ -1786,7 +1786,7 @@ vint16m4_t test_vrgatherei16_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrgatherei16_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32mf2_mu( @@ -1795,7 +1795,7 @@ vint16m8_t test_vrgatherei16_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrgatherei16_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m1_mu( @@ -1804,7 +1804,7 @@ vint32mf2_t test_vrgatherei16_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrgatherei16_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m2_mu( @@ -1813,7 +1813,7 @@ vint32m1_t test_vrgatherei16_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrgatherei16_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m4_mu( @@ -1822,7 +1822,7 @@ vint32m2_t test_vrgatherei16_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrgatherei16_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i32m8_mu( @@ -1831,7 +1831,7 @@ vint32m4_t test_vrgatherei16_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrgatherei16_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m1_mu( @@ -1840,7 +1840,7 @@ vint32m8_t test_vrgatherei16_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrgatherei16_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m2_mu( @@ -1849,7 +1849,7 @@ vint64m1_t test_vrgatherei16_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrgatherei16_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m4_mu( @@ -1858,7 +1858,7 @@ vint64m2_t test_vrgatherei16_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrgatherei16_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_i64m8_mu( @@ -1867,7 +1867,7 @@ vint64m4_t test_vrgatherei16_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrgatherei16_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf8_mu( @@ -1876,7 +1876,7 @@ vint64m8_t test_vrgatherei16_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrgatherei16_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf4_mu( @@ -1885,7 +1885,7 @@ vuint8mf8_t test_vrgatherei16_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrgatherei16_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8mf2_mu( @@ -1894,7 +1894,7 @@ vuint8mf4_t test_vrgatherei16_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrgatherei16_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m1_mu( @@ -1903,7 +1903,7 @@ vuint8mf2_t test_vrgatherei16_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrgatherei16_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m2_mu( @@ -1912,7 +1912,7 @@ vuint8m1_t test_vrgatherei16_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrgatherei16_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u8m4_mu( @@ -1921,7 +1921,7 @@ vuint8m2_t test_vrgatherei16_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrgatherei16_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf4_mu( @@ -1930,7 +1930,7 @@ vuint8m4_t test_vrgatherei16_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrgatherei16_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16mf2_mu( @@ -1939,7 +1939,7 @@ vuint16mf4_t test_vrgatherei16_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrgatherei16_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m1_mu( @@ -1948,7 +1948,7 @@ vuint16mf2_t test_vrgatherei16_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrgatherei16_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m2_mu( @@ -1957,7 +1957,7 @@ vuint16m1_t test_vrgatherei16_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrgatherei16_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m4_mu( @@ -1966,7 +1966,7 @@ vuint16m2_t test_vrgatherei16_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrgatherei16_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u16m8_mu( @@ -1975,7 +1975,7 @@ vuint16m4_t test_vrgatherei16_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrgatherei16_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vrgatherei16_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32mf2_mu( @@ -1984,7 +1984,7 @@ vuint16m8_t test_vrgatherei16_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrgatherei16_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m1_mu( @@ -1993,7 +1993,7 @@ vuint32mf2_t test_vrgatherei16_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrgatherei16_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m2_mu( @@ -2002,7 +2002,7 @@ vuint32m1_t test_vrgatherei16_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrgatherei16_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m4_mu( @@ -2011,7 +2011,7 @@ vuint32m2_t test_vrgatherei16_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrgatherei16_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u32m8_mu( @@ -2020,7 +2020,7 @@ vuint32m4_t test_vrgatherei16_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrgatherei16_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vrgatherei16_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m1_mu( @@ -2029,7 +2029,7 @@ vuint32m8_t test_vrgatherei16_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrgatherei16_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint16mf4_t op2, size_t vl) { - return vrgatherei16_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m2_mu( @@ -2038,7 +2038,7 @@ vuint64m1_t test_vrgatherei16_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrgatherei16_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint16mf2_t op2, size_t vl) { - return vrgatherei16_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m4_mu( @@ -2047,7 +2047,7 @@ vuint64m2_t test_vrgatherei16_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrgatherei16_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint16m1_t op2, size_t vl) { - return vrgatherei16_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrgatherei16_vv_u64m8_mu( @@ -2056,6 +2056,6 @@ vuint64m4_t test_vrgatherei16_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrgatherei16_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint16m2_t op2, size_t vl) { - return vrgatherei16_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrgatherei16_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrsub.c index c8b3956b8a9560d40b1ba6347c44580bd1b32bbb..6465e307f3cf27b7b338455cc0718a51204fba6a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vrsub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrsub_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf4_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vrsub_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrsub_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf2_tu( @@ -30,7 +30,7 @@ vint8mf4_t test_vrsub_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrsub_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m1_tu( @@ -39,7 +39,7 @@ vint8mf2_t test_vrsub_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrsub_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m2_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vrsub_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrsub_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m4_tu( @@ -57,7 +57,7 @@ vint8m2_t test_vrsub_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrsub_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m8_tu( @@ -66,7 +66,7 @@ vint8m4_t test_vrsub_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrsub_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf4_tu( @@ -75,7 +75,7 @@ vint8m8_t test_vrsub_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrsub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf2_tu( @@ -84,7 +84,7 @@ vint16mf4_t test_vrsub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrsub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m1_tu( @@ -93,7 +93,7 @@ vint16mf2_t test_vrsub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrsub_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m2_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vrsub_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrsub_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m4_tu( @@ -111,7 +111,7 @@ vint16m2_t test_vrsub_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrsub_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m8_tu( @@ -120,7 +120,7 @@ vint16m4_t test_vrsub_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrsub_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32mf2_tu( @@ -129,7 +129,7 @@ vint16m8_t test_vrsub_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrsub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m1_tu( @@ -138,7 +138,7 @@ vint32mf2_t test_vrsub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrsub_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m2_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vrsub_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrsub_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m4_tu( @@ -156,7 +156,7 @@ vint32m2_t test_vrsub_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrsub_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m8_tu( @@ -165,7 +165,7 @@ vint32m4_t test_vrsub_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrsub_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m1_tu( @@ -174,7 +174,7 @@ vint32m8_t test_vrsub_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrsub_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m2_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vrsub_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrsub_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m4_tu( @@ -192,7 +192,7 @@ vint64m2_t test_vrsub_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrsub_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m8_tu( @@ -201,7 +201,7 @@ vint64m4_t test_vrsub_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrsub_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf8_tu( @@ -210,7 +210,7 @@ vint64m8_t test_vrsub_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrsub_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf4_tu( @@ -219,7 +219,7 @@ vuint8mf8_t test_vrsub_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrsub_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf2_tu( @@ -228,7 +228,7 @@ vuint8mf4_t test_vrsub_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrsub_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m1_tu( @@ -237,7 +237,7 @@ vuint8mf2_t test_vrsub_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrsub_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m2_tu( @@ -246,7 +246,7 @@ vuint8m1_t test_vrsub_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrsub_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m4_tu( @@ -255,7 +255,7 @@ vuint8m2_t test_vrsub_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrsub_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m8_tu( @@ -264,7 +264,7 @@ vuint8m4_t test_vrsub_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrsub_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf4_tu( @@ -273,7 +273,7 @@ vuint8m8_t test_vrsub_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrsub_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf2_tu( @@ -282,7 +282,7 @@ vuint16mf4_t test_vrsub_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrsub_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m1_tu( @@ -291,7 +291,7 @@ vuint16mf2_t test_vrsub_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrsub_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m2_tu( @@ -300,7 +300,7 @@ vuint16m1_t test_vrsub_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrsub_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m4_tu( @@ -309,7 +309,7 @@ vuint16m2_t test_vrsub_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrsub_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m8_tu( @@ -318,7 +318,7 @@ vuint16m4_t test_vrsub_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrsub_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32mf2_tu( @@ -327,7 +327,7 @@ vuint16m8_t test_vrsub_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrsub_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m1_tu( @@ -336,7 +336,7 @@ vuint32mf2_t test_vrsub_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrsub_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m2_tu( @@ -345,7 +345,7 @@ vuint32m1_t test_vrsub_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrsub_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m4_tu( @@ -354,7 +354,7 @@ vuint32m2_t test_vrsub_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrsub_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m8_tu( @@ -363,7 +363,7 @@ vuint32m4_t test_vrsub_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrsub_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m1_tu( @@ -372,7 +372,7 @@ vuint32m8_t test_vrsub_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrsub_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m2_tu( @@ -381,7 +381,7 @@ vuint64m1_t test_vrsub_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrsub_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m4_tu( @@ -390,7 +390,7 @@ vuint64m2_t test_vrsub_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrsub_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m4_t test_vrsub_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrsub_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vrsub_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrsub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf4_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vrsub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrsub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf2_tum( @@ -426,7 +426,7 @@ vint8mf4_t test_vrsub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrsub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m1_tum( @@ -435,7 +435,7 @@ vint8mf2_t test_vrsub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrsub_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m2_tum( @@ -444,7 +444,7 @@ vint8m1_t test_vrsub_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrsub_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m4_tum( @@ -453,7 +453,7 @@ vint8m2_t test_vrsub_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrsub_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m8_tum( @@ -462,7 +462,7 @@ vint8m4_t test_vrsub_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrsub_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf4_tum( @@ -471,7 +471,7 @@ vint8m8_t test_vrsub_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrsub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf2_tum( @@ -480,7 +480,7 @@ vint16mf4_t test_vrsub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrsub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m1_tum( @@ -489,7 +489,7 @@ vint16mf2_t test_vrsub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrsub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m2_tum( @@ -498,7 +498,7 @@ vint16m1_t test_vrsub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrsub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m4_tum( @@ -507,7 +507,7 @@ vint16m2_t test_vrsub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrsub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m8_tum( @@ -516,7 +516,7 @@ vint16m4_t test_vrsub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrsub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32mf2_tum( @@ -525,7 +525,7 @@ vint16m8_t test_vrsub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrsub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m1_tum( @@ -534,7 +534,7 @@ vint32mf2_t test_vrsub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrsub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m2_tum( @@ -543,7 +543,7 @@ vint32m1_t test_vrsub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrsub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m4_tum( @@ -552,7 +552,7 @@ vint32m2_t test_vrsub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrsub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m8_tum( @@ -561,7 +561,7 @@ vint32m4_t test_vrsub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrsub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m1_tum( @@ -570,7 +570,7 @@ vint32m8_t test_vrsub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrsub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m2_tum( @@ -579,7 +579,7 @@ vint64m1_t test_vrsub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrsub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m4_tum( @@ -588,7 +588,7 @@ vint64m2_t test_vrsub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrsub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m8_tum( @@ -597,7 +597,7 @@ vint64m4_t test_vrsub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrsub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf8_tum( @@ -606,7 +606,7 @@ vint64m8_t test_vrsub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrsub_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf4_tum( @@ -615,7 +615,7 @@ vuint8mf8_t test_vrsub_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrsub_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf2_tum( @@ -624,7 +624,7 @@ vuint8mf4_t test_vrsub_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrsub_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m1_tum( @@ -633,7 +633,7 @@ vuint8mf2_t test_vrsub_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrsub_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m2_tum( @@ -642,7 +642,7 @@ vuint8m1_t test_vrsub_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrsub_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m4_tum( @@ -651,7 +651,7 @@ vuint8m2_t test_vrsub_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrsub_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m8_tum( @@ -660,7 +660,7 @@ vuint8m4_t test_vrsub_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrsub_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf4_tum( @@ -669,7 +669,7 @@ vuint8m8_t test_vrsub_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrsub_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf2_tum( @@ -678,7 +678,7 @@ vuint16mf4_t test_vrsub_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrsub_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m1_tum( @@ -687,7 +687,7 @@ vuint16mf2_t test_vrsub_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrsub_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m2_tum( @@ -696,7 +696,7 @@ vuint16m1_t test_vrsub_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrsub_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m4_tum( @@ -705,7 +705,7 @@ vuint16m2_t test_vrsub_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrsub_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m8_tum( @@ -714,7 +714,7 @@ vuint16m4_t test_vrsub_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrsub_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32mf2_tum( @@ -723,7 +723,7 @@ vuint16m8_t test_vrsub_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrsub_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m1_tum( @@ -732,7 +732,7 @@ vuint32mf2_t test_vrsub_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrsub_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m2_tum( @@ -741,7 +741,7 @@ vuint32m1_t test_vrsub_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrsub_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m4_tum( @@ -750,7 +750,7 @@ vuint32m2_t test_vrsub_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrsub_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m8_tum( @@ -759,7 +759,7 @@ vuint32m4_t test_vrsub_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrsub_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m1_tum( @@ -768,7 +768,7 @@ vuint32m8_t test_vrsub_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrsub_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m2_tum( @@ -777,7 +777,7 @@ vuint64m1_t test_vrsub_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrsub_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m4_tum( @@ -786,7 +786,7 @@ vuint64m2_t test_vrsub_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrsub_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m4_t test_vrsub_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrsub_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vrsub_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrsub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf4_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vrsub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrsub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf2_tumu( @@ -822,7 +822,7 @@ vint8mf4_t test_vrsub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrsub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m1_tumu( @@ -831,7 +831,7 @@ vint8mf2_t test_vrsub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrsub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m2_tumu( @@ -840,7 +840,7 @@ vint8m1_t test_vrsub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrsub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m4_tumu( @@ -849,7 +849,7 @@ vint8m2_t test_vrsub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrsub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m8_tumu( @@ -858,7 +858,7 @@ vint8m4_t test_vrsub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrsub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf4_tumu( @@ -867,7 +867,7 @@ vint8m8_t test_vrsub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrsub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf2_tumu( @@ -876,7 +876,7 @@ vint16mf4_t test_vrsub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrsub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m1_tumu( @@ -885,7 +885,7 @@ vint16mf2_t test_vrsub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrsub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m2_tumu( @@ -894,7 +894,7 @@ vint16m1_t test_vrsub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrsub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m4_tumu( @@ -903,7 +903,7 @@ vint16m2_t test_vrsub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrsub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m8_tumu( @@ -912,7 +912,7 @@ vint16m4_t test_vrsub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrsub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32mf2_tumu( @@ -921,7 +921,7 @@ vint16m8_t test_vrsub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrsub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m1_tumu( @@ -930,7 +930,7 @@ vint32mf2_t test_vrsub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrsub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m2_tumu( @@ -939,7 +939,7 @@ vint32m1_t test_vrsub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrsub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m4_tumu( @@ -948,7 +948,7 @@ vint32m2_t test_vrsub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrsub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m8_tumu( @@ -957,7 +957,7 @@ vint32m4_t test_vrsub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrsub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m1_tumu( @@ -966,7 +966,7 @@ vint32m8_t test_vrsub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrsub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m2_tumu( @@ -975,7 +975,7 @@ vint64m1_t test_vrsub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrsub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m4_tumu( @@ -984,7 +984,7 @@ vint64m2_t test_vrsub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrsub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m8_tumu( @@ -993,7 +993,7 @@ vint64m4_t test_vrsub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrsub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf8_tumu( @@ -1002,7 +1002,7 @@ vint64m8_t test_vrsub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrsub_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf4_tumu( @@ -1011,7 +1011,7 @@ vuint8mf8_t test_vrsub_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrsub_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf2_tumu( @@ -1020,7 +1020,7 @@ vuint8mf4_t test_vrsub_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrsub_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m1_tumu( @@ -1029,7 +1029,7 @@ vuint8mf2_t test_vrsub_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrsub_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m2_tumu( @@ -1038,7 +1038,7 @@ vuint8m1_t test_vrsub_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrsub_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m4_tumu( @@ -1047,7 +1047,7 @@ vuint8m2_t test_vrsub_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrsub_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m8_tumu( @@ -1056,7 +1056,7 @@ vuint8m4_t test_vrsub_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrsub_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf4_tumu( @@ -1065,7 +1065,7 @@ vuint8m8_t test_vrsub_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrsub_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf2_tumu( @@ -1074,7 +1074,7 @@ vuint16mf4_t test_vrsub_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrsub_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m1_tumu( @@ -1083,7 +1083,7 @@ vuint16mf2_t test_vrsub_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrsub_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m2_tumu( @@ -1092,7 +1092,7 @@ vuint16m1_t test_vrsub_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrsub_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m4_tumu( @@ -1101,7 +1101,7 @@ vuint16m2_t test_vrsub_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrsub_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m8_tumu( @@ -1110,7 +1110,7 @@ vuint16m4_t test_vrsub_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrsub_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32mf2_tumu( @@ -1119,7 +1119,7 @@ vuint16m8_t test_vrsub_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrsub_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m1_tumu( @@ -1128,7 +1128,7 @@ vuint32mf2_t test_vrsub_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrsub_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m2_tumu( @@ -1137,7 +1137,7 @@ vuint32m1_t test_vrsub_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrsub_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m4_tumu( @@ -1146,7 +1146,7 @@ vuint32m2_t test_vrsub_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrsub_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m8_tumu( @@ -1155,7 +1155,7 @@ vuint32m4_t test_vrsub_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrsub_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m1_tumu( @@ -1164,7 +1164,7 @@ vuint32m8_t test_vrsub_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrsub_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m2_tumu( @@ -1173,7 +1173,7 @@ vuint64m1_t test_vrsub_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrsub_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m4_tumu( @@ -1182,7 +1182,7 @@ vuint64m2_t test_vrsub_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrsub_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m4_t test_vrsub_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrsub_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vrsub_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vrsub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf4_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vrsub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vrsub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8mf2_mu( @@ -1218,7 +1218,7 @@ vint8mf4_t test_vrsub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vrsub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m1_mu( @@ -1227,7 +1227,7 @@ vint8mf2_t test_vrsub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vrsub_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m2_mu( @@ -1236,7 +1236,7 @@ vint8m1_t test_vrsub_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vrsub_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m4_mu( @@ -1245,7 +1245,7 @@ vint8m2_t test_vrsub_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vrsub_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i8m8_mu( @@ -1254,7 +1254,7 @@ vint8m4_t test_vrsub_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vrsub_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vrsub_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf4_mu( @@ -1263,7 +1263,7 @@ vint8m8_t test_vrsub_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vrsub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16mf2_mu( @@ -1272,7 +1272,7 @@ vint16mf4_t test_vrsub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vrsub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m1_mu( @@ -1281,7 +1281,7 @@ vint16mf2_t test_vrsub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vrsub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m2_mu( @@ -1290,7 +1290,7 @@ vint16m1_t test_vrsub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vrsub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m4_mu( @@ -1299,7 +1299,7 @@ vint16m2_t test_vrsub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vrsub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i16m8_mu( @@ -1308,7 +1308,7 @@ vint16m4_t test_vrsub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vrsub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vrsub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32mf2_mu( @@ -1317,7 +1317,7 @@ vint16m8_t test_vrsub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vrsub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m1_mu( @@ -1326,7 +1326,7 @@ vint32mf2_t test_vrsub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vrsub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m2_mu( @@ -1335,7 +1335,7 @@ vint32m1_t test_vrsub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vrsub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m4_mu( @@ -1344,7 +1344,7 @@ vint32m2_t test_vrsub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vrsub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i32m8_mu( @@ -1353,7 +1353,7 @@ vint32m4_t test_vrsub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vrsub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vrsub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m1_mu( @@ -1362,7 +1362,7 @@ vint32m8_t test_vrsub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vrsub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m2_mu( @@ -1371,7 +1371,7 @@ vint64m1_t test_vrsub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vrsub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m4_mu( @@ -1380,7 +1380,7 @@ vint64m2_t test_vrsub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vrsub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_i64m8_mu( @@ -1389,7 +1389,7 @@ vint64m4_t test_vrsub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vrsub_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vrsub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf8_mu( @@ -1398,7 +1398,7 @@ vint64m8_t test_vrsub_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vrsub_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf4_mu( @@ -1407,7 +1407,7 @@ vuint8mf8_t test_vrsub_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vrsub_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8mf2_mu( @@ -1416,7 +1416,7 @@ vuint8mf4_t test_vrsub_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vrsub_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m1_mu( @@ -1425,7 +1425,7 @@ vuint8mf2_t test_vrsub_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vrsub_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m2_mu( @@ -1434,7 +1434,7 @@ vuint8m1_t test_vrsub_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vrsub_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m4_mu( @@ -1443,7 +1443,7 @@ vuint8m2_t test_vrsub_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vrsub_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u8m8_mu( @@ -1452,7 +1452,7 @@ vuint8m4_t test_vrsub_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vrsub_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vrsub_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf4_mu( @@ -1461,7 +1461,7 @@ vuint8m8_t test_vrsub_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vrsub_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16mf2_mu( @@ -1470,7 +1470,7 @@ vuint16mf4_t test_vrsub_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vrsub_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m1_mu( @@ -1479,7 +1479,7 @@ vuint16mf2_t test_vrsub_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vrsub_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m2_mu( @@ -1488,7 +1488,7 @@ vuint16m1_t test_vrsub_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vrsub_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m4_mu( @@ -1497,7 +1497,7 @@ vuint16m2_t test_vrsub_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vrsub_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u16m8_mu( @@ -1506,7 +1506,7 @@ vuint16m4_t test_vrsub_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vrsub_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vrsub_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32mf2_mu( @@ -1515,7 +1515,7 @@ vuint16m8_t test_vrsub_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vrsub_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m1_mu( @@ -1524,7 +1524,7 @@ vuint32mf2_t test_vrsub_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vrsub_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m2_mu( @@ -1533,7 +1533,7 @@ vuint32m1_t test_vrsub_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vrsub_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m4_mu( @@ -1542,7 +1542,7 @@ vuint32m2_t test_vrsub_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vrsub_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u32m8_mu( @@ -1551,7 +1551,7 @@ vuint32m4_t test_vrsub_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vrsub_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vrsub_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m1_mu( @@ -1560,7 +1560,7 @@ vuint32m8_t test_vrsub_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vrsub_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m2_mu( @@ -1569,7 +1569,7 @@ vuint64m1_t test_vrsub_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vrsub_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m4_mu( @@ -1578,7 +1578,7 @@ vuint64m2_t test_vrsub_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vrsub_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vrsub_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m4_t test_vrsub_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vrsub_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vrsub_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vrsub_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsadd.c index be64e2ea6945c97ff3be90dd6e9830c375ed940f..bd523a9820a9c9105a979d3323f16c96d9645052 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsadd.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsadd_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vsadd_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vsadd_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsadd_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vsadd_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vsadd_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsadd_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vsadd_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vsadd_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsadd_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vsadd_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vsadd_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsadd_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vsadd_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vsadd_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsadd_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vsadd_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vsadd_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsadd_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vsadd_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vsadd_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsadd_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vsadd_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vsadd_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsadd_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vsadd_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vsadd_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsadd_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vsadd_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vsadd_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsadd_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vsadd_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vsadd_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsadd_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vsadd_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vsadd_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsadd_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vsadd_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vsadd_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsadd_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vsadd_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vsadd_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsadd_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vsadd_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vsadd_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsadd_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vsadd_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vsadd_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsadd_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vsadd_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vsadd_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsadd_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vsadd_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vsadd_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsadd_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vsadd_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vsadd_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsadd_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vsadd_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vsadd_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsadd_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vsadd_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vsadd_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsadd_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vsadd_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vsadd_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsadd_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vsadd_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vsadd_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsadd_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vsadd_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vsadd_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsadd_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vsadd_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vsadd_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsadd_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vsadd_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vsadd_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsadd_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vsadd_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vsadd_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsadd_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vsadd_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vsadd_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsadd_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vsadd_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vsadd_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsadd_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vsadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vsadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsadd_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vsadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vsadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsadd_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vsadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vsadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsadd_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vsadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vsadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsadd_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vsadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vsadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsadd_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vsadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vsadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsadd_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vsadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vsadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsadd_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vsadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vsadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsadd_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vsadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vsadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsadd_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vsadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vsadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsadd_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vsadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vsadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsadd_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vsadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vsadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsadd_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vsadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vsadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsadd_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vsadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vsadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsadd_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vsadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vsadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsadd_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vsadd_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vsadd_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsadd_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vsadd_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vsadd_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsadd_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vsadd_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vsadd_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsadd_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vsadd_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vsadd_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsadd_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vsadd_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vsadd_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsadd_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vsadd_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vsadd_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsadd_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vsadd_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vsadd_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsadd_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vsadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vsadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsadd_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vsadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vsadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsadd_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vsadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vsadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsadd_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vsadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vsadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsadd_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vsadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vsadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsadd_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vsadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vsadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsadd_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vsadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vsadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vsadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vsadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsadd_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vsadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vsadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsadd_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vsadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vsadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsadd_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vsadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vsadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsadd_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vsadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vsadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsadd_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vsadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vsadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsadd_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vsadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vsadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsadd_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vsadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vsadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsadd_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vsadd_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsadd_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vsadd_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsadd_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vsadd_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsadd_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vsadd_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsadd_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vsadd_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsadd_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vsadd_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsadd_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vsadd_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsadd_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vsadd_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsadd_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vsadd_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsadd_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vsadd_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsadd_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vsadd_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsadd_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vsadd_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsadd_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vsadd_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsadd_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsadd_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vsadd_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsadd_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vsadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vsadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsadd_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vsadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vsadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsadd_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vsadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vsadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsadd_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vsadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vsadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsadd_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vsadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vsadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsadd_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vsadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsadd_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vsadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsadd_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vsadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vsadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsadd_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vsadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vsadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsadd_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vsadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vsadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsadd_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vsadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vsadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsadd_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vsadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsadd_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vsadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsadd_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vsadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vsadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsadd_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vsadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vsadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsadd_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vsadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vsadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsadd_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsadd_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vsadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsadd_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsadd_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsadd_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsaddu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsaddu.c index 68e2dc78e619e3c53831f4c43c60806fc3ef1f39..de82cf2d4de60943d3783f40fec62de3e497ac31 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsaddu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsaddu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsaddu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vsaddu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vsaddu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsaddu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vsaddu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vsaddu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsaddu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vsaddu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vsaddu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsaddu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vsaddu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vsaddu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsaddu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vsaddu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vsaddu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsaddu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vsaddu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vsaddu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsaddu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vsaddu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vsaddu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsaddu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vsaddu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vsaddu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsaddu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vsaddu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vsaddu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsaddu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vsaddu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vsaddu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsaddu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vsaddu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vsaddu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsaddu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vsaddu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vsaddu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsaddu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vsaddu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vsaddu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsaddu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vsaddu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vsaddu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsaddu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vsaddu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vsaddu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsaddu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vsaddu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vsaddu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsaddu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vsaddu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vsaddu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsaddu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vsaddu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vsaddu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsaddu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vsaddu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vsaddu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsaddu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vsaddu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vsaddu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsaddu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vsaddu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vsaddu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsaddu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vsaddu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vsaddu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsaddu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsaddu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsaddu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsaddu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsaddu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsaddu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsaddu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsaddu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsaddu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsaddu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vsaddu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vsaddu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsaddu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vsaddu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vsaddu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsaddu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vsaddu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vsaddu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsaddu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vsaddu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vsaddu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsaddu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsaddu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsaddu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsaddu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsaddu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsaddu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsaddu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vsaddu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vsaddu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsaddu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vsaddu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vsaddu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsaddu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vsaddu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vsaddu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsaddu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vsaddu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vsaddu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsaddu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsaddu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsaddu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsaddu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vsaddu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vsaddu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsaddu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vsaddu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vsaddu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsaddu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vsaddu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vsaddu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsaddu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vsaddu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vsaddu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsaddu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vsaddu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vsaddu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsaddu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vsaddu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vsaddu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsaddu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vsaddu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vsaddu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsaddu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vsaddu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vsaddu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsaddu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vsaddu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vsaddu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsaddu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vsaddu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vsaddu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsaddu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vsaddu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vsaddu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsaddu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vsaddu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vsaddu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsaddu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vsaddu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vsaddu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsaddu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vsaddu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vsaddu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsaddu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vsaddu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vsaddu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsaddu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vsaddu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vsaddu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsaddu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vsaddu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vsaddu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsaddu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vsaddu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vsaddu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsaddu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vsaddu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vsaddu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsaddu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vsaddu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vsaddu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsaddu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vsaddu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vsaddu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsaddu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vsaddu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vsaddu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsaddu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vsaddu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vsaddu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsaddu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vsaddu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vsaddu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsaddu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vsaddu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vsaddu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsaddu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vsaddu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vsaddu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsaddu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vsaddu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vsaddu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsaddu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vsaddu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vsaddu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsaddu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vsaddu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vsaddu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsaddu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vsaddu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vsaddu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsaddu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vsaddu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsaddu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vsaddu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsaddu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vsaddu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsaddu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vsaddu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsaddu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vsaddu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsaddu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vsaddu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsaddu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vsaddu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsaddu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vsaddu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsaddu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vsaddu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsaddu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vsaddu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsaddu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vsaddu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsaddu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vsaddu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsaddu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vsaddu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsaddu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsaddu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vsaddu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsaddu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vsaddu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsaddu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vsaddu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsaddu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vsaddu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsaddu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vsaddu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsaddu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vsaddu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsaddu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vsaddu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsaddu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vsaddu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsaddu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vsaddu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsaddu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vsaddu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsaddu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vsaddu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsaddu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vsaddu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsaddu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsaddu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vsaddu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsaddu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vsaddu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsaddu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vsaddu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsaddu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vsaddu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsaddu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vsaddu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsaddu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vsaddu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsaddu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vsaddu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsaddu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vsaddu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsaddu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vsaddu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsaddu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vsaddu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsaddu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsaddu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vsaddu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsaddu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vsaddu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsaddu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vsaddu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsaddu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vsaddu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsaddu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vsaddu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsaddu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vsaddu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsaddu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vsaddu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsaddu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsaddu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vsaddu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsaddu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsaddu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsaddu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsbc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsbc.c index 4af7869eaa1c809a3c78ea5e2d0d86daa1f3f563..52d91696fea9441cfbe03271b0eb82d435e35e07 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsbc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsbc.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsbc_vvm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_i8mf8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8mf8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vsbc_vvm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsbc_vxm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_i8mf8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8mf8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vsbc_vxm_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsbc_vvm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_i8mf4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8mf4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vsbc_vvm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsbc_vxm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_i8mf4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8mf4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vsbc_vxm_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsbc_vvm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_i8mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vsbc_vvm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsbc_vxm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_i8mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vsbc_vxm_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsbc_vvm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_i8m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vsbc_vvm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsbc_vxm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_i8m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vsbc_vxm_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsbc_vvm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_i8m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vsbc_vvm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsbc_vxm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_i8m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vsbc_vxm_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsbc_vvm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vvm_i8m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vsbc_vvm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsbc_vxm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vxm_i8m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vsbc_vxm_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsbc_vvm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, vbool1_t borrowin, size_t vl) { - return vsbc_vvm_i8m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i8m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vsbc_vvm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsbc_vxm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, vbool1_t borrowin, size_t vl) { - return vsbc_vxm_i8m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i8m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vsbc_vxm_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsbc_vvm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_i16mf4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16mf4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vsbc_vvm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsbc_vxm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_i16mf4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16mf4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vsbc_vxm_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsbc_vvm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_i16mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vsbc_vvm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsbc_vxm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_i16mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vsbc_vxm_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsbc_vvm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_i16m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vsbc_vvm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsbc_vxm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_i16m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vsbc_vxm_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsbc_vvm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_i16m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vsbc_vvm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsbc_vxm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_i16m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vsbc_vxm_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsbc_vvm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_i16m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vsbc_vvm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsbc_vxm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_i16m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vsbc_vxm_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsbc_vvm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vvm_i16m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i16m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vsbc_vvm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsbc_vxm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vxm_i16m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i16m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vsbc_vxm_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsbc_vvm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_i32mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vsbc_vvm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsbc_vxm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_i32mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vsbc_vxm_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsbc_vvm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_i32m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vsbc_vvm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsbc_vxm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_i32m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vsbc_vxm_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsbc_vvm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_i32m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vsbc_vvm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsbc_vxm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_i32m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vsbc_vxm_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsbc_vvm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_i32m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vsbc_vvm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsbc_vxm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_i32m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vsbc_vxm_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsbc_vvm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_i32m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i32m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vsbc_vvm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsbc_vxm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_i32m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i32m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vsbc_vxm_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsbc_vvm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_i64m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i64m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vsbc_vvm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsbc_vxm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_i64m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i64m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vsbc_vxm_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsbc_vvm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_i64m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i64m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vsbc_vvm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsbc_vxm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_i64m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i64m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vsbc_vxm_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsbc_vvm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_i64m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i64m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vsbc_vvm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsbc_vxm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_i64m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i64m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vsbc_vxm_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsbc_vvm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_i64m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_i64m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vsbc_vvm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsbc_vxm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_i64m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_i64m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vsbc_vxm_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsbc_vvm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_u8mf8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8mf8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsbc_vvm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsbc_vxm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_u8mf8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8mf8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsbc_vxm_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsbc_vvm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_u8mf4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8mf4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsbc_vvm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsbc_vxm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_u8mf4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8mf4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsbc_vxm_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsbc_vvm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_u8mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsbc_vvm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsbc_vxm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_u8mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsbc_vxm_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsbc_vvm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_u8m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vsbc_vvm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsbc_vxm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_u8m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vsbc_vxm_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsbc_vvm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_u8m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vsbc_vvm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsbc_vxm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_u8m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vsbc_vxm_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsbc_vvm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vvm_u8m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vsbc_vvm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsbc_vxm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vxm_u8m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vsbc_vxm_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsbc_vvm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, vbool1_t borrowin, size_t vl) { - return vsbc_vvm_u8m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u8m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vsbc_vvm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsbc_vxm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, vbool1_t borrowin, size_t vl) { - return vsbc_vxm_u8m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u8m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vsbc_vxm_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsbc_vvm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_u16mf4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16mf4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsbc_vvm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsbc_vxm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_u16mf4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16mf4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsbc_vxm_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsbc_vvm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_u16mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsbc_vvm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsbc_vxm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_u16mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsbc_vxm_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsbc_vvm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_u16m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vsbc_vvm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsbc_vxm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_u16m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vsbc_vxm_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsbc_vvm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_u16m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vsbc_vvm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsbc_vxm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_u16m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vsbc_vxm_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsbc_vvm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_u16m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vsbc_vvm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsbc_vxm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_u16m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vsbc_vxm_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsbc_vvm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vvm_u16m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u16m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vsbc_vvm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsbc_vxm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, vbool2_t borrowin, size_t vl) { - return vsbc_vxm_u16m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u16m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vsbc_vxm_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsbc_vvm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_u32mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsbc_vvm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsbc_vxm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_u32mf2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32mf2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsbc_vxm_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsbc_vvm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_u32m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vsbc_vvm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsbc_vxm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_u32m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vsbc_vxm_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsbc_vvm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_u32m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vsbc_vvm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsbc_vxm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_u32m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vsbc_vxm_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsbc_vvm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_u32m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vsbc_vvm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsbc_vxm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_u32m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vsbc_vxm_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsbc_vvm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vvm_u32m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u32m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vsbc_vvm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsbc_vxm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, vbool4_t borrowin, size_t vl) { - return vsbc_vxm_u32m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u32m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vsbc_vxm_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsbc_vvm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vvm_u64m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u64m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vsbc_vvm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsbc_vxm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, vbool64_t borrowin, size_t vl) { - return vsbc_vxm_u64m1_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u64m1_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vsbc_vxm_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsbc_vvm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vvm_u64m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u64m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vsbc_vvm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsbc_vxm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, vbool32_t borrowin, size_t vl) { - return vsbc_vxm_u64m2_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u64m2_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vsbc_vxm_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsbc_vvm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vvm_u64m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u64m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vsbc_vvm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsbc_vxm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, vbool16_t borrowin, size_t vl) { - return vsbc_vxm_u64m4_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u64m4_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vvm_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vsbc_vxm_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsbc_vvm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vvm_u64m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vvm_u64m8_tu(maskedoff, op1, op2, borrowin, vl); } // CHECK-RV64-LABEL: @test_vsbc_vxm_u64m8_tu( @@ -795,6 +795,6 @@ vuint64m8_t test_vsbc_vvm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsbc_vxm_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, vbool8_t borrowin, size_t vl) { - return vsbc_vxm_u64m8_tu(maskedoff, op1, op2, borrowin, vl); + return __riscv_vsbc_vxm_u64m8_tu(maskedoff, op1, op2, borrowin, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsext.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsext.c index 3459a2e0d6dba30869aab5f713b60ab0a8306589..d92d678f36fef247bf1299b61eac2a0c7f9f50c8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsext.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsext.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsext_vf2_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf2_i16mf4_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf2_tu( @@ -21,7 +21,7 @@ vint16mf4_t test_vsext_vf2_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsext_vf2_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf2_i16mf2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m1_tu( @@ -30,7 +30,7 @@ vint16mf2_t test_vsext_vf2_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsext_vf2_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf2_i16m1_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m2_tu( @@ -39,7 +39,7 @@ vint16m1_t test_vsext_vf2_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsext_vf2_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf2_i16m2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m4_tu( @@ -48,7 +48,7 @@ vint16m2_t test_vsext_vf2_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsext_vf2_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, size_t vl) { - return vsext_vf2_i16m4_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m8_tu( @@ -57,7 +57,7 @@ vint16m4_t test_vsext_vf2_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsext_vf2_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, size_t vl) { - return vsext_vf2_i16m8_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32mf2_tu( @@ -66,7 +66,7 @@ vint16m8_t test_vsext_vf2_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf4_i32mf2_tu(vint32mf2_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf4_i32mf2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m1_tu( @@ -75,7 +75,7 @@ vint32mf2_t test_vsext_vf4_i32mf2_tu(vint32mf2_t maskedoff, vint8mf8_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf4_i32m1_tu(vint32m1_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf4_i32m1_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m2_tu( @@ -84,7 +84,7 @@ vint32m1_t test_vsext_vf4_i32m1_tu(vint32m1_t maskedoff, vint8mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf4_i32m2_tu(vint32m2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf4_i32m2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m4_tu( @@ -93,7 +93,7 @@ vint32m2_t test_vsext_vf4_i32m2_tu(vint32m2_t maskedoff, vint8mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf4_i32m4_tu(vint32m4_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf4_i32m4_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m8_tu( @@ -102,7 +102,7 @@ vint32m4_t test_vsext_vf4_i32m4_tu(vint32m4_t maskedoff, vint8m1_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf4_i32m8_tu(vint32m8_t maskedoff, vint8m2_t op1, size_t vl) { - return vsext_vf4_i32m8_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m1_tu( @@ -111,7 +111,7 @@ vint32m8_t test_vsext_vf4_i32m8_tu(vint32m8_t maskedoff, vint8m2_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf8_i64m1_tu(vint64m1_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf8_i64m1_tu(maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m2_tu( @@ -120,7 +120,7 @@ vint64m1_t test_vsext_vf8_i64m1_tu(vint64m1_t maskedoff, vint8mf8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf8_i64m2_tu(vint64m2_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf8_i64m2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m4_tu( @@ -129,7 +129,7 @@ vint64m2_t test_vsext_vf8_i64m2_tu(vint64m2_t maskedoff, vint8mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf8_i64m4_tu(vint64m4_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf8_i64m4_tu(maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m8_tu( @@ -138,7 +138,7 @@ vint64m4_t test_vsext_vf8_i64m4_tu(vint64m4_t maskedoff, vint8mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf8_i64m8_tu(vint64m8_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf8_i64m8_tu(maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32mf2_tu( @@ -147,7 +147,7 @@ vint64m8_t test_vsext_vf8_i64m8_tu(vint64m8_t maskedoff, vint8m1_t op1, size_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf2_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, size_t vl) { - return vsext_vf2_i32mf2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m1_tu( @@ -156,7 +156,7 @@ vint32mf2_t test_vsext_vf2_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf2_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, size_t vl) { - return vsext_vf2_i32m1_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m2_tu( @@ -165,7 +165,7 @@ vint32m1_t test_vsext_vf2_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf2_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, size_t vl) { - return vsext_vf2_i32m2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m4_tu( @@ -174,7 +174,7 @@ vint32m2_t test_vsext_vf2_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf2_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, size_t vl) { - return vsext_vf2_i32m4_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m8_tu( @@ -183,7 +183,7 @@ vint32m4_t test_vsext_vf2_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf2_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, size_t vl) { - return vsext_vf2_i32m8_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m1_tu( @@ -192,7 +192,7 @@ vint32m8_t test_vsext_vf2_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf4_i64m1_tu(vint64m1_t maskedoff, vint16mf4_t op1, size_t vl) { - return vsext_vf4_i64m1_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m2_tu( @@ -201,7 +201,7 @@ vint64m1_t test_vsext_vf4_i64m1_tu(vint64m1_t maskedoff, vint16mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf4_i64m2_tu(vint64m2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vsext_vf4_i64m2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m4_tu( @@ -210,7 +210,7 @@ vint64m2_t test_vsext_vf4_i64m2_tu(vint64m2_t maskedoff, vint16mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf4_i64m4_tu(vint64m4_t maskedoff, vint16m1_t op1, size_t vl) { - return vsext_vf4_i64m4_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m8_tu( @@ -219,7 +219,7 @@ vint64m4_t test_vsext_vf4_i64m4_tu(vint64m4_t maskedoff, vint16m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf4_i64m8_tu(vint64m8_t maskedoff, vint16m2_t op1, size_t vl) { - return vsext_vf4_i64m8_tu(maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m1_tu( @@ -228,7 +228,7 @@ vint64m8_t test_vsext_vf4_i64m8_tu(vint64m8_t maskedoff, vint16m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf2_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, size_t vl) { - return vsext_vf2_i64m1_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m2_tu( @@ -237,7 +237,7 @@ vint64m1_t test_vsext_vf2_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf2_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, size_t vl) { - return vsext_vf2_i64m2_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m4_tu( @@ -246,7 +246,7 @@ vint64m2_t test_vsext_vf2_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf2_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, size_t vl) { - return vsext_vf2_i64m4_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m8_tu( @@ -255,7 +255,7 @@ vint64m4_t test_vsext_vf2_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf2_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, size_t vl) { - return vsext_vf2_i64m8_tu(maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf4_tum( @@ -264,7 +264,7 @@ vint64m8_t test_vsext_vf2_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsext_vf2_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf2_i16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf2_tum( @@ -273,7 +273,7 @@ vint16mf4_t test_vsext_vf2_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsext_vf2_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf2_i16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m1_tum( @@ -282,7 +282,7 @@ vint16mf2_t test_vsext_vf2_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsext_vf2_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf2_i16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m2_tum( @@ -291,7 +291,7 @@ vint16m1_t test_vsext_vf2_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsext_vf2_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf2_i16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m4_tum( @@ -300,7 +300,7 @@ vint16m2_t test_vsext_vf2_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsext_vf2_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, size_t vl) { - return vsext_vf2_i16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m8_tum( @@ -309,7 +309,7 @@ vint16m4_t test_vsext_vf2_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsext_vf2_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, size_t vl) { - return vsext_vf2_i16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32mf2_tum( @@ -318,7 +318,7 @@ vint16m8_t test_vsext_vf2_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf4_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf4_i32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m1_tum( @@ -327,7 +327,7 @@ vint32mf2_t test_vsext_vf4_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf4_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf4_i32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m2_tum( @@ -336,7 +336,7 @@ vint32m1_t test_vsext_vf4_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf4_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf4_i32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m4_tum( @@ -345,7 +345,7 @@ vint32m2_t test_vsext_vf4_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf4_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf4_i32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m8_tum( @@ -354,7 +354,7 @@ vint32m4_t test_vsext_vf4_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf4_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint8m2_t op1, size_t vl) { - return vsext_vf4_i32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m1_tum( @@ -363,7 +363,7 @@ vint32m8_t test_vsext_vf4_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf8_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf8_i64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m2_tum( @@ -372,7 +372,7 @@ vint64m1_t test_vsext_vf8_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf8_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf8_i64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m4_tum( @@ -381,7 +381,7 @@ vint64m2_t test_vsext_vf8_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf8_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf8_i64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m8_tum( @@ -390,7 +390,7 @@ vint64m4_t test_vsext_vf8_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf8_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf8_i64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32mf2_tum( @@ -399,7 +399,7 @@ vint64m8_t test_vsext_vf8_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf2_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, size_t vl) { - return vsext_vf2_i32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m1_tum( @@ -408,7 +408,7 @@ vint32mf2_t test_vsext_vf2_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf2_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, size_t vl) { - return vsext_vf2_i32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m2_tum( @@ -417,7 +417,7 @@ vint32m1_t test_vsext_vf2_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf2_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, size_t vl) { - return vsext_vf2_i32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m4_tum( @@ -426,7 +426,7 @@ vint32m2_t test_vsext_vf2_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf2_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, size_t vl) { - return vsext_vf2_i32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m8_tum( @@ -435,7 +435,7 @@ vint32m4_t test_vsext_vf2_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf2_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, size_t vl) { - return vsext_vf2_i32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m1_tum( @@ -444,7 +444,7 @@ vint32m8_t test_vsext_vf2_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf4_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint16mf4_t op1, size_t vl) { - return vsext_vf4_i64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m2_tum( @@ -453,7 +453,7 @@ vint64m1_t test_vsext_vf4_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf4_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vsext_vf4_i64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m4_tum( @@ -462,7 +462,7 @@ vint64m2_t test_vsext_vf4_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf4_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint16m1_t op1, size_t vl) { - return vsext_vf4_i64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m8_tum( @@ -471,7 +471,7 @@ vint64m4_t test_vsext_vf4_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf4_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint16m2_t op1, size_t vl) { - return vsext_vf4_i64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m1_tum( @@ -480,7 +480,7 @@ vint64m8_t test_vsext_vf4_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf2_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, size_t vl) { - return vsext_vf2_i64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m2_tum( @@ -489,7 +489,7 @@ vint64m1_t test_vsext_vf2_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf2_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, size_t vl) { - return vsext_vf2_i64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m4_tum( @@ -498,7 +498,7 @@ vint64m2_t test_vsext_vf2_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf2_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, size_t vl) { - return vsext_vf2_i64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m8_tum( @@ -507,7 +507,7 @@ vint64m4_t test_vsext_vf2_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf2_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, size_t vl) { - return vsext_vf2_i64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf4_tumu( @@ -516,7 +516,7 @@ vint64m8_t test_vsext_vf2_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsext_vf2_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf2_i16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf2_tumu( @@ -525,7 +525,7 @@ vint16mf4_t test_vsext_vf2_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsext_vf2_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf2_i16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m1_tumu( @@ -534,7 +534,7 @@ vint16mf2_t test_vsext_vf2_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsext_vf2_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf2_i16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m2_tumu( @@ -543,7 +543,7 @@ vint16m1_t test_vsext_vf2_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsext_vf2_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf2_i16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m4_tumu( @@ -552,7 +552,7 @@ vint16m2_t test_vsext_vf2_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsext_vf2_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, size_t vl) { - return vsext_vf2_i16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m8_tumu( @@ -561,7 +561,7 @@ vint16m4_t test_vsext_vf2_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsext_vf2_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, size_t vl) { - return vsext_vf2_i16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32mf2_tumu( @@ -570,7 +570,7 @@ vint16m8_t test_vsext_vf2_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf4_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf4_i32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m1_tumu( @@ -579,7 +579,7 @@ vint32mf2_t test_vsext_vf4_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf4_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf4_i32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m2_tumu( @@ -588,7 +588,7 @@ vint32m1_t test_vsext_vf4_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf4_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf4_i32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m4_tumu( @@ -597,7 +597,7 @@ vint32m2_t test_vsext_vf4_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf4_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf4_i32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m8_tumu( @@ -606,7 +606,7 @@ vint32m4_t test_vsext_vf4_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf4_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint8m2_t op1, size_t vl) { - return vsext_vf4_i32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m1_tumu( @@ -615,7 +615,7 @@ vint32m8_t test_vsext_vf4_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf8_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf8_i64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m2_tumu( @@ -624,7 +624,7 @@ vint64m1_t test_vsext_vf8_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf8_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf8_i64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m4_tumu( @@ -633,7 +633,7 @@ vint64m2_t test_vsext_vf8_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf8_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf8_i64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m8_tumu( @@ -642,7 +642,7 @@ vint64m4_t test_vsext_vf8_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf8_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf8_i64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32mf2_tumu( @@ -651,7 +651,7 @@ vint64m8_t test_vsext_vf8_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf2_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, size_t vl) { - return vsext_vf2_i32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m1_tumu( @@ -660,7 +660,7 @@ vint32mf2_t test_vsext_vf2_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf2_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, size_t vl) { - return vsext_vf2_i32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m2_tumu( @@ -669,7 +669,7 @@ vint32m1_t test_vsext_vf2_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf2_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, size_t vl) { - return vsext_vf2_i32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m4_tumu( @@ -678,7 +678,7 @@ vint32m2_t test_vsext_vf2_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf2_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, size_t vl) { - return vsext_vf2_i32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m8_tumu( @@ -687,7 +687,7 @@ vint32m4_t test_vsext_vf2_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf2_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, size_t vl) { - return vsext_vf2_i32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m1_tumu( @@ -696,7 +696,7 @@ vint32m8_t test_vsext_vf2_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf4_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint16mf4_t op1, size_t vl) { - return vsext_vf4_i64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m2_tumu( @@ -705,7 +705,7 @@ vint64m1_t test_vsext_vf4_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf4_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vsext_vf4_i64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m4_tumu( @@ -714,7 +714,7 @@ vint64m2_t test_vsext_vf4_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf4_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint16m1_t op1, size_t vl) { - return vsext_vf4_i64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m8_tumu( @@ -723,7 +723,7 @@ vint64m4_t test_vsext_vf4_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf4_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint16m2_t op1, size_t vl) { - return vsext_vf4_i64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m1_tumu( @@ -732,7 +732,7 @@ vint64m8_t test_vsext_vf4_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf2_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, size_t vl) { - return vsext_vf2_i64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m2_tumu( @@ -741,7 +741,7 @@ vint64m1_t test_vsext_vf2_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf2_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, size_t vl) { - return vsext_vf2_i64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m4_tumu( @@ -750,7 +750,7 @@ vint64m2_t test_vsext_vf2_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf2_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, size_t vl) { - return vsext_vf2_i64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m8_tumu( @@ -759,7 +759,7 @@ vint64m4_t test_vsext_vf2_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf2_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, size_t vl) { - return vsext_vf2_i64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf4_mu( @@ -768,7 +768,7 @@ vint64m8_t test_vsext_vf2_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsext_vf2_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf2_i16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16mf2_mu( @@ -777,7 +777,7 @@ vint16mf4_t test_vsext_vf2_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsext_vf2_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf2_i16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m1_mu( @@ -786,7 +786,7 @@ vint16mf2_t test_vsext_vf2_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsext_vf2_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf2_i16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m2_mu( @@ -795,7 +795,7 @@ vint16m1_t test_vsext_vf2_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsext_vf2_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf2_i16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m4_mu( @@ -804,7 +804,7 @@ vint16m2_t test_vsext_vf2_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsext_vf2_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, size_t vl) { - return vsext_vf2_i16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i16m8_mu( @@ -813,7 +813,7 @@ vint16m4_t test_vsext_vf2_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsext_vf2_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, size_t vl) { - return vsext_vf2_i16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32mf2_mu( @@ -822,7 +822,7 @@ vint16m8_t test_vsext_vf2_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf4_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf4_i32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m1_mu( @@ -831,7 +831,7 @@ vint32mf2_t test_vsext_vf4_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf4_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf4_i32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m2_mu( @@ -840,7 +840,7 @@ vint32m1_t test_vsext_vf4_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf4_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf4_i32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m4_mu( @@ -849,7 +849,7 @@ vint32m2_t test_vsext_vf4_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf4_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf4_i32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i32m8_mu( @@ -858,7 +858,7 @@ vint32m4_t test_vsext_vf4_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf4_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint8m2_t op1, size_t vl) { - return vsext_vf4_i32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m1_mu( @@ -867,7 +867,7 @@ vint32m8_t test_vsext_vf4_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf8_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint8mf8_t op1, size_t vl) { - return vsext_vf8_i64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m2_mu( @@ -876,7 +876,7 @@ vint64m1_t test_vsext_vf8_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf8_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint8mf4_t op1, size_t vl) { - return vsext_vf8_i64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m4_mu( @@ -885,7 +885,7 @@ vint64m2_t test_vsext_vf8_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf8_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint8mf2_t op1, size_t vl) { - return vsext_vf8_i64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf8_i64m8_mu( @@ -894,7 +894,7 @@ vint64m4_t test_vsext_vf8_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf8_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint8m1_t op1, size_t vl) { - return vsext_vf8_i64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf8_i64m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32mf2_mu( @@ -903,7 +903,7 @@ vint64m8_t test_vsext_vf8_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsext_vf2_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, size_t vl) { - return vsext_vf2_i32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m1_mu( @@ -912,7 +912,7 @@ vint32mf2_t test_vsext_vf2_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsext_vf2_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, size_t vl) { - return vsext_vf2_i32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m2_mu( @@ -921,7 +921,7 @@ vint32m1_t test_vsext_vf2_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsext_vf2_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, size_t vl) { - return vsext_vf2_i32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m4_mu( @@ -930,7 +930,7 @@ vint32m2_t test_vsext_vf2_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsext_vf2_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, size_t vl) { - return vsext_vf2_i32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i32m8_mu( @@ -939,7 +939,7 @@ vint32m4_t test_vsext_vf2_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsext_vf2_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, size_t vl) { - return vsext_vf2_i32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m1_mu( @@ -948,7 +948,7 @@ vint32m8_t test_vsext_vf2_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf4_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint16mf4_t op1, size_t vl) { - return vsext_vf4_i64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m2_mu( @@ -957,7 +957,7 @@ vint64m1_t test_vsext_vf4_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf4_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint16mf2_t op1, size_t vl) { - return vsext_vf4_i64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m4_mu( @@ -966,7 +966,7 @@ vint64m2_t test_vsext_vf4_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf4_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint16m1_t op1, size_t vl) { - return vsext_vf4_i64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf4_i64m8_mu( @@ -975,7 +975,7 @@ vint64m4_t test_vsext_vf4_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf4_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint16m2_t op1, size_t vl) { - return vsext_vf4_i64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf4_i64m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m1_mu( @@ -984,7 +984,7 @@ vint64m8_t test_vsext_vf4_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsext_vf2_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, size_t vl) { - return vsext_vf2_i64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m2_mu( @@ -993,7 +993,7 @@ vint64m1_t test_vsext_vf2_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsext_vf2_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, size_t vl) { - return vsext_vf2_i64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m4_mu( @@ -1002,7 +1002,7 @@ vint64m2_t test_vsext_vf2_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsext_vf2_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, size_t vl) { - return vsext_vf2_i64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vsext_vf2_i64m8_mu( @@ -1011,6 +1011,6 @@ vint64m4_t test_vsext_vf2_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsext_vf2_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, size_t vl) { - return vsext_vf2_i64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vsext_vf2_i64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslide1down.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslide1down.c index 4585f27e5a50c88557c767aa1945dcf4116757f0..8cb70b71a2d4ad7e9d7c7f6379b694333f1168f5 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslide1down.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslide1down.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1down_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf4_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vslide1down_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1down_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf2_tu( @@ -30,7 +30,7 @@ vint8mf4_t test_vslide1down_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1down_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m1_tu( @@ -39,7 +39,7 @@ vint8mf2_t test_vslide1down_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1down_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m2_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vslide1down_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1down_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m4_tu( @@ -57,7 +57,7 @@ vint8m2_t test_vslide1down_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1down_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m8_tu( @@ -66,7 +66,7 @@ vint8m4_t test_vslide1down_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1down_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf4_tu( @@ -75,7 +75,7 @@ vint8m8_t test_vslide1down_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1down_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf2_tu( @@ -84,7 +84,7 @@ vint16mf4_t test_vslide1down_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1down_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m1_tu( @@ -93,7 +93,7 @@ vint16mf2_t test_vslide1down_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1down_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m2_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vslide1down_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1down_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m4_tu( @@ -111,7 +111,7 @@ vint16m2_t test_vslide1down_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1down_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m8_tu( @@ -120,7 +120,7 @@ vint16m4_t test_vslide1down_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1down_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32mf2_tu( @@ -129,7 +129,7 @@ vint16m8_t test_vslide1down_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1down_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m1_tu( @@ -138,7 +138,7 @@ vint32mf2_t test_vslide1down_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1down_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m2_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vslide1down_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1down_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m4_tu( @@ -156,7 +156,7 @@ vint32m2_t test_vslide1down_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1down_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m8_tu( @@ -165,7 +165,7 @@ vint32m4_t test_vslide1down_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1down_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m1_tu( @@ -174,7 +174,7 @@ vint32m8_t test_vslide1down_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1down_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m2_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vslide1down_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1down_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m4_tu( @@ -192,7 +192,7 @@ vint64m2_t test_vslide1down_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1down_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m8_tu( @@ -201,7 +201,7 @@ vint64m4_t test_vslide1down_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1down_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf8_tu( @@ -210,7 +210,7 @@ vint64m8_t test_vslide1down_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, in // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1down_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf4_tu( @@ -219,7 +219,7 @@ vuint8mf8_t test_vslide1down_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1down_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf2_tu( @@ -228,7 +228,7 @@ vuint8mf4_t test_vslide1down_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1down_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m1_tu( @@ -237,7 +237,7 @@ vuint8mf2_t test_vslide1down_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1down_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m2_tu( @@ -246,7 +246,7 @@ vuint8m1_t test_vslide1down_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1down_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m4_tu( @@ -255,7 +255,7 @@ vuint8m2_t test_vslide1down_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1down_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m8_tu( @@ -264,7 +264,7 @@ vuint8m4_t test_vslide1down_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1down_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf4_tu( @@ -273,7 +273,7 @@ vuint8m8_t test_vslide1down_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1down_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf2_tu( @@ -282,7 +282,7 @@ vuint16mf4_t test_vslide1down_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1down_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m1_tu( @@ -291,7 +291,7 @@ vuint16mf2_t test_vslide1down_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1down_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m2_tu( @@ -300,7 +300,7 @@ vuint16m1_t test_vslide1down_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1down_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m4_tu( @@ -309,7 +309,7 @@ vuint16m2_t test_vslide1down_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1down_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m8_tu( @@ -318,7 +318,7 @@ vuint16m4_t test_vslide1down_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1down_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32mf2_tu( @@ -327,7 +327,7 @@ vuint16m8_t test_vslide1down_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1down_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m1_tu( @@ -336,7 +336,7 @@ vuint32mf2_t test_vslide1down_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1down_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m2_tu( @@ -345,7 +345,7 @@ vuint32m1_t test_vslide1down_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1down_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m4_tu( @@ -354,7 +354,7 @@ vuint32m2_t test_vslide1down_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1down_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m8_tu( @@ -363,7 +363,7 @@ vuint32m4_t test_vslide1down_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1down_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m1_tu( @@ -372,7 +372,7 @@ vuint32m8_t test_vslide1down_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1down_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m2_tu( @@ -381,7 +381,7 @@ vuint64m1_t test_vslide1down_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1down_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m4_tu( @@ -390,7 +390,7 @@ vuint64m2_t test_vslide1down_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1down_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m4_t test_vslide1down_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1down_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vslide1down_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1down_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf4_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vslide1down_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1down_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf2_tum( @@ -426,7 +426,7 @@ vint8mf4_t test_vslide1down_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1down_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m1_tum( @@ -435,7 +435,7 @@ vint8mf2_t test_vslide1down_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1down_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m2_tum( @@ -444,7 +444,7 @@ vint8m1_t test_vslide1down_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1down_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m4_tum( @@ -453,7 +453,7 @@ vint8m2_t test_vslide1down_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1down_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m8_tum( @@ -462,7 +462,7 @@ vint8m4_t test_vslide1down_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1down_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf4_tum( @@ -471,7 +471,7 @@ vint8m8_t test_vslide1down_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1down_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf2_tum( @@ -480,7 +480,7 @@ vint16mf4_t test_vslide1down_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1down_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m1_tum( @@ -489,7 +489,7 @@ vint16mf2_t test_vslide1down_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1down_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m2_tum( @@ -498,7 +498,7 @@ vint16m1_t test_vslide1down_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1down_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m4_tum( @@ -507,7 +507,7 @@ vint16m2_t test_vslide1down_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1down_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m8_tum( @@ -516,7 +516,7 @@ vint16m4_t test_vslide1down_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1down_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32mf2_tum( @@ -525,7 +525,7 @@ vint16m8_t test_vslide1down_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1down_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m1_tum( @@ -534,7 +534,7 @@ vint32mf2_t test_vslide1down_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1down_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m2_tum( @@ -543,7 +543,7 @@ vint32m1_t test_vslide1down_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1down_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m4_tum( @@ -552,7 +552,7 @@ vint32m2_t test_vslide1down_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1down_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m8_tum( @@ -561,7 +561,7 @@ vint32m4_t test_vslide1down_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1down_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m1_tum( @@ -570,7 +570,7 @@ vint32m8_t test_vslide1down_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1down_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m2_tum( @@ -579,7 +579,7 @@ vint64m1_t test_vslide1down_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1down_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m4_tum( @@ -588,7 +588,7 @@ vint64m2_t test_vslide1down_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1down_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m8_tum( @@ -597,7 +597,7 @@ vint64m4_t test_vslide1down_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1down_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf8_tum( @@ -606,7 +606,7 @@ vint64m8_t test_vslide1down_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1down_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf4_tum( @@ -615,7 +615,7 @@ vuint8mf8_t test_vslide1down_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1down_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf2_tum( @@ -624,7 +624,7 @@ vuint8mf4_t test_vslide1down_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1down_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m1_tum( @@ -633,7 +633,7 @@ vuint8mf2_t test_vslide1down_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1down_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m2_tum( @@ -642,7 +642,7 @@ vuint8m1_t test_vslide1down_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1down_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m4_tum( @@ -651,7 +651,7 @@ vuint8m2_t test_vslide1down_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1down_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m8_tum( @@ -660,7 +660,7 @@ vuint8m4_t test_vslide1down_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1down_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf4_tum( @@ -669,7 +669,7 @@ vuint8m8_t test_vslide1down_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1down_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf2_tum( @@ -678,7 +678,7 @@ vuint16mf4_t test_vslide1down_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1down_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m1_tum( @@ -687,7 +687,7 @@ vuint16mf2_t test_vslide1down_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1down_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m2_tum( @@ -696,7 +696,7 @@ vuint16m1_t test_vslide1down_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1down_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m4_tum( @@ -705,7 +705,7 @@ vuint16m2_t test_vslide1down_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1down_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m8_tum( @@ -714,7 +714,7 @@ vuint16m4_t test_vslide1down_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1down_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32mf2_tum( @@ -723,7 +723,7 @@ vuint16m8_t test_vslide1down_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1down_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m1_tum( @@ -732,7 +732,7 @@ vuint32mf2_t test_vslide1down_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1down_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m2_tum( @@ -741,7 +741,7 @@ vuint32m1_t test_vslide1down_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1down_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m4_tum( @@ -750,7 +750,7 @@ vuint32m2_t test_vslide1down_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1down_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m8_tum( @@ -759,7 +759,7 @@ vuint32m4_t test_vslide1down_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1down_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m1_tum( @@ -768,7 +768,7 @@ vuint32m8_t test_vslide1down_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1down_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m2_tum( @@ -777,7 +777,7 @@ vuint64m1_t test_vslide1down_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1down_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m4_tum( @@ -786,7 +786,7 @@ vuint64m2_t test_vslide1down_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1down_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m4_t test_vslide1down_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1down_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vslide1down_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1down_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf4_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vslide1down_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1down_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf2_tumu( @@ -822,7 +822,7 @@ vint8mf4_t test_vslide1down_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1down_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m1_tumu( @@ -831,7 +831,7 @@ vint8mf2_t test_vslide1down_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1down_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m2_tumu( @@ -840,7 +840,7 @@ vint8m1_t test_vslide1down_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1down_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m4_tumu( @@ -849,7 +849,7 @@ vint8m2_t test_vslide1down_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1down_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m8_tumu( @@ -858,7 +858,7 @@ vint8m4_t test_vslide1down_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1down_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf4_tumu( @@ -867,7 +867,7 @@ vint8m8_t test_vslide1down_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1down_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf2_tumu( @@ -876,7 +876,7 @@ vint16mf4_t test_vslide1down_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1down_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m1_tumu( @@ -885,7 +885,7 @@ vint16mf2_t test_vslide1down_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1down_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m2_tumu( @@ -894,7 +894,7 @@ vint16m1_t test_vslide1down_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1down_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m4_tumu( @@ -903,7 +903,7 @@ vint16m2_t test_vslide1down_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1down_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m8_tumu( @@ -912,7 +912,7 @@ vint16m4_t test_vslide1down_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1down_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32mf2_tumu( @@ -921,7 +921,7 @@ vint16m8_t test_vslide1down_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1down_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m1_tumu( @@ -930,7 +930,7 @@ vint32mf2_t test_vslide1down_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1down_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m2_tumu( @@ -939,7 +939,7 @@ vint32m1_t test_vslide1down_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1down_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m4_tumu( @@ -948,7 +948,7 @@ vint32m2_t test_vslide1down_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1down_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m8_tumu( @@ -957,7 +957,7 @@ vint32m4_t test_vslide1down_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1down_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m1_tumu( @@ -966,7 +966,7 @@ vint32m8_t test_vslide1down_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1down_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m2_tumu( @@ -975,7 +975,7 @@ vint64m1_t test_vslide1down_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1down_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m4_tumu( @@ -984,7 +984,7 @@ vint64m2_t test_vslide1down_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1down_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m8_tumu( @@ -993,7 +993,7 @@ vint64m4_t test_vslide1down_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1down_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf8_tumu( @@ -1002,7 +1002,7 @@ vint64m8_t test_vslide1down_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1down_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf4_tumu( @@ -1011,7 +1011,7 @@ vuint8mf8_t test_vslide1down_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1down_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf2_tumu( @@ -1020,7 +1020,7 @@ vuint8mf4_t test_vslide1down_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1down_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m1_tumu( @@ -1029,7 +1029,7 @@ vuint8mf2_t test_vslide1down_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1down_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m2_tumu( @@ -1038,7 +1038,7 @@ vuint8m1_t test_vslide1down_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1down_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m4_tumu( @@ -1047,7 +1047,7 @@ vuint8m2_t test_vslide1down_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1down_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m8_tumu( @@ -1056,7 +1056,7 @@ vuint8m4_t test_vslide1down_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1down_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf4_tumu( @@ -1065,7 +1065,7 @@ vuint8m8_t test_vslide1down_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1down_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf2_tumu( @@ -1074,7 +1074,7 @@ vuint16mf4_t test_vslide1down_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1down_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m1_tumu( @@ -1083,7 +1083,7 @@ vuint16mf2_t test_vslide1down_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1down_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m2_tumu( @@ -1092,7 +1092,7 @@ vuint16m1_t test_vslide1down_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1down_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m4_tumu( @@ -1101,7 +1101,7 @@ vuint16m2_t test_vslide1down_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1down_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m8_tumu( @@ -1110,7 +1110,7 @@ vuint16m4_t test_vslide1down_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1down_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32mf2_tumu( @@ -1119,7 +1119,7 @@ vuint16m8_t test_vslide1down_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1down_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m1_tumu( @@ -1128,7 +1128,7 @@ vuint32mf2_t test_vslide1down_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1down_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m2_tumu( @@ -1137,7 +1137,7 @@ vuint32m1_t test_vslide1down_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1down_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m4_tumu( @@ -1146,7 +1146,7 @@ vuint32m2_t test_vslide1down_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1down_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m8_tumu( @@ -1155,7 +1155,7 @@ vuint32m4_t test_vslide1down_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1down_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m1_tumu( @@ -1164,7 +1164,7 @@ vuint32m8_t test_vslide1down_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1down_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m2_tumu( @@ -1173,7 +1173,7 @@ vuint64m1_t test_vslide1down_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1down_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m4_tumu( @@ -1182,7 +1182,7 @@ vuint64m2_t test_vslide1down_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1down_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m4_t test_vslide1down_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1down_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vslide1down_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1down_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf4_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vslide1down_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1down_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8mf2_mu( @@ -1218,7 +1218,7 @@ vint8mf4_t test_vslide1down_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1down_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m1_mu( @@ -1227,7 +1227,7 @@ vint8mf2_t test_vslide1down_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1down_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m2_mu( @@ -1236,7 +1236,7 @@ vint8m1_t test_vslide1down_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1down_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m4_mu( @@ -1245,7 +1245,7 @@ vint8m2_t test_vslide1down_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1down_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i8m8_mu( @@ -1254,7 +1254,7 @@ vint8m4_t test_vslide1down_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1down_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, int8_t value, size_t vl) { - return vslide1down_vx_i8m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i8m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf4_mu( @@ -1263,7 +1263,7 @@ vint8m8_t test_vslide1down_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1down_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16mf2_mu( @@ -1272,7 +1272,7 @@ vint16mf4_t test_vslide1down_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1down_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m1_mu( @@ -1281,7 +1281,7 @@ vint16mf2_t test_vslide1down_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1down_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m2_mu( @@ -1290,7 +1290,7 @@ vint16m1_t test_vslide1down_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1down_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m4_mu( @@ -1299,7 +1299,7 @@ vint16m2_t test_vslide1down_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1down_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i16m8_mu( @@ -1308,7 +1308,7 @@ vint16m4_t test_vslide1down_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1down_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, int16_t value, size_t vl) { - return vslide1down_vx_i16m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i16m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32mf2_mu( @@ -1317,7 +1317,7 @@ vint16m8_t test_vslide1down_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1down_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m1_mu( @@ -1326,7 +1326,7 @@ vint32mf2_t test_vslide1down_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1down_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m2_mu( @@ -1335,7 +1335,7 @@ vint32m1_t test_vslide1down_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1down_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m4_mu( @@ -1344,7 +1344,7 @@ vint32m2_t test_vslide1down_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1down_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i32m8_mu( @@ -1353,7 +1353,7 @@ vint32m4_t test_vslide1down_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1down_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, int32_t value, size_t vl) { - return vslide1down_vx_i32m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i32m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m1_mu( @@ -1362,7 +1362,7 @@ vint32m8_t test_vslide1down_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1down_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m2_mu( @@ -1371,7 +1371,7 @@ vint64m1_t test_vslide1down_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1down_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m4_mu( @@ -1380,7 +1380,7 @@ vint64m2_t test_vslide1down_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1down_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_i64m8_mu( @@ -1389,7 +1389,7 @@ vint64m4_t test_vslide1down_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1down_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, int64_t value, size_t vl) { - return vslide1down_vx_i64m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_i64m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf8_mu( @@ -1398,7 +1398,7 @@ vint64m8_t test_vslide1down_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1down_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf4_mu( @@ -1407,7 +1407,7 @@ vuint8mf8_t test_vslide1down_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1down_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8mf2_mu( @@ -1416,7 +1416,7 @@ vuint8mf4_t test_vslide1down_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1down_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m1_mu( @@ -1425,7 +1425,7 @@ vuint8mf2_t test_vslide1down_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1down_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m2_mu( @@ -1434,7 +1434,7 @@ vuint8m1_t test_vslide1down_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1down_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m4_mu( @@ -1443,7 +1443,7 @@ vuint8m2_t test_vslide1down_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1down_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u8m8_mu( @@ -1452,7 +1452,7 @@ vuint8m4_t test_vslide1down_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1down_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1down_vx_u8m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u8m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf4_mu( @@ -1461,7 +1461,7 @@ vuint8m8_t test_vslide1down_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1down_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16mf2_mu( @@ -1470,7 +1470,7 @@ vuint16mf4_t test_vslide1down_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1down_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m1_mu( @@ -1479,7 +1479,7 @@ vuint16mf2_t test_vslide1down_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1down_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m2_mu( @@ -1488,7 +1488,7 @@ vuint16m1_t test_vslide1down_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1down_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m4_mu( @@ -1497,7 +1497,7 @@ vuint16m2_t test_vslide1down_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1down_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u16m8_mu( @@ -1506,7 +1506,7 @@ vuint16m4_t test_vslide1down_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1down_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1down_vx_u16m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u16m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32mf2_mu( @@ -1515,7 +1515,7 @@ vuint16m8_t test_vslide1down_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1down_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m1_mu( @@ -1524,7 +1524,7 @@ vuint32mf2_t test_vslide1down_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1down_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m2_mu( @@ -1533,7 +1533,7 @@ vuint32m1_t test_vslide1down_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1down_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m4_mu( @@ -1542,7 +1542,7 @@ vuint32m2_t test_vslide1down_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1down_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u32m8_mu( @@ -1551,7 +1551,7 @@ vuint32m4_t test_vslide1down_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1down_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1down_vx_u32m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u32m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m1_mu( @@ -1560,7 +1560,7 @@ vuint32m8_t test_vslide1down_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1down_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m2_mu( @@ -1569,7 +1569,7 @@ vuint64m1_t test_vslide1down_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1down_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m4_mu( @@ -1578,7 +1578,7 @@ vuint64m2_t test_vslide1down_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1down_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1down_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m4_t test_vslide1down_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1down_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1down_vx_u64m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1down_vx_u64m8_mu(mask, maskedoff, src, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslide1up.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslide1up.c index ada227889796fe6adb8196258050531395df6085..9d6eb0515b549a24685126fa40f226109471f79b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslide1up.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslide1up.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1up_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf4_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vslide1up_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1up_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf2_tu( @@ -30,7 +30,7 @@ vint8mf4_t test_vslide1up_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1up_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m1_tu( @@ -39,7 +39,7 @@ vint8mf2_t test_vslide1up_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1up_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m2_tu( @@ -48,7 +48,7 @@ vint8m1_t test_vslide1up_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, int8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1up_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m4_tu( @@ -57,7 +57,7 @@ vint8m2_t test_vslide1up_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, int8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1up_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m8_tu( @@ -66,7 +66,7 @@ vint8m4_t test_vslide1up_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, int8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1up_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf4_tu( @@ -75,7 +75,7 @@ vint8m8_t test_vslide1up_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, int8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1up_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf2_tu( @@ -84,7 +84,7 @@ vint16mf4_t test_vslide1up_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1up_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m1_tu( @@ -93,7 +93,7 @@ vint16mf2_t test_vslide1up_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1up_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m2_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vslide1up_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1up_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m4_tu( @@ -111,7 +111,7 @@ vint16m2_t test_vslide1up_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1up_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m8_tu( @@ -120,7 +120,7 @@ vint16m4_t test_vslide1up_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1up_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32mf2_tu( @@ -129,7 +129,7 @@ vint16m8_t test_vslide1up_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1up_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m1_tu( @@ -138,7 +138,7 @@ vint32mf2_t test_vslide1up_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1up_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m2_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vslide1up_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1up_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m4_tu( @@ -156,7 +156,7 @@ vint32m2_t test_vslide1up_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1up_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m8_tu( @@ -165,7 +165,7 @@ vint32m4_t test_vslide1up_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1up_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m1_tu( @@ -174,7 +174,7 @@ vint32m8_t test_vslide1up_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1up_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m2_tu( @@ -183,7 +183,7 @@ vint64m1_t test_vslide1up_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, int6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1up_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m4_tu( @@ -192,7 +192,7 @@ vint64m2_t test_vslide1up_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, int6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1up_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m8_tu( @@ -201,7 +201,7 @@ vint64m4_t test_vslide1up_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, int6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1up_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf8_tu( @@ -210,7 +210,7 @@ vint64m8_t test_vslide1up_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, int6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1up_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf4_tu( @@ -219,7 +219,7 @@ vuint8mf8_t test_vslide1up_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1up_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf2_tu( @@ -228,7 +228,7 @@ vuint8mf4_t test_vslide1up_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1up_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m1_tu( @@ -237,7 +237,7 @@ vuint8mf2_t test_vslide1up_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1up_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m2_tu( @@ -246,7 +246,7 @@ vuint8m1_t test_vslide1up_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1up_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m4_tu( @@ -255,7 +255,7 @@ vuint8m2_t test_vslide1up_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1up_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m8_tu( @@ -264,7 +264,7 @@ vuint8m4_t test_vslide1up_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1up_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf4_tu( @@ -273,7 +273,7 @@ vuint8m8_t test_vslide1up_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1up_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16mf4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf2_tu( @@ -282,7 +282,7 @@ vuint16mf4_t test_vslide1up_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1up_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m1_tu( @@ -291,7 +291,7 @@ vuint16mf2_t test_vslide1up_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1up_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m2_tu( @@ -300,7 +300,7 @@ vuint16m1_t test_vslide1up_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1up_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m4_tu( @@ -309,7 +309,7 @@ vuint16m2_t test_vslide1up_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1up_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m8_tu( @@ -318,7 +318,7 @@ vuint16m4_t test_vslide1up_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1up_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32mf2_tu( @@ -327,7 +327,7 @@ vuint16m8_t test_vslide1up_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1up_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32mf2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32mf2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m1_tu( @@ -336,7 +336,7 @@ vuint32mf2_t test_vslide1up_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1up_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m2_tu( @@ -345,7 +345,7 @@ vuint32m1_t test_vslide1up_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1up_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m4_tu( @@ -354,7 +354,7 @@ vuint32m2_t test_vslide1up_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1up_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m8_tu( @@ -363,7 +363,7 @@ vuint32m4_t test_vslide1up_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1up_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m1_tu( @@ -372,7 +372,7 @@ vuint32m8_t test_vslide1up_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1up_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m1_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m1_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m2_tu( @@ -381,7 +381,7 @@ vuint64m1_t test_vslide1up_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1up_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m2_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m2_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m4_tu( @@ -390,7 +390,7 @@ vuint64m2_t test_vslide1up_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1up_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m4_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m4_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m4_t test_vslide1up_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1up_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m8_tu(maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m8_tu(maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vslide1up_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, u // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1up_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf4_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vslide1up_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1up_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf2_tum( @@ -426,7 +426,7 @@ vint8mf4_t test_vslide1up_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1up_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m1_tum( @@ -435,7 +435,7 @@ vint8mf2_t test_vslide1up_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1up_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m2_tum( @@ -444,7 +444,7 @@ vint8m1_t test_vslide1up_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1up_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m4_tum( @@ -453,7 +453,7 @@ vint8m2_t test_vslide1up_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1up_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m8_tum( @@ -462,7 +462,7 @@ vint8m4_t test_vslide1up_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1up_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf4_tum( @@ -471,7 +471,7 @@ vint8m8_t test_vslide1up_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1up_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf2_tum( @@ -480,7 +480,7 @@ vint16mf4_t test_vslide1up_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1up_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m1_tum( @@ -489,7 +489,7 @@ vint16mf2_t test_vslide1up_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1up_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m2_tum( @@ -498,7 +498,7 @@ vint16m1_t test_vslide1up_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1up_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m4_tum( @@ -507,7 +507,7 @@ vint16m2_t test_vslide1up_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1up_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m8_tum( @@ -516,7 +516,7 @@ vint16m4_t test_vslide1up_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1up_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32mf2_tum( @@ -525,7 +525,7 @@ vint16m8_t test_vslide1up_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1up_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m1_tum( @@ -534,7 +534,7 @@ vint32mf2_t test_vslide1up_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1up_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m2_tum( @@ -543,7 +543,7 @@ vint32m1_t test_vslide1up_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1up_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m4_tum( @@ -552,7 +552,7 @@ vint32m2_t test_vslide1up_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1up_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m8_tum( @@ -561,7 +561,7 @@ vint32m4_t test_vslide1up_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1up_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m1_tum( @@ -570,7 +570,7 @@ vint32m8_t test_vslide1up_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1up_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m2_tum( @@ -579,7 +579,7 @@ vint64m1_t test_vslide1up_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1up_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m4_tum( @@ -588,7 +588,7 @@ vint64m2_t test_vslide1up_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1up_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m8_tum( @@ -597,7 +597,7 @@ vint64m4_t test_vslide1up_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1up_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf8_tum( @@ -606,7 +606,7 @@ vint64m8_t test_vslide1up_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1up_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf4_tum( @@ -615,7 +615,7 @@ vuint8mf8_t test_vslide1up_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1up_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf2_tum( @@ -624,7 +624,7 @@ vuint8mf4_t test_vslide1up_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1up_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m1_tum( @@ -633,7 +633,7 @@ vuint8mf2_t test_vslide1up_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1up_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m2_tum( @@ -642,7 +642,7 @@ vuint8m1_t test_vslide1up_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1up_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m4_tum( @@ -651,7 +651,7 @@ vuint8m2_t test_vslide1up_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1up_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m8_tum( @@ -660,7 +660,7 @@ vuint8m4_t test_vslide1up_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1up_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf4_tum( @@ -669,7 +669,7 @@ vuint8m8_t test_vslide1up_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1up_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16mf4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf2_tum( @@ -678,7 +678,7 @@ vuint16mf4_t test_vslide1up_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1up_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m1_tum( @@ -687,7 +687,7 @@ vuint16mf2_t test_vslide1up_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1up_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m2_tum( @@ -696,7 +696,7 @@ vuint16m1_t test_vslide1up_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1up_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m4_tum( @@ -705,7 +705,7 @@ vuint16m2_t test_vslide1up_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1up_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m8_tum( @@ -714,7 +714,7 @@ vuint16m4_t test_vslide1up_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1up_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32mf2_tum( @@ -723,7 +723,7 @@ vuint16m8_t test_vslide1up_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1up_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32mf2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32mf2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m1_tum( @@ -732,7 +732,7 @@ vuint32mf2_t test_vslide1up_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1up_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m2_tum( @@ -741,7 +741,7 @@ vuint32m1_t test_vslide1up_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1up_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m4_tum( @@ -750,7 +750,7 @@ vuint32m2_t test_vslide1up_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1up_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m8_tum( @@ -759,7 +759,7 @@ vuint32m4_t test_vslide1up_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1up_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m1_tum( @@ -768,7 +768,7 @@ vuint32m8_t test_vslide1up_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1up_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m1_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m1_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m2_tum( @@ -777,7 +777,7 @@ vuint64m1_t test_vslide1up_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1up_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m2_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m2_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m4_tum( @@ -786,7 +786,7 @@ vuint64m2_t test_vslide1up_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1up_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m4_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m4_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m4_t test_vslide1up_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1up_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m8_tum(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m8_tum(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vslide1up_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1up_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf4_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vslide1up_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1up_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf2_tumu( @@ -822,7 +822,7 @@ vint8mf4_t test_vslide1up_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1up_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m1_tumu( @@ -831,7 +831,7 @@ vint8mf2_t test_vslide1up_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1up_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m2_tumu( @@ -840,7 +840,7 @@ vint8m1_t test_vslide1up_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1up_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m4_tumu( @@ -849,7 +849,7 @@ vint8m2_t test_vslide1up_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1up_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m8_tumu( @@ -858,7 +858,7 @@ vint8m4_t test_vslide1up_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1up_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf4_tumu( @@ -867,7 +867,7 @@ vint8m8_t test_vslide1up_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1up_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf2_tumu( @@ -876,7 +876,7 @@ vint16mf4_t test_vslide1up_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1up_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m1_tumu( @@ -885,7 +885,7 @@ vint16mf2_t test_vslide1up_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1up_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m2_tumu( @@ -894,7 +894,7 @@ vint16m1_t test_vslide1up_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1up_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m4_tumu( @@ -903,7 +903,7 @@ vint16m2_t test_vslide1up_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1up_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m8_tumu( @@ -912,7 +912,7 @@ vint16m4_t test_vslide1up_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1up_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32mf2_tumu( @@ -921,7 +921,7 @@ vint16m8_t test_vslide1up_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1up_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m1_tumu( @@ -930,7 +930,7 @@ vint32mf2_t test_vslide1up_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1up_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m2_tumu( @@ -939,7 +939,7 @@ vint32m1_t test_vslide1up_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1up_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m4_tumu( @@ -948,7 +948,7 @@ vint32m2_t test_vslide1up_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1up_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m8_tumu( @@ -957,7 +957,7 @@ vint32m4_t test_vslide1up_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1up_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m1_tumu( @@ -966,7 +966,7 @@ vint32m8_t test_vslide1up_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1up_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m2_tumu( @@ -975,7 +975,7 @@ vint64m1_t test_vslide1up_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1up_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m4_tumu( @@ -984,7 +984,7 @@ vint64m2_t test_vslide1up_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1up_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m8_tumu( @@ -993,7 +993,7 @@ vint64m4_t test_vslide1up_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1up_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf8_tumu( @@ -1002,7 +1002,7 @@ vint64m8_t test_vslide1up_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1up_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf4_tumu( @@ -1011,7 +1011,7 @@ vuint8mf8_t test_vslide1up_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1up_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf2_tumu( @@ -1020,7 +1020,7 @@ vuint8mf4_t test_vslide1up_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1up_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m1_tumu( @@ -1029,7 +1029,7 @@ vuint8mf2_t test_vslide1up_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1up_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m2_tumu( @@ -1038,7 +1038,7 @@ vuint8m1_t test_vslide1up_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1up_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m4_tumu( @@ -1047,7 +1047,7 @@ vuint8m2_t test_vslide1up_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1up_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m8_tumu( @@ -1056,7 +1056,7 @@ vuint8m4_t test_vslide1up_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1up_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf4_tumu( @@ -1065,7 +1065,7 @@ vuint8m8_t test_vslide1up_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1up_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16mf4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf2_tumu( @@ -1074,7 +1074,7 @@ vuint16mf4_t test_vslide1up_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1up_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m1_tumu( @@ -1083,7 +1083,7 @@ vuint16mf2_t test_vslide1up_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1up_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m2_tumu( @@ -1092,7 +1092,7 @@ vuint16m1_t test_vslide1up_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1up_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m4_tumu( @@ -1101,7 +1101,7 @@ vuint16m2_t test_vslide1up_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1up_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m8_tumu( @@ -1110,7 +1110,7 @@ vuint16m4_t test_vslide1up_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1up_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32mf2_tumu( @@ -1119,7 +1119,7 @@ vuint16m8_t test_vslide1up_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1up_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32mf2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32mf2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m1_tumu( @@ -1128,7 +1128,7 @@ vuint32mf2_t test_vslide1up_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1up_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m2_tumu( @@ -1137,7 +1137,7 @@ vuint32m1_t test_vslide1up_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1up_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m4_tumu( @@ -1146,7 +1146,7 @@ vuint32m2_t test_vslide1up_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1up_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m8_tumu( @@ -1155,7 +1155,7 @@ vuint32m4_t test_vslide1up_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1up_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m1_tumu( @@ -1164,7 +1164,7 @@ vuint32m8_t test_vslide1up_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1up_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m1_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m1_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m2_tumu( @@ -1173,7 +1173,7 @@ vuint64m1_t test_vslide1up_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1up_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m2_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m2_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m4_tumu( @@ -1182,7 +1182,7 @@ vuint64m2_t test_vslide1up_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1up_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m4_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m4_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m4_t test_vslide1up_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1up_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m8_tumu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m8_tumu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vslide1up_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslide1up_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf4_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vslide1up_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslide1up_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8mf2_mu( @@ -1218,7 +1218,7 @@ vint8mf4_t test_vslide1up_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslide1up_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m1_mu( @@ -1227,7 +1227,7 @@ vint8mf2_t test_vslide1up_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslide1up_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m2_mu( @@ -1236,7 +1236,7 @@ vint8m1_t test_vslide1up_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslide1up_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m4_mu( @@ -1245,7 +1245,7 @@ vint8m2_t test_vslide1up_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslide1up_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i8m8_mu( @@ -1254,7 +1254,7 @@ vint8m4_t test_vslide1up_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslide1up_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, int8_t value, size_t vl) { - return vslide1up_vx_i8m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i8m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf4_mu( @@ -1263,7 +1263,7 @@ vint8m8_t test_vslide1up_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslide1up_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16mf2_mu( @@ -1272,7 +1272,7 @@ vint16mf4_t test_vslide1up_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslide1up_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m1_mu( @@ -1281,7 +1281,7 @@ vint16mf2_t test_vslide1up_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslide1up_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m2_mu( @@ -1290,7 +1290,7 @@ vint16m1_t test_vslide1up_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslide1up_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m4_mu( @@ -1299,7 +1299,7 @@ vint16m2_t test_vslide1up_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslide1up_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i16m8_mu( @@ -1308,7 +1308,7 @@ vint16m4_t test_vslide1up_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslide1up_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, int16_t value, size_t vl) { - return vslide1up_vx_i16m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i16m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32mf2_mu( @@ -1317,7 +1317,7 @@ vint16m8_t test_vslide1up_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslide1up_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m1_mu( @@ -1326,7 +1326,7 @@ vint32mf2_t test_vslide1up_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslide1up_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m2_mu( @@ -1335,7 +1335,7 @@ vint32m1_t test_vslide1up_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslide1up_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m4_mu( @@ -1344,7 +1344,7 @@ vint32m2_t test_vslide1up_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslide1up_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i32m8_mu( @@ -1353,7 +1353,7 @@ vint32m4_t test_vslide1up_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslide1up_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, int32_t value, size_t vl) { - return vslide1up_vx_i32m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i32m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m1_mu( @@ -1362,7 +1362,7 @@ vint32m8_t test_vslide1up_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslide1up_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m2_mu( @@ -1371,7 +1371,7 @@ vint64m1_t test_vslide1up_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslide1up_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m4_mu( @@ -1380,7 +1380,7 @@ vint64m2_t test_vslide1up_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslide1up_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_i64m8_mu( @@ -1389,7 +1389,7 @@ vint64m4_t test_vslide1up_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslide1up_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, int64_t value, size_t vl) { - return vslide1up_vx_i64m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_i64m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf8_mu( @@ -1398,7 +1398,7 @@ vint64m8_t test_vslide1up_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslide1up_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf4_mu( @@ -1407,7 +1407,7 @@ vuint8mf8_t test_vslide1up_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslide1up_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8mf2_mu( @@ -1416,7 +1416,7 @@ vuint8mf4_t test_vslide1up_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslide1up_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m1_mu( @@ -1425,7 +1425,7 @@ vuint8mf2_t test_vslide1up_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslide1up_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m2_mu( @@ -1434,7 +1434,7 @@ vuint8m1_t test_vslide1up_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslide1up_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m4_mu( @@ -1443,7 +1443,7 @@ vuint8m2_t test_vslide1up_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslide1up_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u8m8_mu( @@ -1452,7 +1452,7 @@ vuint8m4_t test_vslide1up_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslide1up_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, uint8_t value, size_t vl) { - return vslide1up_vx_u8m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u8m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf4_mu( @@ -1461,7 +1461,7 @@ vuint8m8_t test_vslide1up_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslide1up_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16mf4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16mf2_mu( @@ -1470,7 +1470,7 @@ vuint16mf4_t test_vslide1up_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslide1up_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m1_mu( @@ -1479,7 +1479,7 @@ vuint16mf2_t test_vslide1up_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslide1up_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m2_mu( @@ -1488,7 +1488,7 @@ vuint16m1_t test_vslide1up_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslide1up_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m4_mu( @@ -1497,7 +1497,7 @@ vuint16m2_t test_vslide1up_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslide1up_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u16m8_mu( @@ -1506,7 +1506,7 @@ vuint16m4_t test_vslide1up_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslide1up_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, uint16_t value, size_t vl) { - return vslide1up_vx_u16m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u16m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32mf2_mu( @@ -1515,7 +1515,7 @@ vuint16m8_t test_vslide1up_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslide1up_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32mf2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32mf2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m1_mu( @@ -1524,7 +1524,7 @@ vuint32mf2_t test_vslide1up_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslide1up_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m2_mu( @@ -1533,7 +1533,7 @@ vuint32m1_t test_vslide1up_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslide1up_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m4_mu( @@ -1542,7 +1542,7 @@ vuint32m2_t test_vslide1up_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslide1up_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u32m8_mu( @@ -1551,7 +1551,7 @@ vuint32m4_t test_vslide1up_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslide1up_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, uint32_t value, size_t vl) { - return vslide1up_vx_u32m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u32m8_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m1_mu( @@ -1560,7 +1560,7 @@ vuint32m8_t test_vslide1up_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslide1up_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m1_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m1_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m2_mu( @@ -1569,7 +1569,7 @@ vuint64m1_t test_vslide1up_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslide1up_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m2_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m2_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m4_mu( @@ -1578,7 +1578,7 @@ vuint64m2_t test_vslide1up_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslide1up_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m4_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m4_mu(mask, maskedoff, src, value, vl); } // CHECK-RV64-LABEL: @test_vslide1up_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m4_t test_vslide1up_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslide1up_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, uint64_t value, size_t vl) { - return vslide1up_vx_u64m8_mu(mask, maskedoff, src, value, vl); + return __riscv_vslide1up_vx_u64m8_mu(mask, maskedoff, src, value, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslidedown.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslidedown.c index 80bcc68a2e81ad80196ee6fdc6836985e441eb7e..0d9bcdcf500f1e8d6ca6e827d1234e36dba2526a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslidedown.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslidedown.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslidedown_vx_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16mf4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vslidedown_vx_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslidedown_vx_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16mf2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vslidedown_vx_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslidedown_vx_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vslidedown_vx_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslidedown_vx_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vslidedown_vx_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslidedown_vx_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vslidedown_vx_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslidedown_vx_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vslidedown_vx_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslidedown_vx_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32mf2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32mf2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vslidedown_vx_f32mf2_tu(vfloat32mf2_t maskedoff, vfloat32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslidedown_vx_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vslidedown_vx_f32m1_tu(vfloat32m1_t maskedoff, vfloat32m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslidedown_vx_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vslidedown_vx_f32m2_tu(vfloat32m2_t maskedoff, vfloat32m2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslidedown_vx_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vslidedown_vx_f32m4_tu(vfloat32m4_t maskedoff, vfloat32m4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslidedown_vx_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vslidedown_vx_f32m8_tu(vfloat32m8_t maskedoff, vfloat32m8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslidedown_vx_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vslidedown_vx_f64m1_tu(vfloat64m1_t maskedoff, vfloat64m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslidedown_vx_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vslidedown_vx_f64m2_tu(vfloat64m2_t maskedoff, vfloat64m2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslidedown_vx_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vslidedown_vx_f64m4_tu(vfloat64m4_t maskedoff, vfloat64m4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslidedown_vx_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf8_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vslidedown_vx_f64m8_tu(vfloat64m8_t maskedoff, vfloat64m8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslidedown_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf4_tu( @@ -157,7 +157,7 @@ vint8mf8_t test_vslidedown_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslidedown_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf2_tu( @@ -166,7 +166,7 @@ vint8mf4_t test_vslidedown_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslidedown_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m1_tu( @@ -175,7 +175,7 @@ vint8mf2_t test_vslidedown_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslidedown_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m2_tu( @@ -184,7 +184,7 @@ vint8m1_t test_vslidedown_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslidedown_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m4_tu( @@ -193,7 +193,7 @@ vint8m2_t test_vslidedown_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslidedown_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m8_tu( @@ -202,7 +202,7 @@ vint8m4_t test_vslidedown_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslidedown_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf4_tu( @@ -211,7 +211,7 @@ vint8m8_t test_vslidedown_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslidedown_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16mf4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf2_tu( @@ -220,7 +220,7 @@ vint16mf4_t test_vslidedown_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslidedown_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16mf2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m1_tu( @@ -229,7 +229,7 @@ vint16mf2_t test_vslidedown_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslidedown_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m2_tu( @@ -238,7 +238,7 @@ vint16m1_t test_vslidedown_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslidedown_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m4_tu( @@ -247,7 +247,7 @@ vint16m2_t test_vslidedown_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslidedown_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m8_tu( @@ -256,7 +256,7 @@ vint16m4_t test_vslidedown_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslidedown_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32mf2_tu( @@ -265,7 +265,7 @@ vint16m8_t test_vslidedown_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslidedown_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32mf2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32mf2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m1_tu( @@ -274,7 +274,7 @@ vint32mf2_t test_vslidedown_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslidedown_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vslidedown_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslidedown_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m4_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vslidedown_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslidedown_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m8_tu( @@ -301,7 +301,7 @@ vint32m4_t test_vslidedown_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslidedown_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m1_tu( @@ -310,7 +310,7 @@ vint32m8_t test_vslidedown_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslidedown_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m2_tu( @@ -319,7 +319,7 @@ vint64m1_t test_vslidedown_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslidedown_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m4_tu( @@ -328,7 +328,7 @@ vint64m2_t test_vslidedown_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslidedown_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m8_tu( @@ -337,7 +337,7 @@ vint64m4_t test_vslidedown_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslidedown_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf8_tu( @@ -346,7 +346,7 @@ vint64m8_t test_vslidedown_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslidedown_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf4_tu( @@ -355,7 +355,7 @@ vuint8mf8_t test_vslidedown_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslidedown_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf2_tu( @@ -364,7 +364,7 @@ vuint8mf4_t test_vslidedown_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslidedown_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m1_tu( @@ -373,7 +373,7 @@ vuint8mf2_t test_vslidedown_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslidedown_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m2_tu( @@ -382,7 +382,7 @@ vuint8m1_t test_vslidedown_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslidedown_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m4_tu( @@ -391,7 +391,7 @@ vuint8m2_t test_vslidedown_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslidedown_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m8_tu( @@ -400,7 +400,7 @@ vuint8m4_t test_vslidedown_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslidedown_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf4_tu( @@ -409,7 +409,7 @@ vuint8m8_t test_vslidedown_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslidedown_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16mf4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf2_tu( @@ -418,7 +418,7 @@ vuint16mf4_t test_vslidedown_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslidedown_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16mf2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m1_tu( @@ -427,7 +427,7 @@ vuint16mf2_t test_vslidedown_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslidedown_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m2_tu( @@ -436,7 +436,7 @@ vuint16m1_t test_vslidedown_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslidedown_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m4_tu( @@ -445,7 +445,7 @@ vuint16m2_t test_vslidedown_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslidedown_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m8_tu( @@ -454,7 +454,7 @@ vuint16m4_t test_vslidedown_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslidedown_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32mf2_tu( @@ -463,7 +463,7 @@ vuint16m8_t test_vslidedown_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslidedown_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32mf2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32mf2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m1_tu( @@ -472,7 +472,7 @@ vuint32mf2_t test_vslidedown_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslidedown_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m2_tu( @@ -481,7 +481,7 @@ vuint32m1_t test_vslidedown_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslidedown_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m4_tu( @@ -490,7 +490,7 @@ vuint32m2_t test_vslidedown_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslidedown_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m8_tu( @@ -499,7 +499,7 @@ vuint32m4_t test_vslidedown_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslidedown_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m1_tu( @@ -508,7 +508,7 @@ vuint32m8_t test_vslidedown_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslidedown_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m1_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m1_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m2_tu( @@ -517,7 +517,7 @@ vuint64m1_t test_vslidedown_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslidedown_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m2_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m2_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m4_tu( @@ -526,7 +526,7 @@ vuint64m2_t test_vslidedown_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslidedown_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m4_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m4_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m8_tu( @@ -535,7 +535,7 @@ vuint64m4_t test_vslidedown_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslidedown_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m8_tu(maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m8_tu(maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf4_tum( @@ -544,7 +544,7 @@ vuint64m8_t test_vslidedown_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslidedown_vx_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16mf4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf2_tum( @@ -553,7 +553,7 @@ vfloat16mf4_t test_vslidedown_vx_f16mf4_tum(vbool64_t mask, vfloat16mf4_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslidedown_vx_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16mf2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m1_tum( @@ -562,7 +562,7 @@ vfloat16mf2_t test_vslidedown_vx_f16mf2_tum(vbool32_t mask, vfloat16mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslidedown_vx_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m2_tum( @@ -571,7 +571,7 @@ vfloat16m1_t test_vslidedown_vx_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslidedown_vx_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m4_tum( @@ -580,7 +580,7 @@ vfloat16m2_t test_vslidedown_vx_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslidedown_vx_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m8_tum( @@ -589,7 +589,7 @@ vfloat16m4_t test_vslidedown_vx_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslidedown_vx_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32mf2_tum( @@ -598,7 +598,7 @@ vfloat16m8_t test_vslidedown_vx_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslidedown_vx_f32mf2_tum(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32mf2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32mf2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m1_tum( @@ -607,7 +607,7 @@ vfloat32mf2_t test_vslidedown_vx_f32mf2_tum(vbool64_t mask, vfloat32mf2_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslidedown_vx_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m2_tum( @@ -616,7 +616,7 @@ vfloat32m1_t test_vslidedown_vx_f32m1_tum(vbool32_t mask, vfloat32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslidedown_vx_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m4_tum( @@ -625,7 +625,7 @@ vfloat32m2_t test_vslidedown_vx_f32m2_tum(vbool16_t mask, vfloat32m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslidedown_vx_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m8_tum( @@ -634,7 +634,7 @@ vfloat32m4_t test_vslidedown_vx_f32m4_tum(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslidedown_vx_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m1_tum( @@ -643,7 +643,7 @@ vfloat32m8_t test_vslidedown_vx_f32m8_tum(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslidedown_vx_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m2_tum( @@ -652,7 +652,7 @@ vfloat64m1_t test_vslidedown_vx_f64m1_tum(vbool64_t mask, vfloat64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslidedown_vx_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m4_tum( @@ -661,7 +661,7 @@ vfloat64m2_t test_vslidedown_vx_f64m2_tum(vbool32_t mask, vfloat64m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslidedown_vx_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m8_tum( @@ -670,7 +670,7 @@ vfloat64m4_t test_vslidedown_vx_f64m4_tum(vbool16_t mask, vfloat64m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslidedown_vx_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf8_tum( @@ -679,7 +679,7 @@ vfloat64m8_t test_vslidedown_vx_f64m8_tum(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslidedown_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf4_tum( @@ -688,7 +688,7 @@ vint8mf8_t test_vslidedown_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslidedown_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf2_tum( @@ -697,7 +697,7 @@ vint8mf4_t test_vslidedown_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslidedown_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m1_tum( @@ -706,7 +706,7 @@ vint8mf2_t test_vslidedown_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslidedown_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m2_tum( @@ -715,7 +715,7 @@ vint8m1_t test_vslidedown_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslidedown_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m4_tum( @@ -724,7 +724,7 @@ vint8m2_t test_vslidedown_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslidedown_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m8_tum( @@ -733,7 +733,7 @@ vint8m4_t test_vslidedown_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslidedown_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf4_tum( @@ -742,7 +742,7 @@ vint8m8_t test_vslidedown_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslidedown_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16mf4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf2_tum( @@ -751,7 +751,7 @@ vint16mf4_t test_vslidedown_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslidedown_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16mf2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m1_tum( @@ -760,7 +760,7 @@ vint16mf2_t test_vslidedown_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslidedown_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m2_tum( @@ -769,7 +769,7 @@ vint16m1_t test_vslidedown_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslidedown_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m4_tum( @@ -778,7 +778,7 @@ vint16m2_t test_vslidedown_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslidedown_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m8_tum( @@ -787,7 +787,7 @@ vint16m4_t test_vslidedown_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslidedown_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32mf2_tum( @@ -796,7 +796,7 @@ vint16m8_t test_vslidedown_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslidedown_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32mf2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32mf2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m1_tum( @@ -805,7 +805,7 @@ vint32mf2_t test_vslidedown_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslidedown_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m2_tum( @@ -814,7 +814,7 @@ vint32m1_t test_vslidedown_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslidedown_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m4_tum( @@ -823,7 +823,7 @@ vint32m2_t test_vslidedown_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslidedown_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m8_tum( @@ -832,7 +832,7 @@ vint32m4_t test_vslidedown_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslidedown_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m1_tum( @@ -841,7 +841,7 @@ vint32m8_t test_vslidedown_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslidedown_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m2_tum( @@ -850,7 +850,7 @@ vint64m1_t test_vslidedown_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslidedown_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m4_tum( @@ -859,7 +859,7 @@ vint64m2_t test_vslidedown_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslidedown_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m8_tum( @@ -868,7 +868,7 @@ vint64m4_t test_vslidedown_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslidedown_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf8_tum( @@ -877,7 +877,7 @@ vint64m8_t test_vslidedown_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslidedown_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf4_tum( @@ -886,7 +886,7 @@ vuint8mf8_t test_vslidedown_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslidedown_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf2_tum( @@ -895,7 +895,7 @@ vuint8mf4_t test_vslidedown_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslidedown_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m1_tum( @@ -904,7 +904,7 @@ vuint8mf2_t test_vslidedown_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslidedown_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m2_tum( @@ -913,7 +913,7 @@ vuint8m1_t test_vslidedown_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslidedown_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m4_tum( @@ -922,7 +922,7 @@ vuint8m2_t test_vslidedown_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslidedown_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m8_tum( @@ -931,7 +931,7 @@ vuint8m4_t test_vslidedown_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslidedown_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf4_tum( @@ -940,7 +940,7 @@ vuint8m8_t test_vslidedown_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslidedown_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16mf4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf2_tum( @@ -949,7 +949,7 @@ vuint16mf4_t test_vslidedown_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslidedown_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16mf2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m1_tum( @@ -958,7 +958,7 @@ vuint16mf2_t test_vslidedown_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslidedown_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m2_tum( @@ -967,7 +967,7 @@ vuint16m1_t test_vslidedown_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslidedown_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m4_tum( @@ -976,7 +976,7 @@ vuint16m2_t test_vslidedown_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslidedown_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m8_tum( @@ -985,7 +985,7 @@ vuint16m4_t test_vslidedown_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslidedown_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32mf2_tum( @@ -994,7 +994,7 @@ vuint16m8_t test_vslidedown_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslidedown_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32mf2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32mf2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m1_tum( @@ -1003,7 +1003,7 @@ vuint32mf2_t test_vslidedown_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslidedown_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m2_tum( @@ -1012,7 +1012,7 @@ vuint32m1_t test_vslidedown_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslidedown_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m4_tum( @@ -1021,7 +1021,7 @@ vuint32m2_t test_vslidedown_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslidedown_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m8_tum( @@ -1030,7 +1030,7 @@ vuint32m4_t test_vslidedown_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslidedown_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m1_tum( @@ -1039,7 +1039,7 @@ vuint32m8_t test_vslidedown_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslidedown_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m1_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m1_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m2_tum( @@ -1048,7 +1048,7 @@ vuint64m1_t test_vslidedown_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslidedown_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m2_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m2_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m4_tum( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vslidedown_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslidedown_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m4_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m4_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m8_tum( @@ -1066,7 +1066,7 @@ vuint64m4_t test_vslidedown_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslidedown_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m8_tum(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m8_tum(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf4_tumu( @@ -1075,7 +1075,7 @@ vuint64m8_t test_vslidedown_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslidedown_vx_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16mf4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf2_tumu( @@ -1084,7 +1084,7 @@ vfloat16mf4_t test_vslidedown_vx_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslidedown_vx_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16mf2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m1_tumu( @@ -1093,7 +1093,7 @@ vfloat16mf2_t test_vslidedown_vx_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslidedown_vx_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m2_tumu( @@ -1102,7 +1102,7 @@ vfloat16m1_t test_vslidedown_vx_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslidedown_vx_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m4_tumu( @@ -1111,7 +1111,7 @@ vfloat16m2_t test_vslidedown_vx_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslidedown_vx_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m8_tumu( @@ -1120,7 +1120,7 @@ vfloat16m4_t test_vslidedown_vx_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslidedown_vx_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32mf2_tumu( @@ -1129,7 +1129,7 @@ vfloat16m8_t test_vslidedown_vx_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslidedown_vx_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32mf2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32mf2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m1_tumu( @@ -1138,7 +1138,7 @@ vfloat32mf2_t test_vslidedown_vx_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslidedown_vx_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m2_tumu( @@ -1147,7 +1147,7 @@ vfloat32m1_t test_vslidedown_vx_f32m1_tumu(vbool32_t mask, vfloat32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslidedown_vx_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m4_tumu( @@ -1156,7 +1156,7 @@ vfloat32m2_t test_vslidedown_vx_f32m2_tumu(vbool16_t mask, vfloat32m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslidedown_vx_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m8_tumu( @@ -1165,7 +1165,7 @@ vfloat32m4_t test_vslidedown_vx_f32m4_tumu(vbool8_t mask, vfloat32m4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslidedown_vx_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m1_tumu( @@ -1174,7 +1174,7 @@ vfloat32m8_t test_vslidedown_vx_f32m8_tumu(vbool4_t mask, vfloat32m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslidedown_vx_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m2_tumu( @@ -1183,7 +1183,7 @@ vfloat64m1_t test_vslidedown_vx_f64m1_tumu(vbool64_t mask, vfloat64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslidedown_vx_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m4_tumu( @@ -1192,7 +1192,7 @@ vfloat64m2_t test_vslidedown_vx_f64m2_tumu(vbool32_t mask, vfloat64m2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslidedown_vx_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m8_tumu( @@ -1201,7 +1201,7 @@ vfloat64m4_t test_vslidedown_vx_f64m4_tumu(vbool16_t mask, vfloat64m4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslidedown_vx_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf8_tumu( @@ -1210,7 +1210,7 @@ vfloat64m8_t test_vslidedown_vx_f64m8_tumu(vbool8_t mask, vfloat64m8_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslidedown_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf4_tumu( @@ -1219,7 +1219,7 @@ vint8mf8_t test_vslidedown_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslidedown_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf2_tumu( @@ -1228,7 +1228,7 @@ vint8mf4_t test_vslidedown_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslidedown_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m1_tumu( @@ -1237,7 +1237,7 @@ vint8mf2_t test_vslidedown_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslidedown_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m2_tumu( @@ -1246,7 +1246,7 @@ vint8m1_t test_vslidedown_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslidedown_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m4_tumu( @@ -1255,7 +1255,7 @@ vint8m2_t test_vslidedown_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslidedown_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m8_tumu( @@ -1264,7 +1264,7 @@ vint8m4_t test_vslidedown_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslidedown_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf4_tumu( @@ -1273,7 +1273,7 @@ vint8m8_t test_vslidedown_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslidedown_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16mf4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf2_tumu( @@ -1282,7 +1282,7 @@ vint16mf4_t test_vslidedown_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslidedown_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16mf2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m1_tumu( @@ -1291,7 +1291,7 @@ vint16mf2_t test_vslidedown_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslidedown_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m2_tumu( @@ -1300,7 +1300,7 @@ vint16m1_t test_vslidedown_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslidedown_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m4_tumu( @@ -1309,7 +1309,7 @@ vint16m2_t test_vslidedown_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslidedown_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m8_tumu( @@ -1318,7 +1318,7 @@ vint16m4_t test_vslidedown_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslidedown_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32mf2_tumu( @@ -1327,7 +1327,7 @@ vint16m8_t test_vslidedown_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslidedown_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32mf2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32mf2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m1_tumu( @@ -1336,7 +1336,7 @@ vint32mf2_t test_vslidedown_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslidedown_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m2_tumu( @@ -1345,7 +1345,7 @@ vint32m1_t test_vslidedown_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslidedown_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m4_tumu( @@ -1354,7 +1354,7 @@ vint32m2_t test_vslidedown_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslidedown_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m8_tumu( @@ -1363,7 +1363,7 @@ vint32m4_t test_vslidedown_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslidedown_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m1_tumu( @@ -1372,7 +1372,7 @@ vint32m8_t test_vslidedown_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslidedown_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m2_tumu( @@ -1381,7 +1381,7 @@ vint64m1_t test_vslidedown_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslidedown_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m4_tumu( @@ -1390,7 +1390,7 @@ vint64m2_t test_vslidedown_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslidedown_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m8_tumu( @@ -1399,7 +1399,7 @@ vint64m4_t test_vslidedown_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslidedown_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf8_tumu( @@ -1408,7 +1408,7 @@ vint64m8_t test_vslidedown_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslidedown_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf4_tumu( @@ -1417,7 +1417,7 @@ vuint8mf8_t test_vslidedown_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslidedown_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf2_tumu( @@ -1426,7 +1426,7 @@ vuint8mf4_t test_vslidedown_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslidedown_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m1_tumu( @@ -1435,7 +1435,7 @@ vuint8mf2_t test_vslidedown_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslidedown_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m2_tumu( @@ -1444,7 +1444,7 @@ vuint8m1_t test_vslidedown_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslidedown_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m4_tumu( @@ -1453,7 +1453,7 @@ vuint8m2_t test_vslidedown_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslidedown_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m8_tumu( @@ -1462,7 +1462,7 @@ vuint8m4_t test_vslidedown_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslidedown_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf4_tumu( @@ -1471,7 +1471,7 @@ vuint8m8_t test_vslidedown_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslidedown_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16mf4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf2_tumu( @@ -1480,7 +1480,7 @@ vuint16mf4_t test_vslidedown_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslidedown_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16mf2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m1_tumu( @@ -1489,7 +1489,7 @@ vuint16mf2_t test_vslidedown_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslidedown_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m2_tumu( @@ -1498,7 +1498,7 @@ vuint16m1_t test_vslidedown_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslidedown_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m4_tumu( @@ -1507,7 +1507,7 @@ vuint16m2_t test_vslidedown_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslidedown_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m8_tumu( @@ -1516,7 +1516,7 @@ vuint16m4_t test_vslidedown_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslidedown_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32mf2_tumu( @@ -1525,7 +1525,7 @@ vuint16m8_t test_vslidedown_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslidedown_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32mf2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32mf2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m1_tumu( @@ -1534,7 +1534,7 @@ vuint32mf2_t test_vslidedown_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslidedown_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m2_tumu( @@ -1543,7 +1543,7 @@ vuint32m1_t test_vslidedown_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslidedown_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m4_tumu( @@ -1552,7 +1552,7 @@ vuint32m2_t test_vslidedown_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslidedown_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m8_tumu( @@ -1561,7 +1561,7 @@ vuint32m4_t test_vslidedown_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslidedown_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m1_tumu( @@ -1570,7 +1570,7 @@ vuint32m8_t test_vslidedown_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslidedown_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m1_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m1_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m2_tumu( @@ -1579,7 +1579,7 @@ vuint64m1_t test_vslidedown_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslidedown_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m2_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m2_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m4_tumu( @@ -1588,7 +1588,7 @@ vuint64m2_t test_vslidedown_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslidedown_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m4_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m4_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m8_tumu( @@ -1597,7 +1597,7 @@ vuint64m4_t test_vslidedown_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslidedown_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m8_tumu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m8_tumu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf4_mu( @@ -1606,7 +1606,7 @@ vuint64m8_t test_vslidedown_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslidedown_vx_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16mf4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16mf2_mu( @@ -1615,7 +1615,7 @@ vfloat16mf4_t test_vslidedown_vx_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslidedown_vx_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16mf2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16mf2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m1_mu( @@ -1624,7 +1624,7 @@ vfloat16mf2_t test_vslidedown_vx_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslidedown_vx_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m2_mu( @@ -1633,7 +1633,7 @@ vfloat16m1_t test_vslidedown_vx_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslidedown_vx_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m4_mu( @@ -1642,7 +1642,7 @@ vfloat16m2_t test_vslidedown_vx_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslidedown_vx_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f16m8_mu( @@ -1651,7 +1651,7 @@ vfloat16m4_t test_vslidedown_vx_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslidedown_vx_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f16m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f16m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32mf2_mu( @@ -1660,7 +1660,7 @@ vfloat16m8_t test_vslidedown_vx_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslidedown_vx_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedoff, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32mf2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32mf2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m1_mu( @@ -1669,7 +1669,7 @@ vfloat32mf2_t test_vslidedown_vx_f32mf2_mu(vbool64_t mask, vfloat32mf2_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslidedown_vx_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, vfloat32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m2_mu( @@ -1678,7 +1678,7 @@ vfloat32m1_t test_vslidedown_vx_f32m1_mu(vbool32_t mask, vfloat32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslidedown_vx_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, vfloat32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m4_mu( @@ -1687,7 +1687,7 @@ vfloat32m2_t test_vslidedown_vx_f32m2_mu(vbool16_t mask, vfloat32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslidedown_vx_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, vfloat32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f32m8_mu( @@ -1696,7 +1696,7 @@ vfloat32m4_t test_vslidedown_vx_f32m4_mu(vbool8_t mask, vfloat32m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslidedown_vx_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, vfloat32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f32m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f32m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m1_mu( @@ -1705,7 +1705,7 @@ vfloat32m8_t test_vslidedown_vx_f32m8_mu(vbool4_t mask, vfloat32m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslidedown_vx_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, vfloat64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m2_mu( @@ -1714,7 +1714,7 @@ vfloat64m1_t test_vslidedown_vx_f64m1_mu(vbool64_t mask, vfloat64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslidedown_vx_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, vfloat64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m4_mu( @@ -1723,7 +1723,7 @@ vfloat64m2_t test_vslidedown_vx_f64m2_mu(vbool32_t mask, vfloat64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslidedown_vx_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, vfloat64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_f64m8_mu( @@ -1732,7 +1732,7 @@ vfloat64m4_t test_vslidedown_vx_f64m4_mu(vbool16_t mask, vfloat64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslidedown_vx_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, vfloat64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_f64m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_f64m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf8_mu( @@ -1741,7 +1741,7 @@ vfloat64m8_t test_vslidedown_vx_f64m8_mu(vbool8_t mask, vfloat64m8_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslidedown_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf4_mu( @@ -1750,7 +1750,7 @@ vint8mf8_t test_vslidedown_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslidedown_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8mf2_mu( @@ -1759,7 +1759,7 @@ vint8mf4_t test_vslidedown_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslidedown_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8mf2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8mf2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m1_mu( @@ -1768,7 +1768,7 @@ vint8mf2_t test_vslidedown_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslidedown_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m2_mu( @@ -1777,7 +1777,7 @@ vint8m1_t test_vslidedown_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslidedown_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m4_mu( @@ -1786,7 +1786,7 @@ vint8m2_t test_vslidedown_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslidedown_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i8m8_mu( @@ -1795,7 +1795,7 @@ vint8m4_t test_vslidedown_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslidedown_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i8m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i8m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf4_mu( @@ -1804,7 +1804,7 @@ vint8m8_t test_vslidedown_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslidedown_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16mf4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16mf2_mu( @@ -1813,7 +1813,7 @@ vint16mf4_t test_vslidedown_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslidedown_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16mf2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16mf2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m1_mu( @@ -1822,7 +1822,7 @@ vint16mf2_t test_vslidedown_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslidedown_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m2_mu( @@ -1831,7 +1831,7 @@ vint16m1_t test_vslidedown_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslidedown_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m4_mu( @@ -1840,7 +1840,7 @@ vint16m2_t test_vslidedown_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslidedown_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i16m8_mu( @@ -1849,7 +1849,7 @@ vint16m4_t test_vslidedown_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslidedown_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i16m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i16m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32mf2_mu( @@ -1858,7 +1858,7 @@ vint16m8_t test_vslidedown_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslidedown_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32mf2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32mf2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m1_mu( @@ -1867,7 +1867,7 @@ vint32mf2_t test_vslidedown_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslidedown_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m2_mu( @@ -1876,7 +1876,7 @@ vint32m1_t test_vslidedown_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslidedown_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m4_mu( @@ -1885,7 +1885,7 @@ vint32m2_t test_vslidedown_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslidedown_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i32m8_mu( @@ -1894,7 +1894,7 @@ vint32m4_t test_vslidedown_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslidedown_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i32m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i32m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m1_mu( @@ -1903,7 +1903,7 @@ vint32m8_t test_vslidedown_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslidedown_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m2_mu( @@ -1912,7 +1912,7 @@ vint64m1_t test_vslidedown_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslidedown_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m4_mu( @@ -1921,7 +1921,7 @@ vint64m2_t test_vslidedown_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslidedown_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_i64m8_mu( @@ -1930,7 +1930,7 @@ vint64m4_t test_vslidedown_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslidedown_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_i64m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_i64m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf8_mu( @@ -1939,7 +1939,7 @@ vint64m8_t test_vslidedown_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslidedown_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf4_mu( @@ -1948,7 +1948,7 @@ vuint8mf8_t test_vslidedown_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslidedown_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8mf2_mu( @@ -1957,7 +1957,7 @@ vuint8mf4_t test_vslidedown_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslidedown_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8mf2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8mf2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m1_mu( @@ -1966,7 +1966,7 @@ vuint8mf2_t test_vslidedown_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslidedown_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m2_mu( @@ -1975,7 +1975,7 @@ vuint8m1_t test_vslidedown_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslidedown_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m4_mu( @@ -1984,7 +1984,7 @@ vuint8m2_t test_vslidedown_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslidedown_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u8m8_mu( @@ -1993,7 +1993,7 @@ vuint8m4_t test_vslidedown_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslidedown_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u8m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u8m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf4_mu( @@ -2002,7 +2002,7 @@ vuint8m8_t test_vslidedown_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslidedown_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16mf4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16mf2_mu( @@ -2011,7 +2011,7 @@ vuint16mf4_t test_vslidedown_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslidedown_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16mf2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16mf2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m1_mu( @@ -2020,7 +2020,7 @@ vuint16mf2_t test_vslidedown_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslidedown_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m2_mu( @@ -2029,7 +2029,7 @@ vuint16m1_t test_vslidedown_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslidedown_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m4_mu( @@ -2038,7 +2038,7 @@ vuint16m2_t test_vslidedown_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslidedown_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u16m8_mu( @@ -2047,7 +2047,7 @@ vuint16m4_t test_vslidedown_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslidedown_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u16m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u16m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32mf2_mu( @@ -2056,7 +2056,7 @@ vuint16m8_t test_vslidedown_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslidedown_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32mf2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32mf2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m1_mu( @@ -2065,7 +2065,7 @@ vuint32mf2_t test_vslidedown_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslidedown_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m2_mu( @@ -2074,7 +2074,7 @@ vuint32m1_t test_vslidedown_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslidedown_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m4_mu( @@ -2083,7 +2083,7 @@ vuint32m2_t test_vslidedown_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslidedown_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u32m8_mu( @@ -2092,7 +2092,7 @@ vuint32m4_t test_vslidedown_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslidedown_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u32m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u32m8_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m1_mu( @@ -2101,7 +2101,7 @@ vuint32m8_t test_vslidedown_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslidedown_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m1_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m1_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m2_mu( @@ -2110,7 +2110,7 @@ vuint64m1_t test_vslidedown_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslidedown_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m2_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m2_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m4_mu( @@ -2119,7 +2119,7 @@ vuint64m2_t test_vslidedown_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslidedown_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m4_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m4_mu(mask, maskedoff, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslidedown_vx_u64m8_mu( @@ -2128,6 +2128,6 @@ vuint64m4_t test_vslidedown_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslidedown_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t src, size_t offset, size_t vl) { - return vslidedown_vx_u64m8_mu(mask, maskedoff, src, offset, vl); + return __riscv_vslidedown_vx_u64m8_mu(mask, maskedoff, src, offset, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslideup.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslideup.c index bd4c14ed099e1788844c42c2ce7b31adb89a6f68..5a62f8174a05e16eecf7232a8188bc23f8f2a4e7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslideup.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vslideup.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslideup_vx_f16mf4_tu(vfloat16mf4_t dest, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf2_tu( @@ -22,7 +22,7 @@ vfloat16mf4_t test_vslideup_vx_f16mf4_tu(vfloat16mf4_t dest, vfloat16mf4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslideup_vx_f16mf2_tu(vfloat16mf2_t dest, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m1_tu( @@ -31,7 +31,7 @@ vfloat16mf2_t test_vslideup_vx_f16mf2_tu(vfloat16mf2_t dest, vfloat16mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslideup_vx_f16m1_tu(vfloat16m1_t dest, vfloat16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f16m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m2_tu( @@ -40,7 +40,7 @@ vfloat16m1_t test_vslideup_vx_f16m1_tu(vfloat16m1_t dest, vfloat16m1_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslideup_vx_f16m2_tu(vfloat16m2_t dest, vfloat16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f16m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m4_tu( @@ -49,7 +49,7 @@ vfloat16m2_t test_vslideup_vx_f16m2_tu(vfloat16m2_t dest, vfloat16m2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslideup_vx_f16m4_tu(vfloat16m4_t dest, vfloat16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f16m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m8_tu( @@ -58,7 +58,7 @@ vfloat16m4_t test_vslideup_vx_f16m4_tu(vfloat16m4_t dest, vfloat16m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslideup_vx_f16m8_tu(vfloat16m8_t dest, vfloat16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f16m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32mf2_tu( @@ -67,7 +67,7 @@ vfloat16m8_t test_vslideup_vx_f16m8_tu(vfloat16m8_t dest, vfloat16m8_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslideup_vx_f32mf2_tu(vfloat32mf2_t dest, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32mf2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f32mf2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m1_tu( @@ -76,7 +76,7 @@ vfloat32mf2_t test_vslideup_vx_f32mf2_tu(vfloat32mf2_t dest, vfloat32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslideup_vx_f32m1_tu(vfloat32m1_t dest, vfloat32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f32m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m2_tu( @@ -85,7 +85,7 @@ vfloat32m1_t test_vslideup_vx_f32m1_tu(vfloat32m1_t dest, vfloat32m1_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslideup_vx_f32m2_tu(vfloat32m2_t dest, vfloat32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f32m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m4_tu( @@ -94,7 +94,7 @@ vfloat32m2_t test_vslideup_vx_f32m2_tu(vfloat32m2_t dest, vfloat32m2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslideup_vx_f32m4_tu(vfloat32m4_t dest, vfloat32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f32m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m8_tu( @@ -103,7 +103,7 @@ vfloat32m4_t test_vslideup_vx_f32m4_tu(vfloat32m4_t dest, vfloat32m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslideup_vx_f32m8_tu(vfloat32m8_t dest, vfloat32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f32m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m1_tu( @@ -112,7 +112,7 @@ vfloat32m8_t test_vslideup_vx_f32m8_tu(vfloat32m8_t dest, vfloat32m8_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslideup_vx_f64m1_tu(vfloat64m1_t dest, vfloat64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f64m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m2_tu( @@ -121,7 +121,7 @@ vfloat64m1_t test_vslideup_vx_f64m1_tu(vfloat64m1_t dest, vfloat64m1_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslideup_vx_f64m2_tu(vfloat64m2_t dest, vfloat64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f64m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m4_tu( @@ -130,7 +130,7 @@ vfloat64m2_t test_vslideup_vx_f64m2_tu(vfloat64m2_t dest, vfloat64m2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslideup_vx_f64m4_tu(vfloat64m4_t dest, vfloat64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f64m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m8_tu( @@ -139,7 +139,7 @@ vfloat64m4_t test_vslideup_vx_f64m4_tu(vfloat64m4_t dest, vfloat64m4_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslideup_vx_f64m8_tu(vfloat64m8_t dest, vfloat64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_f64m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf8_tu( @@ -148,7 +148,7 @@ vfloat64m8_t test_vslideup_vx_f64m8_tu(vfloat64m8_t dest, vfloat64m8_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslideup_vx_i8mf8_tu(vint8mf8_t dest, vint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf4_tu( @@ -157,7 +157,7 @@ vint8mf8_t test_vslideup_vx_i8mf8_tu(vint8mf8_t dest, vint8mf8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslideup_vx_i8mf4_tu(vint8mf4_t dest, vint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf2_tu( @@ -166,7 +166,7 @@ vint8mf4_t test_vslideup_vx_i8mf4_tu(vint8mf4_t dest, vint8mf4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslideup_vx_i8mf2_tu(vint8mf2_t dest, vint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m1_tu( @@ -175,7 +175,7 @@ vint8mf2_t test_vslideup_vx_i8mf2_tu(vint8mf2_t dest, vint8mf2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslideup_vx_i8m1_tu(vint8m1_t dest, vint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i8m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m2_tu( @@ -184,7 +184,7 @@ vint8m1_t test_vslideup_vx_i8m1_tu(vint8m1_t dest, vint8m1_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslideup_vx_i8m2_tu(vint8m2_t dest, vint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i8m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m4_tu( @@ -193,7 +193,7 @@ vint8m2_t test_vslideup_vx_i8m2_tu(vint8m2_t dest, vint8m2_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslideup_vx_i8m4_tu(vint8m4_t dest, vint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i8m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m8_tu( @@ -202,7 +202,7 @@ vint8m4_t test_vslideup_vx_i8m4_tu(vint8m4_t dest, vint8m4_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslideup_vx_i8m8_tu(vint8m8_t dest, vint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i8m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf4_tu( @@ -211,7 +211,7 @@ vint8m8_t test_vslideup_vx_i8m8_tu(vint8m8_t dest, vint8m8_t src, size_t offset, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslideup_vx_i16mf4_tu(vint16mf4_t dest, vint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf2_tu( @@ -220,7 +220,7 @@ vint16mf4_t test_vslideup_vx_i16mf4_tu(vint16mf4_t dest, vint16mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslideup_vx_i16mf2_tu(vint16mf2_t dest, vint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m1_tu( @@ -229,7 +229,7 @@ vint16mf2_t test_vslideup_vx_i16mf2_tu(vint16mf2_t dest, vint16mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslideup_vx_i16m1_tu(vint16m1_t dest, vint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i16m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m2_tu( @@ -238,7 +238,7 @@ vint16m1_t test_vslideup_vx_i16m1_tu(vint16m1_t dest, vint16m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslideup_vx_i16m2_tu(vint16m2_t dest, vint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i16m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m4_tu( @@ -247,7 +247,7 @@ vint16m2_t test_vslideup_vx_i16m2_tu(vint16m2_t dest, vint16m2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslideup_vx_i16m4_tu(vint16m4_t dest, vint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i16m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m8_tu( @@ -256,7 +256,7 @@ vint16m4_t test_vslideup_vx_i16m4_tu(vint16m4_t dest, vint16m4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslideup_vx_i16m8_tu(vint16m8_t dest, vint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i16m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32mf2_tu( @@ -265,7 +265,7 @@ vint16m8_t test_vslideup_vx_i16m8_tu(vint16m8_t dest, vint16m8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslideup_vx_i32mf2_tu(vint32mf2_t dest, vint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32mf2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i32mf2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m1_tu( @@ -274,7 +274,7 @@ vint32mf2_t test_vslideup_vx_i32mf2_tu(vint32mf2_t dest, vint32mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslideup_vx_i32m1_tu(vint32m1_t dest, vint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i32m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m2_tu( @@ -283,7 +283,7 @@ vint32m1_t test_vslideup_vx_i32m1_tu(vint32m1_t dest, vint32m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslideup_vx_i32m2_tu(vint32m2_t dest, vint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i32m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m4_tu( @@ -292,7 +292,7 @@ vint32m2_t test_vslideup_vx_i32m2_tu(vint32m2_t dest, vint32m2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslideup_vx_i32m4_tu(vint32m4_t dest, vint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i32m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m8_tu( @@ -301,7 +301,7 @@ vint32m4_t test_vslideup_vx_i32m4_tu(vint32m4_t dest, vint32m4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslideup_vx_i32m8_tu(vint32m8_t dest, vint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i32m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m1_tu( @@ -310,7 +310,7 @@ vint32m8_t test_vslideup_vx_i32m8_tu(vint32m8_t dest, vint32m8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslideup_vx_i64m1_tu(vint64m1_t dest, vint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i64m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m2_tu( @@ -319,7 +319,7 @@ vint64m1_t test_vslideup_vx_i64m1_tu(vint64m1_t dest, vint64m1_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslideup_vx_i64m2_tu(vint64m2_t dest, vint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i64m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m4_tu( @@ -328,7 +328,7 @@ vint64m2_t test_vslideup_vx_i64m2_tu(vint64m2_t dest, vint64m2_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslideup_vx_i64m4_tu(vint64m4_t dest, vint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i64m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m8_tu( @@ -337,7 +337,7 @@ vint64m4_t test_vslideup_vx_i64m4_tu(vint64m4_t dest, vint64m4_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslideup_vx_i64m8_tu(vint64m8_t dest, vint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_i64m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf8_tu( @@ -346,7 +346,7 @@ vint64m8_t test_vslideup_vx_i64m8_tu(vint64m8_t dest, vint64m8_t src, size_t off // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslideup_vx_u8mf8_tu(vuint8mf8_t dest, vuint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf4_tu( @@ -355,7 +355,7 @@ vuint8mf8_t test_vslideup_vx_u8mf8_tu(vuint8mf8_t dest, vuint8mf8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslideup_vx_u8mf4_tu(vuint8mf4_t dest, vuint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf2_tu( @@ -364,7 +364,7 @@ vuint8mf4_t test_vslideup_vx_u8mf4_tu(vuint8mf4_t dest, vuint8mf4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslideup_vx_u8mf2_tu(vuint8mf2_t dest, vuint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m1_tu( @@ -373,7 +373,7 @@ vuint8mf2_t test_vslideup_vx_u8mf2_tu(vuint8mf2_t dest, vuint8mf2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslideup_vx_u8m1_tu(vuint8m1_t dest, vuint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u8m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m2_tu( @@ -382,7 +382,7 @@ vuint8m1_t test_vslideup_vx_u8m1_tu(vuint8m1_t dest, vuint8m1_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslideup_vx_u8m2_tu(vuint8m2_t dest, vuint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u8m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m4_tu( @@ -391,7 +391,7 @@ vuint8m2_t test_vslideup_vx_u8m2_tu(vuint8m2_t dest, vuint8m2_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslideup_vx_u8m4_tu(vuint8m4_t dest, vuint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u8m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m8_tu( @@ -400,7 +400,7 @@ vuint8m4_t test_vslideup_vx_u8m4_tu(vuint8m4_t dest, vuint8m4_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslideup_vx_u8m8_tu(vuint8m8_t dest, vuint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u8m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf4_tu( @@ -409,7 +409,7 @@ vuint8m8_t test_vslideup_vx_u8m8_tu(vuint8m8_t dest, vuint8m8_t src, size_t offs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslideup_vx_u16mf4_tu(vuint16mf4_t dest, vuint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf2_tu( @@ -418,7 +418,7 @@ vuint16mf4_t test_vslideup_vx_u16mf4_tu(vuint16mf4_t dest, vuint16mf4_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslideup_vx_u16mf2_tu(vuint16mf2_t dest, vuint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m1_tu( @@ -427,7 +427,7 @@ vuint16mf2_t test_vslideup_vx_u16mf2_tu(vuint16mf2_t dest, vuint16mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslideup_vx_u16m1_tu(vuint16m1_t dest, vuint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u16m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m2_tu( @@ -436,7 +436,7 @@ vuint16m1_t test_vslideup_vx_u16m1_tu(vuint16m1_t dest, vuint16m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslideup_vx_u16m2_tu(vuint16m2_t dest, vuint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u16m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m4_tu( @@ -445,7 +445,7 @@ vuint16m2_t test_vslideup_vx_u16m2_tu(vuint16m2_t dest, vuint16m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslideup_vx_u16m4_tu(vuint16m4_t dest, vuint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u16m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m8_tu( @@ -454,7 +454,7 @@ vuint16m4_t test_vslideup_vx_u16m4_tu(vuint16m4_t dest, vuint16m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslideup_vx_u16m8_tu(vuint16m8_t dest, vuint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u16m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32mf2_tu( @@ -463,7 +463,7 @@ vuint16m8_t test_vslideup_vx_u16m8_tu(vuint16m8_t dest, vuint16m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslideup_vx_u32mf2_tu(vuint32mf2_t dest, vuint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32mf2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u32mf2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m1_tu( @@ -472,7 +472,7 @@ vuint32mf2_t test_vslideup_vx_u32mf2_tu(vuint32mf2_t dest, vuint32mf2_t src, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslideup_vx_u32m1_tu(vuint32m1_t dest, vuint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u32m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m2_tu( @@ -481,7 +481,7 @@ vuint32m1_t test_vslideup_vx_u32m1_tu(vuint32m1_t dest, vuint32m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslideup_vx_u32m2_tu(vuint32m2_t dest, vuint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u32m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m4_tu( @@ -490,7 +490,7 @@ vuint32m2_t test_vslideup_vx_u32m2_tu(vuint32m2_t dest, vuint32m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslideup_vx_u32m4_tu(vuint32m4_t dest, vuint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u32m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m8_tu( @@ -499,7 +499,7 @@ vuint32m4_t test_vslideup_vx_u32m4_tu(vuint32m4_t dest, vuint32m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslideup_vx_u32m8_tu(vuint32m8_t dest, vuint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u32m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m1_tu( @@ -508,7 +508,7 @@ vuint32m8_t test_vslideup_vx_u32m8_tu(vuint32m8_t dest, vuint32m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslideup_vx_u64m1_tu(vuint64m1_t dest, vuint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m1_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u64m1_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m2_tu( @@ -517,7 +517,7 @@ vuint64m1_t test_vslideup_vx_u64m1_tu(vuint64m1_t dest, vuint64m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslideup_vx_u64m2_tu(vuint64m2_t dest, vuint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m2_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u64m2_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m4_tu( @@ -526,7 +526,7 @@ vuint64m2_t test_vslideup_vx_u64m2_tu(vuint64m2_t dest, vuint64m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslideup_vx_u64m4_tu(vuint64m4_t dest, vuint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m4_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u64m4_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m8_tu( @@ -535,7 +535,7 @@ vuint64m4_t test_vslideup_vx_u64m4_tu(vuint64m4_t dest, vuint64m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslideup_vx_u64m8_tu(vuint64m8_t dest, vuint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m8_tu(dest, src, offset, vl); + return __riscv_vslideup_vx_u64m8_tu(dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf4_tum( @@ -544,7 +544,7 @@ vuint64m8_t test_vslideup_vx_u64m8_tu(vuint64m8_t dest, vuint64m8_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslideup_vx_f16mf4_tum(vbool64_t mask, vfloat16mf4_t dest, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf2_tum( @@ -553,7 +553,7 @@ vfloat16mf4_t test_vslideup_vx_f16mf4_tum(vbool64_t mask, vfloat16mf4_t dest, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslideup_vx_f16mf2_tum(vbool32_t mask, vfloat16mf2_t dest, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m1_tum( @@ -562,7 +562,7 @@ vfloat16mf2_t test_vslideup_vx_f16mf2_tum(vbool32_t mask, vfloat16mf2_t dest, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslideup_vx_f16m1_tum(vbool16_t mask, vfloat16m1_t dest, vfloat16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m2_tum( @@ -571,7 +571,7 @@ vfloat16m1_t test_vslideup_vx_f16m1_tum(vbool16_t mask, vfloat16m1_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslideup_vx_f16m2_tum(vbool8_t mask, vfloat16m2_t dest, vfloat16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m4_tum( @@ -580,7 +580,7 @@ vfloat16m2_t test_vslideup_vx_f16m2_tum(vbool8_t mask, vfloat16m2_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslideup_vx_f16m4_tum(vbool4_t mask, vfloat16m4_t dest, vfloat16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m8_tum( @@ -589,7 +589,7 @@ vfloat16m4_t test_vslideup_vx_f16m4_tum(vbool4_t mask, vfloat16m4_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslideup_vx_f16m8_tum(vbool2_t mask, vfloat16m8_t dest, vfloat16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32mf2_tum( @@ -598,7 +598,7 @@ vfloat16m8_t test_vslideup_vx_f16m8_tum(vbool2_t mask, vfloat16m8_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslideup_vx_f32mf2_tum(vbool64_t mask, vfloat32mf2_t dest, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32mf2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32mf2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m1_tum( @@ -607,7 +607,7 @@ vfloat32mf2_t test_vslideup_vx_f32mf2_tum(vbool64_t mask, vfloat32mf2_t dest, vf // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslideup_vx_f32m1_tum(vbool32_t mask, vfloat32m1_t dest, vfloat32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m2_tum( @@ -616,7 +616,7 @@ vfloat32m1_t test_vslideup_vx_f32m1_tum(vbool32_t mask, vfloat32m1_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslideup_vx_f32m2_tum(vbool16_t mask, vfloat32m2_t dest, vfloat32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m4_tum( @@ -625,7 +625,7 @@ vfloat32m2_t test_vslideup_vx_f32m2_tum(vbool16_t mask, vfloat32m2_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslideup_vx_f32m4_tum(vbool8_t mask, vfloat32m4_t dest, vfloat32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m8_tum( @@ -634,7 +634,7 @@ vfloat32m4_t test_vslideup_vx_f32m4_tum(vbool8_t mask, vfloat32m4_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslideup_vx_f32m8_tum(vbool4_t mask, vfloat32m8_t dest, vfloat32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m1_tum( @@ -643,7 +643,7 @@ vfloat32m8_t test_vslideup_vx_f32m8_tum(vbool4_t mask, vfloat32m8_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslideup_vx_f64m1_tum(vbool64_t mask, vfloat64m1_t dest, vfloat64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m2_tum( @@ -652,7 +652,7 @@ vfloat64m1_t test_vslideup_vx_f64m1_tum(vbool64_t mask, vfloat64m1_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslideup_vx_f64m2_tum(vbool32_t mask, vfloat64m2_t dest, vfloat64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m4_tum( @@ -661,7 +661,7 @@ vfloat64m2_t test_vslideup_vx_f64m2_tum(vbool32_t mask, vfloat64m2_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslideup_vx_f64m4_tum(vbool16_t mask, vfloat64m4_t dest, vfloat64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m8_tum( @@ -670,7 +670,7 @@ vfloat64m4_t test_vslideup_vx_f64m4_tum(vbool16_t mask, vfloat64m4_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslideup_vx_f64m8_tum(vbool8_t mask, vfloat64m8_t dest, vfloat64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf8_tum( @@ -679,7 +679,7 @@ vfloat64m8_t test_vslideup_vx_f64m8_tum(vbool8_t mask, vfloat64m8_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslideup_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t dest, vint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf4_tum( @@ -688,7 +688,7 @@ vint8mf8_t test_vslideup_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t dest, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslideup_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t dest, vint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf2_tum( @@ -697,7 +697,7 @@ vint8mf4_t test_vslideup_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t dest, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslideup_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t dest, vint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m1_tum( @@ -706,7 +706,7 @@ vint8mf2_t test_vslideup_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t dest, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslideup_vx_i8m1_tum(vbool8_t mask, vint8m1_t dest, vint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m2_tum( @@ -715,7 +715,7 @@ vint8m1_t test_vslideup_vx_i8m1_tum(vbool8_t mask, vint8m1_t dest, vint8m1_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslideup_vx_i8m2_tum(vbool4_t mask, vint8m2_t dest, vint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m4_tum( @@ -724,7 +724,7 @@ vint8m2_t test_vslideup_vx_i8m2_tum(vbool4_t mask, vint8m2_t dest, vint8m2_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslideup_vx_i8m4_tum(vbool2_t mask, vint8m4_t dest, vint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m8_tum( @@ -733,7 +733,7 @@ vint8m4_t test_vslideup_vx_i8m4_tum(vbool2_t mask, vint8m4_t dest, vint8m4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslideup_vx_i8m8_tum(vbool1_t mask, vint8m8_t dest, vint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf4_tum( @@ -742,7 +742,7 @@ vint8m8_t test_vslideup_vx_i8m8_tum(vbool1_t mask, vint8m8_t dest, vint8m8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslideup_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t dest, vint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf2_tum( @@ -751,7 +751,7 @@ vint16mf4_t test_vslideup_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t dest, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslideup_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t dest, vint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m1_tum( @@ -760,7 +760,7 @@ vint16mf2_t test_vslideup_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t dest, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslideup_vx_i16m1_tum(vbool16_t mask, vint16m1_t dest, vint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m2_tum( @@ -769,7 +769,7 @@ vint16m1_t test_vslideup_vx_i16m1_tum(vbool16_t mask, vint16m1_t dest, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslideup_vx_i16m2_tum(vbool8_t mask, vint16m2_t dest, vint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m4_tum( @@ -778,7 +778,7 @@ vint16m2_t test_vslideup_vx_i16m2_tum(vbool8_t mask, vint16m2_t dest, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslideup_vx_i16m4_tum(vbool4_t mask, vint16m4_t dest, vint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m8_tum( @@ -787,7 +787,7 @@ vint16m4_t test_vslideup_vx_i16m4_tum(vbool4_t mask, vint16m4_t dest, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslideup_vx_i16m8_tum(vbool2_t mask, vint16m8_t dest, vint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32mf2_tum( @@ -796,7 +796,7 @@ vint16m8_t test_vslideup_vx_i16m8_tum(vbool2_t mask, vint16m8_t dest, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslideup_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t dest, vint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32mf2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32mf2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m1_tum( @@ -805,7 +805,7 @@ vint32mf2_t test_vslideup_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t dest, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslideup_vx_i32m1_tum(vbool32_t mask, vint32m1_t dest, vint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m2_tum( @@ -814,7 +814,7 @@ vint32m1_t test_vslideup_vx_i32m1_tum(vbool32_t mask, vint32m1_t dest, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslideup_vx_i32m2_tum(vbool16_t mask, vint32m2_t dest, vint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m4_tum( @@ -823,7 +823,7 @@ vint32m2_t test_vslideup_vx_i32m2_tum(vbool16_t mask, vint32m2_t dest, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslideup_vx_i32m4_tum(vbool8_t mask, vint32m4_t dest, vint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m8_tum( @@ -832,7 +832,7 @@ vint32m4_t test_vslideup_vx_i32m4_tum(vbool8_t mask, vint32m4_t dest, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslideup_vx_i32m8_tum(vbool4_t mask, vint32m8_t dest, vint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m1_tum( @@ -841,7 +841,7 @@ vint32m8_t test_vslideup_vx_i32m8_tum(vbool4_t mask, vint32m8_t dest, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslideup_vx_i64m1_tum(vbool64_t mask, vint64m1_t dest, vint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m2_tum( @@ -850,7 +850,7 @@ vint64m1_t test_vslideup_vx_i64m1_tum(vbool64_t mask, vint64m1_t dest, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslideup_vx_i64m2_tum(vbool32_t mask, vint64m2_t dest, vint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m4_tum( @@ -859,7 +859,7 @@ vint64m2_t test_vslideup_vx_i64m2_tum(vbool32_t mask, vint64m2_t dest, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslideup_vx_i64m4_tum(vbool16_t mask, vint64m4_t dest, vint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m8_tum( @@ -868,7 +868,7 @@ vint64m4_t test_vslideup_vx_i64m4_tum(vbool16_t mask, vint64m4_t dest, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslideup_vx_i64m8_tum(vbool8_t mask, vint64m8_t dest, vint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf8_tum( @@ -877,7 +877,7 @@ vint64m8_t test_vslideup_vx_i64m8_tum(vbool8_t mask, vint64m8_t dest, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslideup_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t dest, vuint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf4_tum( @@ -886,7 +886,7 @@ vuint8mf8_t test_vslideup_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t dest, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslideup_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t dest, vuint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf2_tum( @@ -895,7 +895,7 @@ vuint8mf4_t test_vslideup_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t dest, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslideup_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t dest, vuint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m1_tum( @@ -904,7 +904,7 @@ vuint8mf2_t test_vslideup_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t dest, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslideup_vx_u8m1_tum(vbool8_t mask, vuint8m1_t dest, vuint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m2_tum( @@ -913,7 +913,7 @@ vuint8m1_t test_vslideup_vx_u8m1_tum(vbool8_t mask, vuint8m1_t dest, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslideup_vx_u8m2_tum(vbool4_t mask, vuint8m2_t dest, vuint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m4_tum( @@ -922,7 +922,7 @@ vuint8m2_t test_vslideup_vx_u8m2_tum(vbool4_t mask, vuint8m2_t dest, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslideup_vx_u8m4_tum(vbool2_t mask, vuint8m4_t dest, vuint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m8_tum( @@ -931,7 +931,7 @@ vuint8m4_t test_vslideup_vx_u8m4_tum(vbool2_t mask, vuint8m4_t dest, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslideup_vx_u8m8_tum(vbool1_t mask, vuint8m8_t dest, vuint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf4_tum( @@ -940,7 +940,7 @@ vuint8m8_t test_vslideup_vx_u8m8_tum(vbool1_t mask, vuint8m8_t dest, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslideup_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t dest, vuint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf2_tum( @@ -949,7 +949,7 @@ vuint16mf4_t test_vslideup_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t dest, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslideup_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t dest, vuint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m1_tum( @@ -958,7 +958,7 @@ vuint16mf2_t test_vslideup_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t dest, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslideup_vx_u16m1_tum(vbool16_t mask, vuint16m1_t dest, vuint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m2_tum( @@ -967,7 +967,7 @@ vuint16m1_t test_vslideup_vx_u16m1_tum(vbool16_t mask, vuint16m1_t dest, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslideup_vx_u16m2_tum(vbool8_t mask, vuint16m2_t dest, vuint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m4_tum( @@ -976,7 +976,7 @@ vuint16m2_t test_vslideup_vx_u16m2_tum(vbool8_t mask, vuint16m2_t dest, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslideup_vx_u16m4_tum(vbool4_t mask, vuint16m4_t dest, vuint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m8_tum( @@ -985,7 +985,7 @@ vuint16m4_t test_vslideup_vx_u16m4_tum(vbool4_t mask, vuint16m4_t dest, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslideup_vx_u16m8_tum(vbool2_t mask, vuint16m8_t dest, vuint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32mf2_tum( @@ -994,7 +994,7 @@ vuint16m8_t test_vslideup_vx_u16m8_tum(vbool2_t mask, vuint16m8_t dest, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslideup_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t dest, vuint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32mf2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32mf2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m1_tum( @@ -1003,7 +1003,7 @@ vuint32mf2_t test_vslideup_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t dest, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslideup_vx_u32m1_tum(vbool32_t mask, vuint32m1_t dest, vuint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m2_tum( @@ -1012,7 +1012,7 @@ vuint32m1_t test_vslideup_vx_u32m1_tum(vbool32_t mask, vuint32m1_t dest, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslideup_vx_u32m2_tum(vbool16_t mask, vuint32m2_t dest, vuint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m4_tum( @@ -1021,7 +1021,7 @@ vuint32m2_t test_vslideup_vx_u32m2_tum(vbool16_t mask, vuint32m2_t dest, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslideup_vx_u32m4_tum(vbool8_t mask, vuint32m4_t dest, vuint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m8_tum( @@ -1030,7 +1030,7 @@ vuint32m4_t test_vslideup_vx_u32m4_tum(vbool8_t mask, vuint32m4_t dest, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslideup_vx_u32m8_tum(vbool4_t mask, vuint32m8_t dest, vuint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m1_tum( @@ -1039,7 +1039,7 @@ vuint32m8_t test_vslideup_vx_u32m8_tum(vbool4_t mask, vuint32m8_t dest, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslideup_vx_u64m1_tum(vbool64_t mask, vuint64m1_t dest, vuint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m1_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m1_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m2_tum( @@ -1048,7 +1048,7 @@ vuint64m1_t test_vslideup_vx_u64m1_tum(vbool64_t mask, vuint64m1_t dest, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslideup_vx_u64m2_tum(vbool32_t mask, vuint64m2_t dest, vuint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m2_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m2_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m4_tum( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vslideup_vx_u64m2_tum(vbool32_t mask, vuint64m2_t dest, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslideup_vx_u64m4_tum(vbool16_t mask, vuint64m4_t dest, vuint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m4_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m4_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m8_tum( @@ -1066,7 +1066,7 @@ vuint64m4_t test_vslideup_vx_u64m4_tum(vbool16_t mask, vuint64m4_t dest, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslideup_vx_u64m8_tum(vbool8_t mask, vuint64m8_t dest, vuint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m8_tum(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m8_tum(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf4_tumu( @@ -1075,7 +1075,7 @@ vuint64m8_t test_vslideup_vx_u64m8_tum(vbool8_t mask, vuint64m8_t dest, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslideup_vx_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t dest, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf2_tumu( @@ -1084,7 +1084,7 @@ vfloat16mf4_t test_vslideup_vx_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t dest, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslideup_vx_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t dest, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m1_tumu( @@ -1093,7 +1093,7 @@ vfloat16mf2_t test_vslideup_vx_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t dest, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslideup_vx_f16m1_tumu(vbool16_t mask, vfloat16m1_t dest, vfloat16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m2_tumu( @@ -1102,7 +1102,7 @@ vfloat16m1_t test_vslideup_vx_f16m1_tumu(vbool16_t mask, vfloat16m1_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslideup_vx_f16m2_tumu(vbool8_t mask, vfloat16m2_t dest, vfloat16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m4_tumu( @@ -1111,7 +1111,7 @@ vfloat16m2_t test_vslideup_vx_f16m2_tumu(vbool8_t mask, vfloat16m2_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslideup_vx_f16m4_tumu(vbool4_t mask, vfloat16m4_t dest, vfloat16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m8_tumu( @@ -1120,7 +1120,7 @@ vfloat16m4_t test_vslideup_vx_f16m4_tumu(vbool4_t mask, vfloat16m4_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslideup_vx_f16m8_tumu(vbool2_t mask, vfloat16m8_t dest, vfloat16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32mf2_tumu( @@ -1129,7 +1129,7 @@ vfloat16m8_t test_vslideup_vx_f16m8_tumu(vbool2_t mask, vfloat16m8_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslideup_vx_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t dest, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32mf2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32mf2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m1_tumu( @@ -1138,7 +1138,7 @@ vfloat32mf2_t test_vslideup_vx_f32mf2_tumu(vbool64_t mask, vfloat32mf2_t dest, v // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslideup_vx_f32m1_tumu(vbool32_t mask, vfloat32m1_t dest, vfloat32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m2_tumu( @@ -1147,7 +1147,7 @@ vfloat32m1_t test_vslideup_vx_f32m1_tumu(vbool32_t mask, vfloat32m1_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslideup_vx_f32m2_tumu(vbool16_t mask, vfloat32m2_t dest, vfloat32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m4_tumu( @@ -1156,7 +1156,7 @@ vfloat32m2_t test_vslideup_vx_f32m2_tumu(vbool16_t mask, vfloat32m2_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslideup_vx_f32m4_tumu(vbool8_t mask, vfloat32m4_t dest, vfloat32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m8_tumu( @@ -1165,7 +1165,7 @@ vfloat32m4_t test_vslideup_vx_f32m4_tumu(vbool8_t mask, vfloat32m4_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslideup_vx_f32m8_tumu(vbool4_t mask, vfloat32m8_t dest, vfloat32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m1_tumu( @@ -1174,7 +1174,7 @@ vfloat32m8_t test_vslideup_vx_f32m8_tumu(vbool4_t mask, vfloat32m8_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslideup_vx_f64m1_tumu(vbool64_t mask, vfloat64m1_t dest, vfloat64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m2_tumu( @@ -1183,7 +1183,7 @@ vfloat64m1_t test_vslideup_vx_f64m1_tumu(vbool64_t mask, vfloat64m1_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslideup_vx_f64m2_tumu(vbool32_t mask, vfloat64m2_t dest, vfloat64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m4_tumu( @@ -1192,7 +1192,7 @@ vfloat64m2_t test_vslideup_vx_f64m2_tumu(vbool32_t mask, vfloat64m2_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslideup_vx_f64m4_tumu(vbool16_t mask, vfloat64m4_t dest, vfloat64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m8_tumu( @@ -1201,7 +1201,7 @@ vfloat64m4_t test_vslideup_vx_f64m4_tumu(vbool16_t mask, vfloat64m4_t dest, vflo // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslideup_vx_f64m8_tumu(vbool8_t mask, vfloat64m8_t dest, vfloat64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf8_tumu( @@ -1210,7 +1210,7 @@ vfloat64m8_t test_vslideup_vx_f64m8_tumu(vbool8_t mask, vfloat64m8_t dest, vfloa // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslideup_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t dest, vint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf4_tumu( @@ -1219,7 +1219,7 @@ vint8mf8_t test_vslideup_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t dest, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslideup_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t dest, vint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf2_tumu( @@ -1228,7 +1228,7 @@ vint8mf4_t test_vslideup_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t dest, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslideup_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t dest, vint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m1_tumu( @@ -1237,7 +1237,7 @@ vint8mf2_t test_vslideup_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t dest, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslideup_vx_i8m1_tumu(vbool8_t mask, vint8m1_t dest, vint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m2_tumu( @@ -1246,7 +1246,7 @@ vint8m1_t test_vslideup_vx_i8m1_tumu(vbool8_t mask, vint8m1_t dest, vint8m1_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslideup_vx_i8m2_tumu(vbool4_t mask, vint8m2_t dest, vint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m4_tumu( @@ -1255,7 +1255,7 @@ vint8m2_t test_vslideup_vx_i8m2_tumu(vbool4_t mask, vint8m2_t dest, vint8m2_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslideup_vx_i8m4_tumu(vbool2_t mask, vint8m4_t dest, vint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m8_tumu( @@ -1264,7 +1264,7 @@ vint8m4_t test_vslideup_vx_i8m4_tumu(vbool2_t mask, vint8m4_t dest, vint8m4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslideup_vx_i8m8_tumu(vbool1_t mask, vint8m8_t dest, vint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf4_tumu( @@ -1273,7 +1273,7 @@ vint8m8_t test_vslideup_vx_i8m8_tumu(vbool1_t mask, vint8m8_t dest, vint8m8_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslideup_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t dest, vint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf2_tumu( @@ -1282,7 +1282,7 @@ vint16mf4_t test_vslideup_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t dest, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslideup_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t dest, vint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m1_tumu( @@ -1291,7 +1291,7 @@ vint16mf2_t test_vslideup_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t dest, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslideup_vx_i16m1_tumu(vbool16_t mask, vint16m1_t dest, vint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m2_tumu( @@ -1300,7 +1300,7 @@ vint16m1_t test_vslideup_vx_i16m1_tumu(vbool16_t mask, vint16m1_t dest, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslideup_vx_i16m2_tumu(vbool8_t mask, vint16m2_t dest, vint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m4_tumu( @@ -1309,7 +1309,7 @@ vint16m2_t test_vslideup_vx_i16m2_tumu(vbool8_t mask, vint16m2_t dest, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslideup_vx_i16m4_tumu(vbool4_t mask, vint16m4_t dest, vint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m8_tumu( @@ -1318,7 +1318,7 @@ vint16m4_t test_vslideup_vx_i16m4_tumu(vbool4_t mask, vint16m4_t dest, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslideup_vx_i16m8_tumu(vbool2_t mask, vint16m8_t dest, vint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32mf2_tumu( @@ -1327,7 +1327,7 @@ vint16m8_t test_vslideup_vx_i16m8_tumu(vbool2_t mask, vint16m8_t dest, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslideup_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t dest, vint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32mf2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32mf2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m1_tumu( @@ -1336,7 +1336,7 @@ vint32mf2_t test_vslideup_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t dest, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslideup_vx_i32m1_tumu(vbool32_t mask, vint32m1_t dest, vint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m2_tumu( @@ -1345,7 +1345,7 @@ vint32m1_t test_vslideup_vx_i32m1_tumu(vbool32_t mask, vint32m1_t dest, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslideup_vx_i32m2_tumu(vbool16_t mask, vint32m2_t dest, vint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m4_tumu( @@ -1354,7 +1354,7 @@ vint32m2_t test_vslideup_vx_i32m2_tumu(vbool16_t mask, vint32m2_t dest, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslideup_vx_i32m4_tumu(vbool8_t mask, vint32m4_t dest, vint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m8_tumu( @@ -1363,7 +1363,7 @@ vint32m4_t test_vslideup_vx_i32m4_tumu(vbool8_t mask, vint32m4_t dest, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslideup_vx_i32m8_tumu(vbool4_t mask, vint32m8_t dest, vint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m1_tumu( @@ -1372,7 +1372,7 @@ vint32m8_t test_vslideup_vx_i32m8_tumu(vbool4_t mask, vint32m8_t dest, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslideup_vx_i64m1_tumu(vbool64_t mask, vint64m1_t dest, vint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m2_tumu( @@ -1381,7 +1381,7 @@ vint64m1_t test_vslideup_vx_i64m1_tumu(vbool64_t mask, vint64m1_t dest, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslideup_vx_i64m2_tumu(vbool32_t mask, vint64m2_t dest, vint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m4_tumu( @@ -1390,7 +1390,7 @@ vint64m2_t test_vslideup_vx_i64m2_tumu(vbool32_t mask, vint64m2_t dest, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslideup_vx_i64m4_tumu(vbool16_t mask, vint64m4_t dest, vint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m8_tumu( @@ -1399,7 +1399,7 @@ vint64m4_t test_vslideup_vx_i64m4_tumu(vbool16_t mask, vint64m4_t dest, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslideup_vx_i64m8_tumu(vbool8_t mask, vint64m8_t dest, vint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf8_tumu( @@ -1408,7 +1408,7 @@ vint64m8_t test_vslideup_vx_i64m8_tumu(vbool8_t mask, vint64m8_t dest, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslideup_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t dest, vuint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf4_tumu( @@ -1417,7 +1417,7 @@ vuint8mf8_t test_vslideup_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t dest, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslideup_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t dest, vuint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf2_tumu( @@ -1426,7 +1426,7 @@ vuint8mf4_t test_vslideup_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t dest, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslideup_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t dest, vuint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m1_tumu( @@ -1435,7 +1435,7 @@ vuint8mf2_t test_vslideup_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t dest, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslideup_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t dest, vuint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m2_tumu( @@ -1444,7 +1444,7 @@ vuint8m1_t test_vslideup_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t dest, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslideup_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t dest, vuint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m4_tumu( @@ -1453,7 +1453,7 @@ vuint8m2_t test_vslideup_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t dest, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslideup_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t dest, vuint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m8_tumu( @@ -1462,7 +1462,7 @@ vuint8m4_t test_vslideup_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t dest, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslideup_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t dest, vuint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf4_tumu( @@ -1471,7 +1471,7 @@ vuint8m8_t test_vslideup_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t dest, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslideup_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t dest, vuint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf2_tumu( @@ -1480,7 +1480,7 @@ vuint16mf4_t test_vslideup_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t dest, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslideup_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t dest, vuint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m1_tumu( @@ -1489,7 +1489,7 @@ vuint16mf2_t test_vslideup_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t dest, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslideup_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t dest, vuint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m2_tumu( @@ -1498,7 +1498,7 @@ vuint16m1_t test_vslideup_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t dest, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslideup_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t dest, vuint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m4_tumu( @@ -1507,7 +1507,7 @@ vuint16m2_t test_vslideup_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t dest, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslideup_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t dest, vuint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m8_tumu( @@ -1516,7 +1516,7 @@ vuint16m4_t test_vslideup_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t dest, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslideup_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t dest, vuint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32mf2_tumu( @@ -1525,7 +1525,7 @@ vuint16m8_t test_vslideup_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t dest, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslideup_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t dest, vuint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32mf2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32mf2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m1_tumu( @@ -1534,7 +1534,7 @@ vuint32mf2_t test_vslideup_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t dest, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslideup_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t dest, vuint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m2_tumu( @@ -1543,7 +1543,7 @@ vuint32m1_t test_vslideup_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t dest, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslideup_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t dest, vuint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m4_tumu( @@ -1552,7 +1552,7 @@ vuint32m2_t test_vslideup_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t dest, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslideup_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t dest, vuint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m8_tumu( @@ -1561,7 +1561,7 @@ vuint32m4_t test_vslideup_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t dest, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslideup_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t dest, vuint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m1_tumu( @@ -1570,7 +1570,7 @@ vuint32m8_t test_vslideup_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t dest, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslideup_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t dest, vuint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m1_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m1_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m2_tumu( @@ -1579,7 +1579,7 @@ vuint64m1_t test_vslideup_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t dest, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslideup_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t dest, vuint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m2_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m2_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m4_tumu( @@ -1588,7 +1588,7 @@ vuint64m2_t test_vslideup_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t dest, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslideup_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t dest, vuint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m4_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m4_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m8_tumu( @@ -1597,7 +1597,7 @@ vuint64m4_t test_vslideup_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t dest, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslideup_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t dest, vuint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m8_tumu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m8_tumu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf4_mu( @@ -1606,7 +1606,7 @@ vuint64m8_t test_vslideup_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t dest, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf4_t test_vslideup_vx_f16mf4_mu(vbool64_t mask, vfloat16mf4_t dest, vfloat16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16mf2_mu( @@ -1615,7 +1615,7 @@ vfloat16mf4_t test_vslideup_vx_f16mf4_mu(vbool64_t mask, vfloat16mf4_t dest, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16mf2_t test_vslideup_vx_f16mf2_mu(vbool32_t mask, vfloat16mf2_t dest, vfloat16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16mf2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16mf2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m1_mu( @@ -1624,7 +1624,7 @@ vfloat16mf2_t test_vslideup_vx_f16mf2_mu(vbool32_t mask, vfloat16mf2_t dest, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m1_t test_vslideup_vx_f16m1_mu(vbool16_t mask, vfloat16m1_t dest, vfloat16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m2_mu( @@ -1633,7 +1633,7 @@ vfloat16m1_t test_vslideup_vx_f16m1_mu(vbool16_t mask, vfloat16m1_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m2_t test_vslideup_vx_f16m2_mu(vbool8_t mask, vfloat16m2_t dest, vfloat16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m4_mu( @@ -1642,7 +1642,7 @@ vfloat16m2_t test_vslideup_vx_f16m2_mu(vbool8_t mask, vfloat16m2_t dest, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m4_t test_vslideup_vx_f16m4_mu(vbool4_t mask, vfloat16m4_t dest, vfloat16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f16m8_mu( @@ -1651,7 +1651,7 @@ vfloat16m4_t test_vslideup_vx_f16m4_mu(vbool4_t mask, vfloat16m4_t dest, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat16m8_t test_vslideup_vx_f16m8_mu(vbool2_t mask, vfloat16m8_t dest, vfloat16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f16m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f16m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32mf2_mu( @@ -1660,7 +1660,7 @@ vfloat16m8_t test_vslideup_vx_f16m8_mu(vbool2_t mask, vfloat16m8_t dest, vfloat1 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32mf2_t test_vslideup_vx_f32mf2_mu(vbool64_t mask, vfloat32mf2_t dest, vfloat32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32mf2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32mf2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m1_mu( @@ -1669,7 +1669,7 @@ vfloat32mf2_t test_vslideup_vx_f32mf2_mu(vbool64_t mask, vfloat32mf2_t dest, vfl // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m1_t test_vslideup_vx_f32m1_mu(vbool32_t mask, vfloat32m1_t dest, vfloat32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m2_mu( @@ -1678,7 +1678,7 @@ vfloat32m1_t test_vslideup_vx_f32m1_mu(vbool32_t mask, vfloat32m1_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m2_t test_vslideup_vx_f32m2_mu(vbool16_t mask, vfloat32m2_t dest, vfloat32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m4_mu( @@ -1687,7 +1687,7 @@ vfloat32m2_t test_vslideup_vx_f32m2_mu(vbool16_t mask, vfloat32m2_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m4_t test_vslideup_vx_f32m4_mu(vbool8_t mask, vfloat32m4_t dest, vfloat32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f32m8_mu( @@ -1696,7 +1696,7 @@ vfloat32m4_t test_vslideup_vx_f32m4_mu(vbool8_t mask, vfloat32m4_t dest, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat32m8_t test_vslideup_vx_f32m8_mu(vbool4_t mask, vfloat32m8_t dest, vfloat32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f32m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f32m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m1_mu( @@ -1705,7 +1705,7 @@ vfloat32m8_t test_vslideup_vx_f32m8_mu(vbool4_t mask, vfloat32m8_t dest, vfloat3 // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m1_t test_vslideup_vx_f64m1_mu(vbool64_t mask, vfloat64m1_t dest, vfloat64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m2_mu( @@ -1714,7 +1714,7 @@ vfloat64m1_t test_vslideup_vx_f64m1_mu(vbool64_t mask, vfloat64m1_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m2_t test_vslideup_vx_f64m2_mu(vbool32_t mask, vfloat64m2_t dest, vfloat64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m4_mu( @@ -1723,7 +1723,7 @@ vfloat64m2_t test_vslideup_vx_f64m2_mu(vbool32_t mask, vfloat64m2_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m4_t test_vslideup_vx_f64m4_mu(vbool16_t mask, vfloat64m4_t dest, vfloat64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_f64m8_mu( @@ -1732,7 +1732,7 @@ vfloat64m4_t test_vslideup_vx_f64m4_mu(vbool16_t mask, vfloat64m4_t dest, vfloat // CHECK-RV64-NEXT: ret [[TMP0]] // vfloat64m8_t test_vslideup_vx_f64m8_mu(vbool8_t mask, vfloat64m8_t dest, vfloat64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_f64m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_f64m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf8_mu( @@ -1741,7 +1741,7 @@ vfloat64m8_t test_vslideup_vx_f64m8_mu(vbool8_t mask, vfloat64m8_t dest, vfloat6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vslideup_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t dest, vint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf4_mu( @@ -1750,7 +1750,7 @@ vint8mf8_t test_vslideup_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t dest, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vslideup_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t dest, vint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8mf2_mu( @@ -1759,7 +1759,7 @@ vint8mf4_t test_vslideup_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t dest, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vslideup_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t dest, vint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8mf2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8mf2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m1_mu( @@ -1768,7 +1768,7 @@ vint8mf2_t test_vslideup_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t dest, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vslideup_vx_i8m1_mu(vbool8_t mask, vint8m1_t dest, vint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m2_mu( @@ -1777,7 +1777,7 @@ vint8m1_t test_vslideup_vx_i8m1_mu(vbool8_t mask, vint8m1_t dest, vint8m1_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vslideup_vx_i8m2_mu(vbool4_t mask, vint8m2_t dest, vint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m4_mu( @@ -1786,7 +1786,7 @@ vint8m2_t test_vslideup_vx_i8m2_mu(vbool4_t mask, vint8m2_t dest, vint8m2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vslideup_vx_i8m4_mu(vbool2_t mask, vint8m4_t dest, vint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i8m8_mu( @@ -1795,7 +1795,7 @@ vint8m4_t test_vslideup_vx_i8m4_mu(vbool2_t mask, vint8m4_t dest, vint8m4_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vslideup_vx_i8m8_mu(vbool1_t mask, vint8m8_t dest, vint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i8m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i8m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf4_mu( @@ -1804,7 +1804,7 @@ vint8m8_t test_vslideup_vx_i8m8_mu(vbool1_t mask, vint8m8_t dest, vint8m8_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vslideup_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t dest, vint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16mf2_mu( @@ -1813,7 +1813,7 @@ vint16mf4_t test_vslideup_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t dest, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vslideup_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t dest, vint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16mf2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16mf2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m1_mu( @@ -1822,7 +1822,7 @@ vint16mf2_t test_vslideup_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t dest, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vslideup_vx_i16m1_mu(vbool16_t mask, vint16m1_t dest, vint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m2_mu( @@ -1831,7 +1831,7 @@ vint16m1_t test_vslideup_vx_i16m1_mu(vbool16_t mask, vint16m1_t dest, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vslideup_vx_i16m2_mu(vbool8_t mask, vint16m2_t dest, vint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m4_mu( @@ -1840,7 +1840,7 @@ vint16m2_t test_vslideup_vx_i16m2_mu(vbool8_t mask, vint16m2_t dest, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vslideup_vx_i16m4_mu(vbool4_t mask, vint16m4_t dest, vint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i16m8_mu( @@ -1849,7 +1849,7 @@ vint16m4_t test_vslideup_vx_i16m4_mu(vbool4_t mask, vint16m4_t dest, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vslideup_vx_i16m8_mu(vbool2_t mask, vint16m8_t dest, vint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i16m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i16m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32mf2_mu( @@ -1858,7 +1858,7 @@ vint16m8_t test_vslideup_vx_i16m8_mu(vbool2_t mask, vint16m8_t dest, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vslideup_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t dest, vint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32mf2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32mf2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m1_mu( @@ -1867,7 +1867,7 @@ vint32mf2_t test_vslideup_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t dest, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vslideup_vx_i32m1_mu(vbool32_t mask, vint32m1_t dest, vint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m2_mu( @@ -1876,7 +1876,7 @@ vint32m1_t test_vslideup_vx_i32m1_mu(vbool32_t mask, vint32m1_t dest, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vslideup_vx_i32m2_mu(vbool16_t mask, vint32m2_t dest, vint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m4_mu( @@ -1885,7 +1885,7 @@ vint32m2_t test_vslideup_vx_i32m2_mu(vbool16_t mask, vint32m2_t dest, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vslideup_vx_i32m4_mu(vbool8_t mask, vint32m4_t dest, vint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i32m8_mu( @@ -1894,7 +1894,7 @@ vint32m4_t test_vslideup_vx_i32m4_mu(vbool8_t mask, vint32m4_t dest, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vslideup_vx_i32m8_mu(vbool4_t mask, vint32m8_t dest, vint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i32m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i32m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m1_mu( @@ -1903,7 +1903,7 @@ vint32m8_t test_vslideup_vx_i32m8_mu(vbool4_t mask, vint32m8_t dest, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vslideup_vx_i64m1_mu(vbool64_t mask, vint64m1_t dest, vint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m2_mu( @@ -1912,7 +1912,7 @@ vint64m1_t test_vslideup_vx_i64m1_mu(vbool64_t mask, vint64m1_t dest, vint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vslideup_vx_i64m2_mu(vbool32_t mask, vint64m2_t dest, vint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m4_mu( @@ -1921,7 +1921,7 @@ vint64m2_t test_vslideup_vx_i64m2_mu(vbool32_t mask, vint64m2_t dest, vint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vslideup_vx_i64m4_mu(vbool16_t mask, vint64m4_t dest, vint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_i64m8_mu( @@ -1930,7 +1930,7 @@ vint64m4_t test_vslideup_vx_i64m4_mu(vbool16_t mask, vint64m4_t dest, vint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vslideup_vx_i64m8_mu(vbool8_t mask, vint64m8_t dest, vint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_i64m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_i64m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf8_mu( @@ -1939,7 +1939,7 @@ vint64m8_t test_vslideup_vx_i64m8_mu(vbool8_t mask, vint64m8_t dest, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vslideup_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t dest, vuint8mf8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf4_mu( @@ -1948,7 +1948,7 @@ vuint8mf8_t test_vslideup_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t dest, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vslideup_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t dest, vuint8mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8mf2_mu( @@ -1957,7 +1957,7 @@ vuint8mf4_t test_vslideup_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t dest, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vslideup_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t dest, vuint8mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8mf2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8mf2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m1_mu( @@ -1966,7 +1966,7 @@ vuint8mf2_t test_vslideup_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t dest, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vslideup_vx_u8m1_mu(vbool8_t mask, vuint8m1_t dest, vuint8m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m2_mu( @@ -1975,7 +1975,7 @@ vuint8m1_t test_vslideup_vx_u8m1_mu(vbool8_t mask, vuint8m1_t dest, vuint8m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vslideup_vx_u8m2_mu(vbool4_t mask, vuint8m2_t dest, vuint8m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m4_mu( @@ -1984,7 +1984,7 @@ vuint8m2_t test_vslideup_vx_u8m2_mu(vbool4_t mask, vuint8m2_t dest, vuint8m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vslideup_vx_u8m4_mu(vbool2_t mask, vuint8m4_t dest, vuint8m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u8m8_mu( @@ -1993,7 +1993,7 @@ vuint8m4_t test_vslideup_vx_u8m4_mu(vbool2_t mask, vuint8m4_t dest, vuint8m4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vslideup_vx_u8m8_mu(vbool1_t mask, vuint8m8_t dest, vuint8m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u8m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u8m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf4_mu( @@ -2002,7 +2002,7 @@ vuint8m8_t test_vslideup_vx_u8m8_mu(vbool1_t mask, vuint8m8_t dest, vuint8m8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vslideup_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t dest, vuint16mf4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16mf2_mu( @@ -2011,7 +2011,7 @@ vuint16mf4_t test_vslideup_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t dest, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vslideup_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t dest, vuint16mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16mf2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16mf2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m1_mu( @@ -2020,7 +2020,7 @@ vuint16mf2_t test_vslideup_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t dest, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vslideup_vx_u16m1_mu(vbool16_t mask, vuint16m1_t dest, vuint16m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m2_mu( @@ -2029,7 +2029,7 @@ vuint16m1_t test_vslideup_vx_u16m1_mu(vbool16_t mask, vuint16m1_t dest, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vslideup_vx_u16m2_mu(vbool8_t mask, vuint16m2_t dest, vuint16m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m4_mu( @@ -2038,7 +2038,7 @@ vuint16m2_t test_vslideup_vx_u16m2_mu(vbool8_t mask, vuint16m2_t dest, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vslideup_vx_u16m4_mu(vbool4_t mask, vuint16m4_t dest, vuint16m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u16m8_mu( @@ -2047,7 +2047,7 @@ vuint16m4_t test_vslideup_vx_u16m4_mu(vbool4_t mask, vuint16m4_t dest, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vslideup_vx_u16m8_mu(vbool2_t mask, vuint16m8_t dest, vuint16m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u16m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u16m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32mf2_mu( @@ -2056,7 +2056,7 @@ vuint16m8_t test_vslideup_vx_u16m8_mu(vbool2_t mask, vuint16m8_t dest, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vslideup_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t dest, vuint32mf2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32mf2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32mf2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m1_mu( @@ -2065,7 +2065,7 @@ vuint32mf2_t test_vslideup_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t dest, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vslideup_vx_u32m1_mu(vbool32_t mask, vuint32m1_t dest, vuint32m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m2_mu( @@ -2074,7 +2074,7 @@ vuint32m1_t test_vslideup_vx_u32m1_mu(vbool32_t mask, vuint32m1_t dest, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vslideup_vx_u32m2_mu(vbool16_t mask, vuint32m2_t dest, vuint32m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m4_mu( @@ -2083,7 +2083,7 @@ vuint32m2_t test_vslideup_vx_u32m2_mu(vbool16_t mask, vuint32m2_t dest, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vslideup_vx_u32m4_mu(vbool8_t mask, vuint32m4_t dest, vuint32m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u32m8_mu( @@ -2092,7 +2092,7 @@ vuint32m4_t test_vslideup_vx_u32m4_mu(vbool8_t mask, vuint32m4_t dest, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vslideup_vx_u32m8_mu(vbool4_t mask, vuint32m8_t dest, vuint32m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u32m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u32m8_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m1_mu( @@ -2101,7 +2101,7 @@ vuint32m8_t test_vslideup_vx_u32m8_mu(vbool4_t mask, vuint32m8_t dest, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vslideup_vx_u64m1_mu(vbool64_t mask, vuint64m1_t dest, vuint64m1_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m1_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m1_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m2_mu( @@ -2110,7 +2110,7 @@ vuint64m1_t test_vslideup_vx_u64m1_mu(vbool64_t mask, vuint64m1_t dest, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vslideup_vx_u64m2_mu(vbool32_t mask, vuint64m2_t dest, vuint64m2_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m2_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m2_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m4_mu( @@ -2119,7 +2119,7 @@ vuint64m2_t test_vslideup_vx_u64m2_mu(vbool32_t mask, vuint64m2_t dest, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vslideup_vx_u64m4_mu(vbool16_t mask, vuint64m4_t dest, vuint64m4_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m4_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m4_mu(mask, dest, src, offset, vl); } // CHECK-RV64-LABEL: @test_vslideup_vx_u64m8_mu( @@ -2128,6 +2128,6 @@ vuint64m4_t test_vslideup_vx_u64m4_mu(vbool16_t mask, vuint64m4_t dest, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vslideup_vx_u64m8_mu(vbool8_t mask, vuint64m8_t dest, vuint64m8_t src, size_t offset, size_t vl) { - return vslideup_vx_u64m8_mu(mask, dest, src, offset, vl); + return __riscv_vslideup_vx_u64m8_mu(mask, dest, src, offset, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsll.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsll.c index 2d57a3b6dde66a7f3b7e3828121febc576b0fbd1..d78721b3b26782eecc572ad9e9a51969d44e2e6b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsll.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsll.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vsll_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vsll_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vsll_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vsll_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vsll_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vsll_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vsll_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vsll_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vsll_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vsll_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vsll_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vsll_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_i8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vsll_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vsll_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vsll_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vsll_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vsll_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vsll_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vsll_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vsll_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vsll_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vsll_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vsll_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vsll_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_i16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vsll_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vsll_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vsll_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vsll_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vsll_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vsll_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vsll_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vsll_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vsll_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vsll_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_i32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vsll_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vsll_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_i64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vsll_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vsll_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_i64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vsll_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vsll_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_i64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vsll_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vsll_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_i64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vsll_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vsll_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsll_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsll_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsll_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsll_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsll_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsll_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vsll_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vsll_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vsll_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vsll_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vsll_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vsll_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_u8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vsll_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vsll_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsll_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsll_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsll_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsll_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vsll_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vsll_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vsll_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vsll_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vsll_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vsll_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_u16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vsll_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vsll_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsll_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsll_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vsll_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vsll_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vsll_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vsll_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vsll_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vsll_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_u32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vsll_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vsll_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_u64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vsll_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vsll_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_u64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vsll_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vsll_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_u64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vsll_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vsll_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_u64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m8_tu( @@ -795,7 +795,7 @@ vuint64m8_t test_vsll_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf8_tum( @@ -804,7 +804,7 @@ vuint64m8_t test_vsll_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf8_tum( @@ -813,7 +813,7 @@ vint8mf8_t test_vsll_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf4_tum( @@ -822,7 +822,7 @@ vint8mf8_t test_vsll_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf4_tum( @@ -831,7 +831,7 @@ vint8mf4_t test_vsll_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf2_tum( @@ -840,7 +840,7 @@ vint8mf4_t test_vsll_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf2_tum( @@ -849,7 +849,7 @@ vint8mf2_t test_vsll_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m1_tum( @@ -858,7 +858,7 @@ vint8mf2_t test_vsll_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m1_tum( @@ -867,7 +867,7 @@ vint8m1_t test_vsll_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m2_tum( @@ -876,7 +876,7 @@ vint8m1_t test_vsll_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m2_tum( @@ -885,7 +885,7 @@ vint8m2_t test_vsll_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m4_tum( @@ -894,7 +894,7 @@ vint8m2_t test_vsll_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m4_tum( @@ -903,7 +903,7 @@ vint8m4_t test_vsll_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m8_tum( @@ -912,7 +912,7 @@ vint8m4_t test_vsll_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_i8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m8_tum( @@ -921,7 +921,7 @@ vint8m8_t test_vsll_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf4_tum( @@ -930,7 +930,7 @@ vint8m8_t test_vsll_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf4_tum( @@ -939,7 +939,7 @@ vint16mf4_t test_vsll_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf2_tum( @@ -948,7 +948,7 @@ vint16mf4_t test_vsll_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf2_tum( @@ -957,7 +957,7 @@ vint16mf2_t test_vsll_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m1_tum( @@ -966,7 +966,7 @@ vint16mf2_t test_vsll_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m1_tum( @@ -975,7 +975,7 @@ vint16m1_t test_vsll_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m2_tum( @@ -984,7 +984,7 @@ vint16m1_t test_vsll_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m2_tum( @@ -993,7 +993,7 @@ vint16m2_t test_vsll_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m4_tum( @@ -1002,7 +1002,7 @@ vint16m2_t test_vsll_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m4_tum( @@ -1011,7 +1011,7 @@ vint16m4_t test_vsll_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m8_tum( @@ -1020,7 +1020,7 @@ vint16m4_t test_vsll_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_i16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m8_tum( @@ -1029,7 +1029,7 @@ vint16m8_t test_vsll_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32mf2_tum( @@ -1038,7 +1038,7 @@ vint16m8_t test_vsll_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32mf2_tum( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vsll_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m1_tum( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vsll_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m1_tum( @@ -1065,7 +1065,7 @@ vint32m1_t test_vsll_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m2_tum( @@ -1074,7 +1074,7 @@ vint32m1_t test_vsll_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m2_tum( @@ -1083,7 +1083,7 @@ vint32m2_t test_vsll_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m4_tum( @@ -1092,7 +1092,7 @@ vint32m2_t test_vsll_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m4_tum( @@ -1101,7 +1101,7 @@ vint32m4_t test_vsll_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m8_tum( @@ -1110,7 +1110,7 @@ vint32m4_t test_vsll_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_i32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m8_tum( @@ -1119,7 +1119,7 @@ vint32m8_t test_vsll_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m1_tum( @@ -1128,7 +1128,7 @@ vint32m8_t test_vsll_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_i64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m1_tum( @@ -1137,7 +1137,7 @@ vint64m1_t test_vsll_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m2_tum( @@ -1146,7 +1146,7 @@ vint64m1_t test_vsll_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_i64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m2_tum( @@ -1155,7 +1155,7 @@ vint64m2_t test_vsll_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m4_tum( @@ -1164,7 +1164,7 @@ vint64m2_t test_vsll_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_i64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m4_tum( @@ -1173,7 +1173,7 @@ vint64m4_t test_vsll_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m8_tum( @@ -1182,7 +1182,7 @@ vint64m4_t test_vsll_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_i64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m8_tum( @@ -1191,7 +1191,7 @@ vint64m8_t test_vsll_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf8_tum( @@ -1200,7 +1200,7 @@ vint64m8_t test_vsll_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf8_tum( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vsll_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf4_tum( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vsll_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf4_tum( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vsll_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf2_tum( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vsll_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf2_tum( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vsll_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m1_tum( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vsll_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m1_tum( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vsll_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m2_tum( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vsll_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m2_tum( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vsll_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m4_tum( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vsll_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m4_tum( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vsll_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m8_tum( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vsll_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_u8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m8_tum( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vsll_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf4_tum( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vsll_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf4_tum( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vsll_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf2_tum( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vsll_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf2_tum( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vsll_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m1_tum( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vsll_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m1_tum( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vsll_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m2_tum( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vsll_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m2_tum( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vsll_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m4_tum( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vsll_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m4_tum( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vsll_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m8_tum( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vsll_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_u16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m8_tum( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vsll_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32mf2_tum( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vsll_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32mf2_tum( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vsll_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m1_tum( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vsll_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m1_tum( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vsll_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m2_tum( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vsll_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m2_tum( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vsll_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m4_tum( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vsll_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m4_tum( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vsll_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m8_tum( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vsll_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_u32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m8_tum( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vsll_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m1_tum( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vsll_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_u64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m1_tum( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vsll_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m2_tum( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vsll_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_u64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m2_tum( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vsll_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m4_tum( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vsll_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_u64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m4_tum( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vsll_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m8_tum( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vsll_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_u64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m8_tum( @@ -1587,7 +1587,7 @@ vuint64m8_t test_vsll_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf8_tumu( @@ -1596,7 +1596,7 @@ vuint64m8_t test_vsll_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf8_tumu( @@ -1605,7 +1605,7 @@ vint8mf8_t test_vsll_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf4_tumu( @@ -1614,7 +1614,7 @@ vint8mf8_t test_vsll_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf4_tumu( @@ -1623,7 +1623,7 @@ vint8mf4_t test_vsll_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf2_tumu( @@ -1632,7 +1632,7 @@ vint8mf4_t test_vsll_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf2_tumu( @@ -1641,7 +1641,7 @@ vint8mf2_t test_vsll_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m1_tumu( @@ -1650,7 +1650,7 @@ vint8mf2_t test_vsll_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m1_tumu( @@ -1659,7 +1659,7 @@ vint8m1_t test_vsll_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m2_tumu( @@ -1668,7 +1668,7 @@ vint8m1_t test_vsll_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m2_tumu( @@ -1677,7 +1677,7 @@ vint8m2_t test_vsll_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m4_tumu( @@ -1686,7 +1686,7 @@ vint8m2_t test_vsll_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m4_tumu( @@ -1695,7 +1695,7 @@ vint8m4_t test_vsll_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m8_tumu( @@ -1704,7 +1704,7 @@ vint8m4_t test_vsll_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_i8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m8_tumu( @@ -1713,7 +1713,7 @@ vint8m8_t test_vsll_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf4_tumu( @@ -1722,7 +1722,7 @@ vint8m8_t test_vsll_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf4_tumu( @@ -1731,7 +1731,7 @@ vint16mf4_t test_vsll_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf2_tumu( @@ -1740,7 +1740,7 @@ vint16mf4_t test_vsll_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf2_tumu( @@ -1749,7 +1749,7 @@ vint16mf2_t test_vsll_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m1_tumu( @@ -1758,7 +1758,7 @@ vint16mf2_t test_vsll_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m1_tumu( @@ -1767,7 +1767,7 @@ vint16m1_t test_vsll_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m2_tumu( @@ -1776,7 +1776,7 @@ vint16m1_t test_vsll_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m2_tumu( @@ -1785,7 +1785,7 @@ vint16m2_t test_vsll_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m4_tumu( @@ -1794,7 +1794,7 @@ vint16m2_t test_vsll_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m4_tumu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vsll_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m8_tumu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vsll_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_i16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m8_tumu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vsll_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32mf2_tumu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vsll_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32mf2_tumu( @@ -1839,7 +1839,7 @@ vint32mf2_t test_vsll_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m1_tumu( @@ -1848,7 +1848,7 @@ vint32mf2_t test_vsll_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m1_tumu( @@ -1857,7 +1857,7 @@ vint32m1_t test_vsll_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m2_tumu( @@ -1866,7 +1866,7 @@ vint32m1_t test_vsll_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m2_tumu( @@ -1875,7 +1875,7 @@ vint32m2_t test_vsll_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m4_tumu( @@ -1884,7 +1884,7 @@ vint32m2_t test_vsll_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m4_tumu( @@ -1893,7 +1893,7 @@ vint32m4_t test_vsll_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m8_tumu( @@ -1902,7 +1902,7 @@ vint32m4_t test_vsll_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_i32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m8_tumu( @@ -1911,7 +1911,7 @@ vint32m8_t test_vsll_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m1_tumu( @@ -1920,7 +1920,7 @@ vint32m8_t test_vsll_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_i64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m1_tumu( @@ -1929,7 +1929,7 @@ vint64m1_t test_vsll_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m2_tumu( @@ -1938,7 +1938,7 @@ vint64m1_t test_vsll_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_i64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m2_tumu( @@ -1947,7 +1947,7 @@ vint64m2_t test_vsll_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m4_tumu( @@ -1956,7 +1956,7 @@ vint64m2_t test_vsll_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_i64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m4_tumu( @@ -1965,7 +1965,7 @@ vint64m4_t test_vsll_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m8_tumu( @@ -1974,7 +1974,7 @@ vint64m4_t test_vsll_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_i64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m8_tumu( @@ -1983,7 +1983,7 @@ vint64m8_t test_vsll_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf8_tumu( @@ -1992,7 +1992,7 @@ vint64m8_t test_vsll_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf8_tumu( @@ -2001,7 +2001,7 @@ vuint8mf8_t test_vsll_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf4_tumu( @@ -2010,7 +2010,7 @@ vuint8mf8_t test_vsll_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf4_tumu( @@ -2019,7 +2019,7 @@ vuint8mf4_t test_vsll_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf2_tumu( @@ -2028,7 +2028,7 @@ vuint8mf4_t test_vsll_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf2_tumu( @@ -2037,7 +2037,7 @@ vuint8mf2_t test_vsll_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m1_tumu( @@ -2046,7 +2046,7 @@ vuint8mf2_t test_vsll_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m1_tumu( @@ -2055,7 +2055,7 @@ vuint8m1_t test_vsll_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m2_tumu( @@ -2064,7 +2064,7 @@ vuint8m1_t test_vsll_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m2_tumu( @@ -2073,7 +2073,7 @@ vuint8m2_t test_vsll_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m4_tumu( @@ -2082,7 +2082,7 @@ vuint8m2_t test_vsll_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m4_tumu( @@ -2091,7 +2091,7 @@ vuint8m4_t test_vsll_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m8_tumu( @@ -2100,7 +2100,7 @@ vuint8m4_t test_vsll_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_u8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m8_tumu( @@ -2109,7 +2109,7 @@ vuint8m8_t test_vsll_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf4_tumu( @@ -2118,7 +2118,7 @@ vuint8m8_t test_vsll_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf4_tumu( @@ -2127,7 +2127,7 @@ vuint16mf4_t test_vsll_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf2_tumu( @@ -2136,7 +2136,7 @@ vuint16mf4_t test_vsll_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf2_tumu( @@ -2145,7 +2145,7 @@ vuint16mf2_t test_vsll_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m1_tumu( @@ -2154,7 +2154,7 @@ vuint16mf2_t test_vsll_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m1_tumu( @@ -2163,7 +2163,7 @@ vuint16m1_t test_vsll_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m2_tumu( @@ -2172,7 +2172,7 @@ vuint16m1_t test_vsll_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m2_tumu( @@ -2181,7 +2181,7 @@ vuint16m2_t test_vsll_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m4_tumu( @@ -2190,7 +2190,7 @@ vuint16m2_t test_vsll_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m4_tumu( @@ -2199,7 +2199,7 @@ vuint16m4_t test_vsll_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m8_tumu( @@ -2208,7 +2208,7 @@ vuint16m4_t test_vsll_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_u16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m8_tumu( @@ -2217,7 +2217,7 @@ vuint16m8_t test_vsll_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32mf2_tumu( @@ -2226,7 +2226,7 @@ vuint16m8_t test_vsll_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32mf2_tumu( @@ -2235,7 +2235,7 @@ vuint32mf2_t test_vsll_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m1_tumu( @@ -2244,7 +2244,7 @@ vuint32mf2_t test_vsll_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m1_tumu( @@ -2253,7 +2253,7 @@ vuint32m1_t test_vsll_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m2_tumu( @@ -2262,7 +2262,7 @@ vuint32m1_t test_vsll_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m2_tumu( @@ -2271,7 +2271,7 @@ vuint32m2_t test_vsll_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m4_tumu( @@ -2280,7 +2280,7 @@ vuint32m2_t test_vsll_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m4_tumu( @@ -2289,7 +2289,7 @@ vuint32m4_t test_vsll_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m8_tumu( @@ -2298,7 +2298,7 @@ vuint32m4_t test_vsll_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_u32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m8_tumu( @@ -2307,7 +2307,7 @@ vuint32m8_t test_vsll_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m1_tumu( @@ -2316,7 +2316,7 @@ vuint32m8_t test_vsll_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_u64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m1_tumu( @@ -2325,7 +2325,7 @@ vuint64m1_t test_vsll_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m2_tumu( @@ -2334,7 +2334,7 @@ vuint64m1_t test_vsll_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_u64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m2_tumu( @@ -2343,7 +2343,7 @@ vuint64m2_t test_vsll_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m4_tumu( @@ -2352,7 +2352,7 @@ vuint64m2_t test_vsll_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_u64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m4_tumu( @@ -2361,7 +2361,7 @@ vuint64m4_t test_vsll_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m8_tumu( @@ -2370,7 +2370,7 @@ vuint64m4_t test_vsll_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_u64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m8_tumu( @@ -2379,7 +2379,7 @@ vuint64m8_t test_vsll_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf8_mu( @@ -2388,7 +2388,7 @@ vuint64m8_t test_vsll_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf8_mu( @@ -2397,7 +2397,7 @@ vint8mf8_t test_vsll_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsll_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf4_mu( @@ -2406,7 +2406,7 @@ vint8mf8_t test_vsll_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf4_mu( @@ -2415,7 +2415,7 @@ vint8mf4_t test_vsll_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsll_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8mf2_mu( @@ -2424,7 +2424,7 @@ vint8mf4_t test_vsll_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8mf2_mu( @@ -2433,7 +2433,7 @@ vint8mf2_t test_vsll_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsll_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m1_mu( @@ -2442,7 +2442,7 @@ vint8mf2_t test_vsll_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m1_mu( @@ -2451,7 +2451,7 @@ vint8m1_t test_vsll_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsll_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m2_mu( @@ -2460,7 +2460,7 @@ vint8m1_t test_vsll_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m2_mu( @@ -2469,7 +2469,7 @@ vint8m2_t test_vsll_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsll_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m4_mu( @@ -2478,7 +2478,7 @@ vint8m2_t test_vsll_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m4_mu( @@ -2487,7 +2487,7 @@ vint8m4_t test_vsll_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsll_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i8m8_mu( @@ -2496,7 +2496,7 @@ vint8m4_t test_vsll_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_i8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i8m8_mu( @@ -2505,7 +2505,7 @@ vint8m8_t test_vsll_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsll_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf4_mu( @@ -2514,7 +2514,7 @@ vint8m8_t test_vsll_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf4_mu( @@ -2523,7 +2523,7 @@ vint16mf4_t test_vsll_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsll_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16mf2_mu( @@ -2532,7 +2532,7 @@ vint16mf4_t test_vsll_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16mf2_mu( @@ -2541,7 +2541,7 @@ vint16mf2_t test_vsll_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsll_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m1_mu( @@ -2550,7 +2550,7 @@ vint16mf2_t test_vsll_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m1_mu( @@ -2559,7 +2559,7 @@ vint16m1_t test_vsll_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsll_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m2_mu( @@ -2568,7 +2568,7 @@ vint16m1_t test_vsll_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m2_mu( @@ -2577,7 +2577,7 @@ vint16m2_t test_vsll_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsll_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m4_mu( @@ -2586,7 +2586,7 @@ vint16m2_t test_vsll_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m4_mu( @@ -2595,7 +2595,7 @@ vint16m4_t test_vsll_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsll_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i16m8_mu( @@ -2604,7 +2604,7 @@ vint16m4_t test_vsll_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_i16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i16m8_mu( @@ -2613,7 +2613,7 @@ vint16m8_t test_vsll_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsll_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32mf2_mu( @@ -2622,7 +2622,7 @@ vint16m8_t test_vsll_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32mf2_mu( @@ -2631,7 +2631,7 @@ vint32mf2_t test_vsll_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsll_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m1_mu( @@ -2640,7 +2640,7 @@ vint32mf2_t test_vsll_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m1_mu( @@ -2649,7 +2649,7 @@ vint32m1_t test_vsll_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsll_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m2_mu( @@ -2658,7 +2658,7 @@ vint32m1_t test_vsll_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m2_mu( @@ -2667,7 +2667,7 @@ vint32m2_t test_vsll_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsll_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m4_mu( @@ -2676,7 +2676,7 @@ vint32m2_t test_vsll_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m4_mu( @@ -2685,7 +2685,7 @@ vint32m4_t test_vsll_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsll_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i32m8_mu( @@ -2694,7 +2694,7 @@ vint32m4_t test_vsll_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_i32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i32m8_mu( @@ -2703,7 +2703,7 @@ vint32m8_t test_vsll_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsll_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m1_mu( @@ -2712,7 +2712,7 @@ vint32m8_t test_vsll_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_i64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m1_mu( @@ -2721,7 +2721,7 @@ vint64m1_t test_vsll_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsll_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m2_mu( @@ -2730,7 +2730,7 @@ vint64m1_t test_vsll_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_i64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m2_mu( @@ -2739,7 +2739,7 @@ vint64m2_t test_vsll_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsll_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m4_mu( @@ -2748,7 +2748,7 @@ vint64m2_t test_vsll_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_i64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m4_mu( @@ -2757,7 +2757,7 @@ vint64m4_t test_vsll_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsll_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_i64m8_mu( @@ -2766,7 +2766,7 @@ vint64m4_t test_vsll_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_i64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_i64m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_i64m8_mu( @@ -2775,7 +2775,7 @@ vint64m8_t test_vsll_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsll_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_i64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_i64m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf8_mu( @@ -2784,7 +2784,7 @@ vint64m8_t test_vsll_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsll_vv_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf8_mu( @@ -2793,7 +2793,7 @@ vuint8mf8_t test_vsll_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsll_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf4_mu( @@ -2802,7 +2802,7 @@ vuint8mf8_t test_vsll_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsll_vv_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf4_mu( @@ -2811,7 +2811,7 @@ vuint8mf4_t test_vsll_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsll_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8mf2_mu( @@ -2820,7 +2820,7 @@ vuint8mf4_t test_vsll_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsll_vv_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8mf2_mu( @@ -2829,7 +2829,7 @@ vuint8mf2_t test_vsll_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsll_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m1_mu( @@ -2838,7 +2838,7 @@ vuint8mf2_t test_vsll_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsll_vv_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m1_mu( @@ -2847,7 +2847,7 @@ vuint8m1_t test_vsll_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsll_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m2_mu( @@ -2856,7 +2856,7 @@ vuint8m1_t test_vsll_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsll_vv_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m2_mu( @@ -2865,7 +2865,7 @@ vuint8m2_t test_vsll_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsll_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m4_mu( @@ -2874,7 +2874,7 @@ vuint8m2_t test_vsll_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsll_vv_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m4_mu( @@ -2883,7 +2883,7 @@ vuint8m4_t test_vsll_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsll_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u8m8_mu( @@ -2892,7 +2892,7 @@ vuint8m4_t test_vsll_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsll_vv_u8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u8m8_mu( @@ -2901,7 +2901,7 @@ vuint8m8_t test_vsll_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsll_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf4_mu( @@ -2910,7 +2910,7 @@ vuint8m8_t test_vsll_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsll_vv_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf4_mu( @@ -2919,7 +2919,7 @@ vuint16mf4_t test_vsll_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsll_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16mf2_mu( @@ -2928,7 +2928,7 @@ vuint16mf4_t test_vsll_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsll_vv_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16mf2_mu( @@ -2937,7 +2937,7 @@ vuint16mf2_t test_vsll_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsll_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m1_mu( @@ -2946,7 +2946,7 @@ vuint16mf2_t test_vsll_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsll_vv_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m1_mu( @@ -2955,7 +2955,7 @@ vuint16m1_t test_vsll_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsll_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m2_mu( @@ -2964,7 +2964,7 @@ vuint16m1_t test_vsll_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsll_vv_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m2_mu( @@ -2973,7 +2973,7 @@ vuint16m2_t test_vsll_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsll_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m4_mu( @@ -2982,7 +2982,7 @@ vuint16m2_t test_vsll_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsll_vv_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m4_mu( @@ -2991,7 +2991,7 @@ vuint16m4_t test_vsll_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsll_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u16m8_mu( @@ -3000,7 +3000,7 @@ vuint16m4_t test_vsll_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsll_vv_u16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u16m8_mu( @@ -3009,7 +3009,7 @@ vuint16m8_t test_vsll_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsll_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32mf2_mu( @@ -3018,7 +3018,7 @@ vuint16m8_t test_vsll_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsll_vv_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32mf2_mu( @@ -3027,7 +3027,7 @@ vuint32mf2_t test_vsll_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsll_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m1_mu( @@ -3036,7 +3036,7 @@ vuint32mf2_t test_vsll_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsll_vv_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m1_mu( @@ -3045,7 +3045,7 @@ vuint32m1_t test_vsll_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsll_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m2_mu( @@ -3054,7 +3054,7 @@ vuint32m1_t test_vsll_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsll_vv_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m2_mu( @@ -3063,7 +3063,7 @@ vuint32m2_t test_vsll_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsll_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m4_mu( @@ -3072,7 +3072,7 @@ vuint32m2_t test_vsll_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsll_vv_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m4_mu( @@ -3081,7 +3081,7 @@ vuint32m4_t test_vsll_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsll_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u32m8_mu( @@ -3090,7 +3090,7 @@ vuint32m4_t test_vsll_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsll_vv_u32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u32m8_mu( @@ -3099,7 +3099,7 @@ vuint32m8_t test_vsll_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsll_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m1_mu( @@ -3108,7 +3108,7 @@ vuint32m8_t test_vsll_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsll_vv_u64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m1_mu( @@ -3117,7 +3117,7 @@ vuint64m1_t test_vsll_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsll_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m2_mu( @@ -3126,7 +3126,7 @@ vuint64m1_t test_vsll_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsll_vv_u64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m2_mu( @@ -3135,7 +3135,7 @@ vuint64m2_t test_vsll_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsll_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m4_mu( @@ -3144,7 +3144,7 @@ vuint64m2_t test_vsll_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsll_vv_u64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m4_mu( @@ -3153,7 +3153,7 @@ vuint64m4_t test_vsll_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsll_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vv_u64m8_mu( @@ -3162,7 +3162,7 @@ vuint64m4_t test_vsll_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsll_vv_u64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vv_u64m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsll_vx_u64m8_mu( @@ -3171,6 +3171,6 @@ vuint64m8_t test_vsll_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsll_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vsll_vx_u64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsll_vx_u64m8_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsmul.c index 9fd26e783712039d07716fa3df0bb02d2b439add..57ffe733d36dd6f6b8ff78e8734a25d1df390178 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsmul.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsmul_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vsmul_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vsmul_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsmul_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vsmul_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vsmul_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsmul_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vsmul_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vsmul_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsmul_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vsmul_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vsmul_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsmul_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vsmul_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vsmul_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsmul_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vsmul_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vsmul_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsmul_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vsmul_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vsmul_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsmul_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vsmul_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vsmul_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsmul_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vsmul_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vsmul_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsmul_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vsmul_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vsmul_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsmul_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vsmul_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vsmul_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsmul_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vsmul_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vsmul_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsmul_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vsmul_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vsmul_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsmul_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vsmul_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vsmul_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsmul_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vsmul_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vsmul_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsmul_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vsmul_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vsmul_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsmul_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vsmul_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vsmul_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsmul_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vsmul_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vsmul_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsmul_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vsmul_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vsmul_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsmul_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vsmul_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vsmul_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsmul_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vsmul_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vsmul_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsmul_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vsmul_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vsmul_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsmul_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vsmul_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vsmul_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsmul_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vsmul_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vsmul_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsmul_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vsmul_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vsmul_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsmul_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vsmul_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vsmul_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsmul_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vsmul_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vsmul_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsmul_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vsmul_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vsmul_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsmul_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vsmul_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vsmul_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsmul_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vsmul_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vsmul_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsmul_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vsmul_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vsmul_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsmul_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vsmul_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vsmul_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsmul_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vsmul_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vsmul_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsmul_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vsmul_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vsmul_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsmul_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vsmul_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vsmul_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsmul_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vsmul_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vsmul_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsmul_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vsmul_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vsmul_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsmul_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vsmul_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vsmul_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsmul_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vsmul_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vsmul_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsmul_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vsmul_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vsmul_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsmul_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vsmul_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vsmul_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsmul_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vsmul_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vsmul_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsmul_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vsmul_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vsmul_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsmul_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vsmul_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vsmul_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsmul_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vsmul_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vsmul_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsmul_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vsmul_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vsmul_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsmul_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vsmul_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vsmul_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsmul_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vsmul_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vsmul_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsmul_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vsmul_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vsmul_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsmul_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vsmul_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vsmul_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsmul_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vsmul_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vsmul_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsmul_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vsmul_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vsmul_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsmul_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vsmul_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vsmul_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsmul_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vsmul_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vsmul_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsmul_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vsmul_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vsmul_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsmul_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vsmul_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vsmul_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsmul_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vsmul_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vsmul_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsmul_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vsmul_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vsmul_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsmul_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vsmul_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vsmul_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsmul_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vsmul_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vsmul_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsmul_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vsmul_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vsmul_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsmul_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vsmul_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vsmul_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsmul_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vsmul_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vsmul_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsmul_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vsmul_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vsmul_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsmul_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vsmul_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vsmul_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsmul_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vsmul_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vsmul_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsmul_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vsmul_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsmul_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vsmul_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsmul_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vsmul_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsmul_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vsmul_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsmul_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vsmul_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsmul_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vsmul_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsmul_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vsmul_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsmul_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vsmul_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsmul_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vsmul_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsmul_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vsmul_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsmul_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vsmul_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsmul_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vsmul_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsmul_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vsmul_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsmul_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsmul_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vsmul_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsmul_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vsmul_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsmul_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vsmul_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsmul_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vsmul_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsmul_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vsmul_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsmul_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vsmul_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsmul_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vsmul_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsmul_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vsmul_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsmul_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vsmul_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsmul_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vsmul_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsmul_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vsmul_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsmul_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vsmul_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsmul_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsmul_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vsmul_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsmul_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vsmul_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsmul_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vsmul_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsmul_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vsmul_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsmul_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vsmul_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsmul_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vsmul_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsmul_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vsmul_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsmul_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vsmul_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsmul_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vsmul_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsmul_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vsmul_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsmul_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsmul_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vsmul_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsmul_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vsmul_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vsmul_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsmul_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vsmul_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vsmul_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsmul_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vsmul_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vsmul_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsmul_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vsmul_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsmul_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsra.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsra.c index e22521486c6e139d3470f71bc96052cc09d888be..7aef6c426029dee391bc501e360b03655278fc7a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsra.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsra.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsra_vv_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vsra_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vsra_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsra_vv_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vsra_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vsra_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsra_vv_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vsra_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vsra_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsra_vv_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vsra_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vsra_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsra_vv_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vsra_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vsra_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsra_vv_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vsra_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vsra_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsra_vv_i8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vsra_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vsra_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t shift, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsra_vv_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vsra_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vsra_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsra_vv_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vsra_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vsra_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsra_vv_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vsra_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vsra_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsra_vv_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vsra_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vsra_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsra_vv_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vsra_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vsra_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsra_vv_i16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vsra_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vsra_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsra_vv_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vsra_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vsra_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsra_vv_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vsra_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vsra_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsra_vv_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vsra_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vsra_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsra_vv_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vsra_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vsra_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsra_vv_i32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vsra_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vsra_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsra_vv_i64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vsra_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vsra_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsra_vv_i64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vsra_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vsra_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsra_vv_i64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vsra_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vsra_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsra_vv_i64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vsra_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vsra_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsra_vv_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vsra_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vsra_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsra_vv_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vsra_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vsra_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsra_vv_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vsra_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vsra_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsra_vv_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vsra_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vsra_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsra_vv_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vsra_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vsra_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsra_vv_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vsra_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vsra_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsra_vv_i8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vsra_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vsra_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsra_vv_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vsra_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vsra_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsra_vv_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vsra_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vsra_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsra_vv_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vsra_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vsra_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsra_vv_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vsra_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vsra_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsra_vv_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vsra_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vsra_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsra_vv_i16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vsra_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vsra_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsra_vv_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vsra_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vsra_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsra_vv_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vsra_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vsra_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsra_vv_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vsra_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vsra_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsra_vv_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vsra_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vsra_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsra_vv_i32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vsra_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vsra_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsra_vv_i64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vsra_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vsra_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsra_vv_i64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vsra_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vsra_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsra_vv_i64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vsra_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vsra_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsra_vv_i64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vsra_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vsra_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsra_vv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vsra_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vsra_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsra_vv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vsra_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vsra_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsra_vv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vsra_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vsra_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsra_vv_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vsra_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vsra_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsra_vv_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vsra_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vsra_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsra_vv_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vsra_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vsra_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsra_vv_i8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vsra_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vsra_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsra_vv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vsra_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vsra_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsra_vv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vsra_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vsra_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsra_vv_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vsra_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vsra_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsra_vv_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vsra_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vsra_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsra_vv_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vsra_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vsra_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsra_vv_i16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vsra_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vsra_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsra_vv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vsra_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vsra_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsra_vv_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vsra_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vsra_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsra_vv_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vsra_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vsra_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsra_vv_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vsra_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vsra_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsra_vv_i32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vsra_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vsra_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsra_vv_i64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vsra_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vsra_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsra_vv_i64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vsra_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vsra_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsra_vv_i64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vsra_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vsra_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsra_vv_i64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vsra_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vsra_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsra_vv_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vsra_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsra_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vsra_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsra_vv_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vsra_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsra_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vsra_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsra_vv_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vsra_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsra_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vsra_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsra_vv_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vsra_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsra_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vsra_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsra_vv_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vsra_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsra_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vsra_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsra_vv_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vsra_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsra_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vsra_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsra_vv_i8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vsra_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsra_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vsra_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsra_vv_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vsra_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsra_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vsra_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsra_vv_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vsra_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsra_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vsra_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsra_vv_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vsra_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsra_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vsra_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsra_vv_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vsra_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsra_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vsra_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsra_vv_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vsra_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsra_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vsra_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsra_vv_i16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vsra_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsra_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vsra_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsra_vv_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vsra_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsra_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vsra_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsra_vv_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vsra_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsra_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vsra_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsra_vv_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vsra_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsra_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vsra_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsra_vv_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vsra_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsra_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vsra_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsra_vv_i32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vsra_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsra_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vsra_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsra_vv_i64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vsra_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsra_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vsra_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsra_vv_i64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vsra_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsra_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vsra_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsra_vv_i64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vsra_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsra_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vsra_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsra_vv_i64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vv_i64m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsra_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vsra_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsra_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vsra_vx_i64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsra_vx_i64m8_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsrl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsrl.c index 43d6a1da97fdd25759f80bb0cd7f8603656b710c..8c3b9d12186558e66b13275ee9d166863bee179e 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsrl.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsrl.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsrl_vv_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vsrl_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vsrl_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsrl_vv_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vsrl_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vsrl_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsrl_vv_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vsrl_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vsrl_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsrl_vv_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vsrl_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vsrl_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsrl_vv_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vsrl_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vsrl_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsrl_vv_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vsrl_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vsrl_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsrl_vv_u8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vsrl_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vsrl_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t shi // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsrl_vv_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vsrl_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vsrl_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsrl_vv_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vsrl_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vsrl_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsrl_vv_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vsrl_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vsrl_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsrl_vv_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vsrl_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vsrl_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsrl_vv_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vsrl_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vsrl_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsrl_vv_u16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vsrl_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vsrl_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsrl_vv_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vsrl_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vsrl_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsrl_vv_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vsrl_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vsrl_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsrl_vv_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vsrl_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vsrl_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsrl_vv_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vsrl_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vsrl_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsrl_vv_u32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vsrl_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vsrl_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsrl_vv_u64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vsrl_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vsrl_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsrl_vv_u64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vsrl_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vsrl_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsrl_vv_u64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vsrl_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vsrl_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsrl_vv_u64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vsrl_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vsrl_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsrl_vv_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsrl_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsrl_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsrl_vv_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsrl_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsrl_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsrl_vv_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsrl_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsrl_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsrl_vv_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vsrl_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vsrl_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsrl_vv_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vsrl_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vsrl_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsrl_vv_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vsrl_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vsrl_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsrl_vv_u8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vsrl_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vsrl_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsrl_vv_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsrl_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsrl_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsrl_vv_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsrl_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsrl_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsrl_vv_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vsrl_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vsrl_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsrl_vv_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vsrl_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vsrl_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsrl_vv_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vsrl_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vsrl_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsrl_vv_u16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vsrl_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vsrl_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsrl_vv_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsrl_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsrl_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsrl_vv_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vsrl_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vsrl_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsrl_vv_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vsrl_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vsrl_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsrl_vv_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vsrl_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vsrl_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsrl_vv_u32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vsrl_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vsrl_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsrl_vv_u64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vsrl_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vsrl_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsrl_vv_u64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vsrl_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vsrl_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsrl_vv_u64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vsrl_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vsrl_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsrl_vv_u64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vsrl_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vsrl_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsrl_vv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vsrl_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vsrl_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsrl_vv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vsrl_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vsrl_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsrl_vv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vsrl_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vsrl_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsrl_vv_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vsrl_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vsrl_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsrl_vv_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vsrl_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vsrl_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsrl_vv_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vsrl_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vsrl_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsrl_vv_u8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vsrl_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vsrl_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsrl_vv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vsrl_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vsrl_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsrl_vv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vsrl_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vsrl_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsrl_vv_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vsrl_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vsrl_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsrl_vv_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vsrl_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vsrl_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsrl_vv_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vsrl_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vsrl_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsrl_vv_u16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vsrl_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vsrl_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsrl_vv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vsrl_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vsrl_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsrl_vv_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vsrl_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vsrl_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsrl_vv_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vsrl_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vsrl_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsrl_vv_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vsrl_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vsrl_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsrl_vv_u32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vsrl_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vsrl_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsrl_vv_u64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vsrl_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vsrl_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsrl_vv_u64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vsrl_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vsrl_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsrl_vv_u64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vsrl_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vsrl_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsrl_vv_u64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vsrl_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vsrl_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vsrl_vv_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vsrl_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsrl_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vsrl_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vsrl_vv_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vsrl_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsrl_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vsrl_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vsrl_vv_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vsrl_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsrl_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vsrl_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vsrl_vv_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vsrl_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsrl_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vsrl_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vsrl_vv_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vsrl_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsrl_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vsrl_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vsrl_vv_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vsrl_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsrl_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vsrl_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vsrl_vv_u8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vsrl_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsrl_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vsrl_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vsrl_vv_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vsrl_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsrl_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vsrl_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vsrl_vv_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vsrl_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsrl_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vsrl_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vsrl_vv_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vsrl_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsrl_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vsrl_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vsrl_vv_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vsrl_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsrl_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vsrl_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vsrl_vv_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vsrl_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsrl_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vsrl_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vsrl_vv_u16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vsrl_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsrl_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vsrl_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vsrl_vv_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vsrl_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsrl_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vsrl_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vsrl_vv_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vsrl_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsrl_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vsrl_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vsrl_vv_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vsrl_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsrl_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vsrl_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vsrl_vv_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vsrl_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsrl_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vsrl_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vsrl_vv_u32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vsrl_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsrl_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vsrl_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vsrl_vv_u64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vsrl_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsrl_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vsrl_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vsrl_vv_u64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vsrl_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsrl_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vsrl_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vsrl_vv_u64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vsrl_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsrl_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vsrl_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vsrl_vv_u64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vv_u64m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vsrl_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vsrl_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsrl_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vsrl_vx_u64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vsrl_vx_u64m8_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssra.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssra.c index e36cbb0e67b651c06d16841704d910632d4c7945..e5d9db55e350d7a35ac00301c61f0bcde8420e85 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssra.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssra.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssra_vv_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vssra_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vssra_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssra_vv_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vssra_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vssra_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssra_vv_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vssra_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vssra_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssra_vv_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vssra_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vssra_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssra_vv_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vssra_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vssra_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssra_vv_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vssra_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vssra_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssra_vv_i8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vssra_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vssra_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, size_t shift // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssra_vv_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vssra_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vssra_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssra_vv_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vssra_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vssra_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssra_vv_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vssra_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vssra_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssra_vv_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vssra_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vssra_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssra_vv_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vssra_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vssra_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssra_vv_i16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vssra_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vssra_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssra_vv_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vssra_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vssra_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssra_vv_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vssra_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vssra_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssra_vv_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vssra_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vssra_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssra_vv_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vssra_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vssra_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssra_vv_i32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vssra_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vssra_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssra_vv_i64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vssra_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vssra_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssra_vv_i64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vssra_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vssra_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssra_vv_i64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vssra_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vssra_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssra_vv_i64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vssra_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vssra_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, size_t s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssra_vv_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vssra_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vssra_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssra_vv_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vssra_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vssra_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssra_vv_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vssra_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vssra_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssra_vv_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vssra_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vssra_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssra_vv_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vssra_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vssra_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssra_vv_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vssra_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vssra_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssra_vv_i8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vssra_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vssra_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssra_vv_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vssra_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vssra_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssra_vv_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vssra_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vssra_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssra_vv_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vssra_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vssra_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssra_vv_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vssra_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vssra_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssra_vv_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vssra_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vssra_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssra_vv_i16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vssra_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vssra_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssra_vv_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vssra_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vssra_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssra_vv_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vssra_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vssra_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssra_vv_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vssra_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vssra_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssra_vv_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vssra_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vssra_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssra_vv_i32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vssra_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vssra_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssra_vv_i64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vssra_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vssra_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssra_vv_i64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vssra_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vssra_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssra_vv_i64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vssra_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vssra_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssra_vv_i64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vssra_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vssra_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssra_vv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vssra_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vssra_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssra_vv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vssra_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vssra_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssra_vv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vssra_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vssra_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssra_vv_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vssra_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vssra_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssra_vv_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vssra_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vssra_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssra_vv_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vssra_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vssra_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssra_vv_i8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vssra_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vssra_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssra_vv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vssra_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vssra_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssra_vv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vssra_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vssra_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssra_vv_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vssra_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vssra_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssra_vv_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vssra_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vssra_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssra_vv_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vssra_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vssra_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssra_vv_i16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vssra_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vssra_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssra_vv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vssra_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vssra_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssra_vv_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vssra_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vssra_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssra_vv_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vssra_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vssra_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssra_vv_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vssra_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vssra_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssra_vv_i32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vssra_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vssra_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssra_vv_i64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vssra_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vssra_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssra_vv_i64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vssra_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vssra_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssra_vv_i64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vssra_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vssra_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssra_vv_i64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vssra_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vssra_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssra_vv_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vssra_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssra_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vssra_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssra_vv_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vssra_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssra_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vssra_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssra_vv_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vssra_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssra_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vssra_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssra_vv_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vssra_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssra_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vssra_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssra_vv_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vssra_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssra_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vssra_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssra_vv_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vssra_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssra_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vssra_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssra_vv_i8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vssra_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssra_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vssra_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssra_vv_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vssra_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssra_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vssra_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssra_vv_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vssra_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssra_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vssra_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssra_vv_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vssra_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssra_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vssra_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssra_vv_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vssra_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssra_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vssra_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssra_vv_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vssra_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssra_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vssra_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssra_vv_i16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vssra_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssra_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vssra_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssra_vv_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vssra_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssra_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vssra_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssra_vv_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vssra_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssra_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vssra_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssra_vv_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vssra_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssra_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vssra_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssra_vv_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vssra_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssra_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vssra_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssra_vv_i32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vssra_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssra_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vssra_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssra_vv_i64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vssra_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssra_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vssra_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssra_vv_i64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vssra_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssra_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vssra_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssra_vv_i64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vssra_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssra_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vssra_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssra_vv_i64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vv_i64m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssra_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vssra_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssra_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, size_t shift, size_t vl) { - return vssra_vx_i64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssra_vx_i64m8_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssrl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssrl.c index 57158ac93752504dcd0e2f690d542985b3db8b42..a7853e577fc39db7bef75b731b8f19765b2c2988 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssrl.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssrl.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssrl_vv_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vssrl_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vssrl_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssrl_vv_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vssrl_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vssrl_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssrl_vv_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vssrl_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vssrl_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssrl_vv_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vssrl_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vssrl_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssrl_vv_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vssrl_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vssrl_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssrl_vv_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vssrl_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vssrl_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssrl_vv_u8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vssrl_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vssrl_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, size_t sh // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssrl_vv_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vssrl_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16mf4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vssrl_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssrl_vv_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vssrl_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vssrl_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssrl_vv_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vssrl_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vssrl_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssrl_vv_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vssrl_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vssrl_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssrl_vv_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vssrl_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vssrl_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssrl_vv_u16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vssrl_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vssrl_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssrl_vv_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vssrl_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32mf2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32mf2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vssrl_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssrl_vv_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vssrl_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vssrl_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssrl_vv_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vssrl_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vssrl_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssrl_vv_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vssrl_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vssrl_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssrl_vv_u32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vssrl_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vssrl_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssrl_vv_u64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vssrl_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m1_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m1_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vssrl_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssrl_vv_u64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vssrl_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m2_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m2_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vssrl_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssrl_vv_u64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vssrl_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m4_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m4_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vssrl_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssrl_vv_u64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vssrl_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m8_tu(maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m8_tu(maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vssrl_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssrl_vv_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vssrl_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vssrl_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssrl_vv_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vssrl_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vssrl_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssrl_vv_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vssrl_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vssrl_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssrl_vv_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vssrl_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vssrl_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssrl_vv_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vssrl_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vssrl_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssrl_vv_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vssrl_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vssrl_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssrl_vv_u8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vssrl_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vssrl_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssrl_vv_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vssrl_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16mf4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vssrl_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssrl_vv_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vssrl_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vssrl_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssrl_vv_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vssrl_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vssrl_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssrl_vv_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vssrl_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vssrl_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssrl_vv_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vssrl_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vssrl_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssrl_vv_u16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vssrl_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vssrl_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssrl_vv_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vssrl_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32mf2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32mf2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vssrl_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssrl_vv_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vssrl_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vssrl_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssrl_vv_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vssrl_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vssrl_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssrl_vv_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vssrl_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vssrl_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssrl_vv_u32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vssrl_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vssrl_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssrl_vv_u64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vssrl_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m1_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m1_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vssrl_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssrl_vv_u64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vssrl_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m2_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m2_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vssrl_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssrl_vv_u64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vssrl_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m4_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m4_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vssrl_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssrl_vv_u64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vssrl_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m8_tum(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m8_tum(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vssrl_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssrl_vv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vssrl_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vssrl_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssrl_vv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vssrl_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vssrl_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssrl_vv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vssrl_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vssrl_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssrl_vv_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vssrl_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vssrl_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssrl_vv_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vssrl_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vssrl_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssrl_vv_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vssrl_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vssrl_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssrl_vv_u8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vssrl_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vssrl_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssrl_vv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vssrl_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16mf4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vssrl_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssrl_vv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vssrl_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vssrl_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssrl_vv_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vssrl_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vssrl_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssrl_vv_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vssrl_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vssrl_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssrl_vv_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vssrl_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vssrl_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssrl_vv_u16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vssrl_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vssrl_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssrl_vv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vssrl_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32mf2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vssrl_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssrl_vv_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vssrl_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vssrl_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssrl_vv_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vssrl_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vssrl_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssrl_vv_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vssrl_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vssrl_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssrl_vv_u32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vssrl_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vssrl_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssrl_vv_u64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vssrl_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m1_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m1_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vssrl_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssrl_vv_u64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vssrl_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m2_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m2_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vssrl_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssrl_vv_u64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vssrl_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m4_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m4_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vssrl_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssrl_vv_u64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vssrl_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m8_tumu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m8_tumu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vssrl_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t shift, size_t vl) { - return vssrl_vv_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vssrl_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssrl_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vssrl_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t shift, size_t vl) { - return vssrl_vv_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vssrl_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssrl_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vssrl_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t shift, size_t vl) { - return vssrl_vv_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vssrl_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssrl_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vssrl_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t shift, size_t vl) { - return vssrl_vv_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vssrl_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssrl_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vssrl_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t shift, size_t vl) { - return vssrl_vv_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vssrl_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssrl_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vssrl_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t shift, size_t vl) { - return vssrl_vv_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vssrl_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssrl_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vssrl_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t shift, size_t vl) { - return vssrl_vv_u8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vssrl_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssrl_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u8m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u8m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vssrl_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t shift, size_t vl) { - return vssrl_vv_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vssrl_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssrl_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16mf4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vssrl_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t shift, size_t vl) { - return vssrl_vv_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vssrl_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssrl_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vssrl_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t shift, size_t vl) { - return vssrl_vv_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vssrl_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssrl_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vssrl_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t shift, size_t vl) { - return vssrl_vv_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vssrl_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssrl_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vssrl_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t shift, size_t vl) { - return vssrl_vv_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vssrl_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssrl_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vssrl_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t shift, size_t vl) { - return vssrl_vv_u16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vssrl_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssrl_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u16m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u16m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vssrl_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t shift, size_t vl) { - return vssrl_vv_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vssrl_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssrl_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32mf2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32mf2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vssrl_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t shift, size_t vl) { - return vssrl_vv_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vssrl_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssrl_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vssrl_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t shift, size_t vl) { - return vssrl_vv_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vssrl_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssrl_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vssrl_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t shift, size_t vl) { - return vssrl_vv_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vssrl_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssrl_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vssrl_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t shift, size_t vl) { - return vssrl_vv_u32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vssrl_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssrl_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u32m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u32m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vssrl_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t shift, size_t vl) { - return vssrl_vv_u64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vssrl_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssrl_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m1_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m1_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vssrl_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t shift, size_t vl) { - return vssrl_vv_u64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vssrl_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssrl_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m2_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m2_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vssrl_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t shift, size_t vl) { - return vssrl_vv_u64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vssrl_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssrl_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m4_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m4_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vssrl_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t shift, size_t vl) { - return vssrl_vv_u64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vv_u64m8_mu(mask, maskedoff, op1, shift, vl); } // CHECK-RV64-LABEL: @test_vssrl_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vssrl_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssrl_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, size_t shift, size_t vl) { - return vssrl_vx_u64m8_mu(mask, maskedoff, op1, shift, vl); + return __riscv_vssrl_vx_u64m8_mu(mask, maskedoff, op1, shift, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssub.c index 50041413f2a7ad031866ce06cda61f0fd1313ff6..b3dc364c6a1d09299c41c77d3635859c89936095 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vssub_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vssub_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vssub_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vssub_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vssub_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vssub_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vssub_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vssub_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vssub_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vssub_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vssub_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vssub_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vssub_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vssub_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vssub_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vssub_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vssub_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vssub_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vssub_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vssub_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vssub_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vssub_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vssub_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vssub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vssub_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vssub_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vssub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vssub_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vssub_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vssub_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vssub_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vssub_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vssub_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vssub_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vssub_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vssub_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vssub_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vssub_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vssub_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vssub_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vssub_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vssub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vssub_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vssub_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vssub_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vssub_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vssub_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vssub_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vssub_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vssub_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vssub_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vssub_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vssub_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vssub_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vssub_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vssub_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vssub_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vssub_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vssub_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vssub_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vssub_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vssub_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vssub_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vssub_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vssub_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf8_tum( @@ -408,7 +408,7 @@ vint64m8_t test_vssub_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vssub_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf8_tum( @@ -417,7 +417,7 @@ vint8mf8_t test_vssub_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf4_tum( @@ -426,7 +426,7 @@ vint8mf8_t test_vssub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vssub_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf4_tum( @@ -435,7 +435,7 @@ vint8mf4_t test_vssub_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf2_tum( @@ -444,7 +444,7 @@ vint8mf4_t test_vssub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vssub_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf2_tum( @@ -453,7 +453,7 @@ vint8mf2_t test_vssub_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m1_tum( @@ -462,7 +462,7 @@ vint8mf2_t test_vssub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vssub_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m1_tum( @@ -471,7 +471,7 @@ vint8m1_t test_vssub_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m2_tum( @@ -480,7 +480,7 @@ vint8m1_t test_vssub_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vssub_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m2_tum( @@ -489,7 +489,7 @@ vint8m2_t test_vssub_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m4_tum( @@ -498,7 +498,7 @@ vint8m2_t test_vssub_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vssub_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m4_tum( @@ -507,7 +507,7 @@ vint8m4_t test_vssub_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m8_tum( @@ -516,7 +516,7 @@ vint8m4_t test_vssub_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vssub_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m8_tum( @@ -525,7 +525,7 @@ vint8m8_t test_vssub_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf4_tum( @@ -534,7 +534,7 @@ vint8m8_t test_vssub_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vssub_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf4_tum( @@ -543,7 +543,7 @@ vint16mf4_t test_vssub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf2_tum( @@ -552,7 +552,7 @@ vint16mf4_t test_vssub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vssub_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf2_tum( @@ -561,7 +561,7 @@ vint16mf2_t test_vssub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m1_tum( @@ -570,7 +570,7 @@ vint16mf2_t test_vssub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vssub_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m1_tum( @@ -579,7 +579,7 @@ vint16m1_t test_vssub_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m2_tum( @@ -588,7 +588,7 @@ vint16m1_t test_vssub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vssub_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m2_tum( @@ -597,7 +597,7 @@ vint16m2_t test_vssub_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m4_tum( @@ -606,7 +606,7 @@ vint16m2_t test_vssub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vssub_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m4_tum( @@ -615,7 +615,7 @@ vint16m4_t test_vssub_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m8_tum( @@ -624,7 +624,7 @@ vint16m4_t test_vssub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vssub_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m8_tum( @@ -633,7 +633,7 @@ vint16m8_t test_vssub_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32mf2_tum( @@ -642,7 +642,7 @@ vint16m8_t test_vssub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vssub_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32mf2_tum( @@ -651,7 +651,7 @@ vint32mf2_t test_vssub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m1_tum( @@ -660,7 +660,7 @@ vint32mf2_t test_vssub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vssub_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m1_tum( @@ -669,7 +669,7 @@ vint32m1_t test_vssub_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m2_tum( @@ -678,7 +678,7 @@ vint32m1_t test_vssub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vssub_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m2_tum( @@ -687,7 +687,7 @@ vint32m2_t test_vssub_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m4_tum( @@ -696,7 +696,7 @@ vint32m2_t test_vssub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vssub_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m4_tum( @@ -705,7 +705,7 @@ vint32m4_t test_vssub_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m8_tum( @@ -714,7 +714,7 @@ vint32m4_t test_vssub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vssub_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m8_tum( @@ -723,7 +723,7 @@ vint32m8_t test_vssub_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m1_tum( @@ -732,7 +732,7 @@ vint32m8_t test_vssub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vssub_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m1_tum( @@ -741,7 +741,7 @@ vint64m1_t test_vssub_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m2_tum( @@ -750,7 +750,7 @@ vint64m1_t test_vssub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vssub_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m2_tum( @@ -759,7 +759,7 @@ vint64m2_t test_vssub_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m4_tum( @@ -768,7 +768,7 @@ vint64m2_t test_vssub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vssub_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m4_tum( @@ -777,7 +777,7 @@ vint64m4_t test_vssub_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m8_tum( @@ -786,7 +786,7 @@ vint64m4_t test_vssub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vssub_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m8_tum( @@ -795,7 +795,7 @@ vint64m8_t test_vssub_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf8_tumu( @@ -804,7 +804,7 @@ vint64m8_t test_vssub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vssub_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf8_tumu( @@ -813,7 +813,7 @@ vint8mf8_t test_vssub_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf4_tumu( @@ -822,7 +822,7 @@ vint8mf8_t test_vssub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vssub_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf4_tumu( @@ -831,7 +831,7 @@ vint8mf4_t test_vssub_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf2_tumu( @@ -840,7 +840,7 @@ vint8mf4_t test_vssub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vssub_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf2_tumu( @@ -849,7 +849,7 @@ vint8mf2_t test_vssub_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m1_tumu( @@ -858,7 +858,7 @@ vint8mf2_t test_vssub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vssub_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m1_tumu( @@ -867,7 +867,7 @@ vint8m1_t test_vssub_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m2_tumu( @@ -876,7 +876,7 @@ vint8m1_t test_vssub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vssub_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m2_tumu( @@ -885,7 +885,7 @@ vint8m2_t test_vssub_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m4_tumu( @@ -894,7 +894,7 @@ vint8m2_t test_vssub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vssub_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m4_tumu( @@ -903,7 +903,7 @@ vint8m4_t test_vssub_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m8_tumu( @@ -912,7 +912,7 @@ vint8m4_t test_vssub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vssub_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m8_tumu( @@ -921,7 +921,7 @@ vint8m8_t test_vssub_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf4_tumu( @@ -930,7 +930,7 @@ vint8m8_t test_vssub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vssub_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf4_tumu( @@ -939,7 +939,7 @@ vint16mf4_t test_vssub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf2_tumu( @@ -948,7 +948,7 @@ vint16mf4_t test_vssub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vssub_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf2_tumu( @@ -957,7 +957,7 @@ vint16mf2_t test_vssub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m1_tumu( @@ -966,7 +966,7 @@ vint16mf2_t test_vssub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vssub_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m1_tumu( @@ -975,7 +975,7 @@ vint16m1_t test_vssub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m2_tumu( @@ -984,7 +984,7 @@ vint16m1_t test_vssub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vssub_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m2_tumu( @@ -993,7 +993,7 @@ vint16m2_t test_vssub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m4_tumu( @@ -1002,7 +1002,7 @@ vint16m2_t test_vssub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vssub_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m4_tumu( @@ -1011,7 +1011,7 @@ vint16m4_t test_vssub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m8_tumu( @@ -1020,7 +1020,7 @@ vint16m4_t test_vssub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vssub_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m8_tumu( @@ -1029,7 +1029,7 @@ vint16m8_t test_vssub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32mf2_tumu( @@ -1038,7 +1038,7 @@ vint16m8_t test_vssub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vssub_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32mf2_tumu( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vssub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m1_tumu( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vssub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vssub_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m1_tumu( @@ -1065,7 +1065,7 @@ vint32m1_t test_vssub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m2_tumu( @@ -1074,7 +1074,7 @@ vint32m1_t test_vssub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vssub_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m2_tumu( @@ -1083,7 +1083,7 @@ vint32m2_t test_vssub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m4_tumu( @@ -1092,7 +1092,7 @@ vint32m2_t test_vssub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vssub_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m4_tumu( @@ -1101,7 +1101,7 @@ vint32m4_t test_vssub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m8_tumu( @@ -1110,7 +1110,7 @@ vint32m4_t test_vssub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vssub_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m8_tumu( @@ -1119,7 +1119,7 @@ vint32m8_t test_vssub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m1_tumu( @@ -1128,7 +1128,7 @@ vint32m8_t test_vssub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vssub_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m1_tumu( @@ -1137,7 +1137,7 @@ vint64m1_t test_vssub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m2_tumu( @@ -1146,7 +1146,7 @@ vint64m1_t test_vssub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vssub_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m2_tumu( @@ -1155,7 +1155,7 @@ vint64m2_t test_vssub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m4_tumu( @@ -1164,7 +1164,7 @@ vint64m2_t test_vssub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vssub_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m4_tumu( @@ -1173,7 +1173,7 @@ vint64m4_t test_vssub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m8_tumu( @@ -1182,7 +1182,7 @@ vint64m4_t test_vssub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vssub_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m8_tumu( @@ -1191,7 +1191,7 @@ vint64m8_t test_vssub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf8_mu( @@ -1200,7 +1200,7 @@ vint64m8_t test_vssub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vssub_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf8_mu( @@ -1209,7 +1209,7 @@ vint8mf8_t test_vssub_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vssub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf4_mu( @@ -1218,7 +1218,7 @@ vint8mf8_t test_vssub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vssub_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf4_mu( @@ -1227,7 +1227,7 @@ vint8mf4_t test_vssub_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vssub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8mf2_mu( @@ -1236,7 +1236,7 @@ vint8mf4_t test_vssub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vssub_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8mf2_mu( @@ -1245,7 +1245,7 @@ vint8mf2_t test_vssub_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vssub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m1_mu( @@ -1254,7 +1254,7 @@ vint8mf2_t test_vssub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vssub_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m1_mu( @@ -1263,7 +1263,7 @@ vint8m1_t test_vssub_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vssub_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m2_mu( @@ -1272,7 +1272,7 @@ vint8m1_t test_vssub_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vssub_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m2_mu( @@ -1281,7 +1281,7 @@ vint8m2_t test_vssub_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vssub_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m4_mu( @@ -1290,7 +1290,7 @@ vint8m2_t test_vssub_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vssub_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m4_mu( @@ -1299,7 +1299,7 @@ vint8m4_t test_vssub_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vssub_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i8m8_mu( @@ -1308,7 +1308,7 @@ vint8m4_t test_vssub_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vssub_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i8m8_mu( @@ -1317,7 +1317,7 @@ vint8m8_t test_vssub_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vssub_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vssub_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf4_mu( @@ -1326,7 +1326,7 @@ vint8m8_t test_vssub_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vssub_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf4_mu( @@ -1335,7 +1335,7 @@ vint16mf4_t test_vssub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vssub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16mf2_mu( @@ -1344,7 +1344,7 @@ vint16mf4_t test_vssub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vssub_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16mf2_mu( @@ -1353,7 +1353,7 @@ vint16mf2_t test_vssub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vssub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m1_mu( @@ -1362,7 +1362,7 @@ vint16mf2_t test_vssub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vssub_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m1_mu( @@ -1371,7 +1371,7 @@ vint16m1_t test_vssub_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vssub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m2_mu( @@ -1380,7 +1380,7 @@ vint16m1_t test_vssub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vssub_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m2_mu( @@ -1389,7 +1389,7 @@ vint16m2_t test_vssub_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vssub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m4_mu( @@ -1398,7 +1398,7 @@ vint16m2_t test_vssub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vssub_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m4_mu( @@ -1407,7 +1407,7 @@ vint16m4_t test_vssub_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vssub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i16m8_mu( @@ -1416,7 +1416,7 @@ vint16m4_t test_vssub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vssub_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i16m8_mu( @@ -1425,7 +1425,7 @@ vint16m8_t test_vssub_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vssub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vssub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32mf2_mu( @@ -1434,7 +1434,7 @@ vint16m8_t test_vssub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vssub_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32mf2_mu( @@ -1443,7 +1443,7 @@ vint32mf2_t test_vssub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vssub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m1_mu( @@ -1452,7 +1452,7 @@ vint32mf2_t test_vssub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vssub_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m1_mu( @@ -1461,7 +1461,7 @@ vint32m1_t test_vssub_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vssub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m2_mu( @@ -1470,7 +1470,7 @@ vint32m1_t test_vssub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vssub_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m2_mu( @@ -1479,7 +1479,7 @@ vint32m2_t test_vssub_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vssub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m4_mu( @@ -1488,7 +1488,7 @@ vint32m2_t test_vssub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vssub_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m4_mu( @@ -1497,7 +1497,7 @@ vint32m4_t test_vssub_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vssub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i32m8_mu( @@ -1506,7 +1506,7 @@ vint32m4_t test_vssub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vssub_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i32m8_mu( @@ -1515,7 +1515,7 @@ vint32m8_t test_vssub_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vssub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vssub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m1_mu( @@ -1524,7 +1524,7 @@ vint32m8_t test_vssub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vssub_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m1_mu( @@ -1533,7 +1533,7 @@ vint64m1_t test_vssub_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vssub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m2_mu( @@ -1542,7 +1542,7 @@ vint64m1_t test_vssub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vssub_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m2_mu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vssub_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vssub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m4_mu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vssub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vssub_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m4_mu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vssub_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vssub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vv_i64m8_mu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vssub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vssub_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssub_vx_i64m8_mu( @@ -1587,6 +1587,6 @@ vint64m8_t test_vssub_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vssub_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vssub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssubu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssubu.c index eb70d54a1aec95b24ad6675e51f0246369d8744e..f9a390c33b89fb4c723243b55ea1fd36e1d207b8 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssubu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssubu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vssubu_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf8_tu( @@ -21,7 +21,7 @@ vuint8mf8_t test_vssubu_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf4_tu( @@ -30,7 +30,7 @@ vuint8mf8_t test_vssubu_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vssubu_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf4_tu( @@ -39,7 +39,7 @@ vuint8mf4_t test_vssubu_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf2_tu( @@ -48,7 +48,7 @@ vuint8mf4_t test_vssubu_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vssubu_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf2_tu( @@ -57,7 +57,7 @@ vuint8mf2_t test_vssubu_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m1_tu( @@ -66,7 +66,7 @@ vuint8mf2_t test_vssubu_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vssubu_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m1_tu( @@ -75,7 +75,7 @@ vuint8m1_t test_vssubu_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m2_tu( @@ -84,7 +84,7 @@ vuint8m1_t test_vssubu_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vssubu_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m2_tu( @@ -93,7 +93,7 @@ vuint8m2_t test_vssubu_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m4_tu( @@ -102,7 +102,7 @@ vuint8m2_t test_vssubu_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vssubu_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m4_tu( @@ -111,7 +111,7 @@ vuint8m4_t test_vssubu_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m8_tu( @@ -120,7 +120,7 @@ vuint8m4_t test_vssubu_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vssubu_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m8_tu( @@ -129,7 +129,7 @@ vuint8m8_t test_vssubu_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf4_tu( @@ -138,7 +138,7 @@ vuint8m8_t test_vssubu_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vssubu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf4_tu( @@ -147,7 +147,7 @@ vuint16mf4_t test_vssubu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf2_tu( @@ -156,7 +156,7 @@ vuint16mf4_t test_vssubu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vssubu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf2_tu( @@ -165,7 +165,7 @@ vuint16mf2_t test_vssubu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m1_tu( @@ -174,7 +174,7 @@ vuint16mf2_t test_vssubu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vssubu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m1_tu( @@ -183,7 +183,7 @@ vuint16m1_t test_vssubu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m2_tu( @@ -192,7 +192,7 @@ vuint16m1_t test_vssubu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vssubu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m2_tu( @@ -201,7 +201,7 @@ vuint16m2_t test_vssubu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m4_tu( @@ -210,7 +210,7 @@ vuint16m2_t test_vssubu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vssubu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m4_tu( @@ -219,7 +219,7 @@ vuint16m4_t test_vssubu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m8_tu( @@ -228,7 +228,7 @@ vuint16m4_t test_vssubu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vssubu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m8_tu( @@ -237,7 +237,7 @@ vuint16m8_t test_vssubu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint16m8_t test_vssubu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vssubu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vssubu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vssubu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vssubu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vssubu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m2_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vssubu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vssubu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m2_tu( @@ -291,7 +291,7 @@ vuint32m2_t test_vssubu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m4_tu( @@ -300,7 +300,7 @@ vuint32m2_t test_vssubu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vssubu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m4_tu( @@ -309,7 +309,7 @@ vuint32m4_t test_vssubu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m8_tu( @@ -318,7 +318,7 @@ vuint32m4_t test_vssubu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vssubu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m8_tu( @@ -327,7 +327,7 @@ vuint32m8_t test_vssubu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m1_tu( @@ -336,7 +336,7 @@ vuint32m8_t test_vssubu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vssubu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m1_tu( @@ -345,7 +345,7 @@ vuint64m1_t test_vssubu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m2_tu( @@ -354,7 +354,7 @@ vuint64m1_t test_vssubu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vssubu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m2_tu( @@ -363,7 +363,7 @@ vuint64m2_t test_vssubu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m4_tu( @@ -372,7 +372,7 @@ vuint64m2_t test_vssubu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vssubu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m4_tu( @@ -381,7 +381,7 @@ vuint64m4_t test_vssubu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m8_tu( @@ -390,7 +390,7 @@ vuint64m4_t test_vssubu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vssubu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m8_tu( @@ -399,7 +399,7 @@ vuint64m8_t test_vssubu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf8_tum( @@ -408,7 +408,7 @@ vuint64m8_t test_vssubu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vssubu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf8_tum( @@ -417,7 +417,7 @@ vuint8mf8_t test_vssubu_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf4_tum( @@ -426,7 +426,7 @@ vuint8mf8_t test_vssubu_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vssubu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf4_tum( @@ -435,7 +435,7 @@ vuint8mf4_t test_vssubu_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf2_tum( @@ -444,7 +444,7 @@ vuint8mf4_t test_vssubu_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vssubu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf2_tum( @@ -453,7 +453,7 @@ vuint8mf2_t test_vssubu_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m1_tum( @@ -462,7 +462,7 @@ vuint8mf2_t test_vssubu_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vssubu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m1_tum( @@ -471,7 +471,7 @@ vuint8m1_t test_vssubu_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m2_tum( @@ -480,7 +480,7 @@ vuint8m1_t test_vssubu_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vssubu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m2_tum( @@ -489,7 +489,7 @@ vuint8m2_t test_vssubu_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m4_tum( @@ -498,7 +498,7 @@ vuint8m2_t test_vssubu_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vssubu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m4_tum( @@ -507,7 +507,7 @@ vuint8m4_t test_vssubu_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m8_tum( @@ -516,7 +516,7 @@ vuint8m4_t test_vssubu_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vssubu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m8_tum( @@ -525,7 +525,7 @@ vuint8m8_t test_vssubu_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf4_tum( @@ -534,7 +534,7 @@ vuint8m8_t test_vssubu_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vssubu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf4_tum( @@ -543,7 +543,7 @@ vuint16mf4_t test_vssubu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf2_tum( @@ -552,7 +552,7 @@ vuint16mf4_t test_vssubu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vssubu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf2_tum( @@ -561,7 +561,7 @@ vuint16mf2_t test_vssubu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m1_tum( @@ -570,7 +570,7 @@ vuint16mf2_t test_vssubu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vssubu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m1_tum( @@ -579,7 +579,7 @@ vuint16m1_t test_vssubu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m2_tum( @@ -588,7 +588,7 @@ vuint16m1_t test_vssubu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vssubu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m2_tum( @@ -597,7 +597,7 @@ vuint16m2_t test_vssubu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m4_tum( @@ -606,7 +606,7 @@ vuint16m2_t test_vssubu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vssubu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m4_tum( @@ -615,7 +615,7 @@ vuint16m4_t test_vssubu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m8_tum( @@ -624,7 +624,7 @@ vuint16m4_t test_vssubu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vssubu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m8_tum( @@ -633,7 +633,7 @@ vuint16m8_t test_vssubu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32mf2_tum( @@ -642,7 +642,7 @@ vuint16m8_t test_vssubu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vssubu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32mf2_tum( @@ -651,7 +651,7 @@ vuint32mf2_t test_vssubu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m1_tum( @@ -660,7 +660,7 @@ vuint32mf2_t test_vssubu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vssubu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m1_tum( @@ -669,7 +669,7 @@ vuint32m1_t test_vssubu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m2_tum( @@ -678,7 +678,7 @@ vuint32m1_t test_vssubu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vssubu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m2_tum( @@ -687,7 +687,7 @@ vuint32m2_t test_vssubu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m4_tum( @@ -696,7 +696,7 @@ vuint32m2_t test_vssubu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vssubu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m4_tum( @@ -705,7 +705,7 @@ vuint32m4_t test_vssubu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m8_tum( @@ -714,7 +714,7 @@ vuint32m4_t test_vssubu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vssubu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m8_tum( @@ -723,7 +723,7 @@ vuint32m8_t test_vssubu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m1_tum( @@ -732,7 +732,7 @@ vuint32m8_t test_vssubu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vssubu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m1_tum( @@ -741,7 +741,7 @@ vuint64m1_t test_vssubu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m2_tum( @@ -750,7 +750,7 @@ vuint64m1_t test_vssubu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vssubu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m2_tum( @@ -759,7 +759,7 @@ vuint64m2_t test_vssubu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m4_tum( @@ -768,7 +768,7 @@ vuint64m2_t test_vssubu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vssubu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m4_tum( @@ -777,7 +777,7 @@ vuint64m4_t test_vssubu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m8_tum( @@ -786,7 +786,7 @@ vuint64m4_t test_vssubu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vssubu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m8_tum( @@ -795,7 +795,7 @@ vuint64m8_t test_vssubu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf8_tumu( @@ -804,7 +804,7 @@ vuint64m8_t test_vssubu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vssubu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf8_tumu( @@ -813,7 +813,7 @@ vuint8mf8_t test_vssubu_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf4_tumu( @@ -822,7 +822,7 @@ vuint8mf8_t test_vssubu_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vssubu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf4_tumu( @@ -831,7 +831,7 @@ vuint8mf4_t test_vssubu_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf2_tumu( @@ -840,7 +840,7 @@ vuint8mf4_t test_vssubu_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vssubu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf2_tumu( @@ -849,7 +849,7 @@ vuint8mf2_t test_vssubu_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m1_tumu( @@ -858,7 +858,7 @@ vuint8mf2_t test_vssubu_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vssubu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m1_tumu( @@ -867,7 +867,7 @@ vuint8m1_t test_vssubu_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m2_tumu( @@ -876,7 +876,7 @@ vuint8m1_t test_vssubu_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vssubu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m2_tumu( @@ -885,7 +885,7 @@ vuint8m2_t test_vssubu_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m4_tumu( @@ -894,7 +894,7 @@ vuint8m2_t test_vssubu_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vssubu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m4_tumu( @@ -903,7 +903,7 @@ vuint8m4_t test_vssubu_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m8_tumu( @@ -912,7 +912,7 @@ vuint8m4_t test_vssubu_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vssubu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m8_tumu( @@ -921,7 +921,7 @@ vuint8m8_t test_vssubu_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf4_tumu( @@ -930,7 +930,7 @@ vuint8m8_t test_vssubu_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vssubu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf4_tumu( @@ -939,7 +939,7 @@ vuint16mf4_t test_vssubu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf2_tumu( @@ -948,7 +948,7 @@ vuint16mf4_t test_vssubu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vssubu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf2_tumu( @@ -957,7 +957,7 @@ vuint16mf2_t test_vssubu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m1_tumu( @@ -966,7 +966,7 @@ vuint16mf2_t test_vssubu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vssubu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m1_tumu( @@ -975,7 +975,7 @@ vuint16m1_t test_vssubu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m2_tumu( @@ -984,7 +984,7 @@ vuint16m1_t test_vssubu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vssubu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m2_tumu( @@ -993,7 +993,7 @@ vuint16m2_t test_vssubu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m4_tumu( @@ -1002,7 +1002,7 @@ vuint16m2_t test_vssubu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vssubu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m4_tumu( @@ -1011,7 +1011,7 @@ vuint16m4_t test_vssubu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m8_tumu( @@ -1020,7 +1020,7 @@ vuint16m4_t test_vssubu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vssubu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m8_tumu( @@ -1029,7 +1029,7 @@ vuint16m8_t test_vssubu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32mf2_tumu( @@ -1038,7 +1038,7 @@ vuint16m8_t test_vssubu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vssubu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32mf2_tumu( @@ -1047,7 +1047,7 @@ vuint32mf2_t test_vssubu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m1_tumu( @@ -1056,7 +1056,7 @@ vuint32mf2_t test_vssubu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vssubu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m1_tumu( @@ -1065,7 +1065,7 @@ vuint32m1_t test_vssubu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m2_tumu( @@ -1074,7 +1074,7 @@ vuint32m1_t test_vssubu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vssubu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m2_tumu( @@ -1083,7 +1083,7 @@ vuint32m2_t test_vssubu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m4_tumu( @@ -1092,7 +1092,7 @@ vuint32m2_t test_vssubu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vssubu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m4_tumu( @@ -1101,7 +1101,7 @@ vuint32m4_t test_vssubu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m8_tumu( @@ -1110,7 +1110,7 @@ vuint32m4_t test_vssubu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vssubu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m8_tumu( @@ -1119,7 +1119,7 @@ vuint32m8_t test_vssubu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m1_tumu( @@ -1128,7 +1128,7 @@ vuint32m8_t test_vssubu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vssubu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m1_tumu( @@ -1137,7 +1137,7 @@ vuint64m1_t test_vssubu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m2_tumu( @@ -1146,7 +1146,7 @@ vuint64m1_t test_vssubu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vssubu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m2_tumu( @@ -1155,7 +1155,7 @@ vuint64m2_t test_vssubu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m4_tumu( @@ -1164,7 +1164,7 @@ vuint64m2_t test_vssubu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vssubu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m4_tumu( @@ -1173,7 +1173,7 @@ vuint64m4_t test_vssubu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m8_tumu( @@ -1182,7 +1182,7 @@ vuint64m4_t test_vssubu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vssubu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m8_tumu( @@ -1191,7 +1191,7 @@ vuint64m8_t test_vssubu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf8_mu( @@ -1200,7 +1200,7 @@ vuint64m8_t test_vssubu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vssubu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf8_mu( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vssubu_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vssubu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf4_mu( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vssubu_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vssubu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf4_mu( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vssubu_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vssubu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8mf2_mu( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vssubu_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vssubu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8mf2_mu( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vssubu_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vssubu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m1_mu( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vssubu_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vssubu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m1_mu( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vssubu_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vssubu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m2_mu( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vssubu_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vssubu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m2_mu( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vssubu_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vssubu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m4_mu( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vssubu_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vssubu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m4_mu( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vssubu_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vssubu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u8m8_mu( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vssubu_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vssubu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u8m8_mu( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vssubu_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vssubu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vssubu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf4_mu( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vssubu_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vssubu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf4_mu( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vssubu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vssubu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16mf2_mu( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vssubu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vssubu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16mf2_mu( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vssubu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vssubu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m1_mu( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vssubu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vssubu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m1_mu( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vssubu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vssubu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m2_mu( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vssubu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vssubu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m2_mu( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vssubu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vssubu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m4_mu( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vssubu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vssubu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m4_mu( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vssubu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vssubu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u16m8_mu( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vssubu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vssubu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u16m8_mu( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vssubu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vssubu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vssubu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32mf2_mu( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vssubu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vssubu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32mf2_mu( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vssubu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vssubu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m1_mu( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vssubu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vssubu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m1_mu( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vssubu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vssubu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m2_mu( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vssubu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vssubu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m2_mu( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vssubu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vssubu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m4_mu( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vssubu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vssubu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m4_mu( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vssubu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vssubu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u32m8_mu( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vssubu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vssubu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u32m8_mu( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vssubu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vssubu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vssubu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m1_mu( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vssubu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vssubu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m1_mu( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vssubu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vssubu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m2_mu( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vssubu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vssubu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m2_mu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vssubu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vssubu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m4_mu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vssubu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vssubu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m4_mu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vssubu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vssubu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vv_u64m8_mu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vssubu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vssubu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vssubu_vx_u64m8_mu( @@ -1587,6 +1587,6 @@ vuint64m8_t test_vssubu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vssubu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vssubu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vssubu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsub.c index 45cc4864544e0e02be1e5ca0fcc43d186634f3b7..063eb6c50067d9de06f3f22dcbb5a65a8f445849 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsub_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vsub_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vsub_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsub_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vsub_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vsub_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsub_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vsub_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vsub_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsub_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vsub_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vsub_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsub_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vsub_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vsub_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsub_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vsub_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vsub_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsub_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vsub_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vsub_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsub_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vsub_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vsub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsub_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vsub_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vsub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsub_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vsub_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vsub_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsub_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vsub_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vsub_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsub_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vsub_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vsub_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsub_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vsub_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vsub_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsub_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vsub_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vsub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsub_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vsub_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vsub_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsub_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vsub_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vsub_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsub_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vsub_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vsub_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsub_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vsub_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vsub_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsub_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vsub_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vsub_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsub_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vsub_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vsub_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsub_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vsub_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vsub_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsub_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vsub_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vsub_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsub_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vsub_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vsub_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsub_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vsub_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vsub_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsub_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vsub_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vsub_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsub_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vsub_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vsub_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsub_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vsub_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vsub_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsub_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vsub_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vsub_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsub_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vsub_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vsub_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsub_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vsub_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vsub_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsub_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vsub_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vsub_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsub_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vsub_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vsub_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsub_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vsub_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vsub_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsub_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vsub_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vsub_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsub_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vsub_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vsub_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsub_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vsub_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vsub_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsub_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vsub_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vsub_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsub_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vsub_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vsub_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsub_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vsub_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vsub_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsub_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vsub_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vsub_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsub_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vsub_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vsub_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsub_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vsub_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vsub_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsub_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vsub_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vsub_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsub_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m8_tu( @@ -795,7 +795,7 @@ vuint64m8_t test_vsub_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf8_tum( @@ -804,7 +804,7 @@ vuint64m8_t test_vsub_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsub_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf8_tum( @@ -813,7 +813,7 @@ vint8mf8_t test_vsub_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf4_tum( @@ -822,7 +822,7 @@ vint8mf8_t test_vsub_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsub_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf4_tum( @@ -831,7 +831,7 @@ vint8mf4_t test_vsub_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf2_tum( @@ -840,7 +840,7 @@ vint8mf4_t test_vsub_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsub_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf2_tum( @@ -849,7 +849,7 @@ vint8mf2_t test_vsub_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m1_tum( @@ -858,7 +858,7 @@ vint8mf2_t test_vsub_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsub_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m1_tum( @@ -867,7 +867,7 @@ vint8m1_t test_vsub_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m2_tum( @@ -876,7 +876,7 @@ vint8m1_t test_vsub_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsub_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m2_tum( @@ -885,7 +885,7 @@ vint8m2_t test_vsub_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m4_tum( @@ -894,7 +894,7 @@ vint8m2_t test_vsub_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsub_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m4_tum( @@ -903,7 +903,7 @@ vint8m4_t test_vsub_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m8_tum( @@ -912,7 +912,7 @@ vint8m4_t test_vsub_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsub_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m8_tum( @@ -921,7 +921,7 @@ vint8m8_t test_vsub_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf4_tum( @@ -930,7 +930,7 @@ vint8m8_t test_vsub_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsub_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf4_tum( @@ -939,7 +939,7 @@ vint16mf4_t test_vsub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf2_tum( @@ -948,7 +948,7 @@ vint16mf4_t test_vsub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsub_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf2_tum( @@ -957,7 +957,7 @@ vint16mf2_t test_vsub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m1_tum( @@ -966,7 +966,7 @@ vint16mf2_t test_vsub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsub_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m1_tum( @@ -975,7 +975,7 @@ vint16m1_t test_vsub_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m2_tum( @@ -984,7 +984,7 @@ vint16m1_t test_vsub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsub_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m2_tum( @@ -993,7 +993,7 @@ vint16m2_t test_vsub_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m4_tum( @@ -1002,7 +1002,7 @@ vint16m2_t test_vsub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsub_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m4_tum( @@ -1011,7 +1011,7 @@ vint16m4_t test_vsub_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m8_tum( @@ -1020,7 +1020,7 @@ vint16m4_t test_vsub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsub_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m8_tum( @@ -1029,7 +1029,7 @@ vint16m8_t test_vsub_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32mf2_tum( @@ -1038,7 +1038,7 @@ vint16m8_t test_vsub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsub_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32mf2_tum( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vsub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m1_tum( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vsub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsub_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m1_tum( @@ -1065,7 +1065,7 @@ vint32m1_t test_vsub_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m2_tum( @@ -1074,7 +1074,7 @@ vint32m1_t test_vsub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsub_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m2_tum( @@ -1083,7 +1083,7 @@ vint32m2_t test_vsub_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m4_tum( @@ -1092,7 +1092,7 @@ vint32m2_t test_vsub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsub_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m4_tum( @@ -1101,7 +1101,7 @@ vint32m4_t test_vsub_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m8_tum( @@ -1110,7 +1110,7 @@ vint32m4_t test_vsub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsub_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m8_tum( @@ -1119,7 +1119,7 @@ vint32m8_t test_vsub_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m1_tum( @@ -1128,7 +1128,7 @@ vint32m8_t test_vsub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsub_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m1_tum( @@ -1137,7 +1137,7 @@ vint64m1_t test_vsub_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m2_tum( @@ -1146,7 +1146,7 @@ vint64m1_t test_vsub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsub_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m2_tum( @@ -1155,7 +1155,7 @@ vint64m2_t test_vsub_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m4_tum( @@ -1164,7 +1164,7 @@ vint64m2_t test_vsub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsub_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m4_tum( @@ -1173,7 +1173,7 @@ vint64m4_t test_vsub_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m8_tum( @@ -1182,7 +1182,7 @@ vint64m4_t test_vsub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsub_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m8_tum( @@ -1191,7 +1191,7 @@ vint64m8_t test_vsub_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf8_tum( @@ -1200,7 +1200,7 @@ vint64m8_t test_vsub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsub_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf8_tum( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vsub_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf4_tum( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vsub_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsub_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf4_tum( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vsub_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf2_tum( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vsub_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsub_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf2_tum( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vsub_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m1_tum( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vsub_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsub_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m1_tum( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vsub_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m2_tum( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vsub_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsub_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m2_tum( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vsub_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m4_tum( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vsub_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsub_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m4_tum( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vsub_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m8_tum( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vsub_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsub_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m8_tum( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vsub_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf4_tum( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vsub_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsub_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf4_tum( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vsub_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf2_tum( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vsub_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsub_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf2_tum( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vsub_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m1_tum( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vsub_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsub_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m1_tum( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vsub_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m2_tum( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vsub_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsub_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m2_tum( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vsub_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m4_tum( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vsub_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsub_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m4_tum( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vsub_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m8_tum( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vsub_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsub_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m8_tum( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vsub_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32mf2_tum( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vsub_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsub_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32mf2_tum( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vsub_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m1_tum( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vsub_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsub_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m1_tum( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vsub_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m2_tum( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vsub_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsub_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m2_tum( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vsub_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m4_tum( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vsub_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsub_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m4_tum( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vsub_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m8_tum( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vsub_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsub_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m8_tum( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vsub_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m1_tum( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vsub_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsub_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m1_tum( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vsub_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m2_tum( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vsub_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsub_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m2_tum( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vsub_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m4_tum( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vsub_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsub_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m4_tum( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vsub_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m8_tum( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vsub_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsub_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m8_tum( @@ -1587,7 +1587,7 @@ vuint64m8_t test_vsub_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf8_tumu( @@ -1596,7 +1596,7 @@ vuint64m8_t test_vsub_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsub_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf8_tumu( @@ -1605,7 +1605,7 @@ vint8mf8_t test_vsub_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf4_tumu( @@ -1614,7 +1614,7 @@ vint8mf8_t test_vsub_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsub_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf4_tumu( @@ -1623,7 +1623,7 @@ vint8mf4_t test_vsub_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf2_tumu( @@ -1632,7 +1632,7 @@ vint8mf4_t test_vsub_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsub_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf2_tumu( @@ -1641,7 +1641,7 @@ vint8mf2_t test_vsub_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m1_tumu( @@ -1650,7 +1650,7 @@ vint8mf2_t test_vsub_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsub_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m1_tumu( @@ -1659,7 +1659,7 @@ vint8m1_t test_vsub_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m2_tumu( @@ -1668,7 +1668,7 @@ vint8m1_t test_vsub_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsub_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m2_tumu( @@ -1677,7 +1677,7 @@ vint8m2_t test_vsub_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m4_tumu( @@ -1686,7 +1686,7 @@ vint8m2_t test_vsub_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsub_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m4_tumu( @@ -1695,7 +1695,7 @@ vint8m4_t test_vsub_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m8_tumu( @@ -1704,7 +1704,7 @@ vint8m4_t test_vsub_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsub_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m8_tumu( @@ -1713,7 +1713,7 @@ vint8m8_t test_vsub_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf4_tumu( @@ -1722,7 +1722,7 @@ vint8m8_t test_vsub_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsub_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf4_tumu( @@ -1731,7 +1731,7 @@ vint16mf4_t test_vsub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf2_tumu( @@ -1740,7 +1740,7 @@ vint16mf4_t test_vsub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsub_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf2_tumu( @@ -1749,7 +1749,7 @@ vint16mf2_t test_vsub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m1_tumu( @@ -1758,7 +1758,7 @@ vint16mf2_t test_vsub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsub_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m1_tumu( @@ -1767,7 +1767,7 @@ vint16m1_t test_vsub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m2_tumu( @@ -1776,7 +1776,7 @@ vint16m1_t test_vsub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsub_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m2_tumu( @@ -1785,7 +1785,7 @@ vint16m2_t test_vsub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m4_tumu( @@ -1794,7 +1794,7 @@ vint16m2_t test_vsub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsub_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m4_tumu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vsub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m8_tumu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vsub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsub_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m8_tumu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vsub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32mf2_tumu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vsub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsub_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32mf2_tumu( @@ -1839,7 +1839,7 @@ vint32mf2_t test_vsub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m1_tumu( @@ -1848,7 +1848,7 @@ vint32mf2_t test_vsub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsub_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m1_tumu( @@ -1857,7 +1857,7 @@ vint32m1_t test_vsub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m2_tumu( @@ -1866,7 +1866,7 @@ vint32m1_t test_vsub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsub_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m2_tumu( @@ -1875,7 +1875,7 @@ vint32m2_t test_vsub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m4_tumu( @@ -1884,7 +1884,7 @@ vint32m2_t test_vsub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsub_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m4_tumu( @@ -1893,7 +1893,7 @@ vint32m4_t test_vsub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m8_tumu( @@ -1902,7 +1902,7 @@ vint32m4_t test_vsub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsub_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m8_tumu( @@ -1911,7 +1911,7 @@ vint32m8_t test_vsub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m1_tumu( @@ -1920,7 +1920,7 @@ vint32m8_t test_vsub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsub_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m1_tumu( @@ -1929,7 +1929,7 @@ vint64m1_t test_vsub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m2_tumu( @@ -1938,7 +1938,7 @@ vint64m1_t test_vsub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsub_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m2_tumu( @@ -1947,7 +1947,7 @@ vint64m2_t test_vsub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m4_tumu( @@ -1956,7 +1956,7 @@ vint64m2_t test_vsub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsub_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m4_tumu( @@ -1965,7 +1965,7 @@ vint64m4_t test_vsub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m8_tumu( @@ -1974,7 +1974,7 @@ vint64m4_t test_vsub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsub_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m8_tumu( @@ -1983,7 +1983,7 @@ vint64m8_t test_vsub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf8_tumu( @@ -1992,7 +1992,7 @@ vint64m8_t test_vsub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsub_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf8_tumu( @@ -2001,7 +2001,7 @@ vuint8mf8_t test_vsub_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf4_tumu( @@ -2010,7 +2010,7 @@ vuint8mf8_t test_vsub_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsub_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf4_tumu( @@ -2019,7 +2019,7 @@ vuint8mf4_t test_vsub_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf2_tumu( @@ -2028,7 +2028,7 @@ vuint8mf4_t test_vsub_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsub_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf2_tumu( @@ -2037,7 +2037,7 @@ vuint8mf2_t test_vsub_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m1_tumu( @@ -2046,7 +2046,7 @@ vuint8mf2_t test_vsub_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsub_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m1_tumu( @@ -2055,7 +2055,7 @@ vuint8m1_t test_vsub_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m2_tumu( @@ -2064,7 +2064,7 @@ vuint8m1_t test_vsub_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsub_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m2_tumu( @@ -2073,7 +2073,7 @@ vuint8m2_t test_vsub_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m4_tumu( @@ -2082,7 +2082,7 @@ vuint8m2_t test_vsub_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsub_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m4_tumu( @@ -2091,7 +2091,7 @@ vuint8m4_t test_vsub_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m8_tumu( @@ -2100,7 +2100,7 @@ vuint8m4_t test_vsub_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsub_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m8_tumu( @@ -2109,7 +2109,7 @@ vuint8m8_t test_vsub_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf4_tumu( @@ -2118,7 +2118,7 @@ vuint8m8_t test_vsub_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsub_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf4_tumu( @@ -2127,7 +2127,7 @@ vuint16mf4_t test_vsub_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf2_tumu( @@ -2136,7 +2136,7 @@ vuint16mf4_t test_vsub_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsub_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf2_tumu( @@ -2145,7 +2145,7 @@ vuint16mf2_t test_vsub_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m1_tumu( @@ -2154,7 +2154,7 @@ vuint16mf2_t test_vsub_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsub_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m1_tumu( @@ -2163,7 +2163,7 @@ vuint16m1_t test_vsub_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m2_tumu( @@ -2172,7 +2172,7 @@ vuint16m1_t test_vsub_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsub_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m2_tumu( @@ -2181,7 +2181,7 @@ vuint16m2_t test_vsub_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m4_tumu( @@ -2190,7 +2190,7 @@ vuint16m2_t test_vsub_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsub_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m4_tumu( @@ -2199,7 +2199,7 @@ vuint16m4_t test_vsub_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m8_tumu( @@ -2208,7 +2208,7 @@ vuint16m4_t test_vsub_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsub_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m8_tumu( @@ -2217,7 +2217,7 @@ vuint16m8_t test_vsub_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32mf2_tumu( @@ -2226,7 +2226,7 @@ vuint16m8_t test_vsub_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsub_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32mf2_tumu( @@ -2235,7 +2235,7 @@ vuint32mf2_t test_vsub_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m1_tumu( @@ -2244,7 +2244,7 @@ vuint32mf2_t test_vsub_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsub_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m1_tumu( @@ -2253,7 +2253,7 @@ vuint32m1_t test_vsub_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m2_tumu( @@ -2262,7 +2262,7 @@ vuint32m1_t test_vsub_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsub_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m2_tumu( @@ -2271,7 +2271,7 @@ vuint32m2_t test_vsub_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m4_tumu( @@ -2280,7 +2280,7 @@ vuint32m2_t test_vsub_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsub_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m4_tumu( @@ -2289,7 +2289,7 @@ vuint32m4_t test_vsub_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m8_tumu( @@ -2298,7 +2298,7 @@ vuint32m4_t test_vsub_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsub_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m8_tumu( @@ -2307,7 +2307,7 @@ vuint32m8_t test_vsub_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m1_tumu( @@ -2316,7 +2316,7 @@ vuint32m8_t test_vsub_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsub_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m1_tumu( @@ -2325,7 +2325,7 @@ vuint64m1_t test_vsub_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m2_tumu( @@ -2334,7 +2334,7 @@ vuint64m1_t test_vsub_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsub_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m2_tumu( @@ -2343,7 +2343,7 @@ vuint64m2_t test_vsub_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m4_tumu( @@ -2352,7 +2352,7 @@ vuint64m2_t test_vsub_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsub_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m4_tumu( @@ -2361,7 +2361,7 @@ vuint64m4_t test_vsub_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m8_tumu( @@ -2370,7 +2370,7 @@ vuint64m4_t test_vsub_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsub_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m8_tumu( @@ -2379,7 +2379,7 @@ vuint64m8_t test_vsub_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf8_mu( @@ -2388,7 +2388,7 @@ vuint64m8_t test_vsub_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vsub_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf8_mu( @@ -2397,7 +2397,7 @@ vint8mf8_t test_vsub_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vsub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf4_mu( @@ -2406,7 +2406,7 @@ vint8mf8_t test_vsub_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vsub_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf4_mu( @@ -2415,7 +2415,7 @@ vint8mf4_t test_vsub_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vsub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8mf2_mu( @@ -2424,7 +2424,7 @@ vint8mf4_t test_vsub_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vsub_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8mf2_mu( @@ -2433,7 +2433,7 @@ vint8mf2_t test_vsub_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vsub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m1_mu( @@ -2442,7 +2442,7 @@ vint8mf2_t test_vsub_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vsub_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m1_mu( @@ -2451,7 +2451,7 @@ vint8m1_t test_vsub_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vsub_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m2_mu( @@ -2460,7 +2460,7 @@ vint8m1_t test_vsub_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vsub_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m2_mu( @@ -2469,7 +2469,7 @@ vint8m2_t test_vsub_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vsub_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m4_mu( @@ -2478,7 +2478,7 @@ vint8m2_t test_vsub_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vsub_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m4_mu( @@ -2487,7 +2487,7 @@ vint8m4_t test_vsub_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vsub_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i8m8_mu( @@ -2496,7 +2496,7 @@ vint8m4_t test_vsub_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vsub_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i8m8_mu( @@ -2505,7 +2505,7 @@ vint8m8_t test_vsub_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vsub_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vsub_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf4_mu( @@ -2514,7 +2514,7 @@ vint8m8_t test_vsub_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vsub_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf4_mu( @@ -2523,7 +2523,7 @@ vint16mf4_t test_vsub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vsub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16mf2_mu( @@ -2532,7 +2532,7 @@ vint16mf4_t test_vsub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vsub_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16mf2_mu( @@ -2541,7 +2541,7 @@ vint16mf2_t test_vsub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vsub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m1_mu( @@ -2550,7 +2550,7 @@ vint16mf2_t test_vsub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vsub_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m1_mu( @@ -2559,7 +2559,7 @@ vint16m1_t test_vsub_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vsub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m2_mu( @@ -2568,7 +2568,7 @@ vint16m1_t test_vsub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vsub_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m2_mu( @@ -2577,7 +2577,7 @@ vint16m2_t test_vsub_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vsub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m4_mu( @@ -2586,7 +2586,7 @@ vint16m2_t test_vsub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vsub_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m4_mu( @@ -2595,7 +2595,7 @@ vint16m4_t test_vsub_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vsub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i16m8_mu( @@ -2604,7 +2604,7 @@ vint16m4_t test_vsub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vsub_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i16m8_mu( @@ -2613,7 +2613,7 @@ vint16m8_t test_vsub_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vsub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vsub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32mf2_mu( @@ -2622,7 +2622,7 @@ vint16m8_t test_vsub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vsub_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32mf2_mu( @@ -2631,7 +2631,7 @@ vint32mf2_t test_vsub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vsub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m1_mu( @@ -2640,7 +2640,7 @@ vint32mf2_t test_vsub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vsub_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m1_mu( @@ -2649,7 +2649,7 @@ vint32m1_t test_vsub_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vsub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m2_mu( @@ -2658,7 +2658,7 @@ vint32m1_t test_vsub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vsub_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m2_mu( @@ -2667,7 +2667,7 @@ vint32m2_t test_vsub_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vsub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m4_mu( @@ -2676,7 +2676,7 @@ vint32m2_t test_vsub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vsub_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m4_mu( @@ -2685,7 +2685,7 @@ vint32m4_t test_vsub_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vsub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i32m8_mu( @@ -2694,7 +2694,7 @@ vint32m4_t test_vsub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vsub_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i32m8_mu( @@ -2703,7 +2703,7 @@ vint32m8_t test_vsub_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vsub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vsub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m1_mu( @@ -2712,7 +2712,7 @@ vint32m8_t test_vsub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsub_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m1_mu( @@ -2721,7 +2721,7 @@ vint64m1_t test_vsub_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m2_mu( @@ -2730,7 +2730,7 @@ vint64m1_t test_vsub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsub_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m2_mu( @@ -2739,7 +2739,7 @@ vint64m2_t test_vsub_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m4_mu( @@ -2748,7 +2748,7 @@ vint64m2_t test_vsub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsub_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m4_mu( @@ -2757,7 +2757,7 @@ vint64m4_t test_vsub_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_i64m8_mu( @@ -2766,7 +2766,7 @@ vint64m4_t test_vsub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsub_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_i64m8_mu( @@ -2775,7 +2775,7 @@ vint64m8_t test_vsub_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsub_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vsub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf8_mu( @@ -2784,7 +2784,7 @@ vint64m8_t test_vsub_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vsub_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf8_mu( @@ -2793,7 +2793,7 @@ vuint8mf8_t test_vsub_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vsub_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf4_mu( @@ -2802,7 +2802,7 @@ vuint8mf8_t test_vsub_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vsub_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf4_mu( @@ -2811,7 +2811,7 @@ vuint8mf4_t test_vsub_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vsub_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8mf2_mu( @@ -2820,7 +2820,7 @@ vuint8mf4_t test_vsub_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vsub_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8mf2_mu( @@ -2829,7 +2829,7 @@ vuint8mf2_t test_vsub_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vsub_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m1_mu( @@ -2838,7 +2838,7 @@ vuint8mf2_t test_vsub_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vsub_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m1_mu( @@ -2847,7 +2847,7 @@ vuint8m1_t test_vsub_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vsub_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m2_mu( @@ -2856,7 +2856,7 @@ vuint8m1_t test_vsub_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vsub_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m2_mu( @@ -2865,7 +2865,7 @@ vuint8m2_t test_vsub_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vsub_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m4_mu( @@ -2874,7 +2874,7 @@ vuint8m2_t test_vsub_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vsub_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m4_mu( @@ -2883,7 +2883,7 @@ vuint8m4_t test_vsub_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vsub_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u8m8_mu( @@ -2892,7 +2892,7 @@ vuint8m4_t test_vsub_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vsub_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u8m8_mu( @@ -2901,7 +2901,7 @@ vuint8m8_t test_vsub_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vsub_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vsub_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf4_mu( @@ -2910,7 +2910,7 @@ vuint8m8_t test_vsub_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vsub_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf4_mu( @@ -2919,7 +2919,7 @@ vuint16mf4_t test_vsub_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vsub_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16mf2_mu( @@ -2928,7 +2928,7 @@ vuint16mf4_t test_vsub_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vsub_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16mf2_mu( @@ -2937,7 +2937,7 @@ vuint16mf2_t test_vsub_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vsub_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m1_mu( @@ -2946,7 +2946,7 @@ vuint16mf2_t test_vsub_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vsub_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m1_mu( @@ -2955,7 +2955,7 @@ vuint16m1_t test_vsub_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vsub_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m2_mu( @@ -2964,7 +2964,7 @@ vuint16m1_t test_vsub_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vsub_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m2_mu( @@ -2973,7 +2973,7 @@ vuint16m2_t test_vsub_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vsub_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m4_mu( @@ -2982,7 +2982,7 @@ vuint16m2_t test_vsub_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vsub_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m4_mu( @@ -2991,7 +2991,7 @@ vuint16m4_t test_vsub_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vsub_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u16m8_mu( @@ -3000,7 +3000,7 @@ vuint16m4_t test_vsub_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vsub_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u16m8_mu( @@ -3009,7 +3009,7 @@ vuint16m8_t test_vsub_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vsub_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vsub_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32mf2_mu( @@ -3018,7 +3018,7 @@ vuint16m8_t test_vsub_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vsub_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32mf2_mu( @@ -3027,7 +3027,7 @@ vuint32mf2_t test_vsub_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vsub_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m1_mu( @@ -3036,7 +3036,7 @@ vuint32mf2_t test_vsub_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vsub_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m1_mu( @@ -3045,7 +3045,7 @@ vuint32m1_t test_vsub_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vsub_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m2_mu( @@ -3054,7 +3054,7 @@ vuint32m1_t test_vsub_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vsub_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m2_mu( @@ -3063,7 +3063,7 @@ vuint32m2_t test_vsub_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vsub_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m4_mu( @@ -3072,7 +3072,7 @@ vuint32m2_t test_vsub_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vsub_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m4_mu( @@ -3081,7 +3081,7 @@ vuint32m4_t test_vsub_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vsub_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u32m8_mu( @@ -3090,7 +3090,7 @@ vuint32m4_t test_vsub_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vsub_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u32m8_mu( @@ -3099,7 +3099,7 @@ vuint32m8_t test_vsub_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vsub_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vsub_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m1_mu( @@ -3108,7 +3108,7 @@ vuint32m8_t test_vsub_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vsub_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m1_mu( @@ -3117,7 +3117,7 @@ vuint64m1_t test_vsub_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vsub_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m2_mu( @@ -3126,7 +3126,7 @@ vuint64m1_t test_vsub_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vsub_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m2_mu( @@ -3135,7 +3135,7 @@ vuint64m2_t test_vsub_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vsub_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m4_mu( @@ -3144,7 +3144,7 @@ vuint64m2_t test_vsub_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vsub_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m4_mu( @@ -3153,7 +3153,7 @@ vuint64m4_t test_vsub_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vsub_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vv_u64m8_mu( @@ -3162,7 +3162,7 @@ vuint64m4_t test_vsub_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vsub_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsub_vx_u64m8_mu( @@ -3171,6 +3171,6 @@ vuint64m8_t test_vsub_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vsub_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vsub_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vsub_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwadd.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwadd.c index 241bad2e84ca50fde8e05bdec44333e4d6d8201c..ceb621348cf5deafafad9ae9db04c2c7ebf02d24 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwadd.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwadd.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vv_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf4_tu( @@ -21,7 +21,7 @@ vint16mf4_t test_vwadd_vv_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vx_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf4_tu( @@ -30,7 +30,7 @@ vint16mf4_t test_vwadd_vx_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_wv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf4_tu( @@ -39,7 +39,7 @@ vint16mf4_t test_vwadd_wv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf2_tu( @@ -48,7 +48,7 @@ vint16mf4_t test_vwadd_wx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vv_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf2_tu( @@ -57,7 +57,7 @@ vint16mf2_t test_vwadd_vv_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vx_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf2_tu( @@ -66,7 +66,7 @@ vint16mf2_t test_vwadd_vx_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_wv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf2_tu( @@ -75,7 +75,7 @@ vint16mf2_t test_vwadd_wv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m1_tu( @@ -84,7 +84,7 @@ vint16mf2_t test_vwadd_wx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vv_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m1_tu( @@ -93,7 +93,7 @@ vint16m1_t test_vwadd_vv_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vx_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m1_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vwadd_vx_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_wv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m1_tu( @@ -111,7 +111,7 @@ vint16m1_t test_vwadd_wv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m2_tu( @@ -120,7 +120,7 @@ vint16m1_t test_vwadd_wx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vv_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwadd_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m2_tu( @@ -129,7 +129,7 @@ vint16m2_t test_vwadd_vv_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vx_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m2_tu( @@ -138,7 +138,7 @@ vint16m2_t test_vwadd_vx_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwadd_wv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m2_tu( @@ -147,7 +147,7 @@ vint16m2_t test_vwadd_wv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m4_tu( @@ -156,7 +156,7 @@ vint16m2_t test_vwadd_wx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vv_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwadd_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m4_tu( @@ -165,7 +165,7 @@ vint16m4_t test_vwadd_vv_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vx_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m4_tu( @@ -174,7 +174,7 @@ vint16m4_t test_vwadd_vx_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwadd_wv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m4_tu( @@ -183,7 +183,7 @@ vint16m4_t test_vwadd_wv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m8_tu( @@ -192,7 +192,7 @@ vint16m4_t test_vwadd_wx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vv_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwadd_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m8_tu( @@ -201,7 +201,7 @@ vint16m8_t test_vwadd_vv_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vx_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m8_tu( @@ -210,7 +210,7 @@ vint16m8_t test_vwadd_vx_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwadd_wv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m8_tu( @@ -219,7 +219,7 @@ vint16m8_t test_vwadd_wv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32mf2_tu( @@ -228,7 +228,7 @@ vint16m8_t test_vwadd_wx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vv_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32mf2_tu( @@ -237,7 +237,7 @@ vint32mf2_t test_vwadd_vv_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vx_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32mf2_tu( @@ -246,7 +246,7 @@ vint32mf2_t test_vwadd_vx_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_wv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vwadd_wv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vwadd_wx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vv_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vwadd_vv_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vx_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m1_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vwadd_vx_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_wv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m1_tu( @@ -291,7 +291,7 @@ vint32m1_t test_vwadd_wv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m2_tu( @@ -300,7 +300,7 @@ vint32m1_t test_vwadd_wx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vv_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwadd_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m2_tu( @@ -309,7 +309,7 @@ vint32m2_t test_vwadd_vv_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vx_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m2_tu( @@ -318,7 +318,7 @@ vint32m2_t test_vwadd_vx_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwadd_wv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m2_tu( @@ -327,7 +327,7 @@ vint32m2_t test_vwadd_wv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m4_tu( @@ -336,7 +336,7 @@ vint32m2_t test_vwadd_wx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vv_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwadd_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m4_tu( @@ -345,7 +345,7 @@ vint32m4_t test_vwadd_vv_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vx_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m4_tu( @@ -354,7 +354,7 @@ vint32m4_t test_vwadd_vx_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwadd_wv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m4_tu( @@ -363,7 +363,7 @@ vint32m4_t test_vwadd_wv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m8_tu( @@ -372,7 +372,7 @@ vint32m4_t test_vwadd_wx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vv_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwadd_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m8_tu( @@ -381,7 +381,7 @@ vint32m8_t test_vwadd_vv_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vx_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m8_tu( @@ -390,7 +390,7 @@ vint32m8_t test_vwadd_vx_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwadd_wv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m8_tu( @@ -399,7 +399,7 @@ vint32m8_t test_vwadd_wv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m1_tu( @@ -408,7 +408,7 @@ vint32m8_t test_vwadd_wx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vv_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m1_tu( @@ -417,7 +417,7 @@ vint64m1_t test_vwadd_vv_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vx_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m1_tu( @@ -426,7 +426,7 @@ vint64m1_t test_vwadd_vx_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_wv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m1_tu( @@ -435,7 +435,7 @@ vint64m1_t test_vwadd_wv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m2_tu( @@ -444,7 +444,7 @@ vint64m1_t test_vwadd_wx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vv_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwadd_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m2_tu( @@ -453,7 +453,7 @@ vint64m2_t test_vwadd_vv_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vx_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m2_tu( @@ -462,7 +462,7 @@ vint64m2_t test_vwadd_vx_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwadd_wv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m2_tu( @@ -471,7 +471,7 @@ vint64m2_t test_vwadd_wv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m4_tu( @@ -480,7 +480,7 @@ vint64m2_t test_vwadd_wx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vv_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwadd_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m4_tu( @@ -489,7 +489,7 @@ vint64m4_t test_vwadd_vv_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vx_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m4_tu( @@ -498,7 +498,7 @@ vint64m4_t test_vwadd_vx_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwadd_wv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m4_tu( @@ -507,7 +507,7 @@ vint64m4_t test_vwadd_wv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m8_tu( @@ -516,7 +516,7 @@ vint64m4_t test_vwadd_wx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vv_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwadd_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m8_tu( @@ -525,7 +525,7 @@ vint64m8_t test_vwadd_vv_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vx_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m8_tu( @@ -534,7 +534,7 @@ vint64m8_t test_vwadd_vx_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwadd_wv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m8_tu( @@ -543,7 +543,7 @@ vint64m8_t test_vwadd_wv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf4_tum( @@ -552,7 +552,7 @@ vint64m8_t test_vwadd_wx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf4_tum( @@ -561,7 +561,7 @@ vint16mf4_t test_vwadd_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf4_tum( @@ -570,7 +570,7 @@ vint16mf4_t test_vwadd_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_wv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf4_tum( @@ -579,7 +579,7 @@ vint16mf4_t test_vwadd_wv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf2_tum( @@ -588,7 +588,7 @@ vint16mf4_t test_vwadd_wx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf2_tum( @@ -597,7 +597,7 @@ vint16mf2_t test_vwadd_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf2_tum( @@ -606,7 +606,7 @@ vint16mf2_t test_vwadd_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_wv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf2_tum( @@ -615,7 +615,7 @@ vint16mf2_t test_vwadd_wv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m1_tum( @@ -624,7 +624,7 @@ vint16mf2_t test_vwadd_wx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m1_tum( @@ -633,7 +633,7 @@ vint16m1_t test_vwadd_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m1_tum( @@ -642,7 +642,7 @@ vint16m1_t test_vwadd_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_wv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m1_tum( @@ -651,7 +651,7 @@ vint16m1_t test_vwadd_wv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m2_tum( @@ -660,7 +660,7 @@ vint16m1_t test_vwadd_wx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwadd_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m2_tum( @@ -669,7 +669,7 @@ vint16m2_t test_vwadd_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m2_tum( @@ -678,7 +678,7 @@ vint16m2_t test_vwadd_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwadd_wv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m2_tum( @@ -687,7 +687,7 @@ vint16m2_t test_vwadd_wv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m4_tum( @@ -696,7 +696,7 @@ vint16m2_t test_vwadd_wx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwadd_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m4_tum( @@ -705,7 +705,7 @@ vint16m4_t test_vwadd_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m4_tum( @@ -714,7 +714,7 @@ vint16m4_t test_vwadd_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwadd_wv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m4_tum( @@ -723,7 +723,7 @@ vint16m4_t test_vwadd_wv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m8_tum( @@ -732,7 +732,7 @@ vint16m4_t test_vwadd_wx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwadd_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m8_tum( @@ -741,7 +741,7 @@ vint16m8_t test_vwadd_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m8_tum( @@ -750,7 +750,7 @@ vint16m8_t test_vwadd_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwadd_wv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m8_tum( @@ -759,7 +759,7 @@ vint16m8_t test_vwadd_wv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32mf2_tum( @@ -768,7 +768,7 @@ vint16m8_t test_vwadd_wx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32mf2_tum( @@ -777,7 +777,7 @@ vint32mf2_t test_vwadd_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32mf2_tum( @@ -786,7 +786,7 @@ vint32mf2_t test_vwadd_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_wv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32mf2_tum( @@ -795,7 +795,7 @@ vint32mf2_t test_vwadd_wv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m1_tum( @@ -804,7 +804,7 @@ vint32mf2_t test_vwadd_wx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m1_tum( @@ -813,7 +813,7 @@ vint32m1_t test_vwadd_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m1_tum( @@ -822,7 +822,7 @@ vint32m1_t test_vwadd_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_wv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m1_tum( @@ -831,7 +831,7 @@ vint32m1_t test_vwadd_wv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m2_tum( @@ -840,7 +840,7 @@ vint32m1_t test_vwadd_wx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwadd_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m2_tum( @@ -849,7 +849,7 @@ vint32m2_t test_vwadd_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m2_tum( @@ -858,7 +858,7 @@ vint32m2_t test_vwadd_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwadd_wv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m2_tum( @@ -867,7 +867,7 @@ vint32m2_t test_vwadd_wv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m4_tum( @@ -876,7 +876,7 @@ vint32m2_t test_vwadd_wx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwadd_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m4_tum( @@ -885,7 +885,7 @@ vint32m4_t test_vwadd_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m4_tum( @@ -894,7 +894,7 @@ vint32m4_t test_vwadd_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwadd_wv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m4_tum( @@ -903,7 +903,7 @@ vint32m4_t test_vwadd_wv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m8_tum( @@ -912,7 +912,7 @@ vint32m4_t test_vwadd_wx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwadd_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m8_tum( @@ -921,7 +921,7 @@ vint32m8_t test_vwadd_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m8_tum( @@ -930,7 +930,7 @@ vint32m8_t test_vwadd_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwadd_wv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m8_tum( @@ -939,7 +939,7 @@ vint32m8_t test_vwadd_wv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m1_tum( @@ -948,7 +948,7 @@ vint32m8_t test_vwadd_wx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m1_tum( @@ -957,7 +957,7 @@ vint64m1_t test_vwadd_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m1_tum( @@ -966,7 +966,7 @@ vint64m1_t test_vwadd_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_wv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m1_tum( @@ -975,7 +975,7 @@ vint64m1_t test_vwadd_wv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m2_tum( @@ -984,7 +984,7 @@ vint64m1_t test_vwadd_wx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwadd_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m2_tum( @@ -993,7 +993,7 @@ vint64m2_t test_vwadd_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m2_tum( @@ -1002,7 +1002,7 @@ vint64m2_t test_vwadd_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwadd_wv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m2_tum( @@ -1011,7 +1011,7 @@ vint64m2_t test_vwadd_wv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m4_tum( @@ -1020,7 +1020,7 @@ vint64m2_t test_vwadd_wx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwadd_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m4_tum( @@ -1029,7 +1029,7 @@ vint64m4_t test_vwadd_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m4_tum( @@ -1038,7 +1038,7 @@ vint64m4_t test_vwadd_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwadd_wv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m4_tum( @@ -1047,7 +1047,7 @@ vint64m4_t test_vwadd_wv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m8_tum( @@ -1056,7 +1056,7 @@ vint64m4_t test_vwadd_wx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwadd_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m8_tum( @@ -1065,7 +1065,7 @@ vint64m8_t test_vwadd_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m8_tum( @@ -1074,7 +1074,7 @@ vint64m8_t test_vwadd_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwadd_wv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m8_tum( @@ -1083,7 +1083,7 @@ vint64m8_t test_vwadd_wv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf4_tumu( @@ -1092,7 +1092,7 @@ vint64m8_t test_vwadd_wx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf4_tumu( @@ -1101,7 +1101,7 @@ vint16mf4_t test_vwadd_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf4_tumu( @@ -1110,7 +1110,7 @@ vint16mf4_t test_vwadd_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_wv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf4_tumu( @@ -1119,7 +1119,7 @@ vint16mf4_t test_vwadd_wv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf2_tumu( @@ -1128,7 +1128,7 @@ vint16mf4_t test_vwadd_wx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf2_tumu( @@ -1137,7 +1137,7 @@ vint16mf2_t test_vwadd_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf2_tumu( @@ -1146,7 +1146,7 @@ vint16mf2_t test_vwadd_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_wv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf2_tumu( @@ -1155,7 +1155,7 @@ vint16mf2_t test_vwadd_wv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m1_tumu( @@ -1164,7 +1164,7 @@ vint16mf2_t test_vwadd_wx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m1_tumu( @@ -1173,7 +1173,7 @@ vint16m1_t test_vwadd_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m1_tumu( @@ -1182,7 +1182,7 @@ vint16m1_t test_vwadd_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_wv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m1_tumu( @@ -1191,7 +1191,7 @@ vint16m1_t test_vwadd_wv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m2_tumu( @@ -1200,7 +1200,7 @@ vint16m1_t test_vwadd_wx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwadd_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m2_tumu( @@ -1209,7 +1209,7 @@ vint16m2_t test_vwadd_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m2_tumu( @@ -1218,7 +1218,7 @@ vint16m2_t test_vwadd_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwadd_wv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m2_tumu( @@ -1227,7 +1227,7 @@ vint16m2_t test_vwadd_wv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m4_tumu( @@ -1236,7 +1236,7 @@ vint16m2_t test_vwadd_wx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwadd_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m4_tumu( @@ -1245,7 +1245,7 @@ vint16m4_t test_vwadd_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m4_tumu( @@ -1254,7 +1254,7 @@ vint16m4_t test_vwadd_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwadd_wv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m4_tumu( @@ -1263,7 +1263,7 @@ vint16m4_t test_vwadd_wv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m8_tumu( @@ -1272,7 +1272,7 @@ vint16m4_t test_vwadd_wx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwadd_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m8_tumu( @@ -1281,7 +1281,7 @@ vint16m8_t test_vwadd_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m8_tumu( @@ -1290,7 +1290,7 @@ vint16m8_t test_vwadd_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwadd_wv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m8_tumu( @@ -1299,7 +1299,7 @@ vint16m8_t test_vwadd_wv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32mf2_tumu( @@ -1308,7 +1308,7 @@ vint16m8_t test_vwadd_wx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32mf2_tumu( @@ -1317,7 +1317,7 @@ vint32mf2_t test_vwadd_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32mf2_tumu( @@ -1326,7 +1326,7 @@ vint32mf2_t test_vwadd_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_wv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32mf2_tumu( @@ -1335,7 +1335,7 @@ vint32mf2_t test_vwadd_wv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m1_tumu( @@ -1344,7 +1344,7 @@ vint32mf2_t test_vwadd_wx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m1_tumu( @@ -1353,7 +1353,7 @@ vint32m1_t test_vwadd_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m1_tumu( @@ -1362,7 +1362,7 @@ vint32m1_t test_vwadd_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_wv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m1_tumu( @@ -1371,7 +1371,7 @@ vint32m1_t test_vwadd_wv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m2_tumu( @@ -1380,7 +1380,7 @@ vint32m1_t test_vwadd_wx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwadd_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m2_tumu( @@ -1389,7 +1389,7 @@ vint32m2_t test_vwadd_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m2_tumu( @@ -1398,7 +1398,7 @@ vint32m2_t test_vwadd_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwadd_wv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m2_tumu( @@ -1407,7 +1407,7 @@ vint32m2_t test_vwadd_wv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m4_tumu( @@ -1416,7 +1416,7 @@ vint32m2_t test_vwadd_wx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwadd_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m4_tumu( @@ -1425,7 +1425,7 @@ vint32m4_t test_vwadd_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m4_tumu( @@ -1434,7 +1434,7 @@ vint32m4_t test_vwadd_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwadd_wv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m4_tumu( @@ -1443,7 +1443,7 @@ vint32m4_t test_vwadd_wv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m8_tumu( @@ -1452,7 +1452,7 @@ vint32m4_t test_vwadd_wx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwadd_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m8_tumu( @@ -1461,7 +1461,7 @@ vint32m8_t test_vwadd_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m8_tumu( @@ -1470,7 +1470,7 @@ vint32m8_t test_vwadd_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwadd_wv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m8_tumu( @@ -1479,7 +1479,7 @@ vint32m8_t test_vwadd_wv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m1_tumu( @@ -1488,7 +1488,7 @@ vint32m8_t test_vwadd_wx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m1_tumu( @@ -1497,7 +1497,7 @@ vint64m1_t test_vwadd_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m1_tumu( @@ -1506,7 +1506,7 @@ vint64m1_t test_vwadd_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_wv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m1_tumu( @@ -1515,7 +1515,7 @@ vint64m1_t test_vwadd_wv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m2_tumu( @@ -1524,7 +1524,7 @@ vint64m1_t test_vwadd_wx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwadd_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m2_tumu( @@ -1533,7 +1533,7 @@ vint64m2_t test_vwadd_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m2_tumu( @@ -1542,7 +1542,7 @@ vint64m2_t test_vwadd_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwadd_wv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m2_tumu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vwadd_wv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m4_tumu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vwadd_wx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwadd_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m4_tumu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vwadd_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m4_tumu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vwadd_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwadd_wv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m4_tumu( @@ -1587,7 +1587,7 @@ vint64m4_t test_vwadd_wv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m8_tumu( @@ -1596,7 +1596,7 @@ vint64m4_t test_vwadd_wx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwadd_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m8_tumu( @@ -1605,7 +1605,7 @@ vint64m8_t test_vwadd_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m8_tumu( @@ -1614,7 +1614,7 @@ vint64m8_t test_vwadd_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwadd_wv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m8_tumu( @@ -1623,7 +1623,7 @@ vint64m8_t test_vwadd_wv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf4_mu( @@ -1632,7 +1632,7 @@ vint64m8_t test_vwadd_wx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf4_mu( @@ -1641,7 +1641,7 @@ vint16mf4_t test_vwadd_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf4_mu( @@ -1650,7 +1650,7 @@ vint16mf4_t test_vwadd_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwadd_wv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf4_mu( @@ -1659,7 +1659,7 @@ vint16mf4_t test_vwadd_wv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwadd_wx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16mf2_mu( @@ -1668,7 +1668,7 @@ vint16mf4_t test_vwadd_wx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16mf2_mu( @@ -1677,7 +1677,7 @@ vint16mf2_t test_vwadd_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16mf2_mu( @@ -1686,7 +1686,7 @@ vint16mf2_t test_vwadd_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwadd_wv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16mf2_mu( @@ -1695,7 +1695,7 @@ vint16mf2_t test_vwadd_wv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwadd_wx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m1_mu( @@ -1704,7 +1704,7 @@ vint16mf2_t test_vwadd_wx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m1_mu( @@ -1713,7 +1713,7 @@ vint16m1_t test_vwadd_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m1_mu( @@ -1722,7 +1722,7 @@ vint16m1_t test_vwadd_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwadd_wv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m1_mu( @@ -1731,7 +1731,7 @@ vint16m1_t test_vwadd_wv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwadd_wx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m2_mu( @@ -1740,7 +1740,7 @@ vint16m1_t test_vwadd_wx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwadd_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m2_mu( @@ -1749,7 +1749,7 @@ vint16m2_t test_vwadd_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m2_mu( @@ -1758,7 +1758,7 @@ vint16m2_t test_vwadd_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwadd_wv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m2_mu( @@ -1767,7 +1767,7 @@ vint16m2_t test_vwadd_wv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwadd_wx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m4_mu( @@ -1776,7 +1776,7 @@ vint16m2_t test_vwadd_wx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwadd_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m4_mu( @@ -1785,7 +1785,7 @@ vint16m4_t test_vwadd_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m4_mu( @@ -1794,7 +1794,7 @@ vint16m4_t test_vwadd_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwadd_wv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m4_mu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vwadd_wv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwadd_wx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i16m8_mu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vwadd_wx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwadd_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i16m8_mu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vwadd_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwadd_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i16m8_mu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vwadd_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwadd_wv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i16m8_mu( @@ -1839,7 +1839,7 @@ vint16m8_t test_vwadd_wv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwadd_wx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int8_t op2, size_t vl) { - return vwadd_wx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32mf2_mu( @@ -1848,7 +1848,7 @@ vint16m8_t test_vwadd_wx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32mf2_mu( @@ -1857,7 +1857,7 @@ vint32mf2_t test_vwadd_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32mf2_mu( @@ -1866,7 +1866,7 @@ vint32mf2_t test_vwadd_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwadd_wv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32mf2_mu( @@ -1875,7 +1875,7 @@ vint32mf2_t test_vwadd_wv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwadd_wx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m1_mu( @@ -1884,7 +1884,7 @@ vint32mf2_t test_vwadd_wx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m1_mu( @@ -1893,7 +1893,7 @@ vint32m1_t test_vwadd_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m1_mu( @@ -1902,7 +1902,7 @@ vint32m1_t test_vwadd_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwadd_wv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m1_mu( @@ -1911,7 +1911,7 @@ vint32m1_t test_vwadd_wv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwadd_wx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m2_mu( @@ -1920,7 +1920,7 @@ vint32m1_t test_vwadd_wx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwadd_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m2_mu( @@ -1929,7 +1929,7 @@ vint32m2_t test_vwadd_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m2_mu( @@ -1938,7 +1938,7 @@ vint32m2_t test_vwadd_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwadd_wv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m2_mu( @@ -1947,7 +1947,7 @@ vint32m2_t test_vwadd_wv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwadd_wx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m4_mu( @@ -1956,7 +1956,7 @@ vint32m2_t test_vwadd_wx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwadd_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m4_mu( @@ -1965,7 +1965,7 @@ vint32m4_t test_vwadd_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m4_mu( @@ -1974,7 +1974,7 @@ vint32m4_t test_vwadd_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwadd_wv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m4_mu( @@ -1983,7 +1983,7 @@ vint32m4_t test_vwadd_wv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwadd_wx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i32m8_mu( @@ -1992,7 +1992,7 @@ vint32m4_t test_vwadd_wx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwadd_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i32m8_mu( @@ -2001,7 +2001,7 @@ vint32m8_t test_vwadd_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwadd_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i32m8_mu( @@ -2010,7 +2010,7 @@ vint32m8_t test_vwadd_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwadd_wv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i32m8_mu( @@ -2019,7 +2019,7 @@ vint32m8_t test_vwadd_wv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwadd_wx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int16_t op2, size_t vl) { - return vwadd_wx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m1_mu( @@ -2028,7 +2028,7 @@ vint32m8_t test_vwadd_wx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m1_mu( @@ -2037,7 +2037,7 @@ vint64m1_t test_vwadd_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m1_mu( @@ -2046,7 +2046,7 @@ vint64m1_t test_vwadd_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwadd_wv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m1_mu( @@ -2055,7 +2055,7 @@ vint64m1_t test_vwadd_wv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwadd_wx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m2_mu( @@ -2064,7 +2064,7 @@ vint64m1_t test_vwadd_wx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwadd_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m2_mu( @@ -2073,7 +2073,7 @@ vint64m2_t test_vwadd_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m2_mu( @@ -2082,7 +2082,7 @@ vint64m2_t test_vwadd_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwadd_wv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m2_mu( @@ -2091,7 +2091,7 @@ vint64m2_t test_vwadd_wv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwadd_wx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m4_mu( @@ -2100,7 +2100,7 @@ vint64m2_t test_vwadd_wx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwadd_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m4_mu( @@ -2109,7 +2109,7 @@ vint64m4_t test_vwadd_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m4_mu( @@ -2118,7 +2118,7 @@ vint64m4_t test_vwadd_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwadd_wv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m4_mu( @@ -2127,7 +2127,7 @@ vint64m4_t test_vwadd_wv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwadd_wx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vv_i64m8_mu( @@ -2136,7 +2136,7 @@ vint64m4_t test_vwadd_wx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwadd_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_vx_i64m8_mu( @@ -2145,7 +2145,7 @@ vint64m8_t test_vwadd_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwadd_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wv_i64m8_mu( @@ -2154,7 +2154,7 @@ vint64m8_t test_vwadd_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwadd_wv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwadd_wx_i64m8_mu( @@ -2163,6 +2163,6 @@ vint64m8_t test_vwadd_wv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwadd_wx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int32_t op2, size_t vl) { - return vwadd_wx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwadd_wx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwaddu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwaddu.c index 2ce489f7c644fc724adf4c57751f4ea7231934d2..42e2ac7af0ef49dff09b5b873b6e94786eaf15eb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwaddu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwaddu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf4_tu( @@ -21,7 +21,7 @@ vuint16mf4_t test_vwaddu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf4_tu( @@ -30,7 +30,7 @@ vuint16mf4_t test_vwaddu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_wv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf4_tu( @@ -39,7 +39,7 @@ vuint16mf4_t test_vwaddu_wv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf2_tu( @@ -48,7 +48,7 @@ vuint16mf4_t test_vwaddu_wx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf2_tu( @@ -57,7 +57,7 @@ vuint16mf2_t test_vwaddu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf2_tu( @@ -66,7 +66,7 @@ vuint16mf2_t test_vwaddu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_wv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf2_tu( @@ -75,7 +75,7 @@ vuint16mf2_t test_vwaddu_wv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m1_tu( @@ -84,7 +84,7 @@ vuint16mf2_t test_vwaddu_wx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m1_tu( @@ -93,7 +93,7 @@ vuint16m1_t test_vwaddu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m1_tu( @@ -102,7 +102,7 @@ vuint16m1_t test_vwaddu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_wv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m1_tu( @@ -111,7 +111,7 @@ vuint16m1_t test_vwaddu_wv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m2_tu( @@ -120,7 +120,7 @@ vuint16m1_t test_vwaddu_wx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m2_tu( @@ -129,7 +129,7 @@ vuint16m2_t test_vwaddu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m2_tu( @@ -138,7 +138,7 @@ vuint16m2_t test_vwaddu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_wv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m2_tu( @@ -147,7 +147,7 @@ vuint16m2_t test_vwaddu_wv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m4_tu( @@ -156,7 +156,7 @@ vuint16m2_t test_vwaddu_wx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m4_tu( @@ -165,7 +165,7 @@ vuint16m4_t test_vwaddu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m4_tu( @@ -174,7 +174,7 @@ vuint16m4_t test_vwaddu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_wv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m4_tu( @@ -183,7 +183,7 @@ vuint16m4_t test_vwaddu_wv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m8_tu( @@ -192,7 +192,7 @@ vuint16m4_t test_vwaddu_wx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m8_tu( @@ -201,7 +201,7 @@ vuint16m8_t test_vwaddu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m8_tu( @@ -210,7 +210,7 @@ vuint16m8_t test_vwaddu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_wv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m8_tu( @@ -219,7 +219,7 @@ vuint16m8_t test_vwaddu_wv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32mf2_tu( @@ -228,7 +228,7 @@ vuint16m8_t test_vwaddu_wx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32mf2_tu( @@ -237,7 +237,7 @@ vuint32mf2_t test_vwaddu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint32mf2_t test_vwaddu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_wv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vwaddu_wv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vwaddu_wx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vwaddu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m1_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vwaddu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_wv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m1_tu( @@ -291,7 +291,7 @@ vuint32m1_t test_vwaddu_wv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m2_tu( @@ -300,7 +300,7 @@ vuint32m1_t test_vwaddu_wx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m2_tu( @@ -309,7 +309,7 @@ vuint32m2_t test_vwaddu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m2_tu( @@ -318,7 +318,7 @@ vuint32m2_t test_vwaddu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_wv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m2_tu( @@ -327,7 +327,7 @@ vuint32m2_t test_vwaddu_wv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m4_tu( @@ -336,7 +336,7 @@ vuint32m2_t test_vwaddu_wx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m4_tu( @@ -345,7 +345,7 @@ vuint32m4_t test_vwaddu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m4_tu( @@ -354,7 +354,7 @@ vuint32m4_t test_vwaddu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_wv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m4_tu( @@ -363,7 +363,7 @@ vuint32m4_t test_vwaddu_wv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m8_tu( @@ -372,7 +372,7 @@ vuint32m4_t test_vwaddu_wx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m8_tu( @@ -381,7 +381,7 @@ vuint32m8_t test_vwaddu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m8_tu( @@ -390,7 +390,7 @@ vuint32m8_t test_vwaddu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_wv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m8_tu( @@ -399,7 +399,7 @@ vuint32m8_t test_vwaddu_wv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m1_tu( @@ -408,7 +408,7 @@ vuint32m8_t test_vwaddu_wx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m1_tu( @@ -417,7 +417,7 @@ vuint64m1_t test_vwaddu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m1_tu( @@ -426,7 +426,7 @@ vuint64m1_t test_vwaddu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_wv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m1_tu( @@ -435,7 +435,7 @@ vuint64m1_t test_vwaddu_wv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m2_tu( @@ -444,7 +444,7 @@ vuint64m1_t test_vwaddu_wx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m2_tu( @@ -453,7 +453,7 @@ vuint64m2_t test_vwaddu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m2_tu( @@ -462,7 +462,7 @@ vuint64m2_t test_vwaddu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_wv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m2_tu( @@ -471,7 +471,7 @@ vuint64m2_t test_vwaddu_wv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m4_tu( @@ -480,7 +480,7 @@ vuint64m2_t test_vwaddu_wx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m4_tu( @@ -489,7 +489,7 @@ vuint64m4_t test_vwaddu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m4_tu( @@ -498,7 +498,7 @@ vuint64m4_t test_vwaddu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_wv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m4_tu( @@ -507,7 +507,7 @@ vuint64m4_t test_vwaddu_wv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m8_tu( @@ -516,7 +516,7 @@ vuint64m4_t test_vwaddu_wx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m8_tu( @@ -525,7 +525,7 @@ vuint64m8_t test_vwaddu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m8_tu( @@ -534,7 +534,7 @@ vuint64m8_t test_vwaddu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_wv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m8_tu( @@ -543,7 +543,7 @@ vuint64m8_t test_vwaddu_wv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf4_tum( @@ -552,7 +552,7 @@ vuint64m8_t test_vwaddu_wx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf4_tum( @@ -561,7 +561,7 @@ vuint16mf4_t test_vwaddu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf4_tum( @@ -570,7 +570,7 @@ vuint16mf4_t test_vwaddu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_wv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf4_tum( @@ -579,7 +579,7 @@ vuint16mf4_t test_vwaddu_wv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf2_tum( @@ -588,7 +588,7 @@ vuint16mf4_t test_vwaddu_wx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf2_tum( @@ -597,7 +597,7 @@ vuint16mf2_t test_vwaddu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf2_tum( @@ -606,7 +606,7 @@ vuint16mf2_t test_vwaddu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_wv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf2_tum( @@ -615,7 +615,7 @@ vuint16mf2_t test_vwaddu_wv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m1_tum( @@ -624,7 +624,7 @@ vuint16mf2_t test_vwaddu_wx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m1_tum( @@ -633,7 +633,7 @@ vuint16m1_t test_vwaddu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m1_tum( @@ -642,7 +642,7 @@ vuint16m1_t test_vwaddu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_wv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m1_tum( @@ -651,7 +651,7 @@ vuint16m1_t test_vwaddu_wv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m2_tum( @@ -660,7 +660,7 @@ vuint16m1_t test_vwaddu_wx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m2_tum( @@ -669,7 +669,7 @@ vuint16m2_t test_vwaddu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m2_tum( @@ -678,7 +678,7 @@ vuint16m2_t test_vwaddu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_wv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m2_tum( @@ -687,7 +687,7 @@ vuint16m2_t test_vwaddu_wv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m4_tum( @@ -696,7 +696,7 @@ vuint16m2_t test_vwaddu_wx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m4_tum( @@ -705,7 +705,7 @@ vuint16m4_t test_vwaddu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m4_tum( @@ -714,7 +714,7 @@ vuint16m4_t test_vwaddu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_wv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m4_tum( @@ -723,7 +723,7 @@ vuint16m4_t test_vwaddu_wv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m8_tum( @@ -732,7 +732,7 @@ vuint16m4_t test_vwaddu_wx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m8_tum( @@ -741,7 +741,7 @@ vuint16m8_t test_vwaddu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m8_tum( @@ -750,7 +750,7 @@ vuint16m8_t test_vwaddu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_wv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m8_tum( @@ -759,7 +759,7 @@ vuint16m8_t test_vwaddu_wv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32mf2_tum( @@ -768,7 +768,7 @@ vuint16m8_t test_vwaddu_wx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32mf2_tum( @@ -777,7 +777,7 @@ vuint32mf2_t test_vwaddu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32mf2_tum( @@ -786,7 +786,7 @@ vuint32mf2_t test_vwaddu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_wv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32mf2_tum( @@ -795,7 +795,7 @@ vuint32mf2_t test_vwaddu_wv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m1_tum( @@ -804,7 +804,7 @@ vuint32mf2_t test_vwaddu_wx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m1_tum( @@ -813,7 +813,7 @@ vuint32m1_t test_vwaddu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m1_tum( @@ -822,7 +822,7 @@ vuint32m1_t test_vwaddu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_wv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m1_tum( @@ -831,7 +831,7 @@ vuint32m1_t test_vwaddu_wv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m2_tum( @@ -840,7 +840,7 @@ vuint32m1_t test_vwaddu_wx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m2_tum( @@ -849,7 +849,7 @@ vuint32m2_t test_vwaddu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m2_tum( @@ -858,7 +858,7 @@ vuint32m2_t test_vwaddu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_wv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m2_tum( @@ -867,7 +867,7 @@ vuint32m2_t test_vwaddu_wv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m4_tum( @@ -876,7 +876,7 @@ vuint32m2_t test_vwaddu_wx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m4_tum( @@ -885,7 +885,7 @@ vuint32m4_t test_vwaddu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m4_tum( @@ -894,7 +894,7 @@ vuint32m4_t test_vwaddu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_wv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m4_tum( @@ -903,7 +903,7 @@ vuint32m4_t test_vwaddu_wv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m8_tum( @@ -912,7 +912,7 @@ vuint32m4_t test_vwaddu_wx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m8_tum( @@ -921,7 +921,7 @@ vuint32m8_t test_vwaddu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m8_tum( @@ -930,7 +930,7 @@ vuint32m8_t test_vwaddu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_wv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m8_tum( @@ -939,7 +939,7 @@ vuint32m8_t test_vwaddu_wv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m1_tum( @@ -948,7 +948,7 @@ vuint32m8_t test_vwaddu_wx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m1_tum( @@ -957,7 +957,7 @@ vuint64m1_t test_vwaddu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m1_tum( @@ -966,7 +966,7 @@ vuint64m1_t test_vwaddu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_wv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m1_tum( @@ -975,7 +975,7 @@ vuint64m1_t test_vwaddu_wv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m2_tum( @@ -984,7 +984,7 @@ vuint64m1_t test_vwaddu_wx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m2_tum( @@ -993,7 +993,7 @@ vuint64m2_t test_vwaddu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m2_tum( @@ -1002,7 +1002,7 @@ vuint64m2_t test_vwaddu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_wv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m2_tum( @@ -1011,7 +1011,7 @@ vuint64m2_t test_vwaddu_wv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m4_tum( @@ -1020,7 +1020,7 @@ vuint64m2_t test_vwaddu_wx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m4_tum( @@ -1029,7 +1029,7 @@ vuint64m4_t test_vwaddu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m4_tum( @@ -1038,7 +1038,7 @@ vuint64m4_t test_vwaddu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_wv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m4_tum( @@ -1047,7 +1047,7 @@ vuint64m4_t test_vwaddu_wv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m8_tum( @@ -1056,7 +1056,7 @@ vuint64m4_t test_vwaddu_wx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m8_tum( @@ -1065,7 +1065,7 @@ vuint64m8_t test_vwaddu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m8_tum( @@ -1074,7 +1074,7 @@ vuint64m8_t test_vwaddu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_wv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m8_tum( @@ -1083,7 +1083,7 @@ vuint64m8_t test_vwaddu_wv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf4_tumu( @@ -1092,7 +1092,7 @@ vuint64m8_t test_vwaddu_wx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf4_tumu( @@ -1101,7 +1101,7 @@ vuint16mf4_t test_vwaddu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf4_tumu( @@ -1110,7 +1110,7 @@ vuint16mf4_t test_vwaddu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_wv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf4_tumu( @@ -1119,7 +1119,7 @@ vuint16mf4_t test_vwaddu_wv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf2_tumu( @@ -1128,7 +1128,7 @@ vuint16mf4_t test_vwaddu_wx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf2_tumu( @@ -1137,7 +1137,7 @@ vuint16mf2_t test_vwaddu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf2_tumu( @@ -1146,7 +1146,7 @@ vuint16mf2_t test_vwaddu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_wv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf2_tumu( @@ -1155,7 +1155,7 @@ vuint16mf2_t test_vwaddu_wv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m1_tumu( @@ -1164,7 +1164,7 @@ vuint16mf2_t test_vwaddu_wx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m1_tumu( @@ -1173,7 +1173,7 @@ vuint16m1_t test_vwaddu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m1_tumu( @@ -1182,7 +1182,7 @@ vuint16m1_t test_vwaddu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_wv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m1_tumu( @@ -1191,7 +1191,7 @@ vuint16m1_t test_vwaddu_wv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m2_tumu( @@ -1200,7 +1200,7 @@ vuint16m1_t test_vwaddu_wx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m2_tumu( @@ -1209,7 +1209,7 @@ vuint16m2_t test_vwaddu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m2_tumu( @@ -1218,7 +1218,7 @@ vuint16m2_t test_vwaddu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_wv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m2_tumu( @@ -1227,7 +1227,7 @@ vuint16m2_t test_vwaddu_wv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m4_tumu( @@ -1236,7 +1236,7 @@ vuint16m2_t test_vwaddu_wx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m4_tumu( @@ -1245,7 +1245,7 @@ vuint16m4_t test_vwaddu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m4_tumu( @@ -1254,7 +1254,7 @@ vuint16m4_t test_vwaddu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_wv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m4_tumu( @@ -1263,7 +1263,7 @@ vuint16m4_t test_vwaddu_wv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m8_tumu( @@ -1272,7 +1272,7 @@ vuint16m4_t test_vwaddu_wx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m8_tumu( @@ -1281,7 +1281,7 @@ vuint16m8_t test_vwaddu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m8_tumu( @@ -1290,7 +1290,7 @@ vuint16m8_t test_vwaddu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_wv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m8_tumu( @@ -1299,7 +1299,7 @@ vuint16m8_t test_vwaddu_wv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32mf2_tumu( @@ -1308,7 +1308,7 @@ vuint16m8_t test_vwaddu_wx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32mf2_tumu( @@ -1317,7 +1317,7 @@ vuint32mf2_t test_vwaddu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32mf2_tumu( @@ -1326,7 +1326,7 @@ vuint32mf2_t test_vwaddu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_wv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32mf2_tumu( @@ -1335,7 +1335,7 @@ vuint32mf2_t test_vwaddu_wv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m1_tumu( @@ -1344,7 +1344,7 @@ vuint32mf2_t test_vwaddu_wx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m1_tumu( @@ -1353,7 +1353,7 @@ vuint32m1_t test_vwaddu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m1_tumu( @@ -1362,7 +1362,7 @@ vuint32m1_t test_vwaddu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_wv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m1_tumu( @@ -1371,7 +1371,7 @@ vuint32m1_t test_vwaddu_wv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m2_tumu( @@ -1380,7 +1380,7 @@ vuint32m1_t test_vwaddu_wx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m2_tumu( @@ -1389,7 +1389,7 @@ vuint32m2_t test_vwaddu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m2_tumu( @@ -1398,7 +1398,7 @@ vuint32m2_t test_vwaddu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_wv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m2_tumu( @@ -1407,7 +1407,7 @@ vuint32m2_t test_vwaddu_wv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m4_tumu( @@ -1416,7 +1416,7 @@ vuint32m2_t test_vwaddu_wx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m4_tumu( @@ -1425,7 +1425,7 @@ vuint32m4_t test_vwaddu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m4_tumu( @@ -1434,7 +1434,7 @@ vuint32m4_t test_vwaddu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_wv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m4_tumu( @@ -1443,7 +1443,7 @@ vuint32m4_t test_vwaddu_wv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m8_tumu( @@ -1452,7 +1452,7 @@ vuint32m4_t test_vwaddu_wx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m8_tumu( @@ -1461,7 +1461,7 @@ vuint32m8_t test_vwaddu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m8_tumu( @@ -1470,7 +1470,7 @@ vuint32m8_t test_vwaddu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_wv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m8_tumu( @@ -1479,7 +1479,7 @@ vuint32m8_t test_vwaddu_wv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m1_tumu( @@ -1488,7 +1488,7 @@ vuint32m8_t test_vwaddu_wx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m1_tumu( @@ -1497,7 +1497,7 @@ vuint64m1_t test_vwaddu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m1_tumu( @@ -1506,7 +1506,7 @@ vuint64m1_t test_vwaddu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_wv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m1_tumu( @@ -1515,7 +1515,7 @@ vuint64m1_t test_vwaddu_wv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m2_tumu( @@ -1524,7 +1524,7 @@ vuint64m1_t test_vwaddu_wx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m2_tumu( @@ -1533,7 +1533,7 @@ vuint64m2_t test_vwaddu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m2_tumu( @@ -1542,7 +1542,7 @@ vuint64m2_t test_vwaddu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_wv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m2_tumu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vwaddu_wv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m4_tumu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vwaddu_wx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m4_tumu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vwaddu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m4_tumu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vwaddu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_wv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m4_tumu( @@ -1587,7 +1587,7 @@ vuint64m4_t test_vwaddu_wv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m8_tumu( @@ -1596,7 +1596,7 @@ vuint64m4_t test_vwaddu_wx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m8_tumu( @@ -1605,7 +1605,7 @@ vuint64m8_t test_vwaddu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m8_tumu( @@ -1614,7 +1614,7 @@ vuint64m8_t test_vwaddu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_wv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m8_tumu( @@ -1623,7 +1623,7 @@ vuint64m8_t test_vwaddu_wv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf4_mu( @@ -1632,7 +1632,7 @@ vuint64m8_t test_vwaddu_wx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf4_mu( @@ -1641,7 +1641,7 @@ vuint16mf4_t test_vwaddu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf4_mu( @@ -1650,7 +1650,7 @@ vuint16mf4_t test_vwaddu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwaddu_wv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf4_mu( @@ -1659,7 +1659,7 @@ vuint16mf4_t test_vwaddu_wv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwaddu_wx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16mf2_mu( @@ -1668,7 +1668,7 @@ vuint16mf4_t test_vwaddu_wx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16mf2_mu( @@ -1677,7 +1677,7 @@ vuint16mf2_t test_vwaddu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16mf2_mu( @@ -1686,7 +1686,7 @@ vuint16mf2_t test_vwaddu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwaddu_wv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16mf2_mu( @@ -1695,7 +1695,7 @@ vuint16mf2_t test_vwaddu_wv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwaddu_wx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m1_mu( @@ -1704,7 +1704,7 @@ vuint16mf2_t test_vwaddu_wx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m1_mu( @@ -1713,7 +1713,7 @@ vuint16m1_t test_vwaddu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m1_mu( @@ -1722,7 +1722,7 @@ vuint16m1_t test_vwaddu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwaddu_wv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m1_mu( @@ -1731,7 +1731,7 @@ vuint16m1_t test_vwaddu_wv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwaddu_wx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m2_mu( @@ -1740,7 +1740,7 @@ vuint16m1_t test_vwaddu_wx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m2_mu( @@ -1749,7 +1749,7 @@ vuint16m2_t test_vwaddu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m2_mu( @@ -1758,7 +1758,7 @@ vuint16m2_t test_vwaddu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwaddu_wv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m2_mu( @@ -1767,7 +1767,7 @@ vuint16m2_t test_vwaddu_wv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwaddu_wx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m4_mu( @@ -1776,7 +1776,7 @@ vuint16m2_t test_vwaddu_wx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m4_mu( @@ -1785,7 +1785,7 @@ vuint16m4_t test_vwaddu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m4_mu( @@ -1794,7 +1794,7 @@ vuint16m4_t test_vwaddu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwaddu_wv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m4_mu( @@ -1803,7 +1803,7 @@ vuint16m4_t test_vwaddu_wv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwaddu_wx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u16m8_mu( @@ -1812,7 +1812,7 @@ vuint16m4_t test_vwaddu_wx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u16m8_mu( @@ -1821,7 +1821,7 @@ vuint16m8_t test_vwaddu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwaddu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u16m8_mu( @@ -1830,7 +1830,7 @@ vuint16m8_t test_vwaddu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwaddu_wv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u16m8_mu( @@ -1839,7 +1839,7 @@ vuint16m8_t test_vwaddu_wv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwaddu_wx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwaddu_wx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32mf2_mu( @@ -1848,7 +1848,7 @@ vuint16m8_t test_vwaddu_wx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32mf2_mu( @@ -1857,7 +1857,7 @@ vuint32mf2_t test_vwaddu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32mf2_mu( @@ -1866,7 +1866,7 @@ vuint32mf2_t test_vwaddu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwaddu_wv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32mf2_mu( @@ -1875,7 +1875,7 @@ vuint32mf2_t test_vwaddu_wv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwaddu_wx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m1_mu( @@ -1884,7 +1884,7 @@ vuint32mf2_t test_vwaddu_wx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m1_mu( @@ -1893,7 +1893,7 @@ vuint32m1_t test_vwaddu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m1_mu( @@ -1902,7 +1902,7 @@ vuint32m1_t test_vwaddu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwaddu_wv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m1_mu( @@ -1911,7 +1911,7 @@ vuint32m1_t test_vwaddu_wv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwaddu_wx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m2_mu( @@ -1920,7 +1920,7 @@ vuint32m1_t test_vwaddu_wx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m2_mu( @@ -1929,7 +1929,7 @@ vuint32m2_t test_vwaddu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m2_mu( @@ -1938,7 +1938,7 @@ vuint32m2_t test_vwaddu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwaddu_wv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m2_mu( @@ -1947,7 +1947,7 @@ vuint32m2_t test_vwaddu_wv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwaddu_wx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m4_mu( @@ -1956,7 +1956,7 @@ vuint32m2_t test_vwaddu_wx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m4_mu( @@ -1965,7 +1965,7 @@ vuint32m4_t test_vwaddu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m4_mu( @@ -1974,7 +1974,7 @@ vuint32m4_t test_vwaddu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwaddu_wv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m4_mu( @@ -1983,7 +1983,7 @@ vuint32m4_t test_vwaddu_wv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwaddu_wx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u32m8_mu( @@ -1992,7 +1992,7 @@ vuint32m4_t test_vwaddu_wx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u32m8_mu( @@ -2001,7 +2001,7 @@ vuint32m8_t test_vwaddu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwaddu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u32m8_mu( @@ -2010,7 +2010,7 @@ vuint32m8_t test_vwaddu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwaddu_wv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u32m8_mu( @@ -2019,7 +2019,7 @@ vuint32m8_t test_vwaddu_wv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwaddu_wx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwaddu_wx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m1_mu( @@ -2028,7 +2028,7 @@ vuint32m8_t test_vwaddu_wx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m1_mu( @@ -2037,7 +2037,7 @@ vuint64m1_t test_vwaddu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m1_mu( @@ -2046,7 +2046,7 @@ vuint64m1_t test_vwaddu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwaddu_wv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m1_mu( @@ -2055,7 +2055,7 @@ vuint64m1_t test_vwaddu_wv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwaddu_wx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m2_mu( @@ -2064,7 +2064,7 @@ vuint64m1_t test_vwaddu_wx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m2_mu( @@ -2073,7 +2073,7 @@ vuint64m2_t test_vwaddu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m2_mu( @@ -2082,7 +2082,7 @@ vuint64m2_t test_vwaddu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwaddu_wv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m2_mu( @@ -2091,7 +2091,7 @@ vuint64m2_t test_vwaddu_wv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwaddu_wx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m4_mu( @@ -2100,7 +2100,7 @@ vuint64m2_t test_vwaddu_wx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m4_mu( @@ -2109,7 +2109,7 @@ vuint64m4_t test_vwaddu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m4_mu( @@ -2118,7 +2118,7 @@ vuint64m4_t test_vwaddu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwaddu_wv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m4_mu( @@ -2127,7 +2127,7 @@ vuint64m4_t test_vwaddu_wv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwaddu_wx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vv_u64m8_mu( @@ -2136,7 +2136,7 @@ vuint64m4_t test_vwaddu_wx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_vx_u64m8_mu( @@ -2145,7 +2145,7 @@ vuint64m8_t test_vwaddu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwaddu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wv_u64m8_mu( @@ -2154,7 +2154,7 @@ vuint64m8_t test_vwaddu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwaddu_wv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwaddu_wx_u64m8_mu( @@ -2163,6 +2163,6 @@ vuint64m8_t test_vwaddu_wv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwaddu_wx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwaddu_wx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwaddu_wx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwcvt.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwcvt.c index dbc85ca2bc2bc9b1750d8b2bcf963f6263d9a449..578b15dcabdad110732f55d7577c7c352f67867a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwcvt.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwcvt.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwcvt_x_x_v_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t src, size_t vl) { - return vwcvt_x_x_v_i16mf4_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf2_tu( @@ -21,7 +21,7 @@ vint16mf4_t test_vwcvt_x_x_v_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwcvt_x_x_v_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t src, size_t vl) { - return vwcvt_x_x_v_i16mf2_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m1_tu( @@ -30,7 +30,7 @@ vint16mf2_t test_vwcvt_x_x_v_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwcvt_x_x_v_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t src, size_t vl) { - return vwcvt_x_x_v_i16m1_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m2_tu( @@ -39,7 +39,7 @@ vint16m1_t test_vwcvt_x_x_v_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwcvt_x_x_v_i16m2_tu(vint16m2_t maskedoff, vint8m1_t src, size_t vl) { - return vwcvt_x_x_v_i16m2_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m4_tu( @@ -48,7 +48,7 @@ vint16m2_t test_vwcvt_x_x_v_i16m2_tu(vint16m2_t maskedoff, vint8m1_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwcvt_x_x_v_i16m4_tu(vint16m4_t maskedoff, vint8m2_t src, size_t vl) { - return vwcvt_x_x_v_i16m4_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m8_tu( @@ -57,7 +57,7 @@ vint16m4_t test_vwcvt_x_x_v_i16m4_tu(vint16m4_t maskedoff, vint8m2_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwcvt_x_x_v_i16m8_tu(vint16m8_t maskedoff, vint8m4_t src, size_t vl) { - return vwcvt_x_x_v_i16m8_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32mf2_tu( @@ -66,7 +66,7 @@ vint16m8_t test_vwcvt_x_x_v_i16m8_tu(vint16m8_t maskedoff, vint8m4_t src, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwcvt_x_x_v_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t src, size_t vl) { - return vwcvt_x_x_v_i32mf2_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m1_tu( @@ -75,7 +75,7 @@ vint32mf2_t test_vwcvt_x_x_v_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwcvt_x_x_v_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t src, size_t vl) { - return vwcvt_x_x_v_i32m1_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m2_tu( @@ -84,7 +84,7 @@ vint32m1_t test_vwcvt_x_x_v_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwcvt_x_x_v_i32m2_tu(vint32m2_t maskedoff, vint16m1_t src, size_t vl) { - return vwcvt_x_x_v_i32m2_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m4_tu( @@ -93,7 +93,7 @@ vint32m2_t test_vwcvt_x_x_v_i32m2_tu(vint32m2_t maskedoff, vint16m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwcvt_x_x_v_i32m4_tu(vint32m4_t maskedoff, vint16m2_t src, size_t vl) { - return vwcvt_x_x_v_i32m4_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m8_tu( @@ -102,7 +102,7 @@ vint32m4_t test_vwcvt_x_x_v_i32m4_tu(vint32m4_t maskedoff, vint16m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwcvt_x_x_v_i32m8_tu(vint32m8_t maskedoff, vint16m4_t src, size_t vl) { - return vwcvt_x_x_v_i32m8_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m1_tu( @@ -111,7 +111,7 @@ vint32m8_t test_vwcvt_x_x_v_i32m8_tu(vint32m8_t maskedoff, vint16m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwcvt_x_x_v_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t src, size_t vl) { - return vwcvt_x_x_v_i64m1_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m2_tu( @@ -120,7 +120,7 @@ vint64m1_t test_vwcvt_x_x_v_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t src, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwcvt_x_x_v_i64m2_tu(vint64m2_t maskedoff, vint32m1_t src, size_t vl) { - return vwcvt_x_x_v_i64m2_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m4_tu( @@ -129,7 +129,7 @@ vint64m2_t test_vwcvt_x_x_v_i64m2_tu(vint64m2_t maskedoff, vint32m1_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwcvt_x_x_v_i64m4_tu(vint64m4_t maskedoff, vint32m2_t src, size_t vl) { - return vwcvt_x_x_v_i64m4_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m8_tu( @@ -138,7 +138,7 @@ vint64m4_t test_vwcvt_x_x_v_i64m4_tu(vint64m4_t maskedoff, vint32m2_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwcvt_x_x_v_i64m8_tu(vint64m8_t maskedoff, vint32m4_t src, size_t vl) { - return vwcvt_x_x_v_i64m8_tu(maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf4_tum( @@ -147,7 +147,7 @@ vint64m8_t test_vwcvt_x_x_v_i64m8_tu(vint64m8_t maskedoff, vint32m4_t src, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwcvt_x_x_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t src, size_t vl) { - return vwcvt_x_x_v_i16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf2_tum( @@ -156,7 +156,7 @@ vint16mf4_t test_vwcvt_x_x_v_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwcvt_x_x_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t src, size_t vl) { - return vwcvt_x_x_v_i16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m1_tum( @@ -165,7 +165,7 @@ vint16mf2_t test_vwcvt_x_x_v_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwcvt_x_x_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t src, size_t vl) { - return vwcvt_x_x_v_i16m1_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m2_tum( @@ -174,7 +174,7 @@ vint16m1_t test_vwcvt_x_x_v_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwcvt_x_x_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t src, size_t vl) { - return vwcvt_x_x_v_i16m2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m4_tum( @@ -183,7 +183,7 @@ vint16m2_t test_vwcvt_x_x_v_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwcvt_x_x_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t src, size_t vl) { - return vwcvt_x_x_v_i16m4_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m8_tum( @@ -192,7 +192,7 @@ vint16m4_t test_vwcvt_x_x_v_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwcvt_x_x_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t src, size_t vl) { - return vwcvt_x_x_v_i16m8_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32mf2_tum( @@ -201,7 +201,7 @@ vint16m8_t test_vwcvt_x_x_v_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwcvt_x_x_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t src, size_t vl) { - return vwcvt_x_x_v_i32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m1_tum( @@ -210,7 +210,7 @@ vint32mf2_t test_vwcvt_x_x_v_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwcvt_x_x_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t src, size_t vl) { - return vwcvt_x_x_v_i32m1_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m2_tum( @@ -219,7 +219,7 @@ vint32m1_t test_vwcvt_x_x_v_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwcvt_x_x_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t src, size_t vl) { - return vwcvt_x_x_v_i32m2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m4_tum( @@ -228,7 +228,7 @@ vint32m2_t test_vwcvt_x_x_v_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwcvt_x_x_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t src, size_t vl) { - return vwcvt_x_x_v_i32m4_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m8_tum( @@ -237,7 +237,7 @@ vint32m4_t test_vwcvt_x_x_v_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwcvt_x_x_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t src, size_t vl) { - return vwcvt_x_x_v_i32m8_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m1_tum( @@ -246,7 +246,7 @@ vint32m8_t test_vwcvt_x_x_v_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwcvt_x_x_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t src, size_t vl) { - return vwcvt_x_x_v_i64m1_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m2_tum( @@ -255,7 +255,7 @@ vint64m1_t test_vwcvt_x_x_v_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwcvt_x_x_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t src, size_t vl) { - return vwcvt_x_x_v_i64m2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m4_tum( @@ -264,7 +264,7 @@ vint64m2_t test_vwcvt_x_x_v_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwcvt_x_x_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t src, size_t vl) { - return vwcvt_x_x_v_i64m4_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m8_tum( @@ -273,7 +273,7 @@ vint64m4_t test_vwcvt_x_x_v_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwcvt_x_x_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t src, size_t vl) { - return vwcvt_x_x_v_i64m8_tum(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf4_tumu( @@ -282,7 +282,7 @@ vint64m8_t test_vwcvt_x_x_v_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwcvt_x_x_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t src, size_t vl) { - return vwcvt_x_x_v_i16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf2_tumu( @@ -291,7 +291,7 @@ vint16mf4_t test_vwcvt_x_x_v_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwcvt_x_x_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t src, size_t vl) { - return vwcvt_x_x_v_i16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m1_tumu( @@ -300,7 +300,7 @@ vint16mf2_t test_vwcvt_x_x_v_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwcvt_x_x_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t src, size_t vl) { - return vwcvt_x_x_v_i16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m2_tumu( @@ -309,7 +309,7 @@ vint16m1_t test_vwcvt_x_x_v_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwcvt_x_x_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t src, size_t vl) { - return vwcvt_x_x_v_i16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m4_tumu( @@ -318,7 +318,7 @@ vint16m2_t test_vwcvt_x_x_v_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwcvt_x_x_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t src, size_t vl) { - return vwcvt_x_x_v_i16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m8_tumu( @@ -327,7 +327,7 @@ vint16m4_t test_vwcvt_x_x_v_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwcvt_x_x_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t src, size_t vl) { - return vwcvt_x_x_v_i16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32mf2_tumu( @@ -336,7 +336,7 @@ vint16m8_t test_vwcvt_x_x_v_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwcvt_x_x_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t src, size_t vl) { - return vwcvt_x_x_v_i32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m1_tumu( @@ -345,7 +345,7 @@ vint32mf2_t test_vwcvt_x_x_v_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwcvt_x_x_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t src, size_t vl) { - return vwcvt_x_x_v_i32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m2_tumu( @@ -354,7 +354,7 @@ vint32m1_t test_vwcvt_x_x_v_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwcvt_x_x_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t src, size_t vl) { - return vwcvt_x_x_v_i32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m4_tumu( @@ -363,7 +363,7 @@ vint32m2_t test_vwcvt_x_x_v_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwcvt_x_x_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t src, size_t vl) { - return vwcvt_x_x_v_i32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m8_tumu( @@ -372,7 +372,7 @@ vint32m4_t test_vwcvt_x_x_v_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwcvt_x_x_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t src, size_t vl) { - return vwcvt_x_x_v_i32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m1_tumu( @@ -381,7 +381,7 @@ vint32m8_t test_vwcvt_x_x_v_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwcvt_x_x_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t src, size_t vl) { - return vwcvt_x_x_v_i64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m2_tumu( @@ -390,7 +390,7 @@ vint64m1_t test_vwcvt_x_x_v_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwcvt_x_x_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t src, size_t vl) { - return vwcvt_x_x_v_i64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m4_tumu( @@ -399,7 +399,7 @@ vint64m2_t test_vwcvt_x_x_v_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwcvt_x_x_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t src, size_t vl) { - return vwcvt_x_x_v_i64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m8_tumu( @@ -408,7 +408,7 @@ vint64m4_t test_vwcvt_x_x_v_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwcvt_x_x_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t src, size_t vl) { - return vwcvt_x_x_v_i64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf4_mu( @@ -417,7 +417,7 @@ vint64m8_t test_vwcvt_x_x_v_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwcvt_x_x_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t src, size_t vl) { - return vwcvt_x_x_v_i16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16mf2_mu( @@ -426,7 +426,7 @@ vint16mf4_t test_vwcvt_x_x_v_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwcvt_x_x_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t src, size_t vl) { - return vwcvt_x_x_v_i16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m1_mu( @@ -435,7 +435,7 @@ vint16mf2_t test_vwcvt_x_x_v_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwcvt_x_x_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t src, size_t vl) { - return vwcvt_x_x_v_i16m1_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m2_mu( @@ -444,7 +444,7 @@ vint16m1_t test_vwcvt_x_x_v_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwcvt_x_x_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t src, size_t vl) { - return vwcvt_x_x_v_i16m2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m4_mu( @@ -453,7 +453,7 @@ vint16m2_t test_vwcvt_x_x_v_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwcvt_x_x_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t src, size_t vl) { - return vwcvt_x_x_v_i16m4_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i16m8_mu( @@ -462,7 +462,7 @@ vint16m4_t test_vwcvt_x_x_v_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwcvt_x_x_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t src, size_t vl) { - return vwcvt_x_x_v_i16m8_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32mf2_mu( @@ -471,7 +471,7 @@ vint16m8_t test_vwcvt_x_x_v_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwcvt_x_x_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t src, size_t vl) { - return vwcvt_x_x_v_i32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m1_mu( @@ -480,7 +480,7 @@ vint32mf2_t test_vwcvt_x_x_v_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwcvt_x_x_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t src, size_t vl) { - return vwcvt_x_x_v_i32m1_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m2_mu( @@ -489,7 +489,7 @@ vint32m1_t test_vwcvt_x_x_v_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwcvt_x_x_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t src, size_t vl) { - return vwcvt_x_x_v_i32m2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m4_mu( @@ -498,7 +498,7 @@ vint32m2_t test_vwcvt_x_x_v_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwcvt_x_x_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t src, size_t vl) { - return vwcvt_x_x_v_i32m4_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i32m8_mu( @@ -507,7 +507,7 @@ vint32m4_t test_vwcvt_x_x_v_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwcvt_x_x_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t src, size_t vl) { - return vwcvt_x_x_v_i32m8_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m1_mu( @@ -516,7 +516,7 @@ vint32m8_t test_vwcvt_x_x_v_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwcvt_x_x_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t src, size_t vl) { - return vwcvt_x_x_v_i64m1_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m2_mu( @@ -525,7 +525,7 @@ vint64m1_t test_vwcvt_x_x_v_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwcvt_x_x_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t src, size_t vl) { - return vwcvt_x_x_v_i64m2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m4_mu( @@ -534,7 +534,7 @@ vint64m2_t test_vwcvt_x_x_v_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwcvt_x_x_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t src, size_t vl) { - return vwcvt_x_x_v_i64m4_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvt_x_x_v_i64m8_mu( @@ -543,6 +543,6 @@ vint64m4_t test_vwcvt_x_x_v_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwcvt_x_x_v_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t src, size_t vl) { - return vwcvt_x_x_v_i64m8_mu(mask, maskedoff, src, vl); + return __riscv_vwcvt_x_x_v_i64m8_mu(mask, maskedoff, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwcvtu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwcvtu.c index c564320e602eec2b61db4ae1c68bf7e9688b5ba6..ac4f2340401318195327eddeb2372bfd0364b47b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwcvtu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwcvtu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf4_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf2_tu( @@ -21,7 +21,7 @@ vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf2_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m1_tu( @@ -30,7 +30,7 @@ vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t src // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwcvtu_x_x_v_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m1_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m2_tu( @@ -39,7 +39,7 @@ vuint16m1_t test_vwcvtu_x_x_v_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwcvtu_x_x_v_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t src, size_t vl) { - return vwcvtu_x_x_v_u16m2_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m4_tu( @@ -48,7 +48,7 @@ vuint16m2_t test_vwcvtu_x_x_v_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwcvtu_x_x_v_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m4_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m8_tu( @@ -57,7 +57,7 @@ vuint16m4_t test_vwcvtu_x_x_v_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwcvtu_x_x_v_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t src, size_t vl) { - return vwcvtu_x_x_v_u16m8_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32mf2_tu( @@ -66,7 +66,7 @@ vuint16m8_t test_vwcvtu_x_x_v_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t src, si // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u32mf2_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32mf2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m1_tu( @@ -75,7 +75,7 @@ vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t sr // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwcvtu_x_x_v_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m1_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m2_tu( @@ -84,7 +84,7 @@ vuint32m1_t test_vwcvtu_x_x_v_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwcvtu_x_x_v_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t src, size_t vl) { - return vwcvtu_x_x_v_u32m2_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m4_tu( @@ -93,7 +93,7 @@ vuint32m2_t test_vwcvtu_x_x_v_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwcvtu_x_x_v_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m4_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m8_tu( @@ -102,7 +102,7 @@ vuint32m4_t test_vwcvtu_x_x_v_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwcvtu_x_x_v_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t src, size_t vl) { - return vwcvtu_x_x_v_u32m8_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m1_tu( @@ -111,7 +111,7 @@ vuint32m8_t test_vwcvtu_x_x_v_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwcvtu_x_x_v_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m1_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m1_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m2_tu( @@ -120,7 +120,7 @@ vuint64m1_t test_vwcvtu_x_x_v_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t src, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwcvtu_x_x_v_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t src, size_t vl) { - return vwcvtu_x_x_v_u64m2_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m2_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m4_tu( @@ -129,7 +129,7 @@ vuint64m2_t test_vwcvtu_x_x_v_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwcvtu_x_x_v_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m4_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m4_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m8_tu( @@ -138,7 +138,7 @@ vuint64m4_t test_vwcvtu_x_x_v_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwcvtu_x_x_v_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t src, size_t vl) { - return vwcvtu_x_x_v_u64m8_tu(maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m8_tu(maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf4_tum( @@ -147,7 +147,7 @@ vuint64m8_t test_vwcvtu_x_x_v_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t src, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf4_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf2_tum( @@ -156,7 +156,7 @@ vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m1_tum( @@ -165,7 +165,7 @@ vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwcvtu_x_x_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m1_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m2_tum( @@ -174,7 +174,7 @@ vuint16m1_t test_vwcvtu_x_x_v_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwcvtu_x_x_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t src, size_t vl) { - return vwcvtu_x_x_v_u16m2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m4_tum( @@ -183,7 +183,7 @@ vuint16m2_t test_vwcvtu_x_x_v_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwcvtu_x_x_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m4_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m8_tum( @@ -192,7 +192,7 @@ vuint16m4_t test_vwcvtu_x_x_v_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwcvtu_x_x_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t src, size_t vl) { - return vwcvtu_x_x_v_u16m8_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32mf2_tum( @@ -201,7 +201,7 @@ vuint16m8_t test_vwcvtu_x_x_v_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u32mf2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32mf2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m1_tum( @@ -210,7 +210,7 @@ vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwcvtu_x_x_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m1_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m2_tum( @@ -219,7 +219,7 @@ vuint32m1_t test_vwcvtu_x_x_v_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwcvtu_x_x_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t src, size_t vl) { - return vwcvtu_x_x_v_u32m2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m4_tum( @@ -228,7 +228,7 @@ vuint32m2_t test_vwcvtu_x_x_v_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwcvtu_x_x_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m4_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m8_tum( @@ -237,7 +237,7 @@ vuint32m4_t test_vwcvtu_x_x_v_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwcvtu_x_x_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t src, size_t vl) { - return vwcvtu_x_x_v_u32m8_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m1_tum( @@ -246,7 +246,7 @@ vuint32m8_t test_vwcvtu_x_x_v_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwcvtu_x_x_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m1_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m1_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m2_tum( @@ -255,7 +255,7 @@ vuint64m1_t test_vwcvtu_x_x_v_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwcvtu_x_x_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t src, size_t vl) { - return vwcvtu_x_x_v_u64m2_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m2_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m4_tum( @@ -264,7 +264,7 @@ vuint64m2_t test_vwcvtu_x_x_v_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwcvtu_x_x_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m4_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m4_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m8_tum( @@ -273,7 +273,7 @@ vuint64m4_t test_vwcvtu_x_x_v_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwcvtu_x_x_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t src, size_t vl) { - return vwcvtu_x_x_v_u64m8_tum(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m8_tum(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf4_tumu( @@ -282,7 +282,7 @@ vuint64m8_t test_vwcvtu_x_x_v_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf4_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf2_tumu( @@ -291,7 +291,7 @@ vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m1_tumu( @@ -300,7 +300,7 @@ vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwcvtu_x_x_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m1_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m2_tumu( @@ -309,7 +309,7 @@ vuint16m1_t test_vwcvtu_x_x_v_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwcvtu_x_x_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t src, size_t vl) { - return vwcvtu_x_x_v_u16m2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m4_tumu( @@ -318,7 +318,7 @@ vuint16m2_t test_vwcvtu_x_x_v_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwcvtu_x_x_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m4_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m8_tumu( @@ -327,7 +327,7 @@ vuint16m4_t test_vwcvtu_x_x_v_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwcvtu_x_x_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t src, size_t vl) { - return vwcvtu_x_x_v_u16m8_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32mf2_tumu( @@ -336,7 +336,7 @@ vuint16m8_t test_vwcvtu_x_x_v_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u32mf2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32mf2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m1_tumu( @@ -345,7 +345,7 @@ vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwcvtu_x_x_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m1_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m2_tumu( @@ -354,7 +354,7 @@ vuint32m1_t test_vwcvtu_x_x_v_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwcvtu_x_x_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t src, size_t vl) { - return vwcvtu_x_x_v_u32m2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m4_tumu( @@ -363,7 +363,7 @@ vuint32m2_t test_vwcvtu_x_x_v_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwcvtu_x_x_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m4_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m8_tumu( @@ -372,7 +372,7 @@ vuint32m4_t test_vwcvtu_x_x_v_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwcvtu_x_x_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t src, size_t vl) { - return vwcvtu_x_x_v_u32m8_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m1_tumu( @@ -381,7 +381,7 @@ vuint32m8_t test_vwcvtu_x_x_v_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwcvtu_x_x_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m1_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m1_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m2_tumu( @@ -390,7 +390,7 @@ vuint64m1_t test_vwcvtu_x_x_v_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwcvtu_x_x_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t src, size_t vl) { - return vwcvtu_x_x_v_u64m2_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m2_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m4_tumu( @@ -399,7 +399,7 @@ vuint64m2_t test_vwcvtu_x_x_v_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwcvtu_x_x_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m4_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m4_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m8_tumu( @@ -408,7 +408,7 @@ vuint64m4_t test_vwcvtu_x_x_v_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwcvtu_x_x_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t src, size_t vl) { - return vwcvtu_x_x_v_u64m8_tumu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m8_tumu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf4_mu( @@ -417,7 +417,7 @@ vuint64m8_t test_vwcvtu_x_x_v_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf4_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16mf2_mu( @@ -426,7 +426,7 @@ vuint16mf4_t test_vwcvtu_x_x_v_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u16mf2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m1_mu( @@ -435,7 +435,7 @@ vuint16mf2_t test_vwcvtu_x_x_v_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwcvtu_x_x_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m1_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m2_mu( @@ -444,7 +444,7 @@ vuint16m1_t test_vwcvtu_x_x_v_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwcvtu_x_x_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t src, size_t vl) { - return vwcvtu_x_x_v_u16m2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m4_mu( @@ -453,7 +453,7 @@ vuint16m2_t test_vwcvtu_x_x_v_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwcvtu_x_x_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t src, size_t vl) { - return vwcvtu_x_x_v_u16m4_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u16m8_mu( @@ -462,7 +462,7 @@ vuint16m4_t test_vwcvtu_x_x_v_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwcvtu_x_x_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t src, size_t vl) { - return vwcvtu_x_x_v_u16m8_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u16m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32mf2_mu( @@ -471,7 +471,7 @@ vuint16m8_t test_vwcvtu_x_x_v_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t src, size_t vl) { - return vwcvtu_x_x_v_u32mf2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32mf2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m1_mu( @@ -480,7 +480,7 @@ vuint32mf2_t test_vwcvtu_x_x_v_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwcvtu_x_x_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m1_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m2_mu( @@ -489,7 +489,7 @@ vuint32m1_t test_vwcvtu_x_x_v_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwcvtu_x_x_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t src, size_t vl) { - return vwcvtu_x_x_v_u32m2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m4_mu( @@ -498,7 +498,7 @@ vuint32m2_t test_vwcvtu_x_x_v_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwcvtu_x_x_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t src, size_t vl) { - return vwcvtu_x_x_v_u32m4_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u32m8_mu( @@ -507,7 +507,7 @@ vuint32m4_t test_vwcvtu_x_x_v_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwcvtu_x_x_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t src, size_t vl) { - return vwcvtu_x_x_v_u32m8_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u32m8_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m1_mu( @@ -516,7 +516,7 @@ vuint32m8_t test_vwcvtu_x_x_v_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwcvtu_x_x_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m1_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m1_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m2_mu( @@ -525,7 +525,7 @@ vuint64m1_t test_vwcvtu_x_x_v_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwcvtu_x_x_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t src, size_t vl) { - return vwcvtu_x_x_v_u64m2_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m2_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m4_mu( @@ -534,7 +534,7 @@ vuint64m2_t test_vwcvtu_x_x_v_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwcvtu_x_x_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t src, size_t vl) { - return vwcvtu_x_x_v_u64m4_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m4_mu(mask, maskedoff, src, vl); } // CHECK-RV64-LABEL: @test_vwcvtu_x_x_v_u64m8_mu( @@ -543,6 +543,6 @@ vuint64m4_t test_vwcvtu_x_x_v_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwcvtu_x_x_v_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t src, size_t vl) { - return vwcvtu_x_x_v_u64m8_mu(mask, maskedoff, src, vl); + return __riscv_vwcvtu_x_x_v_u64m8_mu(mask, maskedoff, src, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmacc.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmacc.c index cec2f1e694fb0b7bf249d9a545400a6b76101bba..bcb652e3df241dc566805da7e06bb47fa2cf0bb1 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmacc.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmacc.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vv_i16mf4_tu(vint16mf4_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vv_i16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf4_tu( @@ -22,7 +22,7 @@ vint16mf4_t test_vwmacc_vv_i16mf4_tu(vint16mf4_t vd, vint8mf8_t vs1, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vx_i16mf4_tu(vint16mf4_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vx_i16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf2_tu( @@ -31,7 +31,7 @@ vint16mf4_t test_vwmacc_vx_i16mf4_tu(vint16mf4_t vd, int8_t rs1, vint8mf8_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vv_i16mf2_tu(vint16mf2_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vv_i16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf2_tu( @@ -40,7 +40,7 @@ vint16mf2_t test_vwmacc_vv_i16mf2_tu(vint16mf2_t vd, vint8mf4_t vs1, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vx_i16mf2_tu(vint16mf2_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vx_i16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m1_tu( @@ -49,7 +49,7 @@ vint16mf2_t test_vwmacc_vx_i16mf2_tu(vint16mf2_t vd, int8_t rs1, vint8mf4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vv_i16m1_tu(vint16m1_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vv_i16m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m1_tu( @@ -58,7 +58,7 @@ vint16m1_t test_vwmacc_vv_i16m1_tu(vint16m1_t vd, vint8mf2_t vs1, vint8mf2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vx_i16m1_tu(vint16m1_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vx_i16m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m2_tu( @@ -67,7 +67,7 @@ vint16m1_t test_vwmacc_vx_i16m1_tu(vint16m1_t vd, int8_t rs1, vint8mf2_t vs2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vv_i16m2_tu(vint16m2_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vv_i16m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m2_tu( @@ -76,7 +76,7 @@ vint16m2_t test_vwmacc_vv_i16m2_tu(vint16m2_t vd, vint8m1_t vs1, vint8m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vx_i16m2_tu(vint16m2_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vx_i16m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m4_tu( @@ -85,7 +85,7 @@ vint16m2_t test_vwmacc_vx_i16m2_tu(vint16m2_t vd, int8_t rs1, vint8m1_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vv_i16m4_tu(vint16m4_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vv_i16m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m4_tu( @@ -94,7 +94,7 @@ vint16m4_t test_vwmacc_vv_i16m4_tu(vint16m4_t vd, vint8m2_t vs1, vint8m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vx_i16m4_tu(vint16m4_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vx_i16m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m8_tu( @@ -103,7 +103,7 @@ vint16m4_t test_vwmacc_vx_i16m4_tu(vint16m4_t vd, int8_t rs1, vint8m2_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vv_i16m8_tu(vint16m8_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vv_i16m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m8_tu( @@ -112,7 +112,7 @@ vint16m8_t test_vwmacc_vv_i16m8_tu(vint16m8_t vd, vint8m4_t vs1, vint8m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vx_i16m8_tu(vint16m8_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vx_i16m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32mf2_tu( @@ -121,7 +121,7 @@ vint16m8_t test_vwmacc_vx_i16m8_tu(vint16m8_t vd, int8_t rs1, vint8m4_t vs2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vv_i32mf2_tu(vint32mf2_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vv_i32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32mf2_tu( @@ -130,7 +130,7 @@ vint32mf2_t test_vwmacc_vv_i32mf2_tu(vint32mf2_t vd, vint16mf4_t vs1, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vx_i32mf2_tu(vint32mf2_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vx_i32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m1_tu( @@ -139,7 +139,7 @@ vint32mf2_t test_vwmacc_vx_i32mf2_tu(vint32mf2_t vd, int16_t rs1, vint16mf4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vv_i32m1_tu(vint32m1_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vv_i32m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m1_tu( @@ -148,7 +148,7 @@ vint32m1_t test_vwmacc_vv_i32m1_tu(vint32m1_t vd, vint16mf2_t vs1, vint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vx_i32m1_tu(vint32m1_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vx_i32m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m2_tu( @@ -157,7 +157,7 @@ vint32m1_t test_vwmacc_vx_i32m1_tu(vint32m1_t vd, int16_t rs1, vint16mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vv_i32m2_tu(vint32m2_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vv_i32m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m2_tu( @@ -166,7 +166,7 @@ vint32m2_t test_vwmacc_vv_i32m2_tu(vint32m2_t vd, vint16m1_t vs1, vint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vx_i32m2_tu(vint32m2_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vx_i32m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m4_tu( @@ -175,7 +175,7 @@ vint32m2_t test_vwmacc_vx_i32m2_tu(vint32m2_t vd, int16_t rs1, vint16m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vv_i32m4_tu(vint32m4_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vv_i32m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m4_tu( @@ -184,7 +184,7 @@ vint32m4_t test_vwmacc_vv_i32m4_tu(vint32m4_t vd, vint16m2_t vs1, vint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vx_i32m4_tu(vint32m4_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vx_i32m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m8_tu( @@ -193,7 +193,7 @@ vint32m4_t test_vwmacc_vx_i32m4_tu(vint32m4_t vd, int16_t rs1, vint16m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vv_i32m8_tu(vint32m8_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vv_i32m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m8_tu( @@ -202,7 +202,7 @@ vint32m8_t test_vwmacc_vv_i32m8_tu(vint32m8_t vd, vint16m4_t vs1, vint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vx_i32m8_tu(vint32m8_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vx_i32m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m1_tu( @@ -211,7 +211,7 @@ vint32m8_t test_vwmacc_vx_i32m8_tu(vint32m8_t vd, int16_t rs1, vint16m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vv_i64m1_tu(vint64m1_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vv_i64m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m1_tu( @@ -220,7 +220,7 @@ vint64m1_t test_vwmacc_vv_i64m1_tu(vint64m1_t vd, vint32mf2_t vs1, vint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vx_i64m1_tu(vint64m1_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vx_i64m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m2_tu( @@ -229,7 +229,7 @@ vint64m1_t test_vwmacc_vx_i64m1_tu(vint64m1_t vd, int32_t rs1, vint32mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vv_i64m2_tu(vint64m2_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vv_i64m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m2_tu( @@ -238,7 +238,7 @@ vint64m2_t test_vwmacc_vv_i64m2_tu(vint64m2_t vd, vint32m1_t vs1, vint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vx_i64m2_tu(vint64m2_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vx_i64m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m4_tu( @@ -247,7 +247,7 @@ vint64m2_t test_vwmacc_vx_i64m2_tu(vint64m2_t vd, int32_t rs1, vint32m1_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vv_i64m4_tu(vint64m4_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vv_i64m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m4_tu( @@ -256,7 +256,7 @@ vint64m4_t test_vwmacc_vv_i64m4_tu(vint64m4_t vd, vint32m2_t vs1, vint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vx_i64m4_tu(vint64m4_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vx_i64m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m8_tu( @@ -265,7 +265,7 @@ vint64m4_t test_vwmacc_vx_i64m4_tu(vint64m4_t vd, int32_t rs1, vint32m2_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vv_i64m8_tu(vint64m8_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vv_i64m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m8_tu( @@ -274,7 +274,7 @@ vint64m8_t test_vwmacc_vv_i64m8_tu(vint64m8_t vd, vint32m4_t vs1, vint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vx_i64m8_tu(vint64m8_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vx_i64m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf4_tum( @@ -283,7 +283,7 @@ vint64m8_t test_vwmacc_vx_i64m8_tu(vint64m8_t vd, int32_t rs1, vint32m4_t vs2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf4_tum( @@ -292,7 +292,7 @@ vint16mf4_t test_vwmacc_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf2_tum( @@ -301,7 +301,7 @@ vint16mf4_t test_vwmacc_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf2_tum( @@ -310,7 +310,7 @@ vint16mf2_t test_vwmacc_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m1_tum( @@ -319,7 +319,7 @@ vint16mf2_t test_vwmacc_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vv_i16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m1_tum( @@ -328,7 +328,7 @@ vint16m1_t test_vwmacc_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vx_i16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m2_tum( @@ -337,7 +337,7 @@ vint16m1_t test_vwmacc_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vv_i16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m2_tum( @@ -346,7 +346,7 @@ vint16m2_t test_vwmacc_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vx_i16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m4_tum( @@ -355,7 +355,7 @@ vint16m2_t test_vwmacc_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vv_i16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m4_tum( @@ -364,7 +364,7 @@ vint16m4_t test_vwmacc_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vx_i16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m8_tum( @@ -373,7 +373,7 @@ vint16m4_t test_vwmacc_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vv_i16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m8_tum( @@ -382,7 +382,7 @@ vint16m8_t test_vwmacc_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vx_i16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32mf2_tum( @@ -391,7 +391,7 @@ vint16m8_t test_vwmacc_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32mf2_tum( @@ -400,7 +400,7 @@ vint32mf2_t test_vwmacc_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m1_tum( @@ -409,7 +409,7 @@ vint32mf2_t test_vwmacc_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vv_i32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m1_tum( @@ -418,7 +418,7 @@ vint32m1_t test_vwmacc_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint16mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vx_i32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m2_tum( @@ -427,7 +427,7 @@ vint32m1_t test_vwmacc_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vv_i32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m2_tum( @@ -436,7 +436,7 @@ vint32m2_t test_vwmacc_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint16m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vx_i32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m4_tum( @@ -445,7 +445,7 @@ vint32m2_t test_vwmacc_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vv_i32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m4_tum( @@ -454,7 +454,7 @@ vint32m4_t test_vwmacc_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vx_i32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m8_tum( @@ -463,7 +463,7 @@ vint32m4_t test_vwmacc_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vv_i32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m8_tum( @@ -472,7 +472,7 @@ vint32m8_t test_vwmacc_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vx_i32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m1_tum( @@ -481,7 +481,7 @@ vint32m8_t test_vwmacc_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vv_i64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m1_tum( @@ -490,7 +490,7 @@ vint64m1_t test_vwmacc_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint32mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vx_i64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m2_tum( @@ -499,7 +499,7 @@ vint64m1_t test_vwmacc_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vv_i64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m2_tum( @@ -508,7 +508,7 @@ vint64m2_t test_vwmacc_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint32m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vx_i64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m4_tum( @@ -517,7 +517,7 @@ vint64m2_t test_vwmacc_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vv_i64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m4_tum( @@ -526,7 +526,7 @@ vint64m4_t test_vwmacc_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint32m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vx_i64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m8_tum( @@ -535,7 +535,7 @@ vint64m4_t test_vwmacc_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vv_i64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m8_tum( @@ -544,7 +544,7 @@ vint64m8_t test_vwmacc_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vx_i64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf4_tumu( @@ -553,7 +553,7 @@ vint64m8_t test_vwmacc_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf4_tumu( @@ -562,7 +562,7 @@ vint16mf4_t test_vwmacc_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf2_tumu( @@ -571,7 +571,7 @@ vint16mf4_t test_vwmacc_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf2_tumu( @@ -580,7 +580,7 @@ vint16mf2_t test_vwmacc_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m1_tumu( @@ -589,7 +589,7 @@ vint16mf2_t test_vwmacc_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m1_tumu( @@ -598,7 +598,7 @@ vint16m1_t test_vwmacc_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m2_tumu( @@ -607,7 +607,7 @@ vint16m1_t test_vwmacc_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m2_tumu( @@ -616,7 +616,7 @@ vint16m2_t test_vwmacc_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m4_tumu( @@ -625,7 +625,7 @@ vint16m2_t test_vwmacc_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m4_tumu( @@ -634,7 +634,7 @@ vint16m4_t test_vwmacc_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m8_tumu( @@ -643,7 +643,7 @@ vint16m4_t test_vwmacc_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m8_tumu( @@ -652,7 +652,7 @@ vint16m8_t test_vwmacc_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32mf2_tumu( @@ -661,7 +661,7 @@ vint16m8_t test_vwmacc_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32mf2_tumu( @@ -670,7 +670,7 @@ vint32mf2_t test_vwmacc_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m1_tumu( @@ -679,7 +679,7 @@ vint32mf2_t test_vwmacc_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m1_tumu( @@ -688,7 +688,7 @@ vint32m1_t test_vwmacc_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m2_tumu( @@ -697,7 +697,7 @@ vint32m1_t test_vwmacc_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m2_tumu( @@ -706,7 +706,7 @@ vint32m2_t test_vwmacc_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m4_tumu( @@ -715,7 +715,7 @@ vint32m2_t test_vwmacc_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m4_tumu( @@ -724,7 +724,7 @@ vint32m4_t test_vwmacc_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m8_tumu( @@ -733,7 +733,7 @@ vint32m4_t test_vwmacc_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m8_tumu( @@ -742,7 +742,7 @@ vint32m8_t test_vwmacc_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m1_tumu( @@ -751,7 +751,7 @@ vint32m8_t test_vwmacc_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m1_tumu( @@ -760,7 +760,7 @@ vint64m1_t test_vwmacc_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m2_tumu( @@ -769,7 +769,7 @@ vint64m1_t test_vwmacc_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m2_tumu( @@ -778,7 +778,7 @@ vint64m2_t test_vwmacc_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m4_tumu( @@ -787,7 +787,7 @@ vint64m2_t test_vwmacc_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m4_tumu( @@ -796,7 +796,7 @@ vint64m4_t test_vwmacc_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m8_tumu( @@ -805,7 +805,7 @@ vint64m4_t test_vwmacc_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m8_tumu( @@ -814,7 +814,7 @@ vint64m8_t test_vwmacc_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf4_mu( @@ -823,7 +823,7 @@ vint64m8_t test_vwmacc_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint8mf8_t vs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf4_mu( @@ -832,7 +832,7 @@ vint16mf4_t test_vwmacc_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmacc_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmacc_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16mf2_mu( @@ -841,7 +841,7 @@ vint16mf4_t test_vwmacc_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint8mf4_t vs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16mf2_mu( @@ -850,7 +850,7 @@ vint16mf2_t test_vwmacc_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmacc_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmacc_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m1_mu( @@ -859,7 +859,7 @@ vint16mf2_t test_vwmacc_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vv_i16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m1_mu( @@ -868,7 +868,7 @@ vint16m1_t test_vwmacc_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmacc_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmacc_vx_i16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m2_mu( @@ -877,7 +877,7 @@ vint16m1_t test_vwmacc_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int8_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vv_i16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m2_mu( @@ -886,7 +886,7 @@ vint16m2_t test_vwmacc_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmacc_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmacc_vx_i16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m4_mu( @@ -895,7 +895,7 @@ vint16m2_t test_vwmacc_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vv_i16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m4_mu( @@ -904,7 +904,7 @@ vint16m4_t test_vwmacc_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmacc_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmacc_vx_i16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i16m8_mu( @@ -913,7 +913,7 @@ vint16m4_t test_vwmacc_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vv_i16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i16m8_mu( @@ -922,7 +922,7 @@ vint16m8_t test_vwmacc_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmacc_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmacc_vx_i16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32mf2_mu( @@ -931,7 +931,7 @@ vint16m8_t test_vwmacc_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int8_t rs1, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint16mf4_t vs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32mf2_mu( @@ -940,7 +940,7 @@ vint32mf2_t test_vwmacc_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmacc_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmacc_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m1_mu( @@ -949,7 +949,7 @@ vint32mf2_t test_vwmacc_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vv_i32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m1_mu( @@ -958,7 +958,7 @@ vint32m1_t test_vwmacc_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmacc_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmacc_vx_i32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m2_mu( @@ -967,7 +967,7 @@ vint32m1_t test_vwmacc_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vv_i32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m2_mu( @@ -976,7 +976,7 @@ vint32m2_t test_vwmacc_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmacc_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmacc_vx_i32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m4_mu( @@ -985,7 +985,7 @@ vint32m2_t test_vwmacc_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int16_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vv_i32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m4_mu( @@ -994,7 +994,7 @@ vint32m4_t test_vwmacc_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmacc_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmacc_vx_i32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i32m8_mu( @@ -1003,7 +1003,7 @@ vint32m4_t test_vwmacc_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vv_i32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i32m8_mu( @@ -1012,7 +1012,7 @@ vint32m8_t test_vwmacc_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmacc_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmacc_vx_i32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m1_mu( @@ -1021,7 +1021,7 @@ vint32m8_t test_vwmacc_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int16_t rs1, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vv_i64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m1_mu( @@ -1030,7 +1030,7 @@ vint64m1_t test_vwmacc_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmacc_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmacc_vx_i64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m2_mu( @@ -1039,7 +1039,7 @@ vint64m1_t test_vwmacc_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vv_i64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m2_mu( @@ -1048,7 +1048,7 @@ vint64m2_t test_vwmacc_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmacc_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmacc_vx_i64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m4_mu( @@ -1057,7 +1057,7 @@ vint64m2_t test_vwmacc_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vv_i64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m4_mu( @@ -1066,7 +1066,7 @@ vint64m4_t test_vwmacc_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmacc_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmacc_vx_i64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vv_i64m8_mu( @@ -1075,7 +1075,7 @@ vint64m4_t test_vwmacc_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int32_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vv_i64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmacc_vv_i64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmacc_vx_i64m8_mu( @@ -1084,6 +1084,6 @@ vint64m8_t test_vwmacc_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmacc_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmacc_vx_i64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmacc_vx_i64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccsu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccsu.c index 6272ebb6b2b38128f8e853e7a569aa7130b73068..dcf59e00720902c80259ec905de3cf63cdf829b7 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccsu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccsu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vv_i16mf4_tu(vint16mf4_t vd, vint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf4_tu( @@ -22,7 +22,7 @@ vint16mf4_t test_vwmaccsu_vv_i16mf4_tu(vint16mf4_t vd, vint8mf8_t vs1, vuint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vx_i16mf4_tu(vint16mf4_t vd, int8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf2_tu( @@ -31,7 +31,7 @@ vint16mf4_t test_vwmaccsu_vx_i16mf4_tu(vint16mf4_t vd, int8_t rs1, vuint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vv_i16mf2_tu(vint16mf2_t vd, vint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf2_tu( @@ -40,7 +40,7 @@ vint16mf2_t test_vwmaccsu_vv_i16mf2_tu(vint16mf2_t vd, vint8mf4_t vs1, vuint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vx_i16mf2_tu(vint16mf2_t vd, int8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m1_tu( @@ -49,7 +49,7 @@ vint16mf2_t test_vwmaccsu_vx_i16mf2_tu(vint16mf2_t vd, int8_t rs1, vuint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vv_i16m1_tu(vint16m1_t vd, vint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m1_tu( @@ -58,7 +58,7 @@ vint16m1_t test_vwmaccsu_vv_i16m1_tu(vint16m1_t vd, vint8mf2_t vs1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vx_i16m1_tu(vint16m1_t vd, int8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m2_tu( @@ -67,7 +67,7 @@ vint16m1_t test_vwmaccsu_vx_i16m1_tu(vint16m1_t vd, int8_t rs1, vuint8mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vv_i16m2_tu(vint16m2_t vd, vint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vv_i16m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m2_tu( @@ -76,7 +76,7 @@ vint16m2_t test_vwmaccsu_vv_i16m2_tu(vint16m2_t vd, vint8m1_t vs1, vuint8m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vx_i16m2_tu(vint16m2_t vd, int8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vx_i16m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m4_tu( @@ -85,7 +85,7 @@ vint16m2_t test_vwmaccsu_vx_i16m2_tu(vint16m2_t vd, int8_t rs1, vuint8m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vv_i16m4_tu(vint16m4_t vd, vint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m4_tu( @@ -94,7 +94,7 @@ vint16m4_t test_vwmaccsu_vv_i16m4_tu(vint16m4_t vd, vint8m2_t vs1, vuint8m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vx_i16m4_tu(vint16m4_t vd, int8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m8_tu( @@ -103,7 +103,7 @@ vint16m4_t test_vwmaccsu_vx_i16m4_tu(vint16m4_t vd, int8_t rs1, vuint8m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vv_i16m8_tu(vint16m8_t vd, vint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vv_i16m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m8_tu( @@ -112,7 +112,7 @@ vint16m8_t test_vwmaccsu_vv_i16m8_tu(vint16m8_t vd, vint8m4_t vs1, vuint8m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vx_i16m8_tu(vint16m8_t vd, int8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vx_i16m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32mf2_tu( @@ -121,7 +121,7 @@ vint16m8_t test_vwmaccsu_vx_i16m8_tu(vint16m8_t vd, int8_t rs1, vuint8m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vv_i32mf2_tu(vint32mf2_t vd, vint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32mf2_tu( @@ -130,7 +130,7 @@ vint32mf2_t test_vwmaccsu_vv_i32mf2_tu(vint32mf2_t vd, vint16mf4_t vs1, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vx_i32mf2_tu(vint32mf2_t vd, int16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m1_tu( @@ -139,7 +139,7 @@ vint32mf2_t test_vwmaccsu_vx_i32mf2_tu(vint32mf2_t vd, int16_t rs1, vuint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vv_i32m1_tu(vint32m1_t vd, vint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m1_tu( @@ -148,7 +148,7 @@ vint32m1_t test_vwmaccsu_vv_i32m1_tu(vint32m1_t vd, vint16mf2_t vs1, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vx_i32m1_tu(vint32m1_t vd, int16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m2_tu( @@ -157,7 +157,7 @@ vint32m1_t test_vwmaccsu_vx_i32m1_tu(vint32m1_t vd, int16_t rs1, vuint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vv_i32m2_tu(vint32m2_t vd, vint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vv_i32m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m2_tu( @@ -166,7 +166,7 @@ vint32m2_t test_vwmaccsu_vv_i32m2_tu(vint32m2_t vd, vint16m1_t vs1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vx_i32m2_tu(vint32m2_t vd, int16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vx_i32m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m4_tu( @@ -175,7 +175,7 @@ vint32m2_t test_vwmaccsu_vx_i32m2_tu(vint32m2_t vd, int16_t rs1, vuint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vv_i32m4_tu(vint32m4_t vd, vint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m4_tu( @@ -184,7 +184,7 @@ vint32m4_t test_vwmaccsu_vv_i32m4_tu(vint32m4_t vd, vint16m2_t vs1, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vx_i32m4_tu(vint32m4_t vd, int16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m8_tu( @@ -193,7 +193,7 @@ vint32m4_t test_vwmaccsu_vx_i32m4_tu(vint32m4_t vd, int16_t rs1, vuint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vv_i32m8_tu(vint32m8_t vd, vint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vv_i32m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m8_tu( @@ -202,7 +202,7 @@ vint32m8_t test_vwmaccsu_vv_i32m8_tu(vint32m8_t vd, vint16m4_t vs1, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vx_i32m8_tu(vint32m8_t vd, int16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vx_i32m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m1_tu( @@ -211,7 +211,7 @@ vint32m8_t test_vwmaccsu_vx_i32m8_tu(vint32m8_t vd, int16_t rs1, vuint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vv_i64m1_tu(vint64m1_t vd, vint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m1_tu( @@ -220,7 +220,7 @@ vint64m1_t test_vwmaccsu_vv_i64m1_tu(vint64m1_t vd, vint32mf2_t vs1, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vx_i64m1_tu(vint64m1_t vd, int32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m2_tu( @@ -229,7 +229,7 @@ vint64m1_t test_vwmaccsu_vx_i64m1_tu(vint64m1_t vd, int32_t rs1, vuint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vv_i64m2_tu(vint64m2_t vd, vint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vv_i64m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m2_tu( @@ -238,7 +238,7 @@ vint64m2_t test_vwmaccsu_vv_i64m2_tu(vint64m2_t vd, vint32m1_t vs1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vx_i64m2_tu(vint64m2_t vd, int32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vx_i64m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m4_tu( @@ -247,7 +247,7 @@ vint64m2_t test_vwmaccsu_vx_i64m2_tu(vint64m2_t vd, int32_t rs1, vuint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vv_i64m4_tu(vint64m4_t vd, vint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m4_tu( @@ -256,7 +256,7 @@ vint64m4_t test_vwmaccsu_vv_i64m4_tu(vint64m4_t vd, vint32m2_t vs1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vx_i64m4_tu(vint64m4_t vd, int32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m8_tu( @@ -265,7 +265,7 @@ vint64m4_t test_vwmaccsu_vx_i64m4_tu(vint64m4_t vd, int32_t rs1, vuint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vv_i64m8_tu(vint64m8_t vd, vint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vv_i64m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m8_tu( @@ -274,7 +274,7 @@ vint64m8_t test_vwmaccsu_vv_i64m8_tu(vint64m8_t vd, vint32m4_t vs1, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vx_i64m8_tu(vint64m8_t vd, int32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vx_i64m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf4_tum( @@ -283,7 +283,7 @@ vint64m8_t test_vwmaccsu_vx_i64m8_tu(vint64m8_t vd, int32_t rs1, vuint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf4_tum( @@ -292,7 +292,7 @@ vint16mf4_t test_vwmaccsu_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf2_tum( @@ -301,7 +301,7 @@ vint16mf4_t test_vwmaccsu_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, int8_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf2_tum( @@ -310,7 +310,7 @@ vint16mf2_t test_vwmaccsu_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m1_tum( @@ -319,7 +319,7 @@ vint16mf2_t test_vwmaccsu_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, int8_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m1_tum( @@ -328,7 +328,7 @@ vint16m1_t test_vwmaccsu_vv_i16m1_tum(vbool16_t mask, vint16m1_t vd, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m2_tum( @@ -337,7 +337,7 @@ vint16m1_t test_vwmaccsu_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vv_i16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m2_tum( @@ -346,7 +346,7 @@ vint16m2_t test_vwmaccsu_vv_i16m2_tum(vbool8_t mask, vint16m2_t vd, vint8m1_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vx_i16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m4_tum( @@ -355,7 +355,7 @@ vint16m2_t test_vwmaccsu_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m4_tum( @@ -364,7 +364,7 @@ vint16m4_t test_vwmaccsu_vv_i16m4_tum(vbool4_t mask, vint16m4_t vd, vint8m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m8_tum( @@ -373,7 +373,7 @@ vint16m4_t test_vwmaccsu_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vv_i16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m8_tum( @@ -382,7 +382,7 @@ vint16m8_t test_vwmaccsu_vv_i16m8_tum(vbool2_t mask, vint16m8_t vd, vint8m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vx_i16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32mf2_tum( @@ -391,7 +391,7 @@ vint16m8_t test_vwmaccsu_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32mf2_tum( @@ -400,7 +400,7 @@ vint32mf2_t test_vwmaccsu_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m1_tum( @@ -409,7 +409,7 @@ vint32mf2_t test_vwmaccsu_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m1_tum( @@ -418,7 +418,7 @@ vint32m1_t test_vwmaccsu_vv_i32m1_tum(vbool32_t mask, vint32m1_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m2_tum( @@ -427,7 +427,7 @@ vint32m1_t test_vwmaccsu_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vv_i32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m2_tum( @@ -436,7 +436,7 @@ vint32m2_t test_vwmaccsu_vv_i32m2_tum(vbool16_t mask, vint32m2_t vd, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vx_i32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m4_tum( @@ -445,7 +445,7 @@ vint32m2_t test_vwmaccsu_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m4_tum( @@ -454,7 +454,7 @@ vint32m4_t test_vwmaccsu_vv_i32m4_tum(vbool8_t mask, vint32m4_t vd, vint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m8_tum( @@ -463,7 +463,7 @@ vint32m4_t test_vwmaccsu_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vv_i32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m8_tum( @@ -472,7 +472,7 @@ vint32m8_t test_vwmaccsu_vv_i32m8_tum(vbool4_t mask, vint32m8_t vd, vint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vx_i32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m1_tum( @@ -481,7 +481,7 @@ vint32m8_t test_vwmaccsu_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m1_tum( @@ -490,7 +490,7 @@ vint64m1_t test_vwmaccsu_vv_i64m1_tum(vbool64_t mask, vint64m1_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m2_tum( @@ -499,7 +499,7 @@ vint64m1_t test_vwmaccsu_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, int32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vv_i64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m2_tum( @@ -508,7 +508,7 @@ vint64m2_t test_vwmaccsu_vv_i64m2_tum(vbool32_t mask, vint64m2_t vd, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vx_i64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m4_tum( @@ -517,7 +517,7 @@ vint64m2_t test_vwmaccsu_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, int32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m4_tum( @@ -526,7 +526,7 @@ vint64m4_t test_vwmaccsu_vv_i64m4_tum(vbool16_t mask, vint64m4_t vd, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m8_tum( @@ -535,7 +535,7 @@ vint64m4_t test_vwmaccsu_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, int32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vv_i64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m8_tum( @@ -544,7 +544,7 @@ vint64m8_t test_vwmaccsu_vv_i64m8_tum(vbool8_t mask, vint64m8_t vd, vint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vx_i64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf4_tumu( @@ -553,7 +553,7 @@ vint64m8_t test_vwmaccsu_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf4_tumu( @@ -562,7 +562,7 @@ vint16mf4_t test_vwmaccsu_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf2_tumu( @@ -571,7 +571,7 @@ vint16mf4_t test_vwmaccsu_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf2_tumu( @@ -580,7 +580,7 @@ vint16mf2_t test_vwmaccsu_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m1_tumu( @@ -589,7 +589,7 @@ vint16mf2_t test_vwmaccsu_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, int8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m1_tumu( @@ -598,7 +598,7 @@ vint16m1_t test_vwmaccsu_vv_i16m1_tumu(vbool16_t mask, vint16m1_t vd, vint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m2_tumu( @@ -607,7 +607,7 @@ vint16m1_t test_vwmaccsu_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, int8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m2_tumu( @@ -616,7 +616,7 @@ vint16m2_t test_vwmaccsu_vv_i16m2_tumu(vbool8_t mask, vint16m2_t vd, vint8m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m4_tumu( @@ -625,7 +625,7 @@ vint16m2_t test_vwmaccsu_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m4_tumu( @@ -634,7 +634,7 @@ vint16m4_t test_vwmaccsu_vv_i16m4_tumu(vbool4_t mask, vint16m4_t vd, vint8m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m8_tumu( @@ -643,7 +643,7 @@ vint16m4_t test_vwmaccsu_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m8_tumu( @@ -652,7 +652,7 @@ vint16m8_t test_vwmaccsu_vv_i16m8_tumu(vbool2_t mask, vint16m8_t vd, vint8m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32mf2_tumu( @@ -661,7 +661,7 @@ vint16m8_t test_vwmaccsu_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32mf2_tumu( @@ -670,7 +670,7 @@ vint32mf2_t test_vwmaccsu_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m1_tumu( @@ -679,7 +679,7 @@ vint32mf2_t test_vwmaccsu_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m1_tumu( @@ -688,7 +688,7 @@ vint32m1_t test_vwmaccsu_vv_i32m1_tumu(vbool32_t mask, vint32m1_t vd, vint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m2_tumu( @@ -697,7 +697,7 @@ vint32m1_t test_vwmaccsu_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m2_tumu( @@ -706,7 +706,7 @@ vint32m2_t test_vwmaccsu_vv_i32m2_tumu(vbool16_t mask, vint32m2_t vd, vint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m4_tumu( @@ -715,7 +715,7 @@ vint32m2_t test_vwmaccsu_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, int16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m4_tumu( @@ -724,7 +724,7 @@ vint32m4_t test_vwmaccsu_vv_i32m4_tumu(vbool8_t mask, vint32m4_t vd, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m8_tumu( @@ -733,7 +733,7 @@ vint32m4_t test_vwmaccsu_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m8_tumu( @@ -742,7 +742,7 @@ vint32m8_t test_vwmaccsu_vv_i32m8_tumu(vbool4_t mask, vint32m8_t vd, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m1_tumu( @@ -751,7 +751,7 @@ vint32m8_t test_vwmaccsu_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, int16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m1_tumu( @@ -760,7 +760,7 @@ vint64m1_t test_vwmaccsu_vv_i64m1_tumu(vbool64_t mask, vint64m1_t vd, vint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m2_tumu( @@ -769,7 +769,7 @@ vint64m1_t test_vwmaccsu_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, int32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m2_tumu( @@ -778,7 +778,7 @@ vint64m2_t test_vwmaccsu_vv_i64m2_tumu(vbool32_t mask, vint64m2_t vd, vint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m4_tumu( @@ -787,7 +787,7 @@ vint64m2_t test_vwmaccsu_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, int32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m4_tumu( @@ -796,7 +796,7 @@ vint64m4_t test_vwmaccsu_vv_i64m4_tumu(vbool16_t mask, vint64m4_t vd, vint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m8_tumu( @@ -805,7 +805,7 @@ vint64m4_t test_vwmaccsu_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, int32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m8_tumu( @@ -814,7 +814,7 @@ vint64m8_t test_vwmaccsu_vv_i64m8_tumu(vbool8_t mask, vint64m8_t vd, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf4_mu( @@ -823,7 +823,7 @@ vint64m8_t test_vwmaccsu_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, int32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf4_mu( @@ -832,7 +832,7 @@ vint16mf4_t test_vwmaccsu_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccsu_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16mf2_mu( @@ -841,7 +841,7 @@ vint16mf4_t test_vwmaccsu_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, int8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16mf2_mu( @@ -850,7 +850,7 @@ vint16mf2_t test_vwmaccsu_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccsu_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m1_mu( @@ -859,7 +859,7 @@ vint16mf2_t test_vwmaccsu_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, int8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m1_mu( @@ -868,7 +868,7 @@ vint16m1_t test_vwmaccsu_vv_i16m1_mu(vbool16_t mask, vint16m1_t vd, vint8mf2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccsu_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m2_mu( @@ -877,7 +877,7 @@ vint16m1_t test_vwmaccsu_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, int8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vv_i16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m2_mu( @@ -886,7 +886,7 @@ vint16m2_t test_vwmaccsu_vv_i16m2_mu(vbool8_t mask, vint16m2_t vd, vint8m1_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccsu_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccsu_vx_i16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m4_mu( @@ -895,7 +895,7 @@ vint16m2_t test_vwmaccsu_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vv_i16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m4_mu( @@ -904,7 +904,7 @@ vint16m4_t test_vwmaccsu_vv_i16m4_mu(vbool4_t mask, vint16m4_t vd, vint8m2_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccsu_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccsu_vx_i16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i16m8_mu( @@ -913,7 +913,7 @@ vint16m4_t test_vwmaccsu_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vv_i16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i16m8_mu( @@ -922,7 +922,7 @@ vint16m8_t test_vwmaccsu_vv_i16m8_mu(vbool2_t mask, vint16m8_t vd, vint8m4_t vs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccsu_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccsu_vx_i16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32mf2_mu( @@ -931,7 +931,7 @@ vint16m8_t test_vwmaccsu_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, int8_t rs1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32mf2_mu( @@ -940,7 +940,7 @@ vint32mf2_t test_vwmaccsu_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, vint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccsu_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccsu_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m1_mu( @@ -949,7 +949,7 @@ vint32mf2_t test_vwmaccsu_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, int16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m1_mu( @@ -958,7 +958,7 @@ vint32m1_t test_vwmaccsu_vv_i32m1_mu(vbool32_t mask, vint32m1_t vd, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccsu_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m2_mu( @@ -967,7 +967,7 @@ vint32m1_t test_vwmaccsu_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vv_i32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m2_mu( @@ -976,7 +976,7 @@ vint32m2_t test_vwmaccsu_vv_i32m2_mu(vbool16_t mask, vint32m2_t vd, vint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccsu_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccsu_vx_i32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m4_mu( @@ -985,7 +985,7 @@ vint32m2_t test_vwmaccsu_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vv_i32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m4_mu( @@ -994,7 +994,7 @@ vint32m4_t test_vwmaccsu_vv_i32m4_mu(vbool8_t mask, vint32m4_t vd, vint16m2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccsu_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccsu_vx_i32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i32m8_mu( @@ -1003,7 +1003,7 @@ vint32m4_t test_vwmaccsu_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vv_i32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i32m8_mu( @@ -1012,7 +1012,7 @@ vint32m8_t test_vwmaccsu_vv_i32m8_mu(vbool4_t mask, vint32m8_t vd, vint16m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccsu_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccsu_vx_i32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m1_mu( @@ -1021,7 +1021,7 @@ vint32m8_t test_vwmaccsu_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, int16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m1_mu( @@ -1030,7 +1030,7 @@ vint64m1_t test_vwmaccsu_vv_i64m1_mu(vbool64_t mask, vint64m1_t vd, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccsu_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m2_mu( @@ -1039,7 +1039,7 @@ vint64m1_t test_vwmaccsu_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vv_i64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m2_mu( @@ -1048,7 +1048,7 @@ vint64m2_t test_vwmaccsu_vv_i64m2_mu(vbool32_t mask, vint64m2_t vd, vint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccsu_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccsu_vx_i64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m4_mu( @@ -1057,7 +1057,7 @@ vint64m2_t test_vwmaccsu_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vv_i64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m4_mu( @@ -1066,7 +1066,7 @@ vint64m4_t test_vwmaccsu_vv_i64m4_mu(vbool16_t mask, vint64m4_t vd, vint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccsu_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccsu_vx_i64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vv_i64m8_mu( @@ -1075,7 +1075,7 @@ vint64m4_t test_vwmaccsu_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, int32_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vv_i64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccsu_vv_i64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccsu_vx_i64m8_mu( @@ -1084,6 +1084,6 @@ vint64m8_t test_vwmaccsu_vv_i64m8_mu(vbool8_t mask, vint64m8_t vd, vint32m4_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccsu_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, int32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccsu_vx_i64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccsu_vx_i64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccu.c index 16b51be8af8276c5955950a799bfa7e6cab588b7..e8883c1f2af8950df7e9e125ab968b73134fa235 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccu.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vv_u16mf4_tu(vuint16mf4_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vv_u16mf4_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf4_tu( @@ -22,7 +22,7 @@ vuint16mf4_t test_vwmaccu_vv_u16mf4_tu(vuint16mf4_t vd, vuint8mf8_t vs1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vx_u16mf4_tu(vuint16mf4_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vx_u16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf2_tu( @@ -31,7 +31,7 @@ vuint16mf4_t test_vwmaccu_vx_u16mf4_tu(vuint16mf4_t vd, uint8_t rs1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vv_u16mf2_tu(vuint16mf2_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vv_u16mf2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf2_tu( @@ -40,7 +40,7 @@ vuint16mf2_t test_vwmaccu_vv_u16mf2_tu(vuint16mf2_t vd, vuint8mf4_t vs1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vx_u16mf2_tu(vuint16mf2_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vx_u16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m1_tu( @@ -49,7 +49,7 @@ vuint16mf2_t test_vwmaccu_vx_u16mf2_tu(vuint16mf2_t vd, uint8_t rs1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vv_u16m1_tu(vuint16m1_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vv_u16m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m1_tu( @@ -58,7 +58,7 @@ vuint16m1_t test_vwmaccu_vv_u16m1_tu(vuint16m1_t vd, vuint8mf2_t vs1, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vx_u16m1_tu(vuint16m1_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vx_u16m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m2_tu( @@ -67,7 +67,7 @@ vuint16m1_t test_vwmaccu_vx_u16m1_tu(vuint16m1_t vd, uint8_t rs1, vuint8mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vv_u16m2_tu(vuint16m2_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vv_u16m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m2_tu( @@ -76,7 +76,7 @@ vuint16m2_t test_vwmaccu_vv_u16m2_tu(vuint16m2_t vd, vuint8m1_t vs1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vx_u16m2_tu(vuint16m2_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vx_u16m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m4_tu( @@ -85,7 +85,7 @@ vuint16m2_t test_vwmaccu_vx_u16m2_tu(vuint16m2_t vd, uint8_t rs1, vuint8m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vv_u16m4_tu(vuint16m4_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vv_u16m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m4_tu( @@ -94,7 +94,7 @@ vuint16m4_t test_vwmaccu_vv_u16m4_tu(vuint16m4_t vd, vuint8m2_t vs1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vx_u16m4_tu(vuint16m4_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vx_u16m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m8_tu( @@ -103,7 +103,7 @@ vuint16m4_t test_vwmaccu_vx_u16m4_tu(vuint16m4_t vd, uint8_t rs1, vuint8m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vv_u16m8_tu(vuint16m8_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vv_u16m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m8_tu( @@ -112,7 +112,7 @@ vuint16m8_t test_vwmaccu_vv_u16m8_tu(vuint16m8_t vd, vuint8m4_t vs1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vx_u16m8_tu(vuint16m8_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vx_u16m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32mf2_tu( @@ -121,7 +121,7 @@ vuint16m8_t test_vwmaccu_vx_u16m8_tu(vuint16m8_t vd, uint8_t rs1, vuint8m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vv_u32mf2_tu(vuint32mf2_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vv_u32mf2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32mf2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32mf2_tu( @@ -130,7 +130,7 @@ vuint32mf2_t test_vwmaccu_vv_u32mf2_tu(vuint32mf2_t vd, vuint16mf4_t vs1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vx_u32mf2_tu(vuint32mf2_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vx_u32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m1_tu( @@ -139,7 +139,7 @@ vuint32mf2_t test_vwmaccu_vx_u32mf2_tu(vuint32mf2_t vd, uint16_t rs1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vv_u32m1_tu(vuint32m1_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vv_u32m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m1_tu( @@ -148,7 +148,7 @@ vuint32m1_t test_vwmaccu_vv_u32m1_tu(vuint32m1_t vd, vuint16mf2_t vs1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vx_u32m1_tu(vuint32m1_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vx_u32m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m2_tu( @@ -157,7 +157,7 @@ vuint32m1_t test_vwmaccu_vx_u32m1_tu(vuint32m1_t vd, uint16_t rs1, vuint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vv_u32m2_tu(vuint32m2_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vv_u32m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m2_tu( @@ -166,7 +166,7 @@ vuint32m2_t test_vwmaccu_vv_u32m2_tu(vuint32m2_t vd, vuint16m1_t vs1, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vx_u32m2_tu(vuint32m2_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vx_u32m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m4_tu( @@ -175,7 +175,7 @@ vuint32m2_t test_vwmaccu_vx_u32m2_tu(vuint32m2_t vd, uint16_t rs1, vuint16m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vv_u32m4_tu(vuint32m4_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vv_u32m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m4_tu( @@ -184,7 +184,7 @@ vuint32m4_t test_vwmaccu_vv_u32m4_tu(vuint32m4_t vd, vuint16m2_t vs1, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vx_u32m4_tu(vuint32m4_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vx_u32m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m8_tu( @@ -193,7 +193,7 @@ vuint32m4_t test_vwmaccu_vx_u32m4_tu(vuint32m4_t vd, uint16_t rs1, vuint16m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vv_u32m8_tu(vuint32m8_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vv_u32m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m8_tu( @@ -202,7 +202,7 @@ vuint32m8_t test_vwmaccu_vv_u32m8_tu(vuint32m8_t vd, vuint16m4_t vs1, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vx_u32m8_tu(vuint32m8_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vx_u32m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m1_tu( @@ -211,7 +211,7 @@ vuint32m8_t test_vwmaccu_vx_u32m8_tu(vuint32m8_t vd, uint16_t rs1, vuint16m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vv_u64m1_tu(vuint64m1_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vv_u64m1_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m1_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m1_tu( @@ -220,7 +220,7 @@ vuint64m1_t test_vwmaccu_vv_u64m1_tu(vuint64m1_t vd, vuint32mf2_t vs1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vx_u64m1_tu(vuint64m1_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vx_u64m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m2_tu( @@ -229,7 +229,7 @@ vuint64m1_t test_vwmaccu_vx_u64m1_tu(vuint64m1_t vd, uint32_t rs1, vuint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vv_u64m2_tu(vuint64m2_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vv_u64m2_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m2_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m2_tu( @@ -238,7 +238,7 @@ vuint64m2_t test_vwmaccu_vv_u64m2_tu(vuint64m2_t vd, vuint32m1_t vs1, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vx_u64m2_tu(vuint64m2_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vx_u64m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m4_tu( @@ -247,7 +247,7 @@ vuint64m2_t test_vwmaccu_vx_u64m2_tu(vuint64m2_t vd, uint32_t rs1, vuint32m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vv_u64m4_tu(vuint64m4_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vv_u64m4_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m4_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m4_tu( @@ -256,7 +256,7 @@ vuint64m4_t test_vwmaccu_vv_u64m4_tu(vuint64m4_t vd, vuint32m2_t vs1, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vx_u64m4_tu(vuint64m4_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vx_u64m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m8_tu( @@ -265,7 +265,7 @@ vuint64m4_t test_vwmaccu_vx_u64m4_tu(vuint64m4_t vd, uint32_t rs1, vuint32m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vv_u64m8_tu(vuint64m8_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vv_u64m8_tu(vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m8_tu(vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m8_tu( @@ -274,7 +274,7 @@ vuint64m8_t test_vwmaccu_vv_u64m8_tu(vuint64m8_t vd, vuint32m4_t vs1, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vx_u64m8_tu(vuint64m8_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vx_u64m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf4_tum( @@ -283,7 +283,7 @@ vuint64m8_t test_vwmaccu_vx_u64m8_tu(vuint64m8_t vd, uint32_t rs1, vuint32m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf4_tum( @@ -292,7 +292,7 @@ vuint16mf4_t test_vwmaccu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf2_tum( @@ -301,7 +301,7 @@ vuint16mf4_t test_vwmaccu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t vd, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf2_tum( @@ -310,7 +310,7 @@ vuint16mf2_t test_vwmaccu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m1_tum( @@ -319,7 +319,7 @@ vuint16mf2_t test_vwmaccu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t vd, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vv_u16m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m1_tum( @@ -328,7 +328,7 @@ vuint16m1_t test_vwmaccu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t vd, vuint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vx_u16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m2_tum( @@ -337,7 +337,7 @@ vuint16m1_t test_vwmaccu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vv_u16m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m2_tum( @@ -346,7 +346,7 @@ vuint16m2_t test_vwmaccu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t vd, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vx_u16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m4_tum( @@ -355,7 +355,7 @@ vuint16m2_t test_vwmaccu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vv_u16m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m4_tum( @@ -364,7 +364,7 @@ vuint16m4_t test_vwmaccu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t vd, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vx_u16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m8_tum( @@ -373,7 +373,7 @@ vuint16m4_t test_vwmaccu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vv_u16m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m8_tum( @@ -382,7 +382,7 @@ vuint16m8_t test_vwmaccu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t vd, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vx_u16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32mf2_tum( @@ -391,7 +391,7 @@ vuint16m8_t test_vwmaccu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32mf2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32mf2_tum( @@ -400,7 +400,7 @@ vuint32mf2_t test_vwmaccu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m1_tum( @@ -409,7 +409,7 @@ vuint32mf2_t test_vwmaccu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t vd, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vv_u32m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m1_tum( @@ -418,7 +418,7 @@ vuint32m1_t test_vwmaccu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t vd, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vx_u32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m2_tum( @@ -427,7 +427,7 @@ vuint32m1_t test_vwmaccu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vv_u32m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m2_tum( @@ -436,7 +436,7 @@ vuint32m2_t test_vwmaccu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t vd, vuint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vx_u32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m4_tum( @@ -445,7 +445,7 @@ vuint32m2_t test_vwmaccu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vv_u32m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m4_tum( @@ -454,7 +454,7 @@ vuint32m4_t test_vwmaccu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t vd, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vx_u32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m8_tum( @@ -463,7 +463,7 @@ vuint32m4_t test_vwmaccu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vv_u32m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m8_tum( @@ -472,7 +472,7 @@ vuint32m8_t test_vwmaccu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t vd, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vx_u32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m1_tum( @@ -481,7 +481,7 @@ vuint32m8_t test_vwmaccu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vv_u64m1_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m1_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m1_tum( @@ -490,7 +490,7 @@ vuint64m1_t test_vwmaccu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t vd, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vx_u64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m2_tum( @@ -499,7 +499,7 @@ vuint64m1_t test_vwmaccu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vv_u64m2_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m2_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m2_tum( @@ -508,7 +508,7 @@ vuint64m2_t test_vwmaccu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t vd, vuint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vx_u64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m4_tum( @@ -517,7 +517,7 @@ vuint64m2_t test_vwmaccu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vv_u64m4_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m4_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m4_tum( @@ -526,7 +526,7 @@ vuint64m4_t test_vwmaccu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t vd, vuint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vx_u64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m8_tum( @@ -535,7 +535,7 @@ vuint64m4_t test_vwmaccu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vv_u64m8_tum(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m8_tum(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m8_tum( @@ -544,7 +544,7 @@ vuint64m8_t test_vwmaccu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t vd, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vx_u64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf4_tumu( @@ -553,7 +553,7 @@ vuint64m8_t test_vwmaccu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf4_tumu( @@ -562,7 +562,7 @@ vuint16mf4_t test_vwmaccu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf2_tumu( @@ -571,7 +571,7 @@ vuint16mf4_t test_vwmaccu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t vd, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf2_tumu( @@ -580,7 +580,7 @@ vuint16mf2_t test_vwmaccu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m1_tumu( @@ -589,7 +589,7 @@ vuint16mf2_t test_vwmaccu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t vd, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m1_tumu( @@ -598,7 +598,7 @@ vuint16m1_t test_vwmaccu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, vuint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m2_tumu( @@ -607,7 +607,7 @@ vuint16m1_t test_vwmaccu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t vd, uint8_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m2_tumu( @@ -616,7 +616,7 @@ vuint16m2_t test_vwmaccu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m4_tumu( @@ -625,7 +625,7 @@ vuint16m2_t test_vwmaccu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m4_tumu( @@ -634,7 +634,7 @@ vuint16m4_t test_vwmaccu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m8_tumu( @@ -643,7 +643,7 @@ vuint16m4_t test_vwmaccu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m8_tumu( @@ -652,7 +652,7 @@ vuint16m8_t test_vwmaccu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32mf2_tumu( @@ -661,7 +661,7 @@ vuint16m8_t test_vwmaccu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32mf2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32mf2_tumu( @@ -670,7 +670,7 @@ vuint32mf2_t test_vwmaccu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m1_tumu( @@ -679,7 +679,7 @@ vuint32mf2_t test_vwmaccu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t vd, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m1_tumu( @@ -688,7 +688,7 @@ vuint32m1_t test_vwmaccu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m2_tumu( @@ -697,7 +697,7 @@ vuint32m1_t test_vwmaccu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m2_tumu( @@ -706,7 +706,7 @@ vuint32m2_t test_vwmaccu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, vuint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m4_tumu( @@ -715,7 +715,7 @@ vuint32m2_t test_vwmaccu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m4_tumu( @@ -724,7 +724,7 @@ vuint32m4_t test_vwmaccu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, vuint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m8_tumu( @@ -733,7 +733,7 @@ vuint32m4_t test_vwmaccu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m8_tumu( @@ -742,7 +742,7 @@ vuint32m8_t test_vwmaccu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, vuint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m1_tumu( @@ -751,7 +751,7 @@ vuint32m8_t test_vwmaccu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m1_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m1_tumu( @@ -760,7 +760,7 @@ vuint64m1_t test_vwmaccu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m2_tumu( @@ -769,7 +769,7 @@ vuint64m1_t test_vwmaccu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m2_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m2_tumu( @@ -778,7 +778,7 @@ vuint64m2_t test_vwmaccu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, vuint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m4_tumu( @@ -787,7 +787,7 @@ vuint64m2_t test_vwmaccu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m4_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m4_tumu( @@ -796,7 +796,7 @@ vuint64m4_t test_vwmaccu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, vuint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m8_tumu( @@ -805,7 +805,7 @@ vuint64m4_t test_vwmaccu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t vd, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m8_tumu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m8_tumu( @@ -814,7 +814,7 @@ vuint64m8_t test_vwmaccu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, vuint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf4_mu( @@ -823,7 +823,7 @@ vuint64m8_t test_vwmaccu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint8mf8_t vs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf4_mu( @@ -832,7 +832,7 @@ vuint16mf4_t test_vwmaccu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmaccu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint8_t rs1, vuint8mf8_t vs2, size_t vl) { - return vwmaccu_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16mf2_mu( @@ -841,7 +841,7 @@ vuint16mf4_t test_vwmaccu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t vd, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint8mf4_t vs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16mf2_mu( @@ -850,7 +850,7 @@ vuint16mf2_t test_vwmaccu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, vuint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmaccu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint8_t rs1, vuint8mf4_t vs2, size_t vl) { - return vwmaccu_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m1_mu( @@ -859,7 +859,7 @@ vuint16mf2_t test_vwmaccu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t vd, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vv_u16m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m1_mu( @@ -868,7 +868,7 @@ vuint16m1_t test_vwmaccu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t vd, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmaccu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint8_t rs1, vuint8mf2_t vs2, size_t vl) { - return vwmaccu_vx_u16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m2_mu( @@ -877,7 +877,7 @@ vuint16m1_t test_vwmaccu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint8m1_t vs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vv_u16m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m2_mu( @@ -886,7 +886,7 @@ vuint16m2_t test_vwmaccu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t vd, vuint8m1_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmaccu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint8_t rs1, vuint8m1_t vs2, size_t vl) { - return vwmaccu_vx_u16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m4_mu( @@ -895,7 +895,7 @@ vuint16m2_t test_vwmaccu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint8m2_t vs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vv_u16m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m4_mu( @@ -904,7 +904,7 @@ vuint16m4_t test_vwmaccu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t vd, vuint8m2_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmaccu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint8_t rs1, vuint8m2_t vs2, size_t vl) { - return vwmaccu_vx_u16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u16m8_mu( @@ -913,7 +913,7 @@ vuint16m4_t test_vwmaccu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint8m4_t vs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vv_u16m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u16m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u16m8_mu( @@ -922,7 +922,7 @@ vuint16m8_t test_vwmaccu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t vd, vuint8m4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmaccu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint8_t rs1, vuint8m4_t vs2, size_t vl) { - return vwmaccu_vx_u16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32mf2_mu( @@ -931,7 +931,7 @@ vuint16m8_t test_vwmaccu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint16mf4_t vs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32mf2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32mf2_mu( @@ -940,7 +940,7 @@ vuint32mf2_t test_vwmaccu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmaccu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint16_t rs1, vuint16mf4_t vs2, size_t vl) { - return vwmaccu_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m1_mu( @@ -949,7 +949,7 @@ vuint32mf2_t test_vwmaccu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint16mf2_t vs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vv_u32m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m1_mu( @@ -958,7 +958,7 @@ vuint32m1_t test_vwmaccu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t vd, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmaccu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint16_t rs1, vuint16mf2_t vs2, size_t vl) { - return vwmaccu_vx_u32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m2_mu( @@ -967,7 +967,7 @@ vuint32m1_t test_vwmaccu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint16m1_t vs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vv_u32m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m2_mu( @@ -976,7 +976,7 @@ vuint32m2_t test_vwmaccu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t vd, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmaccu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint16_t rs1, vuint16m1_t vs2, size_t vl) { - return vwmaccu_vx_u32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m4_mu( @@ -985,7 +985,7 @@ vuint32m2_t test_vwmaccu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint16m2_t vs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vv_u32m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m4_mu( @@ -994,7 +994,7 @@ vuint32m4_t test_vwmaccu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t vd, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmaccu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint16_t rs1, vuint16m2_t vs2, size_t vl) { - return vwmaccu_vx_u32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u32m8_mu( @@ -1003,7 +1003,7 @@ vuint32m4_t test_vwmaccu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint16m4_t vs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vv_u32m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u32m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u32m8_mu( @@ -1012,7 +1012,7 @@ vuint32m8_t test_vwmaccu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t vd, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmaccu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint16_t rs1, vuint16m4_t vs2, size_t vl) { - return vwmaccu_vx_u32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m1_mu( @@ -1021,7 +1021,7 @@ vuint32m8_t test_vwmaccu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint32mf2_t vs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vv_u64m1_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m1_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m1_mu( @@ -1030,7 +1030,7 @@ vuint64m1_t test_vwmaccu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t vd, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmaccu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint32_t rs1, vuint32mf2_t vs2, size_t vl) { - return vwmaccu_vx_u64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m2_mu( @@ -1039,7 +1039,7 @@ vuint64m1_t test_vwmaccu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint32m1_t vs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vv_u64m2_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m2_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m2_mu( @@ -1048,7 +1048,7 @@ vuint64m2_t test_vwmaccu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t vd, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmaccu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint32_t rs1, vuint32m1_t vs2, size_t vl) { - return vwmaccu_vx_u64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m4_mu( @@ -1057,7 +1057,7 @@ vuint64m2_t test_vwmaccu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint32m2_t vs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vv_u64m4_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m4_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m4_mu( @@ -1066,7 +1066,7 @@ vuint64m4_t test_vwmaccu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t vd, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmaccu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint32_t rs1, vuint32m2_t vs2, size_t vl) { - return vwmaccu_vx_u64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vv_u64m8_mu( @@ -1075,7 +1075,7 @@ vuint64m4_t test_vwmaccu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint32m4_t vs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vv_u64m8_mu(mask, vd, vs1, vs2, vl); + return __riscv_vwmaccu_vv_u64m8_mu(mask, vd, vs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccu_vx_u64m8_mu( @@ -1084,6 +1084,6 @@ vuint64m8_t test_vwmaccu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t vd, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmaccu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t vd, uint32_t rs1, vuint32m4_t vs2, size_t vl) { - return vwmaccu_vx_u64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccu_vx_u64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccus.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccus.c index 2ff8d739ee58a22b7a35d34d381f6b2ba2c8ed7b..14c6123a6afc2cd7eacbecd832c48fae9f38f1b4 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccus.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmaccus.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccus_vx_i16mf4_tu(vint16mf4_t vd, uint8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmaccus_vx_i16mf4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf2_tu( @@ -22,7 +22,7 @@ vint16mf4_t test_vwmaccus_vx_i16mf4_tu(vint16mf4_t vd, uint8_t rs1, vint8mf8_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccus_vx_i16mf2_tu(vint16mf2_t vd, uint8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmaccus_vx_i16mf2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m1_tu( @@ -31,7 +31,7 @@ vint16mf2_t test_vwmaccus_vx_i16mf2_tu(vint16mf2_t vd, uint8_t rs1, vint8mf4_t v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccus_vx_i16m1_tu(vint16m1_t vd, uint8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmaccus_vx_i16m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m2_tu( @@ -40,7 +40,7 @@ vint16m1_t test_vwmaccus_vx_i16m1_tu(vint16m1_t vd, uint8_t rs1, vint8mf2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccus_vx_i16m2_tu(vint16m2_t vd, uint8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmaccus_vx_i16m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m4_tu( @@ -49,7 +49,7 @@ vint16m2_t test_vwmaccus_vx_i16m2_tu(vint16m2_t vd, uint8_t rs1, vint8m1_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccus_vx_i16m4_tu(vint16m4_t vd, uint8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmaccus_vx_i16m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m8_tu( @@ -58,7 +58,7 @@ vint16m4_t test_vwmaccus_vx_i16m4_tu(vint16m4_t vd, uint8_t rs1, vint8m2_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccus_vx_i16m8_tu(vint16m8_t vd, uint8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmaccus_vx_i16m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32mf2_tu( @@ -67,7 +67,7 @@ vint16m8_t test_vwmaccus_vx_i16m8_tu(vint16m8_t vd, uint8_t rs1, vint8m4_t vs2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccus_vx_i32mf2_tu(vint32mf2_t vd, uint16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmaccus_vx_i32mf2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32mf2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m1_tu( @@ -76,7 +76,7 @@ vint32mf2_t test_vwmaccus_vx_i32mf2_tu(vint32mf2_t vd, uint16_t rs1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccus_vx_i32m1_tu(vint32m1_t vd, uint16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmaccus_vx_i32m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m2_tu( @@ -85,7 +85,7 @@ vint32m1_t test_vwmaccus_vx_i32m1_tu(vint32m1_t vd, uint16_t rs1, vint16mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccus_vx_i32m2_tu(vint32m2_t vd, uint16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmaccus_vx_i32m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m4_tu( @@ -94,7 +94,7 @@ vint32m2_t test_vwmaccus_vx_i32m2_tu(vint32m2_t vd, uint16_t rs1, vint16m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccus_vx_i32m4_tu(vint32m4_t vd, uint16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmaccus_vx_i32m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m8_tu( @@ -103,7 +103,7 @@ vint32m4_t test_vwmaccus_vx_i32m4_tu(vint32m4_t vd, uint16_t rs1, vint16m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccus_vx_i32m8_tu(vint32m8_t vd, uint16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmaccus_vx_i32m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m1_tu( @@ -112,7 +112,7 @@ vint32m8_t test_vwmaccus_vx_i32m8_tu(vint32m8_t vd, uint16_t rs1, vint16m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccus_vx_i64m1_tu(vint64m1_t vd, uint32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmaccus_vx_i64m1_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m1_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m2_tu( @@ -121,7 +121,7 @@ vint64m1_t test_vwmaccus_vx_i64m1_tu(vint64m1_t vd, uint32_t rs1, vint32mf2_t vs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccus_vx_i64m2_tu(vint64m2_t vd, uint32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmaccus_vx_i64m2_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m2_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m4_tu( @@ -130,7 +130,7 @@ vint64m2_t test_vwmaccus_vx_i64m2_tu(vint64m2_t vd, uint32_t rs1, vint32m1_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccus_vx_i64m4_tu(vint64m4_t vd, uint32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmaccus_vx_i64m4_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m4_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m8_tu( @@ -139,7 +139,7 @@ vint64m4_t test_vwmaccus_vx_i64m4_tu(vint64m4_t vd, uint32_t rs1, vint32m2_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccus_vx_i64m8_tu(vint64m8_t vd, uint32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmaccus_vx_i64m8_tu(vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m8_tu(vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf4_tum( @@ -148,7 +148,7 @@ vint64m8_t test_vwmaccus_vx_i64m8_tu(vint64m8_t vd, uint32_t rs1, vint32m4_t vs2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccus_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, uint8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmaccus_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf2_tum( @@ -157,7 +157,7 @@ vint16mf4_t test_vwmaccus_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t vd, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccus_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, uint8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmaccus_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m1_tum( @@ -166,7 +166,7 @@ vint16mf2_t test_vwmaccus_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t vd, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccus_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, uint8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmaccus_vx_i16m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m2_tum( @@ -175,7 +175,7 @@ vint16m1_t test_vwmaccus_vx_i16m1_tum(vbool16_t mask, vint16m1_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccus_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, uint8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmaccus_vx_i16m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m4_tum( @@ -184,7 +184,7 @@ vint16m2_t test_vwmaccus_vx_i16m2_tum(vbool8_t mask, vint16m2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccus_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, uint8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmaccus_vx_i16m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m8_tum( @@ -193,7 +193,7 @@ vint16m4_t test_vwmaccus_vx_i16m4_tum(vbool4_t mask, vint16m4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccus_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, uint8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmaccus_vx_i16m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32mf2_tum( @@ -202,7 +202,7 @@ vint16m8_t test_vwmaccus_vx_i16m8_tum(vbool2_t mask, vint16m8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccus_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, uint16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmaccus_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32mf2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m1_tum( @@ -211,7 +211,7 @@ vint32mf2_t test_vwmaccus_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccus_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, uint16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmaccus_vx_i32m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m2_tum( @@ -220,7 +220,7 @@ vint32m1_t test_vwmaccus_vx_i32m1_tum(vbool32_t mask, vint32m1_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccus_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, uint16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmaccus_vx_i32m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m4_tum( @@ -229,7 +229,7 @@ vint32m2_t test_vwmaccus_vx_i32m2_tum(vbool16_t mask, vint32m2_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccus_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, uint16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmaccus_vx_i32m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m8_tum( @@ -238,7 +238,7 @@ vint32m4_t test_vwmaccus_vx_i32m4_tum(vbool8_t mask, vint32m4_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccus_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, uint16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmaccus_vx_i32m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m1_tum( @@ -247,7 +247,7 @@ vint32m8_t test_vwmaccus_vx_i32m8_tum(vbool4_t mask, vint32m8_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccus_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, uint32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmaccus_vx_i64m1_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m1_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m2_tum( @@ -256,7 +256,7 @@ vint64m1_t test_vwmaccus_vx_i64m1_tum(vbool64_t mask, vint64m1_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccus_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, uint32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmaccus_vx_i64m2_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m2_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m4_tum( @@ -265,7 +265,7 @@ vint64m2_t test_vwmaccus_vx_i64m2_tum(vbool32_t mask, vint64m2_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccus_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, uint32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmaccus_vx_i64m4_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m4_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m8_tum( @@ -274,7 +274,7 @@ vint64m4_t test_vwmaccus_vx_i64m4_tum(vbool16_t mask, vint64m4_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccus_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, uint32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmaccus_vx_i64m8_tum(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m8_tum(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf4_tumu( @@ -283,7 +283,7 @@ vint64m8_t test_vwmaccus_vx_i64m8_tum(vbool8_t mask, vint64m8_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccus_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, uint8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmaccus_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf2_tumu( @@ -292,7 +292,7 @@ vint16mf4_t test_vwmaccus_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t vd, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccus_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, uint8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmaccus_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m1_tumu( @@ -301,7 +301,7 @@ vint16mf2_t test_vwmaccus_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t vd, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccus_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, uint8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmaccus_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m2_tumu( @@ -310,7 +310,7 @@ vint16m1_t test_vwmaccus_vx_i16m1_tumu(vbool16_t mask, vint16m1_t vd, uint8_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccus_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, uint8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmaccus_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m4_tumu( @@ -319,7 +319,7 @@ vint16m2_t test_vwmaccus_vx_i16m2_tumu(vbool8_t mask, vint16m2_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccus_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, uint8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmaccus_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m8_tumu( @@ -328,7 +328,7 @@ vint16m4_t test_vwmaccus_vx_i16m4_tumu(vbool4_t mask, vint16m4_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccus_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, uint8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmaccus_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32mf2_tumu( @@ -337,7 +337,7 @@ vint16m8_t test_vwmaccus_vx_i16m8_tumu(vbool2_t mask, vint16m8_t vd, uint8_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccus_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, uint16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmaccus_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32mf2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m1_tumu( @@ -346,7 +346,7 @@ vint32mf2_t test_vwmaccus_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t vd, uint16_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccus_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, uint16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmaccus_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m2_tumu( @@ -355,7 +355,7 @@ vint32m1_t test_vwmaccus_vx_i32m1_tumu(vbool32_t mask, vint32m1_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccus_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, uint16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmaccus_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m4_tumu( @@ -364,7 +364,7 @@ vint32m2_t test_vwmaccus_vx_i32m2_tumu(vbool16_t mask, vint32m2_t vd, uint16_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccus_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, uint16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmaccus_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m8_tumu( @@ -373,7 +373,7 @@ vint32m4_t test_vwmaccus_vx_i32m4_tumu(vbool8_t mask, vint32m4_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccus_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, uint16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmaccus_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m1_tumu( @@ -382,7 +382,7 @@ vint32m8_t test_vwmaccus_vx_i32m8_tumu(vbool4_t mask, vint32m8_t vd, uint16_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccus_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, uint32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmaccus_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m1_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m2_tumu( @@ -391,7 +391,7 @@ vint64m1_t test_vwmaccus_vx_i64m1_tumu(vbool64_t mask, vint64m1_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccus_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, uint32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmaccus_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m2_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m4_tumu( @@ -400,7 +400,7 @@ vint64m2_t test_vwmaccus_vx_i64m2_tumu(vbool32_t mask, vint64m2_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccus_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, uint32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmaccus_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m4_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m8_tumu( @@ -409,7 +409,7 @@ vint64m4_t test_vwmaccus_vx_i64m4_tumu(vbool16_t mask, vint64m4_t vd, uint32_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccus_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, uint32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmaccus_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m8_tumu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf4_mu( @@ -418,7 +418,7 @@ vint64m8_t test_vwmaccus_vx_i64m8_tumu(vbool8_t mask, vint64m8_t vd, uint32_t rs // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmaccus_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, uint8_t rs1, vint8mf8_t vs2, size_t vl) { - return vwmaccus_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16mf2_mu( @@ -427,7 +427,7 @@ vint16mf4_t test_vwmaccus_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t vd, uint8_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmaccus_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, uint8_t rs1, vint8mf4_t vs2, size_t vl) { - return vwmaccus_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m1_mu( @@ -436,7 +436,7 @@ vint16mf2_t test_vwmaccus_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t vd, uint8_t r // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmaccus_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, uint8_t rs1, vint8mf2_t vs2, size_t vl) { - return vwmaccus_vx_i16m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m2_mu( @@ -445,7 +445,7 @@ vint16m1_t test_vwmaccus_vx_i16m1_mu(vbool16_t mask, vint16m1_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmaccus_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, uint8_t rs1, vint8m1_t vs2, size_t vl) { - return vwmaccus_vx_i16m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m4_mu( @@ -454,7 +454,7 @@ vint16m2_t test_vwmaccus_vx_i16m2_mu(vbool8_t mask, vint16m2_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmaccus_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, uint8_t rs1, vint8m2_t vs2, size_t vl) { - return vwmaccus_vx_i16m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i16m8_mu( @@ -463,7 +463,7 @@ vint16m4_t test_vwmaccus_vx_i16m4_mu(vbool4_t mask, vint16m4_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmaccus_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, uint8_t rs1, vint8m4_t vs2, size_t vl) { - return vwmaccus_vx_i16m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i16m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32mf2_mu( @@ -472,7 +472,7 @@ vint16m8_t test_vwmaccus_vx_i16m8_mu(vbool2_t mask, vint16m8_t vd, uint8_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmaccus_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, uint16_t rs1, vint16mf4_t vs2, size_t vl) { - return vwmaccus_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32mf2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m1_mu( @@ -481,7 +481,7 @@ vint32mf2_t test_vwmaccus_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t vd, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmaccus_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, uint16_t rs1, vint16mf2_t vs2, size_t vl) { - return vwmaccus_vx_i32m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m2_mu( @@ -490,7 +490,7 @@ vint32m1_t test_vwmaccus_vx_i32m1_mu(vbool32_t mask, vint32m1_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmaccus_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, uint16_t rs1, vint16m1_t vs2, size_t vl) { - return vwmaccus_vx_i32m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m4_mu( @@ -499,7 +499,7 @@ vint32m2_t test_vwmaccus_vx_i32m2_mu(vbool16_t mask, vint32m2_t vd, uint16_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmaccus_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, uint16_t rs1, vint16m2_t vs2, size_t vl) { - return vwmaccus_vx_i32m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i32m8_mu( @@ -508,7 +508,7 @@ vint32m4_t test_vwmaccus_vx_i32m4_mu(vbool8_t mask, vint32m4_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmaccus_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, uint16_t rs1, vint16m4_t vs2, size_t vl) { - return vwmaccus_vx_i32m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i32m8_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m1_mu( @@ -517,7 +517,7 @@ vint32m8_t test_vwmaccus_vx_i32m8_mu(vbool4_t mask, vint32m8_t vd, uint16_t rs1, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmaccus_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, uint32_t rs1, vint32mf2_t vs2, size_t vl) { - return vwmaccus_vx_i64m1_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m1_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m2_mu( @@ -526,7 +526,7 @@ vint64m1_t test_vwmaccus_vx_i64m1_mu(vbool64_t mask, vint64m1_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmaccus_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, uint32_t rs1, vint32m1_t vs2, size_t vl) { - return vwmaccus_vx_i64m2_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m2_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m4_mu( @@ -535,7 +535,7 @@ vint64m2_t test_vwmaccus_vx_i64m2_mu(vbool32_t mask, vint64m2_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmaccus_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, uint32_t rs1, vint32m2_t vs2, size_t vl) { - return vwmaccus_vx_i64m4_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m4_mu(mask, vd, rs1, vs2, vl); } // CHECK-RV64-LABEL: @test_vwmaccus_vx_i64m8_mu( @@ -544,6 +544,6 @@ vint64m4_t test_vwmaccus_vx_i64m4_mu(vbool16_t mask, vint64m4_t vd, uint32_t rs1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmaccus_vx_i64m8_mu(vbool8_t mask, vint64m8_t vd, uint32_t rs1, vint32m4_t vs2, size_t vl) { - return vwmaccus_vx_i64m8_mu(mask, vd, rs1, vs2, vl); + return __riscv_vwmaccus_vx_i64m8_mu(mask, vd, rs1, vs2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmul.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmul.c index 343baa8c410ba5d8c8ab60b3da8ce129499d14b0..6c7c325eb137498f9999fd47132869520636450f 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmul.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmul.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vv_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwmul_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf4_tu( @@ -21,7 +21,7 @@ vint16mf4_t test_vwmul_vv_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vx_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf2_tu( @@ -30,7 +30,7 @@ vint16mf4_t test_vwmul_vx_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vv_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwmul_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf2_tu( @@ -39,7 +39,7 @@ vint16mf2_t test_vwmul_vv_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vx_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m1_tu( @@ -48,7 +48,7 @@ vint16mf2_t test_vwmul_vx_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vv_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwmul_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m1_tu( @@ -57,7 +57,7 @@ vint16m1_t test_vwmul_vv_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vx_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m2_tu( @@ -66,7 +66,7 @@ vint16m1_t test_vwmul_vx_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vv_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwmul_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m2_tu( @@ -75,7 +75,7 @@ vint16m2_t test_vwmul_vv_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vx_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m4_tu( @@ -84,7 +84,7 @@ vint16m2_t test_vwmul_vx_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vv_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwmul_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m4_tu( @@ -93,7 +93,7 @@ vint16m4_t test_vwmul_vv_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vx_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m8_tu( @@ -102,7 +102,7 @@ vint16m4_t test_vwmul_vx_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vv_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwmul_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m8_tu( @@ -111,7 +111,7 @@ vint16m8_t test_vwmul_vv_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vx_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32mf2_tu( @@ -120,7 +120,7 @@ vint16m8_t test_vwmul_vx_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vv_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwmul_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32mf2_tu( @@ -129,7 +129,7 @@ vint32mf2_t test_vwmul_vv_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vx_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m1_tu( @@ -138,7 +138,7 @@ vint32mf2_t test_vwmul_vx_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vv_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwmul_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m1_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vwmul_vv_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vx_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m2_tu( @@ -156,7 +156,7 @@ vint32m1_t test_vwmul_vx_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vv_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwmul_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m2_tu( @@ -165,7 +165,7 @@ vint32m2_t test_vwmul_vv_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vx_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m4_tu( @@ -174,7 +174,7 @@ vint32m2_t test_vwmul_vx_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vv_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwmul_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m4_tu( @@ -183,7 +183,7 @@ vint32m4_t test_vwmul_vv_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vx_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m8_tu( @@ -192,7 +192,7 @@ vint32m4_t test_vwmul_vx_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vv_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwmul_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m8_tu( @@ -201,7 +201,7 @@ vint32m8_t test_vwmul_vv_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vx_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m1_tu( @@ -210,7 +210,7 @@ vint32m8_t test_vwmul_vx_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vv_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwmul_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m1_tu( @@ -219,7 +219,7 @@ vint64m1_t test_vwmul_vv_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vx_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m2_tu( @@ -228,7 +228,7 @@ vint64m1_t test_vwmul_vx_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vv_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwmul_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m2_tu( @@ -237,7 +237,7 @@ vint64m2_t test_vwmul_vv_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vx_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m4_tu( @@ -246,7 +246,7 @@ vint64m2_t test_vwmul_vx_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vv_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwmul_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m4_tu( @@ -255,7 +255,7 @@ vint64m4_t test_vwmul_vv_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vx_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m8_tu( @@ -264,7 +264,7 @@ vint64m4_t test_vwmul_vx_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vv_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwmul_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m8_tu( @@ -273,7 +273,7 @@ vint64m8_t test_vwmul_vv_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vx_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf4_tum( @@ -282,7 +282,7 @@ vint64m8_t test_vwmul_vx_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwmul_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf4_tum( @@ -291,7 +291,7 @@ vint16mf4_t test_vwmul_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf2_tum( @@ -300,7 +300,7 @@ vint16mf4_t test_vwmul_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwmul_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf2_tum( @@ -309,7 +309,7 @@ vint16mf2_t test_vwmul_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m1_tum( @@ -318,7 +318,7 @@ vint16mf2_t test_vwmul_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwmul_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m1_tum( @@ -327,7 +327,7 @@ vint16m1_t test_vwmul_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m2_tum( @@ -336,7 +336,7 @@ vint16m1_t test_vwmul_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwmul_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m2_tum( @@ -345,7 +345,7 @@ vint16m2_t test_vwmul_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m4_tum( @@ -354,7 +354,7 @@ vint16m2_t test_vwmul_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwmul_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m4_tum( @@ -363,7 +363,7 @@ vint16m4_t test_vwmul_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m8_tum( @@ -372,7 +372,7 @@ vint16m4_t test_vwmul_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwmul_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m8_tum( @@ -381,7 +381,7 @@ vint16m8_t test_vwmul_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32mf2_tum( @@ -390,7 +390,7 @@ vint16m8_t test_vwmul_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwmul_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32mf2_tum( @@ -399,7 +399,7 @@ vint32mf2_t test_vwmul_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m1_tum( @@ -408,7 +408,7 @@ vint32mf2_t test_vwmul_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwmul_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m1_tum( @@ -417,7 +417,7 @@ vint32m1_t test_vwmul_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m2_tum( @@ -426,7 +426,7 @@ vint32m1_t test_vwmul_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwmul_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m2_tum( @@ -435,7 +435,7 @@ vint32m2_t test_vwmul_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m4_tum( @@ -444,7 +444,7 @@ vint32m2_t test_vwmul_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwmul_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m4_tum( @@ -453,7 +453,7 @@ vint32m4_t test_vwmul_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m8_tum( @@ -462,7 +462,7 @@ vint32m4_t test_vwmul_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwmul_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m8_tum( @@ -471,7 +471,7 @@ vint32m8_t test_vwmul_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m1_tum( @@ -480,7 +480,7 @@ vint32m8_t test_vwmul_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwmul_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m1_tum( @@ -489,7 +489,7 @@ vint64m1_t test_vwmul_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m2_tum( @@ -498,7 +498,7 @@ vint64m1_t test_vwmul_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwmul_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m2_tum( @@ -507,7 +507,7 @@ vint64m2_t test_vwmul_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m4_tum( @@ -516,7 +516,7 @@ vint64m2_t test_vwmul_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwmul_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m4_tum( @@ -525,7 +525,7 @@ vint64m4_t test_vwmul_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m8_tum( @@ -534,7 +534,7 @@ vint64m4_t test_vwmul_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwmul_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m8_tum( @@ -543,7 +543,7 @@ vint64m8_t test_vwmul_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf4_tumu( @@ -552,7 +552,7 @@ vint64m8_t test_vwmul_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwmul_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf4_tumu( @@ -561,7 +561,7 @@ vint16mf4_t test_vwmul_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf2_tumu( @@ -570,7 +570,7 @@ vint16mf4_t test_vwmul_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwmul_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf2_tumu( @@ -579,7 +579,7 @@ vint16mf2_t test_vwmul_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m1_tumu( @@ -588,7 +588,7 @@ vint16mf2_t test_vwmul_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwmul_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m1_tumu( @@ -597,7 +597,7 @@ vint16m1_t test_vwmul_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m2_tumu( @@ -606,7 +606,7 @@ vint16m1_t test_vwmul_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwmul_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m2_tumu( @@ -615,7 +615,7 @@ vint16m2_t test_vwmul_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m4_tumu( @@ -624,7 +624,7 @@ vint16m2_t test_vwmul_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwmul_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m4_tumu( @@ -633,7 +633,7 @@ vint16m4_t test_vwmul_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m8_tumu( @@ -642,7 +642,7 @@ vint16m4_t test_vwmul_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwmul_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m8_tumu( @@ -651,7 +651,7 @@ vint16m8_t test_vwmul_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32mf2_tumu( @@ -660,7 +660,7 @@ vint16m8_t test_vwmul_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwmul_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32mf2_tumu( @@ -669,7 +669,7 @@ vint32mf2_t test_vwmul_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m1_tumu( @@ -678,7 +678,7 @@ vint32mf2_t test_vwmul_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwmul_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m1_tumu( @@ -687,7 +687,7 @@ vint32m1_t test_vwmul_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m2_tumu( @@ -696,7 +696,7 @@ vint32m1_t test_vwmul_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwmul_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m2_tumu( @@ -705,7 +705,7 @@ vint32m2_t test_vwmul_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m4_tumu( @@ -714,7 +714,7 @@ vint32m2_t test_vwmul_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwmul_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m4_tumu( @@ -723,7 +723,7 @@ vint32m4_t test_vwmul_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m8_tumu( @@ -732,7 +732,7 @@ vint32m4_t test_vwmul_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwmul_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m8_tumu( @@ -741,7 +741,7 @@ vint32m8_t test_vwmul_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m1_tumu( @@ -750,7 +750,7 @@ vint32m8_t test_vwmul_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwmul_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m1_tumu( @@ -759,7 +759,7 @@ vint64m1_t test_vwmul_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m2_tumu( @@ -768,7 +768,7 @@ vint64m1_t test_vwmul_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwmul_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m2_tumu( @@ -777,7 +777,7 @@ vint64m2_t test_vwmul_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m4_tumu( @@ -786,7 +786,7 @@ vint64m2_t test_vwmul_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwmul_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m4_tumu( @@ -795,7 +795,7 @@ vint64m4_t test_vwmul_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m8_tumu( @@ -804,7 +804,7 @@ vint64m4_t test_vwmul_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwmul_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m8_tumu( @@ -813,7 +813,7 @@ vint64m8_t test_vwmul_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf4_mu( @@ -822,7 +822,7 @@ vint64m8_t test_vwmul_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwmul_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf4_mu( @@ -831,7 +831,7 @@ vint16mf4_t test_vwmul_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmul_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16mf2_mu( @@ -840,7 +840,7 @@ vint16mf4_t test_vwmul_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwmul_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16mf2_mu( @@ -849,7 +849,7 @@ vint16mf2_t test_vwmul_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmul_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m1_mu( @@ -858,7 +858,7 @@ vint16mf2_t test_vwmul_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwmul_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m1_mu( @@ -867,7 +867,7 @@ vint16m1_t test_vwmul_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmul_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m2_mu( @@ -876,7 +876,7 @@ vint16m1_t test_vwmul_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwmul_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m2_mu( @@ -885,7 +885,7 @@ vint16m2_t test_vwmul_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmul_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m4_mu( @@ -894,7 +894,7 @@ vint16m2_t test_vwmul_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwmul_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m4_mu( @@ -903,7 +903,7 @@ vint16m4_t test_vwmul_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmul_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i16m8_mu( @@ -912,7 +912,7 @@ vint16m4_t test_vwmul_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwmul_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i16m8_mu( @@ -921,7 +921,7 @@ vint16m8_t test_vwmul_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmul_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwmul_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32mf2_mu( @@ -930,7 +930,7 @@ vint16m8_t test_vwmul_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwmul_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32mf2_mu( @@ -939,7 +939,7 @@ vint32mf2_t test_vwmul_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmul_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m1_mu( @@ -948,7 +948,7 @@ vint32mf2_t test_vwmul_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwmul_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m1_mu( @@ -957,7 +957,7 @@ vint32m1_t test_vwmul_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmul_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m2_mu( @@ -966,7 +966,7 @@ vint32m1_t test_vwmul_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwmul_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m2_mu( @@ -975,7 +975,7 @@ vint32m2_t test_vwmul_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmul_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m4_mu( @@ -984,7 +984,7 @@ vint32m2_t test_vwmul_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwmul_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m4_mu( @@ -993,7 +993,7 @@ vint32m4_t test_vwmul_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmul_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i32m8_mu( @@ -1002,7 +1002,7 @@ vint32m4_t test_vwmul_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwmul_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i32m8_mu( @@ -1011,7 +1011,7 @@ vint32m8_t test_vwmul_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmul_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwmul_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m1_mu( @@ -1020,7 +1020,7 @@ vint32m8_t test_vwmul_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwmul_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m1_mu( @@ -1029,7 +1029,7 @@ vint64m1_t test_vwmul_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmul_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m2_mu( @@ -1038,7 +1038,7 @@ vint64m1_t test_vwmul_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwmul_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m2_mu( @@ -1047,7 +1047,7 @@ vint64m2_t test_vwmul_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmul_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m4_mu( @@ -1056,7 +1056,7 @@ vint64m2_t test_vwmul_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwmul_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m4_mu( @@ -1065,7 +1065,7 @@ vint64m4_t test_vwmul_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmul_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vv_i64m8_mu( @@ -1074,7 +1074,7 @@ vint64m4_t test_vwmul_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwmul_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmul_vx_i64m8_mu( @@ -1083,6 +1083,6 @@ vint64m8_t test_vwmul_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmul_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwmul_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmul_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmulsu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmulsu.c index cfaa9203ca159973fd162776cb6849a0c4aa0790..a3996835ad9292ed465ce54fe17e1b0ad82d7677 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmulsu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmulsu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vv_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulsu_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf4_tu( @@ -21,7 +21,7 @@ vint16mf4_t test_vwmulsu_vv_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vx_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf2_tu( @@ -30,7 +30,7 @@ vint16mf4_t test_vwmulsu_vx_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vv_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulsu_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf2_tu( @@ -39,7 +39,7 @@ vint16mf2_t test_vwmulsu_vv_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vx_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m1_tu( @@ -48,7 +48,7 @@ vint16mf2_t test_vwmulsu_vx_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vv_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulsu_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m1_tu( @@ -57,7 +57,7 @@ vint16m1_t test_vwmulsu_vv_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vx_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m2_tu( @@ -66,7 +66,7 @@ vint16m1_t test_vwmulsu_vx_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vv_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulsu_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m2_tu( @@ -75,7 +75,7 @@ vint16m2_t test_vwmulsu_vv_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vx_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m4_tu( @@ -84,7 +84,7 @@ vint16m2_t test_vwmulsu_vx_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vv_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulsu_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m4_tu( @@ -93,7 +93,7 @@ vint16m4_t test_vwmulsu_vv_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vx_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m8_tu( @@ -102,7 +102,7 @@ vint16m4_t test_vwmulsu_vx_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vv_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulsu_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m8_tu( @@ -111,7 +111,7 @@ vint16m8_t test_vwmulsu_vv_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vx_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32mf2_tu( @@ -120,7 +120,7 @@ vint16m8_t test_vwmulsu_vx_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, uint8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vv_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulsu_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32mf2_tu( @@ -129,7 +129,7 @@ vint32mf2_t test_vwmulsu_vv_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vx_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m1_tu( @@ -138,7 +138,7 @@ vint32mf2_t test_vwmulsu_vx_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vv_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulsu_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m1_tu( @@ -147,7 +147,7 @@ vint32m1_t test_vwmulsu_vv_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vx_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m2_tu( @@ -156,7 +156,7 @@ vint32m1_t test_vwmulsu_vx_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, uint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vv_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulsu_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m2_tu( @@ -165,7 +165,7 @@ vint32m2_t test_vwmulsu_vv_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vx_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m4_tu( @@ -174,7 +174,7 @@ vint32m2_t test_vwmulsu_vx_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vv_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulsu_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m4_tu( @@ -183,7 +183,7 @@ vint32m4_t test_vwmulsu_vv_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vx_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m8_tu( @@ -192,7 +192,7 @@ vint32m4_t test_vwmulsu_vx_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vv_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulsu_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m8_tu( @@ -201,7 +201,7 @@ vint32m8_t test_vwmulsu_vv_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vx_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m1_tu( @@ -210,7 +210,7 @@ vint32m8_t test_vwmulsu_vx_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vv_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulsu_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m1_tu( @@ -219,7 +219,7 @@ vint64m1_t test_vwmulsu_vv_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vx_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m2_tu( @@ -228,7 +228,7 @@ vint64m1_t test_vwmulsu_vx_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, uint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vv_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulsu_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m2_tu( @@ -237,7 +237,7 @@ vint64m2_t test_vwmulsu_vv_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vx_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m4_tu( @@ -246,7 +246,7 @@ vint64m2_t test_vwmulsu_vx_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vv_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulsu_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m4_tu( @@ -255,7 +255,7 @@ vint64m4_t test_vwmulsu_vv_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vx_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m8_tu( @@ -264,7 +264,7 @@ vint64m4_t test_vwmulsu_vx_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vv_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulsu_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m8_tu( @@ -273,7 +273,7 @@ vint64m8_t test_vwmulsu_vv_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vx_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf4_tum( @@ -282,7 +282,7 @@ vint64m8_t test_vwmulsu_vx_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulsu_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf4_tum( @@ -291,7 +291,7 @@ vint16mf4_t test_vwmulsu_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf2_tum( @@ -300,7 +300,7 @@ vint16mf4_t test_vwmulsu_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulsu_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf2_tum( @@ -309,7 +309,7 @@ vint16mf2_t test_vwmulsu_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m1_tum( @@ -318,7 +318,7 @@ vint16mf2_t test_vwmulsu_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulsu_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m1_tum( @@ -327,7 +327,7 @@ vint16m1_t test_vwmulsu_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m2_tum( @@ -336,7 +336,7 @@ vint16m1_t test_vwmulsu_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulsu_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m2_tum( @@ -345,7 +345,7 @@ vint16m2_t test_vwmulsu_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m4_tum( @@ -354,7 +354,7 @@ vint16m2_t test_vwmulsu_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulsu_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m4_tum( @@ -363,7 +363,7 @@ vint16m4_t test_vwmulsu_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m8_tum( @@ -372,7 +372,7 @@ vint16m4_t test_vwmulsu_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulsu_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m8_tum( @@ -381,7 +381,7 @@ vint16m8_t test_vwmulsu_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32mf2_tum( @@ -390,7 +390,7 @@ vint16m8_t test_vwmulsu_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulsu_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32mf2_tum( @@ -399,7 +399,7 @@ vint32mf2_t test_vwmulsu_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m1_tum( @@ -408,7 +408,7 @@ vint32mf2_t test_vwmulsu_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vi // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulsu_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m1_tum( @@ -417,7 +417,7 @@ vint32m1_t test_vwmulsu_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m2_tum( @@ -426,7 +426,7 @@ vint32m1_t test_vwmulsu_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulsu_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m2_tum( @@ -435,7 +435,7 @@ vint32m2_t test_vwmulsu_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m4_tum( @@ -444,7 +444,7 @@ vint32m2_t test_vwmulsu_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulsu_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m4_tum( @@ -453,7 +453,7 @@ vint32m4_t test_vwmulsu_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m8_tum( @@ -462,7 +462,7 @@ vint32m4_t test_vwmulsu_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulsu_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m8_tum( @@ -471,7 +471,7 @@ vint32m8_t test_vwmulsu_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m1_tum( @@ -480,7 +480,7 @@ vint32m8_t test_vwmulsu_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulsu_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m1_tum( @@ -489,7 +489,7 @@ vint64m1_t test_vwmulsu_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m2_tum( @@ -498,7 +498,7 @@ vint64m1_t test_vwmulsu_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulsu_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m2_tum( @@ -507,7 +507,7 @@ vint64m2_t test_vwmulsu_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m4_tum( @@ -516,7 +516,7 @@ vint64m2_t test_vwmulsu_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulsu_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m4_tum( @@ -525,7 +525,7 @@ vint64m4_t test_vwmulsu_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m8_tum( @@ -534,7 +534,7 @@ vint64m4_t test_vwmulsu_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulsu_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m8_tum( @@ -543,7 +543,7 @@ vint64m8_t test_vwmulsu_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf4_tumu( @@ -552,7 +552,7 @@ vint64m8_t test_vwmulsu_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulsu_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf4_tumu( @@ -561,7 +561,7 @@ vint16mf4_t test_vwmulsu_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf2_tumu( @@ -570,7 +570,7 @@ vint16mf4_t test_vwmulsu_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulsu_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf2_tumu( @@ -579,7 +579,7 @@ vint16mf2_t test_vwmulsu_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m1_tumu( @@ -588,7 +588,7 @@ vint16mf2_t test_vwmulsu_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulsu_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m1_tumu( @@ -597,7 +597,7 @@ vint16m1_t test_vwmulsu_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m2_tumu( @@ -606,7 +606,7 @@ vint16m1_t test_vwmulsu_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulsu_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m2_tumu( @@ -615,7 +615,7 @@ vint16m2_t test_vwmulsu_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m4_tumu( @@ -624,7 +624,7 @@ vint16m2_t test_vwmulsu_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulsu_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m4_tumu( @@ -633,7 +633,7 @@ vint16m4_t test_vwmulsu_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m8_tumu( @@ -642,7 +642,7 @@ vint16m4_t test_vwmulsu_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulsu_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m8_tumu( @@ -651,7 +651,7 @@ vint16m8_t test_vwmulsu_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32mf2_tumu( @@ -660,7 +660,7 @@ vint16m8_t test_vwmulsu_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulsu_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32mf2_tumu( @@ -669,7 +669,7 @@ vint32mf2_t test_vwmulsu_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m1_tumu( @@ -678,7 +678,7 @@ vint32mf2_t test_vwmulsu_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulsu_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m1_tumu( @@ -687,7 +687,7 @@ vint32m1_t test_vwmulsu_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m2_tumu( @@ -696,7 +696,7 @@ vint32m1_t test_vwmulsu_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulsu_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m2_tumu( @@ -705,7 +705,7 @@ vint32m2_t test_vwmulsu_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m4_tumu( @@ -714,7 +714,7 @@ vint32m2_t test_vwmulsu_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulsu_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m4_tumu( @@ -723,7 +723,7 @@ vint32m4_t test_vwmulsu_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m8_tumu( @@ -732,7 +732,7 @@ vint32m4_t test_vwmulsu_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulsu_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m8_tumu( @@ -741,7 +741,7 @@ vint32m8_t test_vwmulsu_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m1_tumu( @@ -750,7 +750,7 @@ vint32m8_t test_vwmulsu_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulsu_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m1_tumu( @@ -759,7 +759,7 @@ vint64m1_t test_vwmulsu_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m2_tumu( @@ -768,7 +768,7 @@ vint64m1_t test_vwmulsu_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulsu_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m2_tumu( @@ -777,7 +777,7 @@ vint64m2_t test_vwmulsu_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m4_tumu( @@ -786,7 +786,7 @@ vint64m2_t test_vwmulsu_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulsu_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m4_tumu( @@ -795,7 +795,7 @@ vint64m4_t test_vwmulsu_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m8_tumu( @@ -804,7 +804,7 @@ vint64m4_t test_vwmulsu_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulsu_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m8_tumu( @@ -813,7 +813,7 @@ vint64m8_t test_vwmulsu_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf4_mu( @@ -822,7 +822,7 @@ vint64m8_t test_vwmulsu_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulsu_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf4_mu( @@ -831,7 +831,7 @@ vint16mf4_t test_vwmulsu_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwmulsu_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16mf2_mu( @@ -840,7 +840,7 @@ vint16mf4_t test_vwmulsu_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulsu_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16mf2_mu( @@ -849,7 +849,7 @@ vint16mf2_t test_vwmulsu_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwmulsu_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m1_mu( @@ -858,7 +858,7 @@ vint16mf2_t test_vwmulsu_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulsu_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m1_mu( @@ -867,7 +867,7 @@ vint16m1_t test_vwmulsu_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwmulsu_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m2_mu( @@ -876,7 +876,7 @@ vint16m1_t test_vwmulsu_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulsu_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m2_mu( @@ -885,7 +885,7 @@ vint16m2_t test_vwmulsu_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwmulsu_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m4_mu( @@ -894,7 +894,7 @@ vint16m2_t test_vwmulsu_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulsu_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m4_mu( @@ -903,7 +903,7 @@ vint16m4_t test_vwmulsu_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwmulsu_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i16m8_mu( @@ -912,7 +912,7 @@ vint16m4_t test_vwmulsu_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulsu_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i16m8_mu( @@ -921,7 +921,7 @@ vint16m8_t test_vwmulsu_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwmulsu_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulsu_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32mf2_mu( @@ -930,7 +930,7 @@ vint16m8_t test_vwmulsu_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulsu_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32mf2_mu( @@ -939,7 +939,7 @@ vint32mf2_t test_vwmulsu_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwmulsu_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m1_mu( @@ -948,7 +948,7 @@ vint32mf2_t test_vwmulsu_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulsu_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m1_mu( @@ -957,7 +957,7 @@ vint32m1_t test_vwmulsu_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwmulsu_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m2_mu( @@ -966,7 +966,7 @@ vint32m1_t test_vwmulsu_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulsu_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m2_mu( @@ -975,7 +975,7 @@ vint32m2_t test_vwmulsu_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwmulsu_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m4_mu( @@ -984,7 +984,7 @@ vint32m2_t test_vwmulsu_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulsu_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m4_mu( @@ -993,7 +993,7 @@ vint32m4_t test_vwmulsu_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwmulsu_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i32m8_mu( @@ -1002,7 +1002,7 @@ vint32m4_t test_vwmulsu_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulsu_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i32m8_mu( @@ -1011,7 +1011,7 @@ vint32m8_t test_vwmulsu_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwmulsu_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulsu_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m1_mu( @@ -1020,7 +1020,7 @@ vint32m8_t test_vwmulsu_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulsu_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m1_mu( @@ -1029,7 +1029,7 @@ vint64m1_t test_vwmulsu_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwmulsu_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m2_mu( @@ -1038,7 +1038,7 @@ vint64m1_t test_vwmulsu_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulsu_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m2_mu( @@ -1047,7 +1047,7 @@ vint64m2_t test_vwmulsu_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwmulsu_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m4_mu( @@ -1056,7 +1056,7 @@ vint64m2_t test_vwmulsu_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulsu_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m4_mu( @@ -1065,7 +1065,7 @@ vint64m4_t test_vwmulsu_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwmulsu_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vv_i64m8_mu( @@ -1074,7 +1074,7 @@ vint64m4_t test_vwmulsu_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulsu_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulsu_vx_i64m8_mu( @@ -1083,6 +1083,6 @@ vint64m8_t test_vwmulsu_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwmulsu_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulsu_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulsu_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmulu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmulu.c index 2f2f79319ba4ac5a3c6ddd6ac271b3f6a37dc62d..ac2479ce6d4b4b830b61a94fbd926f5cab8a082c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmulu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwmulu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf4_tu( @@ -21,7 +21,7 @@ vuint16mf4_t test_vwmulu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf2_tu( @@ -30,7 +30,7 @@ vuint16mf4_t test_vwmulu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf2_tu( @@ -39,7 +39,7 @@ vuint16mf2_t test_vwmulu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m1_tu( @@ -48,7 +48,7 @@ vuint16mf2_t test_vwmulu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m1_tu( @@ -57,7 +57,7 @@ vuint16m1_t test_vwmulu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m2_tu( @@ -66,7 +66,7 @@ vuint16m1_t test_vwmulu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m2_tu( @@ -75,7 +75,7 @@ vuint16m2_t test_vwmulu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m4_tu( @@ -84,7 +84,7 @@ vuint16m2_t test_vwmulu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m4_tu( @@ -93,7 +93,7 @@ vuint16m4_t test_vwmulu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m8_tu( @@ -102,7 +102,7 @@ vuint16m4_t test_vwmulu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m8_tu( @@ -111,7 +111,7 @@ vuint16m8_t test_vwmulu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32mf2_tu( @@ -120,7 +120,7 @@ vuint16m8_t test_vwmulu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32mf2_tu( @@ -129,7 +129,7 @@ vuint32mf2_t test_vwmulu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m1_tu( @@ -138,7 +138,7 @@ vuint32mf2_t test_vwmulu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m1_tu( @@ -147,7 +147,7 @@ vuint32m1_t test_vwmulu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m2_tu( @@ -156,7 +156,7 @@ vuint32m1_t test_vwmulu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m2_tu( @@ -165,7 +165,7 @@ vuint32m2_t test_vwmulu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m4_tu( @@ -174,7 +174,7 @@ vuint32m2_t test_vwmulu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m4_tu( @@ -183,7 +183,7 @@ vuint32m4_t test_vwmulu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m8_tu( @@ -192,7 +192,7 @@ vuint32m4_t test_vwmulu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m8_tu( @@ -201,7 +201,7 @@ vuint32m8_t test_vwmulu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m1_tu( @@ -210,7 +210,7 @@ vuint32m8_t test_vwmulu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m1_tu( @@ -219,7 +219,7 @@ vuint64m1_t test_vwmulu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m2_tu( @@ -228,7 +228,7 @@ vuint64m1_t test_vwmulu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m2_tu( @@ -237,7 +237,7 @@ vuint64m2_t test_vwmulu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m4_tu( @@ -246,7 +246,7 @@ vuint64m2_t test_vwmulu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m4_tu( @@ -255,7 +255,7 @@ vuint64m4_t test_vwmulu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m8_tu( @@ -264,7 +264,7 @@ vuint64m4_t test_vwmulu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m8_tu( @@ -273,7 +273,7 @@ vuint64m8_t test_vwmulu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf4_tum( @@ -282,7 +282,7 @@ vuint64m8_t test_vwmulu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf4_tum( @@ -291,7 +291,7 @@ vuint16mf4_t test_vwmulu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf2_tum( @@ -300,7 +300,7 @@ vuint16mf4_t test_vwmulu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf2_tum( @@ -309,7 +309,7 @@ vuint16mf2_t test_vwmulu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m1_tum( @@ -318,7 +318,7 @@ vuint16mf2_t test_vwmulu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m1_tum( @@ -327,7 +327,7 @@ vuint16m1_t test_vwmulu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m2_tum( @@ -336,7 +336,7 @@ vuint16m1_t test_vwmulu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m2_tum( @@ -345,7 +345,7 @@ vuint16m2_t test_vwmulu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m4_tum( @@ -354,7 +354,7 @@ vuint16m2_t test_vwmulu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m4_tum( @@ -363,7 +363,7 @@ vuint16m4_t test_vwmulu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m8_tum( @@ -372,7 +372,7 @@ vuint16m4_t test_vwmulu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m8_tum( @@ -381,7 +381,7 @@ vuint16m8_t test_vwmulu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32mf2_tum( @@ -390,7 +390,7 @@ vuint16m8_t test_vwmulu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32mf2_tum( @@ -399,7 +399,7 @@ vuint32mf2_t test_vwmulu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m1_tum( @@ -408,7 +408,7 @@ vuint32mf2_t test_vwmulu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m1_tum( @@ -417,7 +417,7 @@ vuint32m1_t test_vwmulu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m2_tum( @@ -426,7 +426,7 @@ vuint32m1_t test_vwmulu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m2_tum( @@ -435,7 +435,7 @@ vuint32m2_t test_vwmulu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m4_tum( @@ -444,7 +444,7 @@ vuint32m2_t test_vwmulu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m4_tum( @@ -453,7 +453,7 @@ vuint32m4_t test_vwmulu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m8_tum( @@ -462,7 +462,7 @@ vuint32m4_t test_vwmulu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m8_tum( @@ -471,7 +471,7 @@ vuint32m8_t test_vwmulu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m1_tum( @@ -480,7 +480,7 @@ vuint32m8_t test_vwmulu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m1_tum( @@ -489,7 +489,7 @@ vuint64m1_t test_vwmulu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m2_tum( @@ -498,7 +498,7 @@ vuint64m1_t test_vwmulu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m2_tum( @@ -507,7 +507,7 @@ vuint64m2_t test_vwmulu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m4_tum( @@ -516,7 +516,7 @@ vuint64m2_t test_vwmulu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m4_tum( @@ -525,7 +525,7 @@ vuint64m4_t test_vwmulu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m8_tum( @@ -534,7 +534,7 @@ vuint64m4_t test_vwmulu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m8_tum( @@ -543,7 +543,7 @@ vuint64m8_t test_vwmulu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf4_tumu( @@ -552,7 +552,7 @@ vuint64m8_t test_vwmulu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf4_tumu( @@ -561,7 +561,7 @@ vuint16mf4_t test_vwmulu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf2_tumu( @@ -570,7 +570,7 @@ vuint16mf4_t test_vwmulu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf2_tumu( @@ -579,7 +579,7 @@ vuint16mf2_t test_vwmulu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m1_tumu( @@ -588,7 +588,7 @@ vuint16mf2_t test_vwmulu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m1_tumu( @@ -597,7 +597,7 @@ vuint16m1_t test_vwmulu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m2_tumu( @@ -606,7 +606,7 @@ vuint16m1_t test_vwmulu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m2_tumu( @@ -615,7 +615,7 @@ vuint16m2_t test_vwmulu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m4_tumu( @@ -624,7 +624,7 @@ vuint16m2_t test_vwmulu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m4_tumu( @@ -633,7 +633,7 @@ vuint16m4_t test_vwmulu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m8_tumu( @@ -642,7 +642,7 @@ vuint16m4_t test_vwmulu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m8_tumu( @@ -651,7 +651,7 @@ vuint16m8_t test_vwmulu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32mf2_tumu( @@ -660,7 +660,7 @@ vuint16m8_t test_vwmulu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32mf2_tumu( @@ -669,7 +669,7 @@ vuint32mf2_t test_vwmulu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m1_tumu( @@ -678,7 +678,7 @@ vuint32mf2_t test_vwmulu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m1_tumu( @@ -687,7 +687,7 @@ vuint32m1_t test_vwmulu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m2_tumu( @@ -696,7 +696,7 @@ vuint32m1_t test_vwmulu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m2_tumu( @@ -705,7 +705,7 @@ vuint32m2_t test_vwmulu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m4_tumu( @@ -714,7 +714,7 @@ vuint32m2_t test_vwmulu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m4_tumu( @@ -723,7 +723,7 @@ vuint32m4_t test_vwmulu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m8_tumu( @@ -732,7 +732,7 @@ vuint32m4_t test_vwmulu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m8_tumu( @@ -741,7 +741,7 @@ vuint32m8_t test_vwmulu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m1_tumu( @@ -750,7 +750,7 @@ vuint32m8_t test_vwmulu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m1_tumu( @@ -759,7 +759,7 @@ vuint64m1_t test_vwmulu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m2_tumu( @@ -768,7 +768,7 @@ vuint64m1_t test_vwmulu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m2_tumu( @@ -777,7 +777,7 @@ vuint64m2_t test_vwmulu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m4_tumu( @@ -786,7 +786,7 @@ vuint64m2_t test_vwmulu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m4_tumu( @@ -795,7 +795,7 @@ vuint64m4_t test_vwmulu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m8_tumu( @@ -804,7 +804,7 @@ vuint64m4_t test_vwmulu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m8_tumu( @@ -813,7 +813,7 @@ vuint64m8_t test_vwmulu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf4_mu( @@ -822,7 +822,7 @@ vuint64m8_t test_vwmulu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwmulu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf4_mu( @@ -831,7 +831,7 @@ vuint16mf4_t test_vwmulu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwmulu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16mf2_mu( @@ -840,7 +840,7 @@ vuint16mf4_t test_vwmulu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwmulu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16mf2_mu( @@ -849,7 +849,7 @@ vuint16mf2_t test_vwmulu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwmulu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m1_mu( @@ -858,7 +858,7 @@ vuint16mf2_t test_vwmulu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwmulu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m1_mu( @@ -867,7 +867,7 @@ vuint16m1_t test_vwmulu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwmulu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m2_mu( @@ -876,7 +876,7 @@ vuint16m1_t test_vwmulu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwmulu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m2_mu( @@ -885,7 +885,7 @@ vuint16m2_t test_vwmulu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwmulu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m4_mu( @@ -894,7 +894,7 @@ vuint16m2_t test_vwmulu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwmulu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m4_mu( @@ -903,7 +903,7 @@ vuint16m4_t test_vwmulu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwmulu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u16m8_mu( @@ -912,7 +912,7 @@ vuint16m4_t test_vwmulu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwmulu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u16m8_mu( @@ -921,7 +921,7 @@ vuint16m8_t test_vwmulu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwmulu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwmulu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32mf2_mu( @@ -930,7 +930,7 @@ vuint16m8_t test_vwmulu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwmulu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32mf2_mu( @@ -939,7 +939,7 @@ vuint32mf2_t test_vwmulu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwmulu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m1_mu( @@ -948,7 +948,7 @@ vuint32mf2_t test_vwmulu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwmulu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m1_mu( @@ -957,7 +957,7 @@ vuint32m1_t test_vwmulu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwmulu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m2_mu( @@ -966,7 +966,7 @@ vuint32m1_t test_vwmulu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwmulu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m2_mu( @@ -975,7 +975,7 @@ vuint32m2_t test_vwmulu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwmulu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m4_mu( @@ -984,7 +984,7 @@ vuint32m2_t test_vwmulu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwmulu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m4_mu( @@ -993,7 +993,7 @@ vuint32m4_t test_vwmulu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwmulu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u32m8_mu( @@ -1002,7 +1002,7 @@ vuint32m4_t test_vwmulu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwmulu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u32m8_mu( @@ -1011,7 +1011,7 @@ vuint32m8_t test_vwmulu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwmulu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwmulu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m1_mu( @@ -1020,7 +1020,7 @@ vuint32m8_t test_vwmulu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwmulu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m1_mu( @@ -1029,7 +1029,7 @@ vuint64m1_t test_vwmulu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwmulu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m2_mu( @@ -1038,7 +1038,7 @@ vuint64m1_t test_vwmulu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwmulu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m2_mu( @@ -1047,7 +1047,7 @@ vuint64m2_t test_vwmulu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwmulu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m4_mu( @@ -1056,7 +1056,7 @@ vuint64m2_t test_vwmulu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwmulu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m4_mu( @@ -1065,7 +1065,7 @@ vuint64m4_t test_vwmulu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwmulu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vv_u64m8_mu( @@ -1074,7 +1074,7 @@ vuint64m4_t test_vwmulu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwmulu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwmulu_vx_u64m8_mu( @@ -1083,6 +1083,6 @@ vuint64m8_t test_vwmulu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwmulu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwmulu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwmulu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwredsum.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwredsum.c index d944afb1b7939c45a18d9f5ab8ca9e5c6f86582f..bf61fb2984bcf320715ce87423855f60bd29ff9c 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwredsum.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwredsum.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf8_i16m1_tu(vint16m1_t maskedoff, vint8mf8_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf8_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf8_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf4_i16m1_tu( @@ -21,7 +21,7 @@ vint16m1_t test_vwredsum_vs_i8mf8_i16m1_tu(vint16m1_t maskedoff, vint8mf8_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf4_i16m1_tu(vint16m1_t maskedoff, vint8mf4_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf2_i16m1_tu( @@ -30,7 +30,7 @@ vint16m1_t test_vwredsum_vs_i8mf4_i16m1_tu(vint16m1_t maskedoff, vint8mf4_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf2_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m1_i16m1_tu( @@ -39,7 +39,7 @@ vint16m1_t test_vwredsum_vs_i8mf2_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m1_i16m1_tu(vint16m1_t maskedoff, vint8m1_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m1_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m1_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m2_i16m1_tu( @@ -48,7 +48,7 @@ vint16m1_t test_vwredsum_vs_i8m1_i16m1_tu(vint16m1_t maskedoff, vint8m1_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m2_i16m1_tu(vint16m1_t maskedoff, vint8m2_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m2_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m2_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m4_i16m1_tu( @@ -57,7 +57,7 @@ vint16m1_t test_vwredsum_vs_i8m2_i16m1_tu(vint16m1_t maskedoff, vint8m2_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m4_i16m1_tu(vint16m1_t maskedoff, vint8m4_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m4_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m4_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m8_i16m1_tu( @@ -66,7 +66,7 @@ vint16m1_t test_vwredsum_vs_i8m4_i16m1_tu(vint16m1_t maskedoff, vint8m4_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m8_i16m1_tu(vint16m1_t maskedoff, vint8m8_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m8_i16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m8_i16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16mf4_i32m1_tu( @@ -75,7 +75,7 @@ vint16m1_t test_vwredsum_vs_i8m8_i16m1_tu(vint16m1_t maskedoff, vint8m8_t vector // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16mf4_i32m1_tu(vint32m1_t maskedoff, vint16mf4_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16mf4_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16mf4_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16mf2_i32m1_tu( @@ -84,7 +84,7 @@ vint32m1_t test_vwredsum_vs_i16mf4_i32m1_tu(vint32m1_t maskedoff, vint16mf4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16mf2_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16mf2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16mf2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m1_i32m1_tu( @@ -93,7 +93,7 @@ vint32m1_t test_vwredsum_vs_i16mf2_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m1_i32m1_tu(vint32m1_t maskedoff, vint16m1_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m1_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m1_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m2_i32m1_tu( @@ -102,7 +102,7 @@ vint32m1_t test_vwredsum_vs_i16m1_i32m1_tu(vint32m1_t maskedoff, vint16m1_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m2_i32m1_tu(vint32m1_t maskedoff, vint16m2_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m2_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m2_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m4_i32m1_tu( @@ -111,7 +111,7 @@ vint32m1_t test_vwredsum_vs_i16m2_i32m1_tu(vint32m1_t maskedoff, vint16m2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m4_i32m1_tu(vint32m1_t maskedoff, vint16m4_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m4_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m4_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m8_i32m1_tu( @@ -120,7 +120,7 @@ vint32m1_t test_vwredsum_vs_i16m4_i32m1_tu(vint32m1_t maskedoff, vint16m4_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m8_i32m1_tu(vint32m1_t maskedoff, vint16m8_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m8_i32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m8_i32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32mf2_i64m1_tu( @@ -129,7 +129,7 @@ vint32m1_t test_vwredsum_vs_i16m8_i32m1_tu(vint32m1_t maskedoff, vint16m8_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32mf2_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32mf2_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32mf2_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m1_i64m1_tu( @@ -138,7 +138,7 @@ vint64m1_t test_vwredsum_vs_i32mf2_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m1_i64m1_tu(vint64m1_t maskedoff, vint32m1_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m1_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m1_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m2_i64m1_tu( @@ -147,7 +147,7 @@ vint64m1_t test_vwredsum_vs_i32m1_i64m1_tu(vint64m1_t maskedoff, vint32m1_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m2_i64m1_tu(vint64m1_t maskedoff, vint32m2_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m2_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m2_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m4_i64m1_tu( @@ -156,7 +156,7 @@ vint64m1_t test_vwredsum_vs_i32m2_i64m1_tu(vint64m1_t maskedoff, vint32m2_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m4_i64m1_tu(vint64m1_t maskedoff, vint32m4_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m4_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m4_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m8_i64m1_tu( @@ -165,7 +165,7 @@ vint64m1_t test_vwredsum_vs_i32m4_i64m1_tu(vint64m1_t maskedoff, vint32m4_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m8_i64m1_tu(vint64m1_t maskedoff, vint32m8_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m8_i64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m8_i64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf8_i16m1_tum( @@ -174,7 +174,7 @@ vint64m1_t test_vwredsum_vs_i32m8_i64m1_tu(vint64m1_t maskedoff, vint32m8_t vect // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf8_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff, vint8mf8_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf8_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf8_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf4_i16m1_tum( @@ -183,7 +183,7 @@ vint16m1_t test_vwredsum_vs_i8mf8_i16m1_tum(vbool64_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf4_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff, vint8mf4_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8mf2_i16m1_tum( @@ -192,7 +192,7 @@ vint16m1_t test_vwredsum_vs_i8mf4_i16m1_tum(vbool32_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8mf2_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8mf2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m1_i16m1_tum( @@ -201,7 +201,7 @@ vint16m1_t test_vwredsum_vs_i8mf2_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m1_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, vint8m1_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m1_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m2_i16m1_tum( @@ -210,7 +210,7 @@ vint16m1_t test_vwredsum_vs_i8m1_i16m1_tum(vbool8_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m2_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, vint8m2_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m2_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m4_i16m1_tum( @@ -219,7 +219,7 @@ vint16m1_t test_vwredsum_vs_i8m2_i16m1_tum(vbool4_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m4_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, vint8m4_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m4_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i8m8_i16m1_tum( @@ -228,7 +228,7 @@ vint16m1_t test_vwredsum_vs_i8m4_i16m1_tum(vbool2_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwredsum_vs_i8m8_i16m1_tum(vbool1_t mask, vint16m1_t maskedoff, vint8m8_t vector, vint16m1_t scalar, size_t vl) { - return vwredsum_vs_i8m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i8m8_i16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16mf4_i32m1_tum( @@ -237,7 +237,7 @@ vint16m1_t test_vwredsum_vs_i8m8_i16m1_tum(vbool1_t mask, vint16m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16mf4_i32m1_tum(vbool64_t mask, vint32m1_t maskedoff, vint16mf4_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16mf4_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16mf4_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16mf2_i32m1_tum( @@ -246,7 +246,7 @@ vint32m1_t test_vwredsum_vs_i16mf4_i32m1_tum(vbool64_t mask, vint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16mf2_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16mf2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m1_i32m1_tum( @@ -255,7 +255,7 @@ vint32m1_t test_vwredsum_vs_i16mf2_i32m1_tum(vbool32_t mask, vint32m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m1_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff, vint16m1_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m1_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m2_i32m1_tum( @@ -264,7 +264,7 @@ vint32m1_t test_vwredsum_vs_i16m1_i32m1_tum(vbool16_t mask, vint32m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m2_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, vint16m2_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m2_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m4_i32m1_tum( @@ -273,7 +273,7 @@ vint32m1_t test_vwredsum_vs_i16m2_i32m1_tum(vbool8_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m4_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, vint16m4_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m4_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i16m8_i32m1_tum( @@ -282,7 +282,7 @@ vint32m1_t test_vwredsum_vs_i16m4_i32m1_tum(vbool4_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwredsum_vs_i16m8_i32m1_tum(vbool2_t mask, vint32m1_t maskedoff, vint16m8_t vector, vint32m1_t scalar, size_t vl) { - return vwredsum_vs_i16m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i16m8_i32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32mf2_i64m1_tum( @@ -291,7 +291,7 @@ vint32m1_t test_vwredsum_vs_i16m8_i32m1_tum(vbool2_t mask, vint32m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32mf2_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32mf2_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32mf2_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m1_i64m1_tum( @@ -300,7 +300,7 @@ vint64m1_t test_vwredsum_vs_i32mf2_i64m1_tum(vbool64_t mask, vint64m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m1_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff, vint32m1_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m1_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m2_i64m1_tum( @@ -309,7 +309,7 @@ vint64m1_t test_vwredsum_vs_i32m1_i64m1_tum(vbool32_t mask, vint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m2_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff, vint32m2_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m2_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m4_i64m1_tum( @@ -318,7 +318,7 @@ vint64m1_t test_vwredsum_vs_i32m2_i64m1_tum(vbool16_t mask, vint64m1_t maskedoff // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m4_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, vint32m4_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m4_i64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsum_vs_i32m8_i64m1_tum( @@ -327,6 +327,6 @@ vint64m1_t test_vwredsum_vs_i32m4_i64m1_tum(vbool8_t mask, vint64m1_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwredsum_vs_i32m8_i64m1_tum(vbool4_t mask, vint64m1_t maskedoff, vint32m8_t vector, vint64m1_t scalar, size_t vl) { - return vwredsum_vs_i32m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsum_vs_i32m8_i64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwredsumu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwredsumu.c index dc063a125278e403250285fe9b040da97321499b..72eebb173f00551bb8962c31e0d56904cc1f1608 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwredsumu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwredsumu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf8_u16m1_tu(vuint16m1_t maskedoff, vuint8mf8_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf8_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf8_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf4_u16m1_tu( @@ -21,7 +21,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf8_u16m1_tu(vuint16m1_t maskedoff, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf4_u16m1_tu(vuint16m1_t maskedoff, vuint8mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf2_u16m1_tu( @@ -30,7 +30,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf4_u16m1_tu(vuint16m1_t maskedoff, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf2_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m1_u16m1_tu( @@ -39,7 +39,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf2_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m1_u16m1_tu(vuint16m1_t maskedoff, vuint8m1_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m1_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m1_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m2_u16m1_tu( @@ -48,7 +48,7 @@ vuint16m1_t test_vwredsumu_vs_u8m1_u16m1_tu(vuint16m1_t maskedoff, vuint8m1_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m2_u16m1_tu(vuint16m1_t maskedoff, vuint8m2_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m2_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m2_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m4_u16m1_tu( @@ -57,7 +57,7 @@ vuint16m1_t test_vwredsumu_vs_u8m2_u16m1_tu(vuint16m1_t maskedoff, vuint8m2_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m4_u16m1_tu(vuint16m1_t maskedoff, vuint8m4_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m4_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m4_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m8_u16m1_tu( @@ -66,7 +66,7 @@ vuint16m1_t test_vwredsumu_vs_u8m4_u16m1_tu(vuint16m1_t maskedoff, vuint8m4_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m8_u16m1_tu(vuint16m1_t maskedoff, vuint8m8_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m8_u16m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m8_u16m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16mf4_u32m1_tu( @@ -75,7 +75,7 @@ vuint16m1_t test_vwredsumu_vs_u8m8_u16m1_tu(vuint16m1_t maskedoff, vuint8m8_t ve // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16mf4_u32m1_tu(vuint32m1_t maskedoff, vuint16mf4_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16mf4_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16mf4_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16mf2_u32m1_tu( @@ -84,7 +84,7 @@ vuint32m1_t test_vwredsumu_vs_u16mf4_u32m1_tu(vuint32m1_t maskedoff, vuint16mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16mf2_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16mf2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16mf2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m1_u32m1_tu( @@ -93,7 +93,7 @@ vuint32m1_t test_vwredsumu_vs_u16mf2_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m1_u32m1_tu(vuint32m1_t maskedoff, vuint16m1_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m1_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m1_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m2_u32m1_tu( @@ -102,7 +102,7 @@ vuint32m1_t test_vwredsumu_vs_u16m1_u32m1_tu(vuint32m1_t maskedoff, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m2_u32m1_tu(vuint32m1_t maskedoff, vuint16m2_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m2_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m2_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m4_u32m1_tu( @@ -111,7 +111,7 @@ vuint32m1_t test_vwredsumu_vs_u16m2_u32m1_tu(vuint32m1_t maskedoff, vuint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m4_u32m1_tu(vuint32m1_t maskedoff, vuint16m4_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m4_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m4_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m8_u32m1_tu( @@ -120,7 +120,7 @@ vuint32m1_t test_vwredsumu_vs_u16m4_u32m1_tu(vuint32m1_t maskedoff, vuint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m8_u32m1_tu(vuint32m1_t maskedoff, vuint16m8_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m8_u32m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m8_u32m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32mf2_u64m1_tu( @@ -129,7 +129,7 @@ vuint32m1_t test_vwredsumu_vs_u16m8_u32m1_tu(vuint32m1_t maskedoff, vuint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32mf2_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32mf2_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32mf2_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m1_u64m1_tu( @@ -138,7 +138,7 @@ vuint64m1_t test_vwredsumu_vs_u32mf2_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m1_u64m1_tu(vuint64m1_t maskedoff, vuint32m1_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m1_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m1_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m2_u64m1_tu( @@ -147,7 +147,7 @@ vuint64m1_t test_vwredsumu_vs_u32m1_u64m1_tu(vuint64m1_t maskedoff, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m2_u64m1_tu(vuint64m1_t maskedoff, vuint32m2_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m2_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m2_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m4_u64m1_tu( @@ -156,7 +156,7 @@ vuint64m1_t test_vwredsumu_vs_u32m2_u64m1_tu(vuint64m1_t maskedoff, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m4_u64m1_tu(vuint64m1_t maskedoff, vuint32m4_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m4_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m4_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m8_u64m1_tu( @@ -165,7 +165,7 @@ vuint64m1_t test_vwredsumu_vs_u32m4_u64m1_tu(vuint64m1_t maskedoff, vuint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m8_u64m1_tu(vuint64m1_t maskedoff, vuint32m8_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m8_u64m1_tu(maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m8_u64m1_tu(maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf8_u16m1_tum( @@ -174,7 +174,7 @@ vuint64m1_t test_vwredsumu_vs_u32m8_u64m1_tu(vuint64m1_t maskedoff, vuint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf8_u16m1_tum(vbool64_t mask, vuint16m1_t maskedoff, vuint8mf8_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf8_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf8_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf4_u16m1_tum( @@ -183,7 +183,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf8_u16m1_tum(vbool64_t mask, vuint16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf4_u16m1_tum(vbool32_t mask, vuint16m1_t maskedoff, vuint8mf4_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8mf2_u16m1_tum( @@ -192,7 +192,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf4_u16m1_tum(vbool32_t mask, vuint16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8mf2_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8mf2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m1_u16m1_tum( @@ -201,7 +201,7 @@ vuint16m1_t test_vwredsumu_vs_u8mf2_u16m1_tum(vbool16_t mask, vuint16m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m1_u16m1_tum(vbool8_t mask, vuint16m1_t maskedoff, vuint8m1_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m1_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m2_u16m1_tum( @@ -210,7 +210,7 @@ vuint16m1_t test_vwredsumu_vs_u8m1_u16m1_tum(vbool8_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m2_u16m1_tum(vbool4_t mask, vuint16m1_t maskedoff, vuint8m2_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m2_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m4_u16m1_tum( @@ -219,7 +219,7 @@ vuint16m1_t test_vwredsumu_vs_u8m2_u16m1_tum(vbool4_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m4_u16m1_tum(vbool2_t mask, vuint16m1_t maskedoff, vuint8m4_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m4_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u8m8_u16m1_tum( @@ -228,7 +228,7 @@ vuint16m1_t test_vwredsumu_vs_u8m4_u16m1_tum(vbool2_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwredsumu_vs_u8m8_u16m1_tum(vbool1_t mask, vuint16m1_t maskedoff, vuint8m8_t vector, vuint16m1_t scalar, size_t vl) { - return vwredsumu_vs_u8m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u8m8_u16m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16mf4_u32m1_tum( @@ -237,7 +237,7 @@ vuint16m1_t test_vwredsumu_vs_u8m8_u16m1_tum(vbool1_t mask, vuint16m1_t maskedof // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16mf4_u32m1_tum(vbool64_t mask, vuint32m1_t maskedoff, vuint16mf4_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16mf4_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16mf4_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16mf2_u32m1_tum( @@ -246,7 +246,7 @@ vuint32m1_t test_vwredsumu_vs_u16mf4_u32m1_tum(vbool64_t mask, vuint32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16mf2_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16mf2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m1_u32m1_tum( @@ -255,7 +255,7 @@ vuint32m1_t test_vwredsumu_vs_u16mf2_u32m1_tum(vbool32_t mask, vuint32m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m1_u32m1_tum(vbool16_t mask, vuint32m1_t maskedoff, vuint16m1_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m1_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m2_u32m1_tum( @@ -264,7 +264,7 @@ vuint32m1_t test_vwredsumu_vs_u16m1_u32m1_tum(vbool16_t mask, vuint32m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m2_u32m1_tum(vbool8_t mask, vuint32m1_t maskedoff, vuint16m2_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m2_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m4_u32m1_tum( @@ -273,7 +273,7 @@ vuint32m1_t test_vwredsumu_vs_u16m2_u32m1_tum(vbool8_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m4_u32m1_tum(vbool4_t mask, vuint32m1_t maskedoff, vuint16m4_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m4_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u16m8_u32m1_tum( @@ -282,7 +282,7 @@ vuint32m1_t test_vwredsumu_vs_u16m4_u32m1_tum(vbool4_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwredsumu_vs_u16m8_u32m1_tum(vbool2_t mask, vuint32m1_t maskedoff, vuint16m8_t vector, vuint32m1_t scalar, size_t vl) { - return vwredsumu_vs_u16m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u16m8_u32m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32mf2_u64m1_tum( @@ -291,7 +291,7 @@ vuint32m1_t test_vwredsumu_vs_u16m8_u32m1_tum(vbool2_t mask, vuint32m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32mf2_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32mf2_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32mf2_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m1_u64m1_tum( @@ -300,7 +300,7 @@ vuint64m1_t test_vwredsumu_vs_u32mf2_u64m1_tum(vbool64_t mask, vuint64m1_t maske // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m1_u64m1_tum(vbool32_t mask, vuint64m1_t maskedoff, vuint32m1_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m1_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m2_u64m1_tum( @@ -309,7 +309,7 @@ vuint64m1_t test_vwredsumu_vs_u32m1_u64m1_tum(vbool32_t mask, vuint64m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m2_u64m1_tum(vbool16_t mask, vuint64m1_t maskedoff, vuint32m2_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m2_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m4_u64m1_tum( @@ -318,7 +318,7 @@ vuint64m1_t test_vwredsumu_vs_u32m2_u64m1_tum(vbool16_t mask, vuint64m1_t masked // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m4_u64m1_tum(vbool8_t mask, vuint64m1_t maskedoff, vuint32m4_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m4_u64m1_tum(mask, maskedoff, vector, scalar, vl); } // CHECK-RV64-LABEL: @test_vwredsumu_vs_u32m8_u64m1_tum( @@ -327,6 +327,6 @@ vuint64m1_t test_vwredsumu_vs_u32m4_u64m1_tum(vbool8_t mask, vuint64m1_t maskedo // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwredsumu_vs_u32m8_u64m1_tum(vbool4_t mask, vuint64m1_t maskedoff, vuint32m8_t vector, vuint64m1_t scalar, size_t vl) { - return vwredsumu_vs_u32m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); + return __riscv_vwredsumu_vs_u32m8_u64m1_tum(mask, maskedoff, vector, scalar, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsub.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsub.c index 105e73b8b7a7d9b1d2f950fb8d6a7de71d619b17..7314a192cc3b8f135c3f69185366e98bc1882269 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsub.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsub.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vv_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf4_tu( @@ -21,7 +21,7 @@ vint16mf4_t test_vwsub_vv_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf4_tu( @@ -30,7 +30,7 @@ vint16mf4_t test_vwsub_vx_i16mf4_tu(vint16mf4_t maskedoff, vint8mf8_t op1, int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_wv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf4_tu( @@ -39,7 +39,7 @@ vint16mf4_t test_vwsub_wv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf2_tu( @@ -48,7 +48,7 @@ vint16mf4_t test_vwsub_wx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vv_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf2_tu( @@ -57,7 +57,7 @@ vint16mf2_t test_vwsub_vv_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf2_tu( @@ -66,7 +66,7 @@ vint16mf2_t test_vwsub_vx_i16mf2_tu(vint16mf2_t maskedoff, vint8mf4_t op1, int8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_wv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf2_tu( @@ -75,7 +75,7 @@ vint16mf2_t test_vwsub_wv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m1_tu( @@ -84,7 +84,7 @@ vint16mf2_t test_vwsub_wx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vv_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m1_tu( @@ -93,7 +93,7 @@ vint16m1_t test_vwsub_vv_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vx_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m1_tu( @@ -102,7 +102,7 @@ vint16m1_t test_vwsub_vx_i16m1_tu(vint16m1_t maskedoff, vint8mf2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_wv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m1_tu( @@ -111,7 +111,7 @@ vint16m1_t test_vwsub_wv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m2_tu( @@ -120,7 +120,7 @@ vint16m1_t test_vwsub_wx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vv_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwsub_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m2_tu( @@ -129,7 +129,7 @@ vint16m2_t test_vwsub_vv_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vx_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m2_tu( @@ -138,7 +138,7 @@ vint16m2_t test_vwsub_vx_i16m2_tu(vint16m2_t maskedoff, vint8m1_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwsub_wv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m2_tu( @@ -147,7 +147,7 @@ vint16m2_t test_vwsub_wv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m4_tu( @@ -156,7 +156,7 @@ vint16m2_t test_vwsub_wx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vv_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwsub_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m4_tu( @@ -165,7 +165,7 @@ vint16m4_t test_vwsub_vv_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vx_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m4_tu( @@ -174,7 +174,7 @@ vint16m4_t test_vwsub_vx_i16m4_tu(vint16m4_t maskedoff, vint8m2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwsub_wv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m4_tu( @@ -183,7 +183,7 @@ vint16m4_t test_vwsub_wv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m8_tu( @@ -192,7 +192,7 @@ vint16m4_t test_vwsub_wx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vv_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwsub_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m8_tu( @@ -201,7 +201,7 @@ vint16m8_t test_vwsub_vv_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vx_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m8_tu( @@ -210,7 +210,7 @@ vint16m8_t test_vwsub_vx_i16m8_tu(vint16m8_t maskedoff, vint8m4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwsub_wv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m8_tu( @@ -219,7 +219,7 @@ vint16m8_t test_vwsub_wv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32mf2_tu( @@ -228,7 +228,7 @@ vint16m8_t test_vwsub_wx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vv_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32mf2_tu( @@ -237,7 +237,7 @@ vint32mf2_t test_vwsub_vv_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32mf2_tu( @@ -246,7 +246,7 @@ vint32mf2_t test_vwsub_vx_i32mf2_tu(vint32mf2_t maskedoff, vint16mf4_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_wv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vwsub_wv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vwsub_wx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vv_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vwsub_vv_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vx_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m1_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vwsub_vx_i32m1_tu(vint32m1_t maskedoff, vint16mf2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_wv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m1_tu( @@ -291,7 +291,7 @@ vint32m1_t test_vwsub_wv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m2_tu( @@ -300,7 +300,7 @@ vint32m1_t test_vwsub_wx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vv_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwsub_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m2_tu( @@ -309,7 +309,7 @@ vint32m2_t test_vwsub_vv_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vx_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m2_tu( @@ -318,7 +318,7 @@ vint32m2_t test_vwsub_vx_i32m2_tu(vint32m2_t maskedoff, vint16m1_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwsub_wv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m2_tu( @@ -327,7 +327,7 @@ vint32m2_t test_vwsub_wv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m4_tu( @@ -336,7 +336,7 @@ vint32m2_t test_vwsub_wx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vv_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwsub_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m4_tu( @@ -345,7 +345,7 @@ vint32m4_t test_vwsub_vv_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vx_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m4_tu( @@ -354,7 +354,7 @@ vint32m4_t test_vwsub_vx_i32m4_tu(vint32m4_t maskedoff, vint16m2_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwsub_wv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m4_tu( @@ -363,7 +363,7 @@ vint32m4_t test_vwsub_wv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m8_tu( @@ -372,7 +372,7 @@ vint32m4_t test_vwsub_wx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vv_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwsub_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m8_tu( @@ -381,7 +381,7 @@ vint32m8_t test_vwsub_vv_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vx_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m8_tu( @@ -390,7 +390,7 @@ vint32m8_t test_vwsub_vx_i32m8_tu(vint32m8_t maskedoff, vint16m4_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwsub_wv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m8_tu( @@ -399,7 +399,7 @@ vint32m8_t test_vwsub_wv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m1_tu( @@ -408,7 +408,7 @@ vint32m8_t test_vwsub_wx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vv_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m1_tu( @@ -417,7 +417,7 @@ vint64m1_t test_vwsub_vv_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vx_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m1_tu( @@ -426,7 +426,7 @@ vint64m1_t test_vwsub_vx_i64m1_tu(vint64m1_t maskedoff, vint32mf2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_wv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m1_tu( @@ -435,7 +435,7 @@ vint64m1_t test_vwsub_wv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m2_tu( @@ -444,7 +444,7 @@ vint64m1_t test_vwsub_wx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vv_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwsub_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m2_tu( @@ -453,7 +453,7 @@ vint64m2_t test_vwsub_vv_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vx_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m2_tu( @@ -462,7 +462,7 @@ vint64m2_t test_vwsub_vx_i64m2_tu(vint64m2_t maskedoff, vint32m1_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwsub_wv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m2_tu( @@ -471,7 +471,7 @@ vint64m2_t test_vwsub_wv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m4_tu( @@ -480,7 +480,7 @@ vint64m2_t test_vwsub_wx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vv_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwsub_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m4_tu( @@ -489,7 +489,7 @@ vint64m4_t test_vwsub_vv_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vx_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m4_tu( @@ -498,7 +498,7 @@ vint64m4_t test_vwsub_vx_i64m4_tu(vint64m4_t maskedoff, vint32m2_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwsub_wv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m4_tu( @@ -507,7 +507,7 @@ vint64m4_t test_vwsub_wv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m8_tu( @@ -516,7 +516,7 @@ vint64m4_t test_vwsub_wx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vv_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwsub_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m8_tu( @@ -525,7 +525,7 @@ vint64m8_t test_vwsub_vv_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vx_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m8_tu( @@ -534,7 +534,7 @@ vint64m8_t test_vwsub_vx_i64m8_tu(vint64m8_t maskedoff, vint32m4_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwsub_wv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m8_tu( @@ -543,7 +543,7 @@ vint64m8_t test_vwsub_wv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf4_tum( @@ -552,7 +552,7 @@ vint64m8_t test_vwsub_wx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf4_tum( @@ -561,7 +561,7 @@ vint16mf4_t test_vwsub_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf4_tum( @@ -570,7 +570,7 @@ vint16mf4_t test_vwsub_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_wv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf4_tum( @@ -579,7 +579,7 @@ vint16mf4_t test_vwsub_wv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf2_tum( @@ -588,7 +588,7 @@ vint16mf4_t test_vwsub_wx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf2_tum( @@ -597,7 +597,7 @@ vint16mf2_t test_vwsub_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf2_tum( @@ -606,7 +606,7 @@ vint16mf2_t test_vwsub_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_wv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf2_tum( @@ -615,7 +615,7 @@ vint16mf2_t test_vwsub_wv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m1_tum( @@ -624,7 +624,7 @@ vint16mf2_t test_vwsub_wx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m1_tum( @@ -633,7 +633,7 @@ vint16m1_t test_vwsub_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m1_tum( @@ -642,7 +642,7 @@ vint16m1_t test_vwsub_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_wv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m1_tum( @@ -651,7 +651,7 @@ vint16m1_t test_vwsub_wv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m2_tum( @@ -660,7 +660,7 @@ vint16m1_t test_vwsub_wx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwsub_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m2_tum( @@ -669,7 +669,7 @@ vint16m2_t test_vwsub_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m2_tum( @@ -678,7 +678,7 @@ vint16m2_t test_vwsub_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwsub_wv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m2_tum( @@ -687,7 +687,7 @@ vint16m2_t test_vwsub_wv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m4_tum( @@ -696,7 +696,7 @@ vint16m2_t test_vwsub_wx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwsub_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m4_tum( @@ -705,7 +705,7 @@ vint16m4_t test_vwsub_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m4_tum( @@ -714,7 +714,7 @@ vint16m4_t test_vwsub_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwsub_wv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m4_tum( @@ -723,7 +723,7 @@ vint16m4_t test_vwsub_wv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m8_tum( @@ -732,7 +732,7 @@ vint16m4_t test_vwsub_wx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwsub_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m8_tum( @@ -741,7 +741,7 @@ vint16m8_t test_vwsub_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m8_tum( @@ -750,7 +750,7 @@ vint16m8_t test_vwsub_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwsub_wv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m8_tum( @@ -759,7 +759,7 @@ vint16m8_t test_vwsub_wv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32mf2_tum( @@ -768,7 +768,7 @@ vint16m8_t test_vwsub_wx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32mf2_tum( @@ -777,7 +777,7 @@ vint32mf2_t test_vwsub_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32mf2_tum( @@ -786,7 +786,7 @@ vint32mf2_t test_vwsub_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_wv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32mf2_tum( @@ -795,7 +795,7 @@ vint32mf2_t test_vwsub_wv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m1_tum( @@ -804,7 +804,7 @@ vint32mf2_t test_vwsub_wx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m1_tum( @@ -813,7 +813,7 @@ vint32m1_t test_vwsub_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m1_tum( @@ -822,7 +822,7 @@ vint32m1_t test_vwsub_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_wv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m1_tum( @@ -831,7 +831,7 @@ vint32m1_t test_vwsub_wv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m2_tum( @@ -840,7 +840,7 @@ vint32m1_t test_vwsub_wx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwsub_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m2_tum( @@ -849,7 +849,7 @@ vint32m2_t test_vwsub_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m2_tum( @@ -858,7 +858,7 @@ vint32m2_t test_vwsub_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwsub_wv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m2_tum( @@ -867,7 +867,7 @@ vint32m2_t test_vwsub_wv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m4_tum( @@ -876,7 +876,7 @@ vint32m2_t test_vwsub_wx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwsub_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m4_tum( @@ -885,7 +885,7 @@ vint32m4_t test_vwsub_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m4_tum( @@ -894,7 +894,7 @@ vint32m4_t test_vwsub_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwsub_wv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m4_tum( @@ -903,7 +903,7 @@ vint32m4_t test_vwsub_wv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m8_tum( @@ -912,7 +912,7 @@ vint32m4_t test_vwsub_wx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwsub_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m8_tum( @@ -921,7 +921,7 @@ vint32m8_t test_vwsub_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m8_tum( @@ -930,7 +930,7 @@ vint32m8_t test_vwsub_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwsub_wv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m8_tum( @@ -939,7 +939,7 @@ vint32m8_t test_vwsub_wv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m1_tum( @@ -948,7 +948,7 @@ vint32m8_t test_vwsub_wx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m1_tum( @@ -957,7 +957,7 @@ vint64m1_t test_vwsub_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m1_tum( @@ -966,7 +966,7 @@ vint64m1_t test_vwsub_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_wv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m1_tum( @@ -975,7 +975,7 @@ vint64m1_t test_vwsub_wv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m2_tum( @@ -984,7 +984,7 @@ vint64m1_t test_vwsub_wx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwsub_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m2_tum( @@ -993,7 +993,7 @@ vint64m2_t test_vwsub_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m2_tum( @@ -1002,7 +1002,7 @@ vint64m2_t test_vwsub_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwsub_wv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m2_tum( @@ -1011,7 +1011,7 @@ vint64m2_t test_vwsub_wv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m4_tum( @@ -1020,7 +1020,7 @@ vint64m2_t test_vwsub_wx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwsub_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m4_tum( @@ -1029,7 +1029,7 @@ vint64m4_t test_vwsub_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m4_tum( @@ -1038,7 +1038,7 @@ vint64m4_t test_vwsub_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwsub_wv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m4_tum( @@ -1047,7 +1047,7 @@ vint64m4_t test_vwsub_wv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m8_tum( @@ -1056,7 +1056,7 @@ vint64m4_t test_vwsub_wx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwsub_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m8_tum( @@ -1065,7 +1065,7 @@ vint64m8_t test_vwsub_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m8_tum( @@ -1074,7 +1074,7 @@ vint64m8_t test_vwsub_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwsub_wv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m8_tum( @@ -1083,7 +1083,7 @@ vint64m8_t test_vwsub_wv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf4_tumu( @@ -1092,7 +1092,7 @@ vint64m8_t test_vwsub_wx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf4_tumu( @@ -1101,7 +1101,7 @@ vint16mf4_t test_vwsub_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf4_tumu( @@ -1110,7 +1110,7 @@ vint16mf4_t test_vwsub_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_wv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf4_tumu( @@ -1119,7 +1119,7 @@ vint16mf4_t test_vwsub_wv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf2_tumu( @@ -1128,7 +1128,7 @@ vint16mf4_t test_vwsub_wx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf2_tumu( @@ -1137,7 +1137,7 @@ vint16mf2_t test_vwsub_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf2_tumu( @@ -1146,7 +1146,7 @@ vint16mf2_t test_vwsub_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_wv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf2_tumu( @@ -1155,7 +1155,7 @@ vint16mf2_t test_vwsub_wv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m1_tumu( @@ -1164,7 +1164,7 @@ vint16mf2_t test_vwsub_wx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m1_tumu( @@ -1173,7 +1173,7 @@ vint16m1_t test_vwsub_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m1_tumu( @@ -1182,7 +1182,7 @@ vint16m1_t test_vwsub_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_wv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m1_tumu( @@ -1191,7 +1191,7 @@ vint16m1_t test_vwsub_wv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m2_tumu( @@ -1200,7 +1200,7 @@ vint16m1_t test_vwsub_wx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwsub_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m2_tumu( @@ -1209,7 +1209,7 @@ vint16m2_t test_vwsub_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m2_tumu( @@ -1218,7 +1218,7 @@ vint16m2_t test_vwsub_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint8m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwsub_wv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m2_tumu( @@ -1227,7 +1227,7 @@ vint16m2_t test_vwsub_wv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m4_tumu( @@ -1236,7 +1236,7 @@ vint16m2_t test_vwsub_wx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwsub_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m4_tumu( @@ -1245,7 +1245,7 @@ vint16m4_t test_vwsub_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m4_tumu( @@ -1254,7 +1254,7 @@ vint16m4_t test_vwsub_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint8m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwsub_wv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m4_tumu( @@ -1263,7 +1263,7 @@ vint16m4_t test_vwsub_wv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m8_tumu( @@ -1272,7 +1272,7 @@ vint16m4_t test_vwsub_wx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwsub_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m8_tumu( @@ -1281,7 +1281,7 @@ vint16m8_t test_vwsub_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m8_tumu( @@ -1290,7 +1290,7 @@ vint16m8_t test_vwsub_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint8m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwsub_wv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m8_tumu( @@ -1299,7 +1299,7 @@ vint16m8_t test_vwsub_wv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32mf2_tumu( @@ -1308,7 +1308,7 @@ vint16m8_t test_vwsub_wx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32mf2_tumu( @@ -1317,7 +1317,7 @@ vint32mf2_t test_vwsub_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32mf2_tumu( @@ -1326,7 +1326,7 @@ vint32mf2_t test_vwsub_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_wv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32mf2_tumu( @@ -1335,7 +1335,7 @@ vint32mf2_t test_vwsub_wv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m1_tumu( @@ -1344,7 +1344,7 @@ vint32mf2_t test_vwsub_wx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vin // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m1_tumu( @@ -1353,7 +1353,7 @@ vint32m1_t test_vwsub_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m1_tumu( @@ -1362,7 +1362,7 @@ vint32m1_t test_vwsub_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_wv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m1_tumu( @@ -1371,7 +1371,7 @@ vint32m1_t test_vwsub_wv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m2_tumu( @@ -1380,7 +1380,7 @@ vint32m1_t test_vwsub_wx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwsub_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m2_tumu( @@ -1389,7 +1389,7 @@ vint32m2_t test_vwsub_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m2_tumu( @@ -1398,7 +1398,7 @@ vint32m2_t test_vwsub_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwsub_wv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m2_tumu( @@ -1407,7 +1407,7 @@ vint32m2_t test_vwsub_wv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m4_tumu( @@ -1416,7 +1416,7 @@ vint32m2_t test_vwsub_wx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwsub_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m4_tumu( @@ -1425,7 +1425,7 @@ vint32m4_t test_vwsub_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m4_tumu( @@ -1434,7 +1434,7 @@ vint32m4_t test_vwsub_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwsub_wv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m4_tumu( @@ -1443,7 +1443,7 @@ vint32m4_t test_vwsub_wv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m8_tumu( @@ -1452,7 +1452,7 @@ vint32m4_t test_vwsub_wx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwsub_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m8_tumu( @@ -1461,7 +1461,7 @@ vint32m8_t test_vwsub_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m8_tumu( @@ -1470,7 +1470,7 @@ vint32m8_t test_vwsub_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwsub_wv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m8_tumu( @@ -1479,7 +1479,7 @@ vint32m8_t test_vwsub_wv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m1_tumu( @@ -1488,7 +1488,7 @@ vint32m8_t test_vwsub_wx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m1_tumu( @@ -1497,7 +1497,7 @@ vint64m1_t test_vwsub_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m1_tumu( @@ -1506,7 +1506,7 @@ vint64m1_t test_vwsub_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_wv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m1_tumu( @@ -1515,7 +1515,7 @@ vint64m1_t test_vwsub_wv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m2_tumu( @@ -1524,7 +1524,7 @@ vint64m1_t test_vwsub_wx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwsub_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m2_tumu( @@ -1533,7 +1533,7 @@ vint64m2_t test_vwsub_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m2_tumu( @@ -1542,7 +1542,7 @@ vint64m2_t test_vwsub_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwsub_wv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m2_tumu( @@ -1551,7 +1551,7 @@ vint64m2_t test_vwsub_wv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m4_tumu( @@ -1560,7 +1560,7 @@ vint64m2_t test_vwsub_wx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwsub_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m4_tumu( @@ -1569,7 +1569,7 @@ vint64m4_t test_vwsub_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m4_tumu( @@ -1578,7 +1578,7 @@ vint64m4_t test_vwsub_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwsub_wv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m4_tumu( @@ -1587,7 +1587,7 @@ vint64m4_t test_vwsub_wv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m8_tumu( @@ -1596,7 +1596,7 @@ vint64m4_t test_vwsub_wx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwsub_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m8_tumu( @@ -1605,7 +1605,7 @@ vint64m8_t test_vwsub_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m8_tumu( @@ -1614,7 +1614,7 @@ vint64m8_t test_vwsub_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwsub_wv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m8_tumu( @@ -1623,7 +1623,7 @@ vint64m8_t test_vwsub_wv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf4_mu( @@ -1632,7 +1632,7 @@ vint64m8_t test_vwsub_wx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf4_mu( @@ -1641,7 +1641,7 @@ vint16mf4_t test_vwsub_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf4_mu( @@ -1650,7 +1650,7 @@ vint16mf4_t test_vwsub_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint8mf8_t op2, size_t vl) { - return vwsub_wv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf4_mu( @@ -1659,7 +1659,7 @@ vint16mf4_t test_vwsub_wv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vwsub_wx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16mf2_mu( @@ -1668,7 +1668,7 @@ vint16mf4_t test_vwsub_wx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16mf2_mu( @@ -1677,7 +1677,7 @@ vint16mf2_t test_vwsub_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16mf2_mu( @@ -1686,7 +1686,7 @@ vint16mf2_t test_vwsub_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint8mf4_t op2, size_t vl) { - return vwsub_wv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16mf2_mu( @@ -1695,7 +1695,7 @@ vint16mf2_t test_vwsub_wv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vwsub_wx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m1_mu( @@ -1704,7 +1704,7 @@ vint16mf2_t test_vwsub_wx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m1_mu( @@ -1713,7 +1713,7 @@ vint16m1_t test_vwsub_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m1_mu( @@ -1722,7 +1722,7 @@ vint16m1_t test_vwsub_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint8mf2_t op2, size_t vl) { - return vwsub_wv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m1_mu( @@ -1731,7 +1731,7 @@ vint16m1_t test_vwsub_wv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vwsub_wx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m2_mu( @@ -1740,7 +1740,7 @@ vint16m1_t test_vwsub_wx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vwsub_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m2_mu( @@ -1749,7 +1749,7 @@ vint16m2_t test_vwsub_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m2_mu( @@ -1758,7 +1758,7 @@ vint16m2_t test_vwsub_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint8m1_t op2, size_t vl) { - return vwsub_wv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m2_mu( @@ -1767,7 +1767,7 @@ vint16m2_t test_vwsub_wv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vwsub_wx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m4_mu( @@ -1776,7 +1776,7 @@ vint16m2_t test_vwsub_wx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vwsub_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m4_mu( @@ -1785,7 +1785,7 @@ vint16m4_t test_vwsub_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m4_mu( @@ -1794,7 +1794,7 @@ vint16m4_t test_vwsub_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint8m2_t op2, size_t vl) { - return vwsub_wv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m4_mu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vwsub_wv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vwsub_wx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i16m8_mu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vwsub_wx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vwsub_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i16m8_mu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vwsub_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vwsub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i16m8_mu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vwsub_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint8m4_t op2, size_t vl) { - return vwsub_wv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i16m8_mu( @@ -1839,7 +1839,7 @@ vint16m8_t test_vwsub_wv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vwsub_wx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int8_t op2, size_t vl) { - return vwsub_wx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32mf2_mu( @@ -1848,7 +1848,7 @@ vint16m8_t test_vwsub_wx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32mf2_mu( @@ -1857,7 +1857,7 @@ vint32mf2_t test_vwsub_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32mf2_mu( @@ -1866,7 +1866,7 @@ vint32mf2_t test_vwsub_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint16mf4_t op2, size_t vl) { - return vwsub_wv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32mf2_mu( @@ -1875,7 +1875,7 @@ vint32mf2_t test_vwsub_wv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vwsub_wx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m1_mu( @@ -1884,7 +1884,7 @@ vint32mf2_t test_vwsub_wx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m1_mu( @@ -1893,7 +1893,7 @@ vint32m1_t test_vwsub_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m1_mu( @@ -1902,7 +1902,7 @@ vint32m1_t test_vwsub_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint16mf2_t op2, size_t vl) { - return vwsub_wv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m1_mu( @@ -1911,7 +1911,7 @@ vint32m1_t test_vwsub_wv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vwsub_wx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m2_mu( @@ -1920,7 +1920,7 @@ vint32m1_t test_vwsub_wx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vwsub_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m2_mu( @@ -1929,7 +1929,7 @@ vint32m2_t test_vwsub_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m2_mu( @@ -1938,7 +1938,7 @@ vint32m2_t test_vwsub_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint16m1_t op2, size_t vl) { - return vwsub_wv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m2_mu( @@ -1947,7 +1947,7 @@ vint32m2_t test_vwsub_wv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vwsub_wx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m4_mu( @@ -1956,7 +1956,7 @@ vint32m2_t test_vwsub_wx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vwsub_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m4_mu( @@ -1965,7 +1965,7 @@ vint32m4_t test_vwsub_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m4_mu( @@ -1974,7 +1974,7 @@ vint32m4_t test_vwsub_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint16m2_t op2, size_t vl) { - return vwsub_wv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m4_mu( @@ -1983,7 +1983,7 @@ vint32m4_t test_vwsub_wv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vwsub_wx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i32m8_mu( @@ -1992,7 +1992,7 @@ vint32m4_t test_vwsub_wx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vwsub_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i32m8_mu( @@ -2001,7 +2001,7 @@ vint32m8_t test_vwsub_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vwsub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i32m8_mu( @@ -2010,7 +2010,7 @@ vint32m8_t test_vwsub_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint16m4_t op2, size_t vl) { - return vwsub_wv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i32m8_mu( @@ -2019,7 +2019,7 @@ vint32m8_t test_vwsub_wv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vwsub_wx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int16_t op2, size_t vl) { - return vwsub_wx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m1_mu( @@ -2028,7 +2028,7 @@ vint32m8_t test_vwsub_wx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m1_mu( @@ -2037,7 +2037,7 @@ vint64m1_t test_vwsub_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m1_mu( @@ -2046,7 +2046,7 @@ vint64m1_t test_vwsub_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint32mf2_t op2, size_t vl) { - return vwsub_wv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m1_mu( @@ -2055,7 +2055,7 @@ vint64m1_t test_vwsub_wv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vwsub_wx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m2_mu( @@ -2064,7 +2064,7 @@ vint64m1_t test_vwsub_wx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vwsub_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m2_mu( @@ -2073,7 +2073,7 @@ vint64m2_t test_vwsub_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m2_mu( @@ -2082,7 +2082,7 @@ vint64m2_t test_vwsub_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint32m1_t op2, size_t vl) { - return vwsub_wv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m2_mu( @@ -2091,7 +2091,7 @@ vint64m2_t test_vwsub_wv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vwsub_wx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m4_mu( @@ -2100,7 +2100,7 @@ vint64m2_t test_vwsub_wx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vwsub_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m4_mu( @@ -2109,7 +2109,7 @@ vint64m4_t test_vwsub_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m4_mu( @@ -2118,7 +2118,7 @@ vint64m4_t test_vwsub_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint32m2_t op2, size_t vl) { - return vwsub_wv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m4_mu( @@ -2127,7 +2127,7 @@ vint64m4_t test_vwsub_wv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vwsub_wx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vv_i64m8_mu( @@ -2136,7 +2136,7 @@ vint64m4_t test_vwsub_wx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vwsub_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_vx_i64m8_mu( @@ -2145,7 +2145,7 @@ vint64m8_t test_vwsub_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vwsub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wv_i64m8_mu( @@ -2154,7 +2154,7 @@ vint64m8_t test_vwsub_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint32m4_t op2, size_t vl) { - return vwsub_wv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsub_wx_i64m8_mu( @@ -2163,6 +2163,6 @@ vint64m8_t test_vwsub_wv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vwsub_wx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int32_t op2, size_t vl) { - return vwsub_wx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsub_wx_i64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsubu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsubu.c index 1c4b589cbe973d33f1426db69ff180a6e9d486eb..c25fdedf0f8a2b70f9cbbd2d1b8e20ae39d0185b 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsubu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vwsubu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf4_tu( @@ -21,7 +21,7 @@ vuint16mf4_t test_vwsubu_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf4_tu( @@ -30,7 +30,7 @@ vuint16mf4_t test_vwsubu_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_wv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf4_tu( @@ -39,7 +39,7 @@ vuint16mf4_t test_vwsubu_wv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf2_tu( @@ -48,7 +48,7 @@ vuint16mf4_t test_vwsubu_wx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf2_tu( @@ -57,7 +57,7 @@ vuint16mf2_t test_vwsubu_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf2_tu( @@ -66,7 +66,7 @@ vuint16mf2_t test_vwsubu_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, u // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_wv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf2_tu( @@ -75,7 +75,7 @@ vuint16mf2_t test_vwsubu_wv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m1_tu( @@ -84,7 +84,7 @@ vuint16mf2_t test_vwsubu_wx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m1_tu( @@ -93,7 +93,7 @@ vuint16m1_t test_vwsubu_vv_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m1_tu( @@ -102,7 +102,7 @@ vuint16m1_t test_vwsubu_vx_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_wv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m1_tu( @@ -111,7 +111,7 @@ vuint16m1_t test_vwsubu_wv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m2_tu( @@ -120,7 +120,7 @@ vuint16m1_t test_vwsubu_wx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m2_tu( @@ -129,7 +129,7 @@ vuint16m2_t test_vwsubu_vv_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m2_tu( @@ -138,7 +138,7 @@ vuint16m2_t test_vwsubu_vx_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_wv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m2_tu( @@ -147,7 +147,7 @@ vuint16m2_t test_vwsubu_wv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m4_tu( @@ -156,7 +156,7 @@ vuint16m2_t test_vwsubu_wx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m4_tu( @@ -165,7 +165,7 @@ vuint16m4_t test_vwsubu_vv_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m4_tu( @@ -174,7 +174,7 @@ vuint16m4_t test_vwsubu_vx_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_wv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m4_tu( @@ -183,7 +183,7 @@ vuint16m4_t test_vwsubu_wv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m8_tu( @@ -192,7 +192,7 @@ vuint16m4_t test_vwsubu_wx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m8_tu( @@ -201,7 +201,7 @@ vuint16m8_t test_vwsubu_vv_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m8_tu( @@ -210,7 +210,7 @@ vuint16m8_t test_vwsubu_vx_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, uint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_wv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m8_tu( @@ -219,7 +219,7 @@ vuint16m8_t test_vwsubu_wv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32mf2_tu( @@ -228,7 +228,7 @@ vuint16m8_t test_vwsubu_wx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32mf2_tu( @@ -237,7 +237,7 @@ vuint32mf2_t test_vwsubu_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32mf2_tu( @@ -246,7 +246,7 @@ vuint32mf2_t test_vwsubu_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_wv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32mf2_tu( @@ -255,7 +255,7 @@ vuint32mf2_t test_vwsubu_wv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m1_tu( @@ -264,7 +264,7 @@ vuint32mf2_t test_vwsubu_wx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m1_tu( @@ -273,7 +273,7 @@ vuint32m1_t test_vwsubu_vv_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m1_tu( @@ -282,7 +282,7 @@ vuint32m1_t test_vwsubu_vx_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_wv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m1_tu( @@ -291,7 +291,7 @@ vuint32m1_t test_vwsubu_wv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m2_tu( @@ -300,7 +300,7 @@ vuint32m1_t test_vwsubu_wx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m2_tu( @@ -309,7 +309,7 @@ vuint32m2_t test_vwsubu_vv_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m2_tu( @@ -318,7 +318,7 @@ vuint32m2_t test_vwsubu_vx_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_wv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m2_tu( @@ -327,7 +327,7 @@ vuint32m2_t test_vwsubu_wv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m4_tu( @@ -336,7 +336,7 @@ vuint32m2_t test_vwsubu_wx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m4_tu( @@ -345,7 +345,7 @@ vuint32m4_t test_vwsubu_vv_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m4_tu( @@ -354,7 +354,7 @@ vuint32m4_t test_vwsubu_vx_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_wv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m4_tu( @@ -363,7 +363,7 @@ vuint32m4_t test_vwsubu_wv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m8_tu( @@ -372,7 +372,7 @@ vuint32m4_t test_vwsubu_wx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m8_tu( @@ -381,7 +381,7 @@ vuint32m8_t test_vwsubu_vv_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m8_tu( @@ -390,7 +390,7 @@ vuint32m8_t test_vwsubu_vx_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_wv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m8_tu( @@ -399,7 +399,7 @@ vuint32m8_t test_vwsubu_wv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m1_tu( @@ -408,7 +408,7 @@ vuint32m8_t test_vwsubu_wx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m1_tu( @@ -417,7 +417,7 @@ vuint64m1_t test_vwsubu_vv_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m1_tu( @@ -426,7 +426,7 @@ vuint64m1_t test_vwsubu_vx_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, uin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_wv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m1_tu( @@ -435,7 +435,7 @@ vuint64m1_t test_vwsubu_wv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m2_tu( @@ -444,7 +444,7 @@ vuint64m1_t test_vwsubu_wx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m2_tu( @@ -453,7 +453,7 @@ vuint64m2_t test_vwsubu_vv_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m2_tu( @@ -462,7 +462,7 @@ vuint64m2_t test_vwsubu_vx_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_wv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m2_tu( @@ -471,7 +471,7 @@ vuint64m2_t test_vwsubu_wv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m4_tu( @@ -480,7 +480,7 @@ vuint64m2_t test_vwsubu_wx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m4_tu( @@ -489,7 +489,7 @@ vuint64m4_t test_vwsubu_vv_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m4_tu( @@ -498,7 +498,7 @@ vuint64m4_t test_vwsubu_vx_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_wv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m4_tu( @@ -507,7 +507,7 @@ vuint64m4_t test_vwsubu_wv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m8_tu( @@ -516,7 +516,7 @@ vuint64m4_t test_vwsubu_wx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m8_tu( @@ -525,7 +525,7 @@ vuint64m8_t test_vwsubu_vv_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m8_tu( @@ -534,7 +534,7 @@ vuint64m8_t test_vwsubu_vx_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_wv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m8_tu( @@ -543,7 +543,7 @@ vuint64m8_t test_vwsubu_wv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf4_tum( @@ -552,7 +552,7 @@ vuint64m8_t test_vwsubu_wx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf4_tum( @@ -561,7 +561,7 @@ vuint16mf4_t test_vwsubu_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf4_tum( @@ -570,7 +570,7 @@ vuint16mf4_t test_vwsubu_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_wv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf4_tum( @@ -579,7 +579,7 @@ vuint16mf4_t test_vwsubu_wv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf2_tum( @@ -588,7 +588,7 @@ vuint16mf4_t test_vwsubu_wx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf2_tum( @@ -597,7 +597,7 @@ vuint16mf2_t test_vwsubu_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf2_tum( @@ -606,7 +606,7 @@ vuint16mf2_t test_vwsubu_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_wv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf2_tum( @@ -615,7 +615,7 @@ vuint16mf2_t test_vwsubu_wv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m1_tum( @@ -624,7 +624,7 @@ vuint16mf2_t test_vwsubu_wx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m1_tum( @@ -633,7 +633,7 @@ vuint16m1_t test_vwsubu_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m1_tum( @@ -642,7 +642,7 @@ vuint16m1_t test_vwsubu_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_wv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m1_tum( @@ -651,7 +651,7 @@ vuint16m1_t test_vwsubu_wv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m2_tum( @@ -660,7 +660,7 @@ vuint16m1_t test_vwsubu_wx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m2_tum( @@ -669,7 +669,7 @@ vuint16m2_t test_vwsubu_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m2_tum( @@ -678,7 +678,7 @@ vuint16m2_t test_vwsubu_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_wv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m2_tum( @@ -687,7 +687,7 @@ vuint16m2_t test_vwsubu_wv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m4_tum( @@ -696,7 +696,7 @@ vuint16m2_t test_vwsubu_wx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m4_tum( @@ -705,7 +705,7 @@ vuint16m4_t test_vwsubu_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m4_tum( @@ -714,7 +714,7 @@ vuint16m4_t test_vwsubu_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_wv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m4_tum( @@ -723,7 +723,7 @@ vuint16m4_t test_vwsubu_wv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m8_tum( @@ -732,7 +732,7 @@ vuint16m4_t test_vwsubu_wx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m8_tum( @@ -741,7 +741,7 @@ vuint16m8_t test_vwsubu_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m8_tum( @@ -750,7 +750,7 @@ vuint16m8_t test_vwsubu_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_wv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m8_tum( @@ -759,7 +759,7 @@ vuint16m8_t test_vwsubu_wv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32mf2_tum( @@ -768,7 +768,7 @@ vuint16m8_t test_vwsubu_wx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32mf2_tum( @@ -777,7 +777,7 @@ vuint32mf2_t test_vwsubu_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32mf2_tum( @@ -786,7 +786,7 @@ vuint32mf2_t test_vwsubu_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_wv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32mf2_tum( @@ -795,7 +795,7 @@ vuint32mf2_t test_vwsubu_wv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m1_tum( @@ -804,7 +804,7 @@ vuint32mf2_t test_vwsubu_wx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m1_tum( @@ -813,7 +813,7 @@ vuint32m1_t test_vwsubu_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m1_tum( @@ -822,7 +822,7 @@ vuint32m1_t test_vwsubu_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_wv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m1_tum( @@ -831,7 +831,7 @@ vuint32m1_t test_vwsubu_wv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m2_tum( @@ -840,7 +840,7 @@ vuint32m1_t test_vwsubu_wx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m2_tum( @@ -849,7 +849,7 @@ vuint32m2_t test_vwsubu_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m2_tum( @@ -858,7 +858,7 @@ vuint32m2_t test_vwsubu_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_wv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m2_tum( @@ -867,7 +867,7 @@ vuint32m2_t test_vwsubu_wv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m4_tum( @@ -876,7 +876,7 @@ vuint32m2_t test_vwsubu_wx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m4_tum( @@ -885,7 +885,7 @@ vuint32m4_t test_vwsubu_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m4_tum( @@ -894,7 +894,7 @@ vuint32m4_t test_vwsubu_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_wv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m4_tum( @@ -903,7 +903,7 @@ vuint32m4_t test_vwsubu_wv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m8_tum( @@ -912,7 +912,7 @@ vuint32m4_t test_vwsubu_wx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m8_tum( @@ -921,7 +921,7 @@ vuint32m8_t test_vwsubu_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m8_tum( @@ -930,7 +930,7 @@ vuint32m8_t test_vwsubu_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_wv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m8_tum( @@ -939,7 +939,7 @@ vuint32m8_t test_vwsubu_wv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m1_tum( @@ -948,7 +948,7 @@ vuint32m8_t test_vwsubu_wx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m1_tum( @@ -957,7 +957,7 @@ vuint64m1_t test_vwsubu_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m1_tum( @@ -966,7 +966,7 @@ vuint64m1_t test_vwsubu_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_wv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m1_tum( @@ -975,7 +975,7 @@ vuint64m1_t test_vwsubu_wv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m2_tum( @@ -984,7 +984,7 @@ vuint64m1_t test_vwsubu_wx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m2_tum( @@ -993,7 +993,7 @@ vuint64m2_t test_vwsubu_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m2_tum( @@ -1002,7 +1002,7 @@ vuint64m2_t test_vwsubu_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_wv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m2_tum( @@ -1011,7 +1011,7 @@ vuint64m2_t test_vwsubu_wv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m4_tum( @@ -1020,7 +1020,7 @@ vuint64m2_t test_vwsubu_wx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m4_tum( @@ -1029,7 +1029,7 @@ vuint64m4_t test_vwsubu_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m4_tum( @@ -1038,7 +1038,7 @@ vuint64m4_t test_vwsubu_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_wv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m4_tum( @@ -1047,7 +1047,7 @@ vuint64m4_t test_vwsubu_wv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m8_tum( @@ -1056,7 +1056,7 @@ vuint64m4_t test_vwsubu_wx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m8_tum( @@ -1065,7 +1065,7 @@ vuint64m8_t test_vwsubu_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m8_tum( @@ -1074,7 +1074,7 @@ vuint64m8_t test_vwsubu_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_wv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m8_tum( @@ -1083,7 +1083,7 @@ vuint64m8_t test_vwsubu_wv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf4_tumu( @@ -1092,7 +1092,7 @@ vuint64m8_t test_vwsubu_wx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf4_tumu( @@ -1101,7 +1101,7 @@ vuint16mf4_t test_vwsubu_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf4_tumu( @@ -1110,7 +1110,7 @@ vuint16mf4_t test_vwsubu_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_wv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf4_tumu( @@ -1119,7 +1119,7 @@ vuint16mf4_t test_vwsubu_wv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf2_tumu( @@ -1128,7 +1128,7 @@ vuint16mf4_t test_vwsubu_wx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf2_tumu( @@ -1137,7 +1137,7 @@ vuint16mf2_t test_vwsubu_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf2_tumu( @@ -1146,7 +1146,7 @@ vuint16mf2_t test_vwsubu_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_wv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf2_tumu( @@ -1155,7 +1155,7 @@ vuint16mf2_t test_vwsubu_wv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m1_tumu( @@ -1164,7 +1164,7 @@ vuint16mf2_t test_vwsubu_wx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m1_tumu( @@ -1173,7 +1173,7 @@ vuint16m1_t test_vwsubu_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m1_tumu( @@ -1182,7 +1182,7 @@ vuint16m1_t test_vwsubu_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_wv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m1_tumu( @@ -1191,7 +1191,7 @@ vuint16m1_t test_vwsubu_wv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m2_tumu( @@ -1200,7 +1200,7 @@ vuint16m1_t test_vwsubu_wx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m2_tumu( @@ -1209,7 +1209,7 @@ vuint16m2_t test_vwsubu_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m2_tumu( @@ -1218,7 +1218,7 @@ vuint16m2_t test_vwsubu_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_wv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m2_tumu( @@ -1227,7 +1227,7 @@ vuint16m2_t test_vwsubu_wv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m4_tumu( @@ -1236,7 +1236,7 @@ vuint16m2_t test_vwsubu_wx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m4_tumu( @@ -1245,7 +1245,7 @@ vuint16m4_t test_vwsubu_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m4_tumu( @@ -1254,7 +1254,7 @@ vuint16m4_t test_vwsubu_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_wv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m4_tumu( @@ -1263,7 +1263,7 @@ vuint16m4_t test_vwsubu_wv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m8_tumu( @@ -1272,7 +1272,7 @@ vuint16m4_t test_vwsubu_wx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m8_tumu( @@ -1281,7 +1281,7 @@ vuint16m8_t test_vwsubu_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m8_tumu( @@ -1290,7 +1290,7 @@ vuint16m8_t test_vwsubu_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_wv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m8_tumu( @@ -1299,7 +1299,7 @@ vuint16m8_t test_vwsubu_wv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32mf2_tumu( @@ -1308,7 +1308,7 @@ vuint16m8_t test_vwsubu_wx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32mf2_tumu( @@ -1317,7 +1317,7 @@ vuint32mf2_t test_vwsubu_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32mf2_tumu( @@ -1326,7 +1326,7 @@ vuint32mf2_t test_vwsubu_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_wv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32mf2_tumu( @@ -1335,7 +1335,7 @@ vuint32mf2_t test_vwsubu_wv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m1_tumu( @@ -1344,7 +1344,7 @@ vuint32mf2_t test_vwsubu_wx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m1_tumu( @@ -1353,7 +1353,7 @@ vuint32m1_t test_vwsubu_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m1_tumu( @@ -1362,7 +1362,7 @@ vuint32m1_t test_vwsubu_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_wv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m1_tumu( @@ -1371,7 +1371,7 @@ vuint32m1_t test_vwsubu_wv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m2_tumu( @@ -1380,7 +1380,7 @@ vuint32m1_t test_vwsubu_wx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m2_tumu( @@ -1389,7 +1389,7 @@ vuint32m2_t test_vwsubu_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m2_tumu( @@ -1398,7 +1398,7 @@ vuint32m2_t test_vwsubu_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_wv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m2_tumu( @@ -1407,7 +1407,7 @@ vuint32m2_t test_vwsubu_wv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m4_tumu( @@ -1416,7 +1416,7 @@ vuint32m2_t test_vwsubu_wx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m4_tumu( @@ -1425,7 +1425,7 @@ vuint32m4_t test_vwsubu_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m4_tumu( @@ -1434,7 +1434,7 @@ vuint32m4_t test_vwsubu_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_wv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m4_tumu( @@ -1443,7 +1443,7 @@ vuint32m4_t test_vwsubu_wv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m8_tumu( @@ -1452,7 +1452,7 @@ vuint32m4_t test_vwsubu_wx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m8_tumu( @@ -1461,7 +1461,7 @@ vuint32m8_t test_vwsubu_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m8_tumu( @@ -1470,7 +1470,7 @@ vuint32m8_t test_vwsubu_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_wv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m8_tumu( @@ -1479,7 +1479,7 @@ vuint32m8_t test_vwsubu_wv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m1_tumu( @@ -1488,7 +1488,7 @@ vuint32m8_t test_vwsubu_wx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m1_tumu( @@ -1497,7 +1497,7 @@ vuint64m1_t test_vwsubu_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m1_tumu( @@ -1506,7 +1506,7 @@ vuint64m1_t test_vwsubu_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_wv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m1_tumu( @@ -1515,7 +1515,7 @@ vuint64m1_t test_vwsubu_wv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m2_tumu( @@ -1524,7 +1524,7 @@ vuint64m1_t test_vwsubu_wx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m2_tumu( @@ -1533,7 +1533,7 @@ vuint64m2_t test_vwsubu_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m2_tumu( @@ -1542,7 +1542,7 @@ vuint64m2_t test_vwsubu_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_wv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m2_tumu( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vwsubu_wv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m4_tumu( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vwsubu_wx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m4_tumu( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vwsubu_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m4_tumu( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vwsubu_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_wv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m4_tumu( @@ -1587,7 +1587,7 @@ vuint64m4_t test_vwsubu_wv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m8_tumu( @@ -1596,7 +1596,7 @@ vuint64m4_t test_vwsubu_wx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m8_tumu( @@ -1605,7 +1605,7 @@ vuint64m8_t test_vwsubu_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m8_tumu( @@ -1614,7 +1614,7 @@ vuint64m8_t test_vwsubu_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_wv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m8_tumu( @@ -1623,7 +1623,7 @@ vuint64m8_t test_vwsubu_wv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf4_mu( @@ -1632,7 +1632,7 @@ vuint64m8_t test_vwsubu_wx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf4_mu( @@ -1641,7 +1641,7 @@ vuint16mf4_t test_vwsubu_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf4_mu( @@ -1650,7 +1650,7 @@ vuint16mf4_t test_vwsubu_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint8mf8_t op2, size_t vl) { - return vwsubu_wv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf4_mu( @@ -1659,7 +1659,7 @@ vuint16mf4_t test_vwsubu_wv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vwsubu_wx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16mf2_mu( @@ -1668,7 +1668,7 @@ vuint16mf4_t test_vwsubu_wx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16mf2_mu( @@ -1677,7 +1677,7 @@ vuint16mf2_t test_vwsubu_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16mf2_mu( @@ -1686,7 +1686,7 @@ vuint16mf2_t test_vwsubu_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint8mf4_t op2, size_t vl) { - return vwsubu_wv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16mf2_mu( @@ -1695,7 +1695,7 @@ vuint16mf2_t test_vwsubu_wv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vwsubu_wx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m1_mu( @@ -1704,7 +1704,7 @@ vuint16mf2_t test_vwsubu_wx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m1_mu( @@ -1713,7 +1713,7 @@ vuint16m1_t test_vwsubu_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m1_mu( @@ -1722,7 +1722,7 @@ vuint16m1_t test_vwsubu_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint8mf2_t op2, size_t vl) { - return vwsubu_wv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m1_mu( @@ -1731,7 +1731,7 @@ vuint16m1_t test_vwsubu_wv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vwsubu_wx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m2_mu( @@ -1740,7 +1740,7 @@ vuint16m1_t test_vwsubu_wx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m2_mu( @@ -1749,7 +1749,7 @@ vuint16m2_t test_vwsubu_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m2_mu( @@ -1758,7 +1758,7 @@ vuint16m2_t test_vwsubu_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint8m1_t op2, size_t vl) { - return vwsubu_wv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m2_mu( @@ -1767,7 +1767,7 @@ vuint16m2_t test_vwsubu_wv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vwsubu_wx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m4_mu( @@ -1776,7 +1776,7 @@ vuint16m2_t test_vwsubu_wx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m4_mu( @@ -1785,7 +1785,7 @@ vuint16m4_t test_vwsubu_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m4_mu( @@ -1794,7 +1794,7 @@ vuint16m4_t test_vwsubu_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint8m2_t op2, size_t vl) { - return vwsubu_wv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m4_mu( @@ -1803,7 +1803,7 @@ vuint16m4_t test_vwsubu_wv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vwsubu_wx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u16m8_mu( @@ -1812,7 +1812,7 @@ vuint16m4_t test_vwsubu_wx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u16m8_mu( @@ -1821,7 +1821,7 @@ vuint16m8_t test_vwsubu_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vwsubu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u16m8_mu( @@ -1830,7 +1830,7 @@ vuint16m8_t test_vwsubu_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint8m4_t op2, size_t vl) { - return vwsubu_wv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u16m8_mu( @@ -1839,7 +1839,7 @@ vuint16m8_t test_vwsubu_wv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vwsubu_wx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint8_t op2, size_t vl) { - return vwsubu_wx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32mf2_mu( @@ -1848,7 +1848,7 @@ vuint16m8_t test_vwsubu_wx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32mf2_mu( @@ -1857,7 +1857,7 @@ vuint32mf2_t test_vwsubu_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32mf2_mu( @@ -1866,7 +1866,7 @@ vuint32mf2_t test_vwsubu_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint16mf4_t op2, size_t vl) { - return vwsubu_wv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32mf2_mu( @@ -1875,7 +1875,7 @@ vuint32mf2_t test_vwsubu_wv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vwsubu_wx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m1_mu( @@ -1884,7 +1884,7 @@ vuint32mf2_t test_vwsubu_wx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m1_mu( @@ -1893,7 +1893,7 @@ vuint32m1_t test_vwsubu_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m1_mu( @@ -1902,7 +1902,7 @@ vuint32m1_t test_vwsubu_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint16mf2_t op2, size_t vl) { - return vwsubu_wv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m1_mu( @@ -1911,7 +1911,7 @@ vuint32m1_t test_vwsubu_wv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vwsubu_wx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m2_mu( @@ -1920,7 +1920,7 @@ vuint32m1_t test_vwsubu_wx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m2_mu( @@ -1929,7 +1929,7 @@ vuint32m2_t test_vwsubu_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m2_mu( @@ -1938,7 +1938,7 @@ vuint32m2_t test_vwsubu_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint16m1_t op2, size_t vl) { - return vwsubu_wv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m2_mu( @@ -1947,7 +1947,7 @@ vuint32m2_t test_vwsubu_wv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vwsubu_wx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m4_mu( @@ -1956,7 +1956,7 @@ vuint32m2_t test_vwsubu_wx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m4_mu( @@ -1965,7 +1965,7 @@ vuint32m4_t test_vwsubu_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m4_mu( @@ -1974,7 +1974,7 @@ vuint32m4_t test_vwsubu_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint16m2_t op2, size_t vl) { - return vwsubu_wv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m4_mu( @@ -1983,7 +1983,7 @@ vuint32m4_t test_vwsubu_wv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vwsubu_wx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u32m8_mu( @@ -1992,7 +1992,7 @@ vuint32m4_t test_vwsubu_wx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u32m8_mu( @@ -2001,7 +2001,7 @@ vuint32m8_t test_vwsubu_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vwsubu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u32m8_mu( @@ -2010,7 +2010,7 @@ vuint32m8_t test_vwsubu_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint16m4_t op2, size_t vl) { - return vwsubu_wv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u32m8_mu( @@ -2019,7 +2019,7 @@ vuint32m8_t test_vwsubu_wv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vwsubu_wx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint16_t op2, size_t vl) { - return vwsubu_wx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m1_mu( @@ -2028,7 +2028,7 @@ vuint32m8_t test_vwsubu_wx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m1_mu( @@ -2037,7 +2037,7 @@ vuint64m1_t test_vwsubu_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m1_mu( @@ -2046,7 +2046,7 @@ vuint64m1_t test_vwsubu_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint32mf2_t op2, size_t vl) { - return vwsubu_wv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m1_mu( @@ -2055,7 +2055,7 @@ vuint64m1_t test_vwsubu_wv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vwsubu_wx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m2_mu( @@ -2064,7 +2064,7 @@ vuint64m1_t test_vwsubu_wx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m2_mu( @@ -2073,7 +2073,7 @@ vuint64m2_t test_vwsubu_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m2_mu( @@ -2082,7 +2082,7 @@ vuint64m2_t test_vwsubu_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint32m1_t op2, size_t vl) { - return vwsubu_wv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m2_mu( @@ -2091,7 +2091,7 @@ vuint64m2_t test_vwsubu_wv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vwsubu_wx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m4_mu( @@ -2100,7 +2100,7 @@ vuint64m2_t test_vwsubu_wx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m4_mu( @@ -2109,7 +2109,7 @@ vuint64m4_t test_vwsubu_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m4_mu( @@ -2118,7 +2118,7 @@ vuint64m4_t test_vwsubu_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint32m2_t op2, size_t vl) { - return vwsubu_wv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m4_mu( @@ -2127,7 +2127,7 @@ vuint64m4_t test_vwsubu_wv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vwsubu_wx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vv_u64m8_mu( @@ -2136,7 +2136,7 @@ vuint64m4_t test_vwsubu_wx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_vx_u64m8_mu( @@ -2145,7 +2145,7 @@ vuint64m8_t test_vwsubu_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vwsubu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wv_u64m8_mu( @@ -2154,7 +2154,7 @@ vuint64m8_t test_vwsubu_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint32m4_t op2, size_t vl) { - return vwsubu_wv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vwsubu_wx_u64m8_mu( @@ -2163,6 +2163,6 @@ vuint64m8_t test_vwsubu_wv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vwsubu_wx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint32_t op2, size_t vl) { - return vwsubu_wx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vwsubu_wx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vxor.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vxor.c index f3f97a9f59c716d0de4bf5fb720825d614410ecc..c3373a4bc618513f925fc8d2dd9faa4ec4f743fb 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vxor.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vxor.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vxor_vv_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf8_tu( @@ -21,7 +21,7 @@ vint8mf8_t test_vxor_vv_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf4_tu( @@ -30,7 +30,7 @@ vint8mf8_t test_vxor_vx_i8mf8_tu(vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vxor_vv_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf4_tu( @@ -39,7 +39,7 @@ vint8mf4_t test_vxor_vv_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf2_tu( @@ -48,7 +48,7 @@ vint8mf4_t test_vxor_vx_i8mf4_tu(vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vxor_vv_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf2_tu( @@ -57,7 +57,7 @@ vint8mf2_t test_vxor_vv_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m1_tu( @@ -66,7 +66,7 @@ vint8mf2_t test_vxor_vx_i8mf2_tu(vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vxor_vv_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m1_tu( @@ -75,7 +75,7 @@ vint8m1_t test_vxor_vv_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m2_tu( @@ -84,7 +84,7 @@ vint8m1_t test_vxor_vx_i8m1_tu(vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vxor_vv_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m2_tu( @@ -93,7 +93,7 @@ vint8m2_t test_vxor_vv_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m4_tu( @@ -102,7 +102,7 @@ vint8m2_t test_vxor_vx_i8m2_tu(vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vxor_vv_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m4_tu( @@ -111,7 +111,7 @@ vint8m4_t test_vxor_vv_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m8_tu( @@ -120,7 +120,7 @@ vint8m4_t test_vxor_vx_i8m4_tu(vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vxor_vv_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m8_tu( @@ -129,7 +129,7 @@ vint8m8_t test_vxor_vv_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf4_tu( @@ -138,7 +138,7 @@ vint8m8_t test_vxor_vx_i8m8_tu(vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vxor_vv_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf4_tu( @@ -147,7 +147,7 @@ vint16mf4_t test_vxor_vv_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf2_tu( @@ -156,7 +156,7 @@ vint16mf4_t test_vxor_vx_i16mf4_tu(vint16mf4_t maskedoff, vint16mf4_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vxor_vv_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf2_tu( @@ -165,7 +165,7 @@ vint16mf2_t test_vxor_vv_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m1_tu( @@ -174,7 +174,7 @@ vint16mf2_t test_vxor_vx_i16mf2_tu(vint16mf2_t maskedoff, vint16mf2_t op1, int16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vxor_vv_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m1_tu( @@ -183,7 +183,7 @@ vint16m1_t test_vxor_vv_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m2_tu( @@ -192,7 +192,7 @@ vint16m1_t test_vxor_vx_i16m1_tu(vint16m1_t maskedoff, vint16m1_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vxor_vv_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m2_tu( @@ -201,7 +201,7 @@ vint16m2_t test_vxor_vv_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m4_tu( @@ -210,7 +210,7 @@ vint16m2_t test_vxor_vx_i16m2_tu(vint16m2_t maskedoff, vint16m2_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vxor_vv_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m4_tu( @@ -219,7 +219,7 @@ vint16m4_t test_vxor_vv_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m8_tu( @@ -228,7 +228,7 @@ vint16m4_t test_vxor_vx_i16m4_tu(vint16m4_t maskedoff, vint16m4_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vxor_vv_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m8_tu( @@ -237,7 +237,7 @@ vint16m8_t test_vxor_vv_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32mf2_tu( @@ -246,7 +246,7 @@ vint16m8_t test_vxor_vx_i16m8_tu(vint16m8_t maskedoff, vint16m8_t op1, int16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vxor_vv_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32mf2_tu( @@ -255,7 +255,7 @@ vint32mf2_t test_vxor_vv_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m1_tu( @@ -264,7 +264,7 @@ vint32mf2_t test_vxor_vx_i32mf2_tu(vint32mf2_t maskedoff, vint32mf2_t op1, int32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vxor_vv_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m1_tu( @@ -273,7 +273,7 @@ vint32m1_t test_vxor_vv_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m2_tu( @@ -282,7 +282,7 @@ vint32m1_t test_vxor_vx_i32m1_tu(vint32m1_t maskedoff, vint32m1_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vxor_vv_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m2_tu( @@ -291,7 +291,7 @@ vint32m2_t test_vxor_vv_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m4_tu( @@ -300,7 +300,7 @@ vint32m2_t test_vxor_vx_i32m2_tu(vint32m2_t maskedoff, vint32m2_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vxor_vv_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m4_tu( @@ -309,7 +309,7 @@ vint32m4_t test_vxor_vv_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m8_tu( @@ -318,7 +318,7 @@ vint32m4_t test_vxor_vx_i32m4_tu(vint32m4_t maskedoff, vint32m4_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vxor_vv_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m8_tu( @@ -327,7 +327,7 @@ vint32m8_t test_vxor_vv_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m1_tu( @@ -336,7 +336,7 @@ vint32m8_t test_vxor_vx_i32m8_tu(vint32m8_t maskedoff, vint32m8_t op1, int32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vxor_vv_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m1_tu( @@ -345,7 +345,7 @@ vint64m1_t test_vxor_vv_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m2_tu( @@ -354,7 +354,7 @@ vint64m1_t test_vxor_vx_i64m1_tu(vint64m1_t maskedoff, vint64m1_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vxor_vv_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m2_tu( @@ -363,7 +363,7 @@ vint64m2_t test_vxor_vv_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m4_tu( @@ -372,7 +372,7 @@ vint64m2_t test_vxor_vx_i64m2_tu(vint64m2_t maskedoff, vint64m2_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vxor_vv_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m4_tu( @@ -381,7 +381,7 @@ vint64m4_t test_vxor_vv_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m8_tu( @@ -390,7 +390,7 @@ vint64m4_t test_vxor_vx_i64m4_tu(vint64m4_t maskedoff, vint64m4_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vxor_vv_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m8_tu( @@ -399,7 +399,7 @@ vint64m8_t test_vxor_vv_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf8_tu( @@ -408,7 +408,7 @@ vint64m8_t test_vxor_vx_i64m8_tu(vint64m8_t maskedoff, vint64m8_t op1, int64_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vxor_vv_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf8_tu( @@ -417,7 +417,7 @@ vuint8mf8_t test_vxor_vv_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf4_tu( @@ -426,7 +426,7 @@ vuint8mf8_t test_vxor_vx_u8mf8_tu(vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vxor_vv_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf4_tu( @@ -435,7 +435,7 @@ vuint8mf4_t test_vxor_vv_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf2_tu( @@ -444,7 +444,7 @@ vuint8mf4_t test_vxor_vx_u8mf4_tu(vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vxor_vv_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf2_tu( @@ -453,7 +453,7 @@ vuint8mf2_t test_vxor_vv_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m1_tu( @@ -462,7 +462,7 @@ vuint8mf2_t test_vxor_vx_u8mf2_tu(vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vxor_vv_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m1_tu( @@ -471,7 +471,7 @@ vuint8m1_t test_vxor_vv_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m2_tu( @@ -480,7 +480,7 @@ vuint8m1_t test_vxor_vx_u8m1_tu(vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vxor_vv_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m2_tu( @@ -489,7 +489,7 @@ vuint8m2_t test_vxor_vv_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m4_tu( @@ -498,7 +498,7 @@ vuint8m2_t test_vxor_vx_u8m2_tu(vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vxor_vv_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m4_tu( @@ -507,7 +507,7 @@ vuint8m4_t test_vxor_vv_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m8_tu( @@ -516,7 +516,7 @@ vuint8m4_t test_vxor_vx_u8m4_tu(vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vxor_vv_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m8_tu( @@ -525,7 +525,7 @@ vuint8m8_t test_vxor_vv_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf4_tu( @@ -534,7 +534,7 @@ vuint8m8_t test_vxor_vx_u8m8_tu(vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vxor_vv_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf4_tu( @@ -543,7 +543,7 @@ vuint16mf4_t test_vxor_vv_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16mf4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf2_tu( @@ -552,7 +552,7 @@ vuint16mf4_t test_vxor_vx_u16mf4_tu(vuint16mf4_t maskedoff, vuint16mf4_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vxor_vv_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf2_tu( @@ -561,7 +561,7 @@ vuint16mf2_t test_vxor_vv_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m1_tu( @@ -570,7 +570,7 @@ vuint16mf2_t test_vxor_vx_u16mf2_tu(vuint16mf2_t maskedoff, vuint16mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vxor_vv_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m1_tu( @@ -579,7 +579,7 @@ vuint16m1_t test_vxor_vv_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m2_tu( @@ -588,7 +588,7 @@ vuint16m1_t test_vxor_vx_u16m1_tu(vuint16m1_t maskedoff, vuint16m1_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vxor_vv_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m2_tu( @@ -597,7 +597,7 @@ vuint16m2_t test_vxor_vv_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m4_tu( @@ -606,7 +606,7 @@ vuint16m2_t test_vxor_vx_u16m2_tu(vuint16m2_t maskedoff, vuint16m2_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vxor_vv_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m4_tu( @@ -615,7 +615,7 @@ vuint16m4_t test_vxor_vv_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m8_tu( @@ -624,7 +624,7 @@ vuint16m4_t test_vxor_vx_u16m4_tu(vuint16m4_t maskedoff, vuint16m4_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vxor_vv_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m8_tu( @@ -633,7 +633,7 @@ vuint16m8_t test_vxor_vv_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32mf2_tu( @@ -642,7 +642,7 @@ vuint16m8_t test_vxor_vx_u16m8_tu(vuint16m8_t maskedoff, vuint16m8_t op1, uint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vxor_vv_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32mf2_tu( @@ -651,7 +651,7 @@ vuint32mf2_t test_vxor_vv_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32mf2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32mf2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m1_tu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vxor_vx_u32mf2_tu(vuint32mf2_t maskedoff, vuint32mf2_t op1, ui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vxor_vv_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m1_tu( @@ -669,7 +669,7 @@ vuint32m1_t test_vxor_vv_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m2_tu( @@ -678,7 +678,7 @@ vuint32m1_t test_vxor_vx_u32m1_tu(vuint32m1_t maskedoff, vuint32m1_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vxor_vv_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m2_tu( @@ -687,7 +687,7 @@ vuint32m2_t test_vxor_vv_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m4_tu( @@ -696,7 +696,7 @@ vuint32m2_t test_vxor_vx_u32m2_tu(vuint32m2_t maskedoff, vuint32m2_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vxor_vv_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m4_tu( @@ -705,7 +705,7 @@ vuint32m4_t test_vxor_vv_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m8_tu( @@ -714,7 +714,7 @@ vuint32m4_t test_vxor_vx_u32m4_tu(vuint32m4_t maskedoff, vuint32m4_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vxor_vv_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m8_tu( @@ -723,7 +723,7 @@ vuint32m8_t test_vxor_vv_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m1_tu( @@ -732,7 +732,7 @@ vuint32m8_t test_vxor_vx_u32m8_tu(vuint32m8_t maskedoff, vuint32m8_t op1, uint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vxor_vv_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m1_tu( @@ -741,7 +741,7 @@ vuint64m1_t test_vxor_vv_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m1_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m1_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m2_tu( @@ -750,7 +750,7 @@ vuint64m1_t test_vxor_vx_u64m1_tu(vuint64m1_t maskedoff, vuint64m1_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vxor_vv_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m2_tu( @@ -759,7 +759,7 @@ vuint64m2_t test_vxor_vv_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m2_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m2_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m4_tu( @@ -768,7 +768,7 @@ vuint64m2_t test_vxor_vx_u64m2_tu(vuint64m2_t maskedoff, vuint64m2_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vxor_vv_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m4_tu( @@ -777,7 +777,7 @@ vuint64m4_t test_vxor_vv_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m4_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m4_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m8_tu( @@ -786,7 +786,7 @@ vuint64m4_t test_vxor_vx_u64m4_tu(vuint64m4_t maskedoff, vuint64m4_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vxor_vv_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m8_tu( @@ -795,7 +795,7 @@ vuint64m8_t test_vxor_vv_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m8_tu(maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m8_tu(maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf8_tum( @@ -804,7 +804,7 @@ vuint64m8_t test_vxor_vx_u64m8_tu(vuint64m8_t maskedoff, vuint64m8_t op1, uint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vxor_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf8_tum( @@ -813,7 +813,7 @@ vint8mf8_t test_vxor_vv_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf4_tum( @@ -822,7 +822,7 @@ vint8mf8_t test_vxor_vx_i8mf8_tum(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vxor_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf4_tum( @@ -831,7 +831,7 @@ vint8mf4_t test_vxor_vv_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf2_tum( @@ -840,7 +840,7 @@ vint8mf4_t test_vxor_vx_i8mf4_tum(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vxor_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf2_tum( @@ -849,7 +849,7 @@ vint8mf2_t test_vxor_vv_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m1_tum( @@ -858,7 +858,7 @@ vint8mf2_t test_vxor_vx_i8mf2_tum(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vxor_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m1_tum( @@ -867,7 +867,7 @@ vint8m1_t test_vxor_vv_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m2_tum( @@ -876,7 +876,7 @@ vint8m1_t test_vxor_vx_i8m1_tum(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vxor_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m2_tum( @@ -885,7 +885,7 @@ vint8m2_t test_vxor_vv_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m4_tum( @@ -894,7 +894,7 @@ vint8m2_t test_vxor_vx_i8m2_tum(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vxor_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m4_tum( @@ -903,7 +903,7 @@ vint8m4_t test_vxor_vv_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m8_tum( @@ -912,7 +912,7 @@ vint8m4_t test_vxor_vx_i8m4_tum(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vxor_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m8_tum( @@ -921,7 +921,7 @@ vint8m8_t test_vxor_vv_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf4_tum( @@ -930,7 +930,7 @@ vint8m8_t test_vxor_vx_i8m8_tum(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vxor_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf4_tum( @@ -939,7 +939,7 @@ vint16mf4_t test_vxor_vv_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf2_tum( @@ -948,7 +948,7 @@ vint16mf4_t test_vxor_vx_i16mf4_tum(vbool64_t mask, vint16mf4_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vxor_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf2_tum( @@ -957,7 +957,7 @@ vint16mf2_t test_vxor_vv_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m1_tum( @@ -966,7 +966,7 @@ vint16mf2_t test_vxor_vx_i16mf2_tum(vbool32_t mask, vint16mf2_t maskedoff, vint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vxor_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m1_tum( @@ -975,7 +975,7 @@ vint16m1_t test_vxor_vv_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m2_tum( @@ -984,7 +984,7 @@ vint16m1_t test_vxor_vx_i16m1_tum(vbool16_t mask, vint16m1_t maskedoff, vint16m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vxor_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m2_tum( @@ -993,7 +993,7 @@ vint16m2_t test_vxor_vv_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m4_tum( @@ -1002,7 +1002,7 @@ vint16m2_t test_vxor_vx_i16m2_tum(vbool8_t mask, vint16m2_t maskedoff, vint16m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vxor_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m4_tum( @@ -1011,7 +1011,7 @@ vint16m4_t test_vxor_vv_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m8_tum( @@ -1020,7 +1020,7 @@ vint16m4_t test_vxor_vx_i16m4_tum(vbool4_t mask, vint16m4_t maskedoff, vint16m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vxor_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m8_tum( @@ -1029,7 +1029,7 @@ vint16m8_t test_vxor_vv_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32mf2_tum( @@ -1038,7 +1038,7 @@ vint16m8_t test_vxor_vx_i16m8_tum(vbool2_t mask, vint16m8_t maskedoff, vint16m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vxor_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32mf2_tum( @@ -1047,7 +1047,7 @@ vint32mf2_t test_vxor_vv_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m1_tum( @@ -1056,7 +1056,7 @@ vint32mf2_t test_vxor_vx_i32mf2_tum(vbool64_t mask, vint32mf2_t maskedoff, vint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vxor_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m1_tum( @@ -1065,7 +1065,7 @@ vint32m1_t test_vxor_vv_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m2_tum( @@ -1074,7 +1074,7 @@ vint32m1_t test_vxor_vx_i32m1_tum(vbool32_t mask, vint32m1_t maskedoff, vint32m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vxor_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m2_tum( @@ -1083,7 +1083,7 @@ vint32m2_t test_vxor_vv_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m4_tum( @@ -1092,7 +1092,7 @@ vint32m2_t test_vxor_vx_i32m2_tum(vbool16_t mask, vint32m2_t maskedoff, vint32m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vxor_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m4_tum( @@ -1101,7 +1101,7 @@ vint32m4_t test_vxor_vv_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m8_tum( @@ -1110,7 +1110,7 @@ vint32m4_t test_vxor_vx_i32m4_tum(vbool8_t mask, vint32m4_t maskedoff, vint32m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vxor_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m8_tum( @@ -1119,7 +1119,7 @@ vint32m8_t test_vxor_vv_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m1_tum( @@ -1128,7 +1128,7 @@ vint32m8_t test_vxor_vx_i32m8_tum(vbool4_t mask, vint32m8_t maskedoff, vint32m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vxor_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m1_tum( @@ -1137,7 +1137,7 @@ vint64m1_t test_vxor_vv_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m2_tum( @@ -1146,7 +1146,7 @@ vint64m1_t test_vxor_vx_i64m1_tum(vbool64_t mask, vint64m1_t maskedoff, vint64m1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vxor_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m2_tum( @@ -1155,7 +1155,7 @@ vint64m2_t test_vxor_vv_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m4_tum( @@ -1164,7 +1164,7 @@ vint64m2_t test_vxor_vx_i64m2_tum(vbool32_t mask, vint64m2_t maskedoff, vint64m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vxor_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m4_tum( @@ -1173,7 +1173,7 @@ vint64m4_t test_vxor_vv_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m8_tum( @@ -1182,7 +1182,7 @@ vint64m4_t test_vxor_vx_i64m4_tum(vbool16_t mask, vint64m4_t maskedoff, vint64m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vxor_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m8_tum( @@ -1191,7 +1191,7 @@ vint64m8_t test_vxor_vv_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf8_tum( @@ -1200,7 +1200,7 @@ vint64m8_t test_vxor_vx_i64m8_tum(vbool8_t mask, vint64m8_t maskedoff, vint64m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vxor_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf8_tum( @@ -1209,7 +1209,7 @@ vuint8mf8_t test_vxor_vv_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf4_tum( @@ -1218,7 +1218,7 @@ vuint8mf8_t test_vxor_vx_u8mf8_tum(vbool64_t mask, vuint8mf8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vxor_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf4_tum( @@ -1227,7 +1227,7 @@ vuint8mf4_t test_vxor_vv_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf2_tum( @@ -1236,7 +1236,7 @@ vuint8mf4_t test_vxor_vx_u8mf4_tum(vbool32_t mask, vuint8mf4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vxor_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf2_tum( @@ -1245,7 +1245,7 @@ vuint8mf2_t test_vxor_vv_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m1_tum( @@ -1254,7 +1254,7 @@ vuint8mf2_t test_vxor_vx_u8mf2_tum(vbool16_t mask, vuint8mf2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vxor_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m1_tum( @@ -1263,7 +1263,7 @@ vuint8m1_t test_vxor_vv_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m2_tum( @@ -1272,7 +1272,7 @@ vuint8m1_t test_vxor_vx_u8m1_tum(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vxor_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m2_tum( @@ -1281,7 +1281,7 @@ vuint8m2_t test_vxor_vv_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m4_tum( @@ -1290,7 +1290,7 @@ vuint8m2_t test_vxor_vx_u8m2_tum(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vxor_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m4_tum( @@ -1299,7 +1299,7 @@ vuint8m4_t test_vxor_vv_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m8_tum( @@ -1308,7 +1308,7 @@ vuint8m4_t test_vxor_vx_u8m4_tum(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vxor_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m8_tum( @@ -1317,7 +1317,7 @@ vuint8m8_t test_vxor_vv_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf4_tum( @@ -1326,7 +1326,7 @@ vuint8m8_t test_vxor_vx_u8m8_tum(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vxor_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf4_tum( @@ -1335,7 +1335,7 @@ vuint16mf4_t test_vxor_vv_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16mf4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf2_tum( @@ -1344,7 +1344,7 @@ vuint16mf4_t test_vxor_vx_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vxor_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf2_tum( @@ -1353,7 +1353,7 @@ vuint16mf2_t test_vxor_vv_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m1_tum( @@ -1362,7 +1362,7 @@ vuint16mf2_t test_vxor_vx_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vxor_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m1_tum( @@ -1371,7 +1371,7 @@ vuint16m1_t test_vxor_vv_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m2_tum( @@ -1380,7 +1380,7 @@ vuint16m1_t test_vxor_vx_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vxor_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m2_tum( @@ -1389,7 +1389,7 @@ vuint16m2_t test_vxor_vv_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m4_tum( @@ -1398,7 +1398,7 @@ vuint16m2_t test_vxor_vx_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vxor_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m4_tum( @@ -1407,7 +1407,7 @@ vuint16m4_t test_vxor_vv_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m8_tum( @@ -1416,7 +1416,7 @@ vuint16m4_t test_vxor_vx_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vxor_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m8_tum( @@ -1425,7 +1425,7 @@ vuint16m8_t test_vxor_vv_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32mf2_tum( @@ -1434,7 +1434,7 @@ vuint16m8_t test_vxor_vx_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vxor_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32mf2_tum( @@ -1443,7 +1443,7 @@ vuint32mf2_t test_vxor_vv_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32mf2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m1_tum( @@ -1452,7 +1452,7 @@ vuint32mf2_t test_vxor_vx_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vxor_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m1_tum( @@ -1461,7 +1461,7 @@ vuint32m1_t test_vxor_vv_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m2_tum( @@ -1470,7 +1470,7 @@ vuint32m1_t test_vxor_vx_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vxor_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m2_tum( @@ -1479,7 +1479,7 @@ vuint32m2_t test_vxor_vv_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m4_tum( @@ -1488,7 +1488,7 @@ vuint32m2_t test_vxor_vx_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vxor_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m4_tum( @@ -1497,7 +1497,7 @@ vuint32m4_t test_vxor_vv_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m8_tum( @@ -1506,7 +1506,7 @@ vuint32m4_t test_vxor_vx_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vxor_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m8_tum( @@ -1515,7 +1515,7 @@ vuint32m8_t test_vxor_vv_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m1_tum( @@ -1524,7 +1524,7 @@ vuint32m8_t test_vxor_vx_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vxor_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m1_tum( @@ -1533,7 +1533,7 @@ vuint64m1_t test_vxor_vv_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m1_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m2_tum( @@ -1542,7 +1542,7 @@ vuint64m1_t test_vxor_vx_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vxor_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m2_tum( @@ -1551,7 +1551,7 @@ vuint64m2_t test_vxor_vv_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m2_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m4_tum( @@ -1560,7 +1560,7 @@ vuint64m2_t test_vxor_vx_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vxor_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m4_tum( @@ -1569,7 +1569,7 @@ vuint64m4_t test_vxor_vv_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m4_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m8_tum( @@ -1578,7 +1578,7 @@ vuint64m4_t test_vxor_vx_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vxor_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m8_tum( @@ -1587,7 +1587,7 @@ vuint64m8_t test_vxor_vv_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m8_tum(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf8_tumu( @@ -1596,7 +1596,7 @@ vuint64m8_t test_vxor_vx_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vxor_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf8_tumu( @@ -1605,7 +1605,7 @@ vint8mf8_t test_vxor_vv_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf4_tumu( @@ -1614,7 +1614,7 @@ vint8mf8_t test_vxor_vx_i8mf8_tumu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vxor_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf4_tumu( @@ -1623,7 +1623,7 @@ vint8mf4_t test_vxor_vv_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf2_tumu( @@ -1632,7 +1632,7 @@ vint8mf4_t test_vxor_vx_i8mf4_tumu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vxor_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf2_tumu( @@ -1641,7 +1641,7 @@ vint8mf2_t test_vxor_vv_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m1_tumu( @@ -1650,7 +1650,7 @@ vint8mf2_t test_vxor_vx_i8mf2_tumu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vxor_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m1_tumu( @@ -1659,7 +1659,7 @@ vint8m1_t test_vxor_vv_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m2_tumu( @@ -1668,7 +1668,7 @@ vint8m1_t test_vxor_vx_i8m1_tumu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vxor_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m2_tumu( @@ -1677,7 +1677,7 @@ vint8m2_t test_vxor_vv_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m4_tumu( @@ -1686,7 +1686,7 @@ vint8m2_t test_vxor_vx_i8m2_tumu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vxor_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m4_tumu( @@ -1695,7 +1695,7 @@ vint8m4_t test_vxor_vv_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m8_tumu( @@ -1704,7 +1704,7 @@ vint8m4_t test_vxor_vx_i8m4_tumu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vxor_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m8_tumu( @@ -1713,7 +1713,7 @@ vint8m8_t test_vxor_vv_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf4_tumu( @@ -1722,7 +1722,7 @@ vint8m8_t test_vxor_vx_i8m8_tumu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vxor_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf4_tumu( @@ -1731,7 +1731,7 @@ vint16mf4_t test_vxor_vv_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf2_tumu( @@ -1740,7 +1740,7 @@ vint16mf4_t test_vxor_vx_i16mf4_tumu(vbool64_t mask, vint16mf4_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vxor_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf2_tumu( @@ -1749,7 +1749,7 @@ vint16mf2_t test_vxor_vv_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m1_tumu( @@ -1758,7 +1758,7 @@ vint16mf2_t test_vxor_vx_i16mf2_tumu(vbool32_t mask, vint16mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vxor_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m1_tumu( @@ -1767,7 +1767,7 @@ vint16m1_t test_vxor_vv_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m2_tumu( @@ -1776,7 +1776,7 @@ vint16m1_t test_vxor_vx_i16m1_tumu(vbool16_t mask, vint16m1_t maskedoff, vint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vxor_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m2_tumu( @@ -1785,7 +1785,7 @@ vint16m2_t test_vxor_vv_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m4_tumu( @@ -1794,7 +1794,7 @@ vint16m2_t test_vxor_vx_i16m2_tumu(vbool8_t mask, vint16m2_t maskedoff, vint16m2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vxor_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m4_tumu( @@ -1803,7 +1803,7 @@ vint16m4_t test_vxor_vv_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m8_tumu( @@ -1812,7 +1812,7 @@ vint16m4_t test_vxor_vx_i16m4_tumu(vbool4_t mask, vint16m4_t maskedoff, vint16m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vxor_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m8_tumu( @@ -1821,7 +1821,7 @@ vint16m8_t test_vxor_vv_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32mf2_tumu( @@ -1830,7 +1830,7 @@ vint16m8_t test_vxor_vx_i16m8_tumu(vbool2_t mask, vint16m8_t maskedoff, vint16m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vxor_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32mf2_tumu( @@ -1839,7 +1839,7 @@ vint32mf2_t test_vxor_vv_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m1_tumu( @@ -1848,7 +1848,7 @@ vint32mf2_t test_vxor_vx_i32mf2_tumu(vbool64_t mask, vint32mf2_t maskedoff, vint // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vxor_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m1_tumu( @@ -1857,7 +1857,7 @@ vint32m1_t test_vxor_vv_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m2_tumu( @@ -1866,7 +1866,7 @@ vint32m1_t test_vxor_vx_i32m1_tumu(vbool32_t mask, vint32m1_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vxor_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m2_tumu( @@ -1875,7 +1875,7 @@ vint32m2_t test_vxor_vv_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m4_tumu( @@ -1884,7 +1884,7 @@ vint32m2_t test_vxor_vx_i32m2_tumu(vbool16_t mask, vint32m2_t maskedoff, vint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vxor_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m4_tumu( @@ -1893,7 +1893,7 @@ vint32m4_t test_vxor_vv_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m8_tumu( @@ -1902,7 +1902,7 @@ vint32m4_t test_vxor_vx_i32m4_tumu(vbool8_t mask, vint32m4_t maskedoff, vint32m4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vxor_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m8_tumu( @@ -1911,7 +1911,7 @@ vint32m8_t test_vxor_vv_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m1_tumu( @@ -1920,7 +1920,7 @@ vint32m8_t test_vxor_vx_i32m8_tumu(vbool4_t mask, vint32m8_t maskedoff, vint32m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vxor_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m1_tumu( @@ -1929,7 +1929,7 @@ vint64m1_t test_vxor_vv_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m2_tumu( @@ -1938,7 +1938,7 @@ vint64m1_t test_vxor_vx_i64m1_tumu(vbool64_t mask, vint64m1_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vxor_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m2_tumu( @@ -1947,7 +1947,7 @@ vint64m2_t test_vxor_vv_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m4_tumu( @@ -1956,7 +1956,7 @@ vint64m2_t test_vxor_vx_i64m2_tumu(vbool32_t mask, vint64m2_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vxor_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m4_tumu( @@ -1965,7 +1965,7 @@ vint64m4_t test_vxor_vv_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m8_tumu( @@ -1974,7 +1974,7 @@ vint64m4_t test_vxor_vx_i64m4_tumu(vbool16_t mask, vint64m4_t maskedoff, vint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vxor_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m8_tumu( @@ -1983,7 +1983,7 @@ vint64m8_t test_vxor_vv_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf8_tumu( @@ -1992,7 +1992,7 @@ vint64m8_t test_vxor_vx_i64m8_tumu(vbool8_t mask, vint64m8_t maskedoff, vint64m8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vxor_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf8_tumu( @@ -2001,7 +2001,7 @@ vuint8mf8_t test_vxor_vv_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf4_tumu( @@ -2010,7 +2010,7 @@ vuint8mf8_t test_vxor_vx_u8mf8_tumu(vbool64_t mask, vuint8mf8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vxor_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf4_tumu( @@ -2019,7 +2019,7 @@ vuint8mf4_t test_vxor_vv_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf2_tumu( @@ -2028,7 +2028,7 @@ vuint8mf4_t test_vxor_vx_u8mf4_tumu(vbool32_t mask, vuint8mf4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vxor_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf2_tumu( @@ -2037,7 +2037,7 @@ vuint8mf2_t test_vxor_vv_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m1_tumu( @@ -2046,7 +2046,7 @@ vuint8mf2_t test_vxor_vx_u8mf2_tumu(vbool16_t mask, vuint8mf2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vxor_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m1_tumu( @@ -2055,7 +2055,7 @@ vuint8m1_t test_vxor_vv_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m2_tumu( @@ -2064,7 +2064,7 @@ vuint8m1_t test_vxor_vx_u8m1_tumu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vxor_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m2_tumu( @@ -2073,7 +2073,7 @@ vuint8m2_t test_vxor_vv_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m4_tumu( @@ -2082,7 +2082,7 @@ vuint8m2_t test_vxor_vx_u8m2_tumu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vxor_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m4_tumu( @@ -2091,7 +2091,7 @@ vuint8m4_t test_vxor_vv_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m8_tumu( @@ -2100,7 +2100,7 @@ vuint8m4_t test_vxor_vx_u8m4_tumu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vxor_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m8_tumu( @@ -2109,7 +2109,7 @@ vuint8m8_t test_vxor_vv_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf4_tumu( @@ -2118,7 +2118,7 @@ vuint8m8_t test_vxor_vx_u8m8_tumu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vxor_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf4_tumu( @@ -2127,7 +2127,7 @@ vuint16mf4_t test_vxor_vv_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16mf4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf2_tumu( @@ -2136,7 +2136,7 @@ vuint16mf4_t test_vxor_vx_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vxor_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf2_tumu( @@ -2145,7 +2145,7 @@ vuint16mf2_t test_vxor_vv_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m1_tumu( @@ -2154,7 +2154,7 @@ vuint16mf2_t test_vxor_vx_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vxor_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m1_tumu( @@ -2163,7 +2163,7 @@ vuint16m1_t test_vxor_vv_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m2_tumu( @@ -2172,7 +2172,7 @@ vuint16m1_t test_vxor_vx_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vxor_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m2_tumu( @@ -2181,7 +2181,7 @@ vuint16m2_t test_vxor_vv_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m4_tumu( @@ -2190,7 +2190,7 @@ vuint16m2_t test_vxor_vx_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vxor_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m4_tumu( @@ -2199,7 +2199,7 @@ vuint16m4_t test_vxor_vv_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m8_tumu( @@ -2208,7 +2208,7 @@ vuint16m4_t test_vxor_vx_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vxor_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m8_tumu( @@ -2217,7 +2217,7 @@ vuint16m8_t test_vxor_vv_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32mf2_tumu( @@ -2226,7 +2226,7 @@ vuint16m8_t test_vxor_vx_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vxor_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32mf2_tumu( @@ -2235,7 +2235,7 @@ vuint32mf2_t test_vxor_vv_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32mf2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m1_tumu( @@ -2244,7 +2244,7 @@ vuint32mf2_t test_vxor_vx_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vxor_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m1_tumu( @@ -2253,7 +2253,7 @@ vuint32m1_t test_vxor_vv_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m2_tumu( @@ -2262,7 +2262,7 @@ vuint32m1_t test_vxor_vx_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vxor_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m2_tumu( @@ -2271,7 +2271,7 @@ vuint32m2_t test_vxor_vv_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m4_tumu( @@ -2280,7 +2280,7 @@ vuint32m2_t test_vxor_vx_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vxor_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m4_tumu( @@ -2289,7 +2289,7 @@ vuint32m4_t test_vxor_vv_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m8_tumu( @@ -2298,7 +2298,7 @@ vuint32m4_t test_vxor_vx_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vxor_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m8_tumu( @@ -2307,7 +2307,7 @@ vuint32m8_t test_vxor_vv_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m1_tumu( @@ -2316,7 +2316,7 @@ vuint32m8_t test_vxor_vx_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint3 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vxor_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m1_tumu( @@ -2325,7 +2325,7 @@ vuint64m1_t test_vxor_vv_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m1_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m2_tumu( @@ -2334,7 +2334,7 @@ vuint64m1_t test_vxor_vx_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vxor_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m2_tumu( @@ -2343,7 +2343,7 @@ vuint64m2_t test_vxor_vv_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m2_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m4_tumu( @@ -2352,7 +2352,7 @@ vuint64m2_t test_vxor_vx_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vxor_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m4_tumu( @@ -2361,7 +2361,7 @@ vuint64m4_t test_vxor_vv_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m4_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m8_tumu( @@ -2370,7 +2370,7 @@ vuint64m4_t test_vxor_vx_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vxor_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m8_tumu( @@ -2379,7 +2379,7 @@ vuint64m8_t test_vxor_vv_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m8_tumu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf8_mu( @@ -2388,7 +2388,7 @@ vuint64m8_t test_vxor_vx_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint6 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vxor_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf8_mu( @@ -2397,7 +2397,7 @@ vint8mf8_t test_vxor_vv_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vxor_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf4_mu( @@ -2406,7 +2406,7 @@ vint8mf8_t test_vxor_vx_i8mf8_mu(vbool64_t mask, vint8mf8_t maskedoff, vint8mf8_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vxor_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf4_mu( @@ -2415,7 +2415,7 @@ vint8mf4_t test_vxor_vv_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vxor_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8mf2_mu( @@ -2424,7 +2424,7 @@ vint8mf4_t test_vxor_vx_i8mf4_mu(vbool32_t mask, vint8mf4_t maskedoff, vint8mf4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vxor_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8mf2_mu( @@ -2433,7 +2433,7 @@ vint8mf2_t test_vxor_vv_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vxor_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m1_mu( @@ -2442,7 +2442,7 @@ vint8mf2_t test_vxor_vx_i8mf2_mu(vbool16_t mask, vint8mf2_t maskedoff, vint8mf2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vxor_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m1_mu( @@ -2451,7 +2451,7 @@ vint8m1_t test_vxor_vv_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vxor_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m2_mu( @@ -2460,7 +2460,7 @@ vint8m1_t test_vxor_vx_i8m1_mu(vbool8_t mask, vint8m1_t maskedoff, vint8m1_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vxor_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m2_mu( @@ -2469,7 +2469,7 @@ vint8m2_t test_vxor_vv_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vxor_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m4_mu( @@ -2478,7 +2478,7 @@ vint8m2_t test_vxor_vx_i8m2_mu(vbool4_t mask, vint8m2_t maskedoff, vint8m2_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vxor_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m4_mu( @@ -2487,7 +2487,7 @@ vint8m4_t test_vxor_vv_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vxor_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i8m8_mu( @@ -2496,7 +2496,7 @@ vint8m4_t test_vxor_vx_i8m4_mu(vbool2_t mask, vint8m4_t maskedoff, vint8m4_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vxor_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i8m8_mu( @@ -2505,7 +2505,7 @@ vint8m8_t test_vxor_vv_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vxor_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1, int8_t op2, size_t vl) { - return vxor_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf4_mu( @@ -2514,7 +2514,7 @@ vint8m8_t test_vxor_vx_i8m8_mu(vbool1_t mask, vint8m8_t maskedoff, vint8m8_t op1 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vxor_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf4_mu( @@ -2523,7 +2523,7 @@ vint16mf4_t test_vxor_vv_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vxor_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16mf4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16mf2_mu( @@ -2532,7 +2532,7 @@ vint16mf4_t test_vxor_vx_i16mf4_mu(vbool64_t mask, vint16mf4_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vxor_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16mf2_mu( @@ -2541,7 +2541,7 @@ vint16mf2_t test_vxor_vv_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vxor_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16mf2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m1_mu( @@ -2550,7 +2550,7 @@ vint16mf2_t test_vxor_vx_i16mf2_mu(vbool32_t mask, vint16mf2_t maskedoff, vint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vxor_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m1_mu( @@ -2559,7 +2559,7 @@ vint16m1_t test_vxor_vv_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vxor_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m2_mu( @@ -2568,7 +2568,7 @@ vint16m1_t test_vxor_vx_i16m1_mu(vbool16_t mask, vint16m1_t maskedoff, vint16m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vxor_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m2_mu( @@ -2577,7 +2577,7 @@ vint16m2_t test_vxor_vv_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vxor_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m4_mu( @@ -2586,7 +2586,7 @@ vint16m2_t test_vxor_vx_i16m2_mu(vbool8_t mask, vint16m2_t maskedoff, vint16m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vxor_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m4_mu( @@ -2595,7 +2595,7 @@ vint16m4_t test_vxor_vv_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vxor_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i16m8_mu( @@ -2604,7 +2604,7 @@ vint16m4_t test_vxor_vx_i16m4_mu(vbool4_t mask, vint16m4_t maskedoff, vint16m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vxor_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i16m8_mu( @@ -2613,7 +2613,7 @@ vint16m8_t test_vxor_vv_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vxor_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t op1, int16_t op2, size_t vl) { - return vxor_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32mf2_mu( @@ -2622,7 +2622,7 @@ vint16m8_t test_vxor_vx_i16m8_mu(vbool2_t mask, vint16m8_t maskedoff, vint16m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vxor_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32mf2_mu( @@ -2631,7 +2631,7 @@ vint32mf2_t test_vxor_vv_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vxor_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32mf2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m1_mu( @@ -2640,7 +2640,7 @@ vint32mf2_t test_vxor_vx_i32mf2_mu(vbool64_t mask, vint32mf2_t maskedoff, vint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vxor_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m1_mu( @@ -2649,7 +2649,7 @@ vint32m1_t test_vxor_vv_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vxor_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m2_mu( @@ -2658,7 +2658,7 @@ vint32m1_t test_vxor_vx_i32m1_mu(vbool32_t mask, vint32m1_t maskedoff, vint32m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vxor_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m2_mu( @@ -2667,7 +2667,7 @@ vint32m2_t test_vxor_vv_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vxor_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m4_mu( @@ -2676,7 +2676,7 @@ vint32m2_t test_vxor_vx_i32m2_mu(vbool16_t mask, vint32m2_t maskedoff, vint32m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vxor_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m4_mu( @@ -2685,7 +2685,7 @@ vint32m4_t test_vxor_vv_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vxor_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i32m8_mu( @@ -2694,7 +2694,7 @@ vint32m4_t test_vxor_vx_i32m4_mu(vbool8_t mask, vint32m4_t maskedoff, vint32m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vxor_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i32m8_mu( @@ -2703,7 +2703,7 @@ vint32m8_t test_vxor_vv_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vxor_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t op1, int32_t op2, size_t vl) { - return vxor_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m1_mu( @@ -2712,7 +2712,7 @@ vint32m8_t test_vxor_vx_i32m8_mu(vbool4_t mask, vint32m8_t maskedoff, vint32m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vxor_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m1_mu( @@ -2721,7 +2721,7 @@ vint64m1_t test_vxor_vv_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vxor_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m2_mu( @@ -2730,7 +2730,7 @@ vint64m1_t test_vxor_vx_i64m1_mu(vbool64_t mask, vint64m1_t maskedoff, vint64m1_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vxor_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m2_mu( @@ -2739,7 +2739,7 @@ vint64m2_t test_vxor_vv_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vxor_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m4_mu( @@ -2748,7 +2748,7 @@ vint64m2_t test_vxor_vx_i64m2_mu(vbool32_t mask, vint64m2_t maskedoff, vint64m2_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vxor_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m4_mu( @@ -2757,7 +2757,7 @@ vint64m4_t test_vxor_vv_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vxor_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_i64m8_mu( @@ -2766,7 +2766,7 @@ vint64m4_t test_vxor_vx_i64m4_mu(vbool16_t mask, vint64m4_t maskedoff, vint64m4_ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vxor_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_i64m8_mu( @@ -2775,7 +2775,7 @@ vint64m8_t test_vxor_vv_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vxor_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t op1, int64_t op2, size_t vl) { - return vxor_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_i64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf8_mu( @@ -2784,7 +2784,7 @@ vint64m8_t test_vxor_vx_i64m8_mu(vbool8_t mask, vint64m8_t maskedoff, vint64m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vxor_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf8_mu( @@ -2793,7 +2793,7 @@ vuint8mf8_t test_vxor_vv_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vxor_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf4_mu( @@ -2802,7 +2802,7 @@ vuint8mf8_t test_vxor_vx_u8mf8_mu(vbool64_t mask, vuint8mf8_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vxor_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf4_mu( @@ -2811,7 +2811,7 @@ vuint8mf4_t test_vxor_vv_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vxor_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8mf2_mu( @@ -2820,7 +2820,7 @@ vuint8mf4_t test_vxor_vx_u8mf4_mu(vbool32_t mask, vuint8mf4_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vxor_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8mf2_mu( @@ -2829,7 +2829,7 @@ vuint8mf2_t test_vxor_vv_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vxor_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m1_mu( @@ -2838,7 +2838,7 @@ vuint8mf2_t test_vxor_vx_u8mf2_mu(vbool16_t mask, vuint8mf2_t maskedoff, vuint8m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vxor_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m1_mu( @@ -2847,7 +2847,7 @@ vuint8m1_t test_vxor_vv_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vxor_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m2_mu( @@ -2856,7 +2856,7 @@ vuint8m1_t test_vxor_vx_u8m1_mu(vbool8_t mask, vuint8m1_t maskedoff, vuint8m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vxor_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m2_mu( @@ -2865,7 +2865,7 @@ vuint8m2_t test_vxor_vv_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vxor_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m4_mu( @@ -2874,7 +2874,7 @@ vuint8m2_t test_vxor_vx_u8m2_mu(vbool4_t mask, vuint8m2_t maskedoff, vuint8m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vxor_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m4_mu( @@ -2883,7 +2883,7 @@ vuint8m4_t test_vxor_vv_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vxor_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u8m8_mu( @@ -2892,7 +2892,7 @@ vuint8m4_t test_vxor_vx_u8m4_mu(vbool2_t mask, vuint8m4_t maskedoff, vuint8m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vxor_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u8m8_mu( @@ -2901,7 +2901,7 @@ vuint8m8_t test_vxor_vv_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vxor_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vxor_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u8m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf4_mu( @@ -2910,7 +2910,7 @@ vuint8m8_t test_vxor_vx_u8m8_mu(vbool1_t mask, vuint8m8_t maskedoff, vuint8m8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vxor_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf4_mu( @@ -2919,7 +2919,7 @@ vuint16mf4_t test_vxor_vv_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vxor_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16mf4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16mf2_mu( @@ -2928,7 +2928,7 @@ vuint16mf4_t test_vxor_vx_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vxor_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16mf2_mu( @@ -2937,7 +2937,7 @@ vuint16mf2_t test_vxor_vv_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vxor_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m1_mu( @@ -2946,7 +2946,7 @@ vuint16mf2_t test_vxor_vx_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vxor_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m1_mu( @@ -2955,7 +2955,7 @@ vuint16m1_t test_vxor_vv_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vxor_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m2_mu( @@ -2964,7 +2964,7 @@ vuint16m1_t test_vxor_vx_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint16 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vxor_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m2_mu( @@ -2973,7 +2973,7 @@ vuint16m2_t test_vxor_vv_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vxor_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m4_mu( @@ -2982,7 +2982,7 @@ vuint16m2_t test_vxor_vx_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vxor_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m4_mu( @@ -2991,7 +2991,7 @@ vuint16m4_t test_vxor_vv_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vxor_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u16m8_mu( @@ -3000,7 +3000,7 @@ vuint16m4_t test_vxor_vx_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vxor_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u16m8_mu( @@ -3009,7 +3009,7 @@ vuint16m8_t test_vxor_vv_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vxor_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vxor_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u16m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32mf2_mu( @@ -3018,7 +3018,7 @@ vuint16m8_t test_vxor_vx_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint16m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vxor_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32mf2_mu( @@ -3027,7 +3027,7 @@ vuint32mf2_t test_vxor_vv_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vxor_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32mf2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m1_mu( @@ -3036,7 +3036,7 @@ vuint32mf2_t test_vxor_vx_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vxor_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m1_mu( @@ -3045,7 +3045,7 @@ vuint32m1_t test_vxor_vv_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vxor_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m2_mu( @@ -3054,7 +3054,7 @@ vuint32m1_t test_vxor_vx_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vxor_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m2_mu( @@ -3063,7 +3063,7 @@ vuint32m2_t test_vxor_vv_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vxor_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m4_mu( @@ -3072,7 +3072,7 @@ vuint32m2_t test_vxor_vx_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint32 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vxor_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m4_mu( @@ -3081,7 +3081,7 @@ vuint32m4_t test_vxor_vv_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vxor_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u32m8_mu( @@ -3090,7 +3090,7 @@ vuint32m4_t test_vxor_vx_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vxor_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u32m8_mu( @@ -3099,7 +3099,7 @@ vuint32m8_t test_vxor_vv_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vxor_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vxor_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u32m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m1_mu( @@ -3108,7 +3108,7 @@ vuint32m8_t test_vxor_vx_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint32m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vxor_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m1_mu( @@ -3117,7 +3117,7 @@ vuint64m1_t test_vxor_vv_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vxor_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m1_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m2_mu( @@ -3126,7 +3126,7 @@ vuint64m1_t test_vxor_vx_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vxor_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m2_mu( @@ -3135,7 +3135,7 @@ vuint64m2_t test_vxor_vv_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vxor_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m2_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m4_mu( @@ -3144,7 +3144,7 @@ vuint64m2_t test_vxor_vx_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vxor_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m4_mu( @@ -3153,7 +3153,7 @@ vuint64m4_t test_vxor_vv_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vxor_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m4_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vv_u64m8_mu( @@ -3162,7 +3162,7 @@ vuint64m4_t test_vxor_vx_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint64 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vxor_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vv_u64m8_mu(mask, maskedoff, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vxor_vx_u64m8_mu( @@ -3171,6 +3171,6 @@ vuint64m8_t test_vxor_vv_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vxor_vx_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vxor_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); + return __riscv_vxor_vx_u64m8_mu(mask, maskedoff, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vzext.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vzext.c index b7b7d5e267ba9aab241988b9e4aa4ec9825b990c..8073b5475a35a4ab569907efe976976b76349549 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vzext.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vzext.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vzext_vf2_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf2_u16mf4_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u16mf4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf2_tu( @@ -21,7 +21,7 @@ vuint16mf4_t test_vzext_vf2_u16mf4_tu(vuint16mf4_t maskedoff, vuint8mf8_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vzext_vf2_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf2_u16mf2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u16mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m1_tu( @@ -30,7 +30,7 @@ vuint16mf2_t test_vzext_vf2_u16mf2_tu(vuint16mf2_t maskedoff, vuint8mf4_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vzext_vf2_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf2_u16m1_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m2_tu( @@ -39,7 +39,7 @@ vuint16m1_t test_vzext_vf2_u16m1_tu(vuint16m1_t maskedoff, vuint8mf2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vzext_vf2_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf2_u16m2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m4_tu( @@ -48,7 +48,7 @@ vuint16m2_t test_vzext_vf2_u16m2_tu(vuint16m2_t maskedoff, vuint8m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vzext_vf2_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, size_t vl) { - return vzext_vf2_u16m4_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m8_tu( @@ -57,7 +57,7 @@ vuint16m4_t test_vzext_vf2_u16m4_tu(vuint16m4_t maskedoff, vuint8m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vzext_vf2_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, size_t vl) { - return vzext_vf2_u16m8_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32mf2_tu( @@ -66,7 +66,7 @@ vuint16m8_t test_vzext_vf2_u16m8_tu(vuint16m8_t maskedoff, vuint8m4_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf4_u32mf2_tu(vuint32mf2_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf4_u32mf2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m1_tu( @@ -75,7 +75,7 @@ vuint32mf2_t test_vzext_vf4_u32mf2_tu(vuint32mf2_t maskedoff, vuint8mf8_t op1, s // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf4_u32m1_tu(vuint32m1_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf4_u32m1_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m2_tu( @@ -84,7 +84,7 @@ vuint32m1_t test_vzext_vf4_u32m1_tu(vuint32m1_t maskedoff, vuint8mf4_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf4_u32m2_tu(vuint32m2_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf4_u32m2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m4_tu( @@ -93,7 +93,7 @@ vuint32m2_t test_vzext_vf4_u32m2_tu(vuint32m2_t maskedoff, vuint8mf2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf4_u32m4_tu(vuint32m4_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf4_u32m4_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m8_tu( @@ -102,7 +102,7 @@ vuint32m4_t test_vzext_vf4_u32m4_tu(vuint32m4_t maskedoff, vuint8m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf4_u32m8_tu(vuint32m8_t maskedoff, vuint8m2_t op1, size_t vl) { - return vzext_vf4_u32m8_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m1_tu( @@ -111,7 +111,7 @@ vuint32m8_t test_vzext_vf4_u32m8_tu(vuint32m8_t maskedoff, vuint8m2_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf8_u64m1_tu(vuint64m1_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf8_u64m1_tu(maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m2_tu( @@ -120,7 +120,7 @@ vuint64m1_t test_vzext_vf8_u64m1_tu(vuint64m1_t maskedoff, vuint8mf8_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf8_u64m2_tu(vuint64m2_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf8_u64m2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m4_tu( @@ -129,7 +129,7 @@ vuint64m2_t test_vzext_vf8_u64m2_tu(vuint64m2_t maskedoff, vuint8mf4_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf8_u64m4_tu(vuint64m4_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf8_u64m4_tu(maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m8_tu( @@ -138,7 +138,7 @@ vuint64m4_t test_vzext_vf8_u64m4_tu(vuint64m4_t maskedoff, vuint8mf2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf8_u64m8_tu(vuint64m8_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf8_u64m8_tu(maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32mf2_tu( @@ -147,7 +147,7 @@ vuint64m8_t test_vzext_vf8_u64m8_tu(vuint64m8_t maskedoff, vuint8m1_t op1, size_ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf2_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vzext_vf2_u32mf2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u32mf2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m1_tu( @@ -156,7 +156,7 @@ vuint32mf2_t test_vzext_vf2_u32mf2_tu(vuint32mf2_t maskedoff, vuint16mf4_t op1, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf2_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vzext_vf2_u32m1_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m2_tu( @@ -165,7 +165,7 @@ vuint32m1_t test_vzext_vf2_u32m1_tu(vuint32m1_t maskedoff, vuint16mf2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf2_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, size_t vl) { - return vzext_vf2_u32m2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m4_tu( @@ -174,7 +174,7 @@ vuint32m2_t test_vzext_vf2_u32m2_tu(vuint32m2_t maskedoff, vuint16m1_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf2_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, size_t vl) { - return vzext_vf2_u32m4_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m8_tu( @@ -183,7 +183,7 @@ vuint32m4_t test_vzext_vf2_u32m4_tu(vuint32m4_t maskedoff, vuint16m2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf2_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, size_t vl) { - return vzext_vf2_u32m8_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m1_tu( @@ -192,7 +192,7 @@ vuint32m8_t test_vzext_vf2_u32m8_tu(vuint32m8_t maskedoff, vuint16m4_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf4_u64m1_tu(vuint64m1_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vzext_vf4_u64m1_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m2_tu( @@ -201,7 +201,7 @@ vuint64m1_t test_vzext_vf4_u64m1_tu(vuint64m1_t maskedoff, vuint16mf4_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf4_u64m2_tu(vuint64m2_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vzext_vf4_u64m2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m4_tu( @@ -210,7 +210,7 @@ vuint64m2_t test_vzext_vf4_u64m2_tu(vuint64m2_t maskedoff, vuint16mf2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf4_u64m4_tu(vuint64m4_t maskedoff, vuint16m1_t op1, size_t vl) { - return vzext_vf4_u64m4_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m8_tu( @@ -219,7 +219,7 @@ vuint64m4_t test_vzext_vf4_u64m4_tu(vuint64m4_t maskedoff, vuint16m1_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf4_u64m8_tu(vuint64m8_t maskedoff, vuint16m2_t op1, size_t vl) { - return vzext_vf4_u64m8_tu(maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m1_tu( @@ -228,7 +228,7 @@ vuint64m8_t test_vzext_vf4_u64m8_tu(vuint64m8_t maskedoff, vuint16m2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf2_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, size_t vl) { - return vzext_vf2_u64m1_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m1_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m2_tu( @@ -237,7 +237,7 @@ vuint64m1_t test_vzext_vf2_u64m1_tu(vuint64m1_t maskedoff, vuint32mf2_t op1, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf2_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, size_t vl) { - return vzext_vf2_u64m2_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m2_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m4_tu( @@ -246,7 +246,7 @@ vuint64m2_t test_vzext_vf2_u64m2_tu(vuint64m2_t maskedoff, vuint32m1_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf2_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, size_t vl) { - return vzext_vf2_u64m4_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m4_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m8_tu( @@ -255,7 +255,7 @@ vuint64m4_t test_vzext_vf2_u64m4_tu(vuint64m4_t maskedoff, vuint32m2_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf2_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, size_t vl) { - return vzext_vf2_u64m8_tu(maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m8_tu(maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf4_tum( @@ -264,7 +264,7 @@ vuint64m8_t test_vzext_vf2_u64m8_tu(vuint64m8_t maskedoff, vuint32m4_t op1, size // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vzext_vf2_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf2_u16mf4_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16mf4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf2_tum( @@ -273,7 +273,7 @@ vuint16mf4_t test_vzext_vf2_u16mf4_tum(vbool64_t mask, vuint16mf4_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vzext_vf2_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf2_u16mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m1_tum( @@ -282,7 +282,7 @@ vuint16mf2_t test_vzext_vf2_u16mf2_tum(vbool32_t mask, vuint16mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vzext_vf2_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf2_u16m1_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m2_tum( @@ -291,7 +291,7 @@ vuint16m1_t test_vzext_vf2_u16m1_tum(vbool16_t mask, vuint16m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vzext_vf2_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf2_u16m2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m4_tum( @@ -300,7 +300,7 @@ vuint16m2_t test_vzext_vf2_u16m2_tum(vbool8_t mask, vuint16m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vzext_vf2_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, size_t vl) { - return vzext_vf2_u16m4_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m8_tum( @@ -309,7 +309,7 @@ vuint16m4_t test_vzext_vf2_u16m4_tum(vbool4_t mask, vuint16m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vzext_vf2_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, size_t vl) { - return vzext_vf2_u16m8_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32mf2_tum( @@ -318,7 +318,7 @@ vuint16m8_t test_vzext_vf2_u16m8_tum(vbool2_t mask, vuint16m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf4_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf4_u32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m1_tum( @@ -327,7 +327,7 @@ vuint32mf2_t test_vzext_vf4_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf4_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf4_u32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m2_tum( @@ -336,7 +336,7 @@ vuint32m1_t test_vzext_vf4_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf4_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf4_u32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m4_tum( @@ -345,7 +345,7 @@ vuint32m2_t test_vzext_vf4_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf4_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf4_u32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m8_tum( @@ -354,7 +354,7 @@ vuint32m4_t test_vzext_vf4_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf4_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint8m2_t op1, size_t vl) { - return vzext_vf4_u32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m1_tum( @@ -363,7 +363,7 @@ vuint32m8_t test_vzext_vf4_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf8_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf8_u64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m2_tum( @@ -372,7 +372,7 @@ vuint64m1_t test_vzext_vf8_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf8_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf8_u64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m4_tum( @@ -381,7 +381,7 @@ vuint64m2_t test_vzext_vf8_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf8_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf8_u64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m8_tum( @@ -390,7 +390,7 @@ vuint64m4_t test_vzext_vf8_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf8_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf8_u64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32mf2_tum( @@ -399,7 +399,7 @@ vuint64m8_t test_vzext_vf8_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf2_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vzext_vf2_u32mf2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32mf2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m1_tum( @@ -408,7 +408,7 @@ vuint32mf2_t test_vzext_vf2_u32mf2_tum(vbool64_t mask, vuint32mf2_t maskedoff, v // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf2_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vzext_vf2_u32m1_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m2_tum( @@ -417,7 +417,7 @@ vuint32m1_t test_vzext_vf2_u32m1_tum(vbool32_t mask, vuint32m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf2_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, size_t vl) { - return vzext_vf2_u32m2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m4_tum( @@ -426,7 +426,7 @@ vuint32m2_t test_vzext_vf2_u32m2_tum(vbool16_t mask, vuint32m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf2_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, size_t vl) { - return vzext_vf2_u32m4_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m8_tum( @@ -435,7 +435,7 @@ vuint32m4_t test_vzext_vf2_u32m4_tum(vbool8_t mask, vuint32m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf2_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, size_t vl) { - return vzext_vf2_u32m8_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m1_tum( @@ -444,7 +444,7 @@ vuint32m8_t test_vzext_vf2_u32m8_tum(vbool4_t mask, vuint32m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf4_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vzext_vf4_u64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m2_tum( @@ -453,7 +453,7 @@ vuint64m1_t test_vzext_vf4_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf4_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vzext_vf4_u64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m4_tum( @@ -462,7 +462,7 @@ vuint64m2_t test_vzext_vf4_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf4_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint16m1_t op1, size_t vl) { - return vzext_vf4_u64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m8_tum( @@ -471,7 +471,7 @@ vuint64m4_t test_vzext_vf4_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf4_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint16m2_t op1, size_t vl) { - return vzext_vf4_u64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m1_tum( @@ -480,7 +480,7 @@ vuint64m8_t test_vzext_vf4_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf2_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, size_t vl) { - return vzext_vf2_u64m1_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m1_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m2_tum( @@ -489,7 +489,7 @@ vuint64m1_t test_vzext_vf2_u64m1_tum(vbool64_t mask, vuint64m1_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf2_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, size_t vl) { - return vzext_vf2_u64m2_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m2_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m4_tum( @@ -498,7 +498,7 @@ vuint64m2_t test_vzext_vf2_u64m2_tum(vbool32_t mask, vuint64m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf2_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, size_t vl) { - return vzext_vf2_u64m4_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m4_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m8_tum( @@ -507,7 +507,7 @@ vuint64m4_t test_vzext_vf2_u64m4_tum(vbool16_t mask, vuint64m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf2_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, size_t vl) { - return vzext_vf2_u64m8_tum(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m8_tum(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf4_tumu( @@ -516,7 +516,7 @@ vuint64m8_t test_vzext_vf2_u64m8_tum(vbool8_t mask, vuint64m8_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vzext_vf2_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf2_u16mf4_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16mf4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf2_tumu( @@ -525,7 +525,7 @@ vuint16mf4_t test_vzext_vf2_u16mf4_tumu(vbool64_t mask, vuint16mf4_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vzext_vf2_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf2_u16mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m1_tumu( @@ -534,7 +534,7 @@ vuint16mf2_t test_vzext_vf2_u16mf2_tumu(vbool32_t mask, vuint16mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vzext_vf2_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf2_u16m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m2_tumu( @@ -543,7 +543,7 @@ vuint16m1_t test_vzext_vf2_u16m1_tumu(vbool16_t mask, vuint16m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vzext_vf2_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf2_u16m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m4_tumu( @@ -552,7 +552,7 @@ vuint16m2_t test_vzext_vf2_u16m2_tumu(vbool8_t mask, vuint16m2_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vzext_vf2_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, size_t vl) { - return vzext_vf2_u16m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m8_tumu( @@ -561,7 +561,7 @@ vuint16m4_t test_vzext_vf2_u16m4_tumu(vbool4_t mask, vuint16m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vzext_vf2_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, size_t vl) { - return vzext_vf2_u16m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32mf2_tumu( @@ -570,7 +570,7 @@ vuint16m8_t test_vzext_vf2_u16m8_tumu(vbool2_t mask, vuint16m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf4_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf4_u32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m1_tumu( @@ -579,7 +579,7 @@ vuint32mf2_t test_vzext_vf4_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf4_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf4_u32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m2_tumu( @@ -588,7 +588,7 @@ vuint32m1_t test_vzext_vf4_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf4_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf4_u32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m4_tumu( @@ -597,7 +597,7 @@ vuint32m2_t test_vzext_vf4_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf4_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf4_u32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m8_tumu( @@ -606,7 +606,7 @@ vuint32m4_t test_vzext_vf4_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf4_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint8m2_t op1, size_t vl) { - return vzext_vf4_u32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m1_tumu( @@ -615,7 +615,7 @@ vuint32m8_t test_vzext_vf4_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf8_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf8_u64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m2_tumu( @@ -624,7 +624,7 @@ vuint64m1_t test_vzext_vf8_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf8_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf8_u64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m4_tumu( @@ -633,7 +633,7 @@ vuint64m2_t test_vzext_vf8_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf8_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf8_u64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m8_tumu( @@ -642,7 +642,7 @@ vuint64m4_t test_vzext_vf8_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf8_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf8_u64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32mf2_tumu( @@ -651,7 +651,7 @@ vuint64m8_t test_vzext_vf8_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf2_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vzext_vf2_u32mf2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32mf2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m1_tumu( @@ -660,7 +660,7 @@ vuint32mf2_t test_vzext_vf2_u32mf2_tumu(vbool64_t mask, vuint32mf2_t maskedoff, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf2_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vzext_vf2_u32m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m2_tumu( @@ -669,7 +669,7 @@ vuint32m1_t test_vzext_vf2_u32m1_tumu(vbool32_t mask, vuint32m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf2_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, size_t vl) { - return vzext_vf2_u32m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m4_tumu( @@ -678,7 +678,7 @@ vuint32m2_t test_vzext_vf2_u32m2_tumu(vbool16_t mask, vuint32m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf2_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, size_t vl) { - return vzext_vf2_u32m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m8_tumu( @@ -687,7 +687,7 @@ vuint32m4_t test_vzext_vf2_u32m4_tumu(vbool8_t mask, vuint32m4_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf2_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, size_t vl) { - return vzext_vf2_u32m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m1_tumu( @@ -696,7 +696,7 @@ vuint32m8_t test_vzext_vf2_u32m8_tumu(vbool4_t mask, vuint32m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf4_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vzext_vf4_u64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m2_tumu( @@ -705,7 +705,7 @@ vuint64m1_t test_vzext_vf4_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf4_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vzext_vf4_u64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m4_tumu( @@ -714,7 +714,7 @@ vuint64m2_t test_vzext_vf4_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf4_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint16m1_t op1, size_t vl) { - return vzext_vf4_u64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m8_tumu( @@ -723,7 +723,7 @@ vuint64m4_t test_vzext_vf4_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf4_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint16m2_t op1, size_t vl) { - return vzext_vf4_u64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m1_tumu( @@ -732,7 +732,7 @@ vuint64m8_t test_vzext_vf4_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf2_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, size_t vl) { - return vzext_vf2_u64m1_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m1_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m2_tumu( @@ -741,7 +741,7 @@ vuint64m1_t test_vzext_vf2_u64m1_tumu(vbool64_t mask, vuint64m1_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf2_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, size_t vl) { - return vzext_vf2_u64m2_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m2_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m4_tumu( @@ -750,7 +750,7 @@ vuint64m2_t test_vzext_vf2_u64m2_tumu(vbool32_t mask, vuint64m2_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf2_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, size_t vl) { - return vzext_vf2_u64m4_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m4_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m8_tumu( @@ -759,7 +759,7 @@ vuint64m4_t test_vzext_vf2_u64m4_tumu(vbool16_t mask, vuint64m4_t maskedoff, vui // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf2_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, size_t vl) { - return vzext_vf2_u64m8_tumu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m8_tumu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf4_mu( @@ -768,7 +768,7 @@ vuint64m8_t test_vzext_vf2_u64m8_tumu(vbool8_t mask, vuint64m8_t maskedoff, vuin // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vzext_vf2_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf2_u16mf4_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16mf4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16mf2_mu( @@ -777,7 +777,7 @@ vuint16mf4_t test_vzext_vf2_u16mf4_mu(vbool64_t mask, vuint16mf4_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vzext_vf2_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf2_u16mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m1_mu( @@ -786,7 +786,7 @@ vuint16mf2_t test_vzext_vf2_u16mf2_mu(vbool32_t mask, vuint16mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vzext_vf2_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf2_u16m1_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m2_mu( @@ -795,7 +795,7 @@ vuint16m1_t test_vzext_vf2_u16m1_mu(vbool16_t mask, vuint16m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vzext_vf2_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf2_u16m2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m4_mu( @@ -804,7 +804,7 @@ vuint16m2_t test_vzext_vf2_u16m2_mu(vbool8_t mask, vuint16m2_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vzext_vf2_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8m2_t op1, size_t vl) { - return vzext_vf2_u16m4_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u16m8_mu( @@ -813,7 +813,7 @@ vuint16m4_t test_vzext_vf2_u16m4_mu(vbool4_t mask, vuint16m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vzext_vf2_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8m4_t op1, size_t vl) { - return vzext_vf2_u16m8_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u16m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32mf2_mu( @@ -822,7 +822,7 @@ vuint16m8_t test_vzext_vf2_u16m8_mu(vbool2_t mask, vuint16m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf4_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf4_u32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m1_mu( @@ -831,7 +831,7 @@ vuint32mf2_t test_vzext_vf4_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf4_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf4_u32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m2_mu( @@ -840,7 +840,7 @@ vuint32m1_t test_vzext_vf4_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf4_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf4_u32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m4_mu( @@ -849,7 +849,7 @@ vuint32m2_t test_vzext_vf4_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf4_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf4_u32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u32m8_mu( @@ -858,7 +858,7 @@ vuint32m4_t test_vzext_vf4_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf4_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint8m2_t op1, size_t vl) { - return vzext_vf4_u32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m1_mu( @@ -867,7 +867,7 @@ vuint32m8_t test_vzext_vf4_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf8_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint8mf8_t op1, size_t vl) { - return vzext_vf8_u64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m2_mu( @@ -876,7 +876,7 @@ vuint64m1_t test_vzext_vf8_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf8_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint8mf4_t op1, size_t vl) { - return vzext_vf8_u64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m4_mu( @@ -885,7 +885,7 @@ vuint64m2_t test_vzext_vf8_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf8_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint8mf2_t op1, size_t vl) { - return vzext_vf8_u64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf8_u64m8_mu( @@ -894,7 +894,7 @@ vuint64m4_t test_vzext_vf8_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf8_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint8m1_t op1, size_t vl) { - return vzext_vf8_u64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf8_u64m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32mf2_mu( @@ -903,7 +903,7 @@ vuint64m8_t test_vzext_vf8_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint8 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vzext_vf2_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vzext_vf2_u32mf2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32mf2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m1_mu( @@ -912,7 +912,7 @@ vuint32mf2_t test_vzext_vf2_u32mf2_mu(vbool64_t mask, vuint32mf2_t maskedoff, vu // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vzext_vf2_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vzext_vf2_u32m1_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m2_mu( @@ -921,7 +921,7 @@ vuint32m1_t test_vzext_vf2_u32m1_mu(vbool32_t mask, vuint32m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vzext_vf2_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint16m1_t op1, size_t vl) { - return vzext_vf2_u32m2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m4_mu( @@ -930,7 +930,7 @@ vuint32m2_t test_vzext_vf2_u32m2_mu(vbool16_t mask, vuint32m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vzext_vf2_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint16m2_t op1, size_t vl) { - return vzext_vf2_u32m4_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u32m8_mu( @@ -939,7 +939,7 @@ vuint32m4_t test_vzext_vf2_u32m4_mu(vbool8_t mask, vuint32m4_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vzext_vf2_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint16m4_t op1, size_t vl) { - return vzext_vf2_u32m8_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u32m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m1_mu( @@ -948,7 +948,7 @@ vuint32m8_t test_vzext_vf2_u32m8_mu(vbool4_t mask, vuint32m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf4_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint16mf4_t op1, size_t vl) { - return vzext_vf4_u64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m2_mu( @@ -957,7 +957,7 @@ vuint64m1_t test_vzext_vf4_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf4_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint16mf2_t op1, size_t vl) { - return vzext_vf4_u64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m4_mu( @@ -966,7 +966,7 @@ vuint64m2_t test_vzext_vf4_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf4_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint16m1_t op1, size_t vl) { - return vzext_vf4_u64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf4_u64m8_mu( @@ -975,7 +975,7 @@ vuint64m4_t test_vzext_vf4_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf4_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint16m2_t op1, size_t vl) { - return vzext_vf4_u64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf4_u64m8_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m1_mu( @@ -984,7 +984,7 @@ vuint64m8_t test_vzext_vf4_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint1 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vzext_vf2_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint32mf2_t op1, size_t vl) { - return vzext_vf2_u64m1_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m1_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m2_mu( @@ -993,7 +993,7 @@ vuint64m1_t test_vzext_vf2_u64m1_mu(vbool64_t mask, vuint64m1_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vzext_vf2_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint32m1_t op1, size_t vl) { - return vzext_vf2_u64m2_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m2_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m4_mu( @@ -1002,7 +1002,7 @@ vuint64m2_t test_vzext_vf2_u64m2_mu(vbool32_t mask, vuint64m2_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vzext_vf2_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint32m2_t op1, size_t vl) { - return vzext_vf2_u64m4_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m4_mu(mask, maskedoff, op1, vl); } // CHECK-RV64-LABEL: @test_vzext_vf2_u64m8_mu( @@ -1011,6 +1011,6 @@ vuint64m4_t test_vzext_vf2_u64m4_mu(vbool16_t mask, vuint64m4_t maskedoff, vuint // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vzext_vf2_u64m8_mu(vbool8_t mask, vuint64m8_t maskedoff, vuint32m4_t op1, size_t vl) { - return vzext_vf2_u64m8_mu(mask, maskedoff, op1, vl); + return __riscv_vzext_vf2_u64m8_mu(mask, maskedoff, op1, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c index c8c086686c42eb8b3673e4a251946a4911b79d5f..bd8d38b791e933969d7db66429e53191054051a2 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-index-out-of-range.c @@ -6,336 +6,336 @@ #include vint8m1_t test_vget_v_index_not_constant(vint8m2_t src, int index) { - // expected-error@+1 {{argument to 'vget_v_i8m2_i8m1' must be a constant integer}} - return vget_v_i8m2_i8m1(src, index); + // expected-error@+1 {{argument to '__riscv_vget_v_i8m2_i8m1' must be a constant integer}} + return __riscv_vget_v_i8m2_i8m1(src, index); } vint8m1_t test_vget_v_i8m2_i8m1(vint8m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i8m2_i8m1(src, 2); + return __riscv_vget_v_i8m2_i8m1(src, 2); } vint8m1_t test_vget_v_i8m4_i8m1(vint8m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_i8m4_i8m1(src, 4); + return __riscv_vget_v_i8m4_i8m1(src, 4); } vint8m2_t test_vget_v_i8m4_i8m2(vint8m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i8m4_i8m2(src, 2); + return __riscv_vget_v_i8m4_i8m2(src, 2); } vint8m1_t test_vget_v_i8m8_i8m1(vint8m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_i8m8_i8m1(src, 8); + return __riscv_vget_v_i8m8_i8m1(src, 8); } vint8m2_t test_vget_v_i8m8_i8m2(vint8m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_i8m8_i8m2(src, 4); + return __riscv_vget_v_i8m8_i8m2(src, 4); } vint8m4_t test_vget_v_i8m8_i8m4(vint8m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i8m8_i8m4(src, 2); + return __riscv_vget_v_i8m8_i8m4(src, 2); } vint16m1_t test_vget_v_i16m2_i16m1(vint16m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i16m2_i16m1(src, 2); + return __riscv_vget_v_i16m2_i16m1(src, 2); } vint16m1_t test_vget_v_i16m4_i16m1(vint16m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_i16m4_i16m1(src, 4); + return __riscv_vget_v_i16m4_i16m1(src, 4); } vint16m2_t test_vget_v_i16m4_i16m2(vint16m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i16m4_i16m2(src, 2); + return __riscv_vget_v_i16m4_i16m2(src, 2); } vint16m1_t test_vget_v_i16m8_i16m1(vint16m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_i16m8_i16m1(src, 8); + return __riscv_vget_v_i16m8_i16m1(src, 8); } vint16m2_t test_vget_v_i16m8_i16m2(vint16m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_i16m8_i16m2(src, 4); + return __riscv_vget_v_i16m8_i16m2(src, 4); } vint16m4_t test_vget_v_i16m8_i16m4(vint16m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i16m8_i16m4(src, 2); + return __riscv_vget_v_i16m8_i16m4(src, 2); } vint32m1_t test_vget_v_i32m2_i32m1(vint32m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i32m2_i32m1(src, 2); + return __riscv_vget_v_i32m2_i32m1(src, 2); } vint32m1_t test_vget_v_i32m4_i32m1(vint32m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_i32m4_i32m1(src, 4); + return __riscv_vget_v_i32m4_i32m1(src, 4); } vint32m2_t test_vget_v_i32m4_i32m2(vint32m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i32m4_i32m2(src, 2); + return __riscv_vget_v_i32m4_i32m2(src, 2); } vint32m1_t test_vget_v_i32m8_i32m1(vint32m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_i32m8_i32m1(src, 8); + return __riscv_vget_v_i32m8_i32m1(src, 8); } vint32m2_t test_vget_v_i32m8_i32m2(vint32m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_i32m8_i32m2(src, 4); + return __riscv_vget_v_i32m8_i32m2(src, 4); } vint32m4_t test_vget_v_i32m8_i32m4(vint32m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i32m8_i32m4(src, 2); + return __riscv_vget_v_i32m8_i32m4(src, 2); } vint64m1_t test_vget_v_i64m2_i64m1(vint64m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i64m2_i64m1(src, 2); + return __riscv_vget_v_i64m2_i64m1(src, 2); } vint64m1_t test_vget_v_i64m4_i64m1(vint64m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_i64m4_i64m1(src, 4); + return __riscv_vget_v_i64m4_i64m1(src, 4); } vint64m2_t test_vget_v_i64m4_i64m2(vint64m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i64m4_i64m2(src, 2); + return __riscv_vget_v_i64m4_i64m2(src, 2); } vint64m1_t test_vget_v_i64m8_i64m1(vint64m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_i64m8_i64m1(src, 8); + return __riscv_vget_v_i64m8_i64m1(src, 8); } vint64m2_t test_vget_v_i64m8_i64m2(vint64m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_i64m8_i64m2(src, 4); + return __riscv_vget_v_i64m8_i64m2(src, 4); } vint64m4_t test_vget_v_i64m8_i64m4(vint64m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_i64m8_i64m4(src, 2); + return __riscv_vget_v_i64m8_i64m4(src, 2); } vuint8m1_t test_vget_v_u8m2_u8m1(vuint8m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u8m2_u8m1(src, 2); + return __riscv_vget_v_u8m2_u8m1(src, 2); } vuint8m1_t test_vget_v_u8m4_u8m1(vuint8m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_u8m4_u8m1(src, 4); + return __riscv_vget_v_u8m4_u8m1(src, 4); } vuint8m2_t test_vget_v_u8m4_u8m2(vuint8m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u8m4_u8m2(src, 2); + return __riscv_vget_v_u8m4_u8m2(src, 2); } vuint8m1_t test_vget_v_u8m8_u8m1(vuint8m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_u8m8_u8m1(src, 8); + return __riscv_vget_v_u8m8_u8m1(src, 8); } vuint8m2_t test_vget_v_u8m8_u8m2(vuint8m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_u8m8_u8m2(src, 4); + return __riscv_vget_v_u8m8_u8m2(src, 4); } vuint8m4_t test_vget_v_u8m8_u8m4(vuint8m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u8m8_u8m4(src, 2); + return __riscv_vget_v_u8m8_u8m4(src, 2); } vuint16m1_t test_vget_v_u16m2_u16m1(vuint16m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u16m2_u16m1(src, 2); + return __riscv_vget_v_u16m2_u16m1(src, 2); } vuint16m1_t test_vget_v_u16m4_u16m1(vuint16m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_u16m4_u16m1(src, 4); + return __riscv_vget_v_u16m4_u16m1(src, 4); } vuint16m2_t test_vget_v_u16m4_u16m2(vuint16m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u16m4_u16m2(src, 2); + return __riscv_vget_v_u16m4_u16m2(src, 2); } vuint16m1_t test_vget_v_u16m8_u16m1(vuint16m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_u16m8_u16m1(src, 8); + return __riscv_vget_v_u16m8_u16m1(src, 8); } vuint16m2_t test_vget_v_u16m8_u16m2(vuint16m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_u16m8_u16m2(src, 4); + return __riscv_vget_v_u16m8_u16m2(src, 4); } vuint16m4_t test_vget_v_u16m8_u16m4(vuint16m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u16m8_u16m4(src, 2); + return __riscv_vget_v_u16m8_u16m4(src, 2); } vuint32m1_t test_vget_v_u32m2_u32m1(vuint32m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u32m2_u32m1(src, 2); + return __riscv_vget_v_u32m2_u32m1(src, 2); } vuint32m1_t test_vget_v_u32m4_u32m1(vuint32m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_u32m4_u32m1(src, 4); + return __riscv_vget_v_u32m4_u32m1(src, 4); } vuint32m2_t test_vget_v_u32m4_u32m2(vuint32m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u32m4_u32m2(src, 2); + return __riscv_vget_v_u32m4_u32m2(src, 2); } vuint32m1_t test_vget_v_u32m8_u32m1(vuint32m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_u32m8_u32m1(src, 8); + return __riscv_vget_v_u32m8_u32m1(src, 8); } vuint32m2_t test_vget_v_u32m8_u32m2(vuint32m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_u32m8_u32m2(src, 4); + return __riscv_vget_v_u32m8_u32m2(src, 4); } vuint32m4_t test_vget_v_u32m8_u32m4(vuint32m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u32m8_u32m4(src, 2); + return __riscv_vget_v_u32m8_u32m4(src, 2); } vuint64m1_t test_vget_v_u64m2_u64m1(vuint64m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u64m2_u64m1(src, 2); + return __riscv_vget_v_u64m2_u64m1(src, 2); } vuint64m1_t test_vget_v_u64m4_u64m1(vuint64m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_u64m4_u64m1(src, 4); + return __riscv_vget_v_u64m4_u64m1(src, 4); } vuint64m2_t test_vget_v_u64m4_u64m2(vuint64m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u64m4_u64m2(src, 2); + return __riscv_vget_v_u64m4_u64m2(src, 2); } vuint64m1_t test_vget_v_u64m8_u64m1(vuint64m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_u64m8_u64m1(src, 8); + return __riscv_vget_v_u64m8_u64m1(src, 8); } vuint64m2_t test_vget_v_u64m8_u64m2(vuint64m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_u64m8_u64m2(src, 4); + return __riscv_vget_v_u64m8_u64m2(src, 4); } vuint64m4_t test_vget_v_u64m8_u64m4(vuint64m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_u64m8_u64m4(src, 2); + return __riscv_vget_v_u64m8_u64m4(src, 2); } vfloat32m1_t test_vget_v_f32m2_f32m1(vfloat32m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f32m2_f32m1(src, 2); + return __riscv_vget_v_f32m2_f32m1(src, 2); } vfloat32m1_t test_vget_v_f32m4_f32m1(vfloat32m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_f32m4_f32m1(src, 4); + return __riscv_vget_v_f32m4_f32m1(src, 4); } vfloat32m2_t test_vget_v_f32m4_f32m2(vfloat32m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f32m4_f32m2(src, 2); + return __riscv_vget_v_f32m4_f32m2(src, 2); } vfloat32m1_t test_vget_v_f32m8_f32m1(vfloat32m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_f32m8_f32m1(src, 8); + return __riscv_vget_v_f32m8_f32m1(src, 8); } vfloat32m2_t test_vget_v_f32m8_f32m2(vfloat32m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_f32m8_f32m2(src, 4); + return __riscv_vget_v_f32m8_f32m2(src, 4); } vfloat32m4_t test_vget_v_f32m8_f32m4(vfloat32m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f32m8_f32m4(src, 2); + return __riscv_vget_v_f32m8_f32m4(src, 2); } vfloat64m1_t test_vget_v_f64m2_f64m1(vfloat64m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f64m2_f64m1(src, 2); + return __riscv_vget_v_f64m2_f64m1(src, 2); } vfloat64m1_t test_vget_v_f64m4_f64m1(vfloat64m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_f64m4_f64m1(src, 4); + return __riscv_vget_v_f64m4_f64m1(src, 4); } vfloat64m2_t test_vget_v_f64m4_f64m2(vfloat64m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f64m4_f64m2(src, 2); + return __riscv_vget_v_f64m4_f64m2(src, 2); } vfloat64m1_t test_vget_v_f64m8_f64m1(vfloat64m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_f64m8_f64m1(src, 8); + return __riscv_vget_v_f64m8_f64m1(src, 8); } vfloat64m2_t test_vget_v_f64m8_f64m2(vfloat64m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_f64m8_f64m2(src, 4); + return __riscv_vget_v_f64m8_f64m2(src, 4); } vfloat64m4_t test_vget_v_f64m8_f64m4(vfloat64m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f64m8_f64m4(src, 2); + return __riscv_vget_v_f64m8_f64m4(src, 2); } vfloat16m1_t test_vget_v_f16m2_f16m1(vfloat16m2_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f16m2_f16m1(src, 2); + return __riscv_vget_v_f16m2_f16m1(src, 2); } vfloat16m1_t test_vget_v_f16m4_f16m1(vfloat16m4_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_f16m4_f16m1(src, 4); + return __riscv_vget_v_f16m4_f16m1(src, 4); } vfloat16m1_t test_vget_v_f16m8_f16m1(vfloat16m8_t src) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vget_v_f16m8_f16m1(src, 8); + return __riscv_vget_v_f16m8_f16m1(src, 8); } vfloat16m2_t test_vget_v_f16m4_f16m2(vfloat16m4_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f16m4_f16m2(src, 2); + return __riscv_vget_v_f16m4_f16m2(src, 2); } vfloat16m2_t test_vget_v_f16m8_f16m2(vfloat16m8_t src) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vget_v_f16m8_f16m2(src, 4); + return __riscv_vget_v_f16m8_f16m2(src, 4); } vfloat16m4_t test_vget_v_f16m8_f16m4(vfloat16m8_t src) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vget_v_f16m8_f16m4(src, 2); + return __riscv_vget_v_f16m8_f16m4(src, 2); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-vset-ice.cpp b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-vset-ice.cpp index b81aacc98c145a98c3a03b53a430c4a566c8bf08..0a73376d67eafe0daef638cdc8eaff725f4de9b6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-vset-ice.cpp +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vget-vset-ice.cpp @@ -16,7 +16,7 @@ constexpr int foo() { return 1; } // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vget_v_i8m2_i8m1(vint8m2_t src) { - return vget_v_i8m2_i8m1(src, foo()); + return __riscv_vget_v_i8m2_i8m1(src, foo()); } // CHECK-RV64-LABEL: @_Z21test_vset_v_i8m1_i8m2u14__rvv_int8m2_tu14__rvv_int8m1_t @@ -25,5 +25,5 @@ vint8m1_t test_vget_v_i8m2_i8m1(vint8m2_t src) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vset_v_i8m1_i8m2(vint8m2_t dest, vint8m1_t val) { - return vset_v_i8m1_i8m2(dest, foo(), val); + return __riscv_vset_v_i8m1_i8m2(dest, foo(), val); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulh-eew64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulh-eew64.c index ea0c5f8f006139974dad51e131c6fd0f887f26fc..a8d1c451bf4a222975d6232dfc2d5402fc1675cd 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulh-eew64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulh-eew64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmulh_vv_i64m1(op1, op2, vl); + return __riscv_vmulh_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m1( @@ -22,7 +22,7 @@ vint64m1_t test_vmulh_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m1(op1, op2, vl); + return __riscv_vmulh_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m2( @@ -31,7 +31,7 @@ vint64m1_t test_vmulh_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmulh_vv_i64m2(op1, op2, vl); + return __riscv_vmulh_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m2( @@ -40,7 +40,7 @@ vint64m2_t test_vmulh_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m2(op1, op2, vl); + return __riscv_vmulh_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m4( @@ -49,7 +49,7 @@ vint64m2_t test_vmulh_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmulh_vv_i64m4(op1, op2, vl); + return __riscv_vmulh_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m4( @@ -58,7 +58,7 @@ vint64m4_t test_vmulh_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m4(op1, op2, vl); + return __riscv_vmulh_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m8( @@ -67,7 +67,7 @@ vint64m4_t test_vmulh_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmulh_vv_i64m8(op1, op2, vl); + return __riscv_vmulh_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m8( @@ -76,7 +76,7 @@ vint64m8_t test_vmulh_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m8(op1, op2, vl); + return __riscv_vmulh_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m1_m( @@ -85,7 +85,7 @@ vint64m8_t test_vmulh_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vmulh_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m1_m( @@ -94,7 +94,7 @@ vint64m1_t test_vmulh_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulh_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m2_m( @@ -103,7 +103,7 @@ vint64m1_t test_vmulh_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vmulh_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m2_m( @@ -112,7 +112,7 @@ vint64m2_t test_vmulh_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulh_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m4_m( @@ -121,7 +121,7 @@ vint64m2_t test_vmulh_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vmulh_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m4_m( @@ -130,7 +130,7 @@ vint64m4_t test_vmulh_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulh_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i64m8_m( @@ -139,7 +139,7 @@ vint64m4_t test_vmulh_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vmulh_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i64m8_m( @@ -148,7 +148,7 @@ vint64m8_t test_vmulh_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulh_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vmulh_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulh.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulh.c index 57f8cf21961cdf98f192567da28749b116b46657..90fb6e6f6866744d0097f547045637a9c45cbd93 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulh.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulh.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmulh_vv_i8mf8(op1, op2, vl); + return __riscv_vmulh_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vmulh_vv_i8mf8(vint8mf8_t op1, vint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf8(op1, op2, vl); + return __riscv_vmulh_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vmulh_vx_i8mf8(vint8mf8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmulh_vv_i8mf4(op1, op2, vl); + return __riscv_vmulh_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vmulh_vv_i8mf4(vint8mf4_t op1, vint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf4(op1, op2, vl); + return __riscv_vmulh_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vmulh_vx_i8mf4(vint8mf4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmulh_vv_i8mf2(op1, op2, vl); + return __riscv_vmulh_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vmulh_vv_i8mf2(vint8mf2_t op1, vint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf2(op1, op2, vl); + return __riscv_vmulh_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vmulh_vx_i8mf2(vint8mf2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmulh_vv_i8m1(op1, op2, vl); + return __riscv_vmulh_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vmulh_vv_i8m1(vint8m1_t op1, vint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m1(op1, op2, vl); + return __riscv_vmulh_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vmulh_vx_i8m1(vint8m1_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmulh_vv_i8m2(op1, op2, vl); + return __riscv_vmulh_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vmulh_vv_i8m2(vint8m2_t op1, vint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m2(op1, op2, vl); + return __riscv_vmulh_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vmulh_vx_i8m2(vint8m2_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmulh_vv_i8m4(op1, op2, vl); + return __riscv_vmulh_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vmulh_vv_i8m4(vint8m4_t op1, vint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m4(op1, op2, vl); + return __riscv_vmulh_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vmulh_vx_i8m4(vint8m4_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmulh_vv_i8m8(op1, op2, vl); + return __riscv_vmulh_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vmulh_vv_i8m8(vint8m8_t op1, vint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m8(op1, op2, vl); + return __riscv_vmulh_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vmulh_vx_i8m8(vint8m8_t op1, int8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmulh_vv_i16mf4(op1, op2, vl); + return __riscv_vmulh_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vmulh_vv_i16mf4(vint16mf4_t op1, vint16mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf4(op1, op2, vl); + return __riscv_vmulh_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vmulh_vx_i16mf4(vint16mf4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmulh_vv_i16mf2(op1, op2, vl); + return __riscv_vmulh_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vmulh_vv_i16mf2(vint16mf2_t op1, vint16mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf2(op1, op2, vl); + return __riscv_vmulh_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vmulh_vx_i16mf2(vint16mf2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmulh_vv_i16m1(op1, op2, vl); + return __riscv_vmulh_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vmulh_vv_i16m1(vint16m1_t op1, vint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m1(op1, op2, vl); + return __riscv_vmulh_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vmulh_vx_i16m1(vint16m1_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmulh_vv_i16m2(op1, op2, vl); + return __riscv_vmulh_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vmulh_vv_i16m2(vint16m2_t op1, vint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m2(op1, op2, vl); + return __riscv_vmulh_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vmulh_vx_i16m2(vint16m2_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmulh_vv_i16m4(op1, op2, vl); + return __riscv_vmulh_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vmulh_vv_i16m4(vint16m4_t op1, vint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m4(op1, op2, vl); + return __riscv_vmulh_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vmulh_vx_i16m4(vint16m4_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmulh_vv_i16m8(op1, op2, vl); + return __riscv_vmulh_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vmulh_vv_i16m8(vint16m8_t op1, vint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m8(op1, op2, vl); + return __riscv_vmulh_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vmulh_vx_i16m8(vint16m8_t op1, int16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmulh_vv_i32mf2(op1, op2, vl); + return __riscv_vmulh_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vmulh_vv_i32mf2(vint32mf2_t op1, vint32mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32mf2(op1, op2, vl); + return __riscv_vmulh_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vmulh_vx_i32mf2(vint32mf2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmulh_vv_i32m1(op1, op2, vl); + return __riscv_vmulh_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vmulh_vv_i32m1(vint32m1_t op1, vint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m1(op1, op2, vl); + return __riscv_vmulh_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vmulh_vx_i32m1(vint32m1_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmulh_vv_i32m2(op1, op2, vl); + return __riscv_vmulh_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vmulh_vv_i32m2(vint32m2_t op1, vint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m2(op1, op2, vl); + return __riscv_vmulh_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vmulh_vx_i32m2(vint32m2_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmulh_vv_i32m4(op1, op2, vl); + return __riscv_vmulh_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vmulh_vv_i32m4(vint32m4_t op1, vint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m4(op1, op2, vl); + return __riscv_vmulh_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vmulh_vx_i32m4(vint32m4_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmulh_vv_i32m8(op1, op2, vl); + return __riscv_vmulh_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vmulh_vv_i32m8(vint32m8_t op1, vint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m8(op1, op2, vl); + return __riscv_vmulh_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf8_m( @@ -336,7 +336,7 @@ vint32m8_t test_vmulh_vx_i32m8(vint32m8_t op1, int32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, size_t vl) { - return vmulh_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf8_m( @@ -345,7 +345,7 @@ vint8mf8_t test_vmulh_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vint8mf8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulh_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf4_m( @@ -354,7 +354,7 @@ vint8mf8_t test_vmulh_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, size_t vl) { - return vmulh_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf4_m( @@ -363,7 +363,7 @@ vint8mf4_t test_vmulh_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vint8mf4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulh_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8mf2_m( @@ -372,7 +372,7 @@ vint8mf4_t test_vmulh_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, size_t vl) { - return vmulh_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8mf2_m( @@ -381,7 +381,7 @@ vint8mf2_t test_vmulh_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vint8mf2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulh_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m1_m( @@ -390,7 +390,7 @@ vint8mf2_t test_vmulh_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, int8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size_t vl) { - return vmulh_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m1_m( @@ -399,7 +399,7 @@ vint8m1_t test_vmulh_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vint8m1_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulh_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m2_m( @@ -408,7 +408,7 @@ vint8m1_t test_vmulh_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size_t vl) { - return vmulh_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m2_m( @@ -417,7 +417,7 @@ vint8m2_t test_vmulh_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vint8m2_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulh_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m4_m( @@ -426,7 +426,7 @@ vint8m2_t test_vmulh_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size_t vl) { - return vmulh_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m4_m( @@ -435,7 +435,7 @@ vint8m4_t test_vmulh_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vint8m4_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulh_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i8m8_m( @@ -444,7 +444,7 @@ vint8m4_t test_vmulh_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size_t vl) { - return vmulh_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i8m8_m( @@ -453,7 +453,7 @@ vint8m8_t test_vmulh_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vint8m8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulh_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t vl) { - return vmulh_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf4_m( @@ -462,7 +462,7 @@ vint8m8_t test_vmulh_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, int8_t op2, size_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t op2, size_t vl) { - return vmulh_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf4_m( @@ -471,7 +471,7 @@ vint16mf4_t test_vmulh_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vint16mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulh_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16mf2_m( @@ -480,7 +480,7 @@ vint16mf4_t test_vmulh_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t op2, size_t vl) { - return vmulh_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16mf2_m( @@ -489,7 +489,7 @@ vint16mf2_t test_vmulh_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vint16mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulh_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m1_m( @@ -498,7 +498,7 @@ vint16mf2_t test_vmulh_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, int16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, size_t vl) { - return vmulh_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m1_m( @@ -507,7 +507,7 @@ vint16m1_t test_vmulh_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vint16m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulh_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m2_m( @@ -516,7 +516,7 @@ vint16m1_t test_vmulh_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, int16_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, size_t vl) { - return vmulh_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m2_m( @@ -525,7 +525,7 @@ vint16m2_t test_vmulh_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vint16m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulh_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m4_m( @@ -534,7 +534,7 @@ vint16m2_t test_vmulh_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, size_t vl) { - return vmulh_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m4_m( @@ -543,7 +543,7 @@ vint16m4_t test_vmulh_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vint16m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulh_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i16m8_m( @@ -552,7 +552,7 @@ vint16m4_t test_vmulh_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, size_t vl) { - return vmulh_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i16m8_m( @@ -561,7 +561,7 @@ vint16m8_t test_vmulh_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vint16m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulh_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, size_t vl) { - return vmulh_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32mf2_m( @@ -570,7 +570,7 @@ vint16m8_t test_vmulh_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, int16_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t op2, size_t vl) { - return vmulh_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32mf2_m( @@ -579,7 +579,7 @@ vint32mf2_t test_vmulh_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vint32mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulh_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m1_m( @@ -588,7 +588,7 @@ vint32mf2_t test_vmulh_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, int32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, size_t vl) { - return vmulh_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m1_m( @@ -597,7 +597,7 @@ vint32m1_t test_vmulh_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vint32m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulh_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m2_m( @@ -606,7 +606,7 @@ vint32m1_t test_vmulh_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, size_t vl) { - return vmulh_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m2_m( @@ -615,7 +615,7 @@ vint32m2_t test_vmulh_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vint32m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulh_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m4_m( @@ -624,7 +624,7 @@ vint32m2_t test_vmulh_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, int32_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, size_t vl) { - return vmulh_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m4_m( @@ -633,7 +633,7 @@ vint32m4_t test_vmulh_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vint32m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulh_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vv_i32m8_m( @@ -642,7 +642,7 @@ vint32m4_t test_vmulh_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, int32_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, size_t vl) { - return vmulh_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulh_vx_i32m8_m( @@ -651,5 +651,5 @@ vint32m8_t test_vmulh_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vint32m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulh_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, int32_t op2, size_t vl) { - return vmulh_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vmulh_vx_i32m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhsu-eew64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhsu-eew64.c index d2ccee89c42b23b652afe5fb7bf8c1be1e343445..4beb926f2c2586f306e31abbe2204c603a36fde6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhsu-eew64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhsu-eew64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vv_i64m1(vint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhsu_vv_i64m1(op1, op2, vl); + return __riscv_vmulhsu_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m1( @@ -22,7 +22,7 @@ vint64m1_t test_vmulhsu_vv_i64m1(vint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vx_i64m1(vint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m1(op1, op2, vl); + return __riscv_vmulhsu_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m2( @@ -31,7 +31,7 @@ vint64m1_t test_vmulhsu_vx_i64m1(vint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vv_i64m2(vint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhsu_vv_i64m2(op1, op2, vl); + return __riscv_vmulhsu_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m2( @@ -40,7 +40,7 @@ vint64m2_t test_vmulhsu_vv_i64m2(vint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vx_i64m2(vint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m2(op1, op2, vl); + return __riscv_vmulhsu_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m4( @@ -49,7 +49,7 @@ vint64m2_t test_vmulhsu_vx_i64m2(vint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vv_i64m4(vint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhsu_vv_i64m4(op1, op2, vl); + return __riscv_vmulhsu_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m4( @@ -58,7 +58,7 @@ vint64m4_t test_vmulhsu_vv_i64m4(vint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vx_i64m4(vint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m4(op1, op2, vl); + return __riscv_vmulhsu_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m8( @@ -67,7 +67,7 @@ vint64m4_t test_vmulhsu_vx_i64m4(vint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vv_i64m8(vint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhsu_vv_i64m8(op1, op2, vl); + return __riscv_vmulhsu_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m8( @@ -76,7 +76,7 @@ vint64m8_t test_vmulhsu_vv_i64m8(vint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vx_i64m8(vint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m8(op1, op2, vl); + return __riscv_vmulhsu_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m1_m( @@ -85,7 +85,7 @@ vint64m8_t test_vmulhsu_vx_i64m8(vint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhsu_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m1_m( @@ -94,7 +94,7 @@ vint64m1_t test_vmulhsu_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vmulhsu_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m2_m( @@ -103,7 +103,7 @@ vint64m1_t test_vmulhsu_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhsu_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m2_m( @@ -112,7 +112,7 @@ vint64m2_t test_vmulhsu_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vmulhsu_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m4_m( @@ -121,7 +121,7 @@ vint64m2_t test_vmulhsu_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhsu_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m4_m( @@ -130,7 +130,7 @@ vint64m4_t test_vmulhsu_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vmulhsu_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i64m8_m( @@ -139,7 +139,7 @@ vint64m4_t test_vmulhsu_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, uint64_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhsu_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i64m8_m( @@ -148,5 +148,5 @@ vint64m8_t test_vmulhsu_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vmulhsu_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhsu_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhsu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhsu.c index 8300d5ae1121793c61cb47882213baafee410ca5..57b3ea3280592256fe932cc2badfb0aa5517e2a6 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhsu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhsu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhsu_vv_i8mf8(op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf8( @@ -21,7 +21,7 @@ vint8mf8_t test_vmulhsu_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vx_i8mf8(vint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf8(op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf4( @@ -30,7 +30,7 @@ vint8mf8_t test_vmulhsu_vx_i8mf8(vint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhsu_vv_i8mf4(op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf4( @@ -39,7 +39,7 @@ vint8mf4_t test_vmulhsu_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vx_i8mf4(vint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf4(op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf2( @@ -48,7 +48,7 @@ vint8mf4_t test_vmulhsu_vx_i8mf4(vint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhsu_vv_i8mf2(op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf2( @@ -57,7 +57,7 @@ vint8mf2_t test_vmulhsu_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vx_i8mf2(vint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf2(op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m1( @@ -66,7 +66,7 @@ vint8mf2_t test_vmulhsu_vx_i8mf2(vint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vv_i8m1(vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhsu_vv_i8m1(op1, op2, vl); + return __riscv_vmulhsu_vv_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m1( @@ -75,7 +75,7 @@ vint8m1_t test_vmulhsu_vv_i8m1(vint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vx_i8m1(vint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m1(op1, op2, vl); + return __riscv_vmulhsu_vx_i8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m2( @@ -84,7 +84,7 @@ vint8m1_t test_vmulhsu_vx_i8m1(vint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vv_i8m2(vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhsu_vv_i8m2(op1, op2, vl); + return __riscv_vmulhsu_vv_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m2( @@ -93,7 +93,7 @@ vint8m2_t test_vmulhsu_vv_i8m2(vint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vx_i8m2(vint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m2(op1, op2, vl); + return __riscv_vmulhsu_vx_i8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m4( @@ -102,7 +102,7 @@ vint8m2_t test_vmulhsu_vx_i8m2(vint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vv_i8m4(vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhsu_vv_i8m4(op1, op2, vl); + return __riscv_vmulhsu_vv_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m4( @@ -111,7 +111,7 @@ vint8m4_t test_vmulhsu_vv_i8m4(vint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vx_i8m4(vint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m4(op1, op2, vl); + return __riscv_vmulhsu_vx_i8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m8( @@ -120,7 +120,7 @@ vint8m4_t test_vmulhsu_vx_i8m4(vint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vv_i8m8(vint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhsu_vv_i8m8(op1, op2, vl); + return __riscv_vmulhsu_vv_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m8( @@ -129,7 +129,7 @@ vint8m8_t test_vmulhsu_vv_i8m8(vint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vx_i8m8(vint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m8(op1, op2, vl); + return __riscv_vmulhsu_vx_i8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf4( @@ -138,7 +138,7 @@ vint8m8_t test_vmulhsu_vx_i8m8(vint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhsu_vv_i16mf4(op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf4( @@ -147,7 +147,7 @@ vint16mf4_t test_vmulhsu_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vx_i16mf4(vint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf4(op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf2( @@ -156,7 +156,7 @@ vint16mf4_t test_vmulhsu_vx_i16mf4(vint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhsu_vv_i16mf2(op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf2( @@ -165,7 +165,7 @@ vint16mf2_t test_vmulhsu_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vx_i16mf2(vint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf2(op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m1( @@ -174,7 +174,7 @@ vint16mf2_t test_vmulhsu_vx_i16mf2(vint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vv_i16m1(vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhsu_vv_i16m1(op1, op2, vl); + return __riscv_vmulhsu_vv_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m1( @@ -183,7 +183,7 @@ vint16m1_t test_vmulhsu_vv_i16m1(vint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vx_i16m1(vint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m1(op1, op2, vl); + return __riscv_vmulhsu_vx_i16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m2( @@ -192,7 +192,7 @@ vint16m1_t test_vmulhsu_vx_i16m1(vint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vv_i16m2(vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhsu_vv_i16m2(op1, op2, vl); + return __riscv_vmulhsu_vv_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m2( @@ -201,7 +201,7 @@ vint16m2_t test_vmulhsu_vv_i16m2(vint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vx_i16m2(vint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m2(op1, op2, vl); + return __riscv_vmulhsu_vx_i16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m4( @@ -210,7 +210,7 @@ vint16m2_t test_vmulhsu_vx_i16m2(vint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vv_i16m4(vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhsu_vv_i16m4(op1, op2, vl); + return __riscv_vmulhsu_vv_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m4( @@ -219,7 +219,7 @@ vint16m4_t test_vmulhsu_vv_i16m4(vint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vx_i16m4(vint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m4(op1, op2, vl); + return __riscv_vmulhsu_vx_i16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m8( @@ -228,7 +228,7 @@ vint16m4_t test_vmulhsu_vx_i16m4(vint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vv_i16m8(vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhsu_vv_i16m8(op1, op2, vl); + return __riscv_vmulhsu_vv_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m8( @@ -237,7 +237,7 @@ vint16m8_t test_vmulhsu_vv_i16m8(vint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vx_i16m8(vint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m8(op1, op2, vl); + return __riscv_vmulhsu_vx_i16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32mf2( @@ -246,7 +246,7 @@ vint16m8_t test_vmulhsu_vx_i16m8(vint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhsu_vv_i32mf2(op1, op2, vl); + return __riscv_vmulhsu_vv_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32mf2( @@ -255,7 +255,7 @@ vint32mf2_t test_vmulhsu_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t op2, size_t vl) // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vx_i32mf2(vint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32mf2(op1, op2, vl); + return __riscv_vmulhsu_vx_i32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m1( @@ -264,7 +264,7 @@ vint32mf2_t test_vmulhsu_vx_i32mf2(vint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vv_i32m1(vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhsu_vv_i32m1(op1, op2, vl); + return __riscv_vmulhsu_vv_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m1( @@ -273,7 +273,7 @@ vint32m1_t test_vmulhsu_vv_i32m1(vint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vx_i32m1(vint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m1(op1, op2, vl); + return __riscv_vmulhsu_vx_i32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m2( @@ -282,7 +282,7 @@ vint32m1_t test_vmulhsu_vx_i32m1(vint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vv_i32m2(vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhsu_vv_i32m2(op1, op2, vl); + return __riscv_vmulhsu_vv_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m2( @@ -291,7 +291,7 @@ vint32m2_t test_vmulhsu_vv_i32m2(vint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vx_i32m2(vint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m2(op1, op2, vl); + return __riscv_vmulhsu_vx_i32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m4( @@ -300,7 +300,7 @@ vint32m2_t test_vmulhsu_vx_i32m2(vint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vv_i32m4(vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhsu_vv_i32m4(op1, op2, vl); + return __riscv_vmulhsu_vv_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m4( @@ -309,7 +309,7 @@ vint32m4_t test_vmulhsu_vv_i32m4(vint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vx_i32m4(vint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m4(op1, op2, vl); + return __riscv_vmulhsu_vx_i32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m8( @@ -318,7 +318,7 @@ vint32m4_t test_vmulhsu_vx_i32m4(vint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vv_i32m8(vint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhsu_vv_i32m8(op1, op2, vl); + return __riscv_vmulhsu_vv_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m8( @@ -327,7 +327,7 @@ vint32m8_t test_vmulhsu_vv_i32m8(vint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vx_i32m8(vint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m8(op1, op2, vl); + return __riscv_vmulhsu_vx_i32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf8_m( @@ -336,7 +336,7 @@ vint32m8_t test_vmulhsu_vx_i32m8(vint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhsu_vv_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf8_m( @@ -345,7 +345,7 @@ vint8mf8_t test_vmulhsu_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf8_t test_vmulhsu_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf4_m( @@ -354,7 +354,7 @@ vint8mf8_t test_vmulhsu_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhsu_vv_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf4_m( @@ -363,7 +363,7 @@ vint8mf4_t test_vmulhsu_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf4_t test_vmulhsu_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8mf2_m( @@ -372,7 +372,7 @@ vint8mf4_t test_vmulhsu_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhsu_vv_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8mf2_m( @@ -381,7 +381,7 @@ vint8mf2_t test_vmulhsu_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint8mf2_t test_vmulhsu_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m1_m( @@ -390,7 +390,7 @@ vint8mf2_t test_vmulhsu_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhsu_vv_i8m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m1_m( @@ -399,7 +399,7 @@ vint8m1_t test_vmulhsu_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m1_t test_vmulhsu_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m2_m( @@ -408,7 +408,7 @@ vint8m1_t test_vmulhsu_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhsu_vv_i8m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m2_m( @@ -417,7 +417,7 @@ vint8m2_t test_vmulhsu_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m2_t test_vmulhsu_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m4_m( @@ -426,7 +426,7 @@ vint8m2_t test_vmulhsu_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhsu_vv_i8m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m4_m( @@ -435,7 +435,7 @@ vint8m4_t test_vmulhsu_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m4_t test_vmulhsu_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i8m8_m( @@ -444,7 +444,7 @@ vint8m4_t test_vmulhsu_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhsu_vv_i8m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i8m8_m( @@ -453,7 +453,7 @@ vint8m8_t test_vmulhsu_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t op2, s // CHECK-RV64-NEXT: ret [[TMP0]] // vint8m8_t test_vmulhsu_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhsu_vx_i8m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf4_m( @@ -462,7 +462,7 @@ vint8m8_t test_vmulhsu_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, uint8_t op2, size // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhsu_vv_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf4_m( @@ -471,7 +471,7 @@ vint16mf4_t test_vmulhsu_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf4_t test_vmulhsu_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16mf2_m( @@ -480,7 +480,7 @@ vint16mf4_t test_vmulhsu_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhsu_vv_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16mf2_m( @@ -489,7 +489,7 @@ vint16mf2_t test_vmulhsu_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint16mf2_t test_vmulhsu_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m1_m( @@ -498,7 +498,7 @@ vint16mf2_t test_vmulhsu_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, uint16_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhsu_vv_i16m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m1_m( @@ -507,7 +507,7 @@ vint16m1_t test_vmulhsu_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m1_t test_vmulhsu_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m2_m( @@ -516,7 +516,7 @@ vint16m1_t test_vmulhsu_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhsu_vv_i16m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m2_m( @@ -525,7 +525,7 @@ vint16m2_t test_vmulhsu_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m2_t test_vmulhsu_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m4_m( @@ -534,7 +534,7 @@ vint16m2_t test_vmulhsu_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhsu_vv_i16m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m4_m( @@ -543,7 +543,7 @@ vint16m4_t test_vmulhsu_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m4_t test_vmulhsu_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i16m8_m( @@ -552,7 +552,7 @@ vint16m4_t test_vmulhsu_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhsu_vv_i16m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i16m8_m( @@ -561,7 +561,7 @@ vint16m8_t test_vmulhsu_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint16m8_t test_vmulhsu_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhsu_vx_i16m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32mf2_m( @@ -570,7 +570,7 @@ vint16m8_t test_vmulhsu_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhsu_vv_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32mf2_m( @@ -579,7 +579,7 @@ vint32mf2_t test_vmulhsu_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2 // CHECK-RV64-NEXT: ret [[TMP0]] // vint32mf2_t test_vmulhsu_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32mf2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m1_m( @@ -588,7 +588,7 @@ vint32mf2_t test_vmulhsu_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, uint32_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhsu_vv_i32m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m1_m( @@ -597,7 +597,7 @@ vint32m1_t test_vmulhsu_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m1_t test_vmulhsu_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m1_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m2_m( @@ -606,7 +606,7 @@ vint32m1_t test_vmulhsu_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhsu_vv_i32m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m2_m( @@ -615,7 +615,7 @@ vint32m2_t test_vmulhsu_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m2_t test_vmulhsu_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m2_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m4_m( @@ -624,7 +624,7 @@ vint32m2_t test_vmulhsu_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhsu_vv_i32m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m4_m( @@ -633,7 +633,7 @@ vint32m4_t test_vmulhsu_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m4_t test_vmulhsu_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m4_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vv_i32m8_m( @@ -642,7 +642,7 @@ vint32m4_t test_vmulhsu_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhsu_vv_i32m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vv_i32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhsu_vx_i32m8_m( @@ -651,5 +651,5 @@ vint32m8_t test_vmulhsu_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t op // CHECK-RV64-NEXT: ret [[TMP0]] // vint32m8_t test_vmulhsu_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhsu_vx_i32m8_m(mask, op1, op2, vl); + return __riscv_vmulhsu_vx_i32m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhu-eew64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhu-eew64.c index 45002407fa93155accc48219fced9dd89e98b095..4bf94dc1dfde1286bd690a5f4127724ef35681f3 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhu-eew64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhu-eew64.c @@ -13,7 +13,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhu_vv_u64m1(op1, op2, vl); + return __riscv_vmulhu_vv_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m1( @@ -22,7 +22,7 @@ vuint64m1_t test_vmulhu_vv_u64m1(vuint64m1_t op1, vuint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m1(op1, op2, vl); + return __riscv_vmulhu_vx_u64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m2( @@ -31,7 +31,7 @@ vuint64m1_t test_vmulhu_vx_u64m1(vuint64m1_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhu_vv_u64m2(op1, op2, vl); + return __riscv_vmulhu_vv_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m2( @@ -40,7 +40,7 @@ vuint64m2_t test_vmulhu_vv_u64m2(vuint64m2_t op1, vuint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m2(op1, op2, vl); + return __riscv_vmulhu_vx_u64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m4( @@ -49,7 +49,7 @@ vuint64m2_t test_vmulhu_vx_u64m2(vuint64m2_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhu_vv_u64m4(op1, op2, vl); + return __riscv_vmulhu_vv_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m4( @@ -58,7 +58,7 @@ vuint64m4_t test_vmulhu_vv_u64m4(vuint64m4_t op1, vuint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m4(op1, op2, vl); + return __riscv_vmulhu_vx_u64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m8( @@ -67,7 +67,7 @@ vuint64m4_t test_vmulhu_vx_u64m4(vuint64m4_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhu_vv_u64m8(op1, op2, vl); + return __riscv_vmulhu_vv_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m8( @@ -76,7 +76,7 @@ vuint64m8_t test_vmulhu_vv_u64m8(vuint64m8_t op1, vuint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m8(op1, op2, vl); + return __riscv_vmulhu_vx_u64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m1_m( @@ -85,7 +85,7 @@ vuint64m8_t test_vmulhu_vx_u64m8(vuint64m8_t op1, uint64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t op2, size_t vl) { - return vmulhu_vv_u64m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m1_m( @@ -94,7 +94,7 @@ vuint64m1_t test_vmulhu_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m1_t test_vmulhu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m2_m( @@ -103,7 +103,7 @@ vuint64m1_t test_vmulhu_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t op2, size_t vl) { - return vmulhu_vv_u64m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m2_m( @@ -112,7 +112,7 @@ vuint64m2_t test_vmulhu_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m2_t test_vmulhu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m4_m( @@ -121,7 +121,7 @@ vuint64m2_t test_vmulhu_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t op2, size_t vl) { - return vmulhu_vv_u64m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m4_m( @@ -130,7 +130,7 @@ vuint64m4_t test_vmulhu_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m4_t test_vmulhu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u64m8_m( @@ -139,7 +139,7 @@ vuint64m4_t test_vmulhu_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, uint64_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t op2, size_t vl) { - return vmulhu_vv_u64m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u64m8_m( @@ -148,5 +148,5 @@ vuint64m8_t test_vmulhu_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint64m8_t test_vmulhu_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, uint64_t op2, size_t vl) { - return vmulhu_vx_u64m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhu.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhu.c index 2d782901c41ea96fdc03bccef8bb34857a3908dc..f84e9170e6813f35776ade6c898ea23ecd75d49a 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhu.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vmulhu.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhu_vv_u8mf8(op1, op2, vl); + return __riscv_vmulhu_vv_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf8( @@ -21,7 +21,7 @@ vuint8mf8_t test_vmulhu_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf8(op1, op2, vl); + return __riscv_vmulhu_vx_u8mf8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf4( @@ -30,7 +30,7 @@ vuint8mf8_t test_vmulhu_vx_u8mf8(vuint8mf8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhu_vv_u8mf4(op1, op2, vl); + return __riscv_vmulhu_vv_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf4( @@ -39,7 +39,7 @@ vuint8mf4_t test_vmulhu_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf4(op1, op2, vl); + return __riscv_vmulhu_vx_u8mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf2( @@ -48,7 +48,7 @@ vuint8mf4_t test_vmulhu_vx_u8mf4(vuint8mf4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhu_vv_u8mf2(op1, op2, vl); + return __riscv_vmulhu_vv_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf2( @@ -57,7 +57,7 @@ vuint8mf2_t test_vmulhu_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf2(op1, op2, vl); + return __riscv_vmulhu_vx_u8mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m1( @@ -66,7 +66,7 @@ vuint8mf2_t test_vmulhu_vx_u8mf2(vuint8mf2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhu_vv_u8m1(op1, op2, vl); + return __riscv_vmulhu_vv_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m1( @@ -75,7 +75,7 @@ vuint8m1_t test_vmulhu_vv_u8m1(vuint8m1_t op1, vuint8m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m1(op1, op2, vl); + return __riscv_vmulhu_vx_u8m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m2( @@ -84,7 +84,7 @@ vuint8m1_t test_vmulhu_vx_u8m1(vuint8m1_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhu_vv_u8m2(op1, op2, vl); + return __riscv_vmulhu_vv_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m2( @@ -93,7 +93,7 @@ vuint8m2_t test_vmulhu_vv_u8m2(vuint8m2_t op1, vuint8m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m2(op1, op2, vl); + return __riscv_vmulhu_vx_u8m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m4( @@ -102,7 +102,7 @@ vuint8m2_t test_vmulhu_vx_u8m2(vuint8m2_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhu_vv_u8m4(op1, op2, vl); + return __riscv_vmulhu_vv_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m4( @@ -111,7 +111,7 @@ vuint8m4_t test_vmulhu_vv_u8m4(vuint8m4_t op1, vuint8m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m4(op1, op2, vl); + return __riscv_vmulhu_vx_u8m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m8( @@ -120,7 +120,7 @@ vuint8m4_t test_vmulhu_vx_u8m4(vuint8m4_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhu_vv_u8m8(op1, op2, vl); + return __riscv_vmulhu_vv_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m8( @@ -129,7 +129,7 @@ vuint8m8_t test_vmulhu_vv_u8m8(vuint8m8_t op1, vuint8m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m8(op1, op2, vl); + return __riscv_vmulhu_vx_u8m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf4( @@ -138,7 +138,7 @@ vuint8m8_t test_vmulhu_vx_u8m8(vuint8m8_t op1, uint8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhu_vv_u16mf4(op1, op2, vl); + return __riscv_vmulhu_vv_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf4( @@ -147,7 +147,7 @@ vuint16mf4_t test_vmulhu_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf4(op1, op2, vl); + return __riscv_vmulhu_vx_u16mf4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf2( @@ -156,7 +156,7 @@ vuint16mf4_t test_vmulhu_vx_u16mf4(vuint16mf4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhu_vv_u16mf2(op1, op2, vl); + return __riscv_vmulhu_vv_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf2( @@ -165,7 +165,7 @@ vuint16mf2_t test_vmulhu_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf2(op1, op2, vl); + return __riscv_vmulhu_vx_u16mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m1( @@ -174,7 +174,7 @@ vuint16mf2_t test_vmulhu_vx_u16mf2(vuint16mf2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhu_vv_u16m1(op1, op2, vl); + return __riscv_vmulhu_vv_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m1( @@ -183,7 +183,7 @@ vuint16m1_t test_vmulhu_vv_u16m1(vuint16m1_t op1, vuint16m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m1(op1, op2, vl); + return __riscv_vmulhu_vx_u16m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m2( @@ -192,7 +192,7 @@ vuint16m1_t test_vmulhu_vx_u16m1(vuint16m1_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhu_vv_u16m2(op1, op2, vl); + return __riscv_vmulhu_vv_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m2( @@ -201,7 +201,7 @@ vuint16m2_t test_vmulhu_vv_u16m2(vuint16m2_t op1, vuint16m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m2(op1, op2, vl); + return __riscv_vmulhu_vx_u16m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m4( @@ -210,7 +210,7 @@ vuint16m2_t test_vmulhu_vx_u16m2(vuint16m2_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhu_vv_u16m4(op1, op2, vl); + return __riscv_vmulhu_vv_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m4( @@ -219,7 +219,7 @@ vuint16m4_t test_vmulhu_vv_u16m4(vuint16m4_t op1, vuint16m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m4(op1, op2, vl); + return __riscv_vmulhu_vx_u16m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m8( @@ -228,7 +228,7 @@ vuint16m4_t test_vmulhu_vx_u16m4(vuint16m4_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhu_vv_u16m8(op1, op2, vl); + return __riscv_vmulhu_vv_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m8( @@ -237,7 +237,7 @@ vuint16m8_t test_vmulhu_vv_u16m8(vuint16m8_t op1, vuint16m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m8(op1, op2, vl); + return __riscv_vmulhu_vx_u16m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32mf2( @@ -246,7 +246,7 @@ vuint16m8_t test_vmulhu_vx_u16m8(vuint16m8_t op1, uint16_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhu_vv_u32mf2(op1, op2, vl); + return __riscv_vmulhu_vv_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32mf2( @@ -255,7 +255,7 @@ vuint32mf2_t test_vmulhu_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t op2, size_t vl // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32mf2(op1, op2, vl); + return __riscv_vmulhu_vx_u32mf2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m1( @@ -264,7 +264,7 @@ vuint32mf2_t test_vmulhu_vx_u32mf2(vuint32mf2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhu_vv_u32m1(op1, op2, vl); + return __riscv_vmulhu_vv_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m1( @@ -273,7 +273,7 @@ vuint32m1_t test_vmulhu_vv_u32m1(vuint32m1_t op1, vuint32m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m1(op1, op2, vl); + return __riscv_vmulhu_vx_u32m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m2( @@ -282,7 +282,7 @@ vuint32m1_t test_vmulhu_vx_u32m1(vuint32m1_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhu_vv_u32m2(op1, op2, vl); + return __riscv_vmulhu_vv_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m2( @@ -291,7 +291,7 @@ vuint32m2_t test_vmulhu_vv_u32m2(vuint32m2_t op1, vuint32m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m2(op1, op2, vl); + return __riscv_vmulhu_vx_u32m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m4( @@ -300,7 +300,7 @@ vuint32m2_t test_vmulhu_vx_u32m2(vuint32m2_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhu_vv_u32m4(op1, op2, vl); + return __riscv_vmulhu_vv_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m4( @@ -309,7 +309,7 @@ vuint32m4_t test_vmulhu_vv_u32m4(vuint32m4_t op1, vuint32m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m4(op1, op2, vl); + return __riscv_vmulhu_vx_u32m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m8( @@ -318,7 +318,7 @@ vuint32m4_t test_vmulhu_vx_u32m4(vuint32m4_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhu_vv_u32m8(op1, op2, vl); + return __riscv_vmulhu_vv_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m8( @@ -327,7 +327,7 @@ vuint32m8_t test_vmulhu_vv_u32m8(vuint32m8_t op1, vuint32m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m8(op1, op2, vl); + return __riscv_vmulhu_vx_u32m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf8_m( @@ -336,7 +336,7 @@ vuint32m8_t test_vmulhu_vx_u32m8(vuint32m8_t op1, uint32_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t op2, size_t vl) { - return vmulhu_vv_u8mf8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf8_m( @@ -345,7 +345,7 @@ vuint8mf8_t test_vmulhu_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf8_t test_vmulhu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf4_m( @@ -354,7 +354,7 @@ vuint8mf8_t test_vmulhu_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t op2, size_t vl) { - return vmulhu_vv_u8mf4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf4_m( @@ -363,7 +363,7 @@ vuint8mf4_t test_vmulhu_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf4_t test_vmulhu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8mf2_m( @@ -372,7 +372,7 @@ vuint8mf4_t test_vmulhu_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t op2, size_t vl) { - return vmulhu_vv_u8mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8mf2_m( @@ -381,7 +381,7 @@ vuint8mf2_t test_vmulhu_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8mf2_t test_vmulhu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m1_m( @@ -390,7 +390,7 @@ vuint8mf2_t test_vmulhu_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, uint8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, size_t vl) { - return vmulhu_vv_u8m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m1_m( @@ -399,7 +399,7 @@ vuint8m1_t test_vmulhu_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m1_t test_vmulhu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m2_m( @@ -408,7 +408,7 @@ vuint8m1_t test_vmulhu_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, size_t vl) { - return vmulhu_vv_u8m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m2_m( @@ -417,7 +417,7 @@ vuint8m2_t test_vmulhu_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m2_t test_vmulhu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m4_m( @@ -426,7 +426,7 @@ vuint8m2_t test_vmulhu_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, size_t vl) { - return vmulhu_vv_u8m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m4_m( @@ -435,7 +435,7 @@ vuint8m4_t test_vmulhu_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m4_t test_vmulhu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u8m8_m( @@ -444,7 +444,7 @@ vuint8m4_t test_vmulhu_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, size_t vl) { - return vmulhu_vv_u8m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u8m8_m( @@ -453,7 +453,7 @@ vuint8m8_t test_vmulhu_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint8m8_t test_vmulhu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, size_t vl) { - return vmulhu_vx_u8m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u8m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf4_m( @@ -462,7 +462,7 @@ vuint8m8_t test_vmulhu_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, uint8_t op2, siz // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t op2, size_t vl) { - return vmulhu_vv_u16mf4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf4_m( @@ -471,7 +471,7 @@ vuint16mf4_t test_vmulhu_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf4_t test_vmulhu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16mf2_m( @@ -480,7 +480,7 @@ vuint16mf4_t test_vmulhu_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t op2, size_t vl) { - return vmulhu_vv_u16mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16mf2_m( @@ -489,7 +489,7 @@ vuint16mf2_t test_vmulhu_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16mf2_t test_vmulhu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m1_m( @@ -498,7 +498,7 @@ vuint16mf2_t test_vmulhu_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, uint16_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t op2, size_t vl) { - return vmulhu_vv_u16m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m1_m( @@ -507,7 +507,7 @@ vuint16m1_t test_vmulhu_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m1_t test_vmulhu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m2_m( @@ -516,7 +516,7 @@ vuint16m1_t test_vmulhu_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, uint16_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t op2, size_t vl) { - return vmulhu_vv_u16m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m2_m( @@ -525,7 +525,7 @@ vuint16m2_t test_vmulhu_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m2_t test_vmulhu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m4_m( @@ -534,7 +534,7 @@ vuint16m2_t test_vmulhu_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t op2, size_t vl) { - return vmulhu_vv_u16m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m4_m( @@ -543,7 +543,7 @@ vuint16m4_t test_vmulhu_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m4_t test_vmulhu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u16m8_m( @@ -552,7 +552,7 @@ vuint16m4_t test_vmulhu_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t op2, size_t vl) { - return vmulhu_vv_u16m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u16m8_m( @@ -561,7 +561,7 @@ vuint16m8_t test_vmulhu_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint16m8_t test_vmulhu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, size_t vl) { - return vmulhu_vx_u16m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u16m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32mf2_m( @@ -570,7 +570,7 @@ vuint16m8_t test_vmulhu_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, uint16_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t op2, size_t vl) { - return vmulhu_vv_u32mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32mf2_m( @@ -579,7 +579,7 @@ vuint32mf2_t test_vmulhu_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32mf2_t test_vmulhu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32mf2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32mf2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m1_m( @@ -588,7 +588,7 @@ vuint32mf2_t test_vmulhu_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, uint32_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t op2, size_t vl) { - return vmulhu_vv_u32m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m1_m( @@ -597,7 +597,7 @@ vuint32m1_t test_vmulhu_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m1_t test_vmulhu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m1_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m2_m( @@ -606,7 +606,7 @@ vuint32m1_t test_vmulhu_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t op2, size_t vl) { - return vmulhu_vv_u32m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m2_m( @@ -615,7 +615,7 @@ vuint32m2_t test_vmulhu_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m2_t test_vmulhu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m2_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m4_m( @@ -624,7 +624,7 @@ vuint32m2_t test_vmulhu_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, uint32_t op2 // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t op2, size_t vl) { - return vmulhu_vv_u32m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m4_m( @@ -633,7 +633,7 @@ vuint32m4_t test_vmulhu_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m4_t test_vmulhu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m4_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vv_u32m8_m( @@ -642,7 +642,7 @@ vuint32m4_t test_vmulhu_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, uint32_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t op2, size_t vl) { - return vmulhu_vv_u32m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vv_u32m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vmulhu_vx_u32m8_m( @@ -651,5 +651,5 @@ vuint32m8_t test_vmulhu_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t o // CHECK-RV64-NEXT: ret [[TMP0]] // vuint32m8_t test_vmulhu_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, uint32_t op2, size_t vl) { - return vmulhu_vx_u32m8_m(mask, op1, op2, vl); + return __riscv_vmulhu_vx_u32m8_m(mask, op1, op2, vl); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c index 0bb86e1958744c939cb9ce5abcf7060122c61079..fad13d9ba23c82d2d2565ed76dac0eb6e4638785 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vset-index-out-of-range.c @@ -6,336 +6,336 @@ #include vint8m1_t test_vset_v_index_not_constant(vint8m2_t dest, vint8m1_t val, int index) { - // expected-error@+1 {{argument to 'vset_v_i8m1_i8m2' must be a constant integer}} - return vset_v_i8m1_i8m2(dest, index, val); + // expected-error@+1 {{argument to '__riscv_vset_v_i8m1_i8m2' must be a constant integer}} + return __riscv_vset_v_i8m1_i8m2(dest, index, val); } vint8m2_t test_vset_v_i8m1_i8m2(vint8m2_t dest, vint8m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i8m1_i8m2(dest, 2, val); + return __riscv_vset_v_i8m1_i8m2(dest, 2, val); } vint8m4_t test_vset_v_i8m1_i8m4(vint8m4_t dest, vint8m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_i8m1_i8m4(dest, 4, val); + return __riscv_vset_v_i8m1_i8m4(dest, 4, val); } vint8m4_t test_vset_v_i8m2_i8m4(vint8m4_t dest, vint8m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i8m2_i8m4(dest, 2, val); + return __riscv_vset_v_i8m2_i8m4(dest, 2, val); } vint8m8_t test_vset_v_i8m1_i8m8(vint8m8_t dest, vint8m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_i8m1_i8m8(dest, 8, val); + return __riscv_vset_v_i8m1_i8m8(dest, 8, val); } vint8m8_t test_vset_v_i8m2_i8m8(vint8m8_t dest, vint8m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_i8m2_i8m8(dest, 4, val); + return __riscv_vset_v_i8m2_i8m8(dest, 4, val); } vint8m8_t test_vset_v_i8m4_i8m8(vint8m8_t dest, vint8m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i8m4_i8m8(dest, 2, val); + return __riscv_vset_v_i8m4_i8m8(dest, 2, val); } vint16m2_t test_vset_v_i16m1_i16m2(vint16m2_t dest, vint16m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i16m1_i16m2(dest, 2, val); + return __riscv_vset_v_i16m1_i16m2(dest, 2, val); } vint16m4_t test_vset_v_i16m1_i16m4(vint16m4_t dest, vint16m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_i16m1_i16m4(dest, 4, val); + return __riscv_vset_v_i16m1_i16m4(dest, 4, val); } vint16m4_t test_vset_v_i16m2_i16m4(vint16m4_t dest, vint16m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i16m2_i16m4(dest, 2, val); + return __riscv_vset_v_i16m2_i16m4(dest, 2, val); } vint16m8_t test_vset_v_i16m1_i16m8(vint16m8_t dest, vint16m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_i16m1_i16m8(dest, 8, val); + return __riscv_vset_v_i16m1_i16m8(dest, 8, val); } vint16m8_t test_vset_v_i16m2_i16m8(vint16m8_t dest, vint16m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_i16m2_i16m8(dest, 4, val); + return __riscv_vset_v_i16m2_i16m8(dest, 4, val); } vint16m8_t test_vset_v_i16m4_i16m8(vint16m8_t dest, vint16m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i16m4_i16m8(dest, 2, val); + return __riscv_vset_v_i16m4_i16m8(dest, 2, val); } vint32m2_t test_vset_v_i32m1_i32m2(vint32m2_t dest, vint32m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i32m1_i32m2(dest, 2, val); + return __riscv_vset_v_i32m1_i32m2(dest, 2, val); } vint32m4_t test_vset_v_i32m1_i32m4(vint32m4_t dest, vint32m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_i32m1_i32m4(dest, 4, val); + return __riscv_vset_v_i32m1_i32m4(dest, 4, val); } vint32m4_t test_vset_v_i32m2_i32m4(vint32m4_t dest, vint32m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i32m2_i32m4(dest, 2, val); + return __riscv_vset_v_i32m2_i32m4(dest, 2, val); } vint32m8_t test_vset_v_i32m1_i32m8(vint32m8_t dest, vint32m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_i32m1_i32m8(dest, 8, val); + return __riscv_vset_v_i32m1_i32m8(dest, 8, val); } vint32m8_t test_vset_v_i32m2_i32m8(vint32m8_t dest, vint32m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_i32m2_i32m8(dest, 4, val); + return __riscv_vset_v_i32m2_i32m8(dest, 4, val); } vint32m8_t test_vset_v_i32m4_i32m8(vint32m8_t dest, vint32m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i32m4_i32m8(dest, 2, val); + return __riscv_vset_v_i32m4_i32m8(dest, 2, val); } vint64m2_t test_vset_v_i64m1_i64m2(vint64m2_t dest, vint64m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i64m1_i64m2(dest, 2, val); + return __riscv_vset_v_i64m1_i64m2(dest, 2, val); } vint64m4_t test_vset_v_i64m1_i64m4(vint64m4_t dest, vint64m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_i64m1_i64m4(dest, 4, val); + return __riscv_vset_v_i64m1_i64m4(dest, 4, val); } vint64m4_t test_vset_v_i64m2_i64m4(vint64m4_t dest, vint64m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i64m2_i64m4(dest, 2, val); + return __riscv_vset_v_i64m2_i64m4(dest, 2, val); } vint64m8_t test_vset_v_i64m1_i64m8(vint64m8_t dest, vint64m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_i64m1_i64m8(dest, 8, val); + return __riscv_vset_v_i64m1_i64m8(dest, 8, val); } vint64m8_t test_vset_v_i64m2_i64m8(vint64m8_t dest, vint64m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_i64m2_i64m8(dest, 4, val); + return __riscv_vset_v_i64m2_i64m8(dest, 4, val); } vint64m8_t test_vset_v_i64m4_i64m8(vint64m8_t dest, vint64m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_i64m4_i64m8(dest, 2, val); + return __riscv_vset_v_i64m4_i64m8(dest, 2, val); } vuint8m2_t test_vset_v_u8m1_u8m2(vuint8m2_t dest, vuint8m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u8m1_u8m2(dest, 2, val); + return __riscv_vset_v_u8m1_u8m2(dest, 2, val); } vuint8m4_t test_vset_v_u8m1_u8m4(vuint8m4_t dest, vuint8m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_u8m1_u8m4(dest, 4, val); + return __riscv_vset_v_u8m1_u8m4(dest, 4, val); } vuint8m4_t test_vset_v_u8m2_u8m4(vuint8m4_t dest, vuint8m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u8m2_u8m4(dest, 2, val); + return __riscv_vset_v_u8m2_u8m4(dest, 2, val); } vuint8m8_t test_vset_v_u8m1_u8m8(vuint8m8_t dest, vuint8m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_u8m1_u8m8(dest, 8, val); + return __riscv_vset_v_u8m1_u8m8(dest, 8, val); } vuint8m8_t test_vset_v_u8m2_u8m8(vuint8m8_t dest, vuint8m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_u8m2_u8m8(dest, 4, val); + return __riscv_vset_v_u8m2_u8m8(dest, 4, val); } vuint8m8_t test_vset_v_u8m4_u8m8(vuint8m8_t dest, vuint8m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u8m4_u8m8(dest, 2, val); + return __riscv_vset_v_u8m4_u8m8(dest, 2, val); } vuint16m2_t test_vset_v_u16m1_u16m2(vuint16m2_t dest, vuint16m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u16m1_u16m2(dest, 2, val); + return __riscv_vset_v_u16m1_u16m2(dest, 2, val); } vuint16m4_t test_vset_v_u16m1_u16m4(vuint16m4_t dest, vuint16m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_u16m1_u16m4(dest, 4, val); + return __riscv_vset_v_u16m1_u16m4(dest, 4, val); } vuint16m4_t test_vset_v_u16m2_u16m4(vuint16m4_t dest, vuint16m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u16m2_u16m4(dest, 2, val); + return __riscv_vset_v_u16m2_u16m4(dest, 2, val); } vuint16m8_t test_vset_v_u16m1_u16m8(vuint16m8_t dest, vuint16m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_u16m1_u16m8(dest, 8, val); + return __riscv_vset_v_u16m1_u16m8(dest, 8, val); } vuint16m8_t test_vset_v_u16m2_u16m8(vuint16m8_t dest, vuint16m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_u16m2_u16m8(dest, 4, val); + return __riscv_vset_v_u16m2_u16m8(dest, 4, val); } vuint16m8_t test_vset_v_u16m4_u16m8(vuint16m8_t dest, vuint16m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u16m4_u16m8(dest, 2, val); + return __riscv_vset_v_u16m4_u16m8(dest, 2, val); } vuint32m2_t test_vset_v_u32m1_u32m2(vuint32m2_t dest, vuint32m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u32m1_u32m2(dest, 2, val); + return __riscv_vset_v_u32m1_u32m2(dest, 2, val); } vuint32m4_t test_vset_v_u32m1_u32m4(vuint32m4_t dest, vuint32m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_u32m1_u32m4(dest, 4, val); + return __riscv_vset_v_u32m1_u32m4(dest, 4, val); } vuint32m4_t test_vset_v_u32m2_u32m4(vuint32m4_t dest, vuint32m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u32m2_u32m4(dest, 2, val); + return __riscv_vset_v_u32m2_u32m4(dest, 2, val); } vuint32m8_t test_vset_v_u32m1_u32m8(vuint32m8_t dest, vuint32m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_u32m1_u32m8(dest, 8, val); + return __riscv_vset_v_u32m1_u32m8(dest, 8, val); } vuint32m8_t test_vset_v_u32m2_u32m8(vuint32m8_t dest, vuint32m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_u32m2_u32m8(dest, 4, val); + return __riscv_vset_v_u32m2_u32m8(dest, 4, val); } vuint32m8_t test_vset_v_u32m4_u32m8(vuint32m8_t dest, vuint32m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u32m4_u32m8(dest, 2, val); + return __riscv_vset_v_u32m4_u32m8(dest, 2, val); } vuint64m2_t test_vset_v_u64m1_u64m2(vuint64m2_t dest, vuint64m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u64m1_u64m2(dest, 2, val); + return __riscv_vset_v_u64m1_u64m2(dest, 2, val); } vuint64m4_t test_vset_v_u64m1_u64m4(vuint64m4_t dest, vuint64m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_u64m1_u64m4(dest, 4, val); + return __riscv_vset_v_u64m1_u64m4(dest, 4, val); } vuint64m4_t test_vset_v_u64m2_u64m4(vuint64m4_t dest, vuint64m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u64m2_u64m4(dest, 2, val); + return __riscv_vset_v_u64m2_u64m4(dest, 2, val); } vuint64m8_t test_vset_v_u64m1_u64m8(vuint64m8_t dest, vuint64m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_u64m1_u64m8(dest, 8, val); + return __riscv_vset_v_u64m1_u64m8(dest, 8, val); } vuint64m8_t test_vset_v_u64m2_u64m8(vuint64m8_t dest, vuint64m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_u64m2_u64m8(dest, 4, val); + return __riscv_vset_v_u64m2_u64m8(dest, 4, val); } vuint64m8_t test_vset_v_u64m4_u64m8(vuint64m8_t dest, vuint64m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_u64m4_u64m8(dest, 2, val); + return __riscv_vset_v_u64m4_u64m8(dest, 2, val); } vfloat32m2_t test_vset_v_f32m1_f32m2(vfloat32m2_t dest, vfloat32m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f32m1_f32m2(dest, 2, val); + return __riscv_vset_v_f32m1_f32m2(dest, 2, val); } vfloat32m4_t test_vset_v_f32m1_f32m4(vfloat32m4_t dest, vfloat32m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_f32m1_f32m4(dest, 4, val); + return __riscv_vset_v_f32m1_f32m4(dest, 4, val); } vfloat32m4_t test_vset_v_f32m2_f32m4(vfloat32m4_t dest, vfloat32m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f32m2_f32m4(dest, 2, val); + return __riscv_vset_v_f32m2_f32m4(dest, 2, val); } vfloat32m8_t test_vset_v_f32m1_f32m8(vfloat32m8_t dest, vfloat32m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_f32m1_f32m8(dest, 8, val); + return __riscv_vset_v_f32m1_f32m8(dest, 8, val); } vfloat32m8_t test_vset_v_f32m2_f32m8(vfloat32m8_t dest, vfloat32m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_f32m2_f32m8(dest, 4, val); + return __riscv_vset_v_f32m2_f32m8(dest, 4, val); } vfloat32m8_t test_vset_v_f32m4_f32m8(vfloat32m8_t dest, vfloat32m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f32m4_f32m8(dest, 2, val); + return __riscv_vset_v_f32m4_f32m8(dest, 2, val); } vfloat64m2_t test_vset_v_f64m1_f64m2(vfloat64m2_t dest, vfloat64m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f64m1_f64m2(dest, 2, val); + return __riscv_vset_v_f64m1_f64m2(dest, 2, val); } vfloat64m4_t test_vset_v_f64m1_f64m4(vfloat64m4_t dest, vfloat64m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_f64m1_f64m4(dest, 4, val); + return __riscv_vset_v_f64m1_f64m4(dest, 4, val); } vfloat64m4_t test_vset_v_f64m2_f64m4(vfloat64m4_t dest, vfloat64m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f64m2_f64m4(dest, 2, val); + return __riscv_vset_v_f64m2_f64m4(dest, 2, val); } vfloat64m8_t test_vset_v_f64m1_f64m8(vfloat64m8_t dest, vfloat64m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_f64m1_f64m8(dest, 8, val); + return __riscv_vset_v_f64m1_f64m8(dest, 8, val); } vfloat64m8_t test_vset_v_f64m2_f64m8(vfloat64m8_t dest, vfloat64m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_f64m2_f64m8(dest, 4, val); + return __riscv_vset_v_f64m2_f64m8(dest, 4, val); } vfloat64m8_t test_vset_v_f64m4_f64m8(vfloat64m8_t dest, vfloat64m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f64m4_f64m8(dest, 2, val); + return __riscv_vset_v_f64m4_f64m8(dest, 2, val); } vfloat16m2_t test_vset_v_f16m1_f16m2(vfloat16m2_t dest, vfloat16m1_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f16m1_f16m2(dest, 2, val); + return __riscv_vset_v_f16m1_f16m2(dest, 2, val); } vfloat16m4_t test_vset_v_f16m1_f16m4(vfloat16m4_t dest, vfloat16m1_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_f16m1_f16m4(dest, 4, val); + return __riscv_vset_v_f16m1_f16m4(dest, 4, val); } vfloat16m4_t test_vset_v_f16m2_f16m4(vfloat16m4_t dest, vfloat16m2_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f16m2_f16m4(dest, 2, val); + return __riscv_vset_v_f16m2_f16m4(dest, 2, val); } vfloat16m8_t test_vset_v_f16m1_f16m8(vfloat16m8_t dest, vfloat16m1_t val) { // expected-error@+1 {{argument value 8 is outside the valid range [0, 7]}} - return vset_v_f16m1_f16m8(dest, 8, val); + return __riscv_vset_v_f16m1_f16m8(dest, 8, val); } vfloat16m8_t test_vset_v_f16m2_f16m8(vfloat16m8_t dest, vfloat16m2_t val) { // expected-error@+1 {{argument value 4 is outside the valid range [0, 3]}} - return vset_v_f16m2_f16m8(dest, 4, val); + return __riscv_vset_v_f16m2_f16m8(dest, 4, val); } vfloat16m8_t test_vset_v_f16m4_f16m8(vfloat16m8_t dest, vfloat16m4_t val) { // expected-error@+1 {{argument value 2 is outside the valid range [0, 1]}} - return vset_v_f16m4_f16m8(dest, 2, val); + return __riscv_vset_v_f16m4_f16m8(dest, 2, val); } diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsmul-eew64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsmul-eew64.c index 803ca6f72d2b36573e5112a545ad07276603df51..03a96ade8f873e8a8fbe483c85ea0557744a9142 100644 --- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsmul-eew64.c +++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsmul-eew64.c @@ -12,7 +12,7 @@ // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsmul_vv_i64m1(op1, op2, vl); + return __riscv_vsmul_vv_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m1( @@ -21,7 +21,7 @@ vint64m1_t test_vsmul_vv_i64m1(vint64m1_t op1, vint64m1_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m1(op1, op2, vl); + return __riscv_vsmul_vx_i64m1(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m2( @@ -30,7 +30,7 @@ vint64m1_t test_vsmul_vx_i64m1(vint64m1_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsmul_vv_i64m2(op1, op2, vl); + return __riscv_vsmul_vv_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m2( @@ -39,7 +39,7 @@ vint64m2_t test_vsmul_vv_i64m2(vint64m2_t op1, vint64m2_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m2(op1, op2, vl); + return __riscv_vsmul_vx_i64m2(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m4( @@ -48,7 +48,7 @@ vint64m2_t test_vsmul_vx_i64m2(vint64m2_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsmul_vv_i64m4(op1, op2, vl); + return __riscv_vsmul_vv_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m4( @@ -57,7 +57,7 @@ vint64m4_t test_vsmul_vv_i64m4(vint64m4_t op1, vint64m4_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m4(op1, op2, vl); + return __riscv_vsmul_vx_i64m4(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m8( @@ -66,7 +66,7 @@ vint64m4_t test_vsmul_vx_i64m4(vint64m4_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsmul_vv_i64m8(op1, op2, vl); + return __riscv_vsmul_vv_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m8( @@ -75,7 +75,7 @@ vint64m8_t test_vsmul_vv_i64m8(vint64m8_t op1, vint64m8_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m8(op1, op2, vl); + return __riscv_vsmul_vx_i64m8(op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m1_m( @@ -84,7 +84,7 @@ vint64m8_t test_vsmul_vx_i64m8(vint64m8_t op1, int64_t op2, size_t vl) { // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, size_t vl) { - return vsmul_vv_i64m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m1_m( @@ -93,7 +93,7 @@ vint64m1_t test_vsmul_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vint64m1_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m1_t test_vsmul_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m1_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i64m1_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m2_m( @@ -102,7 +102,7 @@ vint64m1_t test_vsmul_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, size_t vl) { - return vsmul_vv_i64m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m2_m( @@ -111,7 +111,7 @@ vint64m2_t test_vsmul_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vint64m2_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m2_t test_vsmul_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m2_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i64m2_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m4_m( @@ -120,7 +120,7 @@ vint64m2_t test_vsmul_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, size_t vl) { - return vsmul_vv_i64m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m4_m( @@ -129,7 +129,7 @@ vint64m4_t test_vsmul_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vint64m4_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m4_t test_vsmul_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m4_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i64m4_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vv_i64m8_m( @@ -138,7 +138,7 @@ vint64m4_t test_vsmul_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, int64_t op2, si // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, size_t vl) { - return vsmul_vv_i64m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vv_i64m8_m(mask, op1, op2, vl); } // CHECK-RV64-LABEL: @test_vsmul_vx_i64m8_m( @@ -147,5 +147,5 @@ vint64m8_t test_vsmul_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vint64m8_t op2, // CHECK-RV64-NEXT: ret [[TMP0]] // vint64m8_t test_vsmul_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, int64_t op2, size_t vl) { - return vsmul_vx_i64m8_m(mask, op1, op2, vl); + return __riscv_vsmul_vx_i64m8_m(mask, op1, op2, vl); } diff --git a/clang/test/Sema/uninit-variables-riscv-vector.c b/clang/test/Sema/uninit-variables-riscv-vector.c index 0f91b0d75710badf702e8e721102f7ed1efefd4a..91af7514656bddab65d347f7f3f26a0b476c6713 100644 --- a/clang/test/Sema/uninit-variables-riscv-vector.c +++ b/clang/test/Sema/uninit-variables-riscv-vector.c @@ -4,11 +4,11 @@ void test1(int *input, long vl) { __rvv_int32m1_t x, y, z, w, X; // expected-note {{variable 'x' is declared here}} expected-note {{variable 'y' is declared here}} expected-note {{variable 'w' is declared here}} expected-note {{variable 'z' is declared here}} - x = vxor_vv_i32m1(x,x, vl); // expected-warning {{variable 'x' is uninitialized when used here}} - y = vxor_vv_i32m1(y,y, vl); // expected-warning {{variable 'y' is uninitialized when used here}} - z = vxor_vv_i32m1(z,z, vl); // expected-warning {{variable 'z' is uninitialized when used here}} - w = vxor_vv_i32m1(w,w, vl); // expected-warning {{variable 'w' is uninitialized when used here}} - X = vle32_v_i32m1(&input[0], vl); - X = vxor_vv_i32m1(X,X, vl); // no-warning + x = __riscv_vxor_vv_i32m1(x,x, vl); // expected-warning {{variable 'x' is uninitialized when used here}} + y = __riscv_vxor_vv_i32m1(y,y, vl); // expected-warning {{variable 'y' is uninitialized when used here}} + z = __riscv_vxor_vv_i32m1(z,z, vl); // expected-warning {{variable 'z' is uninitialized when used here}} + w = __riscv_vxor_vv_i32m1(w,w, vl); // expected-warning {{variable 'w' is uninitialized when used here}} + X = __riscv_vle32_v_i32m1(&input[0], vl); + X = __riscv_vxor_vv_i32m1(X,X, vl); // no-warning }